o switch to v46

This commit is contained in:
David Voswinkel
2009-05-12 22:17:42 +02:00
parent 7a878eab39
commit 8e877d38d4
217 changed files with 1440 additions and 31284 deletions

View File

@@ -1,5 +1,7 @@
#include <../base.hpp>
#define MEMORY_CPP
namespace SNES {
namespace memory {
MMIOAccess mmio;
@@ -24,18 +26,11 @@ void MMIOAccess::map(unsigned addr, MMIO &access) {
mmio[(addr - 0x2000) & 0x3fff] = &access;
}
MMIO* MMIOAccess::get(unsigned addr) {
return mmio[(addr - 0x2000) & 0x3fff];
}
uint8 MMIOAccess::read(unsigned addr) {
printf("MMIOAccess::read 0x%x\n",addr);
return mmio[(addr - 0x2000) & 0x3fff]->mmio_read(addr);
return mmio[(addr - 0x2000) & 0x3fff]->mmio_read(addr);
}
void MMIOAccess::write(unsigned addr, uint8 data) {
printf("MMIOAccess::write 0x%x %x\n",addr,data);
mmio[(addr - 0x2000) & 0x3fff]->mmio_write(addr, data);
}
@@ -70,7 +65,6 @@ void Bus::map(
) {
assert(bank_lo <= bank_hi);
assert(addr_lo <= addr_hi);
if(access.size() == -1U) return;
uint8 page_lo = addr_lo >> 8;
@@ -79,8 +73,6 @@ void Bus::map(
switch(mode) {
case MapDirect: {
printf("Bus::map MapDirect bank_lo=0x%02x bank_hi=0x%02x addr_lo=0x%04x addr_hi=0x%04x\n",
bank_lo,bank_hi,addr_lo,addr_hi);
for(unsigned bank = bank_lo; bank <= bank_hi; bank++) {
for(unsigned page = page_lo; page <= page_hi; page++) {
map((bank << 16) + (page << 8), access, (bank << 16) + (page << 8));
@@ -89,8 +81,6 @@ void Bus::map(
} break;
case MapLinear: {
printf("Bus::map MapLinear bank_lo=0x%02x bank_hi=0x%02x addr_lo=0x%04x addr_hi=0x%04x\n",
bank_lo,bank_hi,addr_lo,addr_hi);
for(unsigned bank = bank_lo; bank <= bank_hi; bank++) {
for(unsigned page = page_lo; page <= page_hi; page++) {
map((bank << 16) + (page << 8), access, mirror(offset + index, access.size()));
@@ -101,8 +91,6 @@ void Bus::map(
} break;
case MapShadow: {
printf("Bus::map MapShadow bank_lo=0x%02x bank_hi=0x%02x addr_lo=0x%04x addr_hi=0x%04x\n",
bank_lo,bank_hi,addr_lo,addr_hi);
for(unsigned bank = bank_lo; bank <= bank_hi; bank++) {
index += page_lo * 256;
if(size) index %= size;
@@ -119,3 +107,6 @@ void Bus::map(
} break;
}
}
};

View File

@@ -20,52 +20,62 @@ struct UnmappedMMIO : MMIO {
};
struct StaticRAM : Memory {
uint8* handle() { return data; }
unsigned size() const { return datasize; }
uint8* data() { return data_; }
unsigned size() const { return size_; }
inline uint8 read(unsigned addr) { return data[addr]; }
inline void write(unsigned addr, uint8 n) { data[addr] = n; }
inline uint8& operator[](unsigned addr) { return data[addr]; }
inline const uint8& operator[](unsigned addr) const { return data[addr]; }
inline uint8 read(unsigned addr) { return data_[addr]; }
inline void write(unsigned addr, uint8 n) { data_[addr] = n; }
inline uint8& operator[](unsigned addr) { return data_[addr]; }
inline const uint8& operator[](unsigned addr) const { return data_[addr]; }
StaticRAM(unsigned n) : datasize(n) { data = new uint8[datasize]; }
~StaticRAM() { delete[] data; }
StaticRAM(unsigned n) : size_(n) { data_ = new uint8[size_]; }
~StaticRAM() { delete[] data_; }
private:
uint8 *data;
unsigned datasize;
uint8 *data_;
unsigned size_;
};
struct MappedRAM : Memory {
void map(uint8 *source, unsigned length) { data = source; datasize = length > 0 ? length : -1U; }
void write_protect(bool status) { write_protection = status; }
uint8* handle() { return data; }
unsigned size() const { return datasize; }
struct MappedRAM : Memory {
void reset() {
if(data_) {
delete[] data_;
data_ = 0;
}
size_ = -1U;
write_protect_ = false;
}
inline uint8 read(unsigned addr) { return data[addr]; }
inline void write(unsigned addr, uint8 n) { if(!write_protection) data[addr] = n; }
inline const uint8& operator[](unsigned addr) const { return data[addr]; }
void map(uint8 *source, unsigned length) {
reset();
data_ = source;
size_ = data_ && length > 0 ? length : -1U;
}
MappedRAM() : data(0), datasize(0), write_protection(false) {}
void write_protect(bool status) { write_protect_ = status; }
uint8* data() { return data_; }
unsigned size() const { return size_; }
inline uint8 read(unsigned addr) { return data_[addr]; }
inline void write(unsigned addr, uint8 n) { if(!write_protect_) data_[addr] = n; }
inline const uint8 operator[](unsigned addr) const { return data_[addr]; }
MappedRAM() : data_(0), size_(-1U), write_protect_(false) {}
private:
uint8 *data;
unsigned datasize;
bool write_protection;
uint8 *data_;
unsigned size_;
bool write_protect_;
};
struct MMIOAccess : Memory {
void map(unsigned addr, MMIO &access);
MMIO* get(unsigned addr);
uint8 read(unsigned addr);
void write(unsigned addr, uint8 data);
private:
MMIO *mmio[0x4000];
};
class Bus {
public:
struct Bus {
unsigned mirror(unsigned addr, unsigned size);
void map(unsigned addr, Memory &access, unsigned offset);
enum MapMode { MapDirect, MapLinear, MapShadow };
@@ -91,35 +101,19 @@ public:
return p.access->write(p.offset + addr, data);
}
void set_speed(bool fast) {
fastSpeed = fast ? 6 : 8;
}
virtual bool load_cart() { return false; }
virtual void unload_cart() {}
alwaysinline unsigned speed(unsigned addr) const {
if(addr & 0x408000) {
if(addr & 0x800000) return fastSpeed;
return 8;
}
if((addr + 0x6000) & 0x4000) return 8;
if((addr - 0x4000) & 0x7e00) return 6;
return 12;
}
virtual bool load_cart() = 0;
virtual void unload_cart() = 0;
virtual void power() = 0;
virtual void reset() = 0;
virtual void power() {}
virtual void reset() {}
Bus() {}
virtual ~Bus() {}
protected:
struct Page {
Memory *access;
unsigned offset;
} page[65536];
unsigned fastSpeed;
};
namespace memory {

View File

@@ -8,19 +8,16 @@ void sBus::map_cx4() {
void sBus::map_dsp1() {
switch(cartridge.dsp1_mapper()) {
case Cartridge::DSP1LoROM1MB: {
printf("sBus::map_dsp1 DSP1LoROM1MB\n");
map(MapDirect, 0x20, 0x3f, 0x8000, 0xffff, dsp1);
map(MapDirect, 0xa0, 0xbf, 0x8000, 0xffff, dsp1);
} break;
case Cartridge::DSP1LoROM2MB: {
printf("sBus::map_dsp1 DSP1LoROM2MB\n");
map(MapDirect, 0x60, 0x6f, 0x0000, 0x7fff, dsp1);
map(MapDirect, 0xe0, 0xef, 0x0000, 0x7fff, dsp1);
} break;
case Cartridge::DSP1HiROM: {
printf("sBus::map_dsp1 DSP1HiROM\n");
map(MapDirect, 0x00, 0x1f, 0x6000, 0x7fff, dsp1);
map(MapDirect, 0x80, 0x9f, 0x6000, 0x7fff, dsp1);
} break;
@@ -28,7 +25,6 @@ void sBus::map_dsp1() {
}
void sBus::map_dsp2() {
printf("sBus::map_dsp2\n");
map(MapDirect, 0x20, 0x3f, 0x6000, 0x6fff, dsp2);
map(MapDirect, 0x20, 0x3f, 0x8000, 0xbfff, dsp2);
map(MapDirect, 0xa0, 0xbf, 0x6000, 0x6fff, dsp2);
@@ -36,25 +32,21 @@ void sBus::map_dsp2() {
}
void sBus::map_dsp3() {
printf("sBus::map_dsp3\n");
map(MapDirect, 0x20, 0x3f, 0x8000, 0xffff, dsp3);
map(MapDirect, 0xa0, 0xbf, 0x8000, 0xffff, dsp3);
}
void sBus::map_dsp4() {
printf("sBus::map_dsp4\n");
map(MapDirect, 0x30, 0x3f, 0x8000, 0xffff, dsp4);
map(MapDirect, 0xb0, 0xbf, 0x8000, 0xffff, dsp4);
}
void sBus::map_obc1() {
printf("sBus::map_obc1\n");
map(MapDirect, 0x00, 0x3f, 0x6000, 0x7fff, obc1);
map(MapDirect, 0x80, 0xbf, 0x6000, 0x7fff, obc1);
}
void sBus::map_st010() {
printf("sBus::map_st010\n");
map(MapDirect, 0x68, 0x6f, 0x0000, 0x0fff, st010);
map(MapDirect, 0xe8, 0xef, 0x0000, 0x0fff, st010);
}

View File

@@ -3,14 +3,12 @@
void sBus::map_generic() {
switch(cartridge.mapper()) {
case Cartridge::LoROM: {
printf("sBus::map_generic Cartridge::LoROM\n");
map(MapLinear, 0x00, 0x7f, 0x8000, 0xffff, memory::cartrom);
map(MapLinear, 0x80, 0xff, 0x8000, 0xffff, memory::cartrom);
map_generic_sram();
} break;
case Cartridge::HiROM: {
printf("sBus::map_generic Cartridge::HiROM\n");
map(MapShadow, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom);
map(MapLinear, 0x40, 0x7f, 0x0000, 0xffff, memory::cartrom);
map(MapShadow, 0x80, 0xbf, 0x8000, 0xffff, memory::cartrom);
@@ -19,7 +17,6 @@ void sBus::map_generic() {
} break;
case Cartridge::ExLoROM: {
printf("sBus::map_generic Cartridge::ExLoROM\n");
map(MapLinear, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom);
map(MapLinear, 0x40, 0x7f, 0x0000, 0xffff, memory::cartrom);
map(MapLinear, 0x80, 0xbf, 0x8000, 0xffff, memory::cartrom);
@@ -28,7 +25,6 @@ void sBus::map_generic() {
} break;
case Cartridge::ExHiROM: {
printf("sBus::map_generic Cartridge::ExHiROM\n");
map(MapShadow, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom, 0x400000);
map(MapLinear, 0x40, 0x7f, 0x0000, 0xffff, memory::cartrom, 0x400000);
map(MapShadow, 0x80, 0xbf, 0x8000, 0xffff, memory::cartrom, 0x000000);
@@ -36,8 +32,11 @@ void sBus::map_generic() {
map_generic_sram();
} break;
case Cartridge::SA1ROM: {
//mapped via SA1Bus::init();
} break;
case Cartridge::SPC7110ROM: {
printf("sBus::map_generic Cartridge::SPC7110ROM\n");
map(MapDirect, 0x00, 0x00, 0x6000, 0x7fff, spc7110); //save RAM w/custom logic
map(MapShadow, 0x00, 0x0f, 0x8000, 0xffff, memory::cartrom); //program ROM
map(MapDirect, 0x30, 0x30, 0x6000, 0x7fff, spc7110); //save RAM w/custom logic
@@ -48,7 +47,6 @@ void sBus::map_generic() {
} break;
case Cartridge::BSXROM: {
printf("sBus::map_generic Cartridge::BSXROM\n");
//full map is dynamically mapped by:
//src/chip/bsx/bsx_cart.cpp : BSXCart::update_memory_map();
map(MapLinear, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom);
@@ -56,7 +54,6 @@ void sBus::map_generic() {
} break;
case Cartridge::BSCLoROM: {
printf("sBus::map_generic Cartridge::BSCLoROM\n");
map(MapLinear, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom, 0x000000);
map(MapLinear, 0x20, 0x3f, 0x8000, 0xffff, memory::cartrom, 0x100000);
map(MapLinear, 0x70, 0x7f, 0x0000, 0x7fff, memory::cartram, 0x000000);
@@ -67,7 +64,6 @@ void sBus::map_generic() {
} break;
case Cartridge::BSCHiROM: {
printf("sBus::map_generic Cartridge::BSCHiROM\n");
map(MapShadow, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom);
map(MapLinear, 0x20, 0x3f, 0x6000, 0x7fff, memory::cartram);
map(MapShadow, 0x20, 0x3f, 0x8000, 0xffff, bsxflash);
@@ -81,7 +77,6 @@ void sBus::map_generic() {
} break;
case Cartridge::STROM: {
printf("sBus::map_generic Cartridge::STROM\n");
map(MapLinear, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom);
map(MapLinear, 0x20, 0x3f, 0x8000, 0xffff, memory::stArom);
map(MapLinear, 0x40, 0x5f, 0x8000, 0xffff, memory::stBrom);
@@ -99,21 +94,15 @@ void sBus::map_generic() {
void sBus::map_generic_sram() {
if(memory::cartram.size() == 0 || memory::cartram.size() == -1U) { return; }
printf("sBus::map_generic_sram\n");
map(MapLinear, 0x20, 0x3f, 0x6000, 0x7fff, memory::cartram);
map(MapLinear, 0xa0, 0xbf, 0x6000, 0x7fff, memory::cartram);
//research shows only games with very large ROM/RAM sizes require MAD-1 memory mapping of SRAM
//otherwise, default to safer, larger SRAM address window
uint16 addr_hi = (memory::cartrom.size() > 0x200000 || memory::cartram.size() > 32 * 1024) ? 0x7fff : 0xffff;
printf("sBus::map_generic_sram cart_size=%x addr_hi=0x%x\n",memory::cartram.size(),addr_hi);
map(MapLinear, 0x70, 0x7f, 0x0000, addr_hi, memory::cartram);
if(cartridge.mapper() != Cartridge::LoROM){
printf("sBus::map_generic_sram done\n");
return;
}
if(cartridge.mapper() != Cartridge::LoROM) return;
map(MapLinear, 0xf0, 0xff, 0x0000, addr_hi, memory::cartram);
printf("sBus::map_generic_sram done\n");
}
#endif

View File

@@ -1,7 +1,7 @@
#include <../base.hpp>
#include <../chip/chip.hpp>
#include <../cart/cart.hpp>
#define SMEMORY_CPP
namespace SNES {
#include "mapper/system.cpp"
#include "mapper/generic.cpp"
@@ -9,12 +9,11 @@
void sBus::power() {
for(unsigned i = 0x2000; i <= 0x5fff; i++) memory::mmio.map(i, memory::mmio_unmapped);
for(unsigned i = 0; i < memory::wram.size(); i++) memory::wram[i] = snes.config.cpu.wram_init_value;
for(unsigned i = 0; i < memory::wram.size(); i++) memory::wram[i] = config.cpu.wram_init_value;
reset();
}
void sBus::reset() {
set_speed(false);
}
bool sBus::load_cart() {
@@ -43,3 +42,6 @@ sBus::sBus() {
sBus::~sBus() {
}
};