o switch to v46
This commit is contained in:
@@ -1,5 +1,7 @@
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#include <../base.hpp>
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#define MEMORY_CPP
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namespace SNES {
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namespace memory {
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MMIOAccess mmio;
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@@ -24,18 +26,11 @@ void MMIOAccess::map(unsigned addr, MMIO &access) {
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mmio[(addr - 0x2000) & 0x3fff] = &access;
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}
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MMIO* MMIOAccess::get(unsigned addr) {
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return mmio[(addr - 0x2000) & 0x3fff];
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}
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uint8 MMIOAccess::read(unsigned addr) {
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printf("MMIOAccess::read 0x%x\n",addr);
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return mmio[(addr - 0x2000) & 0x3fff]->mmio_read(addr);
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return mmio[(addr - 0x2000) & 0x3fff]->mmio_read(addr);
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}
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void MMIOAccess::write(unsigned addr, uint8 data) {
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printf("MMIOAccess::write 0x%x %x\n",addr,data);
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mmio[(addr - 0x2000) & 0x3fff]->mmio_write(addr, data);
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}
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@@ -70,7 +65,6 @@ void Bus::map(
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) {
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assert(bank_lo <= bank_hi);
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assert(addr_lo <= addr_hi);
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if(access.size() == -1U) return;
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uint8 page_lo = addr_lo >> 8;
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@@ -79,8 +73,6 @@ void Bus::map(
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switch(mode) {
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case MapDirect: {
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printf("Bus::map MapDirect bank_lo=0x%02x bank_hi=0x%02x addr_lo=0x%04x addr_hi=0x%04x\n",
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bank_lo,bank_hi,addr_lo,addr_hi);
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for(unsigned bank = bank_lo; bank <= bank_hi; bank++) {
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for(unsigned page = page_lo; page <= page_hi; page++) {
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map((bank << 16) + (page << 8), access, (bank << 16) + (page << 8));
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@@ -89,8 +81,6 @@ void Bus::map(
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} break;
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case MapLinear: {
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printf("Bus::map MapLinear bank_lo=0x%02x bank_hi=0x%02x addr_lo=0x%04x addr_hi=0x%04x\n",
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bank_lo,bank_hi,addr_lo,addr_hi);
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for(unsigned bank = bank_lo; bank <= bank_hi; bank++) {
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for(unsigned page = page_lo; page <= page_hi; page++) {
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map((bank << 16) + (page << 8), access, mirror(offset + index, access.size()));
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@@ -101,8 +91,6 @@ void Bus::map(
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} break;
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case MapShadow: {
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printf("Bus::map MapShadow bank_lo=0x%02x bank_hi=0x%02x addr_lo=0x%04x addr_hi=0x%04x\n",
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bank_lo,bank_hi,addr_lo,addr_hi);
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for(unsigned bank = bank_lo; bank <= bank_hi; bank++) {
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index += page_lo * 256;
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if(size) index %= size;
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@@ -119,3 +107,6 @@ void Bus::map(
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} break;
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}
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}
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};
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@@ -20,52 +20,62 @@ struct UnmappedMMIO : MMIO {
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};
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struct StaticRAM : Memory {
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uint8* handle() { return data; }
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unsigned size() const { return datasize; }
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uint8* data() { return data_; }
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unsigned size() const { return size_; }
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inline uint8 read(unsigned addr) { return data[addr]; }
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inline void write(unsigned addr, uint8 n) { data[addr] = n; }
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inline uint8& operator[](unsigned addr) { return data[addr]; }
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inline const uint8& operator[](unsigned addr) const { return data[addr]; }
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inline uint8 read(unsigned addr) { return data_[addr]; }
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inline void write(unsigned addr, uint8 n) { data_[addr] = n; }
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inline uint8& operator[](unsigned addr) { return data_[addr]; }
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inline const uint8& operator[](unsigned addr) const { return data_[addr]; }
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StaticRAM(unsigned n) : datasize(n) { data = new uint8[datasize]; }
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~StaticRAM() { delete[] data; }
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StaticRAM(unsigned n) : size_(n) { data_ = new uint8[size_]; }
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~StaticRAM() { delete[] data_; }
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private:
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uint8 *data;
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unsigned datasize;
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uint8 *data_;
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unsigned size_;
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};
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struct MappedRAM : Memory {
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void map(uint8 *source, unsigned length) { data = source; datasize = length > 0 ? length : -1U; }
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void write_protect(bool status) { write_protection = status; }
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uint8* handle() { return data; }
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unsigned size() const { return datasize; }
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struct MappedRAM : Memory {
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void reset() {
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if(data_) {
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delete[] data_;
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data_ = 0;
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}
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size_ = -1U;
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write_protect_ = false;
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}
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inline uint8 read(unsigned addr) { return data[addr]; }
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inline void write(unsigned addr, uint8 n) { if(!write_protection) data[addr] = n; }
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inline const uint8& operator[](unsigned addr) const { return data[addr]; }
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void map(uint8 *source, unsigned length) {
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reset();
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data_ = source;
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size_ = data_ && length > 0 ? length : -1U;
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}
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MappedRAM() : data(0), datasize(0), write_protection(false) {}
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void write_protect(bool status) { write_protect_ = status; }
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uint8* data() { return data_; }
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unsigned size() const { return size_; }
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inline uint8 read(unsigned addr) { return data_[addr]; }
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inline void write(unsigned addr, uint8 n) { if(!write_protect_) data_[addr] = n; }
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inline const uint8 operator[](unsigned addr) const { return data_[addr]; }
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MappedRAM() : data_(0), size_(-1U), write_protect_(false) {}
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private:
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uint8 *data;
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unsigned datasize;
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bool write_protection;
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uint8 *data_;
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unsigned size_;
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bool write_protect_;
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};
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struct MMIOAccess : Memory {
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void map(unsigned addr, MMIO &access);
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MMIO* get(unsigned addr);
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uint8 read(unsigned addr);
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void write(unsigned addr, uint8 data);
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private:
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MMIO *mmio[0x4000];
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};
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class Bus {
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public:
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struct Bus {
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unsigned mirror(unsigned addr, unsigned size);
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void map(unsigned addr, Memory &access, unsigned offset);
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enum MapMode { MapDirect, MapLinear, MapShadow };
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@@ -91,35 +101,19 @@ public:
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return p.access->write(p.offset + addr, data);
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}
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void set_speed(bool fast) {
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fastSpeed = fast ? 6 : 8;
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}
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virtual bool load_cart() { return false; }
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virtual void unload_cart() {}
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alwaysinline unsigned speed(unsigned addr) const {
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if(addr & 0x408000) {
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if(addr & 0x800000) return fastSpeed;
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return 8;
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}
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if((addr + 0x6000) & 0x4000) return 8;
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if((addr - 0x4000) & 0x7e00) return 6;
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return 12;
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}
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virtual bool load_cart() = 0;
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virtual void unload_cart() = 0;
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virtual void power() = 0;
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virtual void reset() = 0;
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virtual void power() {}
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virtual void reset() {}
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Bus() {}
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virtual ~Bus() {}
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protected:
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struct Page {
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Memory *access;
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unsigned offset;
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} page[65536];
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unsigned fastSpeed;
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};
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namespace memory {
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@@ -8,19 +8,16 @@ void sBus::map_cx4() {
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void sBus::map_dsp1() {
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switch(cartridge.dsp1_mapper()) {
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case Cartridge::DSP1LoROM1MB: {
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printf("sBus::map_dsp1 DSP1LoROM1MB\n");
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map(MapDirect, 0x20, 0x3f, 0x8000, 0xffff, dsp1);
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map(MapDirect, 0xa0, 0xbf, 0x8000, 0xffff, dsp1);
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} break;
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case Cartridge::DSP1LoROM2MB: {
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printf("sBus::map_dsp1 DSP1LoROM2MB\n");
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map(MapDirect, 0x60, 0x6f, 0x0000, 0x7fff, dsp1);
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map(MapDirect, 0xe0, 0xef, 0x0000, 0x7fff, dsp1);
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} break;
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case Cartridge::DSP1HiROM: {
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printf("sBus::map_dsp1 DSP1HiROM\n");
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map(MapDirect, 0x00, 0x1f, 0x6000, 0x7fff, dsp1);
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map(MapDirect, 0x80, 0x9f, 0x6000, 0x7fff, dsp1);
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} break;
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@@ -28,7 +25,6 @@ void sBus::map_dsp1() {
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}
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void sBus::map_dsp2() {
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printf("sBus::map_dsp2\n");
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map(MapDirect, 0x20, 0x3f, 0x6000, 0x6fff, dsp2);
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map(MapDirect, 0x20, 0x3f, 0x8000, 0xbfff, dsp2);
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map(MapDirect, 0xa0, 0xbf, 0x6000, 0x6fff, dsp2);
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@@ -36,25 +32,21 @@ void sBus::map_dsp2() {
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}
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void sBus::map_dsp3() {
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printf("sBus::map_dsp3\n");
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map(MapDirect, 0x20, 0x3f, 0x8000, 0xffff, dsp3);
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map(MapDirect, 0xa0, 0xbf, 0x8000, 0xffff, dsp3);
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}
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void sBus::map_dsp4() {
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printf("sBus::map_dsp4\n");
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map(MapDirect, 0x30, 0x3f, 0x8000, 0xffff, dsp4);
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map(MapDirect, 0xb0, 0xbf, 0x8000, 0xffff, dsp4);
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}
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void sBus::map_obc1() {
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printf("sBus::map_obc1\n");
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map(MapDirect, 0x00, 0x3f, 0x6000, 0x7fff, obc1);
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map(MapDirect, 0x80, 0xbf, 0x6000, 0x7fff, obc1);
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}
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void sBus::map_st010() {
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printf("sBus::map_st010\n");
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map(MapDirect, 0x68, 0x6f, 0x0000, 0x0fff, st010);
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map(MapDirect, 0xe8, 0xef, 0x0000, 0x0fff, st010);
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}
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@@ -3,14 +3,12 @@
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void sBus::map_generic() {
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switch(cartridge.mapper()) {
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case Cartridge::LoROM: {
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printf("sBus::map_generic Cartridge::LoROM\n");
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map(MapLinear, 0x00, 0x7f, 0x8000, 0xffff, memory::cartrom);
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map(MapLinear, 0x80, 0xff, 0x8000, 0xffff, memory::cartrom);
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map_generic_sram();
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} break;
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case Cartridge::HiROM: {
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printf("sBus::map_generic Cartridge::HiROM\n");
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map(MapShadow, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom);
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map(MapLinear, 0x40, 0x7f, 0x0000, 0xffff, memory::cartrom);
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map(MapShadow, 0x80, 0xbf, 0x8000, 0xffff, memory::cartrom);
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@@ -19,7 +17,6 @@ void sBus::map_generic() {
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} break;
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case Cartridge::ExLoROM: {
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printf("sBus::map_generic Cartridge::ExLoROM\n");
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map(MapLinear, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom);
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map(MapLinear, 0x40, 0x7f, 0x0000, 0xffff, memory::cartrom);
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map(MapLinear, 0x80, 0xbf, 0x8000, 0xffff, memory::cartrom);
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@@ -28,7 +25,6 @@ void sBus::map_generic() {
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} break;
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case Cartridge::ExHiROM: {
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printf("sBus::map_generic Cartridge::ExHiROM\n");
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map(MapShadow, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom, 0x400000);
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map(MapLinear, 0x40, 0x7f, 0x0000, 0xffff, memory::cartrom, 0x400000);
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map(MapShadow, 0x80, 0xbf, 0x8000, 0xffff, memory::cartrom, 0x000000);
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@@ -36,8 +32,11 @@ void sBus::map_generic() {
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map_generic_sram();
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} break;
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case Cartridge::SA1ROM: {
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//mapped via SA1Bus::init();
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} break;
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case Cartridge::SPC7110ROM: {
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printf("sBus::map_generic Cartridge::SPC7110ROM\n");
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map(MapDirect, 0x00, 0x00, 0x6000, 0x7fff, spc7110); //save RAM w/custom logic
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map(MapShadow, 0x00, 0x0f, 0x8000, 0xffff, memory::cartrom); //program ROM
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map(MapDirect, 0x30, 0x30, 0x6000, 0x7fff, spc7110); //save RAM w/custom logic
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@@ -48,7 +47,6 @@ void sBus::map_generic() {
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} break;
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case Cartridge::BSXROM: {
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printf("sBus::map_generic Cartridge::BSXROM\n");
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//full map is dynamically mapped by:
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//src/chip/bsx/bsx_cart.cpp : BSXCart::update_memory_map();
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map(MapLinear, 0x00, 0x3f, 0x8000, 0xffff, memory::cartrom);
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@@ -56,7 +54,6 @@ void sBus::map_generic() {
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} break;
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case Cartridge::BSCLoROM: {
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printf("sBus::map_generic Cartridge::BSCLoROM\n");
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map(MapLinear, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom, 0x000000);
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map(MapLinear, 0x20, 0x3f, 0x8000, 0xffff, memory::cartrom, 0x100000);
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map(MapLinear, 0x70, 0x7f, 0x0000, 0x7fff, memory::cartram, 0x000000);
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@@ -67,7 +64,6 @@ void sBus::map_generic() {
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} break;
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case Cartridge::BSCHiROM: {
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printf("sBus::map_generic Cartridge::BSCHiROM\n");
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map(MapShadow, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom);
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map(MapLinear, 0x20, 0x3f, 0x6000, 0x7fff, memory::cartram);
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map(MapShadow, 0x20, 0x3f, 0x8000, 0xffff, bsxflash);
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@@ -81,7 +77,6 @@ void sBus::map_generic() {
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} break;
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case Cartridge::STROM: {
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printf("sBus::map_generic Cartridge::STROM\n");
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map(MapLinear, 0x00, 0x1f, 0x8000, 0xffff, memory::cartrom);
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map(MapLinear, 0x20, 0x3f, 0x8000, 0xffff, memory::stArom);
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map(MapLinear, 0x40, 0x5f, 0x8000, 0xffff, memory::stBrom);
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@@ -99,21 +94,15 @@ void sBus::map_generic() {
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void sBus::map_generic_sram() {
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if(memory::cartram.size() == 0 || memory::cartram.size() == -1U) { return; }
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printf("sBus::map_generic_sram\n");
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map(MapLinear, 0x20, 0x3f, 0x6000, 0x7fff, memory::cartram);
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map(MapLinear, 0xa0, 0xbf, 0x6000, 0x7fff, memory::cartram);
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//research shows only games with very large ROM/RAM sizes require MAD-1 memory mapping of SRAM
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//otherwise, default to safer, larger SRAM address window
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uint16 addr_hi = (memory::cartrom.size() > 0x200000 || memory::cartram.size() > 32 * 1024) ? 0x7fff : 0xffff;
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printf("sBus::map_generic_sram cart_size=%x addr_hi=0x%x\n",memory::cartram.size(),addr_hi);
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map(MapLinear, 0x70, 0x7f, 0x0000, addr_hi, memory::cartram);
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if(cartridge.mapper() != Cartridge::LoROM){
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printf("sBus::map_generic_sram done\n");
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return;
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}
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if(cartridge.mapper() != Cartridge::LoROM) return;
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map(MapLinear, 0xf0, 0xff, 0x0000, addr_hi, memory::cartram);
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printf("sBus::map_generic_sram done\n");
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}
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#endif
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@@ -1,7 +1,7 @@
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#include <../base.hpp>
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#include <../chip/chip.hpp>
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#include <../cart/cart.hpp>
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#define SMEMORY_CPP
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namespace SNES {
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#include "mapper/system.cpp"
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#include "mapper/generic.cpp"
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@@ -9,12 +9,11 @@
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void sBus::power() {
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for(unsigned i = 0x2000; i <= 0x5fff; i++) memory::mmio.map(i, memory::mmio_unmapped);
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for(unsigned i = 0; i < memory::wram.size(); i++) memory::wram[i] = snes.config.cpu.wram_init_value;
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for(unsigned i = 0; i < memory::wram.size(); i++) memory::wram[i] = config.cpu.wram_init_value;
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reset();
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}
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void sBus::reset() {
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set_speed(false);
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}
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bool sBus::load_cart() {
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@@ -43,3 +42,6 @@ sBus::sBus() {
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sBus::~sBus() {
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}
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};
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Reference in New Issue
Block a user