add timer and more debug code

This commit is contained in:
David Voswinkel 2009-07-05 10:49:32 +02:00
parent fef90c7f6e
commit c55a66f90d
5 changed files with 85 additions and 43 deletions

View File

@ -8,7 +8,7 @@ AVRDUDE = avrdude -c usbasp -p $(DEVICE)
CFLAGS = -Iusbdrv -I. -DDEBUG_LEVEL=0 CFLAGS = -Iusbdrv -I. -DDEBUG_LEVEL=0
#-std=gnu99 #-std=gnu99
OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o main.o usb_bulk.o uart.o fifo.o sram.o crc.o debug.o dump.o OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o main.o usb_bulk.o uart.o fifo.o sram.o crc.o debug.o dump.o timer.o
COMPILE = avr-gcc -Wall -Os -DF_CPU=$(F_CPU) $(CFLAGS) -mmcu=$(DEVICE) COMPILE = avr-gcc -Wall -Os -DF_CPU=$(F_CPU) $(CFLAGS) -mmcu=$(DEVICE)

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@ -15,6 +15,7 @@
#include "dump.h" #include "dump.h"
#include "crc.h" #include "crc.h"
#include "usb_bulk.h" #include "usb_bulk.h"
#include "timer.h"
extern FILE uart_stdout; extern FILE uart_stdout;
@ -109,6 +110,10 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
req_bank_size = (1 << rq->wValue.word) & 0xffff; req_bank_size = (1 << rq->wValue.word) & 0xffff;
sync_errors = 0; sync_errors = 0;
debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: bank_size=0x%x\n", req_bank_size); debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: bank_size=0x%x\n", req_bank_size);
if (req_addr == 0x000000){
debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: timer_start\n");
timer_start();
}
/* /*
* ------------------------------------------------------------------------- * -------------------------------------------------------------------------
*/ */
@ -119,12 +124,14 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
req_addr = req_addr << 16; req_addr = req_addr << 16;
req_addr = req_addr | rq->wIndex.word; req_addr = req_addr | rq->wIndex.word;
sram_bulk_write_start(req_addr); sram_bulk_write_start(req_addr);
//debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx \n",req_bank,req_addr);
rx_remaining = rq->wLength.word; rx_remaining = rq->wLength.word;
if (req_addr && req_addr % req_bank_size == 0) { if (req_addr && req_addr % req_bank_size == 0) {
debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr= 0x%08lx \n", debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr= 0x%08lx time=%i\n",
req_bank, req_addr); req_bank, req_addr,timer_stop());
req_bank++; req_bank++;
timer_start();
} }
ret_len = USB_MAX_TRANS; ret_len = USB_MAX_TRANS;
@ -293,7 +300,7 @@ int main(void)
system_init(); system_init();
printf("Sytem Init\n"); printf("Sytem Init\n");
avr_bus_active();
usbInit(); usbInit();
printf("USB Init\n"); printf("USB Init\n");
usbDeviceDisconnect(); /* enforce re-enumeration, do this while usbDeviceDisconnect(); /* enforce re-enumeration, do this while
@ -311,38 +318,62 @@ int main(void)
led_on(); led_on();
usbDeviceConnect(); usbDeviceConnect();
printf("USB connect\n"); printf("USB connect\n");
avr_bus_active();
printf("Activate AVR bus\n");
printf("IRQ off\n");
snes_irq_lo();
snes_irq_off();
printf("Set Snes lowrom\n");
snes_lorom();
printf("Disable snes WR\n");
snes_wr_disable();
sei(); sei();
printf("USB poll\n"); printf("USB poll\n");
while (req_state != REQ_STATUS_BOOT){ while (req_state != REQ_STATUS_BOOT){
usbPoll(); usbPoll();
} }
printf("USB poll done\n"); printf("USB poll done\n");
usbDeviceDisconnect(); usbDeviceDisconnect();
printf("USB disconnect\n"); printf("USB disconnect\n");
crc_check_bulk_memory(0x000000, 0x80000); crc_check_bulk_memory(0x000000, 0x80000);
#if 0 //dump_memory(0x7f00,0x8000);
dump_memory(0x0000,0x0080);
printf("crc=0x%x\n",crc_check_bulk_memory(0x000000, 0x80));
#endif
dump_memory(0x7f00,0x8000); printf("IRQ off\n");
snes_irq_lo();
snes_irq_off();
printf("Set Snes lowrom\n");
snes_lorom();
printf("Disable snes WR\n"); printf("Disable snes WR\n");
snes_wr_disable(); snes_wr_disable();
printf("Use Snes lowrom\n");
snes_lorom();
printf("IRQ off\n");
snes_irq_off();
printf("Activate Snes bus\n");
snes_bus_active(); snes_bus_active();
printf("Activate Snes bus\n");
#if 0
i = 50;
while (--i) { /* fake USB disconnect for > 250 ms */
_delay_ms(100);
printf(".");
}
printf("\n");
avr_bus_active();
printf("Activate AVR bus\n");
crc_check_bulk_memory(0x000000, 0x80000);
#endif
while(1); while(1);
return 0; return 0;
} }

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@ -28,13 +28,15 @@ void system_init(void)
DDRC &= ~ (1 << SNES_WR_PIN); DDRC &= ~ (1 << SNES_WR_PIN);
PORTC &= ~((1 << AVR_ADDR_LATCH_PIN) PORTC &= ~((1 << AVR_ADDR_LATCH_PIN)
| (1 << AVR_ADDR_SCK_PIN)); | (1 << AVR_ADDR_SCK_PIN)
| (1 << SNES_WR_PIN));
PORTC |= ( (1 << AVR_ADDR_DOWN_PIN) PORTC |= ( (1 << AVR_ADDR_DOWN_PIN)
| (1 << AVR_ADDR_UP_PIN) | (1 << AVR_ADDR_UP_PIN)
| (1 << AVR_ADDR_LOAD_PIN) | (1 << AVR_ADDR_LOAD_PIN));
| (1 << SNES_WR_PIN));
//| (1 << SNES_WR_PIN));
/*-------------------------------------------------*/ /*-------------------------------------------------*/
DDRB |= ( (1 << AVR_RD_PIN) DDRB |= ( (1 << AVR_RD_PIN)
@ -42,10 +44,12 @@ void system_init(void)
| (1 << AVR_CS_PIN) | (1 << AVR_CS_PIN)
| (1 << SNES_IRQ_PIN)); | (1 << SNES_IRQ_PIN));
PORTB |= ( (1 << AVR_RD_PIN) PORTB |= ( (1 << AVR_RD_PIN)
| (1 << AVR_WR_PIN) | (1 << AVR_WR_PIN)
| (1 << AVR_CS_PIN) | (1 << AVR_CS_PIN)
| (1 << SNES_IRQ_PIN)); | (1 << SNES_IRQ_PIN));
/*-------------------------------------------------*/ /*-------------------------------------------------*/

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@ -56,8 +56,12 @@
#define SNES_IRQ_DIR DDRB #define SNES_IRQ_DIR DDRB
#define SNES_IRQ_PIN PB3 #define SNES_IRQ_PIN PB3
#define snes_irq_off() (SNES_IRQ_PORT |= (1 << SNES_IRQ_PIN))
#define snes_irq_on() (SNES_IRQ_PORT &= ~(1 << SNES_IRQ_PIN)) #define snes_irq_on() (SNES_IRQ_DIR |= (1 << SNES_IRQ_PIN))
#define snes_irq_hi() (SNES_IRQ_PORT |= (1 << SNES_IRQ_PIN))
#define snes_irq_off() (SNES_IRQ_DIR &= ~(1 << SNES_IRQ_PIN))
#define snes_irq_lo() (SNES_IRQ_PORT &= ~(1 << SNES_IRQ_PIN))
@ -120,9 +124,11 @@
#define AVR_SNES_SW_PIN PD5 #define AVR_SNES_SW_PIN PD5
#define avr_bus_active() ((AVR_SNES_SW_PORT &= ~(1 << AVR_SNES_SW_PIN)),\ #define avr_bus_active() ((AVR_SNES_SW_PORT &= ~(1 << AVR_SNES_SW_PIN)),\
(HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN))) (HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN)),\
(AVR_CS_DIR |= (1 << AVR_CS_PIN)))
#define snes_bus_active() (AVR_SNES_SW_PORT |= (1 << AVR_SNES_SW_PIN)) #define snes_bus_active() ((AVR_SNES_SW_PORT |= (1 << AVR_SNES_SW_PIN)),\
(AVR_CS_DIR &= ~(1 << AVR_CS_PIN)))
#define HI_LOROM_SW_PORT PORTD #define HI_LOROM_SW_PORT PORTD
#define HI_LOROM_SW_DIR DDRD #define HI_LOROM_SW_DIR DDRD
@ -136,6 +142,7 @@
#define SNES_WR_EN_PIN PD7 #define SNES_WR_EN_PIN PD7
#define snes_wr_disable() (SNES_WR_EN_PORT &= ~(1 << SNES_WR_EN_PIN)) #define snes_wr_disable() (SNES_WR_EN_PORT &= ~(1 << SNES_WR_EN_PIN))
#define snes_wr_enable() (SNES_WR_EN_PORT |= (1 << SNES_WR_EN_PIN)) #define snes_wr_enable() (SNES_WR_EN_PORT |= (1 << SNES_WR_EN_PIN))

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@ -1,6 +1,6 @@
#include <io.h>
#include <interrupt.h> #include <avr/io.h>
#include <signal.h> #include <avr/interrupt.h> /* for sei() */
#ifndef OCR1A #ifndef OCR1A
@ -12,26 +12,26 @@
#endif #endif
//#define XTAL 11059201L // nominal value //#define XTAL 11059201L // nominal value
#define XTAL 20000000L #define XTAL 20000000UL
#define DEBOUNCE 256L // debounce clock (256Hz = 4msec) #define DEBOUNCE 500UL // debounce clock (256Hz = 4msec)
#define uint8_t unsigned char #define uint8_t unsigned char
#define uint unsigned int #define uint unsigned int
uint8_t prescaler; uint16_t prescaler;
uint8_t volatile second; // count seconds uint16_t volatile second; // count seconds
SIGNAL (SIG_OUTPUT_COMPARE1A) ISR (SIG_OUTPUT_COMPARE1A)
{ {
#if XTAL % DEBOUNCE // bei rest #if XTAL % DEBOUNCE // bei rest
OCR1A = XTAL / DEBOUNCE - 1; // compare DEBOUNCE - 1 times OCR1A = 20000000UL / DEBOUNCE - 1; // compare DEBOUNCE - 1 times
#endif #endif
if( --prescaler == 0 ){ if( --prescaler == 0 ){
prescaler = (uint8_t)DEBOUNCE; prescaler = (uint16_t)DEBOUNCE;
second++; // exact one second over second++; // exact one second over
#if XTAL % DEBOUNCE // handle remainder #if XTAL % DEBOUNCE // handle remainder
OCR1A = XTAL / DEBOUNCE + XTAL % DEBOUNCE - 1; // compare once per second OCR1A = XTAL / DEBOUNCE + XTAL % DEBOUNCE - 1; // compare once per second
@ -39,24 +39,24 @@ SIGNAL (SIG_OUTPUT_COMPARE1A)
} }
} }
void timer_start( void )
uint16_t timer_start( void )
{ {
TCCR1B = (1<<WGM12) | (1<<CS10); // divide by 1 TCCR1B = (1<<WGM12) | (1<<CS10); // divide by 1
// clear on compare // clear on compare
OCR1A = XTAL / DEBOUNCE - 1; // Output Compare Register OCR1A = XTAL / DEBOUNCE - 1UL; // Output Compare Register
TCNT1 = 0; // Timmer startet mit 0 TCNT1 = 0; // Timmer startet mit 0
second = 0; second = 0;
prescaler = (uint8_t)DEBOUNCE; //software teiler prescaler = (uint16_t)DEBOUNCE; //software teiler
TIMSK = 1<<OCIE1A; // beim Vergleichswertes Compare Match TIMSK1 = 1<<OCIE1A; // beim Vergleichswertes Compare Match
// Interrupt (SIG_OUTPUT_COMPARE1A) // Interrupt (SIG_OUTPUT_COMPARE1A)
sei(); sei();
} }
uint16_t timer_stop(void) uint16_t timer_stop(void)
{ {
cli(): //cli();
return second return second;
} }