Compare commits
1 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
|
ac85195bb8 |
@@ -30,7 +30,7 @@ SIZE = avr-size
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ifeq ($(DEBUG),1)
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LDFLAGS = -Wl,-u,vfprintf -lprintf_flt
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CFLAGS = -Iusbdrv -I. -DDEBUG_LEVEL=0
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OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o main.o usb_bulk.o uart.o fifo.o sram.o crc.o debug.o dump.o timer.o watchdog.o rle.c loader.o info.o shared_memory.o mmc.o fat.o
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OBJECTS = usbdrv/usbdrv.o usbdrv/usbdrvasm.o usbdrv/oddebug.o main.o usb_bulk.o uart.o fifo.o sram.o crc.o debug.o dump.o timer.o watchdog.o huffman-decode.o rle.c loader.o info.o shared_memory.o
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else
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LDFLAGS = -Wl,-u
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CFLAGS = -Iusbdrv -I. -DDEBUG_LEVEL=0 -DNO_DEBUG -DNO_INFO
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@@ -1,192 +0,0 @@
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#include "fat.h"
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uint8_t cluster_size;
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uint16_t fat_offset;
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uint16_t cluster_offset;
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uint16_t volume_boot_record_addr;
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void fat_init(uint8_t * Buffer)
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{
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struct BootSec *bootp;
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mmc_read_sector(MASTER_BOOT_RECORD, Buffer);
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if (Buffer[510] == 0x55 && Buffer[511] == 0xAA) {
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FAT_DEBUG("MBR Signatur found!\r\n");
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}
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else {
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FAT_DEBUG("MBR Signatur not found!\r\n");
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while (1);
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}
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volume_boot_record_addr = Buffer[VBR_ADDR] + (Buffer[VBR_ADDR + 1] << 8);
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mmc_read_sector(volume_boot_record_addr, Buffer);
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if (Buffer[510] == 0x55 && Buffer[511] == 0xAA) {
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FAT_DEBUG("VBR Signatur found!\r\n");
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}
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else {
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FAT_DEBUG("VBR Signatur not found!\r\n");
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volume_boot_record_addr = MASTER_BOOT_RECORD;
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mmc_read_sector(MASTER_BOOT_RECORD, Buffer);
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}
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bootp = (struct BootSec *) Buffer;
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cluster_size = bootp->BPB_SecPerClus;
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fat_offset = bootp->BPB_RsvdSecCnt;
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cluster_offset = ((bootp->BPB_BytesPerSec * 32) / BlockSize);
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cluster_offset += fat_root_dir_addr(Buffer);
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}
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uint16_t fat_root_dir_addr(uint8_t * Buffer)
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{
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struct BootSec *bootp;
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uint16_t FirstRootDirSecNum;
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mmc_read_sector(volume_boot_record_addr, Buffer);
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bootp = (struct BootSec *) Buffer;
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FirstRootDirSecNum = (bootp->BPB_RsvdSecCnt +
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(bootp->BPB_NumFATs * bootp->BPB_FATSz16));
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FirstRootDirSecNum += volume_boot_record_addr;
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return (FirstRootDirSecNum);
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}
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uint16_t fat_read_dir_ent(uint16_t dir_cluster,
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uint8_t Entry_Count,
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uint32_t * Size,
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uint8_t * Dir_Attrib, uint8_t * Buffer)
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{
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uint8_t *pointer;
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uint16_t TMP_Entry_Count = 0;
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uint32_t Block = 0;
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struct DirEntry *dir;
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uint16_t blk;
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uint16_t a;
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uint8_t b;
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pointer = Buffer;
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if (dir_cluster == 0) {
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Block = fat_root_dir_addr(Buffer);
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}
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else {
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fat_load(dir_cluster, &Block, Buffer);
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Block = ((Block - 2) * cluster_size) + cluster_offset;
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}
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for (blk = Block;; blk++) {
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mmc_read_sector(blk, Buffer);
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for (a = 0; a < BlockSize; a = a + 32) {
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dir = (struct DirEntry *) &Buffer[a];
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if (dir->DIR_Name[0] == 0) {
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return (0xFFFF);
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}
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if ((dir->DIR_Attr != ATTR_LONG_NAME) &&
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(dir->DIR_Name[0] != DIR_ENTRY_IS_FREE)) {
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if (TMP_Entry_Count == Entry_Count) {
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for (b = 0; b < 11; b++) {
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if (dir->DIR_Name[b] != SPACE) {
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if (b == 8) {
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*pointer++ = '.';
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}
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*pointer++ = dir->DIR_Name[b];
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}
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}
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*pointer++ = '\0';
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*Dir_Attrib = dir->DIR_Attr;
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*Size = dir->DIR_FileSize;
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dir_cluster = dir->DIR_FstClusLO;
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return (dir_cluster);
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}
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TMP_Entry_Count++;
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}
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}
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}
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return (0xFFFF);
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}
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void fat_load(uint16_t Cluster, uint32_t * Block, uint8_t * TMP_Buffer)
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{
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uint16_t FAT_Block_Store = 0;
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uint16_t FAT_Byte_Addresse;
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uint16_t FAT_Block_Addresse;
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uint16_t a;
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for (a = 0;; a++) {
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if (a == *Block) {
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*Block = (0x0000FFFF & Cluster);
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return;
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}
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if (Cluster == 0xFFFF) {
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break;
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}
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FAT_Byte_Addresse = (Cluster * 2) % BlockSize;
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FAT_Block_Addresse =
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((Cluster * 2) / BlockSize) + volume_boot_record_addr + fat_offset;
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if (FAT_Block_Addresse != FAT_Block_Store) {
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FAT_Block_Store = FAT_Block_Addresse;
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mmc_read_sector(FAT_Block_Addresse, TMP_Buffer);
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}
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Cluster =
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(TMP_Buffer[FAT_Byte_Addresse + 1] << 8) +
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TMP_Buffer[FAT_Byte_Addresse];
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}
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return;
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}
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void fat_read_file(uint16_t Cluster, uint8_t * Buffer, uint32_t BlockCount)
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{
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uint32_t Block = (BlockCount / cluster_size);
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fat_load(Cluster, &Block, Buffer);
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Block = ((Block - 2) * cluster_size) + cluster_offset;
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Block += (BlockCount % cluster_size);
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mmc_read_sector(Block, Buffer);
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return;
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}
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void fat_write_file(uint16_t cluster, uint8_t * buffer, uint32_t blockCount)
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{
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uint8_t tmp_buffer[513];
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uint32_t block = (blockCount / cluster_size);
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fat_load(cluster, &block, tmp_buffer);
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block = ((block - 2) * cluster_size) + cluster_offset;
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block += (blockCount % cluster_size);
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mmc_write_sector(block, buffer);
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return;
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}
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uint8_t fat_search_file(uint8_t * File_Name,
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uint16_t * Cluster,
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uint32_t * Size, uint8_t * Dir_Attrib, uint8_t * Buffer)
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{
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uint16_t Dir_Cluster_Store = *Cluster;
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uint8_t a;
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for (a = 0; a < 100; a++) {
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*Cluster =
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fat_read_dir_ent(Dir_Cluster_Store, a, Size, Dir_Attrib, Buffer);
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if (*Cluster == 0xffff) {
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return (0);
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}
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if (strcasecmp((char *) File_Name, (char *) Buffer) == 0) {
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return (1);
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}
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}
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return (2);
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}
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@@ -1,103 +0,0 @@
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/*
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*/
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#ifndef _FAT_H_
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#define _FAT_H_
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#include <string.h>
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#include "mmc.h"
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#include "uart.h"
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#define FAT_DEBUG uart_puts
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extern uint16_t fat_root_dir_addr(uint8_t *);
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extern uint16_t fat_read_dir_ent(uint16_t, uint8_t,
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uint32_t *, uint8_t *, uint8_t *);
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extern void fat_load(uint16_t, uint32_t *, uint8_t *);
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extern void fat_read_file(uint16_t, uint8_t *, uint32_t);
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extern void fat_write_file(uint16_t, uint8_t *, uint32_t);
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extern void fat_init(uint8_t * Buffer);
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extern uint8_t fat_search_file(uint8_t *, uint16_t *,
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uint32_t *, uint8_t *, uint8_t *);
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#define BlockSize 512
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#define MASTER_BOOT_RECORD 0
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#define VBR_ADDR 0x1C6
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#define SPACE 0x20
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#define DIR_ENTRY_IS_FREE 0xE5
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#define FIRST_LONG_ENTRY 0x01
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#define SECOND_LONG_ENTRY 0x42
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#define ATTR_LONG_NAME 0x0F
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#define ATTR_READ_ONLY 0x01
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#define ATTR_HIDDEN 0x02
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#define ATTR_SYSTEM 0x04
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#define ATTR_VOLUME_ID 0x08
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#define ATTR_DIRECTORY 0x10
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#define ATTR_ARCHIVE 0x20
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struct BootSec {
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uint8_t BS_jmpBoot[3];
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uint8_t BS_OEMName[8];
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uint16_t BPB_BytesPerSec;
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uint8_t BPB_SecPerClus;
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uint16_t BPB_RsvdSecCnt;
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uint8_t BPB_NumFATs;
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uint16_t BPB_RootEntCnt;
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uint16_t BPB_TotSec16;
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uint8_t BPB_Media;
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uint16_t BPB_FATSz16;
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uint16_t BPB_SecPerTrk;
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uint16_t BPB_NumHeads;
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uint32_t BPB_HiddSec;
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uint32_t BPB_TotSec32;
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};
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#define BS_DRVNUM 36
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#define BS_RESERVED1 37
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#define BS_BOOTSIG 38
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#define BS_VOLID 39
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#define BS_VOLLAB 43
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#define BS_FILSYSTYPE 54
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#define BPB_FATSZ32 36
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#define BPB_EXTFLAGS 40
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#define BPB_FSVER 42
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#define BPB_ROOTCLUS 44
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#define BPB_FSINFO 48
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#define BPB_BKBOOTSEC 50
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#define BPB_RESERVED 52
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#define FAT32_BS_DRVNUM 64
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#define FAT32_BS_RESERVED1 65
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#define FAT32_BS_BOOTSIG 66
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#define FAT32_BS_VOLID 67
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#define FAT32_BS_VOLLAB 71
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#define FAT32_BS_FILSYSTYPE 82
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struct DirEntry {
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uint8_t DIR_Name[11];
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uint8_t DIR_Attr;
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uint8_t DIR_NTRes;
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uint8_t DIR_CrtTimeTenth;
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uint16_t DIR_CrtTime;
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uint16_t DIR_CrtDate;
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uint16_t DIR_LastAccDate;
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uint16_t DIR_FstClusHI;
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uint16_t DIR_WrtTime;
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uint16_t DIR_WrtDate;
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uint16_t DIR_FstClusLO;
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uint32_t DIR_FileSize;
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};
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#endif
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267
avr/usbload/huffman-decode.c
Normal file
267
avr/usbload/huffman-decode.c
Normal file
@@ -0,0 +1,267 @@
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/*
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* =====================================================================================
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*
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* ________ .__ __ ________ ____ ________
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* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
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* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
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* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
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* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
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* \__> \/ \/ \/ \/ \/
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*
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* www.optixx.org
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*
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*
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* Version: 1.0
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* Created: 07/21/2009 03:32:16 PM
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*
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* =====================================================================================
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*/
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#include "huffman-decode.h"
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include "info.h"
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#include "debug.h"
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#ifdef DEBUG
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#undef DEBUG
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#endif
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#define DEBUG 1
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#if DEBUG
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#include <avr/pgmspace.h>
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#endif
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#define V_NODE (-2)
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#define V_EOF (-1)
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#define PREFIX_SIZE_B 32
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#define ALLOC_ERROR {}
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#undef BLOCK_ALLOC
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typedef struct {
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int16_t value;
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void* left;
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void* right;
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} node_t;
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#if HUFFMAN_USE_ADDR_16
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void huffman_dec_init(huffman_dec_ctx_t* ctx, uint16_t(*rb_func)(uint16_t)){
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#else
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void huffman_dec_init(huffman_dec_ctx_t* ctx, uint16_t(*rb_func)(uint32_t)){
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#endif
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ctx->tree = NULL;
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ctx->addr = 0;
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ctx->read_byte = rb_func;
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ctx->rbuffer_index = 8;
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}
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#if HUFFMAN_USE_ADDR_16
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void huffman_dec_set_addr(huffman_dec_ctx_t* ctx, uint16_t addr){
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#else
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void huffman_dec_set_addr(huffman_dec_ctx_t* ctx, uint32_t addr){
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#endif
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ctx->addr = addr;
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}
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static inline void prefix_increment(uint8_t* prefix){
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uint8_t i;
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for(i=0; i<PREFIX_SIZE_B; ++i){
|
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prefix[i] += 1;
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if(prefix[i]!=0)
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return;
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}
|
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}
|
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|
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static inline void prefix_shiftleft(uint8_t* prefix){
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uint8_t i;
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uint8_t c[2]={0,0};
|
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uint8_t ci=0;
|
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for(i=0; i<PREFIX_SIZE_B; ++i){
|
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c[ci] = (prefix[i])>>7;
|
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prefix[i]<<=1;
|
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ci ^= 1;
|
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prefix[i]|=c[ci];
|
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}
|
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}
|
||||
|
||||
static inline void set_last_to_eof(node_t* start){
|
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node_t* current = start;
|
||||
while(current->value==V_NODE){
|
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current=current->right;
|
||||
}
|
||||
current->value=V_EOF;
|
||||
}
|
||||
|
||||
#if DEBUG
|
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void print_tree(node_t* node){
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if(node->value==V_NODE){
|
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info("\n%p --> node->left=%p node->right=%p",node,node->left, node->right);
|
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print_tree(node->left);
|
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print_tree(node->right);
|
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}else{
|
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info("\n%p => %i",node,node->value);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
uint8_t build_tree(huffman_dec_ctx_t* ctx){
|
||||
uint16_t treesize;
|
||||
uint16_t treeindex=1;
|
||||
int8_t i,t;
|
||||
if(ctx->read_byte(ctx->addr++)!=0xC0)
|
||||
return 1;
|
||||
if(((treesize=ctx->read_byte(ctx->addr++))&0xFE)!=0xDE)
|
||||
return 1;
|
||||
treesize = (treesize&1)<<8;
|
||||
treesize += ctx->read_byte(ctx->addr++);
|
||||
if(treesize>0x1ff)
|
||||
return 2;
|
||||
#if BLOCK_ALLOC
|
||||
ctx->tree = malloc((2*treesize-1) * sizeof(node_t));
|
||||
#else
|
||||
ctx->tree = malloc(sizeof(node_t));
|
||||
#endif
|
||||
((node_t*)(ctx->tree))->value = V_NODE;
|
||||
uint16_t depth=0;
|
||||
uint16_t count=0;
|
||||
uint16_t v;
|
||||
uint8_t prefix[PREFIX_SIZE_B];
|
||||
uint8_t cdepth=0;
|
||||
node_t* current=ctx->tree;
|
||||
current->value = V_NODE;
|
||||
memset(prefix, 0, PREFIX_SIZE_B);
|
||||
do{
|
||||
while(count==0){
|
||||
depth++;
|
||||
count= ctx->read_byte(ctx->addr++);
|
||||
if(count==255)
|
||||
count += ctx->read_byte(ctx->addr++);
|
||||
}
|
||||
v = ctx->read_byte(ctx->addr++);
|
||||
if(v>0xff)
|
||||
return 3;
|
||||
--count;
|
||||
for(;cdepth<depth;++cdepth){
|
||||
prefix_shiftleft(prefix);
|
||||
}
|
||||
#if DEBUG
|
||||
printf("\n value %x => ",v);
|
||||
#endif
|
||||
current=ctx->tree;
|
||||
for(i=depth-1; i>=0; --i){
|
||||
t=(prefix[i/8])&(1<<(i%8));
|
||||
if(t==0){
|
||||
#if DEBUG
|
||||
printf("0");
|
||||
#endif
|
||||
if(current->left==NULL){
|
||||
#if BLOCK_ALLOC
|
||||
current->left=&(((node_t*)(ctx->tree))[treeindex++]);
|
||||
#else
|
||||
current->left=malloc(sizeof(node_t));
|
||||
#endif
|
||||
((node_t*)(current->left))->value = V_NODE;
|
||||
}
|
||||
current = current->left;
|
||||
} else {
|
||||
#if DEBUG
|
||||
printf("1");
|
||||
#endif
|
||||
if(current->right==NULL){
|
||||
#if BLOCK_ALLOC
|
||||
current->right=&(((node_t*)(ctx->tree))[treeindex++]);
|
||||
#else
|
||||
current->right=malloc( sizeof(node_t));
|
||||
#endif
|
||||
((node_t*)(current->right))->value=V_NODE;
|
||||
}
|
||||
current = current->right;
|
||||
}
|
||||
}
|
||||
#if !BLOCK_ALLOC
|
||||
if(current==NULL)
|
||||
ALLOC_ERROR
|
||||
#endif
|
||||
current->value=v;
|
||||
prefix_increment(prefix);
|
||||
}while(!(prefix[depth/8]&(1<<(depth%8))));
|
||||
#if DEBUG
|
||||
print_tree(ctx->tree);
|
||||
#endif
|
||||
set_last_to_eof(ctx->tree);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void free_tree(node_t* node){
|
||||
#if !BLOCK_ALLOC
|
||||
if(node->value==V_NODE){
|
||||
free_tree(node->left);
|
||||
free_tree(node->right);
|
||||
}
|
||||
#endif
|
||||
free(node);
|
||||
|
||||
}
|
||||
|
||||
static uint8_t read_bit(huffman_dec_ctx_t* ctx){
|
||||
uint16_t x;
|
||||
uint8_t t;
|
||||
if(ctx->rbuffer_index==8){
|
||||
x=ctx->read_byte(ctx->addr);
|
||||
ctx->addr++;
|
||||
if(t>0xff)
|
||||
return 0xFF;
|
||||
ctx->rbuffer = (uint8_t)x;
|
||||
ctx->rbuffer_index=0;
|
||||
}
|
||||
t=(ctx->rbuffer)>>7;
|
||||
ctx->rbuffer<<=1;
|
||||
ctx->rbuffer_index++;
|
||||
return t;
|
||||
}
|
||||
|
||||
uint16_t huffman_dec_byte(huffman_dec_ctx_t* ctx){
|
||||
node_t* current=ctx->tree;
|
||||
uint8_t t;
|
||||
if(current==NULL){
|
||||
#if DEBUG
|
||||
printf("\nbuild tree");
|
||||
#endif
|
||||
t=build_tree(ctx);
|
||||
if(t!=0){
|
||||
#if DEBUG
|
||||
printf("\n!!! building tree failed !!!\r\n");
|
||||
#endif
|
||||
return 0xFFFF;
|
||||
}
|
||||
#if DEBUG
|
||||
printf("\ntree build successful");
|
||||
#endif
|
||||
current=ctx->tree;
|
||||
}
|
||||
while(current->value==V_NODE){
|
||||
t=read_bit(ctx);
|
||||
if(t==0xFF)
|
||||
goto eof_detected;
|
||||
if(t==0){
|
||||
current=current->left;
|
||||
} else {
|
||||
current=current->right;
|
||||
}
|
||||
}
|
||||
if(current->value!=V_EOF){
|
||||
return current->value;
|
||||
}
|
||||
eof_detected:
|
||||
free_tree(ctx->tree);
|
||||
ctx->tree = NULL;
|
||||
return 0xFFFF;
|
||||
}
|
||||
51
avr/usbload/huffman-decode.h
Normal file
51
avr/usbload/huffman-decode.h
Normal file
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
* =====================================================================================
|
||||
*
|
||||
* ________ .__ __ ________ ____ ________
|
||||
* \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
|
||||
* / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
|
||||
* / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
|
||||
* \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
|
||||
* \__> \/ \/ \/ \/ \/
|
||||
*
|
||||
* www.optixx.org
|
||||
*
|
||||
*
|
||||
* Version: 1.0
|
||||
* Created: 07/21/2009 03:32:16 PM
|
||||
*
|
||||
* =====================================================================================
|
||||
*/
|
||||
|
||||
#ifndef AVR_HUFFMAN_DECODE_H_
|
||||
#define AVR_HUFFMAN_DECODE_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define HUFFMAN_USE_ADDR_16 1
|
||||
|
||||
typedef struct {
|
||||
void* tree;
|
||||
uint8_t rbuffer;
|
||||
uint8_t rbuffer_index;
|
||||
#if HUFFMAN_USE_ADDR_16
|
||||
uint16_t(*read_byte)(uint16_t addr);
|
||||
uint16_t addr;
|
||||
#else
|
||||
uint16_t(*read_byte)(uint32_t addr);
|
||||
uint32_t addr;
|
||||
#endif
|
||||
} huffman_dec_ctx_t;
|
||||
|
||||
#if HUFFMAN_USE_ADDR_16
|
||||
void huffman_dec_init(huffman_dec_ctx_t* ctx, uint16_t(*rb_func)(uint16_t));
|
||||
void huffman_dec_set_addr(huffman_dec_ctx_t* ctx,uint16_t addr);
|
||||
#else
|
||||
void huffman_dec_init(huffman_dec_ctx_t* ctx, uint16_t(*rb_func)(uint32_t));
|
||||
void huffman_dec_set_addr(huffman_dec_ctx_t* ctx,uint32_t addr);
|
||||
#endif
|
||||
|
||||
|
||||
uint16_t huffman_dec_byte(huffman_dec_ctx_t* ctx);
|
||||
|
||||
#endif /* AVR_HUFFMAN_DECODE_H_ */
|
||||
3654
avr/usbload/loader.c
3654
avr/usbload/loader.c
File diff suppressed because it is too large
Load Diff
@@ -2,8 +2,8 @@
|
||||
#ifndef __FIFO_H__
|
||||
#define __FIFO_H__
|
||||
|
||||
#define ROM_BUFFER_SIZE 31091
|
||||
#define ROM_HUFFMAN_SIZE 0
|
||||
#define ROM_RLE_SIZE 31091
|
||||
#define ROM_BUFFER_SIZE 27288
|
||||
#define ROM_HUFFMAN_SIZE 27288
|
||||
#define ROM_RLE_SIZE 30344
|
||||
|
||||
#endif
|
||||
|
||||
@@ -25,10 +25,11 @@
|
||||
#include <util/delay.h> /* for _delay_ms() */
|
||||
#include <stdlib.h>
|
||||
#include <avr/pgmspace.h> /* required by usbdrv.h */
|
||||
#include <avr/eeprom.h>
|
||||
#include <avr/eeprom.h>
|
||||
|
||||
#include "usbdrv.h"
|
||||
#include "oddebug.h" /* This is also an example for using debug macros */
|
||||
#include "oddebug.h" /* This is also an example for using debug
|
||||
* macros */
|
||||
#include "config.h"
|
||||
#include "requests.h" /* The custom request numbers we use */
|
||||
#include "uart.h"
|
||||
@@ -40,18 +41,16 @@
|
||||
#include "usb_bulk.h"
|
||||
#include "timer.h"
|
||||
#include "watchdog.h"
|
||||
#include "huffman-decode.h"
|
||||
#include "rle.h"
|
||||
#include "loader.h"
|
||||
#include "shared_memory.h"
|
||||
#include "mmc.h"
|
||||
#include "fat.h"
|
||||
|
||||
|
||||
|
||||
extern const char _rom[] PROGMEM;
|
||||
extern FILE uart_stdout;
|
||||
|
||||
uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC);
|
||||
uint8_t debug_level = ( DEBUG | DEBUG_USB | DEBUG_CRC );
|
||||
|
||||
uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
|
||||
uint32_t req_addr = 0;
|
||||
@@ -77,29 +76,28 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
||||
|
||||
usbRequest_t *rq = (void *) data;
|
||||
uint8_t ret_len = 0;
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
if (rq->bRequest == USB_UPLOAD_INIT) {
|
||||
|
||||
if (req_state != REQ_STATUS_IDLE) {
|
||||
debug(DEBUG_USB,
|
||||
"USB_UPLOAD_INIT: ERROR state is not REQ_STATUS_IDLE\n");
|
||||
if (req_state != REQ_STATUS_IDLE){
|
||||
debug(DEBUG_USB,"USB_UPLOAD_INIT: ERROR state is not REQ_STATUS_IDLE\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
req_bank = 0;
|
||||
rx_remaining = 0;
|
||||
req_bank_size = (uint32_t) 1 << rq->wValue.word;
|
||||
req_bank_size = (uint32_t)1 << rq->wValue.word;
|
||||
sync_errors = 0;
|
||||
crc = 0;
|
||||
debug(DEBUG_USB, "USB_UPLOAD_INIT: bank_size=0x%08lx\n", req_bank_size);
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_UPLOAD_ADDR) {
|
||||
debug(DEBUG_USB,"USB_UPLOAD_INIT: bank_size=0x%08lx\n", req_bank_size);
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_UPLOAD_ADDR) {
|
||||
|
||||
req_state = REQ_STATUS_UPLOAD;
|
||||
req_addr = rq->wValue.word;
|
||||
req_addr = req_addr << 16;
|
||||
@@ -107,67 +105,61 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
||||
if (rx_remaining) {
|
||||
sync_errors++;
|
||||
debug
|
||||
(DEBUG_USB,
|
||||
"USB_UPLOAD_ADDR: Out of sync addr=0x%lx remain=%i packet=%i sync_error=%i\n",
|
||||
(DEBUG_USB,"USB_UPLOAD_ADDR: Out of sync addr=0x%lx remain=%i packet=%i sync_error=%i\n",
|
||||
req_addr, rx_remaining, rq->wLength.word, sync_errors);
|
||||
ret_len = 0;
|
||||
}
|
||||
rx_remaining = rq->wLength.word;
|
||||
ret_len = USB_MAX_TRANS;
|
||||
|
||||
|
||||
|
||||
if (req_addr && (req_addr % 0x1000) == 0) {
|
||||
debug(DEBUG_USB,
|
||||
"USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx crc=%04x\n",
|
||||
req_bank, req_addr, crc_check_bulk_memory(req_addr - 0x1000,
|
||||
req_addr,
|
||||
req_bank_size));
|
||||
|
||||
debug(DEBUG_USB,"USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx crc=%04x\n",
|
||||
req_bank, req_addr,crc_check_bulk_memory(req_addr - 0x1000,req_addr,req_bank_size));
|
||||
|
||||
}
|
||||
if (req_addr && req_addr % req_bank_size == 0) {
|
||||
debug(DEBUG_USB, "USB_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx\n",
|
||||
req_bank, req_addr);
|
||||
debug(DEBUG_USB,"USB_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx\n",
|
||||
req_bank, req_addr);
|
||||
|
||||
req_bank++;
|
||||
// shared_memory_put(SHARED_MEM_CMD_UPLOAD_PROGESS,req_bank);
|
||||
//shared_memory_put(SHARED_MEM_CMD_UPLOAD_PROGESS,req_bank);
|
||||
}
|
||||
ret_len = USB_MAX_TRANS;
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_DOWNLOAD_INIT) {
|
||||
debug(DEBUG_USB, "USB_DOWNLOAD_INIT\n");
|
||||
debug(DEBUG_USB,"USB_DOWNLOAD_INIT\n");
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_DOWNLOAD_ADDR) {
|
||||
debug(DEBUG_USB, "USB_DOWNLOAD_ADDR\n");
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
|
||||
debug(DEBUG_USB,"USB_DOWNLOAD_ADDR\n");
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
|
||||
|
||||
req_bank = 0;
|
||||
rx_remaining = 0;
|
||||
debug(DEBUG_USB, "USB_BULK_UPLOAD_INIT: %i %i\n", rq->wValue.word,
|
||||
rq->wIndex.word);
|
||||
req_bank_size = (uint32_t) (1L << rq->wValue.word);
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: %i %i\n",rq->wValue.word, rq->wIndex.word);
|
||||
req_bank_size = (uint32_t)(1L << rq->wValue.word);
|
||||
req_bank_cnt = rq->wIndex.word;
|
||||
req_addr_end = (uint32_t) req_bank_size *req_bank_cnt;
|
||||
|
||||
req_addr_end = (uint32_t)req_bank_size * req_bank_cnt;
|
||||
|
||||
sync_errors = 0;
|
||||
debug(DEBUG_USB,
|
||||
"USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n",
|
||||
req_bank_size, req_bank_cnt, req_addr_end);
|
||||
|
||||
shared_memory_put(SHARED_MEM_CMD_BANK_COUNT, req_bank_cnt);
|
||||
if (req_addr == 0x000000) {
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n",
|
||||
req_bank_size, req_bank_cnt, req_addr_end);
|
||||
|
||||
shared_memory_put(SHARED_MEM_CMD_BANK_COUNT,req_bank_cnt);
|
||||
if (req_addr == 0x000000){
|
||||
timer_start();
|
||||
}
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
|
||||
|
||||
req_state = REQ_STATUS_BULK_UPLOAD;
|
||||
@@ -175,30 +167,28 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
||||
req_addr = req_addr << 16;
|
||||
req_addr = req_addr | rq->wIndex.word;
|
||||
rx_remaining = rq->wLength.word;
|
||||
|
||||
|
||||
if (req_addr && req_addr % req_bank_size == 0) {
|
||||
#ifdef FLT_DEBUG
|
||||
debug(DEBUG_USB,
|
||||
"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n",
|
||||
req_bank, req_addr, timer_stop());
|
||||
#else
|
||||
debug(DEBUG_USB,
|
||||
"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n",
|
||||
req_bank, req_addr, timer_stop_int());
|
||||
#endif
|
||||
#ifdef FLT_DEBUG
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n",
|
||||
req_bank, req_addr,timer_stop());
|
||||
#else
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n",
|
||||
req_bank, req_addr,timer_stop_int());
|
||||
#endif
|
||||
req_bank++;
|
||||
shared_memory_put(SHARED_MEM_CMD_UPLOAD_PROGESS, req_bank);
|
||||
shared_memory_put(SHARED_MEM_CMD_UPLOAD_PROGESS,req_bank);
|
||||
sram_bulk_write_start(req_addr);
|
||||
timer_start();
|
||||
|
||||
|
||||
} else {
|
||||
sram_bulk_write_start(req_addr);
|
||||
}
|
||||
ret_len = USB_MAX_TRANS;
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
|
||||
|
||||
req_state = REQ_STATUS_BULK_UPLOAD;
|
||||
@@ -208,94 +198,87 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
||||
rx_remaining = rq->wLength.word;
|
||||
#if 0
|
||||
if (req_addr && (req_addr % 0x1000) == 0) {
|
||||
debug(DEBUG_USB,
|
||||
"USB_BULK_UPLOAD_NEXT: bank=0x%02x addr=0x%08lx crc=%04x\n",
|
||||
req_bank, req_addr, crc_check_bulk_memory(req_addr - 0x1000,
|
||||
req_addr,
|
||||
req_bank_size));
|
||||
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_NEXT: bank=0x%02x addr=0x%08lx crc=%04x\n",
|
||||
req_bank, req_addr,crc_check_bulk_memory(req_addr - 0x1000,req_addr,req_bank_size));
|
||||
|
||||
}
|
||||
sram_bulk_write_start(req_addr);
|
||||
#endif
|
||||
if (req_addr && (req_addr % req_bank_size) == 0) {
|
||||
#ifdef FLT_DEBUG
|
||||
debug(DEBUG_USB,
|
||||
"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n",
|
||||
req_bank, req_addr, timer_stop());
|
||||
#else
|
||||
debug(DEBUG_USB,
|
||||
"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n",
|
||||
req_bank, req_addr, timer_stop_int());
|
||||
#endif
|
||||
if (req_addr && ( req_addr % req_bank_size) == 0) {
|
||||
#ifdef FLT_DEBUG
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n",
|
||||
req_bank, req_addr,timer_stop());
|
||||
#else
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n",
|
||||
req_bank, req_addr,timer_stop_int());
|
||||
#endif
|
||||
req_bank++;
|
||||
timer_start();
|
||||
shared_memory_put(SHARED_MEM_CMD_BANK_CURRENT, req_bank);
|
||||
shared_memory_put(SHARED_MEM_CMD_BANK_CURRENT,req_bank);
|
||||
sram_bulk_write_start(req_addr);
|
||||
|
||||
|
||||
}
|
||||
ret_len = USB_MAX_TRANS;
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_BULK_UPLOAD_END) {
|
||||
if (req_state != REQ_STATUS_BULK_UPLOAD) {
|
||||
debug(DEBUG_USB,
|
||||
"USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n");
|
||||
if (req_state != REQ_STATUS_BULK_UPLOAD){
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n");
|
||||
return 0;
|
||||
}
|
||||
debug(DEBUG_USB, "USB_BULK_UPLOAD_END:\n");
|
||||
debug(DEBUG_USB,"USB_BULK_UPLOAD_END:\n");
|
||||
req_state = REQ_STATUS_IDLE;
|
||||
sram_bulk_write_end();
|
||||
shared_memory_put(SHARED_MEM_CMD_UPLOAD_END, 0);
|
||||
shared_memory_put(SHARED_MEM_CMD_UPLOAD_END,0);
|
||||
ret_len = 0;
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_CRC) {
|
||||
req_addr = rq->wValue.word;
|
||||
req_addr = req_addr << 16;
|
||||
req_addr = req_addr | rq->wIndex.word;
|
||||
debug(DEBUG_USB, "USB_CRC: addr=0x%08lx \n", req_addr);
|
||||
debug(DEBUG_USB,"USB_CRC: addr=0x%08lx \n", req_addr);
|
||||
crc_check_bulk_memory(0x000000, req_addr, req_bank_size);
|
||||
ret_len = 0;
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_MODE_SNES) {
|
||||
req_state = REQ_STATUS_SNES;
|
||||
debug(DEBUG_USB, "USB_MODE_SNES:\n");
|
||||
debug(DEBUG_USB,"USB_MODE_SNES:\n");
|
||||
ret_len = 0;
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_MODE_AVR) {
|
||||
req_state = REQ_STATUS_AVR;
|
||||
debug(DEBUG_USB, "USB_MODE_AVR:\n");
|
||||
debug(DEBUG_USB,"USB_MODE_AVR:\n");
|
||||
ret_len = 0;
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
} else if (rq->bRequest == USB_AVR_RESET) {
|
||||
debug(DEBUG_USB, "USB_AVR_RESET:\n");
|
||||
debug(DEBUG_USB,"USB_AVR_RESET:\n");
|
||||
soft_reset();
|
||||
ret_len = 0;
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
} else if (rq->bRequest == USB_CRC_ADDR) {
|
||||
req_state = REQ_STATUS_CRC;
|
||||
req_addr = rq->wValue.word;
|
||||
req_addr = req_addr << 16;
|
||||
req_addr = req_addr | rq->wIndex.word;
|
||||
debug(DEBUG_USB, "USB_CRC_ADDR: addr=0x%lx size=%i\n", req_addr,
|
||||
rq->wLength.word);
|
||||
debug(DEBUG_USB,"USB_CRC_ADDR: addr=0x%lx size=%i\n", req_addr,
|
||||
rq->wLength.word);
|
||||
req_size = rq->wLength.word;
|
||||
req_size = req_size << 2;
|
||||
tx_remaining = 2;
|
||||
debug(DEBUG_USB, "USB_CRC_ADDR: addr=0x%lx size=%li\n", req_addr,
|
||||
req_size);
|
||||
debug(DEBUG_USB,"USB_CRC_ADDR: addr=0x%lx size=%li\n", req_addr, req_size);
|
||||
|
||||
crc = crc_check_memory_range(req_addr, req_size, read_buffer);
|
||||
tx_buffer[0] = crc & 0xff;
|
||||
@@ -305,108 +288,42 @@ usbMsgLen_t usbFunctionSetup(uchar data[8])
|
||||
}
|
||||
|
||||
usbMsgPtr = data_buffer;
|
||||
return ret_len; /* default for not implemented requests: return no data back to host */
|
||||
return ret_len; /* default for not implemented requests: return
|
||||
* no data back to host */
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
#define ENABLE_TEST
|
||||
#ifdef ENABLE_TEST
|
||||
|
||||
|
||||
uint8_t buffer[512];
|
||||
|
||||
void test_sdcard(){
|
||||
uint16_t fat_cluster = 0;
|
||||
uint8_t fat_attrib = 0;
|
||||
uint32_t fat_size = 0;
|
||||
uint32_t rom_addr = 0;
|
||||
uint8_t bank_cnt = 0;
|
||||
uint16_t crc = 0;
|
||||
uint16_t block_cnt;
|
||||
uint16_t clustervar;
|
||||
uint8_t dir_attrib = 0;
|
||||
uint32_t file_size = 0;
|
||||
uint8_t i = 0;
|
||||
|
||||
#define FILENAME "mrdo.smc" //failed
|
||||
#define ROMSIZE 2 // 4 == 4mbit == 512kb
|
||||
#define BUFFER_SIZE 512
|
||||
#define BLOCKS (ROMSIZE << 8)
|
||||
|
||||
while ( mmc_init() !=0) {
|
||||
info("No sdcard...\n");
|
||||
}
|
||||
info("MMC Init done\n");
|
||||
fat_init(read_buffer);
|
||||
info("FAT Init done.\n");
|
||||
|
||||
|
||||
info("\r\nDirectory\r\n");
|
||||
for (i = 1;i < 240;i++){
|
||||
clustervar = fat_read_dir_ent(0,i,&file_size,&dir_attrib,buffer);
|
||||
if (clustervar == 0xffff){
|
||||
break;
|
||||
}
|
||||
info("Cluster = %4x DirA = %2x FileName = %s size=%li\n",clustervar,dir_attrib,buffer,file_size);
|
||||
}
|
||||
|
||||
info("Look for %s\n",FILENAME);
|
||||
|
||||
if (fat_search_file((uint8_t*)FILENAME,
|
||||
&fat_cluster,
|
||||
&fat_size,
|
||||
&fat_attrib,
|
||||
read_buffer) == 1) {
|
||||
|
||||
|
||||
for (block_cnt=0; block_cnt<BLOCKS; block_cnt++) {
|
||||
fat_read_file (fat_cluster,read_buffer,block_cnt);
|
||||
|
||||
if (block_cnt && block_cnt % 64 == 0){
|
||||
printf("Write Ram Bank: 0x%x Addr: 0x%lx Block: %x CRC: %x\n",bank_cnt,rom_addr,block_cnt,crc);
|
||||
bank_cnt++;
|
||||
crc = 0;
|
||||
}
|
||||
}
|
||||
printf("Write Ram Bank: 0x%x Addr: 0x%lx Block: %x CRC: %x\n",bank_cnt,rom_addr,block_cnt,crc);
|
||||
printf("Done\n");
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
void test_read_write()
|
||||
{
|
||||
|
||||
void test_read_write(){
|
||||
|
||||
uint8_t i;
|
||||
uint32_t addr;
|
||||
avr_bus_active();
|
||||
addr = 0x000000;
|
||||
i = 1;
|
||||
while (addr++ <= 0x0000ff) {
|
||||
sram_write(addr, i++);
|
||||
while (addr++ <= 0x0000ff){
|
||||
sram_write(addr,i++);
|
||||
}
|
||||
addr = 0x000000;
|
||||
while (addr++ <= 0x0000ff) {
|
||||
info("read addr=0x%08lx %x\n", addr, sram_read(addr));
|
||||
while (addr++ <= 0x0000ff){
|
||||
info("read addr=0x%08lx %x\n",addr,sram_read(addr));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void test_bulk_read_write()
|
||||
{
|
||||
|
||||
void test_bulk_read_write(){
|
||||
|
||||
uint8_t i;
|
||||
uint32_t addr;
|
||||
avr_bus_active();
|
||||
addr = 0x000000;
|
||||
i = 0;
|
||||
sram_bulk_write_start(addr);
|
||||
while (addr++ <= 0x8000) {
|
||||
while (addr++ <= 0x8000){
|
||||
sram_bulk_write(i++);
|
||||
sram_bulk_write_next();
|
||||
}
|
||||
@@ -414,8 +331,8 @@ void test_bulk_read_write()
|
||||
|
||||
addr = 0x000000;
|
||||
sram_bulk_read_start(addr);
|
||||
while (addr <= 0x8000) {
|
||||
info("addr=0x%08lx %x\n", addr, sram_bulk_read());
|
||||
while (addr <= 0x8000){
|
||||
info("addr=0x%08lx %x\n",addr,sram_bulk_read());
|
||||
sram_bulk_read_next();
|
||||
addr++;
|
||||
}
|
||||
@@ -423,15 +340,15 @@ void test_bulk_read_write()
|
||||
}
|
||||
|
||||
|
||||
void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr)
|
||||
void test_non_zero_memory(uint32_t bottom_addr,uint32_t top_addr)
|
||||
{
|
||||
uint32_t addr = 0;
|
||||
uint8_t c;
|
||||
sram_bulk_read_start(bottom_addr);
|
||||
for (addr = bottom_addr; addr < top_addr; addr++) {
|
||||
c = sram_bulk_read();
|
||||
if (c != 0xff)
|
||||
info("addr=0x%08lx c=0x%x\n", addr, c);
|
||||
if (c!=0xff)
|
||||
info("addr=0x%08lx c=0x%x\n",addr,c);
|
||||
sram_bulk_read_next();
|
||||
}
|
||||
sram_bulk_read_end();
|
||||
@@ -439,20 +356,45 @@ void test_non_zero_memory(uint32_t bottom_addr, uint32_t top_addr)
|
||||
|
||||
|
||||
|
||||
void test_crc()
|
||||
{
|
||||
void test_crc(){
|
||||
info("test_crc: clear\n");
|
||||
avr_bus_active();
|
||||
sram_bulk_set(0x000000, 0x10000, 0xff);
|
||||
sram_bulk_set(0x000000,0x10000,0xff);
|
||||
info("test_crc: crc\n");
|
||||
crc_check_bulk_memory(0x000000, 0x10000, 0x8000);
|
||||
crc_check_bulk_memory(0x000000,0x10000,0x8000);
|
||||
info("test_crc: check\n");
|
||||
test_non_zero_memory(0x000000, 0x10000);
|
||||
test_non_zero_memory(0x000000,0x10000);
|
||||
}
|
||||
#endif
|
||||
|
||||
void send_reset()
|
||||
{
|
||||
uint16_t read_byte_pgm(uint16_t addr){
|
||||
return pgm_read_byte((PGM_VOID_P)addr);
|
||||
}
|
||||
|
||||
void decompress_huffman(PGM_VOID_P addr, uint16_t(*fp)(uint16_t)){
|
||||
uint16_t c;
|
||||
uint32_t i = 0;
|
||||
huffman_dec_ctx_t ctx;
|
||||
info("ok1\n");
|
||||
huffman_dec_init(&ctx, fp);
|
||||
info("ok2\n");
|
||||
huffman_dec_set_addr(&ctx, (uint16_t)addr);
|
||||
info("ok3\n");
|
||||
while(1){
|
||||
info("ok4\n");
|
||||
i++;
|
||||
c=huffman_dec_byte(&ctx);
|
||||
if (i%1024==0)
|
||||
info(".");
|
||||
if(c>0xff){
|
||||
return;
|
||||
}
|
||||
c&=0xff;
|
||||
sram_bulk_write(c);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void send_reset(){
|
||||
info("Reset Snes\n");
|
||||
snes_reset_on();
|
||||
snes_reset_lo();
|
||||
@@ -461,8 +403,7 @@ void send_reset()
|
||||
snes_reset_off();
|
||||
}
|
||||
|
||||
void send_irq()
|
||||
{
|
||||
void send_irq(){
|
||||
snes_irq_on();
|
||||
snes_irq_lo();
|
||||
_delay_us(20);
|
||||
@@ -470,9 +411,8 @@ void send_irq()
|
||||
snes_irq_off();
|
||||
}
|
||||
|
||||
void set_rom_mode()
|
||||
{
|
||||
if (req_bank_size == 0x8000) {
|
||||
void set_rom_mode(){
|
||||
if (req_bank_size == 0x8000){
|
||||
snes_lorom();
|
||||
info("Set Snes lowrom \n");
|
||||
} else {
|
||||
@@ -482,16 +422,15 @@ void set_rom_mode()
|
||||
}
|
||||
|
||||
|
||||
void usb_connect()
|
||||
{
|
||||
void usb_connect(){
|
||||
uint8_t i = 0;
|
||||
info("USB init\n");
|
||||
usbDeviceDisconnect(); /* enforce re-enumeration, do this while */
|
||||
cli();
|
||||
cli();
|
||||
info("USB disconnect\n");
|
||||
i = 10;
|
||||
while (--i) { /* fake USB disconnect for > 250 ms */
|
||||
led_on();
|
||||
led_on();
|
||||
_delay_ms(35);
|
||||
led_off();
|
||||
_delay_ms(65);
|
||||
@@ -502,14 +441,12 @@ void usb_connect()
|
||||
}
|
||||
|
||||
|
||||
void boot_startup_rom()
|
||||
{
|
||||
|
||||
|
||||
void boot_startup_rom(){
|
||||
|
||||
|
||||
info("Activate AVR bus\n");
|
||||
avr_bus_active();
|
||||
|
||||
|
||||
info("IRQ off\n");
|
||||
snes_irq_lo();
|
||||
snes_irq_off();
|
||||
@@ -517,16 +454,22 @@ void boot_startup_rom()
|
||||
snes_lorom();
|
||||
info("Set Snes lowrom \n");
|
||||
|
||||
rle_decode(&_rom, ROM_BUFFER_SIZE, 0x000000);
|
||||
|
||||
info("Huffman decompress to 0x010000\n",(void*)_rom);
|
||||
sram_bulk_write_start(0x010000);
|
||||
decompress_huffman(&_rom,read_byte_pgm);
|
||||
sram_bulk_write_end();
|
||||
info("RLE decompress to 0x000000\n",(void*)_rom);
|
||||
rle_decode_sram(0x010000, ROM_RLE_SIZE, 0x000000);
|
||||
dump_memory(0x10000 - 0x100, 0x10000);
|
||||
|
||||
|
||||
snes_reset_hi();
|
||||
snes_reset_off();
|
||||
snes_irq_lo();
|
||||
snes_irq_off();
|
||||
info("IRQ off\n");
|
||||
snes_hirom();
|
||||
snes_wr_disable();
|
||||
snes_wr_disable();
|
||||
info("Disable snes WR\n");
|
||||
snes_bus_active();
|
||||
info("Activate Snes bus\n");
|
||||
@@ -538,38 +481,37 @@ void boot_startup_rom()
|
||||
uint8_t i = 0;
|
||||
i = 20;
|
||||
info("Wait");
|
||||
while (--i) {
|
||||
while (--i){
|
||||
_delay_ms(500);
|
||||
info(".");
|
||||
}
|
||||
info("\n");
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
||||
|
||||
uart_init();
|
||||
stdout = &uart_stdout;
|
||||
|
||||
|
||||
info("Sytem start\n");
|
||||
system_init();
|
||||
test_sdcard();
|
||||
|
||||
#if 0
|
||||
test_read_write();
|
||||
test_bulk_read_write();
|
||||
test_crc();
|
||||
while (1);
|
||||
while(1);
|
||||
#endif
|
||||
|
||||
|
||||
info("Boot startup rom\n");
|
||||
boot_startup_rom();
|
||||
|
||||
|
||||
usbInit();
|
||||
usb_connect();
|
||||
|
||||
while (1) {
|
||||
|
||||
while (1){
|
||||
avr_bus_active();
|
||||
info("Activate AVR bus\n");
|
||||
info("IRQ off\n");
|
||||
@@ -578,13 +520,13 @@ int main(void)
|
||||
info("Set Snes lowrom\n");
|
||||
snes_lorom();
|
||||
info("Disable snes WR\n");
|
||||
snes_wr_disable();
|
||||
snes_wr_disable();
|
||||
sei();
|
||||
info("USB poll\n");
|
||||
while (req_state != REQ_STATUS_SNES) {
|
||||
while (req_state != REQ_STATUS_SNES){
|
||||
usbPoll();
|
||||
}
|
||||
shared_memory_put(SHARED_MEM_CMD_TERMINATE, 0);
|
||||
shared_memory_put(SHARED_MEM_CMD_TERMINATE,0);
|
||||
info("USB poll done\n");
|
||||
snes_reset_hi();
|
||||
snes_reset_off();
|
||||
@@ -592,7 +534,7 @@ int main(void)
|
||||
snes_irq_off();
|
||||
info("IRQ off\n");
|
||||
set_rom_mode();
|
||||
snes_wr_disable();
|
||||
snes_wr_disable();
|
||||
info("Disable snes WR\n");
|
||||
snes_bus_active();
|
||||
info("Activate Snes bus\n");
|
||||
@@ -601,46 +543,47 @@ int main(void)
|
||||
send_reset();
|
||||
|
||||
info("Poll\n");
|
||||
while (req_state != REQ_STATUS_AVR) {
|
||||
|
||||
while (req_state != REQ_STATUS_AVR){
|
||||
|
||||
usbPoll();
|
||||
|
||||
#ifdef DO_IRQ
|
||||
#ifdef DO_IRQ
|
||||
uint8_t i;
|
||||
uint16_t irq_count = 0;
|
||||
i = 10;
|
||||
while (--i) {
|
||||
_delay_ms(100);
|
||||
}
|
||||
info("Send IRQ %i\n", ++irq_count);
|
||||
info("Send IRQ %i\n",++irq_count);
|
||||
send_irq();
|
||||
#endif
|
||||
|
||||
#ifdef DO_BUS_STEALING
|
||||
#ifdef DO_BUS_STEALING
|
||||
avr_bus_active();
|
||||
sram_bulk_read_start(0x003000);
|
||||
c = sram_bulk_read();
|
||||
i = 5;
|
||||
while (--i) {
|
||||
while (--i) {
|
||||
_delay_ms(500);
|
||||
info("Wait to switch to snes mode %i\n", i);
|
||||
}
|
||||
|
||||
if (req_bank_size == 0x8000) {
|
||||
|
||||
if (req_bank_size == 0x8000){
|
||||
snes_lorom();
|
||||
info("Set Snes lowrom \n");
|
||||
} else {
|
||||
snes_hirom();
|
||||
info("Set Snes hirom \n");
|
||||
}
|
||||
snes_wr_disable();
|
||||
snes_wr_disable();
|
||||
info("Disable snes WR\n");
|
||||
snes_bus_active();
|
||||
info("Activate Snes bus\n");
|
||||
info("Read 0x3000=%c\n", c);
|
||||
info("Read 0x3000=%c\n",c);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -1,194 +0,0 @@
|
||||
#include "mmc.h"
|
||||
#include <util/delay.h>
|
||||
|
||||
uint8_t mmc_init()
|
||||
{
|
||||
uint16_t Timeout = 0, i;
|
||||
MMC_REG |= ((1 << MMC_DO) | (1 << MMC_CS) | (1 << MMC_CLK));
|
||||
MMC_REG &= ~(1 << MMC_DI);
|
||||
MMC_WRITE |= ((1 << MMC_DO) | (1 << MMC_DI) | (1 << MMC_CS));
|
||||
_delay_ms(20);
|
||||
for (i = 0; i < 250; i++) {
|
||||
MMC_WRITE ^= (1 << MMC_CLK);
|
||||
_delay_us(4);
|
||||
}
|
||||
MMC_WRITE &= ~(1 << MMC_CLK);
|
||||
_delay_us(10);
|
||||
MMC_WRITE &= ~(1 << MMC_CS);
|
||||
_delay_us(3);
|
||||
|
||||
uint8_t CMD[] = { 0x40, 0x00, 0x00, 0x00, 0x00, 0x95 };
|
||||
while (mmc_write_command(CMD) != 1) {
|
||||
if (Timeout++ > 20) {
|
||||
mmc_disable();
|
||||
return (1);
|
||||
}
|
||||
}
|
||||
|
||||
Timeout = 0;
|
||||
CMD[0] = 0x41;
|
||||
CMD[5] = 0xFF;
|
||||
while (mmc_write_command(CMD) != 0) {
|
||||
if (Timeout++ > 800) {
|
||||
mmc_disable();
|
||||
return (9);
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
uint8_t mmc_write_command(uint8_t * cmd)
|
||||
{
|
||||
uint8_t tmp = 0xff;
|
||||
uint16_t Timeout = 0;
|
||||
uint8_t a;
|
||||
|
||||
for (a = 0; a < 0x06; a++) {
|
||||
mmc_write_byte(*cmd++);
|
||||
}
|
||||
|
||||
while (tmp == 0xff) {
|
||||
tmp = mmc_read_byte();
|
||||
if (Timeout++ > 50) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return (tmp);
|
||||
}
|
||||
|
||||
|
||||
uint8_t mmc_read_byte(void)
|
||||
{
|
||||
uint8_t Byte = 0, j;
|
||||
for (j = 0; j < 8; j++) {
|
||||
Byte = (Byte << 1);
|
||||
MMC_WRITE |= (1 << MMC_CLK);
|
||||
_delay_us(4);
|
||||
if (PINB & (1 << MMC_DI)) {
|
||||
Byte |= 1;
|
||||
}
|
||||
|
||||
else {
|
||||
Byte &= ~1;
|
||||
}
|
||||
MMC_WRITE &= ~(1 << MMC_CLK);
|
||||
_delay_us(4);
|
||||
}
|
||||
return (Byte);
|
||||
}
|
||||
|
||||
|
||||
void mmc_write_byte(uint8_t Byte)
|
||||
{
|
||||
uint8_t i;
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (Byte & 0x80) {
|
||||
MMC_WRITE |= (1 << MMC_DO);
|
||||
}
|
||||
|
||||
else {
|
||||
MMC_WRITE &= ~(1 << MMC_DO);
|
||||
}
|
||||
Byte = (Byte << 1);
|
||||
MMC_WRITE |= (1 << MMC_CLK);
|
||||
_delay_us(4);
|
||||
MMC_WRITE &= ~(1 << MMC_CLK);
|
||||
_delay_us(4);
|
||||
}
|
||||
MMC_WRITE |= (1 << MMC_DO);
|
||||
}
|
||||
|
||||
uint8_t mmc_write_sector(uint32_t addr, uint8_t * Buffer)
|
||||
{
|
||||
uint8_t tmp;
|
||||
|
||||
|
||||
uint8_t cmd[] = { 0x58, 0x00, 0x00, 0x00, 0x00, 0xFF };
|
||||
uint8_t a;
|
||||
uint16_t i;
|
||||
|
||||
addr = addr << 9;
|
||||
cmd[1] = ((addr & 0xFF000000) >> 24);
|
||||
cmd[2] = ((addr & 0x00FF0000) >> 16);
|
||||
cmd[3] = ((addr & 0x0000FF00) >> 8);
|
||||
|
||||
|
||||
tmp = mmc_write_command(cmd);
|
||||
if (tmp != 0) {
|
||||
return (tmp);
|
||||
}
|
||||
|
||||
for (a = 0; a < 100; a++) {
|
||||
mmc_read_byte();
|
||||
}
|
||||
|
||||
mmc_write_byte(0xFE);
|
||||
|
||||
for (a = 0; i < 512; i++) {
|
||||
mmc_write_byte(*Buffer++);
|
||||
}
|
||||
|
||||
mmc_write_byte(0xFF);
|
||||
mmc_write_byte(0xFF);
|
||||
|
||||
if ((mmc_read_byte() & 0x1F) != 0x05)
|
||||
return (1);
|
||||
|
||||
while (mmc_read_byte() != 0xff) {
|
||||
};
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
||||
void mmc_read_block(uint8_t * cmd, uint8_t * Buffer, uint16_t Bytes)
|
||||
{
|
||||
uint16_t a;
|
||||
|
||||
if (mmc_write_command(cmd) != 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
while (mmc_read_byte() != 0xfe) {
|
||||
};
|
||||
|
||||
|
||||
for (a = 0; a < Bytes; a++) {
|
||||
*Buffer++ = mmc_read_byte();
|
||||
}
|
||||
|
||||
mmc_read_byte();
|
||||
mmc_read_byte();
|
||||
return;
|
||||
}
|
||||
|
||||
uint8_t mmc_read_sector(uint32_t addr, uint8_t * Buffer)
|
||||
{
|
||||
|
||||
|
||||
uint8_t cmd[] = { 0x51, 0x00, 0x00, 0x00, 0x00, 0xFF };
|
||||
|
||||
addr = addr << 9;
|
||||
cmd[1] = ((addr & 0xFF000000) >> 24);
|
||||
cmd[2] = ((addr & 0x00FF0000) >> 16);
|
||||
cmd[3] = ((addr & 0x0000FF00) >> 8);
|
||||
mmc_read_block(cmd, Buffer, 512);
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
||||
uint8_t mmc_read_cid(uint8_t * Buffer)
|
||||
{
|
||||
|
||||
uint8_t cmd[] = { 0x4A, 0x00, 0x00, 0x00, 0x00, 0xFF };
|
||||
mmc_read_block(cmd, Buffer, 16);
|
||||
return (0);
|
||||
}
|
||||
|
||||
|
||||
uint8_t mmc_read_csd(uint8_t * Buffer)
|
||||
{
|
||||
|
||||
uint8_t cmd[] = { 0x49, 0x00, 0x00, 0x00, 0x00, 0xFF };
|
||||
mmc_read_block(cmd, Buffer, 16);
|
||||
return (0);
|
||||
}
|
||||
@@ -1,29 +0,0 @@
|
||||
#ifndef _MMC_H_
|
||||
#define _MMC_H_
|
||||
|
||||
#include <avr/io.h>
|
||||
|
||||
|
||||
#define MMC_WRITE PORTB
|
||||
#define MMC_READ PINB
|
||||
#define MMC_REG DDRB
|
||||
|
||||
#define MMC_CS PB4
|
||||
#define MMC_DO PB6
|
||||
#define MMC_DI PB5
|
||||
#define MMC_CLK PB7
|
||||
extern uint8_t mmc_read_byte(void);
|
||||
extern void mmc_write_byte(uint8_t);
|
||||
extern void mmc_read_block(uint8_t *, uint8_t *, unsigned in);
|
||||
extern uint8_t mmc_init(void);
|
||||
extern uint8_t mmc_read_sector(uint32_t, uint8_t *);
|
||||
extern uint8_t mmc_write_sector(uint32_t, uint8_t *);
|
||||
extern uint8_t mmc_write_command(uint8_t *);
|
||||
extern uint8_t mmc_read_csd(uint8_t *);
|
||||
extern uint8_t mmc_read_cid(uint8_t *);
|
||||
|
||||
#define mmc_disable() MMC_WRITE|= (1<<MMC_CS);
|
||||
|
||||
#define mmc_enable() MMC_WRITE&=~(1<<MMC_CS);
|
||||
|
||||
#endif
|
||||
@@ -18,7 +18,7 @@
|
||||
* =====================================================================================
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include <avr/io.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
@@ -34,12 +34,12 @@
|
||||
|
||||
uint8_t rle_decode(PGM_VOID_P in_addr, int32_t in_len, uint32_t out_addr)
|
||||
{
|
||||
uint8_t in_byte, in_repeat, last_byte;
|
||||
uint32_t out_len, out_len_left;
|
||||
info("RLE decode len=%li addr=0x%08lx\n", in_len, out_addr);
|
||||
uint8_t in_byte, in_repeat, last_byte;
|
||||
uint32_t out_len, out_len_left;
|
||||
info("RLE decode len=%li addr=0x%08lx\n",in_len,out_addr);
|
||||
last_byte = 0;
|
||||
|
||||
out_len_left = out_len;
|
||||
|
||||
out_len_left = out_len;
|
||||
sram_bulk_write_start(out_addr);
|
||||
#define INBYTE(b) \
|
||||
do { \
|
||||
@@ -58,46 +58,100 @@ uint8_t rle_decode(PGM_VOID_P in_addr, int32_t in_len, uint32_t out_addr)
|
||||
out_addr++;\
|
||||
} while(0)
|
||||
|
||||
INBYTE(in_byte);
|
||||
INBYTE(in_byte);
|
||||
|
||||
if (in_byte == RUNCHAR) {
|
||||
INBYTE(in_repeat);
|
||||
if (in_repeat != 0) {
|
||||
info("Orphaned RLE code at start\n");
|
||||
return 1;
|
||||
}
|
||||
OUTBYTE(RUNCHAR);
|
||||
} else {
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
if (in_byte == RUNCHAR) {
|
||||
INBYTE(in_repeat);
|
||||
if (in_repeat != 0) {
|
||||
info("Orphaned RLE code at start\n");
|
||||
return 1;
|
||||
}
|
||||
OUTBYTE(RUNCHAR);
|
||||
} else {
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
|
||||
while (in_len > 0) {
|
||||
INBYTE(in_byte);
|
||||
if (in_len % 1024 == 0)
|
||||
while( in_len > 0 ) {
|
||||
INBYTE(in_byte);
|
||||
if (in_len%1024==0)
|
||||
info(".");
|
||||
if (in_byte == RUNCHAR) {
|
||||
INBYTE(in_repeat);
|
||||
if (in_repeat == 0) {
|
||||
/*
|
||||
* Just an escaped RUNCHAR value
|
||||
*/
|
||||
OUTBYTE(RUNCHAR);
|
||||
} else {
|
||||
/*
|
||||
* Pick up value and output a sequence of it
|
||||
*/
|
||||
in_byte = last_byte; // ;out_data[-1];
|
||||
while (--in_repeat > 0)
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* Normal byte
|
||||
*/
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
if (in_byte == RUNCHAR) {
|
||||
INBYTE(in_repeat);
|
||||
if ( in_repeat == 0 ) {
|
||||
/* Just an escaped RUNCHAR value */
|
||||
OUTBYTE(RUNCHAR);
|
||||
} else {
|
||||
/* Pick up value and output a sequence of it */
|
||||
in_byte = last_byte; //;out_data[-1];
|
||||
while ( --in_repeat > 0 )
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
} else {
|
||||
/* Normal byte */
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
last_byte = in_byte;
|
||||
}
|
||||
}
|
||||
sram_bulk_write_end();
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
uint8_t rle_decode_sram(uint32_t in_addr, int32_t in_len, uint32_t out_addr)
|
||||
{
|
||||
uint8_t in_byte, in_repeat, last_byte;
|
||||
uint32_t out_len, out_len_left;
|
||||
info("RLE decode len=%li addr=0x%08lx\n",in_len,out_addr);
|
||||
last_byte = 0;
|
||||
out_len_left = out_len;
|
||||
#define INBYTE(b) \
|
||||
do { \
|
||||
if ( --in_len < 0 ) { \
|
||||
return 1; \
|
||||
} \
|
||||
b = sram_read(in_addr);\
|
||||
in_addr++;\
|
||||
} while(0)
|
||||
|
||||
#define OUTBYTE(b) \
|
||||
do { \
|
||||
sram_write(out_addr,b);\
|
||||
out_addr++;\
|
||||
} while(0)
|
||||
|
||||
INBYTE(in_byte);
|
||||
|
||||
if (in_byte == RUNCHAR) {
|
||||
INBYTE(in_repeat);
|
||||
if (in_repeat != 0) {
|
||||
info("Orphaned RLE code at start\n");
|
||||
return 1;
|
||||
}
|
||||
OUTBYTE(RUNCHAR);
|
||||
} else {
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
|
||||
while( in_len > 0 ) {
|
||||
INBYTE(in_byte);
|
||||
if (in_len%1024==0)
|
||||
info(".");
|
||||
if (in_byte == RUNCHAR) {
|
||||
INBYTE(in_repeat);
|
||||
if ( in_repeat == 0 ) {
|
||||
/* Just an escaped RUNCHAR value */
|
||||
OUTBYTE(RUNCHAR);
|
||||
} else {
|
||||
/* Pick up value and output a sequence of it */
|
||||
in_byte = last_byte; //;out_data[-1];
|
||||
while ( --in_repeat > 0 )
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
} else {
|
||||
/* Normal byte */
|
||||
OUTBYTE(in_byte);
|
||||
}
|
||||
last_byte = in_byte;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -18,11 +18,12 @@
|
||||
* =====================================================================================
|
||||
*/
|
||||
|
||||
#ifndef __RLE_H__
|
||||
#define __RLE_H__
|
||||
#ifndef __RLE_H__
|
||||
#define __RLE_H__
|
||||
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
uint8_t rle_decode(PGM_VOID_P in_addr, uint32_t in_len, uint32_t out_addr);
|
||||
uint8_t rle_decode(PGM_VOID_P in_addr,uint32_t in_len, uint32_t out_addr);
|
||||
uint8_t rle_decode_sram(uint32_t in_addr, int32_t in_len, uint32_t out_addr);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -19,11 +19,11 @@
|
||||
*
|
||||
* =====================================================================================
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdint.h>
|
||||
#include <util/delay.h>
|
||||
#include <util/delay.h>
|
||||
|
||||
#include "shared_memory.h"
|
||||
#include "config.h"
|
||||
@@ -38,60 +38,55 @@ uint8_t scratchpad_state;
|
||||
uint8_t scratchpad_cmd;
|
||||
uint8_t scratchpad_payload;
|
||||
|
||||
void shared_memory_scratchpad_save()
|
||||
{
|
||||
void shared_memory_scratchpad_save(){
|
||||
scratchpad_state = sram_read(SHARED_MEM_LOC_STATE);
|
||||
scratchpad_cmd = sram_read(SHARED_MEM_LOC_CMD);
|
||||
scratchpad_payload = sram_read(SHARED_MEM_LOC_PAYLOAD);
|
||||
}
|
||||
|
||||
void shared_memory_scratchpad_restore()
|
||||
{
|
||||
void shared_memory_scratchpad_restore(){
|
||||
sram_write(SHARED_MEM_LOC_STATE, scratchpad_state);
|
||||
sram_write(SHARED_MEM_LOC_CMD, scratchpad_cmd);
|
||||
sram_write(SHARED_MEM_LOC_PAYLOAD, scratchpad_payload);
|
||||
}
|
||||
|
||||
void shared_memory_irq_hook()
|
||||
{
|
||||
void shared_memory_irq_hook(){
|
||||
irq_addr_lo = sram_read(SHARED_IRQ_LOC_LO);
|
||||
irq_addr_hi = sram_read(SHARED_IRQ_LOC_HI);
|
||||
sram_write(SHARED_IRQ_HANDLER_LO, 0);
|
||||
sram_write(SHARED_IRQ_HANDLER_HI, 0);
|
||||
}
|
||||
|
||||
void shared_memory_irq_restore()
|
||||
{
|
||||
void shared_memory_irq_restore(){
|
||||
sram_write(SHARED_IRQ_LOC_LO, irq_addr_lo);
|
||||
sram_write(SHARED_IRQ_LOC_HI, irq_addr_hi);
|
||||
}
|
||||
|
||||
void shared_memory_put(uint8_t cmd, uint8_t value)
|
||||
{
|
||||
|
||||
info("Write shared memory 0x%04x=0x%02x 0x%04x=0x%02x \n",
|
||||
SHARED_MEM_LOC_CMD, cmd, SHARED_MEM_LOC_PAYLOAD, value);
|
||||
void shared_memory_put(uint8_t cmd, uint8_t value){
|
||||
|
||||
info("Write shared memory 0x%04x=0x%02x 0x%04x=0x%02x \n",SHARED_MEM_LOC_CMD,cmd,SHARED_MEM_LOC_PAYLOAD,value);
|
||||
|
||||
shared_memory_scratchpad_save();
|
||||
shared_memory_irq_hook();
|
||||
|
||||
sram_write(SHARED_MEM_LOC_STATE, SHARED_MEM_SNES_ACK);
|
||||
sram_write(SHARED_MEM_LOC_CMD, cmd);
|
||||
sram_write(SHARED_MEM_LOC_PAYLOAD, value);
|
||||
|
||||
|
||||
sram_write(SHARED_MEM_LOC_STATE,SHARED_MEM_SNES_ACK);
|
||||
sram_write(SHARED_MEM_LOC_CMD,cmd);
|
||||
sram_write(SHARED_MEM_LOC_PAYLOAD,value);
|
||||
|
||||
snes_hirom();
|
||||
snes_wr_disable();
|
||||
snes_wr_disable();
|
||||
snes_bus_active();
|
||||
_delay_ms(50);
|
||||
|
||||
|
||||
|
||||
|
||||
avr_bus_active();
|
||||
snes_irq_lo();
|
||||
snes_irq_off();
|
||||
snes_lorom();
|
||||
snes_wr_disable();
|
||||
|
||||
snes_wr_disable();
|
||||
|
||||
shared_memory_scratchpad_restore();
|
||||
shared_memory_irq_restore();
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
*
|
||||
* =====================================================================================
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __SHARED_MEMORY_H__
|
||||
#define __SHARED_MEMORY_H__
|
||||
|
||||
|
||||
@@ -2,6 +2,8 @@
|
||||
<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
|
||||
<plist version="1.0">
|
||||
<dict>
|
||||
<key>currentDocument</key>
|
||||
<string>avr/usbload/loader.c</string>
|
||||
<key>documents</key>
|
||||
<array>
|
||||
<dict>
|
||||
@@ -19,6 +21,646 @@
|
||||
<integer>271</integer>
|
||||
<key>metaData</key>
|
||||
<dict>
|
||||
<key>avr/bootloader/bootloader.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>2</integer>
|
||||
<key>line</key>
|
||||
<integer>161</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>139</integer>
|
||||
</dict>
|
||||
<key>avr/bootloader/config.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>15</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/bootloader/usbconfig.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>39</integer>
|
||||
<key>line</key>
|
||||
<integer>50</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/Makefile</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>5</integer>
|
||||
<key>line</key>
|
||||
<integer>14</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/commandline/Makefile</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>24</integer>
|
||||
</dict>
|
||||
<key>columnSelection</key>
|
||||
<false/>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
<key>selectFrom</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>selectTo</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>24</integer>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>avr/usbload/commandline/opendevice.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>columnSelection</key>
|
||||
<false/>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
<key>selectFrom</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>selectTo</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>3</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>avr/usbload/commandline/opendevice.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>3</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/commandline/snesuploader.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>3</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/commandline/snesuploader.ll</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>36</integer>
|
||||
<key>line</key>
|
||||
<integer>9</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/config.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>20</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/crc.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/crc.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/debug.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/debug.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>columnSelection</key>
|
||||
<false/>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
<key>selectFrom</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>21</integer>
|
||||
</dict>
|
||||
<key>selectTo</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>avr/usbload/dump.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/dump.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/fifo.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/fifo.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>21</integer>
|
||||
</dict>
|
||||
<key>columnSelection</key>
|
||||
<false/>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
<key>selectFrom</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>selectTo</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>21</integer>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>avr/usbload/huffman-decode.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>1</integer>
|
||||
<key>line</key>
|
||||
<integer>15</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/huffman-decode.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>1</integer>
|
||||
<key>line</key>
|
||||
<integer>15</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/loader.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>1843</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/main.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>483</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>431</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/requests.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/rle.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>15</integer>
|
||||
<key>line</key>
|
||||
<integer>36</integer>
|
||||
</dict>
|
||||
<key>columnSelection</key>
|
||||
<false/>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>20</integer>
|
||||
<key>selectFrom</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>10</integer>
|
||||
<key>line</key>
|
||||
<integer>36</integer>
|
||||
</dict>
|
||||
<key>selectTo</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>17</integer>
|
||||
<key>line</key>
|
||||
<integer>36</integer>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>avr/usbload/rle.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>14</integer>
|
||||
<key>line</key>
|
||||
<integer>21</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/sram.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/sram.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/timer.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/timer.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>1</integer>
|
||||
<key>line</key>
|
||||
<integer>9</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/uart.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/uart.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/usb_bulk.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/usb_bulk.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/usbconfig.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/watchdog.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>avr/usbload/watchdog.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>19</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>poc/avr_sdcard/fat.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>poc/avr_sdcard/mmc.h</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>scripts/dev_server.py</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>60</integer>
|
||||
<key>line</key>
|
||||
<integer>33</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>scripts/link_webpy.sh</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>snes/banktest/LoadGraphics.asm</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
@@ -47,7 +689,138 @@
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>211</integer>
|
||||
</dict>
|
||||
<key>snes/loader/conv_rle.py</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>18</integer>
|
||||
<key>line</key>
|
||||
<integer>8</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>snes/loader/main.asm</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>4</integer>
|
||||
<key>line</key>
|
||||
<integer>235</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>220</integer>
|
||||
</dict>
|
||||
<key>snes/loader/makefile</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>25</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>snes/loader/routines/memoryclear.asm</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>2</integer>
|
||||
<key>line</key>
|
||||
<integer>127</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>101</integer>
|
||||
</dict>
|
||||
<key>snes/loader/routines/songs.asm</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>9</integer>
|
||||
<key>line</key>
|
||||
<integer>14</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>0</integer>
|
||||
</dict>
|
||||
<key>snes/loadertest/main.c</key>
|
||||
<dict>
|
||||
<key>caret</key>
|
||||
<dict>
|
||||
<key>column</key>
|
||||
<integer>0</integer>
|
||||
<key>line</key>
|
||||
<integer>80</integer>
|
||||
</dict>
|
||||
<key>firstVisibleColumn</key>
|
||||
<integer>0</integer>
|
||||
<key>firstVisibleLine</key>
|
||||
<integer>42</integer>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>openDocuments</key>
|
||||
<array>
|
||||
<string>avr/usbload/huffman-decode.c</string>
|
||||
<string>scripts/link_webpy.sh</string>
|
||||
<string>avr/usbload/huffman-decode.h</string>
|
||||
<string>avr/usbload/rle.c</string>
|
||||
<string>avr/usbload/sram.c</string>
|
||||
<string>avr/usbload/rle.h</string>
|
||||
<string>avr/usbload/crc.c</string>
|
||||
<string>avr/usbload/crc.h</string>
|
||||
<string>avr/usbload/main.c</string>
|
||||
<string>avr/usbload/requests.h</string>
|
||||
<string>avr/usbload/fifo.c</string>
|
||||
<string>snes/loadertest/main.c</string>
|
||||
<string>avr/usbload/usb_bulk.c</string>
|
||||
<string>avr/usbload/usb_bulk.h</string>
|
||||
<string>avr/usbload/usbconfig.h</string>
|
||||
<string>avr/usbload/watchdog.c</string>
|
||||
<string>avr/usbload/commandline/opendevice.c</string>
|
||||
<string>avr/usbload/commandline/Makefile</string>
|
||||
<string>avr/usbload/commandline/snesuploader.c</string>
|
||||
<string>avr/usbload/commandline/snesuploader.ll</string>
|
||||
<string>avr/usbload/watchdog.h</string>
|
||||
<string>avr/usbload/loader.c</string>
|
||||
<string>scripts/dev_server.py</string>
|
||||
<string>snes/loader/makefile</string>
|
||||
<string>snes/loader/conv_rle.py</string>
|
||||
<string>avr/usbload/dump.c</string>
|
||||
<string>snes/loader/routines/songs.asm</string>
|
||||
<string>snes/loader/routines/memoryclear.asm</string>
|
||||
<string>snes/loader/main.asm</string>
|
||||
<string>avr/usbload/fifo.h</string>
|
||||
<string>avr/usbload/debug.h</string>
|
||||
<string>avr/usbload/dump.h</string>
|
||||
<string>avr/usbload/commandline/opendevice.h</string>
|
||||
<string>avr/usbload/timer.c</string>
|
||||
<string>avr/usbload/timer.h</string>
|
||||
<string>avr/usbload/uart.c</string>
|
||||
<string>avr/usbload/uart.h</string>
|
||||
<string>avr/usbload/sram.h</string>
|
||||
<string>avr/usbload/config.h</string>
|
||||
<string>avr/usbload/debug.c</string>
|
||||
<string>avr/usbload/Makefile</string>
|
||||
<string>avr/bootloader/bootloader.c</string>
|
||||
<string>avr/bootloader/usbconfig.h</string>
|
||||
<string>avr/bootloader/config.h</string>
|
||||
</array>
|
||||
<key>showFileHierarchyDrawer</key>
|
||||
<false/>
|
||||
<key>showFileHierarchyPanel</key>
|
||||
@@ -66,27 +839,27 @@
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict>
|
||||
<key>usbload</key>
|
||||
<key>bootloader</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict/>
|
||||
</dict>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>poc</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict>
|
||||
<key>avr_sdcard</key>
|
||||
<key>usbload</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict/>
|
||||
<dict>
|
||||
<key>commandline</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict/>
|
||||
</dict>
|
||||
</dict>
|
||||
</dict>
|
||||
</dict>
|
||||
</dict>
|
||||
@@ -98,41 +871,12 @@
|
||||
<dict/>
|
||||
</dict>
|
||||
<key>snes</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict/>
|
||||
</dict>
|
||||
<key>tools</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict>
|
||||
<key>ff</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict/>
|
||||
</dict>
|
||||
<key>ffsample</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict>
|
||||
<key>avr</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
<key>subItems</key>
|
||||
<dict/>
|
||||
</dict>
|
||||
</dict>
|
||||
</dict>
|
||||
<key>huffman</key>
|
||||
<key>loader</key>
|
||||
<dict>
|
||||
<key>isExpanded</key>
|
||||
<true/>
|
||||
|
||||
@@ -5,7 +5,7 @@ import time
|
||||
|
||||
|
||||
LEN = 2**16
|
||||
huffman = False
|
||||
|
||||
TARGET="/Users/david/Devel/arch/avr/code/quickdev16/avr/usbload"
|
||||
HUFFMAN_ENCODER="/Users/david/Devel/arch/avr/code/quickdev16/tools/huffman/huffman-encode"
|
||||
data = open(sys.argv[1],"r").read()
|
||||
@@ -15,21 +15,19 @@ print "Use %i bytes" % (len(data))
|
||||
data = binascii.rlecode_hqx(data)
|
||||
print "RLE crunch (%i) bytes" % (len(data))
|
||||
|
||||
binfile = open("/tmp/loader.rle","w")
|
||||
binfile.write(data)
|
||||
binfile.close()
|
||||
rle_size = len(data)
|
||||
huffman_size = 0
|
||||
|
||||
if huffman == True:
|
||||
binfile = open("/tmp/loader.rle","w")
|
||||
binfile.write(data)
|
||||
binfile.close()
|
||||
cmd = "%s /tmp/loader.rle" % HUFFMAN_ENCODER
|
||||
os.system(cmd)
|
||||
data = open("/tmp/loader.rle.hfm","r").read()
|
||||
print "HUFFMAN crunch (%i) bytes" % (len(data))
|
||||
huffman_size = len(data)
|
||||
|
||||
cmd = "%s /tmp/loader.rle" % HUFFMAN_ENCODER
|
||||
os.system(cmd)
|
||||
data = open("/tmp/loader.rle.hfm","r").read()
|
||||
print "HUFFMAN crunch (%i) bytes" % (len(data))
|
||||
huffman_size = len(data)
|
||||
os.unlink("/tmp/loader.rle")
|
||||
os.unlink("/tmp/loader.rle.hfm")
|
||||
os.unlink("/tmp/loader.rle")
|
||||
os.unlink("/tmp/loader.rle.hfm")
|
||||
|
||||
cfile = open("/tmp/loader.c","w")
|
||||
hfile = open("/tmp/loader.h","w")
|
||||
|
||||
Reference in New Issue
Block a user