80 lines
2.5 KiB
C
80 lines
2.5 KiB
C
#include "data.h"
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byte tileMapLocation[4];
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word characterLocation[4];
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void waitForVBlank(void) {
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byte Status;
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do {
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Status = *(byte*)0x4210;
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} while (!(Status & 0x80));
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}
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void setTileMapLocation(word vramDst, byte screenProp, byte bgNumber) {
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tileMapLocation[bgNumber] = ((vramDst >> 8) & 0xfc) | ( screenProp & 0x03 );
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*(byte*) (0x2107+bgNumber) = tileMapLocation[bgNumber];
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}
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void restoreTileMapLocation(byte bgNumber) {
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*(byte*) (0x2107+bgNumber) = tileMapLocation[bgNumber];
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}
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void setCharacterLocation(word vramDst, byte bgNumber) {
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characterLocation[bgNumber] = vramDst;
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if(bgNumber < 2) {
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*(byte*) 0x210b = (characterLocation[1] >> 8 & 0xf0 ) + (characterLocation[0] >> 12);
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} else {
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*(byte*) 0x210c = (characterLocation[3] >> 8 & 0xf0 ) + (characterLocation[2] >> 12);
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}
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}
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void restoreCharacterLocation(byte bgNumber) {
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setCharacterLocation(characterLocation[bgNumber], bgNumber);
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}
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void VRAMByteWrite(byte value, word vramDst) {
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*(byte*)0x2115 = 0x80;
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*(word*)0x2116 = vramDst;
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*(byte*)0x2118 = value;
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}
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void VRAMLoad(word src, word vramDst, word size) {
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// set address in VRam for read or write ($2116) + block size transfer ($2115)
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*(byte*)0x2115 = 0x80;
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*(word*)0x2116 = vramDst;
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*(word*)0x4300 = 0x1801; // set DMA control register (1 word inc)
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// and destination ($21xx xx -> 0x18)
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*(word*)0x4302 = src; // DMA channel x source address offset
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// (low $4302 and high $4303 optimisation)
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*(byte*)0x4304 = 0x01; // DMA channel x source address bank
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*(word*)0x4305 = size; // DMA channel x transfer size
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// (low $4305 and high $4306 optimisation)
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// Turn on DMA transfer for this channel
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waitForVBlank();
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*(byte*)0x2100 = 0x80;
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*(byte*)0x420b = 0x01;
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*(byte*)0x2100 = 0x00;
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}
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void CGRAMLoad(word src, byte cgramDst, word size) {
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// set address in VRam for read or write + block size
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*(byte*)0x2121 = cgramDst;
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*(word*)0x4300 = 0x2200; // set DMA control register (1 byte inc)
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// and destination ($21xx xx -> 022)
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*(word*)0x4302 = src; // DMA channel x source address offset
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// (low $4302 and high $4303 optimisation)
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*(byte*)0x4304 = 0x01; // DMA channel x source address bank
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*(word*)0x4305 = size; // DMA channel x transfer size
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// (low $4305 and high $4306 optimisation)
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// Turn on DMA transfer for this channel
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waitForVBlank();
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*(byte*)0x2100 = 0x80;
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*(byte*)0x420b = 0x01;
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*(byte*)0x2100 = 0x00;
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} |