This commit is contained in:
Maximilian Rehkopf 2010-05-18 15:28:34 +02:00
parent d0d2c16fde
commit 523e6b76b8
19 changed files with 1618 additions and 1114 deletions

File diff suppressed because it is too large Load Diff

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:00:15 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 01:59:09 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -915,73 +915,73 @@ SNES_REFRESH
Text GLabel 11350 5950 2 50 Input ~ 0
SNES_SYS_CLK
$Comp
L GND #PWR085
L GND #PWR086
U 1 1 4BADE94E
P 5800 2000
F 0 "#PWR085" H 5800 2000 30 0001 C CNN
F 0 "#PWR086" H 5800 2000 30 0001 C CNN
F 1 "GND" H 5800 1930 30 0001 C CNN
1 5800 2000
0 1 1 0
$EndComp
$Comp
L GND #PWR086
L GND #PWR087
U 1 1 4BADE8CE
P 8450 10900
F 0 "#PWR086" H 8450 10900 30 0001 C CNN
F 0 "#PWR087" H 8450 10900 30 0001 C CNN
F 1 "GND" H 8450 10830 30 0001 C CNN
1 8450 10900
1 0 0 -1
$EndComp
$Comp
L +1.2V #PWR087
L +1.2V #PWR088
U 1 1 4BADD09D
P 4350 10200
F 0 "#PWR087" H 4350 10340 20 0001 C CNN
F 0 "#PWR088" H 4350 10340 20 0001 C CNN
F 1 "+1.2V" H 4350 10310 30 0000 C CNN
1 4350 10200
1 0 0 -1
$EndComp
$Comp
L +2.5V #PWR088
L +2.5V #PWR089
U 1 1 4BADD090
P 3000 10200
F 0 "#PWR088" H 3000 10150 20 0001 C CNN
F 0 "#PWR089" H 3000 10150 20 0001 C CNN
F 1 "+2.5V" H 3000 10300 30 0000 C CNN
1 3000 10200
1 0 0 -1
$EndComp
$Comp
L GND #PWR089
L GND #PWR090
U 1 1 4BADD08B
P 4350 11100
F 0 "#PWR089" H 4350 11100 30 0001 C CNN
F 0 "#PWR090" H 4350 11100 30 0001 C CNN
F 1 "GND" H 4350 11030 30 0001 C CNN
1 4350 11100
1 0 0 -1
$EndComp
$Comp
L GND #PWR090
L GND #PWR091
U 1 1 4BADD089
P 3000 11100
F 0 "#PWR090" H 3000 11100 30 0001 C CNN
F 0 "#PWR091" H 3000 11100 30 0001 C CNN
F 1 "GND" H 3000 11030 30 0001 C CNN
1 3000 11100
1 0 0 -1
$EndComp
$Comp
L GND #PWR091
L GND #PWR092
U 1 1 4BADD072
P 650 11100
F 0 "#PWR091" H 650 11100 30 0001 C CNN
F 0 "#PWR092" H 650 11100 30 0001 C CNN
F 1 "GND" H 650 11030 30 0001 C CNN
1 650 11100
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR092
L +3.3V #PWR093
U 1 1 4BADD05C
P 650 10200
F 0 "#PWR092" H 650 10160 30 0001 C CNN
F 0 "#PWR093" H 650 10160 30 0001 C CNN
F 1 "+3.3V" H 650 10310 30 0000 C CNN
1 650 10200
1 0 0 -1
@ -1124,28 +1124,28 @@ $EndComp
Text Notes 6550 1300 0 50 ~ 0
JTAG
$Comp
L +3.3V #PWR093
L +3.3V #PWR094
U 1 1 4BAD12D2
P 7650 800
F 0 "#PWR093" H 7650 760 30 0001 C CNN
F 0 "#PWR094" H 7650 760 30 0001 C CNN
F 1 "+3.3V" H 7650 910 30 0000 C CNN
1 7650 800
1 0 0 -1
$EndComp
$Comp
L +2.5V #PWR094
L +2.5V #PWR095
U 1 1 4BAD12BE
P 9050 800
F 0 "#PWR094" H 9050 750 20 0001 C CNN
F 0 "#PWR095" H 9050 750 20 0001 C CNN
F 1 "+2.5V" H 9050 900 30 0000 C CNN
1 9050 800
1 0 0 -1
$EndComp
$Comp
L +1.2V #PWR095
L +1.2V #PWR096
U 1 1 4BAD12B4
P 9650 800
F 0 "#PWR095" H 9650 940 20 0001 C CNN
F 0 "#PWR096" H 9650 940 20 0001 C CNN
F 1 "+1.2V" H 9650 910 30 0000 C CNN
1 9650 800
1 0 0 -1

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:01:32 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 03:12:12 PM CEST
LIBS:power
LIBS:device
LIBS:transistors

View File

@ -1,4 +1,4 @@
PCBNEW-LibModule-V1 Sun 16 May 2010 04:45:27 PM CEST
PCBNEW-LibModule-V1 Sun 16 May 2010 05:08:51 PM CEST
$INDEX
TSSOP48
PQFP208_ALTPADS
@ -3718,21 +3718,75 @@ Po 5300 500
$EndPAD
$EndMODULE BT_KEYSTONE_1059_20MM
$MODULE USB-MINIB-THT
Po 0 0 0 15 4BF00500 00000000 ~~
Po 0 0 0 15 4BF00A7D 00000000 ~~
Li USB-MINIB-THT
Sc 00000000
AR
Op 0 0 0
T0 0 0 300 300 0 60 N V 21 N"USB-MINIB-THT"
T1 0 0 300 300 0 60 N V 21 N"VAL**"
DS -492 1181 492 1181 40 21
DS 492 1181 492 1732 40 21
DS 492 1732 -492 1732 40 21
DS -492 1732 -492 1181 40 21
DS -492 -1181 492 -1181 40 21
DS 492 -1181 492 -1732 40 21
DS 492 -1732 -492 -1732 40 21
DS -492 -1732 -492 -1181 40 21
DS -2146 1220 -1988 1063 40 24
DS -2539 1220 -1988 669 40 24
DS -1988 276 -2933 1220 40 24
DS -1988 -118 -3248 1142 40 24
DS -3248 748 -1988 -512 40 24
DS -3248 354 -1988 -906 40 24
DS -2067 -1220 -3248 -39 40 24
DS -3248 -433 -2461 -1220 40 24
DS -2854 -1220 -3248 -827 40 24
DS -3248 -1220 -1988 -1220 40 24
DS -1988 -1220 -1988 1220 40 24
DS -1988 1220 -3248 1220 40 24
DS -3248 1220 -3248 -1220 40 24
DS -39 807 -39 1220 40 24
DS -39 1220 79 1220 40 24
DS 79 1220 79 1417 40 24
DS 79 1417 256 1417 40 24
DS 256 1417 256 1535 40 24
DS 256 1535 -1220 1535 40 24
DS -1220 1535 -3091 1535 40 24
DS -3091 1535 -3091 -1535 40 24
DS -3091 -1535 256 -1535 40 24
DS 256 -1535 256 -1417 40 24
DS 256 -1417 79 -1417 40 24
DS 79 -1417 79 -1220 40 24
DS 79 -1220 -39 -1220 40 24
DS -39 -1220 -39 -807 40 24
DS -39 571 236 571 40 24
DS 236 571 236 689 40 24
DS 236 689 -39 689 40 24
DS -39 -59 236 -59 40 24
DS 236 -59 236 59 40 24
DS 236 59 -39 59 40 24
DS -39 -689 236 -689 40 24
DS 236 -689 236 -571 40 24
DS 236 -571 -39 -571 40 24
DS -39 -807 -39 807 40 24
DS -39 1220 -39 807 40 21
DS -39 -1220 -39 -807 40 21
DS 256 -1535 -1220 -1535 40 21
DS -3091 -1535 -2323 -1535 40 21
DS 256 1535 -1220 1535 40 21
DS -3091 1535 -2323 1535 40 21
DS 139 1417 80 1417 40 21
DS 80 1417 80 1220 40 21
DS 80 1220 -39 1220 40 21
DS -40 -1220 79 -1220 40 21
DS 79 -1220 79 -1398 40 21
DS 79 -1398 79 -1417 40 21
DS 79 -1417 256 -1417 40 21
DS 256 -1417 256 -1535 40 21
DS -3091 -1535 -3091 1535 40 21
DS 257 1535 257 1417 40 21
DS 257 1417 139 1417 40 21
DS -492 1181 492 1181 40 24
DS 492 1181 492 1732 40 24
DS 492 1732 -492 1732 40 24
DS -492 1732 -492 1181 40 24
DS -492 -1181 492 -1181 40 24
DS 492 -1181 492 -1732 40 24
DS 492 -1732 -492 -1732 40 24
DS -492 -1732 -492 -1181 40 24
$PAD
Sh "2" C 394 394 0 0 0
Dr 276 0 0

View File

@ -1,4 +1,4 @@
PCBNEW-LibDoc----V1 Sun 16 May 2010 05:08:51 PM CEST
PCBNEW-LibDoc----V1 Tue 18 May 2010 01:12:03 PM CEST
#
$MODULE PQFP208_ALTPADS
Li PQFP208_ALTPADS

View File

@ -1,4 +1,4 @@
PCBNEW-LibModule-V1 Sun 16 May 2010 05:08:51 PM CEST
PCBNEW-LibModule-V1 Tue 18 May 2010 01:12:03 PM CEST
$INDEX
TSSOP48
PQFP208_ALTPADS
@ -2828,272 +2828,6 @@ Ne 0 ""
Po 1033 -738
$EndPAD
$EndMODULE VFBGA48
$MODULE VFBGA36
Po 0 0 0 15 4BAA885C 00000000 ~~
Li VFBGA36
Sc 00000000
AR
Op 0 0 0
T0 0 0 600 600 0 120 N V 21 N"Test"
T1 0 0 600 600 0 120 N V 21 N"VAL**"
DS -1574 -1181 1574 -1181 47 21
DS 1574 -1181 1574 1181 47 21
DS -1574 1181 1574 1181 47 21
DS -1574 -1181 -1574 1181 47 21
DS -1574 1039 -1433 1181 47 21
$PAD
Sh "A1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 738
$EndPAD
$PAD
Sh "B1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 738
$EndPAD
$PAD
Sh "C1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 738
$EndPAD
$PAD
Sh "D1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -147 738
$EndPAD
$PAD
Sh "E1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 147 738
$EndPAD
$PAD
Sh "F1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 738
$EndPAD
$PAD
Sh "G1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 738
$EndPAD
$PAD
Sh "H1" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 738
$EndPAD
$PAD
Sh "A2" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 442
$EndPAD
$PAD
Sh "B2" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 442
$EndPAD
$PAD
Sh "G2" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 442
$EndPAD
$PAD
Sh "H2" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 442
$EndPAD
$PAD
Sh "A3" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 147
$EndPAD
$PAD
Sh "B3" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 147
$EndPAD
$PAD
Sh "C3" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 147
$EndPAD
$PAD
Sh "F3" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 147
$EndPAD
$PAD
Sh "G3" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 147
$EndPAD
$PAD
Sh "H3" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 147
$EndPAD
$PAD
Sh "A4" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 -147
$EndPAD
$PAD
Sh "B4" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 -147
$EndPAD
$PAD
Sh "C4" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 -147
$EndPAD
$PAD
Sh "F4" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 -147
$EndPAD
$PAD
Sh "G4" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 -147
$EndPAD
$PAD
Sh "H4" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 -147
$EndPAD
$PAD
Sh "A5" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 -442
$EndPAD
$PAD
Sh "B5" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 -442
$EndPAD
$PAD
Sh "G5" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 -442
$EndPAD
$PAD
Sh "H5" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 -442
$EndPAD
$PAD
Sh "A6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 -738
$EndPAD
$PAD
Sh "B6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 -738
$EndPAD
$PAD
Sh "C6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 -738
$EndPAD
$PAD
Sh "D6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -147 -738
$EndPAD
$PAD
Sh "E6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 147 -738
$EndPAD
$PAD
Sh "F6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 -738
$EndPAD
$PAD
Sh "G6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 -738
$EndPAD
$PAD
Sh "H6" O 118 118 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 -738
$EndPAD
$EndMODULE VFBGA36
$MODULE TSSOP10
Po 0 0 0 15 00000000 00000000 ~~
Li TSSOP10
@ -3721,7 +3455,7 @@ $MODULE USB-MINIB-THT
Po 0 0 0 15 4BF00A7D 00000000 ~~
Li USB-MINIB-THT
Sc 00000000
AR
AR
Op 0 0 0
T0 0 0 300 300 0 60 N V 21 N"USB-MINIB-THT"
T1 0 0 300 300 0 60 N V 21 N"VAL**"
@ -3837,4 +3571,270 @@ Ne 0 ""
Po -1772 1437
$EndPAD
$EndMODULE USB-MINIB-THT
$MODULE VFBGA36
Po 0 0 0 15 4BF275F6 00000000 ~~
Li VFBGA36
Sc 00000000
AR
Op 0 0 0
T0 0 0 600 600 0 120 N V 21 N"Test"
T1 0 0 600 600 0 120 N V 21 N"VAL**"
DS -1574 -1181 1574 -1181 47 21
DS 1574 -1181 1574 1181 47 21
DS -1574 1181 1574 1181 47 21
DS -1574 -1181 -1574 1181 47 21
DS -1574 1039 -1433 1181 47 21
$PAD
Sh "A1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 738
$EndPAD
$PAD
Sh "B1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 738
$EndPAD
$PAD
Sh "C1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 738
$EndPAD
$PAD
Sh "D1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -147 738
$EndPAD
$PAD
Sh "E1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 147 738
$EndPAD
$PAD
Sh "F1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 738
$EndPAD
$PAD
Sh "G1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 738
$EndPAD
$PAD
Sh "H1" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 738
$EndPAD
$PAD
Sh "A2" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 442
$EndPAD
$PAD
Sh "B2" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 442
$EndPAD
$PAD
Sh "G2" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 442
$EndPAD
$PAD
Sh "H2" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 442
$EndPAD
$PAD
Sh "A3" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 147
$EndPAD
$PAD
Sh "B3" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 147
$EndPAD
$PAD
Sh "C3" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 147
$EndPAD
$PAD
Sh "F3" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 147
$EndPAD
$PAD
Sh "G3" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 147
$EndPAD
$PAD
Sh "H3" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 147
$EndPAD
$PAD
Sh "A4" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 -147
$EndPAD
$PAD
Sh "B4" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 -147
$EndPAD
$PAD
Sh "C4" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 -147
$EndPAD
$PAD
Sh "F4" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 -147
$EndPAD
$PAD
Sh "G4" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 -147
$EndPAD
$PAD
Sh "H4" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 -147
$EndPAD
$PAD
Sh "A5" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 -442
$EndPAD
$PAD
Sh "B5" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 -442
$EndPAD
$PAD
Sh "G5" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 -442
$EndPAD
$PAD
Sh "H5" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 -442
$EndPAD
$PAD
Sh "A6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1033 -738
$EndPAD
$PAD
Sh "B6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -738 -738
$EndPAD
$PAD
Sh "C6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -442 -738
$EndPAD
$PAD
Sh "D6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -147 -738
$EndPAD
$PAD
Sh "E6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 147 -738
$EndPAD
$PAD
Sh "F6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 442 -738
$EndPAD
$PAD
Sh "G6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 738 -738
$EndPAD
$PAD
Sh "H6" O 114 114 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1033 -738
$EndPAD
$EndMODULE VFBGA36
$EndLIBRARY

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:00:15 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 01:59:09 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -247,10 +247,10 @@ Wire Wire Line
9100 4700 9000 4700
Connection ~ 9000 4700
$Comp
L GND #PWR041
L GND #PWR042
U 1 1 4BF0021F
P 9000 5000
F 0 "#PWR041" H 9000 5000 30 0001 C CNN
F 0 "#PWR042" H 9000 5000 30 0001 C CNN
F 1 "GND" H 9000 4930 30 0001 C CNN
1 9000 5000
1 0 0 -1
@ -265,10 +265,10 @@ F 1 "USB_MINIB" H 9650 4100 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR042
L GND #PWR043
U 1 1 4BEFBCAA
P 1000 6850
F 0 "#PWR042" H 1000 6850 30 0001 C CNN
F 0 "#PWR043" H 1000 6850 30 0001 C CNN
F 1 "GND" H 1000 6780 30 0001 C CNN
1 1000 6850
-1 0 0 -1
@ -323,37 +323,37 @@ SNES_/RESET
Text GLabel 6800 2400 2 50 Output ~ 0
CIC_MCLR
$Comp
L GND #PWR043
L GND #PWR044
U 1 1 4BEECBF1
P 2900 6850
F 0 "#PWR043" H 2900 6850 30 0001 C CNN
F 0 "#PWR044" H 2900 6850 30 0001 C CNN
F 1 "GND" H 2900 6780 30 0001 C CNN
1 2900 6850
-1 0 0 -1
$EndComp
$Comp
L GND #PWR044
L GND #PWR045
U 1 1 4BEECBEF
P 2300 6850
F 0 "#PWR044" H 2300 6850 30 0001 C CNN
F 0 "#PWR045" H 2300 6850 30 0001 C CNN
F 1 "GND" H 2300 6780 30 0001 C CNN
1 2300 6850
-1 0 0 -1
$EndComp
$Comp
L GND #PWR045
L GND #PWR046
U 1 1 4BEECBEE
P 2000 6850
F 0 "#PWR045" H 2000 6850 30 0001 C CNN
F 0 "#PWR046" H 2000 6850 30 0001 C CNN
F 1 "GND" H 2000 6780 30 0001 C CNN
1 2000 6850
-1 0 0 -1
$EndComp
$Comp
L GND #PWR046
L GND #PWR047
U 1 1 4BEECBE5
P 1400 6850
F 0 "#PWR046" H 1400 6850 30 0001 C CNN
F 0 "#PWR047" H 1400 6850 30 0001 C CNN
F 1 "GND" H 1400 6780 30 0001 C CNN
1 1400 6850
-1 0 0 -1
@ -433,73 +433,73 @@ F 1 "12MHz" H 1700 6050 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR047
L GND #PWR048
U 1 1 4BB8BBE8
P 10200 3900
F 0 "#PWR047" H 10200 3900 30 0001 C CNN
F 0 "#PWR048" H 10200 3900 30 0001 C CNN
F 1 "GND" H 10200 3830 30 0001 C CNN
1 10200 3900
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR048
L +3.3V #PWR049
U 1 1 4BB8BBD6
P 10200 2650
F 0 "#PWR048" H 10200 2610 30 0001 C CNN
F 0 "#PWR049" H 10200 2610 30 0001 C CNN
F 1 "+3.3V" H 10200 2760 30 0000 C CNN
1 10200 2650
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR049
L +3.3V #PWR050
U 1 1 4BB8BB64
P 4450 1450
F 0 "#PWR049" H 4450 1410 30 0001 C CNN
F 0 "#PWR050" H 4450 1410 30 0001 C CNN
F 1 "+3.3V" H 4450 1560 30 0000 C CNN
1 4450 1450
-1 0 0 -1
$EndComp
$Comp
L GND #PWR050
L GND #PWR051
U 1 1 4BB8BB56
P 4250 6850
F 0 "#PWR050" H 4250 6850 30 0001 C CNN
F 0 "#PWR051" H 4250 6850 30 0001 C CNN
F 1 "GND" H 4250 6780 30 0001 C CNN
1 4250 6850
-1 0 0 -1
$EndComp
$Comp
L +BATT #PWR051
L +BATT #PWR052
U 1 1 4BB8AE61
P 4150 1450
F 0 "#PWR051" H 4150 1400 20 0001 C CNN
F 0 "#PWR052" H 4150 1400 20 0001 C CNN
F 1 "+BATT" H 4150 1550 30 0000 C CNN
1 4150 1450
-1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR052
L +3.3V #PWR053
U 1 1 4BB8AE12
P 5050 1450
F 0 "#PWR052" H 5050 1410 30 0001 C CNN
F 0 "#PWR053" H 5050 1410 30 0001 C CNN
F 1 "+3.3V" H 5050 1560 30 0000 C CNN
1 5050 1450
-1 0 0 -1
$EndComp
$Comp
L GND #PWR053
L GND #PWR054
U 1 1 4BAF2DEB
P 4450 6850
F 0 "#PWR053" H 4450 6850 30 0001 C CNN
F 0 "#PWR054" H 4450 6850 30 0001 C CNN
F 1 "GND" H 4450 6780 30 0001 C CNN
1 4450 6850
-1 0 0 -1
$EndComp
$Comp
L GND #PWR054
L GND #PWR055
U 1 1 4BAF2DE3
P 4900 6850
F 0 "#PWR054" H 4900 6850 30 0001 C CNN
F 0 "#PWR055" H 4900 6850 30 0001 C CNN
F 1 "GND" H 4900 6780 30 0001 C CNN
1 4900 6850
-1 0 0 -1

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:01:32 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 03:12:12 PM CEST
LIBS:power
LIBS:device
LIBS:transistors

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:01:32 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 03:12:12 PM CEST
LIBS:power
LIBS:device
LIBS:transistors

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:00:15 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 01:59:09 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -211,19 +211,19 @@ CIC_STATUS
Text Label 7400 2650 0 50 ~ 0
CIC_CLK
$Comp
L +BATT #PWR055
L +BATT #PWR056
U 1 1 4BAF2EDB
P 5450 6100
F 0 "#PWR055" H 5450 6050 20 0001 C CNN
F 0 "#PWR056" H 5450 6050 20 0001 C CNN
F 1 "+BATT" H 5450 6200 30 0000 C CNN
1 5450 6100
1 0 0 -1
$EndComp
$Comp
L GND #PWR056
L GND #PWR057
U 1 1 4BAF2ED2
P 6450 6300
F 0 "#PWR056" H 6450 6300 30 0001 C CNN
F 0 "#PWR057" H 6450 6300 30 0001 C CNN
F 1 "GND" H 6450 6230 30 0001 C CNN
1 6450 6300
1 0 0 -1
@ -238,10 +238,10 @@ F 1 "BATTERY" H 5950 6010 50 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR057
L GND #PWR058
U 1 1 4BADC749
P 10700 6200
F 0 "#PWR057" H 10700 6200 30 0001 C CNN
F 0 "#PWR058" H 10700 6200 30 0001 C CNN
F 1 "GND" H 10700 6130 30 0001 C CNN
1 10700 6200
1 0 0 -1
@ -256,28 +256,28 @@ F 1 "100n" H 10750 5800 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR058
L +3.3V #PWR059
U 1 1 4BADC711
P 10700 5600
F 0 "#PWR058" H 10700 5560 30 0001 C CNN
F 0 "#PWR059" H 10700 5560 30 0001 C CNN
F 1 "+3.3V" H 10700 5710 30 0000 C CNN
1 10700 5600
1 0 0 -1
$EndComp
$Comp
L GND #PWR059
L GND #PWR060
U 1 1 4BAD0CFA
P 8400 6450
F 0 "#PWR059" H 8400 6450 30 0001 C CNN
F 0 "#PWR060" H 8400 6450 30 0001 C CNN
F 1 "GND" H 8400 6380 30 0001 C CNN
1 8400 6450
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR060
L +3.3V #PWR061
U 1 1 4BAD0CEA
P 8400 4700
F 0 "#PWR060" H 8400 4660 30 0001 C CNN
F 0 "#PWR061" H 8400 4660 30 0001 C CNN
F 1 "+3.3V" H 8400 4810 30 0000 C CNN
1 8400 4700
1 0 0 -1
@ -294,10 +294,10 @@ F 1 "CS4344" H 8600 5150 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR061
L GND #PWR062
U 1 1 4BADC745
P 10700 3500
F 0 "#PWR061" H 10700 3500 30 0001 C CNN
F 0 "#PWR062" H 10700 3500 30 0001 C CNN
F 1 "GND" H 10700 3430 30 0001 C CNN
1 10700 3500
1 0 0 -1
@ -312,10 +312,10 @@ F 1 "100n" H 10750 3100 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L +5V #PWR062
L +5V #PWR063
U 1 1 4BADC709
P 10700 2900
F 0 "#PWR062" H 10700 2990 20 0001 C CNN
F 0 "#PWR063" H 10700 2990 20 0001 C CNN
F 1 "+5V" H 10700 2990 30 0000 C CNN
1 10700 2900
1 0 0 -1
@ -333,19 +333,19 @@ CIC_STATUS
Text GLabel 7300 2650 0 60 Input ~ 0
CIC_CLK
$Comp
L GND #PWR063
L GND #PWR064
U 1 1 4BAD0C41
P 9450 2450
F 0 "#PWR063" H 9450 2450 30 0001 C CNN
F 0 "#PWR064" H 9450 2450 30 0001 C CNN
F 1 "GND" H 9450 2380 30 0001 C CNN
1 9450 2450
1 0 0 -1
$EndComp
$Comp
L GND #PWR064
L GND #PWR065
U 1 1 4BABCB69
P 3500 5350
F 0 "#PWR064" H 3500 5350 30 0001 C CNN
F 0 "#PWR065" H 3500 5350 30 0001 C CNN
F 1 "GND" H 3500 5280 30 0001 C CNN
1 3500 5350
1 0 0 -1
@ -369,19 +369,19 @@ F 1 "4.7u" H 1650 4900 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR065
L GND #PWR066
U 1 1 4BABCB5B
P 1600 5350
F 0 "#PWR065" H 1600 5350 30 0001 C CNN
F 0 "#PWR066" H 1600 5350 30 0001 C CNN
F 1 "GND" H 1600 5280 30 0001 C CNN
1 1600 5350
1 0 0 -1
$EndComp
$Comp
L GND #PWR066
L GND #PWR067
U 1 1 4BABCAF4
P 1600 6950
F 0 "#PWR066" H 1600 6950 30 0001 C CNN
F 0 "#PWR067" H 1600 6950 30 0001 C CNN
F 1 "GND" H 1600 6880 30 0001 C CNN
1 1600 6950
1 0 0 -1
@ -396,10 +396,10 @@ F 1 "4.7u" H 3550 6500 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR067
L GND #PWR068
U 1 1 4BABCA9D
P 3500 6950
F 0 "#PWR067" H 3500 6950 30 0001 C CNN
F 0 "#PWR068" H 3500 6950 30 0001 C CNN
F 1 "GND" H 3500 6880 30 0001 C CNN
1 3500 6950
1 0 0 -1
@ -423,10 +423,10 @@ F 1 "100u" H 3550 3350 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR068
L GND #PWR069
U 1 1 4BABC94D
P 3500 3750
F 0 "#PWR068" H 3500 3750 30 0001 C CNN
F 0 "#PWR069" H 3500 3750 30 0001 C CNN
F 1 "GND" H 3500 3680 30 0001 C CNN
1 3500 3750
1 0 0 -1
@ -441,28 +441,28 @@ F 1 "10u" H 1650 3350 50 0000 L CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR069
L GND #PWR070
U 1 1 4BABC939
P 1600 3750
F 0 "#PWR069" H 1600 3750 30 0001 C CNN
F 0 "#PWR070" H 1600 3750 30 0001 C CNN
F 1 "GND" H 1600 3680 30 0001 C CNN
1 1600 3750
1 0 0 -1
$EndComp
$Comp
L GND #PWR070
L GND #PWR071
U 1 1 4BABC8F2
P 3500 2200
F 0 "#PWR070" H 3500 2200 30 0001 C CNN
F 0 "#PWR071" H 3500 2200 30 0001 C CNN
F 1 "GND" H 3500 2130 30 0001 C CNN
1 3500 2200
1 0 0 -1
$EndComp
$Comp
L GND #PWR071
L GND #PWR072
U 1 1 4BABC8EF
P 1600 2200
F 0 "#PWR071" H 1600 2200 30 0001 C CNN
F 0 "#PWR072" H 1600 2200 30 0001 C CNN
F 1 "GND" H 1600 2130 30 0001 C CNN
1 1600 2200
1 0 0 -1
@ -490,10 +490,10 @@ Power Supply
Text Notes 8150 1750 0 60 ~ 0
CIC Clone
$Comp
L +5V #PWR072
L +5V #PWR073
U 1 1 4BABC073
P 7300 2250
F 0 "#PWR072" H 7300 2340 20 0001 C CNN
F 0 "#PWR073" H 7300 2340 20 0001 C CNN
F 1 "+5V" H 7300 2340 30 0000 C CNN
1 7300 2250
1 0 0 -1
@ -508,109 +508,109 @@ F 1 "PIC12F629" H 8400 3600 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR073
L GND #PWR074
U 1 1 4B6ED41C
P 2550 6950
F 0 "#PWR073" H 2550 6950 30 0001 C CNN
F 0 "#PWR074" H 2550 6950 30 0001 C CNN
F 1 "GND" H 2550 6880 30 0001 C CNN
1 2550 6950
1 0 0 -1
$EndComp
$Comp
L GND #PWR074
L GND #PWR075
U 1 1 4B6ED418
P 2550 5350
F 0 "#PWR074" H 2550 5350 30 0001 C CNN
F 0 "#PWR075" H 2550 5350 30 0001 C CNN
F 1 "GND" H 2550 5280 30 0001 C CNN
1 2550 5350
1 0 0 -1
$EndComp
$Comp
L GND #PWR075
L GND #PWR076
U 1 1 4B6ED414
P 2550 3750
F 0 "#PWR075" H 2550 3750 30 0001 C CNN
F 0 "#PWR076" H 2550 3750 30 0001 C CNN
F 1 "GND" H 2550 3680 30 0001 C CNN
1 2550 3750
1 0 0 -1
$EndComp
$Comp
L GND #PWR076
L GND #PWR077
U 1 1 4B6ED410
P 2550 2200
F 0 "#PWR076" H 2550 2200 30 0001 C CNN
F 0 "#PWR077" H 2550 2200 30 0001 C CNN
F 1 "GND" H 2550 2130 30 0001 C CNN
1 2550 2200
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR077
L +3.3V #PWR078
U 1 1 4B6ED26C
P 1150 6050
F 0 "#PWR077" H 1150 6010 30 0001 C CNN
F 0 "#PWR078" H 1150 6010 30 0001 C CNN
F 1 "+3.3V" H 1150 6160 30 0000 C CNN
1 1150 6050
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR078
L +3.3V #PWR079
U 1 1 4B6ED268
P 1150 4450
F 0 "#PWR078" H 1150 4410 30 0001 C CNN
F 0 "#PWR079" H 1150 4410 30 0001 C CNN
F 1 "+3.3V" H 1150 4560 30 0000 C CNN
1 1150 4450
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR079
L +3.3V #PWR080
U 1 1 4B6ED264
P 1150 2950
F 0 "#PWR079" H 1150 2910 30 0001 C CNN
F 0 "#PWR080" H 1150 2910 30 0001 C CNN
F 1 "+3.3V" H 1150 3060 30 0000 C CNN
1 1150 2950
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR080
L +3.3V #PWR081
U 1 1 4B6ED25F
P 3950 1450
F 0 "#PWR080" H 3950 1410 30 0001 C CNN
F 0 "#PWR081" H 3950 1410 30 0001 C CNN
F 1 "+3.3V" H 3950 1560 30 0000 C CNN
1 3950 1450
1 0 0 -1
$EndComp
$Comp
L +2.5V #PWR081
L +2.5V #PWR082
U 1 1 4B6ED246
P 3950 6050
F 0 "#PWR081" H 3950 6000 20 0001 C CNN
F 0 "#PWR082" H 3950 6000 20 0001 C CNN
F 1 "+2.5V" H 3950 6150 30 0000 C CNN
1 3950 6050
1 0 0 -1
$EndComp
$Comp
L +1.8V #PWR082
L +1.8V #PWR083
U 1 1 4B6ED23A
P 3950 4450
F 0 "#PWR082" H 3950 4590 20 0001 C CNN
F 0 "#PWR083" H 3950 4590 20 0001 C CNN
F 1 "+1.8V" H 3950 4560 30 0000 C CNN
1 3950 4450
1 0 0 -1
$EndComp
$Comp
L +1.2V #PWR083
L +1.2V #PWR084
U 1 1 4B6ED22A
P 3950 2950
F 0 "#PWR083" H 3950 3090 20 0001 C CNN
F 0 "#PWR084" H 3950 3090 20 0001 C CNN
F 1 "+1.2V" H 3950 3060 30 0000 C CNN
1 3950 2950
1 0 0 -1
$EndComp
$Comp
L +5V #PWR084
L +5V #PWR085
U 1 1 4B6ED1A9
P 1150 1450
F 0 "#PWR084" H 1150 1540 20 0001 C CNN
F 0 "#PWR085" H 1150 1540 20 0001 C CNN
F 1 "+5V" H 1150 1540 30 0000 C CNN
1 1150 1450
1 0 0 -1

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:01:32 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 03:12:12 PM CEST
LIBS:power
LIBS:device
LIBS:transistors

View File

@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Mon 17 May 2010 10:00:15 PM CEST
EESchema-LIBRARY Version 2.3 Date: Tue 18 May 2010 01:59:09 PM CEST
#
# +1.2V
#

View File

@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Mon 17 May 2010 10:01:32 PM CEST
EESchema-LIBRARY Version 2.3 Date: Tue 18 May 2010 03:12:12 PM CEST
#
# +1.2V
#

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:00:15 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 01:59:09 PM CEST
LIBS:power
LIBS:device
LIBS:transistors

File diff suppressed because it is too large Load Diff

View File

@ -1,45 +1,6 @@
update=Sun 16 May 2010 04:29:55 PM CEST
update=Tue 18 May 2010 01:13:01 PM CEST
version=1
last_client=eeschema
[pcbnew]
version=1
PadDrlX=0
PadDimH=354
PadDimV=354
BoardThickness=630
RouteTo=15
RouteBo=0
Segm45=1
Racc45=1
SgPcb45=1
TxtPcbV=300
TxtPcbH=300
TxtModV=300
TxtModH=300
TxtModW=60
VEgarde=100
DrawLar=150
EdgeLar=150
TxtLar=120
MSegLar=40
WpenSer=2
[pcbnew/libraries]
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
LibName7=display
LibName8=valves
LibName9=led
LibName10=dip_sockets
LibName11=libs/snescart
LibName12=/home/ikari/src/easyflash2-git/easyflash/Hardware/ef2-kicad/ef2-footprints
LibName13=libs/mypackages
LibName14=libs/sdcard
LibName15=libs/diy_capacitors
LibDir=
last_client=pcbnew
[general]
version=1
[cvpcb]
@ -124,3 +85,41 @@ LibName38=libs/mt45w8mw16
LibName39=libs/cs4344
LibName40=libs/double_sch_kcom
LibName41=libs/usb_minib
[pcbnew]
version=1
PadDrlX=0
PadDimH=114
PadDimV=114
BoardThickness=630
RouteTo=15
RouteBo=0
Segm45=1
Racc45=1
SgPcb45=1
TxtPcbV=300
TxtPcbH=300
TxtModV=300
TxtModH=300
TxtModW=60
VEgarde=60
DrawLar=59
EdgeLar=150
TxtLar=120
MSegLar=40
WpenSer=2
[pcbnew/libraries]
LibDir=
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
LibName7=display
LibName8=valves
LibName9=led
LibName10=dip_sockets
LibName11=libs/snescart
LibName12=libs/mypackages
LibName13=libs/sdcard
LibName14=libs/diy_capacitors

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:01:32 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 03:12:12 PM CEST
LIBS:power
LIBS:device
LIBS:transistors

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:00:15 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 01:59:09 PM CEST
LIBS:power
LIBS:device
LIBS:transistors

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 17 May 2010 10:01:32 PM CEST
EESchema Schematic File Version 2 date Tue 18 May 2010 03:12:12 PM CEST
LIBS:power
LIBS:device
LIBS:transistors