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pcb wip

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This commit is contained in:
ikari 2010-05-21 00:12:58 +02:00
parent a1b10628f2
commit 6ccf59659e
17 changed files with 2751 additions and 1257 deletions
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1377
pcb/kicad/$savepcb.brd
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60
pcb/kicad/fpga.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 19 May 2010 07:19:30 PM CEST
EESchema Schematic File Version 2 date Thu 20 May 2010 11:07:07 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A3 16535 11700
Sheet 6 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""
@ -54,15 +54,14 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L GND #PWR088
U 1 1 4BF3CB99
P 2050 7500
F 0 "#PWR088" H 2050 7500 30 0001 C CNN
F 1 "GND" H 2050 7430 30 0001 C CNN
1 2050 7500
1 0 0 -1
$EndComp
Connection ~ 4850 10950
Wire Wire Line
4350 10950 5100 10950
Wire Wire Line
5100 10950 5100 10850
Connection ~ 4850 10350
Wire Wire Line
4850 10450 4850 10350
Wire Wire Line
2050 7500 2050 7300
Wire Wire Line
@ -421,13 +420,9 @@ Connection ~ 3000 10950
Wire Wire Line
3250 10950 3250 10850
Connection ~ 3250 10950
Wire Wire Line
4350 10350 4600 10350
Wire Wire Line
4600 10350 4600 10450
Connection ~ 4350 10350
Wire Wire Line
4350 10950 4600 10950
Connection ~ 4350 10950
Wire Wire Line
4600 10950 4600 10850
@ -633,6 +628,41 @@ Wire Wire Line
6200 1750 5650 1750
Wire Wire Line
1850 7100 6200 7100
Wire Wire Line
4350 10350 5100 10350
Wire Wire Line
5100 10350 5100 10450
Connection ~ 4600 10350
Wire Wire Line
4850 10950 4850 10850
Connection ~ 4600 10950
$Comp
L C C39
U 1 1 4BF5A441
P 5100 10650
F 0 "C39" H 5150 10750 50 0000 L CNN
F 1 "100n" H 5150 10550 50 0000 L CNN
1 5100 10650
1 0 0 -1
$EndComp
$Comp
L C C38
U 1 1 4BF5A43F
P 4850 10650
F 0 "C38" H 4900 10750 50 0000 L CNN
F 1 "100n" H 4900 10550 50 0000 L CNN
1 4850 10650
1 0 0 -1
$EndComp
$Comp
L GND #PWR088
U 1 1 4BF3CB99
P 2050 7500
F 0 "#PWR088" H 2050 7500 30 0001 C CNN
F 1 "GND" H 2050 7430 30 0001 C CNN
1 2050 7500
1 0 0 -1
$EndComp
$Comp
L CONN_2 P3
U 1 1 4BF3CB50

60
pcb/kicad/fpga.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 20 May 2010 05:57:13 PM CEST
EESchema Schematic File Version 2 date Fri 21 May 2010 12:12:26 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A3 16535 11700
Sheet 6 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""
@ -54,15 +54,14 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L GND #PWR088
U 1 1 4BF3CB99
P 2050 7500
F 0 "#PWR088" H 2050 7500 30 0001 C CNN
F 1 "GND" H 2050 7430 30 0001 C CNN
1 2050 7500
1 0 0 -1
$EndComp
Connection ~ 4850 10950
Wire Wire Line
4350 10950 5100 10950
Wire Wire Line
5100 10950 5100 10850
Connection ~ 4850 10350
Wire Wire Line
4850 10450 4850 10350
Wire Wire Line
2050 7500 2050 7300
Wire Wire Line
@ -421,13 +420,9 @@ Connection ~ 3000 10950
Wire Wire Line
3250 10950 3250 10850
Connection ~ 3250 10950
Wire Wire Line
4350 10350 4600 10350
Wire Wire Line
4600 10350 4600 10450
Connection ~ 4350 10350
Wire Wire Line
4350 10950 4600 10950
Connection ~ 4350 10950
Wire Wire Line
4600 10950 4600 10850
@ -633,6 +628,41 @@ Wire Wire Line
6200 1750 5650 1750
Wire Wire Line
1850 7100 6200 7100
Wire Wire Line
4350 10350 5100 10350
Wire Wire Line
5100 10350 5100 10450
Connection ~ 4600 10350
Wire Wire Line
4850 10950 4850 10850
Connection ~ 4600 10950
$Comp
L C C39
U 1 1 4BF5A441
P 5100 10650
F 0 "C39" H 5150 10750 50 0000 L CNN
F 1 "100n" H 5150 10550 50 0000 L CNN
1 5100 10650
1 0 0 -1
$EndComp
$Comp
L C C38
U 1 1 4BF5A43F
P 4850 10650
F 0 "C38" H 4900 10750 50 0000 L CNN
F 1 "100n" H 4900 10550 50 0000 L CNN
1 4850 10650
1 0 0 -1
$EndComp
$Comp
L GND #PWR088
U 1 1 4BF3CB99
P 2050 7500
F 0 "#PWR088" H 2050 7500 30 0001 C CNN
F 1 "GND" H 2050 7430 30 0001 C CNN
1 2050 7500
1 0 0 -1
$EndComp
$Comp
L CONN_2 P3
U 1 1 4BF3CB50

4
pcb/kicad/mcu.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 19 May 2010 07:19:30 PM CEST
EESchema Schematic File Version 2 date Thu 20 May 2010 11:07:07 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 4 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

4
pcb/kicad/mcu.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 20 May 2010 05:57:13 PM CEST
EESchema Schematic File Version 2 date Fri 21 May 2010 12:12:26 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 4 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

4
pcb/kicad/memory.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 20 May 2010 05:57:13 PM CEST
EESchema Schematic File Version 2 date Fri 21 May 2010 12:12:26 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 3 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

4
pcb/kicad/pwr_misc.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 19 May 2010 07:19:30 PM CEST
EESchema Schematic File Version 2 date Thu 20 May 2010 11:07:07 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 5 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

4
pcb/kicad/pwr_misc.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 20 May 2010 05:57:13 PM CEST
EESchema Schematic File Version 2 date Fri 21 May 2010 12:12:26 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 5 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

2
pcb/kicad/sd2snes-cache.bak
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Wed 19 May 2010 07:19:30 PM CEST
EESchema-LIBRARY Version 2.3 Date: Thu 20 May 2010 11:07:07 PM CEST
#
# +1.2V
#

2
pcb/kicad/sd2snes-cache.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Thu 20 May 2010 05:57:13 PM CEST
EESchema-LIBRARY Version 2.3 Date: Fri 21 May 2010 12:12:26 AM CEST
#
# +1.2V
#

4
pcb/kicad/sd2snes.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 19 May 2010 07:19:30 PM CEST
EESchema Schematic File Version 2 date Thu 20 May 2010 11:07:07 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 1 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

1405
pcb/kicad/sd2snes.brd
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16
pcb/kicad/sd2snes.cmp
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@ -1,4 +1,4 @@
Cmp-Mod V01 Created by CvPCB (2010-03-14)-final date = Wed 19 May 2010 01:55:27 PM CEST
Cmp-Mod V01 Created by CvPCB (20100314 SVN-R2462)-final date = Thu 20 May 2010 11:07:22 PM CEST
BeginCmp
TimeStamp = /4B6EC9C3/4BAF2EAF;
@ -266,6 +266,20 @@ ValeurCmp = 22p;
IdModule = SM0805;
EndCmp
BeginCmp
TimeStamp = /4B6E18FC/4BF5A43F;
Reference = C38;
ValeurCmp = 100n;
IdModule = SM0805;
EndCmp
BeginCmp
TimeStamp = /4B6E18FC/4BF5A441;
Reference = C39;
ValeurCmp = 100n;
IdModule = SM0805;
EndCmp
BeginCmp
TimeStamp = /4BAA6ABD/4BF19DCA;
Reference = D1;

1050
pcb/kicad/sd2snes.net
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4
pcb/kicad/sd2snes.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 20 May 2010 05:57:13 PM CEST
EESchema Schematic File Version 2 date Fri 21 May 2010 12:12:26 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 1 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

4
pcb/kicad/snesslot.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 19 May 2010 07:19:30 PM CEST
EESchema Schematic File Version 2 date Thu 20 May 2010 11:07:07 PM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 2 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""

4
pcb/kicad/snesslot.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 20 May 2010 05:57:13 PM CEST
EESchema Schematic File Version 2 date Fri 21 May 2010 12:12:26 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -46,7 +46,7 @@ EELAYER END
$Descr A4 11700 8267
Sheet 2 6
Title "sd2snes Mark II"
Date "19 may 2010"
Date "20 may 2010"
Rev "A"
Comp "Maximilian Rehkopf"
Comment1 ""