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firmware: SPC player (necronomfive)

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This commit is contained in:
Maximilian Rehkopf 2012-06-09 21:51:15 +02:00
parent 11bf7ffd5b
commit 8c2f74d8cd
5 changed files with 97 additions and 13 deletions
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13
src/filetypes.c
View File

@ -194,6 +194,7 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
switch(type) {
case TYPE_IPS:
case TYPE_SMC:
case TYPE_SPC:
/* file_open_by_filinfo(&fno);
if(file_res){
printf("ZOMG NOOOO %d\n", file_res);
@ -271,18 +272,14 @@ SNES_FTYPE determine_filetype(char* filename) {
) {
return TYPE_SMC;
}
if( (!strcasecmp(ext+1, "IPS"))
/* if( (!strcasecmp(ext+1, "IPS"))
||(!strcasecmp(ext+1, "UPS"))
) {
return TYPE_IPS;
}
/* later
if(!strcasecmp_P(ext+1, PSTR("SRM"))) {
return TYPE_SRM;
}
if(!strcasecmp_P(ext+1, PSTR("SPC"))) {
return TYPE_SPC;
}*/
if(!strcasecmp(ext+1, "SPC")) {
return TYPE_SPC;
}
return TYPE_UNKNOWN;
}

15
src/main.c
View File

@ -265,6 +265,21 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
sysinfo_loop();
cmd=0; /* stay in menu loop */
break;
case SNES_CMD_LOADSPC:
/* load SPC file */
get_selected_name(file_lfn);
printf("Selected name: %s\n", file_lfn);
filesize = load_spc(file_lfn, SRAM_SPC_DATA_ADDR, SRAM_SPC_HEADER_ADDR);
cmd=0; /* stay in menu loop */
break;
case SNES_CMD_RESET:
/* process RESET request from SNES */
printf("RESET requested by SNES\n");
snes_reset(1);
sleep_ms(1);
snes_reset(0);
cmd=0; /* stay in menu loop */
break;
case SNES_CMD_LOADLAST:
cfg_get_last_game(file_lfn);
printf("Selected name: %s\n", file_lfn);

65
src/memory.c
View File

@ -299,6 +299,71 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
return (uint32_t)filesize;
}
uint32_t load_spc(uint8_t* filename, uint32_t spc_data_addr, uint32_t spc_header_addr) {
DWORD filesize;
UINT bytes_read;
uint8_t data;
UINT j;
printf("%s\n", filename);
file_open(filename, FA_READ); /* Open SPC file */
if(file_res) return 0;
filesize = file_handle.fsize;
if (filesize < 65920) { /* At this point, we care about filesize only */
file_close(); /* since SNES decides if it is an SPC file */
sram_writebyte(0, spc_header_addr); /* If file is too small, destroy previous SPC header */
return 0;
}
set_mcu_addr(spc_data_addr);
f_lseek(&file_handle, 0x100L); /* Load 64K data segment */
for(;;) {
bytes_read = file_read();
if (file_res || !bytes_read) break;
FPGA_SELECT();
FPGA_TX_BYTE(0x98);
for(j=0; j<bytes_read; j++) {
FPGA_TX_BYTE(file_buf[j]);
FPGA_WAIT_RDY();
}
FPGA_DESELECT();
}
file_close();
file_open(filename, FA_READ); /* Reopen SPC file to reset file_getc state*/
set_mcu_addr(spc_header_addr);
f_lseek(&file_handle, 0x0L); /* Load 256 bytes header */
FPGA_SELECT();
FPGA_TX_BYTE(0x98);
for (j = 0; j < 256; j++) {
data = file_getc();
FPGA_TX_BYTE(data);
FPGA_WAIT_RDY();
}
FPGA_DESELECT();
file_close();
file_open(filename, FA_READ); /* Reopen SPC file to reset file_getc state*/
set_mcu_addr(spc_header_addr+0x100);
f_lseek(&file_handle, 0x10100L); /* Load 128 DSP registers */
FPGA_SELECT();
FPGA_TX_BYTE(0x98);
for (j = 0; j < 128; j++) {
data = file_getc();
FPGA_TX_BYTE(data);
FPGA_WAIT_RDY();
}
FPGA_DESELECT();
file_close(); /* Done ! */
return (uint32_t)filesize;
}
uint32_t load_sram_offload(uint8_t* filename, uint32_t base_addr) {
set_mcu_addr(base_addr);
UINT bytes_read;

9
src/memory.h
View File

@ -34,14 +34,18 @@
#define SRAM_SAVE_ADDR (0xE00000L)
#define SRAM_MENU_ADDR (0xE00000L)
#define SRAM_DB_ADDR (0xE40000L)
#define SRAM_DIR_ADDR (0xE10000L)
#define SRAM_DB_ADDR (0xE40000L)
#define SRAM_SPC_DATA_ADDR (0xFD0000L)
#define SRAM_SPC_HEADER_ADDR (0xFE0000L)
#define SRAM_MENU_SAVE_ADDR (0xFF0000L)
#define SRAM_CMD_ADDR (0xFF1000L)
#define SRAM_PARAM_ADDR (0xFF1004L)
#define SRAM_STATUS_ADDR (0xFF1100L)
#define SRAM_SYSINFO_ADDR (0xFF1200L)
#define SRAM_LASTGAME_ADDR (0xFF1420L)
#define SRAM_MENU_SAVE_ADDR (0xFF0000L)
#define SRAM_SCRATCHPAD (0xFFFF00L)
#define SRAM_DIRID (0xFFFFF0L)
#define SRAM_RELIABILITY_SCORE (0x100)
@ -50,6 +54,7 @@
#define LOADROM_WITH_RESET (2)
uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags);
uint32_t load_spc(uint8_t* filename, uint32_t spc_data_addr, uint32_t spc_header_addr);
uint32_t load_sram(uint8_t* filename, uint32_t base_addr);
uint32_t load_sram_offload(uint8_t* filename, uint32_t base_addr);
uint32_t load_sram_rle(uint8_t* filename, uint32_t base_addr);

8
src/snes.h
View File

@ -31,10 +31,12 @@
#define SNES_CMD_SETRTC (2)
#define SNES_CMD_SYSINFO (3)
#define SNES_CMD_LOADLAST (4)
#define SNES_CMD_LOADSPC (5)
#define SNES_CMD_RESET (6)
#define MENU_ERR_OK (0)
#define MENU_ERR_NODSP (1)
#define MENU_ERR_NOBSX (2)
#define MENU_ERR_OK (0)
#define MENU_ERR_NODSP (1)
#define MENU_ERR_NOBSX (2)
uint8_t crc_valid;