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FPGA/Cx4: WIP

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This commit is contained in:
ikari
2011-10-27 15:42:13 +02:00
parent fc53d173bf
commit 8c76dfbeb6
14 changed files with 2009 additions and 1679 deletions
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1
src/fpga_spi.h
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@@ -50,6 +50,7 @@
#define FPGA_SPI_FAST() spi_set_speed(SPI_SPEED_FPGA_FAST)
#define FPGA_SPI_SLOW() spi_set_speed(SPI_SPEED_FPGA_SLOW)
#define FEAT_CX4 (1 << 4)
#define FEAT_MSU1 (1 << 3)
#define FEAT_SRTC (1 << 2)
#define FEAT_ST0010 (1 << 1)

37
src/memory.c
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@@ -226,18 +226,16 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
sram_writebyte(0xfc, rombase+0xd5);
set_fpga_time(0x0220110301180530LL);
}
if(romprops.has_dspx) {
printf("DSPx game. Loading firmware image %s...\n", romprops.necdsp_fw);
if(romprops.has_st0010) {
load_dspx(romprops.necdsp_fw, 1);
} else {
load_dspx(romprops.necdsp_fw, 0);
if(file_res && romprops.necdsp_fw == DSPFW_1) {
load_dspx(DSPFW_1B, 0);
}
fpga_pgm((uint8_t*)"/sd2snes/cx4.bit");
if(romprops.has_dspx || romprops.has_cx4) {
printf("DSPx game. Loading firmware image %s...\n", romprops.dsp_fw);
load_dspx(romprops.dsp_fw, romprops.fpga_features);
/* fallback to DSP1B firmware if DSP1.bin is not present */
if(file_res && romprops.dsp_fw == DSPFW_1) {
load_dspx(DSPFW_1B, romprops.fpga_features);
}
if(file_res) {
snes_menu_errmsg(MENU_ERR_NODSP, (void*)romprops.necdsp_fw);
snes_menu_errmsg(MENU_ERR_NODSP, (void*)romprops.dsp_fw);
}
}
uint32_t rammask;
@@ -494,22 +492,29 @@ uint64_t sram_gettime(uint32_t base_addr) {
return result & 0x00ffffffffffffffLL;
}
void load_dspx(const uint8_t *filename, uint8_t st0010) {
void load_dspx(const uint8_t *filename, uint8_t coretype) {
UINT bytes_read;
DWORD filesize;
uint16_t word_cnt;
uint8_t wordsize_cnt = 0;
uint16_t sector_remaining = 0;
uint16_t sector_cnt = 0;
uint16_t pgmsize = 2048;
uint16_t datsize;
uint16_t pgmsize = 0;
uint16_t datsize = 0;
uint32_t pgmdata = 0;
uint16_t datdata = 0;
if(st0010) {
if(coretype & FEAT_ST0010) {
datsize = 1536;
} else {
pgmsize = 2048;
} else if (coretype & FEAT_DSPX) {
datsize = 1024;
pgmsize = 2048;
} else if (coretype & FEAT_CX4) {
datsize = 0;
pgmsize = 1024; /* Cx4 data ROM */
} else {
printf("load_dspx: unknown core (%02x)!\n", coretype);
}
file_open((uint8_t*)filename, FA_READ);
@@ -539,7 +544,7 @@ void load_dspx(const uint8_t *filename, uint8_t st0010) {
}
wordsize_cnt = 0;
if(st0010) {
if(coretype & FEAT_ST0010) {
file_seek(0xc000);
sector_remaining = 0;
}

22
src/smc.c
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@@ -83,6 +83,7 @@ void smc_id(snes_romprops_t* props) {
props->has_dspx = 0;
props->has_st0010 = 0;
props->has_cx4 = 0;
props->fpga_features = 0;
for(uint8_t num = 0; num < 6; num++) {
if(!file_readblock(header, hdr_addr[num], sizeof(snes_header_t))
@@ -144,39 +145,44 @@ void smc_id(snes_romprops_t* props) {
props->mapper_id = 0;
if(header->map == 0x31 && (header->carttype == 0x03 || header->carttype == 0x05)) {
props->has_dspx = 1;
props->necdsp_fw = DSPFW_1B;
props->dsp_fw = DSPFW_1B;
props->fpga_features |= FEAT_DSPX;
}
break;
case 0x20: /* LoROM */
props->mapper_id = 1;
if ((header->map == 0x20 && header->carttype == 0x03) ||
if (header->map == 0x20 && header->carttype == 0xf3) {
props->has_cx4 = 1;
props->dsp_fw = CX4FW;
props->fpga_features |= FEAT_CX4;
}
else if ((header->map == 0x20 && header->carttype == 0x03) ||
(header->map == 0x30 && header->carttype == 0x05 && header->licensee != 0xb2)) {
props->has_dspx = 1;
props->fpga_features |= FEAT_DSPX;
// Pilotwings uses DSP1 instead of DSP1B
if(!memcmp(header->name, "PILOTWINGS", 10)) {
props->necdsp_fw = DSPFW_1;
props->dsp_fw = DSPFW_1;
} else {
props->necdsp_fw = DSPFW_1B;
props->dsp_fw = DSPFW_1B;
}
} else if (header->map == 0x20 && header->carttype == 0x05) {
props->has_dspx = 1;
props->necdsp_fw = DSPFW_2;
props->dsp_fw = DSPFW_2;
props->fpga_features |= FEAT_DSPX;
} else if (header->map == 0x30 && header->carttype == 0x05 && header->licensee == 0xb2) {
props->has_dspx = 1;
props->necdsp_fw = DSPFW_3;
props->dsp_fw = DSPFW_3;
props->fpga_features |= FEAT_DSPX;
} else if (header->map == 0x30 && header->carttype == 0x03) {
props->has_dspx = 1;
props->necdsp_fw = DSPFW_4;
props->dsp_fw = DSPFW_4;
props->fpga_features |= FEAT_DSPX;
} else if (header->map == 0x30 && header->carttype == 0xf6 && header->romsize >= 0xa) {
props->has_dspx = 1;
props->has_st0010 = 1;
props->necdsp_fw = DSPFW_ST0010;
props->dsp_fw = DSPFW_ST0010;
props->fpga_features |= FEAT_ST0010;
header->ramsize = 2;
}

4
src/smc.h
View File

@@ -33,6 +33,7 @@
#define DSPFW_4 ((const uint8_t*)"/sd2snes/dsp4.bin")
#define DSPFW_1B ((const uint8_t*)"/sd2snes/dsp1b.bin")
#define DSPFW_ST0010 ((const uint8_t*)"/sd2snes/st0010.bin")
#define CX4FW ((const uint8_t*)"/sd2snes/cx4.bin")
typedef struct _snes_header {
uint8_t maker[2]; /* 0xB0 */
@@ -60,10 +61,11 @@ typedef struct _snes_romprops {
uint32_t expramsize_bytes; /* ExpRAM size in bytes */
uint32_t ramsize_bytes; /* CartRAM size in bytes */
uint32_t romsize_bytes; /* ROM size in bytes (rounded up) */
const uint8_t* necdsp_fw; /* NEC DSP ROM filename */
const uint8_t* dsp_fw; /* DSP (NEC / Hitachi) ROM filename */
uint8_t has_dspx; /* DSP[1-4] presence flag */
uint8_t has_st0010; /* st0010 presence flag (additional to dspx)*/
uint8_t has_msu1; /* MSU1 presence flag */
uint8_t has_cx4; /* CX4 presence flag */
uint8_t fpga_features; /* feature/peripheral enable bits*/
snes_header_t header; /* original header from ROM image */
} snes_romprops_t;