fix snes timing, stable operation
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a120be76bd
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9ae2f3d82f
8
src/ff.h
8
src/ff.h
@ -260,10 +260,10 @@ typedef enum {
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FR_NO_FILESYSTEM, /* 11 */
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FR_INVALID_OBJECT, /* 12 */
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FR_MKFS_ABORTED, /* 13 */
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FR_IS_DIRECTORY, /* 13 */
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FR_IS_READONLY, /* 14 */
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FR_DIR_NOT_EMPTY, /* 15 */
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FR_NOT_DIRECTORY /* 16 */
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FR_IS_DIRECTORY, /* 14 */
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FR_IS_READONLY, /* 15 */
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FR_DIR_NOT_EMPTY, /* 16 */
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FR_NOT_DIRECTORY /* 17 */
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} FRESULT;
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@ -119,13 +119,13 @@ void set_avr_ena(uint8_t val) {
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if(val) { // shared mode
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PORTD |= _BV(PD7);
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// Disable SPI double speed mode -> clock = f/4
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// SPSR = 0;
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// dprintf("SPI slow\n");
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SPSR = 0;
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dprintf("SPI slow\n");
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} else { // avr only
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PORTD &= ~_BV(PD7);
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// Enable SPI double speed mode -> clock = f/2
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// SPSR = _BV(SPI2X);
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// dprintf("SPI fast\n");
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SPSR = _BV(SPI2X);
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dprintf("SPI fast\n");
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}
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}
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@ -185,11 +185,12 @@ restart:
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uint32_t mem_magic = sram_readlong(SRAM_SCRATCHPAD);
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while(0) {
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SD_SPI_OFFLOAD=1;
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SD_SPI_OFFLOAD=0;
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set_avr_addr(0L);
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sd_read(0, file_buf, 8L, 1);
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sd_read(0, file_buf, 0L, 1);
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uart_trace((void*)file_buf, 0, 0x200);
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// sram_writeblock((void*)file_buf, 0, 0x200);
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sram_hexdump(0,0x10);
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// sram_hexdump(0,0x200);
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uart_putc('+');
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}
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/* here be strange monsters */
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@ -297,8 +297,8 @@ uint8_t sram_reliable() {
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val=sram_readlong(SRAM_SCRATCHPAD);
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if(val==0x12345678) {
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score++;
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} else {
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dprintf("i=%d val=%08lX\n", i, val);
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// } else {
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// dprintf("i=%d val=%08lX\n", i, val);
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}
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}
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if(score<SRAM_RELIABILITY_SCORE) {
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@ -275,7 +275,6 @@ static int sendCommand(const uint8_t card,
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static uint8_t extendedInit(const uint8_t card) {
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uint8_t i;
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uint32_t answer;
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// Send CMD8: SEND_IF_COND
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// 0b000110101010 == 2.7-3.6V supply, check pattern 0xAA
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i = sendCommand(card, SEND_IF_COND, 0b000110101010, 0);
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@ -315,10 +314,9 @@ static void sdInit(const uint8_t card) {
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do {
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// Prepare for ACMD, send CMD55: APP_CMD
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i = sendCommand(card, APP_CMD, 0, 1);
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if (i > 1) {
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if (i > 1)
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// Command not accepted, could be MMC
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return;
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}
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// Send ACMD41: SD_SEND_OP_COND
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// 1L<<30 == Host has High Capacity Support
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@ -526,7 +524,6 @@ DSTATUS disk_initialize(BYTE drv) __attribute__ ((weak, alias("sd_initialize")))
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DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
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uint8_t sec,res,tmp,errorcount;
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uint16_t crc,recvcrc;
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if (drv >= MAX_CARDS)
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return RES_PARERR;
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@ -617,7 +614,6 @@ DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
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if (errorcount >= CONFIG_SD_AUTO_RETRIES) return RES_ERROR;
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}
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return RES_OK;
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}
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DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sd_read")));
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@ -341,7 +341,7 @@ initial begin
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AVR_DATA_TO_MEM_ARRAY[1'b1] = 13'b0_000000_000000; // AVR read
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SRAM_DATA_TO_SNES_MEM_ARRAY[1'b0] = 13'b0_000000_000000; // SNES write
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SRAM_DATA_TO_SNES_MEM_ARRAY[1'b1] = 13'b0_000010_000000; // SNES read
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SRAM_DATA_TO_SNES_MEM_ARRAY[1'b1] = 13'b0_000100_000000; // SNES read
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/* 13'b0000100000000; */
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SRAM_DATA_TO_AVR_MEM_ARRAY[1'b0] = 13'b0_000000_000000; // AVR write
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@ -70,20 +70,20 @@
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<association xil_pn:name="Implementation"/>
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</file>
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<file xil_pn:name="spi_dma.v" xil_pn:type="FILE_VERILOG">
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<association xil_pn:name="Implementation"/>
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<association xil_pn:name="BehavioralSimulation"/>
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<association xil_pn:name="Implementation"/>
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</file>
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<file xil_pn:name="tf_spi_dma.v" xil_pn:type="FILE_VERILOG">
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<association xil_pn:name="BehavioralSimulation"/>
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<association xil_pn:name="PostTranslateSimulation"/>
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<association xil_pn:name="PostMapSimulation"/>
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<association xil_pn:name="PostRouteSimulation"/>
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<association xil_pn:name="PostMapSimulation"/>
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<association xil_pn:name="PostTranslateSimulation"/>
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</file>
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<file xil_pn:name="tf_main_3.v" xil_pn:type="FILE_VERILOG">
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<association xil_pn:name="BehavioralSimulation"/>
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<association xil_pn:name="PostTranslateSimulation"/>
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<association xil_pn:name="PostMapSimulation"/>
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<association xil_pn:name="PostRouteSimulation"/>
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<association xil_pn:name="PostMapSimulation"/>
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<association xil_pn:name="PostTranslateSimulation"/>
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</file>
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</files>
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