fix snes timing, stable operation

This commit is contained in:
ikari 2009-12-29 03:07:12 +01:00
parent a120be76bd
commit 9ae2f3d82f
7 changed files with 21 additions and 24 deletions

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@ -260,10 +260,10 @@ typedef enum {
FR_NO_FILESYSTEM, /* 11 */
FR_INVALID_OBJECT, /* 12 */
FR_MKFS_ABORTED, /* 13 */
FR_IS_DIRECTORY, /* 13 */
FR_IS_READONLY, /* 14 */
FR_DIR_NOT_EMPTY, /* 15 */
FR_NOT_DIRECTORY /* 16 */
FR_IS_DIRECTORY, /* 14 */
FR_IS_READONLY, /* 15 */
FR_DIR_NOT_EMPTY, /* 16 */
FR_NOT_DIRECTORY /* 17 */
} FRESULT;

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@ -119,13 +119,13 @@ void set_avr_ena(uint8_t val) {
if(val) { // shared mode
PORTD |= _BV(PD7);
// Disable SPI double speed mode -> clock = f/4
// SPSR = 0;
// dprintf("SPI slow\n");
SPSR = 0;
dprintf("SPI slow\n");
} else { // avr only
PORTD &= ~_BV(PD7);
// Enable SPI double speed mode -> clock = f/2
// SPSR = _BV(SPI2X);
// dprintf("SPI fast\n");
SPSR = _BV(SPI2X);
dprintf("SPI fast\n");
}
}

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@ -185,11 +185,12 @@ restart:
uint32_t mem_magic = sram_readlong(SRAM_SCRATCHPAD);
while(0) {
SD_SPI_OFFLOAD=1;
SD_SPI_OFFLOAD=0;
set_avr_addr(0L);
sd_read(0, file_buf, 8L, 1);
sd_read(0, file_buf, 0L, 1);
uart_trace((void*)file_buf, 0, 0x200);
// sram_writeblock((void*)file_buf, 0, 0x200);
sram_hexdump(0,0x10);
// sram_hexdump(0,0x200);
uart_putc('+');
}
/* here be strange monsters */

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@ -297,8 +297,8 @@ uint8_t sram_reliable() {
val=sram_readlong(SRAM_SCRATCHPAD);
if(val==0x12345678) {
score++;
} else {
dprintf("i=%d val=%08lX\n", i, val);
// } else {
// dprintf("i=%d val=%08lX\n", i, val);
}
}
if(score<SRAM_RELIABILITY_SCORE) {

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@ -275,7 +275,6 @@ static int sendCommand(const uint8_t card,
static uint8_t extendedInit(const uint8_t card) {
uint8_t i;
uint32_t answer;
// Send CMD8: SEND_IF_COND
// 0b000110101010 == 2.7-3.6V supply, check pattern 0xAA
i = sendCommand(card, SEND_IF_COND, 0b000110101010, 0);
@ -315,10 +314,9 @@ static void sdInit(const uint8_t card) {
do {
// Prepare for ACMD, send CMD55: APP_CMD
i = sendCommand(card, APP_CMD, 0, 1);
if (i > 1) {
if (i > 1)
// Command not accepted, could be MMC
return;
}
// Send ACMD41: SD_SEND_OP_COND
// 1L<<30 == Host has High Capacity Support
@ -526,7 +524,6 @@ DSTATUS disk_initialize(BYTE drv) __attribute__ ((weak, alias("sd_initialize")))
DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
uint8_t sec,res,tmp,errorcount;
uint16_t crc,recvcrc;
if (drv >= MAX_CARDS)
return RES_PARERR;
@ -617,7 +614,6 @@ DRESULT sd_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
if (errorcount >= CONFIG_SD_AUTO_RETRIES) return RES_ERROR;
}
return RES_OK;
}
DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sd_read")));

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@ -341,7 +341,7 @@ initial begin
AVR_DATA_TO_MEM_ARRAY[1'b1] = 13'b0_000000_000000; // AVR read
SRAM_DATA_TO_SNES_MEM_ARRAY[1'b0] = 13'b0_000000_000000; // SNES write
SRAM_DATA_TO_SNES_MEM_ARRAY[1'b1] = 13'b0_000010_000000; // SNES read
SRAM_DATA_TO_SNES_MEM_ARRAY[1'b1] = 13'b0_000100_000000; // SNES read
/* 13'b0000100000000; */
SRAM_DATA_TO_AVR_MEM_ARRAY[1'b0] = 13'b0_000000_000000; // AVR write

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@ -70,20 +70,20 @@
<association xil_pn:name="Implementation"/>
</file>
<file xil_pn:name="spi_dma.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="Implementation"/>
<association xil_pn:name="BehavioralSimulation"/>
<association xil_pn:name="Implementation"/>
</file>
<file xil_pn:name="tf_spi_dma.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation"/>
<association xil_pn:name="PostTranslateSimulation"/>
<association xil_pn:name="PostMapSimulation"/>
<association xil_pn:name="PostRouteSimulation"/>
<association xil_pn:name="PostMapSimulation"/>
<association xil_pn:name="PostTranslateSimulation"/>
</file>
<file xil_pn:name="tf_main_3.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation"/>
<association xil_pn:name="PostTranslateSimulation"/>
<association xil_pn:name="PostMapSimulation"/>
<association xil_pn:name="PostRouteSimulation"/>
<association xil_pn:name="PostMapSimulation"/>
<association xil_pn:name="PostTranslateSimulation"/>
</file>
</files>