godzil/sd2snes
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pcb wip

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This commit is contained in:
ikari 2010-05-16 01:45:53 +02:00
parent fcd2744c07
commit afa9943240
13 changed files with 29 additions and 19 deletions
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2
pcb/kicad/fpga.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:07:37 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:44:43 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

2
pcb/kicad/fpga.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:08:34 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:45:32 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

14
pcb/kicad/mcu.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:07:37 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:44:43 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -53,8 +53,8 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text GLabel 2500 4200 0 50 Output ~ 0
PROG_B
Wire Wire Line
6500 4500 6800 4500
Wire Wire Line
3000 4200 2500 4200
Wire Wire Line
@ -234,6 +234,10 @@ Wire Wire Line
6500 3300 6800 3300
Wire Wire Line
6800 3800 6500 3800
Wire Wire Line
6500 4400 6800 4400
Text GLabel 2500 4200 0 50 Output ~ 0
PROG_B
Text GLabel 6800 3200 2 50 Output ~ 0
FPGA_CLK
Text GLabel 6800 3300 2 50 Output ~ 0
@ -260,7 +264,7 @@ F 1 "SD_CARD" H 9450 3750 60 0000 C CNN
$EndComp
Text GLabel 2500 2600 0 50 3State ~ 0
SNES_/RESET
Text GLabel 6800 2500 2 50 Output ~ 0
Text GLabel 6800 2400 2 50 Output ~ 0
CIC_MCLR
$Comp
L GND #PWR040
@ -336,7 +340,7 @@ F 1 "22p" H 950 6500 50 0000 L CNN
$EndComp
Text GLabel 2500 4000 0 50 Input ~ 0
INIT_B+MCU_/IRQ
Text GLabel 6800 2400 2 50 Input ~ 0
Text GLabel 6800 2500 2 50 Input ~ 0
CIC_STATUS
$Comp
L GND #PWR044

12
pcb/kicad/mcu.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:08:34 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:45:32 AM CEST
LIBS:power
LIBS:device
LIBS:transistors
@ -53,8 +53,10 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text GLabel 2500 4200 0 50 Output ~ 0
PROG_B
Text Notes 6850 4500 0 50 ~ 0
LEDs
Wire Wire Line
6500 4500 6800 4500
Wire Wire Line
3000 4200 2500 4200
Wire Wire Line
@ -234,6 +236,10 @@ Wire Wire Line
6500 3300 6800 3300
Wire Wire Line
6800 3800 6500 3800
Wire Wire Line
6500 4400 6800 4400
Text GLabel 2500 4200 0 50 Output ~ 0
PROG_B
Text GLabel 6800 3200 2 50 Output ~ 0
FPGA_CLK
Text GLabel 6800 3300 2 50 Output ~ 0

2
pcb/kicad/memory.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:08:34 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:45:32 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

2
pcb/kicad/pwr_misc.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:07:37 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:44:43 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

2
pcb/kicad/pwr_misc.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:08:34 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:45:32 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

2
pcb/kicad/sd2snes-cache.bak
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Sun 16 May 2010 01:07:37 AM CEST
EESchema-LIBRARY Version 2.3 Date: Sun 16 May 2010 01:44:43 AM CEST
#
# +1.2V
#

2
pcb/kicad/sd2snes-cache.lib
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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Sun 16 May 2010 01:08:34 AM CEST
EESchema-LIBRARY Version 2.3 Date: Sun 16 May 2010 01:45:32 AM CEST
#
# +1.2V
#

2
pcb/kicad/sd2snes.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:07:37 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:44:43 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

2
pcb/kicad/sd2snes.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:08:34 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:45:32 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

2
pcb/kicad/snesslot.bak
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:07:37 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:44:43 AM CEST
LIBS:power
LIBS:device
LIBS:transistors

2
pcb/kicad/snesslot.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 16 May 2010 01:08:34 AM CEST
EESchema Schematic File Version 2 date Sun 16 May 2010 01:45:32 AM CEST
LIBS:power
LIBS:device
LIBS:transistors