Firmware: region override (patch register $213f)
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@ -80,6 +80,7 @@
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EB - put DSP into reset
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EC - release DSP from reset
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ED - set feature enable bits (see below)
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EE - set $213f override value (0=NTSC, 1=PAL)
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F0 - receive test token (to see if FPGA is alive)
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F1 - receive status (16bit, MSB first), see below
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@ -117,7 +118,7 @@
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7 -
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6 -
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5 -
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4 -
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4 enable $213F override
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3 enable MSU1 registers
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2 enable SRTC registers
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1 enable ST0010 mapping
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@ -411,3 +412,11 @@ void fpga_set_features(uint8_t feat) {
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FPGA_DESELECT();
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}
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void fpga_set_213f(uint8_t data) {
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printf("set 213f: %d\n", data);
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FPGA_SELECT();
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FPGA_TX_BYTE(0xee);
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FPGA_TX_BYTE(data);
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FPGA_DESELECT();
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}
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@ -50,12 +50,14 @@
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#define FPGA_SPI_FAST() spi_set_speed(SPI_SPEED_FPGA_FAST)
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#define FPGA_SPI_SLOW() spi_set_speed(SPI_SPEED_FPGA_SLOW)
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#define FEAT_CX4 (1 << 4)
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#define FEAT_213F (1 << 4)
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#define FEAT_MSU1 (1 << 3)
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#define FEAT_SRTC (1 << 2)
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#define FEAT_ST0010 (1 << 1)
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#define FEAT_DSPX (1 << 0)
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#define FEAT_CX4 (1 << 4)
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#define FPGA_WAIT_RDY() do {while(BITBAND(SSP_REGS->SR, SSP_BSY)); while(!BITBAND(FPGA_MCU_RDY_REG->FIOPIN, FPGA_MCU_RDY_BIT));} while (0)
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void fpga_spi_init(void);
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@ -90,4 +92,5 @@ void fpga_write_dspx_pgm(uint32_t data);
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void fpga_write_dspx_dat(uint16_t data);
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void fpga_dspx_reset(uint8_t reset);
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void fpga_set_features(uint8_t feat);
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void fpga_set_213f(uint8_t data);
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#endif
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@ -281,7 +281,9 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
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printf("done\n");
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romprops.fpga_features |= FEAT_SRTC;
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romprops.fpga_features |= FEAT_213F;
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fpga_set_213f(romprops.region);
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fpga_set_features(romprops.fpga_features);
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if(flags & LOADROM_WITH_RESET) {
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@ -70,6 +70,7 @@ typedef struct _snes_romprops {
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uint8_t has_msu1; /* MSU1 presence flag */
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uint8_t has_cx4; /* CX4 presence flag */
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uint8_t fpga_features; /* feature/peripheral enable bits*/
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uint8_t region; /* game region (derived from destination code) */
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snes_header_t header; /* original header from ROM image */
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} snes_romprops_t;
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