SuperCIC: change D4 behaviour, add region timeout trick enable switch
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bc5cf05880
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c3e1651600
@ -43,6 +43,15 @@ processor p12f629
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; In case lockout fails, the region is switched automatically and
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; will be used after the next reset.
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;
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; The /PAIR pin can be used to enable or disable SuperCIC pair mode.
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; It can be tied low or high to statically enable or disable pair mode
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; detection, or connected to a switch or MCU to dynamically enable pair
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; mode detection (it should then be connected to a pull-up resistor to
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; Vcc). Pair mode detection can be enabled during operation,
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; but pair mode cannot be left until the next power cycle.
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; See SuperCIC lock documentation for a more detailed description of
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; pair mode.
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;
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; memory usage:
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;
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; 0x20 buffer for seed calc and transfer
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@ -711,7 +720,7 @@ supercic_pairmode_loop
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nop
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nop
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bcf GPIO, 4
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goto supercic_pairmode_loop
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goto supercic_pairmode_loop
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; eeprom memory
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DEEPROM CODE
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@ -28,9 +28,9 @@ processor p16f630
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;
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; ,-----_-----.
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; +5V (27,58) [18] |1 14| GND (5,36) [9]
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; CIC clk (56) [7] |2 A5 A0 13| CIC lock reset in [8]
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; CIC clk in (56) [7] |2 A5 A0 13| CIC lock reset in [8]
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; D4 out |3 A4 A1 12| 50/60Hz out
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; |4 A3 A2 11| host reset out [10]
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; REG_TIMEOUT in |4 A3 A2 11| host reset out [10]
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; LED out (grn) |5 C5 C0 10| CIC data i/o 0 (55) [1]
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; LED out (red) |6 C4 C1 9| CIC data i/o 1 (24) [2]
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; |7 C3 C2 8| CIC slave reset out (25) [11]
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@ -44,10 +44,14 @@ processor p16f630
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; pin 13 connected to reset button
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;
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; D4 out is always switched to the autodetected region and is not user
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; overridable except in SuperCIC pair mode.
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; overridable except in SuperCIC pair mode or when no key CIC is detected.
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; It can be used, by adding an address decoder and a latch, to override
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; bit 4 of the $213f register (used by games to detect the console region).
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;
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; REG_TIMEOUT in (Pin 4) enables a ~9 sec timeout before switching
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; to the forced region. If D4 is not used, the REG_TIMEOUT pin should be
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; connected to Vcc.
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;
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; Host reset out behaves as follows:
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; After powerup it is held low for a couple of ms to allow the components
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; to power-up properly.
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@ -67,17 +71,17 @@ processor p16f630
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; Modes are cycled every 586ms as shown in Fig.1 as long as the reset button
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; is held down.
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; The currently selected mode is indicated by the color of the power LED
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; (see Table 2).
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; (see Table 3).
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; The mode is finally selected by releasing the reset button while the
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; desired LED color is shown. The selected mode will then become effective
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; and will be saved to EEPROM. Mode switching does not reset the console.
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;
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; Note that in case a valid CIC is detected in the game cartridge, video mode
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; will be forced to its corresponding region for the first ~9 seconds after
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; reset or powerup. This is an attempt to trick the region detection on most
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; games. See Table 1.
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; In case no CIC is present in the game cartridge the user setting is applied
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; immediately.
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; reset or powerup if the REG_TIMEOUT enable pin is high.
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; This is an attempt to trick the region detection on most games. See Table 1.
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; In case no CIC is present in the game cartridge, or REG_TIMEOUT is low, the
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; user setting is applied immediately.
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;
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; SuperCIC pair mode: when a SuperCIC lock and SuperCIC key detect each other
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; they both switch both of the data pins to inputs. The lock then passes
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@ -102,18 +106,25 @@ processor p16f630
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; Auto D/F411 60Hz permanent
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; Auto none 60Hz permanent
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;
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; Table 2. D4 output behavior according to key CIC type
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; key CIC output
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; -----------------------------------------------
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; D/F413 1 (PAL)
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; D/F411 0 (NTSC)
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; none same as user setting (NTSC if Auto)
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;
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; Fig.1. SuperCIC mode cycle.
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; ,->60Hz--->50Hz--->Auto->.
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; `-------<--------<-------'
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;
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; Table 2. LED color according to user setting.
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; Table 3. LED color according to user setting.
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; mode LED color
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; ---------------------
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; 60Hz red
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; 50Hz green
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; Auto orange
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;
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; Table 3. memory usage.
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; Table 4. memory usage.
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; -------------------basic CIC functions--------------------
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; 0x20 buffer for seed calc and transfer
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; 0x21 - 0x2f seed area (lock seed)
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@ -190,6 +201,9 @@ rst_loop
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andwf 0x50, f ;
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swapf 0x50, f ; and nibbleswap for actual output
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btfss PORTA, 3 ; if D4 mode is disabled:
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bsf 0x53, 4 ; simulate region timeout->immediate region chg
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movlw 0x2
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andwf 0x58, f
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@ -381,14 +395,17 @@ loop1
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bcf FSR, 4 ; back to our own stream
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btfsc 0x42, 0 ; equal? then continue
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bsf 0x43, 1 ; else mark key invalid
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btfsc 0x43, 1 ; if key invalid:
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btfss 0x43, 1 ; if key invalid:
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goto main_skipinval1 ;
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bcf 0x57, 1 ; set det.region=60Hz
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btfsc 0x43, 1 ; if key invalid:
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bsf 0x53, 4 ; simulate region timeout->immediate region chg
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clrf 0x59 ; clear D4 output
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btfsc 0x54, 1 ; use effective region for D4 output
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bsf 0x59, 4
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nop
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nop
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nop
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nop
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main_skipinval2
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call checkrst
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incf FSR, f ; next one
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@ -429,6 +446,14 @@ swapskip
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goto loop0
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goto loop
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main_skipinval1
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nop
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nop
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nop
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goto main_skipinval2
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; --------calculate new seeds--------
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; had to be unrolled because PIC has an inefficient way of handling
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; indirect access, no post increment, no swap, etc.
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@ -1026,6 +1051,7 @@ supercic_pairmode_led_60
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bsf PORTC, 4
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bcf PORTC, 5
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goto supercic_pairmode_loop
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; -----------------------------------------------------------------------
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; eeprom data
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DEEPROM CODE
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