7 Commits

Author SHA1 Message Date
Maximilian Rehkopf
7df6909266 FPGA: rework shared memory access FSM 2012-07-09 02:12:59 +02:00
Maximilian Rehkopf
006ea8c44a FPGA: debug wires 2012-07-09 02:03:59 +02:00
Maximilian Rehkopf
8148f5567c FPGA: properly synchronize external signals 2012-07-09 01:48:43 +02:00
Maximilian Rehkopf
e33b2b2bc7 FPGA: simple SNES address input filtering 2012-07-09 01:37:57 +02:00
Maximilian Rehkopf
86576d2e48 FPGA: clean up (port size mismatches, unused regs/wires, ...) 2011-10-09 14:13:35 +02:00
Maximilian Rehkopf
b05c89cdbf FPGA: merge recent changes into sd2sneslite 2011-10-08 17:05:22 +02:00
ikari
90fcdf6615 feature reduced FPGA config for uC flash embedding 2010-12-31 02:49:04 +01:00