Maximilian Rehkopf d47858083a FPGA/Cx4: update user constraints for changed system clock

2012-07-09 18:52:51 +02:00

..

sd2snes

FPGA/DSPx: buffer register input

2012-07-09 02:23:57 +02:00

sd2snes_cx4

FPGA/Cx4: update user constraints for changed system clock

2012-07-09 18:52:51 +02:00

sd2snes_test

FPGA: add SD clock pullup to test configuration

2012-05-02 10:46:27 +02:00

sd2sneslite

FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input

2012-07-09 02:17:01 +02:00