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sd2snes/verilog/sd2snes
History
Maximilian Rehkopf 684e2c3b81 FPGA/BSX: fix checksum registers
2012-07-09 02:00:29 +02:00
..
ipcore_dir
FPGA: update project files (ISE 13.2)
2011-10-07 22:10:02 +02:00
address.v
FPGA: simple SNES address input filtering
2012-07-09 01:37:57 +02:00
bsx.v
FPGA/BSX: fix checksum registers
2012-07-09 02:00:29 +02:00
clk_test.v
FPGA: update clock speed to 88MHz
2012-07-09 01:54:05 +02:00
dac.v
FPGA: Adjust DAC I²S signal timing
2012-07-09 01:41:47 +02:00
dcm.v
FPGA: rework shared memory access
2011-10-07 22:06:43 +02:00
main_tf.v
FPGA: add test fixtures
2011-06-11 23:57:06 +02:00
main.ucf
FPGA: update clock speed to 88MHz
2012-07-09 01:54:05 +02:00
main.v
FPGA/BSX: fix checksum registers
2012-07-09 02:00:29 +02:00
mcu_cmd.v
FPGA: properly synchronize external signals
2012-07-09 01:48:43 +02:00
msu.v
FPGA: properly synchronize external signals
2012-07-09 01:48:43 +02:00
rtc.v
FPGA: update clock speed to 88MHz
2012-07-09 01:54:05 +02:00
sd2snes.xise
FPGA: adjust menu memory mapping to make more room for file database
2012-06-10 20:07:45 +02:00
sd_dma.v
FPGA: optimize non-sector-aligned SD DMA reads
2012-01-14 01:22:38 +01:00
spi.v
FPGA: clean up (port size mismatches, unused regs/wires, ...)
2011-10-09 14:13:35 +02:00
srtc.v
FPGA: properly synchronize external signals
2012-07-09 01:48:43 +02:00
upd77c25.v
FPGA: properly synchronize external signals
2012-07-09 01:48:43 +02:00
updtest_tf.v
FPGA: fix ST0010 glitches
2011-06-23 00:55:29 +02:00
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