Maximilian Rehkopf 8148f5567c FPGA: properly synchronize external signals

2012-07-09 01:48:43 +02:00

..

ipcore_dir

FPGA: updated project files

2012-01-14 23:16:57 +01:00

address.v

FPGA: simple SNES address input filtering

2012-07-09 01:37:57 +02:00

cx4.v

FPGA/cx4: adjust Cx4 CPU timing

2012-05-19 18:07:13 +02:00

dac.v

FPGA: Adjust DAC I²S signal timing

2012-07-09 01:41:47 +02:00

dcm.v

FPGA/cx4: initial commit

2011-10-23 04:10:55 +02:00

main.ucf

FPGA: simple SNES address input filtering

2012-07-09 01:37:57 +02:00

main.v

FPGA: properly synchronize external signals

2012-07-09 01:48:43 +02:00

msu.v

FPGA: properly synchronize external signals

2012-07-09 01:48:43 +02:00

sd2snes_cx4.xise

FPGA/cx4: adjust Cx4 CPU timing

2012-05-19 18:07:13 +02:00

sd_dma.v

FPGA/Cx4: optimize non-sector-aligned SD DMA reads

2012-01-14 02:21:01 +01:00

spi.v

FPGA/cx4: clean up tab/whitespace mix

2011-11-01 21:09:31 +01:00