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Linux_SDK_V1.0.2

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thead_admin
2022-11-22 15:53:40 +08:00
parent c9df2bbe57
commit c20e64a982
77 changed files with 5382 additions and 1320 deletions
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14
arch/riscv/include/asm/atomic.h
View File

@@ -55,13 +55,11 @@ static __always_inline void atomic64_set(atomic64_t *v, s64 i)
static __always_inline \
void atomic##prefix##_##op(c_type i, atomic##prefix##_t *v) \
{ \
smp_mb(); \
__asm__ __volatile__ ( \
" amo" #asm_op "." #asm_type " zero, %1, %0" \
: "+A" (v->counter) \
: "r" (I) \
: "memory"); \
smp_mb(); \
} \
#ifdef CONFIG_GENERIC_ATOMIC64
@@ -93,26 +91,22 @@ c_type atomic##prefix##_fetch_##op##_relaxed(c_type i, \
atomic##prefix##_t *v) \
{ \
register c_type ret; \
smp_mb(); \
__asm__ __volatile__ ( \
" amo" #asm_op "." #asm_type " %1, %2, %0" \
: "+A" (v->counter), "=r" (ret) \
: "r" (I) \
: "memory"); \
smp_mb(); \
return ret; \
} \
static __always_inline \
c_type atomic##prefix##_fetch_##op(c_type i, atomic##prefix##_t *v) \
{ \
register c_type ret; \
smp_mb(); \
__asm__ __volatile__ ( \
" amo" #asm_op "." #asm_type ".aqrl %1, %2, %0" \
: "+A" (v->counter), "=r" (ret) \
: "r" (I) \
: "memory"); \
smp_mb(); \
return ret; \
}
@@ -207,7 +201,6 @@ static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u)
{
int prev, rc;
smp_mb();
__asm__ __volatile__ (
"0: lr.w %[p], %[c]\n"
" beq %[p], %[u], 1f\n"
@@ -219,7 +212,6 @@ static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u)
: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
: [a]"r" (a), [u]"r" (u)
: "memory");
smp_mb();
return prev;
}
#define atomic_fetch_add_unless atomic_fetch_add_unless
@@ -230,7 +222,6 @@ static __always_inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u
s64 prev;
long rc;
smp_mb();
__asm__ __volatile__ (
"0: lr.d %[p], %[c]\n"
" beq %[p], %[u], 1f\n"
@@ -242,7 +233,6 @@ static __always_inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u
: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
: [a]"r" (a), [u]"r" (u)
: "memory");
smp_mb();
return prev;
}
#define atomic64_fetch_add_unless atomic64_fetch_add_unless
@@ -324,7 +314,6 @@ static __always_inline int atomic_sub_if_positive(atomic_t *v, int offset)
{
int prev, rc;
smp_mb();
__asm__ __volatile__ (
"0: lr.w %[p], %[c]\n"
" sub %[rc], %[p], %[o]\n"
@@ -336,7 +325,6 @@ static __always_inline int atomic_sub_if_positive(atomic_t *v, int offset)
: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
: [o]"r" (offset)
: "memory");
smp_mb();
return prev - offset;
}
@@ -348,7 +336,6 @@ static __always_inline s64 atomic64_sub_if_positive(atomic64_t *v, s64 offset)
s64 prev;
long rc;
smp_mb();
__asm__ __volatile__ (
"0: lr.d %[p], %[c]\n"
" sub %[rc], %[p], %[o]\n"
@@ -360,7 +347,6 @@ static __always_inline s64 atomic64_sub_if_positive(atomic64_t *v, s64 offset)
: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
: [o]"r" (offset)
: "memory");
smp_mb();
return prev - offset;
}

16
arch/riscv/include/asm/cmpxchg.h
View File

@@ -16,7 +16,6 @@
__typeof__(ptr) __ptr = (ptr); \
__typeof__(new) __new = (new); \
__typeof__(*(ptr)) __ret; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -35,7 +34,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})
@@ -51,7 +49,6 @@
__typeof__(ptr) __ptr = (ptr); \
__typeof__(new) __new = (new); \
__typeof__(*(ptr)) __ret; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -72,7 +69,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})
@@ -88,7 +84,6 @@
__typeof__(ptr) __ptr = (ptr); \
__typeof__(new) __new = (new); \
__typeof__(*(ptr)) __ret; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -109,7 +104,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})
@@ -125,7 +119,6 @@
__typeof__(ptr) __ptr = (ptr); \
__typeof__(new) __new = (new); \
__typeof__(*(ptr)) __ret; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -144,7 +137,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})
@@ -178,7 +170,6 @@
__typeof__(*(ptr)) __new = (new); \
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -205,7 +196,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})
@@ -224,7 +214,6 @@
__typeof__(*(ptr)) __new = (new); \
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -253,7 +242,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})
@@ -272,7 +260,6 @@
__typeof__(*(ptr)) __new = (new); \
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -301,7 +288,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})
@@ -320,7 +306,6 @@
__typeof__(*(ptr)) __new = (new); \
__typeof__(*(ptr)) __ret; \
register unsigned int __rc; \
smp_mb(); \
switch (size) { \
case 4: \
__asm__ __volatile__ ( \
@@ -349,7 +334,6 @@
default: \
BUILD_BUG(); \
} \
smp_mb(); \
__ret; \
})

3
arch/riscv/include/asm/smp.h
View File

@@ -51,6 +51,9 @@ void riscv_set_ipi_ops(struct riscv_ipi_ops *ops);
/* Clear IPI for current CPU */
void riscv_clear_ipi(void);
void crash_smp_send_stop(void);
bool smp_crash_stop_failed(void);
/* Secondary hart entry */
asmlinkage void smp_callin(void);

5
arch/riscv/include/asm/tlbflush.h
View File

@@ -65,6 +65,11 @@ static inline void flush_tlb_kernel_range(unsigned long start,
end += PAGE_SIZE - 1;
end &= PAGE_MASK;
if ((end - start) > SZ_1M) {
flush_tlb_all();
return;
}
while (start < end) {
__asm__ __volatile__ ("sfence.vma %0" : : "r" (start) : "memory");
start += PAGE_SIZE;

10
arch/riscv/include/uapi/asm/ptrace.h
View File

@@ -77,8 +77,18 @@ union __riscv_fp_state {
struct __riscv_q_ext_state q;
};
#ifdef CONFIG_VLEN_256
struct __riscv_vblen {
__uint128_t v[2];
};
#endif
struct __riscv_v_state {
#ifdef CONFIG_VLEN_256
struct __riscv_vblen v[32];
#else
__uint128_t v[32];
#endif
unsigned long vstart;
unsigned long vxsat;
unsigned long vxrm;