Linux_SDK_V1.2.1

Signed-off-by: thead_admin <occ_thead@service.alibaba.com>

arch/riscv/Kconfig

@@ -21,18 +21,21 @@ config RISCV
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_GIGANTIC_PAGE
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_MMIOWB
 	select ARCH_HAS_PTE_SPECIAL
 	select ARCH_HAS_SET_DIRECT_MAP
 	select ARCH_HAS_SET_MEMORY
 	select ARCH_HAS_STRICT_KERNEL_RWX if MMU
+	select ARCH_HAS_STRICT_MODULE_RWX if MMU
 	select ARCH_HAS_DMA_PREP_COHERENT
 	select ARCH_HAS_SYNC_DMA_FOR_CPU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
 	select ARCH_HAS_DMA_WRITE_COMBINE
 	select ARCH_HAS_DMA_MMAP_PGPROT
+	select ARCH_KEEP_MEMBLOCK
 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
+	select ARCH_USE_QUEUED_SPINLOCKS
+	select ARCH_USE_QUEUED_RWLOCKS
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
 	select ARCH_WANT_FRAME_POINTERS
 	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
@@ -416,6 +419,11 @@ config VECTOR_0_7
 
 endchoice
 
+config VLEN_256
+	bool "VECTOR VLEN 256"
+	depends on VECTOR
+	default n
+
 config VECTOR_EMU
 	bool "VECTOR e64 emulate for c906 v1"
 	depends on VECTOR

arch/riscv/boot/dts/thead/Makefile

@@ -4,7 +4,7 @@ dtb-$(CONFIG_SOC_THEAD) += light-fm-emu.dtb light_mpw.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-npu-fce.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-gpu.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsp.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb light-a-val-audio-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val.dtb light-a-val-sv.dtb
@@ -12,35 +12,31 @@ dtb-$(CONFIG_SOC_THEAD) += light-a-val-ddr2G.dtb light-a-val-ddr1G.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-npu-fce.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-iso7816.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-nand.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0.dtb light-a-val-dsi1.dtb light-a-val-hdmi.dtb light-a-val-dsi0-dsi1.dtb light-a-val-dsi0-hdmi.dtb light-a-val-dpi0.dtb light-a-val-dpi0-dpi1.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio.dtb light-a-val-audio-i2s-8ch.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-tdm.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-spdif.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0.dtb light-a-val-dsi1.dtb light-a-val-hdmi.dtb light-a-val-dsi0-dsi1.dtb light-a-val-dsi0-hdmi.dtb light-a-val-dsi0-hdmi-audio.dtb light-a-val-dpi0.dtb light-a-val-dpi0-dpi1.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-wcn.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-gpio-keys.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-khv.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-sec.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-miniapp-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-product.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-b-product.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-product.dtb light-b-product-sec.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-b-product-ddr1G.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-b-product-miniapp-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-full.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-ant-evt.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-ant-ref.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-ant-discrete.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-ddr2G.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-ref.dtb light-a-ref-dsi0.dtb light-a-ref-dsi0-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-ref.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-crash.dtb light-b-product-crash.dtb light-ant-ref-crash.dtb light-ant-discrete-crash.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-power.dtb
 
-# // temporary dtb for power gate
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-powergate.dtb light-a-val-sv-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-ddr2G-powergate.dtb light-a-val-ddr1G-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-npu-fce-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-iso7816-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-nand-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0-powergate.dtb light-a-val-dsi1-powergate.dtb light-a-val-hdmi-powergate.dtb light-a-val-dsi0-dsi1-powergate.dtb light-a-val-dsi0-hdmi-powergate.dtb light-a-val-dpi0-powergate.dtb light-a-val-dpi0-dpi1-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-wcn-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-khv-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-sec-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-miniapp-hdmi-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-product-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-b-product-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-b-product-ddr1G-powergate.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-full-powergate.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-android.dtb
+
+dtb-$(CONFIG_SOC_THEAD) += fire-emu.dtb fire-emu-crash.dtb
+dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb
+dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base-sec.dtb

arch/riscv/boot/dts/thead/fire-crash.dts

@@ -0,0 +1,856 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "light-vi-devices.dtsi"
+
+/ {
+	model = "T-HEAD fire fpga board";
+	compatible = "thead,fire-emu", "thead,fire";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlycon";
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		status = "disabled";
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+	};
+
+	display-subsystem {
+		status = "okay";
+	};
+
+	lcd0_backlight: pwm-backlight@0 {
+		status = "disabled";
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	light_iopmp: iopmp {
+		status = "disabled";
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		status = "disabled";
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <1>;
+		compatible = "linux,bt-sco";
+		status = "okay";
+	};
+
+
+	wcn_wifi: wireless-wlan {
+		compatible = "wlan-platdata";
+		clock-names = "clk_wifi";
+		ref-clock-frequency = <24000000>;
+		keep_wifi_power_on;
+		pinctrl-names = "default";
+		wifi_chip_type = "rtl8723ds";
+		WIFI,poweren_gpio = <&gpio2_porta 26 0>;
+		WIFI,reset_n = <&gpio2_porta 28 0>;
+		status = "disabled";
+	};
+
+	wcn_bt: wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		pinctrl-names = "default", "rts_gpio";
+		BT,power_gpio    = <&gpio2_porta 29 0>;
+		status = "disabled";
+	};
+
+	gpio_keys: gpio_keys{
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		status = "disabled";
+		key-volumedown {
+			label = "Volume Down Key";
+			linux,code = <KEY_1>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
+		};
+		key-volumeup {
+			label = "Volume Up Key";
+			linux,code = <KEY_2>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	aon: light-aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+			status = "disabled";
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic";
+			status = "disabled";
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "disabled";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+			status = "disabled";
+		};
+	};
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+    vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};
+
+};
+
+&clk {
+	status = "disabled";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
+       touch@5d {
+               #gpio-cells = <2>;
+               compatible = "goodix,gt911";
+			   status = "disabled";
+               reg = <0x5d>;
+               interrupt-parent = <&gpio1_porta>;
+               interrupts = <8 0>;
+               irq-gpios = <&gpio1_porta 8 0>;
+               reset-gpios = <&gpio1_porta 7 0>;
+               touchscreen-size-x = <800>;
+               touchscreen-size-y = <1280>;
+       };
+};
+
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "disabled";
+
+       es8156_audio_codec: es8156@8 {
+               #sound-dai-cells = <0>;
+               compatible = "everest,es8156";
+               reg = <0x08>;
+       };
+
+        es7210_audio_codec: es7210@40 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x40>;
+        };
+};
+
+&i2c1 {
+        clock-frequency = <400000>;
+        status = "disabled";
+        touch1@5d {
+                #gpio-cells = <2>;
+                compatible = "goodix,gt911";
+                reg = <0x5d>;
+                interrupt-parent = <&gpio1_porta>;
+                interrupts = <12 0>;
+                irq-gpios = <&gpio1_porta 12 0>;
+                reset-gpios = <&gpio1_porta 11 0>;
+                touchscreen-size-x = <800>;
+                touchscreen-size-y = <1280>;
+        };
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "okay";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+		status = "disabled";
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&qspi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>;
+	rx-sample-dly = <4>;
+	status = "disabled";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi1";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&qspi1 {
+	num-cs = <1>;
+	cs-gpios = <&gpio0_porta 1 0>;
+	status = "disabled";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <66000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi2";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&gmac0 {
+	phy-mode = "rgmii-id";
+	rx-clk-delay = <0x00>; /* for RGMII */
+	tx-clk-delay = <0x00>; /* for RGMII */
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x1>;
+		};
+
+		phy_88E1111_1: ethernet-phy@1 {
+			reg = <0x2>;
+		};
+	};
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	mmc-hs400-1_8v;
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "okay";
+};
+
+&sdhci1 {
+	max-frequency = <100000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	wakeup-source;
+	status = "disabled";
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart0: uart0grp {
+				thead,pins = <
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
+				>;
+			};
+
+			pinctrl_qspi0: qspi0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x0    0x20f
+					FM_QSPI0_CSN0    0x3    0x20f
+					FM_QSPI0_CSN1    0x0    0x20f
+					FM_QSPI0_D0_MOSI 0x0    0x23f
+					FM_QSPI0_D1_MISO 0x0    0x23f
+					FM_QSPI0_D2_WP   0x0    0x23f
+					FM_QSPI0_D3_HOLD 0x0    0x23f
+				>;
+			};
+
+			pinctrl_light_i2s0: i2s0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x2    0x208
+					FM_QSPI0_CSN0    0x2    0x238
+					FM_QSPI0_CSN1    0x2    0x208
+					FM_QSPI0_D0_MOSI 0x2    0x238
+					FM_QSPI0_D1_MISO 0x2    0x238
+					FM_QSPI0_D2_WP   0x2    0x238
+					FM_QSPI0_D3_HOLD 0x2    0x238
+				>;
+			};
+
+			pinctrl_pwm: pwmgrp {
+				thead,pins = <
+					FM_GPIO3_2	0x1	0x208	/* pwm0 */
+					FM_GPIO3_3	0x1	0x208	/* pwm1 */
+				>;
+			};
+		};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
+			pinctrl_qspi1: qspi1grp {
+				thead,pins = <
+					FM_QSPI1_SCLK    0x0    0x20a
+					FM_QSPI1_CSN0    0x3    0x20a
+					FM_QSPI1_D0_MOSI 0x0    0x23a
+					FM_QSPI1_D1_MISO 0x0    0x23a
+					FM_QSPI1_D2_WP   0x0    0x23a
+					FM_QSPI1_D3_HOLD 0x0    0x23a
+				>;
+			};
+
+
+			pinctrl_iso7816: iso7816grp {
+				thead,pins = <
+					FM_QSPI1_SCLK		0x1	0x208
+					FM_QSPI1_D0_MOSI	0x1	0x238
+					FM_QSPI1_D1_MISO	0x1	0x238
+					FM_QSPI1_D2_WP		0x1	0x238
+					FM_QSPI1_D3_HOLD	0x1	0x238
+				>;
+			};
+
+		};
+};
+
+&i2c2 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c3 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c4 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	pcal6408ahk_a: gpio@20 {
+		compatible = "nxp,pcal9554b";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+&isp0 {
+	status = "disabled";
+};
+
+&isp1 {
+	status = "disabled";
+};
+
+&isp_ry0 {
+	status = "disabled";
+};
+
+&dewarp {
+	status = "disabled";
+};
+
+&dec400_isp0 {
+	status = "disabled";
+};
+
+&dec400_isp1 {
+	status = "disabled";
+};
+
+&dec400_isp2 {
+	status = "disabled";
+};
+
+&bm_visys {
+	status = "disabled";
+};
+
+&bm_csi0 {
+	status = "disabled";
+};
+
+&bm_csi1 {
+	status = "disabled";
+};
+
+&bm_csi2 {
+	status = "disabled";
+};
+
+&vi_pre {
+	//vi_pre_irq_en = <1>;
+	status = "disabled";
+};
+
+&xtensa_dsp {
+	status = "disabled";
+};
+
+&xtensa_dsp0 {
+	status = "disabled";
+    memory-region = <&dsp0_mem>;
+};
+
+&xtensa_dsp1{
+    status = "disabled";
+    memory-region = <&dsp1_mem>;
+};
+
+&vvcam_flash_led0{
+    flash_led_name = "aw36413_aw36515";
+	floodlight_i2c_bus = /bits/ 8 <2>;
+	floodlight_en_pin = <&gpio1_porta 25 0>;
+	//projection_i2c_bus = /bits/ 8 <2>;
+	flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
+	status = "disabled";
+};
+
+&vvcam_sensor1 {
+	status = "disabled";
+};
+
+&vvcam_sensor2 {
+	status = "disabled";
+};
+
+&vvcam_sensor3 {
+	status = "disabled";
+};
+
+&vvcam_sensor4 {
+    status = "disabled";
+};
+
+&vvcam_sensor5 {
+    status = "disabled";
+};
+
+&video0{
+	status = "disabled";
+};
+
+
+&video1{
+	status = "disabled";
+};
+
+&video2{
+	status = "disabled";
+};
+
+&video3{
+	status = "disabled";
+};
+
+&video4{
+	status = "disabled";
+};
+
+&video5{
+	status = "disabled";
+};
+
+&video6{
+	status = "disabled";
+};
+
+&video7{
+	status = "disabled";
+};
+
+
+&video8{
+	status = "disabled";
+};
+
+&video9{
+	status = "disabled";
+};
+
+
+&video10{
+	status = "disabled";
+};
+
+&video11{
+	status = "disabled";
+};
+
+&video12{
+	status = "disabled";
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "disabled";
+};
+
+&vdec {
+	status = "disabled";
+};
+
+&venc {
+	status = "disabled";
+};
+
+&isp_venc_shake {
+	status = "disabled";
+};
+
+&vidmem {
+	status = "disabled";
+};
+
+&gpu {
+	status = "disabled";
+};
+
+&dpu_enc0 {
+	status = "disabled";
+};
+
+&dpu_enc1 {
+	status = "disabled";
+};
+
+&dpu {
+        status = "disabled";
+};
+
+&dsi0 {
+        status = "disabled";
+};
+
+&dhost_0 {
+	status = "disabled";
+};
+
+&disp1_out {
+	status = "disabled";
+};
+
+&hdmi_tx {
+	status = "disabled";
+};
+
+&lightsound {
+        status = "disabled";
+};
+
+&light_i2s {
+        status = "disabled";
+};
+
+&i2s0 {
+        status = "disabled";
+};
+
+&i2s1 {
+        status = "disabled";
+};
+
+&i2s3 {
+        status = "disabled";
+};
+
+&khvhost {
+	status = "disabled";
+};

arch/riscv/boot/dts/thead/fire-emu-crash.dts

@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "fire-crash.dts"
+
+&aon {
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic";
+		status = "disabled";
+
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	};
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_2: cpu@2 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_3: cpu@3 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+};

arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts

@@ -0,0 +1,107 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&gpu {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+	status = "okay";
+};
+
+
+&dsi0 {
+	status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "hlt,hpk070h275";
+		reg = <0>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&aon {
+	status = "okay";
+};
+
+&mbox_910t {
+	status = "okay";
+};
+
+&mbox_910t_client1 {
+	status = "okay";
+};
+
+&mbox_910t_client2 {
+	status = "okay";
+};
+
+&dmac1 {
+	status = "okay";
+};
+
+&lightsound {
+	status = "okay";
+};
+
+&dmac2 {
+    status = "disabled";
+};
+

arch/riscv/boot/dts/thead/fire-emu-soc-base-sec.dts

@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+/* #include "fire-emu.dts" */
+#include "fire-emu-soc-base.dts"
+
+&light_iopmp {
+        status = "disabled";
+};

arch/riscv/boot/dts/thead/fire-emu-soc-base.dts

@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&sdhci0 {
+	status = "okay";
+};
+
+&usb3_drd {
+	status = "okay";
+};
+
+&usb {
+	status = "okay";
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "okay";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+		status = "okay";
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&qspi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>;
+	rx-sample-dly = <4>;
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi1";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&qspi1 {
+	num-cs = <1>;
+	cs-gpios = <&gpio0_porta 1 0>;
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <66000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi2";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+

arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts

@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&c910_2 {
+	status = "okay";
+};
+
+&c910_3 {
+	status = "okay";
+};
+

arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts

@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&vi_pre {
+	status = "okay";
+};
+
+&dewarp {
+	status = "okay";
+};
+
+&xtensa_dsp {
+	status = "okay";
+};
+
+&xtensa_dsp0 {
+	status = "okay";
+};
+
+&xtensa_dsp1 {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+};
+
+&dsi0 {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+};
+

arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts

@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&vi_pre {
+	status = "okay";
+};
+
+&dewarp {
+	status = "okay";
+};
+
+&venc {
+	status = "okay";
+};
+
+&vdec {
+	status = "okay";
+};
+
+&g2d {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dsi0 {
+	status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "hlt,hpk070h275";
+		reg = <0>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&dpu_enc1 {
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+

arch/riscv/boot/dts/thead/fire-emu.dts

@@ -0,0 +1,885 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "light-vi-devices.dtsi"
+
+/ {
+	model = "T-HEAD fire fpga board";
+	compatible = "thead,fire-emu", "thead,fire";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+	};
+
+	lcd0_backlight: pwm-backlight@0 {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	lcd1_backlight: pwm-backlight@1 {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 1 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	light_iopmp: iopmp {
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		status = "disabled";
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <1>;
+		compatible = "linux,bt-sco";
+		status = "okay";
+	};
+
+
+	wcn_wifi: wireless-wlan {
+		compatible = "wlan-platdata";
+		clock-names = "clk_wifi";
+		ref-clock-frequency = <24000000>;
+		keep_wifi_power_on;
+		pinctrl-names = "default";
+		wifi_chip_type = "rtl8723ds";
+		WIFI,poweren_gpio = <&gpio2_porta 26 0>;
+		WIFI,reset_n = <&gpio2_porta 28 0>;
+		status = "disabled";
+	};
+
+	wcn_bt: wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		pinctrl-names = "default", "rts_gpio";
+		BT,power_gpio    = <&gpio2_porta 29 0>;
+		status = "disabled";
+	};
+
+	gpio_keys: gpio_keys{
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		status = "disabled";
+		key-volumedown {
+			label = "Volume Down Key";
+			linux,code = <KEY_1>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
+		};
+		key-volumeup {
+			label = "Volume Up Key";
+			linux,code = <KEY_2>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	aon: light-aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+			status = "disabled";
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic";
+			status = "disabled";
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "disabled";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+			status = "disabled";
+		};
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+    vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};
+
+};
+
+&clk {
+	status = "disabled";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
+       touch@5d {
+               #gpio-cells = <2>;
+               compatible = "goodix,gt911";
+			   status = "disabled";
+               reg = <0x5d>;
+               interrupt-parent = <&gpio1_porta>;
+               interrupts = <8 0>;
+               irq-gpios = <&gpio1_porta 8 0>;
+               reset-gpios = <&gpio1_porta 7 0>;
+               touchscreen-size-x = <800>;
+               touchscreen-size-y = <1280>;
+       };
+};
+
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "disabled";
+
+        es8156_audio_codec: es8156@8 {
+               #sound-dai-cells = <0>;
+               compatible = "everest,es8156";
+               reg = <0x08>;
+               status = "disabled";
+        };
+
+        es7210_audio_codec: es7210@40 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x40>;
+                status = "disabled";
+        };
+};
+
+&i2c1 {
+        clock-frequency = <400000>;
+        status = "disabled";
+        touch1@5d {
+                #gpio-cells = <2>;
+                compatible = "goodix,gt911";
+                reg = <0x5d>;
+                interrupt-parent = <&gpio1_porta>;
+                interrupts = <12 0>;
+                irq-gpios = <&gpio1_porta 12 0>;
+                reset-gpios = <&gpio1_porta 11 0>;
+                touchscreen-size-x = <800>;
+                touchscreen-size-y = <1280>;
+        };
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "okay";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+		status = "disabled";
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&qspi0 {
+	status = "disabled";
+};
+
+&qspi1 {
+	status = "disabled";
+};
+&gmac0 {
+	max-speed = <100>;
+	phy-mode = "mii";
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+
+	};
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	/*mmc-hs400-1_8v;*/
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "disabled";
+};
+
+&sdhci1 {
+	max-frequency = <100000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	wakeup-source;
+	status = "disabled";
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart0: uart0grp {
+				thead,pins = <
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
+				>;
+			};
+
+			pinctrl_qspi0: qspi0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x0    0x20f
+					FM_QSPI0_CSN0    0x3    0x20f
+					FM_QSPI0_CSN1    0x0    0x20f
+					FM_QSPI0_D0_MOSI 0x0    0x23f
+					FM_QSPI0_D1_MISO 0x0    0x23f
+					FM_QSPI0_D2_WP   0x0    0x23f
+					FM_QSPI0_D3_HOLD 0x0    0x23f
+				>;
+			};
+
+			pinctrl_light_i2s0: i2s0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x2    0x208
+					FM_QSPI0_CSN0    0x2    0x238
+					FM_QSPI0_CSN1    0x2    0x208
+					FM_QSPI0_D0_MOSI 0x2    0x238
+					FM_QSPI0_D1_MISO 0x2    0x238
+					FM_QSPI0_D2_WP   0x2    0x238
+					FM_QSPI0_D3_HOLD 0x2    0x238
+				>;
+			};
+
+			pinctrl_pwm: pwmgrp {
+				thead,pins = <
+					FM_GPIO3_2	0x1	0x208	/* pwm0 */
+					FM_GPIO3_3	0x1	0x208	/* pwm1 */
+				>;
+			};
+		};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
+			pinctrl_qspi1: qspi1grp {
+				thead,pins = <
+					FM_QSPI1_SCLK    0x0    0x20a
+					FM_QSPI1_CSN0    0x3    0x20a
+					FM_QSPI1_D0_MOSI 0x0    0x23a
+					FM_QSPI1_D1_MISO 0x0    0x23a
+					FM_QSPI1_D2_WP   0x0    0x23a
+					FM_QSPI1_D3_HOLD 0x0    0x23a
+				>;
+			};
+
+
+			pinctrl_iso7816: iso7816grp {
+				thead,pins = <
+					FM_QSPI1_SCLK		0x1	0x208
+					FM_QSPI1_D0_MOSI	0x1	0x238
+					FM_QSPI1_D1_MISO	0x1	0x238
+					FM_QSPI1_D2_WP		0x1	0x238
+					FM_QSPI1_D3_HOLD	0x1	0x238
+				>;
+			};
+
+		};
+};
+
+&i2c2 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c3 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c4 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	pcal6408ahk_a: gpio@20 {
+		compatible = "nxp,pcal9554b";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+&isp0 {
+	status = "disabled";
+};
+
+&isp1 {
+	status = "disabled";
+};
+
+&isp_ry0 {
+	status = "disabled";
+};
+
+&dewarp {
+	status = "disabled";
+};
+
+&dec400_isp0 {
+	status = "disabled";
+};
+
+&dec400_isp1 {
+	status = "disabled";
+};
+
+&dec400_isp2 {
+	status = "disabled";
+};
+
+&bm_visys {
+	status = "disabled";
+};
+
+&bm_csi0 {
+	status = "disabled";
+};
+
+&bm_csi1 {
+	status = "disabled";
+};
+
+&bm_csi2 {
+	status = "disabled";
+};
+
+&vi_pre {
+	//vi_pre_irq_en = <1>;
+	status = "disabled";
+};
+
+&xtensa_dsp {
+	status = "disabled";
+};
+
+&xtensa_dsp0 {
+	status = "disabled";
+    memory-region = <&dsp0_mem>;
+};
+
+&xtensa_dsp1{
+    status = "disabled";
+    memory-region = <&dsp1_mem>;
+};
+
+&vvcam_flash_led0{
+    flash_led_name = "aw36413_aw36515";
+	floodlight_i2c_bus = /bits/ 8 <2>;
+	floodlight_en_pin = <&gpio1_porta 25 0>;
+	//projection_i2c_bus = /bits/ 8 <2>;
+	flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
+	status = "disabled";
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "okay";
+};
+
+&vdec {
+	status = "disabled";
+};
+
+&venc {
+	status = "disabled";
+};
+
+&isp_venc_shake {
+	status = "disabled";
+};
+
+&vidmem {
+	status = "okay";
+	memory-region = <&vi_mem>;
+};
+
+&gpu {
+	status = "disabled";
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+	c910_1: cpu@1 {
+		status = "disabled";
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+	c910_2: cpu@2 {
+		status = "disabled";
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+	c910_3: cpu@3 {
+		status = "disabled";
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+};
+
+&thermal_zones {
+	cpu-thermal-zone {
+		status = "disabled";
+	};
+};
+
+&dummy_clock_apb {
+	clock-frequency = <50000000>;
+};
+
+&uart0 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart1 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart2 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart3 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart4 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart5 {
+	clocks = <&dummy_clock_apb>;
+};
+
+&usb3_drd {
+	status = "disabled";
+};
+
+&usb {
+	status = "disabled";
+};
+
+&dspsys_reg {
+	status = "disabled";
+};
+
+&audio_ioctrl {
+	status = "disabled";
+};
+
+&audio_cpr {
+	status = "disabled";
+};
+
+&timer0 {
+	clock-frequency = <50000000>;
+};
+
+&timer1 {
+	clock-frequency = <50000000>;
+};
+
+&timer2 {
+	clock-frequency = <50000000>;
+};
+
+&timer3 {
+	clock-frequency = <50000000>;
+};
+
+&g2d {
+	status = "disabled";
+};
+
+&vosys_reg {
+	status = "disabled";
+};
+
+&dmac2 {
+    status = "disabled";
+};
+
+&sdhci1 {
+	status = "disabled";
+};
+
+&pvt {
+	status = "disabled";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&csia_reg {
+	status = "disabled";
+};
+
+&visys_clk_gate { /* VI_SYSREG_R */
+	status = "disabled";
+};
+
+&vpsys_clk_gate { /* VP_SYSREG_R */
+	status = "disabled";
+};
+
+&vosys_clk_gate { /* VO_SYSREG_R */
+	status = "disabled";
+};
+
+&dspsys_clk_gate {
+	status = "disabled";
+};
+
+&watchdog0 {
+	status = "disabled";
+};
+
+&watchdog1 {
+	status = "disabled";
+};
+

arch/riscv/boot/dts/thead/light-a-product.dts

@@ -13,8 +13,6 @@
 
 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
-		linux,initrd-start = <0x0 0x2000000>;
-		linux,initrd-end = <0x0 0x14600000>;
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -465,6 +463,10 @@
 	};
 };
 
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
+};
+
 &resmem {
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -488,14 +490,16 @@
                0x0 0x20688000 0x0 0x00178000>;  /* DSP shared memory */
         no-map;
     };
-	facelib_mem: memory@d0000000 {
-		reg = <0x0 0xd0000000 0 0x10000000>;
+    vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
 		no-map;
 	};
-    vi_mem: framebuffer@70000000 {
-        reg = <0x0 0x70000000 0 0xbc00000>;
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
 		no-map;
-    };
+	};
 };
 
 &adc {
@@ -504,7 +508,7 @@
 };
 
 &i2c0 {
-	clock-frequency = <100000>;
+    clock-frequency = <400000>;
 	status = "okay";
 
 	eeprom@50 {
@@ -531,13 +535,13 @@
                irq-gpios = <&gpio1_porta 8 0>;
                reset-gpios = <&gpio1_porta 7 0>;
                AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
                touchscreen-size-y = <1280>;
        };
 };
 
 &i2c1 {
-        clock-frequency = <100000>;
+        clock-frequency = <400000>;
         status = "okay";
         touch1@5d {
                 #gpio-cells = <2>;
@@ -548,7 +552,7 @@
                 irq-gpios = <&gpio1_porta 12 0>;
                 reset-gpios = <&gpio1_porta 11 0>;
                 AVDD28-supply = <&reg_tp1_pwr_en>;
-                touchscreen-size-x = <720>;
+                touchscreen-size-x = <800>;
                 touchscreen-size-y = <1280>;
         };
 };
@@ -683,6 +687,8 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
+	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
 	keep-power-in-suspend;
@@ -724,7 +730,7 @@
 				>;
 			};
 
-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -815,6 +821,7 @@
 };
 
 &i2c2 {
+    clock-frequency = <400000>;
 	status = "okay";
 
 	eeprom@50 {
@@ -825,6 +832,7 @@
 };
 
 &i2c3 {
+    clock-frequency = <400000>;
 	status = "okay";
 
 	eeprom@50 {
@@ -835,6 +843,7 @@
 };
 
 &i2c4 {
+    clock-frequency = <400000>;
 	status = "okay";
 
 	eeprom@50 {
@@ -965,8 +974,8 @@
 
 &video0{
 	status = "okay";
-    piplane0 {
-		pipline_id = <0>;
+    channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -990,8 +999,8 @@
 
 &video1{
 	status = "okay";
-	piplane0 { // VSE0
-		pipline_id = <0>;
+	channel0 { // VSE0
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -1015,8 +1024,8 @@
 
 &video2{
 	status = "okay";
-	piplane0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
         sensor0 {
 			subdev_name = "vivcam";
@@ -1036,8 +1045,8 @@
 			path_type = "DSP_PATH_VIPRE_ODD";
 		};
 	};
-    piplane1 {
-		pipline_id = <1>;
+    channel1 {
+		channel_id = <1>;
 		status = "okay";
         sensor0 {
 			subdev_name = "vivcam";

arch/riscv/boot/dts/thead/light-a-ref-dsi0-hdmi.dts

@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-ref-dsi0.dts"
+
+&dpu_enc1 {
+        ports {
+                /delete-node/ port@0;
+        };
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};

arch/riscv/boot/dts/thead/light-a-ref-dsi0.dts

@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-ref.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "txd,dy800qwxpab";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&gpio1_porta 5 1>; /* active low */
+		vdd1v8-supply = <&lcd0_1v8>;
+		vspn5v7-supply = <&lcd0_5v7>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};

arch/riscv/boot/dts/thead/light-a-ref.dts

@@ -0,0 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+#include "light-a-val.dts"

arch/riscv/boot/dts/thead/light-a-val-android.dts

@@ -63,7 +63,7 @@
                         sound-dai = <&light_i2s 1>;
                 };
                 codec {
-                        sound-dai = <&dummy_codec 2>;
+                        sound-dai = <&dummy_codec>;
                 };
     };
 };

arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts

@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-audio.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc1 {
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&lightsound {
+	status = "okay";
+	
+	simple-audio-card,dai-link@2 {          /* I2S - HDMI */
+		reg = <2>;
+		format = "i2s";
+		cpu {
+			sound-dai = <&light_i2s 1>;
+		};
+		codec {
+			sound-dai = <&dummy_codec>;
+		};
+	};
+};
+
+&light_i2s {
+        status = "okay";
+};

arch/riscv/boot/dts/thead/light-a-val-audio-i2s-8ch.dts

@@ -0,0 +1,100 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-audio.dts"
+
+/ {
+	model = "T-HEAD Light FM Audio VAL board";
+	compatible = "thead,light-val-audio-i2s-8ch", "thead,light";
+};
+
+
+&lightsound {
+        status = "okay";
+
+	simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+
+	simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <2>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd3 3>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+
+        simple-audio-card,dai-link@3 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+                reg = <3>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd0 0>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc1>;
+                };
+        };
+
+        simple-audio-card,dai-link@4 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+                reg = <4>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd1 1>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc1>;
+                };
+        };
+};
+
+&i2s_8ch_sd0 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa4>,
+                    <&pinctrl_audio_i2s_8ch_sd0>,
+                    <&pinctrl_audiopa2>,
+                    <&pinctrl_audiopa3>,
+                    <&pinctrl_audiopa8>,
+                    <&pinctrl_audio_i2s_8ch_bus>;
+};
+
+&i2s_8ch_sd1 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa0>,
+                    <&pinctrl_audio_i2s_8ch_sd2>;
+};
+
+&i2s_8ch_sd3 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+        channels-max = <8>;
+};
+
+&es7210_audio_codec_adc1 {
+        status = "okay";
+        channels-max = <8>;
+};

arch/riscv/boot/dts/thead/light-a-val-audio-spdif.dts

@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+&spdif0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif0>;
+	status = "okay";
+};
+
+&spdif1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif1>;
+	status = "okay";
+};
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,dai-link@0 {          /* SPDIF0 */
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&spdif0>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
+        simple-audio-card,dai-link@1 {          /* SPDIF1 */
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&spdif1>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
+};

arch/riscv/boot/dts/thead/light-a-val-audio-tdm.dts

@@ -0,0 +1,182 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+&tdm_slot1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_tdm>;
+	status = "okay";
+};
+
+&tdm_slot2 {
+	status = "okay";
+};
+
+&tdm_slot3 {
+	status = "okay";
+};
+
+&tdm_slot4 {
+	status = "okay";
+};
+
+&tdm_slot5 {
+	status = "okay";
+};
+
+&tdm_slot6 {
+	status = "okay";
+};
+
+&tdm_slot7 {
+	status = "okay";
+};
+
+&tdm_slot8 {
+	status = "okay";
+};
+
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "okay";
+
+        es7210_adc2: es7210@42 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x42>;
+                work-mode = "ES7210_TDM_1LRCK_DSPB";
+                channels-max = <8>;
+                sound-name-prefix = "ES7210_ADC2";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+
+        es7210_adc3: es7210@43 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_1";
+                reg = <0x43>;
+                work-mode = "ES7210_TDM_1LRCK_DSPB";
+                channels-max = <8>;
+                sound-name-prefix = "ES7210_ADC3";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+};
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"AW87519 IN", "ES8156 ROUT",
+        	"Speaker", "AW87519 VO";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* TDM - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot1>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@2 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot2>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@3 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot3>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@4 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot4>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@5 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot5>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@6 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot6>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@7 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot7>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@8 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot8>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+};
+
+&i2s0 {
+        status = "okay";
+};

arch/riscv/boot/dts/thead/light-a-val-audio.dts

@@ -11,8 +11,12 @@
 };
 
 &lightsound {
-	status = "okay";
-
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
         simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                 reg = <0>;
                 format = "i2s";
@@ -28,22 +32,24 @@
                 reg = <1>;
                 format = "i2s";
                 cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                 };
                 codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                 };
         };
 };
 
-&light_i2s {
-	status = "okay";
-};
-
 &i2s0 {
         status = "okay";
 };
 
-&i2s3 {
+&i2s_8ch_sd2 {
         status = "okay";
 };
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
+
+

arch/riscv/boot/dts/thead/light-a-val-crash.dts

@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-crash.dts"
+
+&aon {
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic";
+		status = "okay";
+
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	};
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_2: cpu@2 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_3: cpu@3 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+};

arch/riscv/boot/dts/thead/light-a-val-ddr1G.dts

@@ -11,11 +11,11 @@
 
 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x40000000>;
+		reg = <0x0 0x200000 0x0 0x3fe00000>;
 	};
 };
 
 &cmamem {
-	size = <0 0x8c00000>;
-	alloc-ranges = <0 0x35000000 0 0x3dc00000>;
+	size = <0 0x8c00000>; // 140MB by default
+	alloc-ranges = <0 0x02000000 0 0x0cc00000>; // [0x0600_0000 ~ 0x0EC0_0000]
 };

arch/riscv/boot/dts/thead/light-a-val-ddr2G.dts

@@ -11,11 +11,15 @@
 
 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x80000000>;
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
 	};
 };
 
+&cmamem {
+	alloc-ranges = <0 0x64000000 0 0x14000000>; // [0x6400_0000 ~ 0x7800_0000]
+};
+
 &facelib_mem {
-	reg = <0x0 0x33000000 0 0x02000000>;
+	reg = <0x0 0x22000000 0 0x02000000>;
 	no-map;
 };

arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-audio.dts

@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-dsi0-hdmi.dts"
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+        simple-audio-card,dai-link@2 {          /* I2S - HDMI */
+                reg = <2>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&light_i2s 1>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
+};
+
+&light_i2s {
+	status = "okay";
+};
+
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};

arch/riscv/boot/dts/thead/light-a-val-full.dts

@@ -95,7 +95,11 @@
 
 &lightsound {
         status = "okay";
-
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
         simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                 reg = <0>;
                 format = "i2s";
@@ -111,23 +115,27 @@
                 reg = <1>;
                 format = "i2s";
                 cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                 };
                 codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                 };
         };
 };
 
 &light_i2s {
-        status = "okay";
+	status = "okay";
 };
 
 &i2s0 {
         status = "okay";
 };
 
-&i2s3 {
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+ 
+&es7210_audio_codec_adc0 {
         status = "okay";
 };
 

arch/riscv/boot/dts/thead/light-a-val-hdmi.dts

@@ -48,7 +48,7 @@
 			sound-dai = <&light_i2s 1>;
 		};
 		codec {
-			sound-dai = <&dummy_codec 2>;
+			sound-dai = <&dummy_codec>;
 		};
 	};
 };

arch/riscv/boot/dts/thead/light-a-val-miniapp-dsi0.dts

@@ -74,6 +74,26 @@
 	};
 };
 
+&padctrl_audiosys {
+	status = "okay";
+
+	light-audio-padctrl {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+
+			pinctrl_audio_i2s_8ch: audio_i2s_8ch_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA0	  0x2 0x008
+					FM_AUDIO_IO_PA2	  0x2 0x008
+					FM_AUDIO_IO_PA3   0x2 0x008
+					FM_AUDIO_IO_PA8   0x2 0x008
+				>;
+			};
+	};
+};
+
 &lightsound {
 	status = "okay";
 
@@ -92,15 +112,14 @@
                 reg = <1>;
                 format = "i2s";
                 cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                 };
                 codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                 };
         };
 };
 
-
 &light_i2s {
 	status = "okay";
 };
@@ -109,7 +128,11 @@
         status = "okay";
 };
 
-&i2s3 {
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
         status = "okay";
 };
 

arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi.dts

@@ -56,10 +56,10 @@
                 reg = <1>;
                 format = "i2s";
                 cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                 };
                 codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                 };
         };
 };
@@ -73,7 +73,11 @@
         status = "okay";
 };
 
-&i2s3 {
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
         status = "okay";
 };
 

arch/riscv/boot/dts/thead/light-a-val-sec.dts

@@ -5,9 +5,13 @@
 
 /dts-v1/;
 
-#include "light-a-val-dsi0-hdmi.dts"
+#include "light-a-val-audio-hdmi.dts"
 
 
 &light_iopmp {
         status = "disabled";
 };
+&qspi1 {
+        status = "disabled";
+};
+

arch/riscv/boot/dts/thead/light-ant-discrete-crash.dts

@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-crash.dts"
+
+&aon {
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic-ant";
+		status = "okay";
+
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	};
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+	c910_2: cpu@2 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+	c910_3: cpu@3 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+};

arch/riscv/boot/dts/thead/light-ant-ref-crash.dts

@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-crash.dts"
+
+&aon {
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic-ant";
+		status = "okay";
+
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	};
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+	c910_2: cpu@2 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+	c910_3: cpu@3 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+};

arch/riscv/boot/dts/thead/light-ant-ref-sec.dts

@@ -5,7 +5,7 @@
 
 /dts-v1/;
 
-#include "light-ant-evt.dts"
+#include "light-ant-ref.dts"
 
 
 

arch/riscv/boot/dts/thead/light-b-power.dts

@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-b-product.dts"
+
+&aon {
+	/delete-node/light-ricoh-reg;
+
+       	soc_vdd18_lcd0_bk_en_reg: soc_vdd18_lcd0_bk_en {
+		compatible = "regulator-fixed";
+		regulator-name = "soc_vdd18_lcd0_bk_en";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio1_porta 9 1>;
+		enable-active-high;
+	};
+
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic-ant";
+		status = "okay";
+	
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_aon_reg: soc_dvdd18_aon {
+			regulator-name = "soc_dvdd18_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+			regulator-name = "soc_avdd33_usb3";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_aon_reg: soc_dvdd08_aon {
+			regulator-name = "soc_dvdd08_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+			regulator-name = "soc_dvdd08_ddr";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+			regulator-name = "soc_vdd_ddr_1v8";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+			regulator-name = "soc_vdd_ddr_1v1";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+			regulator-name = "soc_vdd_ddr_0v6";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_ap_reg: soc_dvdd18_ap {
+			regulator-name = "soc_dvdd18_ap";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+			regulator-name = "soc_avdd08_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+			regulator-name = "soc_avdd18_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd33_emmc_reg: soc_vdd33_emmc {
+			regulator-name = "soc_vdd33_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd18_emmc_reg: soc_vdd18_emmc {
+			regulator-name = "soc_vdd18_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+#if 0	
+		soc_dovdd18_scan_reg: soc_dovdd18_scan {
+			regulator-name = "soc_dovdd18_scan";
+		};
+	
+		soc_dvdd12_scan_reg: soc_dvdd12_scan {
+			regulator-name = "soc_dvdd12_scan";
+		};
+	
+		soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+			regulator-name = "soc_avdd28_scan_en";
+		};
+#endif
+	
+	};
+};
+
+
+&panel0 {
+
+	vdd1v8-supply = <&soc_vdd18_lcd0_bk_en_reg>;
+};

arch/riscv/boot/dts/thead/light-b-product-crash.dts

@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-crash.dts"
+
+&aon {
+	aon_reg_ricoh: light-ricoh-reg {
+		compatible = "thead,light-ricoh-pmic";
+		status = "okay";
+
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	};
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+	c910_2: cpu@2 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+	c910_3: cpu@3 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+		>;
+	};
+};

arch/riscv/boot/dts/thead/light-b-product-ddr1G.dts

@@ -11,11 +11,11 @@
 
 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x40000000>;
+		reg = <0x0 0x200000 0x0 0x3fe00000>;
 	};
 };
 
 &cmamem {
-	size = <0 0x8c00000>;
-	alloc-ranges = <0 0x35000000 0 0x3dc00000>;
+	size = <0 0x8c00000>; // 140MB by default
+	alloc-ranges = <0 0x02000000 0 0x0cc000000>; // [0x0600_0000 ~ 0x0EC0_0000]
 };

arch/riscv/boot/dts/thead/light-b-product-sec.dts

@@ -5,7 +5,7 @@
 
 /dts-v1/;
 
-#include "light-b-product.dts"
+#include "light-b-audio-hdmi.dts"
 
 
 

arch/riscv/boot/dts/thead/light-b-ref.dts

@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-b-product.dts"
+
+&aon {
+	/delete-node/light-ricoh-reg;
+
+       	soc_vdd18_lcd0_bk_en_reg: soc_vdd18_lcd0_bk_en {
+		compatible = "regulator-fixed";
+		regulator-name = "soc_vdd18_lcd0_bk_en";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio1_porta 9 1>;
+		enable-active-high;
+	};
+
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic-ant";
+		status = "okay";
+	
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_aon_reg: soc_dvdd18_aon {
+			regulator-name = "soc_dvdd18_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+			regulator-name = "soc_avdd33_usb3";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_aon_reg: soc_dvdd08_aon {
+			regulator-name = "soc_dvdd08_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+			regulator-name = "soc_dvdd08_ddr";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+			regulator-name = "soc_vdd_ddr_1v8";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+			regulator-name = "soc_vdd_ddr_1v1";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+			regulator-name = "soc_vdd_ddr_0v6";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_ap_reg: soc_dvdd18_ap {
+			regulator-name = "soc_dvdd18_ap";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+			regulator-name = "soc_avdd08_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+			regulator-name = "soc_avdd18_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd33_emmc_reg: soc_vdd33_emmc {
+			regulator-name = "soc_vdd33_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd18_emmc_reg: soc_vdd18_emmc {
+			regulator-name = "soc_vdd18_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+#if 0	
+		soc_dovdd18_scan_reg: soc_dovdd18_scan {
+			regulator-name = "soc_dovdd18_scan";
+		};
+	
+		soc_dvdd12_scan_reg: soc_dvdd12_scan {
+			regulator-name = "soc_dvdd12_scan";
+		};
+	
+		soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+			regulator-name = "soc_avdd28_scan_en";
+		};
+#endif
+	
+	};
+};
+
+
+&panel0 {
+
+	vdd1v8-supply = <&soc_vdd18_lcd0_bk_en_reg>;
+};

arch/riscv/boot/dts/thead/light-beagle.dts

@@ -0,0 +1,705 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-beagle-ref.dts"
+
+&vvcam_sensor4 { // beagle board J5 CSI0 connector
+	sensor_name = "IMX219";
+	sensor_pdn = <&gpio2_porta 23 0>; //powerdown pin / shutdown pin 
+	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
+	i2c_addr = /bits/ 8 <0x10>;
+	i2c_bus = /bits/ 8 <1>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	status = "okay";
+};
+
+&vvcam_sensor5 { // beagle board J4 CSI1 connector
+	sensor_name = "IMX219";
+	sensor_pdn = <&gpio2_porta 24 0>; //powerdown pin / shutdown pin 
+	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
+	i2c_addr = /bits/ 8 <0x10>;
+	i2c_bus = /bits/ 8 <3>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	status = "okay";
+};
+
+/*
+sensor imx219 mounted on beagle board J4 CSI1 (=light CSI2X2_A+CSI2X2_B   /   CSI2X2_A only)
+video0: sensor-vipre-isp0
+video1: sensor-vipre-isp0-dw
+video7: sensor-vipre-isp0-dsp1-ry-dw
+video10: tuningtool
+
+sensor imx219 mounted on beagle board J5 CSI0 (=light CSI2)
+video2: sensor-vipre-isp1   
+video3: sensor-vipre-isp1-dw   
+video4: sensor-vipre-isp1-dsp0-ry
+video5: sensor-vipre-isp1-dsp0-ry-dw
+video12: tuningtool
+*/
+
+&video0{
+    vi_mem_pool_region = <0xFFFFFFFF>;	// vi_mem: framebuffer, region[2]
+    channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video2 {
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	status = "okay";
+	channel0 {
+		channel_id = <0>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		channel_id = <1>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		channel_id = <2>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video3{
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE0";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE1";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE2";
+			dw_dst_depth = <2>;
+		};
+	};
+};
+
+&video4{
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video5{
+	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE0";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE1";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE2";
+			dw_dst_depth = <2>;
+		};
+	};
+};

arch/riscv/boot/dts/thead/light-crash.dts

@@ -0,0 +1,874 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "light-vi-devices.dtsi"
+/ {
+	model = "T-HEAD Light val board";
+	compatible = "thead,light-val", "thead,light";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlycon";
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		status = "disabled";
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+	};
+
+	display-subsystem {
+		status = "okay";
+	};
+
+	lcd0_backlight: pwm-backlight@0 {
+		status = "disabled";
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	light_iopmp: iopmp {
+		status = "disabled";
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp_fce: IOPMP_FCE {
+			is_default_region;
+		};
+
+		iopmp_npu: IOPMP_NPU {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		status = "disabled";
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
+		sound-name-prefix = "DUMMY";
+		status = "okay";
+	};
+
+	reg_vref_1v8: regulator-adc-verf {
+			compatible = "regulator-fixed";
+			regulator-name = "vref-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+	status = "okay";
+	};
+
+        reg_tp_pwr_en: regulator-pwr-en {
+                compatible = "regulator-fixed";
+                regulator-name = "PWR_EN";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpio1_porta 12 1>;
+                enable-active-high;
+                regulator-always-on;
+        };
+
+	wcn_wifi: wireless-wlan {
+		compatible = "wlan-platdata";
+		clock-names = "clk_wifi";
+		ref-clock-frequency = <24000000>;
+		keep_wifi_power_on;
+		pinctrl-names = "default";
+		wifi_chip_type = "rtl8723ds";
+		WIFI,poweren_gpio = <&gpio2_porta 29 0>;
+		WIFI,reset_n = <&gpio2_porta 24 0>;
+		status = "okay";
+	};
+
+	wcn_bt: wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		pinctrl-names = "default", "rts_gpio";
+		BT,power_gpio    = <&gpio2_porta 25 0>;
+		status = "okay";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-0 = <&pinctrl_volume>;
+		pinctrl-names = "default";
+		key-volumedown {
+			label = "Volume Down Key";
+			linux,code = <KEY_VOLUMEDOWN>;
+			debounce-interval = <1>;
+			gpios = <&ao_gpio_porta 11 0x1>;
+		};
+		key-volumeup {
+			label = "Volume Up Key";
+			linux,code = <KEY_VOLUMEUP>;
+			debounce-interval = <1>;
+			gpios = <&ao_gpio_porta 10 0x1>;
+		};
+	};
+
+	aon: light-aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "okay";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "okay";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+		};
+	};
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+
+	dsp0_mem: memory@20000000 {             /**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000   /* DSP FW code&data section 2.5M*/ 
+               0x0 0x20280000 0x0 0x00001000   /* DSP communication area 4K*/ 
+               0x0 0x20281000 0x0 0x00007000  /* Panic/log page 28K */
+               0x0 0x20288000 0x0 0x00178000>;  /* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+    dsp1_mem: memory@20400000 {             /**0x2040_0000~0x2080_0000 4M**/
+        reg = <0x0 0x20400000 0x0 0x00280000  /* DSP FW code&data section */ 
+               0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
+               0x0 0x20681000 0x0 0x00007000    /* Panic/log page*/ 
+               0x0 0x20688000 0x0 0x00178000>;  /* DSP shared memory */
+        no-map;
+    };
+	vi_mem: framebuffer@10000000 {
+		reg = <0x0 0x10000000 0x0 0x02C00000	/* vi_mem_pool_region[0]  44 MB (default) */
+		       0x0 0x12C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x14900000 0x0 0x01E00000>;	/* vi_mem_pool_region[2]  30 MB */
+		no-map;
+	};
+	facelib_mem: memory@17000000 {
+		reg = <0x0 0x17000000 0 0x02000000>;
+		no-map;
+	};
+};
+
+&adc {
+	vref-supply = <&reg_vref_1v8>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+       touch@5d {
+               #gpio-cells = <2>;
+               compatible = "goodix,gt911";
+               reg = <0x5d>;
+               interrupt-parent = <&gpio1_porta>;
+               interrupts = <8 0>;
+               irq-gpios = <&gpio1_porta 8 0>;
+               reset-gpios = <&gpio1_porta 7 0>;
+               AVDD28-supply = <&reg_tp_pwr_en>;
+               touchscreen-size-x = <800>;
+               touchscreen-size-y = <1280>;
+       };
+
+};
+
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "okay";
+
+       es8156_audio_codec: es8156@8 {
+               #sound-dai-cells = <0>;
+               compatible = "everest,es8156";
+               reg = <0x08>;
+               sound-name-prefix = "ES8156";
+               status = "disabled";
+       };
+
+        es7210_audio_codec: es7210@40 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x40>;
+                sound-name-prefix = "ES7210";
+                status = "disabled";
+        };
+
+	audio_aw87519_pa: amp@58 {
+		compatible = "awinic,aw87519_pa";
+		reg = <0x58>;
+		reset-gpio = <&ao_gpio4_porta 9 0x1>;
+		sound-name-prefix = "AW87519";
+		status = "okay";
+	};
+};
+
+&i2c1 {
+        clock-frequency = <100000>;
+        status = "okay";
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "disabled";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&uart0 {
+	clocks = <&dummy_clock_uart_sclk>;
+	clock-names = "baudclk";
+	clock-frequency = <100000000>;
+};
+
+&qspi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>;
+	rx-sample-dly = <4>;
+	status = "disabled";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi1";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&qspi1 {
+	compatible = "snps,dw-apb-ssi";
+	num-cs = <1>;
+	cs-gpios = <&gpio0_porta 1 0>;
+	status = "disabled";
+
+	spidev@0 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x0>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&gmac0 {
+	phy-mode = "rgmii-id";
+	rx-clk-delay = <0x00>; /* for RGMII */
+	tx-clk-delay = <0x00>; /* for RGMII */
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x1>;
+		};
+
+		phy_88E1111_1: ethernet-phy@1 {
+			reg = <0x2>;
+		};
+	};
+};
+
+&gmac1 {
+	phy-mode = "rgmii-id";
+	rx-clk-delay = <0x00>; /* for RGMII */
+	tx-clk-delay = <0x00>; /* for RGMII */
+	phy-handle = <&phy_88E1111_1>;
+	status = "okay";
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	mmc-hs400-1_8v;
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "okay";
+};
+
+&sdhci1 {
+	max-frequency = <100000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	wakeup-source;
+	status = "okay";
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart0: uart0grp {
+				thead,pins = <
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
+				>;
+			};
+
+			pinctrl_qspi0: qspi0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x0    0x20f
+					FM_QSPI0_CSN0    0x3    0x20f
+					FM_QSPI0_CSN1    0x0    0x20f
+					FM_QSPI0_D0_MOSI 0x0    0x23f
+					FM_QSPI0_D1_MISO 0x0    0x23f
+					FM_QSPI0_D2_WP   0x0    0x23f
+					FM_QSPI0_D3_HOLD 0x0    0x23f
+				>;
+			};
+
+			pinctrl_light_i2s0: i2s0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x2    0x208
+					FM_QSPI0_CSN0    0x2    0x238
+					FM_QSPI0_CSN1    0x2    0x208
+					FM_QSPI0_D0_MOSI 0x2    0x238
+					FM_QSPI0_D1_MISO 0x2    0x238
+					FM_QSPI0_D2_WP   0x2    0x238
+					FM_QSPI0_D3_HOLD 0x2    0x238
+				>;
+			};
+
+			pinctrl_pwm: pwmgrp {
+				thead,pins = <
+					FM_GPIO3_2	0x1	0x208	/* pwm0 */
+				>;
+			};
+		};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
+			pinctrl_qspi1: qspi1grp {
+				thead,pins = <
+					FM_QSPI1_SCLK    0x0    0x20a
+					FM_QSPI1_CSN0    0x3    0x20a
+					FM_QSPI1_D0_MOSI 0x0    0x23a
+					FM_QSPI1_D1_MISO 0x0    0x23a
+					FM_QSPI1_D2_WP   0x0    0x23a
+					FM_QSPI1_D3_HOLD 0x0    0x23a
+				>;
+			};
+
+
+			pinctrl_iso7816: iso7816grp {
+				thead,pins = <
+					FM_QSPI1_SCLK		0x1	0x208
+					FM_QSPI1_D0_MOSI	0x1	0x238
+					FM_QSPI1_D1_MISO	0x1	0x238
+					FM_QSPI1_D2_WP		0x1	0x238
+					FM_QSPI1_D3_HOLD	0x1	0x238
+				>;
+			};
+
+		};
+};
+
+&padctrl_aosys {
+	light-aon-padctrl {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+
+			pinctrl_audiopa1: audiopa1_grp {
+				thead,pins = <
+					FM_AUDIO_PA1	0x3	0x72
+				>;
+			};
+
+			pinctrl_audiopa2: audiopa2_grp {
+				thead,pins = <
+					FM_AUDIO_PA2	0x0	0x72
+				>;
+			};
+
+			pinctrl_volume: volume_grp {
+				thead,pins = <
+					FM_AOGPIO_11  0x0     0x208
+					FM_AOGPIO_10  0x3     0x208
+				>;
+			};
+	};
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c2 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c3 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&isp0 {
+	status = "disabled";
+};
+
+&isp1 {
+	status = "disabled";
+};
+
+&isp_ry0 {
+	status = "disabled";
+};
+
+&dewarp {
+	status = "disabled";
+};
+
+&dec400_isp0 {
+	status = "disabled";
+};
+
+&dec400_isp1 {
+	status = "disabled";
+};
+
+&dec400_isp2 {
+	status = "disabled";
+};
+
+&bm_visys {
+	status = "disabled";
+};
+
+&bm_csi0 {
+	status = "disabled";
+};
+
+&bm_csi1 {
+	status = "disabled";
+};
+
+&bm_csi2 {
+	status = "disabled";
+};
+
+&vi_pre {
+	status = "disabled";
+};
+
+&xtensa_dsp {
+	status = "disabled";
+};
+
+&xtensa_dsp0 {
+	status = "disabled";
+};
+
+&xtensa_dsp1 {
+	status = "disabled";
+};
+
+&vvcam_flash_led0{
+       status = "disabled";
+};
+
+
+&vvcam_sensor0 {
+	status = "disabled";
+};
+
+&vvcam_sensor1 {
+	status = "disabled";
+};
+
+&vvcam_sensor2 {
+	status = "disabled";
+};
+
+&vvcam_sensor3 {
+	status = "disabled";
+};
+
+&vvcam_sensor4 {
+    status = "disabled";
+};
+
+&vvcam_sensor5 {
+    status = "disabled";
+};
+
+&video0{
+	status = "disabled";
+};
+
+
+&video1{
+	status = "disabled";
+};
+
+&video2{
+	status = "disabled";
+};
+
+&video3{
+	status = "disabled";
+};
+
+&video4{
+	status = "disabled";
+};
+
+&video5{
+	status = "disabled";
+};
+
+&video6{
+	status = "disabled";
+};
+
+&video7{
+	status = "disabled";
+};
+
+
+&video8{
+	status = "disabled";
+};
+
+&video9{
+	status = "disabled";
+};
+
+
+&video10{
+	status = "disabled";
+};
+
+&video11{
+	status = "disabled";
+};
+
+&video12{
+	status = "disabled";
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "disabled";
+};
+
+&vdec {
+	status = "disabled";
+};
+
+&venc {
+	status = "disabled";
+};
+
+&isp_venc_shake {
+	status = "disabled";
+};
+
+&vidmem {
+	status = "disabled";
+};
+
+&gpu {
+	status = "disabled";
+};
+
+&npu {
+	status = "disabled";
+};
+
+&fce {
+	status = "disabled";
+};
+
+&dpu_enc0 {
+	status = "disabled";
+};
+
+&dpu_enc1 {
+	status = "disabled";
+};
+
+&dpu {
+        status = "disabled";
+};
+
+&dsi0 {
+        status = "disabled";
+};
+
+&dhost_0 {
+	status = "disabled";
+};
+
+&disp1_out {
+	status = "disabled";
+};
+
+&hdmi_tx {
+	status = "disabled";
+};
+
+&lightsound {
+        status = "disabled";
+};
+
+&khvhost {
+	status = "disabled";
+};

arch/riscv/boot/dts/thead/light-emu.dtsi

@@ -309,7 +309,7 @@
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
 			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
 		};
 
 		clint0: clint@ffdc000000 {

arch/riscv/boot/dts/thead/light-evb.dtsi

@@ -42,6 +42,7 @@
 		vivcam3= &vvcam_sensor3;
 		vivcam4= &vvcam_sensor4;
 		vivcam5= &vvcam_sensor5;
+		vivcam6= &vvcam_sensor6;
 	};
 
 	memory@0 {
@@ -317,7 +318,7 @@
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
 			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
 		};
 
 		clint0: clint@ffdc000000 {
@@ -1192,8 +1193,7 @@
 
 		emmc: sdhci@ffe7080000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7080000 0x0 0x10000
-			       0xff 0xef014060 0x0 0x4>;
+			reg = <0xff 0xe7080000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <62>;
 			interrupt-names = "sdhciirq";
@@ -1203,8 +1203,7 @@
 
 		sdhci0: sd@ffe7090000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7090000 0x0 0x10000
-			       0xff 0xef014064 0x0 0x4>;
+			reg = <0xff 0xe7090000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <64>;
 			interrupt-names = "sdhci0irq";
@@ -1214,8 +1213,7 @@
 
 		sdhci1: sd@ffe70a0000 {
 		        compatible = "snps,dwcmshc-sdhci";
-		        reg = <0xff 0xe70a0000 0x0 0x10000
-		               0xff 0xef014064 0x0 0x4>;
+		        reg = <0xff 0xe70a0000 0x0 0x10000>;
 		        interrupt-parent = <&intc>;
 		        interrupts = <71>;
 		        interrupt-names = "sdhci1irq";
@@ -1301,7 +1299,7 @@
 			compatible = "light,light-i2s";
 			reg = <0xff 0xe7034000 0x0 0x4000>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_audio_i2s0>;
+			pinctrl-0 = <&pinctrl_light_i2s0>;
 			light,mode = "i2s-master";
 			interrupt-parent = <&intc>;
 			interrupts = <70>;
@@ -1574,6 +1572,11 @@
 			compatible = "thead,light-vvcam-sensor";
 			status = "disabled";
 		};
+		
+		vvcam_sensor6: vvcam_sensor@6 {
+			compatible = "thead,light-vvcam-sensor";
+			status = "disabled";
+		};
 
 		xtensa_dsp: dsp@01{
 			compatible = "thead,dsp-hw-common";

arch/riscv/boot/dts/thead/light-fm-emu.dts

@@ -185,7 +185,7 @@
 				sound-dai = <&light_i2s 0>;
 			};
 			codec {
-				sound-dai = <&dummy_codec 2>;
+				sound-dai = <&dummy_codec>;
 			};
 		};
 
@@ -196,7 +196,7 @@
 				sound-dai = <&light_i2s 1>;
 			};
 			codec {
-				sound-dai = <&dummy_codec 2>;
+				sound-dai = <&dummy_codec>;
 			};
 		};
 	};
@@ -451,8 +451,8 @@
 
 &video{
 	status = "okay";
-	piplane0 {
-				pipline_id = <0>;
+	channel0 {
+				channel_id = <0>;
 				status = "okay";
 				sensor0 {
 					subdev_name = "vivcam";

arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 2GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a-ddr2G", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0x64000000 0 0x14000000>; // [0x6400_0000 ~ 0x7800_0000]
+};

arch/riscv/boot/dts/thead/light-lpi4a-sec.dts

@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-lpi4a.dts"
+
+
+&light_iopmp {
+        status = "disabled";
+};
+
+&qspi1 {
+        status = "disabled";
+};
+

arch/riscv/boot/dts/thead/light-lpi4a.dts

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a-ref.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0x0E400_0000 ~ 0x0F800_0000]
+};

arch/riscv/boot/dts/thead/light-vi-devices.dtsi

@@ -5,8 +5,8 @@
 
 &video0{
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -31,8 +31,8 @@
 			path_type = "ISP_MI_PATH_MP";
 		};
 	};
-	pipline1 {
-		pipline_id = <1>;
+	channel1 {
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -57,8 +57,8 @@
 			path_type = "ISP_MI_PATH_SP";
 		};
 	};
-	pipline2 {
-		pipline_id = <2>;
+	channel2 {
+		channel_id = <2>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -87,8 +87,8 @@
 
 &video1{
 	status = "okay";
-	pipline0 { // VSE0
-		pipline_id = <0>;
+	channel0 { // VSE0
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -118,8 +118,8 @@
 			path_type = "DW_DWE_VSE0";
 		};
 	};
-	pipline1 { // VSE1
-		pipline_id = <1>;
+	channel1 { // VSE1
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -149,8 +149,8 @@
 			path_type = "DW_DWE_VSE1";
 		};
 	};
-	pipline2 { // VSE2
-		pipline_id = <2>;
+	channel2 { // VSE2
+		channel_id = <2>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -184,8 +184,8 @@
 
 &video2 {
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -199,6 +199,12 @@
 			csi_idx = <0xff>;
 			path_type = "SENSOR_VGA_RAW10_LINER";
 		};
+		sensor2 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
 		dma {
 			subdev_name = "vipre";
 			idx = <0>;
@@ -210,8 +216,8 @@
 			path_type = "ISP_MI_PATH_MP";
 		};
 	};
-	pipline1 {
-		pipline_id = <1>;
+	channel1 {
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -236,8 +242,8 @@
 			path_type = "ISP_MI_PATH_SP";
 		};
 	};
-	pipline2 {
-		pipline_id = <2>;
+	channel2 {
+		channel_id = <2>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -267,8 +273,8 @@
 
 &video3 {
 	status = "okay";
-		pipline0 {
-		pipline_id = <0>;
+		channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -298,8 +304,8 @@
 			path_type = "DW_DWE_VSE0";
 		};
 	};
-	pipline1 {
-		pipline_id = <1>;
+	channel1 {
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -330,8 +336,8 @@
 			path_type = "DW_DWE_VSE1";
 		};
 	};
-	pipline2 {
-		pipline_id = <2>;
+	channel2 {
+		channel_id = <2>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -365,8 +371,8 @@
 
 &video4 {
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -402,8 +408,8 @@
 			path_type = "ISP_RY_MI_PATH_MP";
 		};
 	};
-	pipline1 {
-		pipline_id = <1>;
+	channel1 {
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -438,8 +444,8 @@
 			path_type = "ISP_RY_MI_PATH_SP";
 		};
 	};
-	pipline2 {
-		pipline_id = <2>;
+	channel2 {
+		channel_id = <2>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -478,8 +484,8 @@
 
 &video5 {
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -520,8 +526,8 @@
 			path_type = "DW_DWE_VSE0";
 		};
 	};
-	pipline1 {
-		pipline_id = <1>;
+	channel1 {
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -561,8 +567,8 @@
 			path_type = "DW_DWE_VSE1";
 		};
 	};
-	pipline2 {
-		pipline_id = <2>;
+	channel2 {
+		channel_id = <2>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -607,8 +613,8 @@
 
 &video6 {
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -625,7 +631,7 @@
 		dma {
 			subdev_name = "vipre";
 			idx = <0>;
-			path_type = "VIPRE_CSI2_DDR";
+			path_type = "VIPRE_CSI2_DSP";
 		};
 		dsp {
 			subdev_name = "dsp";
@@ -633,8 +639,8 @@
 			path_type = "DSP_PATH_VIPRE_ODD";
 		};
 	};
-	pipline1 {
-		pipline_id = <1>;
+	channel1 {
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -651,7 +657,7 @@
 		dma {
 			subdev_name = "vipre";
 			idx = <0>;
-			path_type = "VIPRE_CSI2_DDR";
+			path_type = "VIPRE_CSI2_DSP";
 		};
 		dsp {
 			subdev_name = "dsp";
@@ -664,8 +670,8 @@
 
 &video7{
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -706,8 +712,8 @@
 		};
 
 	};
-	pipline1 {
-		pipline_id = <1>;
+	channel1 {
+		channel_id = <1>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -747,8 +753,8 @@
 			path_type = "DW_DWE_VSE1";
 		};
 	};
-	pipline2 {
-		pipline_id = <2>;
+	channel2 {
+		channel_id = <2>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -793,8 +799,8 @@
 
 &video8{
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -811,7 +817,7 @@
 		dma {
 			subdev_name = "vipre";
 			idx = <0>;
-			path_type = "VIPRE_CSI1_DDR";
+			path_type = "VIPRE_CSI1_DSP";
 		};
 		dsp {
 			subdev_name = "dsp";
@@ -824,8 +830,8 @@
 
 &video9 { //IR debug
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -844,7 +850,7 @@
 		dma {
 			subdev_name = "vipre";
 			idx = <0>;
-			path_type = "VIPRE_CSI2_DDR";
+			path_type = "VIPRE_CSI2_DSP";
 		};
 		dsp {
 			subdev_name = "dsp";
@@ -857,7 +863,7 @@
 
 &video10{ // TUNING TOOL
 	status = "okay";
-	pipline0 { // CSI2X2_B
+	channel0 { // CSI2X2_B
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -884,8 +890,8 @@
 
 &video11{
 	status = "okay";
-	pipline0 {
-		pipline_id = <0>;
+	channel0 {
+		channel_id = <0>;
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";
@@ -915,7 +921,7 @@
 
 &video12{ // TUNING TOOL
 	status = "okay";
-	pipline0 { // CSI2
+	channel0 { // CSI2
 		status = "okay";
 		sensor0 {
 			subdev_name = "vivcam";

arch/riscv/boot/dts/thead/light.dtsi

@@ -6,14 +6,18 @@
 #include <dt-bindings/pinctrl/light-fm-left-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-right-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
+#include <dt-bindings/pinctrl/light-fm-audio-pinctrl.h>
+#include <dt-bindings/pinctrl/light-fm-pinctrl-def.h>
 #include <dt-bindings/clock/light-fm-ap-clock.h>
 #include <dt-bindings/clock/light-vpsys.h>
 #include <dt-bindings/clock/light-vosys.h>
 #include <dt-bindings/clock/light-visys.h>
 #include <dt-bindings/clock/light-dspsys.h>
+#include <dt-bindings/clock/light-audiosys.h>
 #include <dt-bindings/firmware/thead/rsrc.h>
 #include <dt-bindings/soc/thead,light-iopmp.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/reset/light-reset.h>
 
 / {
 	compatible = "thead,light";
@@ -33,6 +37,7 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		audio_i2c0 = &audio_i2c0;
+        audio_i2c1 = &audio_i2c1;
 		mmc0 = &emmc;
 		mmc1 = &sdhci0;
 		serial0 = &uart0;
@@ -53,6 +58,7 @@
 		vivcam4 = &vvcam_sensor4;
 		vivcam5 = &vvcam_sensor5;
         vivcam6 = &vvcam_sensor6;
+        vivcam7 = &vvcam_sensor7;
 
         viv_video0 =  &video0;
         viv_video1 =  &video1;
@@ -74,7 +80,7 @@
 
 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x1 0x00000000>;
+		reg = <0x0 0x200000 0x0 0xffe00000>;
 	};
 
 	resmem: reserved-memory {
@@ -86,12 +92,17 @@
 		cmamem: linux,cma {
 			compatible = "shared-dma-pool";
 			reusable;
-			size = <0 0x14000000>;
-			alloc-ranges = <0 0x20000000 0 0x40000000>;
+			size = <0 0x14000000>; // 320MB by default
+			alloc-ranges = <0 0x64000000 0 0x14000000>; // [0x6400_0000 ~ 0x7800_0000]
 			linux,cma-default;
 		};
 	};
 
+    aon_iram: aon-iram@ffffef8000 {
+            compatible = "syscon";
+            reg = <0xff 0xffef8000 0x0 0x10000>;
+    };
+
 	thermal-zones {
 		cpu-thermal-zone {
 			polling-delay-passive = <250>;
@@ -381,7 +392,7 @@
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
 			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
 		};
 
 		clint0: clint@ffdc000000 {
@@ -632,6 +643,12 @@
 			status = "okay";
 		};
 
+		audio_mbox: audio_mbox@0xffefc48000 {
+			compatible = "thead,light-audio-mbox-reg", "syscon";
+			reg = <0xff 0xefc48000 0x0 0x1000>;
+			status = "okay";
+		};
+
 		nvmem_controller: efuse@ffff210000 {
 			compatible = "thead,light-fm-efuse", "syscon";
 			reg = <0xff 0xff210000 0x0 0x10000>;
@@ -853,6 +870,12 @@
 			status = "okay";
 		};
 
+		padctrl_audiosys: padctrl-audiosys@ffcb01d000 {
+			compatible = "thead,light-fm-audio-pinctrl";
+			reg = <0xff 0xcb01d000 0x0 0x1000>;
+			status = "disabled";
+		};
+
 		timer4: timer@ffffc33000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xffc33000 0x0 0x14>;
@@ -975,9 +998,9 @@
 			status = "disabled";
 		};
 
-		adc: adc@ffec020000 {
+		adc: adc@0xfffff51000 {
 			compatible = "thead,light-adc";
-			reg = <0xff 0xfff51000 0x0 0x2000>;
+			reg = <0xff 0xfff51000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <61>;
 			clocks = <&dummy_clock_aonsys_clk>;
@@ -1171,8 +1194,9 @@
 			reg = <0xff 0xefc30000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <24>;
-			clocks = <&dummy_clock_apb>;
-			clock-names = "baudclk";
+			clocks = <&clk CLKGEN_WDT0_PCLK>;
+			clock-names = "tclk";
+			resets = <&rst LIGHT_RESET_WDT0>; 
 			status = "okay";
 		};
 
@@ -1181,8 +1205,9 @@
 			reg = <0xff 0xefc31000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <25>;
-			clocks = <&dummy_clock_apb>;
-			clock-names = "baudclk";
+			clocks = <&clk CLKGEN_WDT1_PCLK>;
+			clock-names = "tclk";
+			resets = <&rst LIGHT_RESET_WDT1>; 
 			status = "okay";
 		};
 
@@ -1237,6 +1262,20 @@
 			status = "okay";
 		};
 
+		rst: reset-controller@ffef014000 {
+			compatible = "thead,light-reset-src","syscon";
+			reg = <0xff 0xef014000 0x0 0x1000>;
+			#reset-cells = <1>;
+			status = "okay";
+		};
+
+		vpsys_rst: vpsys-reset-controller@ffecc30000 {
+			compatible = "thead,light-vpsys-reset-src","syscon";
+			reg = <0xff 0xecc30000 0x0 0x1000>;
+			#reset-cells = <1>;
+			status = "okay";
+		};
+
 		sys_reg: sys_reg@ffef010100 {
 			compatible = "thead,light_sys_reg";
 			reg = <0xff 0xef010100 0x0 0x100>;
@@ -1290,7 +1329,7 @@
                                           65536 65536 65536 65536
                                           65536 65536 65536 65536
                                           65536 65536 65536 65536>;
-                        snps,priority = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
+                        snps,priority = <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; // <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
                         snps,dma-masters = <1>;
                         snps,data-width = <4>;
                         snps,axi-max-burst-len = <16>;
@@ -1343,8 +1382,7 @@
 
 		emmc: sdhci@ffe7080000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7080000 0x0 0x10000
-			       0xff 0xef014060 0x0 0x4>;
+			reg = <0xff 0xe7080000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <62>;
 			interrupt-names = "sdhciirq";
@@ -1354,8 +1392,7 @@
 
 		sdhci0: sd@ffe7090000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7090000 0x0 0x10000
-			       0xff 0xef014064 0x0 0x4>;
+			reg = <0xff 0xe7090000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <64>;
 			interrupt-names = "sdhci0irq";
@@ -1365,8 +1402,7 @@
 
 		sdhci1: sd@ffe70a0000 {
 		        compatible = "snps,dwcmshc-sdhci";
-		        reg = <0xff 0xe70a0000 0x0 0x10000
-		               0xff 0xef014064 0x0 0x4>;
+		        reg = <0xff 0xe70a0000 0x0 0x10000>;
 		        interrupt-parent = <&intc>;
 		        interrupts = <71>;
 		        interrupt-names = "sdhci1irq";
@@ -1386,12 +1422,14 @@
 			interrupt-parent = <&intc>;
 			interrupts = <113>;
 			interrupt-names = "npuirq";
+			power-domains = <&pd LIGHT_AON_NPU_PD>;
 			clocks = <&clk CLKGEN_TOP_APB_SX_PCLK>,
 			         <&clk CLKGEN_TOP_AXI4S_ACLK>;
 			clock-names = "pclk", "aclk";
 			vha_clk_rate = <1000000000>;
 			ldo_vha-supply = <&npu>;
-			dma-mask = <0xf 0xffffffff>;
+			dma-mask = <0xff 0xffffffff>;
+			resets = <&rst LIGHT_RESET_NPU>;
 			status = "disabled";
 		};
 
@@ -1401,6 +1439,8 @@
 		    interrupt-parent = <&intc>;
 		    interrupts = <102>;
 		    interrupt-names = "gpuirq";
+			vosys-regmap = <&vosys_reg>;
+			power-domains = <&pd LIGHT_AON_GPU_PD>;
             clocks = <&vosys_clk_gate LIGHT_CLKGEN_GPU_CORE_CLK>,
                      <&vosys_clk_gate LIGHT_CLKGEN_GPU_CFG_ACLK>;
             clock-names = "cclk", "aclk";
@@ -1418,6 +1458,7 @@
 			clocks = <&vpsys_clk_gate LIGHT_VPSYS_FCE_ACLK>,
 				<&vpsys_clk_gate LIGHT_VPSYS_FCE_PCLK>;
 			clock-names = "aclk", "pclk";
+			resets = <&vpsys_rst LIGHT_RESET_FCE>;
 			dma-mask = <0xf 0xffffffff>;
 			status = "disabled";
 		};
@@ -1427,6 +1468,7 @@
 			reg = <0xff 0xecc00000 0x0 0x8000>;
 			interrupt-parent = <&intc>;
 			interrupts = <131>;
+			power-domains = <&pd LIGHT_AON_VDEC_PD>;
 			clocks = <&vpsys_clk_gate LIGHT_VPSYS_VDEC_ACLK>,
 				<&vpsys_clk_gate LIGHT_VPSYS_VDEC_CCLK>,
 				<&vpsys_clk_gate LIGHT_VPSYS_VDEC_PCLK>;
@@ -1439,6 +1481,7 @@
 			reg = <0xff 0xecc10000 0x0 0x8000>;
 			interrupt-parent = <&intc>;
 			interrupts = <133>;
+			power-domains = <&pd LIGHT_AON_VENC_PD>;
 			clocks = <&vpsys_clk_gate LIGHT_VPSYS_VENC_ACLK>,
 				<&vpsys_clk_gate LIGHT_VPSYS_VENC_CCLK>,
 				<&vpsys_clk_gate LIGHT_VPSYS_VENC_PCLK>;
@@ -1465,7 +1508,7 @@
 			compatible = "light,light-i2s";
 			reg = <0xff 0xe7034000 0x0 0x4000>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_audio_i2s0>;
+			pinctrl-0 = <&pinctrl_light_i2s0>;
 			light,mode = "i2s-master";
 			light,sel = "ap_i2s";
 			interrupt-parent = <&intc>;
@@ -1490,7 +1533,7 @@
 			light,sel = "i2s0";
 			interrupt-parent = <&intc>;
 			interrupts = <174>;
-			dmas = <&dmac2 9>, <&dmac2 16>;
+			dmas = <&dmac2 9>, <&dmac2 8>;
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
@@ -1519,16 +1562,18 @@
 			status = "disabled";
 		};
 
-		i2s3: audio_i2s3@0xffcb017000 {
+		i2s2: audio_i2s2@0xffcb016000 {
 			#sound-dai-cells = <1>;
 			compatible = "light,light-i2s";
-			reg = <0xff 0xcb017000 0x0 0x1000>;
+			reg = <0xff 0xcb016000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
 			pinctrl-names = "default";
 			light,mode = "i2s-master";
-			light,sel = "i2s3";
+			light,sel = "i2s2";
 			interrupt-parent = <&intc>;
-			interrupts = <177>;
-			dmas = <&dmac2 14>, <&dmac2 16>;
+			interrupts = <176>;
+			dmas = <&dmac2 13>, <&dmac2 12>;
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
@@ -1537,6 +1582,286 @@
 			status = "disabled";
 		};
 
+		i2s_8ch_sd0: audio_i2s_8ch_sd0@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd0";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 36>, <&dmac2 14>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		i2s_8ch_sd1: audio_i2s_8ch_sd1@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd1";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 37>, <&dmac2 15>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		i2s_8ch_sd2: audio_i2s_8ch_sd2@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd2";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 38>, <&dmac2 16>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		i2s_8ch_sd3: audio_i2s_8ch_sd3@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd3";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 39>, <&dmac2 17>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot1: audio_tdm_slot1@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <1>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 28>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot2: audio_tdm_slot2@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <2>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 29>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot3: audio_tdm_slot3@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <3>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 30>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot4: audio_tdm_slot4@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <4>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 31>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot5: audio_tdm_slot5@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <5>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 32>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot6: audio_tdm_slot6@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <6>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 33>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot7: audio_tdm_slot7@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <7>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 34>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot8: audio_tdm_slot8@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <8>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 35>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		spdif0: audio_spdif0@0xffcb018000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-spdif";
+			reg = <0xff 0xcb018000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			interrupt-parent = <&intc>;
+			interrupts = <179>;
+			dmas = <&dmac2 25>, <&dmac2 24>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_SPDIF0>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		spdif1: audio_spdif1@0xffcb019000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-spdif";
+			reg = <0xff 0xcb019000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			interrupt-parent = <&intc>;
+			interrupts = <180>;
+			dmas = <&dmac2 27>, <&dmac2 26>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_SPDIF1>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
 		pvt: pvt@fffff4e000 {
 		    compatible = "moortec,mr75203";
 		    reg = <0xff 0xfff4e000 0x0 0x80>,
@@ -1556,14 +1881,18 @@
 			interrupts = <44>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 12>, <&dmac0 13>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
 			fs_lcnt = /bits/ 16 <0x42>;
 			fp_hcnt = /bits/ 16 <0x14>;
 			fp_lcnt = /bits/ 16 <0x1a>;
-			hs_hcnt = /bits/ 16 <0x5>;
-			hs_lcnt = /bits/ 16 <0x15>;
+			hs_hcnt = /bits/ 16 <0x9>;
+			hs_lcnt = /bits/ 16 <0x11>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 		};
@@ -1575,14 +1904,18 @@
 			interrupts = <45>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 14>, <&dmac0 15>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
 			fs_lcnt = /bits/ 16 <0x42>;
 			fp_hcnt = /bits/ 16 <0x14>;
 			fp_lcnt = /bits/ 16 <0x1a>;
-			hs_hcnt = /bits/ 16 <0x5>;
-			hs_lcnt = /bits/ 16 <0x15>;
+			hs_hcnt = /bits/ 16 <0x9>;
+			hs_lcnt = /bits/ 16 <0x11>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 		};
@@ -1594,14 +1927,18 @@
 			interrupts = <46>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 16>, <&dmac0 17>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
 			fs_lcnt = /bits/ 16 <0x42>;
 			fp_hcnt = /bits/ 16 <0x14>;
 			fp_lcnt = /bits/ 16 <0x1a>;
-			hs_hcnt = /bits/ 16 <0x5>;
-			hs_lcnt = /bits/ 16 <0x15>;
+			hs_hcnt = /bits/ 16 <0x9>;
+			hs_lcnt = /bits/ 16 <0x11>;
 			status = "disabled";
 
 			#address-cells = <1>;
@@ -1615,14 +1952,18 @@
 			interrupts = <47>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 18>, <&dmac0 19>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
 			fs_lcnt = /bits/ 16 <0x42>;
 			fp_hcnt = /bits/ 16 <0x14>;
 			fp_lcnt = /bits/ 16 <0x1a>;
-			hs_hcnt = /bits/ 16 <0x5>;
-			hs_lcnt = /bits/ 16 <0x15>;
+			hs_hcnt = /bits/ 16 <0x9>;
+			hs_lcnt = /bits/ 16 <0x11>;
 			status = "disabled";
 
 			#address-cells = <1>;
@@ -1636,14 +1977,18 @@
 			interrupts = <48>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 20>, <&dmac0 21>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
 			fs_lcnt = /bits/ 16 <0x42>;
 			fp_hcnt = /bits/ 16 <0x14>;
 			fp_lcnt = /bits/ 16 <0x1a>;
-			hs_hcnt = /bits/ 16 <0x5>;
-			hs_lcnt = /bits/ 16 <0x15>;
+			hs_hcnt = /bits/ 16 <0x9>;
+			hs_lcnt = /bits/ 16 <0x11>;
 			status = "disabled";
 
 			#address-cells = <1>;
@@ -1657,6 +2002,10 @@
 			interrupts = <182>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac2 21>, <&dmac2 20>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x82>;
 			ss_lcnt = /bits/ 16 <0x78>;
 			fs_hcnt = /bits/ 16 <0x37>;
@@ -1669,15 +2018,40 @@
 			#size-cells = <0>;
 		};
 
+        audio_i2c1: i2c@0xffcb01b000 {
+                compatible = "snps,designware-i2c";
+                reg = <0xff 0xcb01b000 0x0 0x1000>;
+                interrupt-parent = <&intc>;
+                interrupts = <183>;
+                clocks = <&dummy_clock_apb>;
+                clock-frequency = <100000>;
+                i2c_mode = "dma";
+			    dmas = <&dmac2 23>, <&dmac2 22>;
+			    dma-names = "tx", "rx";
+			    #dma-cells = <1>;
+                ss_hcnt = /bits/ 16 <0x82>;
+                ss_lcnt = /bits/ 16 <0x78>;
+                fs_hcnt = /bits/ 16 <0x37>;
+                fs_lcnt = /bits/ 16 <0x42>;
+                fp_hcnt = /bits/ 16 <0x14>;
+                fp_lcnt = /bits/ 16 <0x1a>;
+                hs_hcnt = /bits/ 16 <0x5>;
+                hs_lcnt = /bits/ 16 <0x15>;
+                status = "disabled";
+
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
 		isp0: isp@ffe4100000 {
 			compatible = "thead,light-isp";
 			reg = <0xff 0xe4100000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <117>,<118>;
-			clocks = <&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>;
+			clocks =  <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>,
+			          <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>,
+				  <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>,
+				  <&visys_clk_gate LIGHT_CLKGEN_ISP0_CLK>;
 			clock-names = "aclk", "hclk", "isp0_pclk", "cclk";
 			status = "disabled";
 		};
@@ -1687,11 +2061,11 @@
 			reg = <0xff 0xe4110000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <120>,<121>;
-			clocks = <&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>;
+			clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>,
+				 <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>,
+				 <&visys_clk_gate LIGHT_CLKGEN_ISP1_CLK>,
+				 <&visys_clk_gate LIGHT_CLKGEN_ISP1_PIXELCLK>;
 			clock-names = "aclk", "hclk", "isp0_pclk", "cclk", "isp1_pclk";
 			status = "disabled";
 		};
@@ -1701,9 +2075,9 @@
 			reg = <0xff 0xe4120000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <123>,<124>;
-			clocks = <&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>;
+			clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_ACLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_HCLK>,
+				 <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_CCLK>;
 			clock-names = "aclk", "hclk", "cclk";
 			status = "disabled";
 		};
@@ -1713,10 +2087,10 @@
 			reg = <0xff 0xe4130000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <98>,<99>;
-			clocks = <&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>,
-				<&dummy_clock_visys>;
+			clocks = <&visys_clk_gate LIGHT_CLKGEN_DW200_ACLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_DW200_HCLK>,
+				 <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_VSE>,
+				 <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_DWE>;
 			clock-names = "aclk", "hclk", "vseclk", "dweclk";
 			status = "disabled";
 		};
@@ -1746,51 +2120,58 @@
 		};
 
 		bm_csi0: csi@ffe4000000{ //CSI2
-			compatible = "thead,light-bm-csi";
-			reg = < 0xff 0xe4000000 0x0 0x10000>;
-			interrupt-parent = <&intc>;
-			interrupts = <128>;
-			dphyglueiftester = <0x180>;
-			sysreg_mipi_csi_ctrl = <0x140>;
-            clocks = <&dummy_clock_visys>,
-                     <&dummy_clock_visys>,
-                     <&dummy_clock_visys>;
-			clock-names = "pclk", "pixclk", "cfg_clk";
+		    compatible = "thead,light-bm-csi";
+		    reg = < 0xff 0xe4000000 0x0 0x10000>;
+		    interrupt-parent = <&intc>;
+		    interrupts = <128>;
+		    dphyglueiftester = <0x180>;
+		    sysreg_mipi_csi_ctrl = <0x140>;
+		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
+		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    phy_name = "CSI_4LANE";
+		    status = "disabled";
+		};
 
-			status = "disabled";
+		csia_reg: visys-reg@ffe4020000 {
+		    compatible = "thead,light-visys-reg", "syscon";
+		    reg = < 0xff 0xe4020000 0x0 0x10000>;
+		    status = "okay";
 		};
 
 		bm_csi1: csi@ffe4010000{ //CSI2X2_B
-			compatible = "thead,light-bm-csi";
-			reg = < 0xff 0xe4010000 0x0 0x10000>;
-			interrupt-parent = <&intc>;
-			interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
-			dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
-			sysreg_mipi_csi_ctrl = <0x148>;
-            clocks = <&dummy_clock_visys>,
-                     <&dummy_clock_visys>,
-                     <&dummy_clock_visys>;
-			clock-names = "pclk", "pixclk", "cfg_clk";
-
-			status = "disabled";
+		    compatible = "thead,light-bm-csi";
+		    reg = < 0xff 0xe4010000 0x0 0x10000>;
+		    interrupt-parent = <&intc>;
+		    interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
+		    dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
+		    sysreg_mipi_csi_ctrl = <0x148>;
+		    visys-regmap = <&visys_reg>;
+		    csia-regmap = <&csia_reg>;
+		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
+		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    phy_name = "CSI_B";
+		    status = "disabled";
 		};
 
 		bm_csi2: csi@ffe4020000{ //CSI2X2_A
-			compatible = "thead,light-bm-csi";
-			reg = < 0xff 0xe4020000 0x0 0x10000>;
-			interrupt-parent = <&intc>;
-			interrupts = <127>;
-			dphyglueiftester = <0x184>;
-			sysreg_mipi_csi_ctrl = <0x144>;
-            clocks = <&dummy_clock_visys>,
-                     <&dummy_clock_visys>,
-                     <&dummy_clock_visys>;
-			clock-names = "pclk", "pixclk", "cfg_clk";
-
-			status = "disabled";
+		    compatible = "thead,light-bm-csi";
+		    reg = < 0xff 0xe4020000 0x0 0x10000>;
+		    interrupt-parent = <&intc>;
+		    interrupts = <127>;
+		    dphyglueiftester = <0x184>;
+		    sysreg_mipi_csi_ctrl = <0x144>;
+		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
+		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    phy_name = "CSI_A";
+		    status = "disabled";
 		};
 
-
 		bm_isp0: bm_isp@ffe4100000 {
 			compatible = "thead,light-bm-isp";
 			reg = <0xff 0xe4100000 0x0 0x10000>;
@@ -1815,6 +2196,10 @@
 			reg = <0xff 0xe4030000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <134>;
+			clocks = <&visys_clk_gate LIGHT_CLKGEN_VIPRE_ACLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PCLK>,
+				 <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PIXELCLK>;
+			clock-names ="aclk", "pclk", "pixclk";
 			status = "disabled";
 		};
 
@@ -1937,6 +2322,11 @@
 			status = "disabled";
 		};
 
+		vvcam_sensor7: vvcam_sensor@7 {
+			compatible = "thead,light-vvcam-sensor";
+			status = "disabled";
+		};
+
 		xtensa_dsp: dsp@01{
 			compatible = "thead,dsp-hw-common";
 			reg = <0xff 0xef040000 0x0 0x001000 >;   /*DSP_SYSREG(0x0000-0xFFF) */
@@ -1960,8 +2350,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <156>;
 			firmware-name = "xrp0.elf";
-            clocks = <&dummy_clock_visys>,
-            <&dummy_clock_visys>;
+			clocks = <&dummy_clock_visys>,
+			<&dummy_clock_visys>;
 			clock-names = "pclk", "cclk";
 			status = "disabled";
 
@@ -1998,8 +2388,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <157>;
 			firmware-name = "xrp1.elf";
-            clocks = <&dummy_clock_visys>,
-            <&dummy_clock_visys>;
+			clocks = <&dummy_clock_visys>,
+			<&dummy_clock_visys>;
 			clock-names = "pclk", "cclk";
 			status = "disabled";
 
@@ -2086,6 +2476,12 @@
 			interrupts = <215>; /* TEE INT SRC_7 */
 		};
 
+        light_event: light-event {
+                compatible = "thead,light-event";
+                aon-iram-regmap = <&aon_iram>;
+                status = "okay";
+        };
+
 		visys_clk_gate: visys-clk-gate { /* VI_SYSREG_R */
 			compatible = "thead,visys-gate-controller";
 			visys-regmap = <&visys_reg>;
@@ -2113,6 +2509,13 @@
 			#clock-cells = <1>;
 			status = "okay";
 		};
+
+		audiosys_clk_gate: audiosys-clk-gate {
+			compatible = "thead,audiosys-gate-controller";
+			audiosys-regmap = <&audio_cpr>;
+			#clock-cells = <1>;
+			status = "okay";
+		};
 	};
 
 };

arch/riscv/configs/defconfig

@@ -183,6 +183,5 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set

arch/riscv/configs/fire_defconfig

@@ -0,0 +1,311 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_CHECKPOINT_RESTORE=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+# CONFIG_BUG is not set
+CONFIG_BPF_SYSCALL=y
+CONFIG_PERF_EVENTS=y
+CONFIG_FORCE_MAX_ZONEORDER=15
+CONFIG_SOC_SIFIVE=y
+CONFIG_SOC_THEAD=y
+CONFIG_SMP=y
+CONFIG_VECTOR=y
+CONFIG_VECTOR_0_7=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_CMA=y
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_AREAS=16
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_BRIDGE=y
+CONFIG_VSOCKETS=y
+# CONFIG_VSOCKETS_LOOPBACK is not set
+CONFIG_VIRTIO_VSOCKETS=y
+CONFIG_NETLINK_DIAG=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_RTL3WIRE=y
+CONFIG_CFG80211=y
+CONFIG_RFKILL=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_LIGHT_DSMART_CARD=y
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_VIRTIO_NET=y
+CONFIG_MACB=y
+CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_LIGHT=y
+CONFIG_MICROSEMI_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_USB_USBNET=m
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_AX88179_178A is not set
+# CONFIG_USB_NET_NET1080 is not set
+CONFIG_RTL8723DS=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_GOODIX=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_SPI=y
+CONFIG_SPI_DW_QUAD=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_SPIDEV=y
+# CONFIG_PTP_1588_CLOCK is not set
+CONFIG_PINCTRL=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_SENSORS_MR75203=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_WATCHDOG=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_LIGHT_PMIC_WATCHDOG=y
+CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
+#CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
+CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
+CONFIG_WATCHDOG_OPEN_TIMEOUT=32
+CONFIG_ABX500_CORE=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_ASPEED=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+CONFIG_DRM=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
+CONFIG_DRM_PANEL_ILI9881D=y
+CONFIG_DRM_VERISILICON=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_THEAD_LIGHT=y
+CONFIG_SND_SOC_AW87519=y
+CONFIG_SND_SOC_BT_SCO=y
+CONFIG_SND_SOC_ES7210=y
+CONFIG_SND_SOC_ES8156=y
+CONFIG_SND_SOC_WM8960=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+CONFIG_UHID=y
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_DWC3=m
+# CONFIG_USB_DWC3_OF_SIMPLE is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_G_NCM=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_ROLE_SWITCH=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_DWCMSHC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_XGENE=y
+CONFIG_DMADEVICES=y
+CONFIG_DW_AXI_DMAC=y
+CONFIG_DMATEST=y
+CONFIG_SW_SYNC=y
+CONFIG_UDMABUF=y
+CONFIG_DMABUF_SELFTESTS=m
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_KHV_MMIO=y
+CONFIG_VHOST_NET=y
+CONFIG_VHOST_VSOCK=y
+CONFIG_CLK_LIGHT_FM=y
+CONFIG_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_LIGHT=y
+CONFIG_HWSPINLOCK_LIGHT_TEST=m
+CONFIG_MAILBOX=y
+CONFIG_EXTCON=y
+CONFIG_IIO=y
+CONFIG_IIO_SW_DEVICE=y
+CONFIG_PWM=y
+CONFIG_PWM_LIGHT=y
+CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_OPTEE_BENCHMARK=y
+CONFIG_LIGHT_GPU_VIV=m
+# CONFIG_LIGHT_NET is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_HUGETLBFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_9P_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_DH=y
+CONFIG_CRYPTO_CURVE25519=y
+CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_OFB=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_SHA3=y
+CONFIG_CRYPTO_SM3=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_DMA_CMA=y
+CONFIG_DMA_PERNUMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=32
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+# CONFIG_RCU_TRACE is not set
+CONFIG_OVERLAY_FS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_SLEEP is not set

arch/riscv/configs/fire_emu_defconfig

@@ -0,0 +1,312 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_CHECKPOINT_RESTORE=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+# CONFIG_BUG is not set
+CONFIG_BPF_SYSCALL=y
+CONFIG_PERF_EVENTS=y
+CONFIG_FORCE_MAX_ZONEORDER=15
+CONFIG_SOC_SIFIVE=y
+CONFIG_SOC_THEAD=y
+CONFIG_SOC_THEAD_LIGHT_EMU=y
+CONFIG_SMP=y
+CONFIG_VECTOR=y
+CONFIG_VECTOR_0_7=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_CMA=y
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_AREAS=16
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_BRIDGE=y
+CONFIG_VSOCKETS=y
+# CONFIG_VSOCKETS_LOOPBACK is not set
+CONFIG_VIRTIO_VSOCKETS=y
+CONFIG_NETLINK_DIAG=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_RTL3WIRE=y
+CONFIG_CFG80211=y
+CONFIG_RFKILL=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_LIGHT_DSMART_CARD=y
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_VIRTIO_NET=y
+CONFIG_MACB=y
+CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_LIGHT=y
+CONFIG_MICROSEMI_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_USB_USBNET=m
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_AX88179_178A is not set
+# CONFIG_USB_NET_NET1080 is not set
+CONFIG_RTL8723DS=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_GOODIX=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_SPI=y
+CONFIG_SPI_DW_QUAD=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_SPIDEV=y
+# CONFIG_PTP_1588_CLOCK is not set
+CONFIG_PINCTRL=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_SENSORS_MR75203=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_WATCHDOG=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_LIGHT_PMIC_WATCHDOG=y
+CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
+CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
+#CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
+CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
+CONFIG_WATCHDOG_OPEN_TIMEOUT=32
+CONFIG_ABX500_CORE=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_ASPEED=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+CONFIG_DRM=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
+CONFIG_DRM_PANEL_ILI9881D=y
+CONFIG_DRM_VERISILICON=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_THEAD_LIGHT=y
+CONFIG_SND_SOC_AW87519=y
+CONFIG_SND_SOC_BT_SCO=y
+CONFIG_SND_SOC_ES7210=y
+CONFIG_SND_SOC_ES8156=y
+CONFIG_SND_SOC_WM8960=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+CONFIG_UHID=y
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_DWC3=m
+# CONFIG_USB_DWC3_OF_SIMPLE is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_G_NCM=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_ROLE_SWITCH=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_DWCMSHC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_XGENE=y
+CONFIG_DMADEVICES=y
+CONFIG_DW_AXI_DMAC=y
+CONFIG_DMATEST=y
+CONFIG_SW_SYNC=y
+CONFIG_UDMABUF=y
+CONFIG_DMABUF_SELFTESTS=m
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_KHV_MMIO=y
+CONFIG_VHOST_NET=y
+CONFIG_VHOST_VSOCK=y
+CONFIG_CLK_LIGHT_FM=y
+CONFIG_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_LIGHT=y
+CONFIG_HWSPINLOCK_LIGHT_TEST=m
+CONFIG_MAILBOX=y
+CONFIG_EXTCON=y
+CONFIG_IIO=y
+CONFIG_IIO_SW_DEVICE=y
+CONFIG_PWM=y
+CONFIG_PWM_LIGHT=y
+CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_OPTEE_BENCHMARK=y
+CONFIG_LIGHT_GPU_VIV=m
+# CONFIG_LIGHT_NET is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_HUGETLBFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_9P_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_DH=y
+CONFIG_CRYPTO_CURVE25519=y
+CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_OFB=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_SHA3=y
+CONFIG_CRYPTO_SM3=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_DMA_CMA=y
+CONFIG_DMA_PERNUMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=32
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+# CONFIG_RCU_TRACE is not set
+CONFIG_OVERLAY_FS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_SLEEP is not set

arch/riscv/configs/ice_defconfig

@@ -180,6 +180,5 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set

arch/riscv/configs/light-android_defconfig

@@ -1,34 +1,273 @@
-CONFIG_COMPILE_TEST=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
+#  see kernel/configs/android-5.10/android-base.config
+#  KEEP ALPHABETICALLY SORTED
+# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set
+# CONFIG_ANDROID_PARANOID_NETWORK is not set
+# CONFIG_BPFILTER is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_DEVMEM is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_FW_CACHE is not set
+# CONFIG_IP6_NF_NAT is not set
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_NFSD is not set
+# CONFIG_NFS_FS is not set
+# CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_RT_GROUP_SCHED is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_USELIB is not set
+CONFIG_ADVISE_SYSCALLS=y
+CONFIG_AIO=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder"
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_BINDERFS=y
+CONFIG_ASHMEM=y
 CONFIG_AUDIT=y
-CONFIG_NO_HZ=y
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_SCRIPT=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLOCK=y
+CONFIG_BPF_JIT=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_BPF=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CROSS_MEMORY_ATTACH=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_XCBC=y
+CONFIG_DEBUG_LIST=y
+CONFIG_DEFAULT_SECURITY_SELINUX=y
+CONFIG_DM_SNAPSHOT=y
+CONFIG_DM_VERITY=y
+CONFIG_DUMMY=y
+CONFIG_EMBEDDED=y
+CONFIG_EPOLL=y
+CONFIG_EVENTFD=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FS_ENCRYPTION=y
+CONFIG_FS_VERITY=y
+CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y
+CONFIG_FUSE_FS=y
+CONFIG_FUTEX=y
+CONFIG_HARDENED_USERCOPY=y
+CONFIG_HID_GENERIC=y
+CONFIG_HID_PLAYSTATION=y
+CONFIG_PLAYSTATION_FF=y
+CONFIG_HID_SONY=y
+CONFIG_SONY_FF=y
 CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_PSI=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
-CONFIG_UCLAMP_TASK=y
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_UCLAMP_TASK_GROUP=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_CGROUP_BPF=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_INET=y
+CONFIG_INET_DIAG_DESTROY=y
+CONFIG_INET_ESP=y
+CONFIG_INET_UDP_DIAG=y
+CONFIG_INOTIFY_USER=y
+CONFIG_INPUT=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_MATCH_RPFILTER=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IPV6=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_VTI=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_SECURITY=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_L2TP=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MD=y
+CONFIG_MEMBARRIER=y
+CONFIG_MMU=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MULTIUSER=y
 CONFIG_NAMESPACES=y
+CONFIG_NET=y
+CONFIG_NETDEVICES=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_XT_MATCH_BPF=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_OWNER=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
+CONFIG_NETFILTER_XT_TARGET_CT=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_SECMARK=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_CLS_BPF=y
+CONFIG_NET_CLS_U32=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_IPGRE_DEMUX=y
+CONFIG_NET_IPVTI=y
+CONFIG_NET_KEY=y
+CONFIG_NET_NS=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_NAT=y
+CONFIG_NF_SOCKET_IPV4=y
+CONFIG_NF_SOCKET_IPV6=y
+CONFIG_NO_HZ=y
+CONFIG_PACKET=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_POSIX_TIMERS=y
+CONFIG_PPP=y
+CONFIG_PPPOL2TP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPTP=y
+CONFIG_PREEMPT=y
+CONFIG_PROC_FS=y
+CONFIG_PROFILING=y
+CONFIG_PSI=y
+CONFIG_QFMT_V2=y
+CONFIG_QUOTA=y
+CONFIG_QUOTACTL=y
+CONFIG_RD_LZ4=y
+CONFIG_RTC_CLASS=y
+CONFIG_SCHED_DEBUG=y
+CONFIG_SECCOMP=y
+CONFIG_SECCOMP_FILTER=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SHMEM=y
+CONFIG_SIGNALFD=y
+CONFIG_SND=y
+CONFIG_SOUND=y
+CONFIG_STACKPROTECTOR=y
+CONFIG_STACKPROTECTOR_STRONG=y
+CONFIG_STAGING=y
+CONFIG_STATIC_USERMODEHELPER=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_STRICT_MODULE_RWX=y
+CONFIG_SUSPEND=y
+CONFIG_SYNC_FILE=y
+CONFIG_SYSFS=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_TASK_XACCT=y
+CONFIG_TIMERFD=y
+CONFIG_TRACE_GPU_MEM=y
+CONFIG_TTY=y
+CONFIG_TUN=y
+CONFIG_UHID=y
+CONFIG_UID_SYS_STATS=y
+CONFIG_UNIX=y
+CONFIG_USB=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_SUPPORT=y
+CONFIG_UTS_NS=y
+CONFIG_VETH=y
+CONFIG_XFRM_INTERFACE=y
+CONFIG_XFRM_MIGRATE=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_XFRM_USER=y
+# kernel/configs/android-5.10/android-base.config
+
+CONFIG_COMPILE_TEST=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_UCLAMP_TASK=y
+CONFIG_UCLAMP_TASK_GROUP=y
 CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_FHANDLE is not set
 # CONFIG_BUG is not set
 CONFIG_KALLSYMS_ALL=y
-CONFIG_BPF_SYSCALL=y
-CONFIG_EMBEDDED=y
-CONFIG_PROFILING=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_THEAD=y
 CONFIG_SMP=y
@@ -45,133 +284,26 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
-CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_LIMIT=0
+# CONFIG_PM_WAKELOCKS_GC is not set
 CONFIG_ENERGY_MODEL=y
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
 CONFIG_BLK_INLINE_ENCRYPTION=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_CMA=y
 CONFIG_CMA_DEBUGFS=y
 CONFIG_CMA_AREAS=16
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_XFRM_INTERFACE=y
-CONFIG_XFRM_MIGRATE=y
-CONFIG_XFRM_STATISTICS=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
 CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPGRE_DEMUX=y
-CONFIG_NET_IPVTI=y
-CONFIG_INET_ESP=y
-CONFIG_INET_UDP_DIAG=y
-CONFIG_INET_DIAG_DESTROY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_ESP=y
-CONFIG_INET6_IPCOMP=y
-CONFIG_IPV6_MIP6=y
-CONFIG_IPV6_VTI=y
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=y
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CONNTRACK_AMANDA=y
-CONFIG_NF_CONNTRACK_FTP=y
-CONFIG_NF_CONNTRACK_H323=y
-CONFIG_NF_CONNTRACK_IRC=y
-CONFIG_NF_CONNTRACK_NETBIOS_NS=y
-CONFIG_NF_CONNTRACK_PPTP=y
-CONFIG_NF_CONNTRACK_SANE=y
-CONFIG_NF_CONNTRACK_TFTP=y
-CONFIG_NF_CT_NETLINK=y
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
-CONFIG_NETFILTER_XT_TARGET_CT=y
-CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
-CONFIG_NETFILTER_XT_TARGET_MARK=y
-CONFIG_NETFILTER_XT_TARGET_NFLOG=y
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
-CONFIG_NETFILTER_XT_TARGET_TPROXY=y
-CONFIG_NETFILTER_XT_TARGET_TRACE=y
-CONFIG_NETFILTER_XT_TARGET_SECMARK=y
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
-CONFIG_NETFILTER_XT_MATCH_BPF=y
-CONFIG_NETFILTER_XT_MATCH_COMMENT=y
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
-CONFIG_NETFILTER_XT_MATCH_HELPER=y
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
-CONFIG_NETFILTER_XT_MATCH_LENGTH=y
-CONFIG_NETFILTER_XT_MATCH_LIMIT=y
-CONFIG_NETFILTER_XT_MATCH_MAC=y
-CONFIG_NETFILTER_XT_MATCH_MARK=y
-CONFIG_NETFILTER_XT_MATCH_OWNER=y
-CONFIG_NETFILTER_XT_MATCH_POLICY=y
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
-CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
-CONFIG_NETFILTER_XT_MATCH_SOCKET=y
-CONFIG_NETFILTER_XT_MATCH_STATE=y
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
-CONFIG_NETFILTER_XT_MATCH_STRING=y
-CONFIG_NETFILTER_XT_MATCH_TIME=y
-CONFIG_NETFILTER_XT_MATCH_U32=y
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_IP_NF_MATCH_ECN=y
-CONFIG_IP_NF_MATCH_TTL=y
-CONFIG_IP_NF_FILTER=y
-CONFIG_IP_NF_TARGET_REJECT=y
-CONFIG_IP_NF_NAT=y
-CONFIG_IP_NF_TARGET_MASQUERADE=y
-CONFIG_IP_NF_TARGET_NETMAP=y
-CONFIG_IP_NF_TARGET_REDIRECT=y
-CONFIG_IP_NF_MANGLE=y
-CONFIG_IP_NF_RAW=y
-CONFIG_IP_NF_SECURITY=y
-CONFIG_IP_NF_ARPTABLES=y
-CONFIG_IP_NF_ARPFILTER=y
-CONFIG_IP_NF_ARP_MANGLE=y
-CONFIG_IP6_NF_IPTABLES=y
-CONFIG_IP6_NF_MATCH_RPFILTER=y
-CONFIG_IP6_NF_FILTER=y
-CONFIG_IP6_NF_TARGET_REJECT=y
-CONFIG_IP6_NF_MANGLE=y
-CONFIG_IP6_NF_RAW=y
-CONFIG_L2TP=y
 CONFIG_BRIDGE=y
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_HTB=y
 CONFIG_NET_SCH_NETEM=y
-CONFIG_NET_SCH_INGRESS=y
-CONFIG_NET_CLS_U32=y
-CONFIG_NET_CLS_BPF=y
-CONFIG_NET_EMATCH=y
-CONFIG_NET_EMATCH_U32=y
-CONFIG_NET_CLS_ACT=y
 CONFIG_VSOCKETS=y
 # CONFIG_VSOCKETS_LOOPBACK is not set
 CONFIG_VIRTIO_VSOCKETS=y
 CONFIG_NETLINK_DIAG=y
-CONFIG_BPF_JIT=y
 CONFIG_BT=y
 CONFIG_BT_RFCOMM=y
 CONFIG_BT_RFCOMM_TTY=y
@@ -194,48 +326,30 @@ CONFIG_MTD_PHRAM=m
 CONFIG_MTD_SPI_NAND=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_VIRTIO_BLK=y
-CONFIG_UID_SYS_STATS=y
 CONFIG_LIGHT_DSMART_CARD=y
 CONFIG_EEPROM_AT24=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
-CONFIG_MD=y
 CONFIG_BLK_DEV_DM=y
 CONFIG_DM_CRYPT=y
 CONFIG_DM_DEFAULT_KEY=y
-CONFIG_DM_SNAPSHOT=y
 CONFIG_DM_UEVENT=y
-CONFIG_DM_VERITY=y
 CONFIG_DM_VERITY_FEC=y
 CONFIG_DM_BOW=y
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=y
-CONFIG_TUN=y
-CONFIG_VETH=y
 CONFIG_VIRTIO_NET=y
 CONFIG_MACB=y
 CONFIG_STMMAC_ETH=y
 CONFIG_DWMAC_LIGHT=y
 CONFIG_MICROSEMI_PHY=y
 CONFIG_REALTEK_PHY=y
-CONFIG_PPP=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_MPPE=y
-CONFIG_PPTP=y
-CONFIG_PPPOL2TP=y
 CONFIG_USB_RTL8152=y
 CONFIG_USB_USBNET=m
 CONFIG_RTL8723DS=y
 CONFIG_INPUT_MOUSEDEV=m
-CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_GPIO=y
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_JOYSTICK_XPAD=y
 CONFIG_JOYSTICK_XPAD_FF=y
 CONFIG_JOYSTICK_XPAD_LEDS=y
 CONFIG_INPUT_TABLET=y
@@ -291,8 +405,6 @@ CONFIG_DRM_VERISILICON=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_PWM=y
 CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
 CONFIG_SND_USB_AUDIO=m
 CONFIG_SND_SOC=y
 CONFIG_SND_SOC_THEAD_LIGHT=y
@@ -301,7 +413,6 @@ CONFIG_SND_SOC_WM8960=y
 CONFIG_SND_SIMPLE_CARD=y
 CONFIG_SND_AUDIO_GRAPH_CARD=y
 CONFIG_HIDRAW=y
-CONFIG_UHID=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_ACRUX=y
 CONFIG_HID_ACRUX_FF=y
@@ -340,14 +451,10 @@ CONFIG_HID_PANTHERLORD=y
 CONFIG_PANTHERLORD_FF=y
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_PICOLCD=y
-CONFIG_HID_PLAYSTATION=y
-CONFIG_PLAYSTATION_FF=y
 CONFIG_HID_PRIMAX=y
 CONFIG_HID_ROCCAT=y
 CONFIG_HID_SAITEK=y
 CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_SONY_FF=y
 CONFIG_HID_SPEEDLINK=y
 CONFIG_HID_STEAM=y
 CONFIG_HID_SUNPLUS=y
@@ -374,13 +481,6 @@ CONFIG_USB_STORAGE_SDDR09=y
 CONFIG_USB_STORAGE_SDDR55=y
 CONFIG_USB_DWC3=m
 # CONFIG_USB_DWC3_OF_SIMPLE is not set
-CONFIG_USB_GADGET=y
-CONFIG_USB_CONFIGFS=y
-CONFIG_USB_CONFIGFS_UEVENT=y
-CONFIG_USB_CONFIGFS_F_FS=y
-CONFIG_USB_CONFIGFS_F_ACC=y
-CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
-CONFIG_USB_CONFIGFS_F_MIDI=y
 CONFIG_USB_ZERO=m
 CONFIG_USB_ETH=m
 CONFIG_USB_ETH_EEM=y
@@ -394,7 +494,6 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_OF_DWCMSHC=y
 CONFIG_LEDS_GPIO=y
-CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_XGENE=y
 CONFIG_DMADEVICES=y
 CONFIG_DW_AXI_DMAC=y
@@ -410,8 +509,6 @@ CONFIG_DMABUF_HEAPS_SYSTEM=y
 # CONFIG_VIRTIO_MENU is not set
 CONFIG_VHOST_NET=y
 CONFIG_VHOST_VSOCK=y
-CONFIG_STAGING=y
-CONFIG_ASHMEM=y
 CONFIG_ION=y
 CONFIG_ION_SYSTEM_HEAP=y
 CONFIG_ION_CMA_HEAP=y
@@ -424,8 +521,6 @@ CONFIG_IIO=y
 CONFIG_IIO_SW_DEVICE=y
 CONFIG_PWM=y
 CONFIG_PWM_LIGHT=y
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
 CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
 CONFIG_LIGHT_GPU_VIV=m
 # CONFIG_LIGHT_NET is not set
@@ -434,14 +529,8 @@ CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_F2FS_FS=y
 CONFIG_F2FS_FS_SECURITY=y
-CONFIG_FS_ENCRYPTION=y
 CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y
-CONFIG_FS_VERITY=y
-CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y
-CONFIG_QUOTA=y
-CONFIG_QFMT_V2=y
 CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
 CONFIG_OVERLAY_FS=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
@@ -457,17 +546,9 @@ CONFIG_PSTORE_RAM=y
 CONFIG_9P_FS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
-CONFIG_SECURITY=y
-CONFIG_SECURITY_NETWORK=y
-CONFIG_HARDENED_USERCOPY=y
-CONFIG_STATIC_USERMODEHELPER=y
-CONFIG_SECURITY_SELINUX=y
 CONFIG_CRYPTO_DH=y
 CONFIG_CRYPTO_CURVE25519=y
-CONFIG_CRYPTO_CHACHA20POLY1305=y
 CONFIG_CRYPTO_OFB=y
-CONFIG_CRYPTO_XCBC=y
-CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_SHA3=y
 CONFIG_CRYPTO_SM3=y
 CONFIG_CRYPTO_DES=y
@@ -477,14 +558,12 @@ CONFIG_DMA_PERNUMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=32
 CONFIG_PRINTK_TIME=y
 CONFIG_DYNAMIC_DEBUG=y
-CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_PANIC_TIMEOUT=5
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_SCHEDSTATS=y
 CONFIG_DEBUG_ATOMIC_SLEEP=y
-CONFIG_DEBUG_LIST=y
 # CONFIG_GCC_PLUGINS is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_GKI_HACKS_TO_FIX=y

arch/riscv/configs/light_defconfig

@@ -3,6 +3,10 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
@@ -91,6 +95,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_MACB=y
 CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_RX_ZERO_COPY=y
 CONFIG_DWMAC_LIGHT=y
 CONFIG_MICROSEMI_PHY=y
 CONFIG_REALTEK_PHY=y
@@ -143,7 +148,8 @@ CONFIG_LIGHT_PMIC_WATCHDOG=y
 CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
 CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
 CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
-CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
+#CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
+CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
 CONFIG_WATCHDOG_OPEN_TIMEOUT=32
 CONFIG_ABX500_CORE=y
 CONFIG_REGULATOR=y
@@ -196,6 +202,8 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_DRM=y
 CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
+CONFIG_DRM_PANEL_ILI9881D=y
+CONFIG_DRM_PANEL_HX8394=y
 CONFIG_DRM_VERISILICON=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_PWM=y
@@ -262,6 +270,11 @@ CONFIG_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_LIGHT=y
 CONFIG_HWSPINLOCK_LIGHT_TEST=m
 CONFIG_MAILBOX=y
+CONFIG_RPMSG=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_VIRTIO=y
+CONFIG_RPMSG_THEAD_LIGHT=y
+CONFIG_EXTCON=y
 CONFIG_IIO=y
 CONFIG_IIO_SW_DEVICE=y
 CONFIG_PWM=y
@@ -295,13 +308,21 @@ CONFIG_CRYPTO_AUTHENC=y
 CONFIG_CRYPTO_DH=y
 CONFIG_CRYPTO_CURVE25519=y
 CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
 CONFIG_CRYPTO_OFB=y
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_SHA3=y
 CONFIG_CRYPTO_SM3=y
 CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_SM4=y
+CONFIG_CRYPTO_USER=y
 CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_USER_API_RNG=y
+# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
+CONFIG_CRYPTO_USER_API_AEAD=y
 CONFIG_DMA_CMA=y
 CONFIG_DMA_PERNUMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=32
@@ -311,7 +332,13 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_OVERLAY_FS=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_INFO=y
+CONFIG_PM=y
+# CONFIG_SUSPEND is not set
+# CONFIG_PM_SLEEP is not set

arch/riscv/configs/light_emu_defconfig

@@ -189,7 +189,6 @@ CONFIG_DYNAMIC_DEBUG=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_FORCE_MAX_ZONEORDER=15

arch/riscv/configs/vector_0_7_defconfig

@@ -184,6 +184,5 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set

arch/riscv/include/asm/Kbuild

@@ -3,5 +3,8 @@ generic-y += early_ioremap.h
 generic-y += extable.h
 generic-y += flat.h
 generic-y += kvm_para.h
+generic-y += mcs_spinlock.h
+generic-y += qspinlock.h
+generic-y += qrwlock.h
 generic-y += user.h
 generic-y += vmlinux.lds.h

arch/riscv/include/asm/atomic.h

@@ -55,13 +55,11 @@ static __always_inline void atomic64_set(atomic64_t *v, s64 i)
 static __always_inline							\
 void atomic##prefix##_##op(c_type i, atomic##prefix##_t *v)		\
 {									\
-	smp_mb();							\
 	__asm__ __volatile__ (						\
 		"	amo" #asm_op "." #asm_type " zero, %1, %0"	\
 		: "+A" (v->counter)					\
 		: "r" (I)						\
 		: "memory");						\
-	smp_mb();							\
 }									\
 
 #ifdef CONFIG_GENERIC_ATOMIC64
@@ -93,26 +91,22 @@ c_type atomic##prefix##_fetch_##op##_relaxed(c_type i,			\
 					     atomic##prefix##_t *v)	\
 {									\
 	register c_type ret;						\
-	smp_mb();							\
 	__asm__ __volatile__ (						\
 		"	amo" #asm_op "." #asm_type " %1, %2, %0"	\
 		: "+A" (v->counter), "=r" (ret)				\
 		: "r" (I)						\
 		: "memory");						\
-	smp_mb();							\
 	return ret;							\
 }									\
 static __always_inline							\
 c_type atomic##prefix##_fetch_##op(c_type i, atomic##prefix##_t *v)	\
 {									\
 	register c_type ret;						\
-	smp_mb();							\
 	__asm__ __volatile__ (						\
 		"	amo" #asm_op "." #asm_type ".aqrl  %1, %2, %0"	\
 		: "+A" (v->counter), "=r" (ret)				\
 		: "r" (I)						\
 		: "memory");						\
-	smp_mb();							\
 	return ret;							\
 }
 
@@ -207,7 +201,6 @@ static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u)
 {
        int prev, rc;
 
-	smp_mb();
 	__asm__ __volatile__ (
 		"0:	lr.w     %[p],  %[c]\n"
 		"	beq      %[p],  %[u], 1f\n"
@@ -219,7 +212,6 @@ static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u)
 		: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
 		: [a]"r" (a), [u]"r" (u)
 		: "memory");
-	smp_mb();
 	return prev;
 }
 #define atomic_fetch_add_unless atomic_fetch_add_unless
@@ -230,7 +222,6 @@ static __always_inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u
        s64 prev;
        long rc;
 
-	smp_mb();
 	__asm__ __volatile__ (
 		"0:	lr.d     %[p],  %[c]\n"
 		"	beq      %[p],  %[u], 1f\n"
@@ -242,7 +233,6 @@ static __always_inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u
 		: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
 		: [a]"r" (a), [u]"r" (u)
 		: "memory");
-	smp_mb();
 	return prev;
 }
 #define atomic64_fetch_add_unless atomic64_fetch_add_unless
@@ -324,7 +314,6 @@ static __always_inline int atomic_sub_if_positive(atomic_t *v, int offset)
 {
        int prev, rc;
 
-	smp_mb();
 	__asm__ __volatile__ (
 		"0:	lr.w     %[p],  %[c]\n"
 		"	sub      %[rc], %[p], %[o]\n"
@@ -336,7 +325,6 @@ static __always_inline int atomic_sub_if_positive(atomic_t *v, int offset)
 		: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
 		: [o]"r" (offset)
 		: "memory");
-	smp_mb();
 	return prev - offset;
 }
 
@@ -348,7 +336,6 @@ static __always_inline s64 atomic64_sub_if_positive(atomic64_t *v, s64 offset)
        s64 prev;
        long rc;
 
-	smp_mb();
 	__asm__ __volatile__ (
 		"0:	lr.d     %[p],  %[c]\n"
 		"	sub      %[rc], %[p], %[o]\n"
@@ -360,7 +347,6 @@ static __always_inline s64 atomic64_sub_if_positive(atomic64_t *v, s64 offset)
 		: [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
 		: [o]"r" (offset)
 		: "memory");
-	smp_mb();
 	return prev - offset;
 }
 

arch/riscv/include/asm/cmpxchg.h

@@ -11,13 +11,36 @@
 #include <asm/barrier.h>
 #include <asm/fence.h>
 
+static inline ulong __xchg16_relaxed(ulong new, void *ptr)
+{
+       ulong ret, tmp;
+       ulong shif = ((ulong)ptr & 2) ? 16 : 0;
+       ulong mask = 0xffff << shif;
+       ulong *__ptr = (ulong *)((ulong)ptr & ~2);
+
+       __asm__ __volatile__ (
+               "0:     lr.w %0, %2\n"
+               "       and  %1, %0, %z3\n"
+               "       or   %1, %1, %z4\n"
+               "       sc.w %1, %1, %2\n"
+               "       bnez %1, 0b\n"
+               : "=&r" (ret), "=&r" (tmp), "+A" (*__ptr)
+               : "rJ" (~mask), "rJ" (new << shif)
+               : "memory");
+
+       return (ulong)((ret & mask) >> shif);
+}
+
 #define __xchg_relaxed(ptr, new, size)					\
 ({									\
 	__typeof__(ptr) __ptr = (ptr);					\
 	__typeof__(new) __new = (new);					\
 	__typeof__(*(ptr)) __ret;					\
-	smp_mb();							\
 	switch (size) {							\
+        case 2: {                                                       \
+                __ret = (__typeof__(*(ptr)))                            \
+                         __xchg16_relaxed((ulong)__new, __ptr);         \
+                break;}                                                 \
 	case 4:								\
 		__asm__ __volatile__ (					\
 			"	amoswap.w %0, %2, %1\n"			\
@@ -35,7 +58,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 
@@ -51,7 +73,6 @@
 	__typeof__(ptr) __ptr = (ptr);					\
 	__typeof__(new) __new = (new);					\
 	__typeof__(*(ptr)) __ret;					\
-	smp_mb();							\
 	switch (size) {							\
 	case 4:								\
 		__asm__ __volatile__ (					\
@@ -72,7 +93,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 
@@ -88,7 +108,6 @@
 	__typeof__(ptr) __ptr = (ptr);					\
 	__typeof__(new) __new = (new);					\
 	__typeof__(*(ptr)) __ret;					\
-	smp_mb();							\
 	switch (size) {							\
 	case 4:								\
 		__asm__ __volatile__ (					\
@@ -109,7 +128,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 
@@ -125,7 +143,6 @@
 	__typeof__(ptr) __ptr = (ptr);					\
 	__typeof__(new) __new = (new);					\
 	__typeof__(*(ptr)) __ret;					\
-	smp_mb();							\
 	switch (size) {							\
 	case 4:								\
 		__asm__ __volatile__ (					\
@@ -144,7 +161,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 
@@ -178,7 +194,6 @@
 	__typeof__(*(ptr)) __new = (new);				\
 	__typeof__(*(ptr)) __ret;					\
 	register unsigned int __rc;					\
-	smp_mb();							\
 	switch (size) {							\
 	case 4:								\
 		__asm__ __volatile__ (					\
@@ -205,7 +220,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 
@@ -224,7 +238,6 @@
 	__typeof__(*(ptr)) __new = (new);				\
 	__typeof__(*(ptr)) __ret;					\
 	register unsigned int __rc;					\
-	smp_mb();							\
 	switch (size) {							\
 	case 4:								\
 		__asm__ __volatile__ (					\
@@ -253,7 +266,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 
@@ -272,7 +284,6 @@
 	__typeof__(*(ptr)) __new = (new);				\
 	__typeof__(*(ptr)) __ret;					\
 	register unsigned int __rc;					\
-	smp_mb();							\
 	switch (size) {							\
 	case 4:								\
 		__asm__ __volatile__ (					\
@@ -301,7 +312,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 
@@ -320,7 +330,6 @@
 	__typeof__(*(ptr)) __new = (new);				\
 	__typeof__(*(ptr)) __ret;					\
 	register unsigned int __rc;					\
-	smp_mb();							\
 	switch (size) {							\
 	case 4:								\
 		__asm__ __volatile__ (					\
@@ -349,7 +358,6 @@
 	default:							\
 		BUILD_BUG();						\
 	}								\
-	smp_mb();							\
 	__ret;								\
 })
 

arch/riscv/include/asm/csr.h

@@ -143,11 +143,6 @@
 #define CSR_VTYPE		0xc21
 #define CSR_VLENB		0xc22
 
-#define CSR_SMIR		0x9c0
-#define CSR_SMEL		0x9c1
-#define CSR_SMEH		0x9c2
-#define CSR_SMCIR		0x9c3
-
 #ifdef CONFIG_RISCV_M_MODE
 # define CSR_STATUS	CSR_MSTATUS
 # define CSR_IE		CSR_MIE

arch/riscv/include/asm/io.h

@@ -13,7 +13,6 @@
 
 #include <linux/types.h>
 #include <linux/pgtable.h>
-#include <asm/mmiowb.h>
 #include <asm/early_ioremap.h>
 
 /*

arch/riscv/include/asm/mmio.h

@@ -133,7 +133,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
 #define __io_br()	do {} while (0)
 #define __io_ar(v)	__asm__ __volatile__ ("fence i,r" : : : "memory")
 #define __io_bw()	__asm__ __volatile__ ("fence w,o" : : : "memory")
-#define __io_aw()	mmiowb_set_pending()
+#define __io_aw()	__asm__ __volatile__ ("fence o,w" : : : "memory")
 
 #define readb(c)	({ u8  __v; __io_br(); __v = readb_cpu(c); __io_ar(__v); __v; })
 #define readw(c)	({ u16 __v; __io_br(); __v = readw_cpu(c); __io_ar(__v); __v; })

arch/riscv/include/asm/mmiowb.h

@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-
-#ifndef _ASM_RISCV_MMIOWB_H
-#define _ASM_RISCV_MMIOWB_H
-
-/*
- * "o,w" is sufficient to ensure that all writes to the device have completed
- * before the write to the spinlock is allowed to commit.
- */
-#define mmiowb()	__asm__ __volatile__ ("fence o,w" : : : "memory");
-
-#include <linux/smp.h>
-#include <asm-generic/mmiowb.h>
-
-#endif	/* _ASM_RISCV_MMIOWB_H */

arch/riscv/include/asm/smp.h

@@ -51,6 +51,9 @@ void riscv_set_ipi_ops(struct riscv_ipi_ops *ops);
 /* Clear IPI for current CPU */
 void riscv_clear_ipi(void);
 
+void crash_smp_send_stop(void);
+bool smp_crash_stop_failed(void);
+
 /* Secondary hart entry */
 asmlinkage void smp_callin(void);
 

arch/riscv/include/asm/spinlock.h

@@ -1,135 +1,9 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2015 Regents of the University of California
- * Copyright (C) 2017 SiFive
- */
+/* SPDX-License-Identifier: GPL-2.0 */
 
-#ifndef _ASM_RISCV_SPINLOCK_H
-#define _ASM_RISCV_SPINLOCK_H
+#ifndef __ASM_GENERIC_SPINLOCK_H
+#define __ASM_GENERIC_SPINLOCK_H
 
-#include <linux/kernel.h>
-#include <asm/current.h>
-#include <asm/fence.h>
+#include <asm-generic/qspinlock.h>
+#include <asm/qrwlock.h>
 
-/*
- * Simple spin lock operations.  These provide no fairness guarantees.
- */
-
-/* FIXME: Replace this with a ticket lock, like MIPS. */
-
-#define arch_spin_is_locked(x)	(READ_ONCE((x)->lock) != 0)
-
-static inline void arch_spin_unlock(arch_spinlock_t *lock)
-{
-	smp_store_release(&lock->lock, 0);
-}
-
-static inline int arch_spin_trylock(arch_spinlock_t *lock)
-{
-	int tmp = 1, busy;
-
-	__asm__ __volatile__ (
-		"	amoswap.w %0, %2, %1\n"
-		RISCV_ACQUIRE_BARRIER
-		: "=r" (busy), "+A" (lock->lock)
-		: "r" (tmp)
-		: "memory");
-
-	return !busy;
-}
-
-static inline void arch_spin_lock(arch_spinlock_t *lock)
-{
-	while (1) {
-		if (arch_spin_is_locked(lock))
-			continue;
-
-		if (arch_spin_trylock(lock))
-			break;
-	}
-}
-
-/***********************************************************/
-
-static inline void arch_read_lock(arch_rwlock_t *lock)
-{
-	int tmp;
-
-	__asm__ __volatile__(
-		"1:	lr.w	%1, %0\n"
-		"	bltz	%1, 1b\n"
-		"	addi	%1, %1, 1\n"
-		"	sc.w	%1, %1, %0\n"
-		"	bnez	%1, 1b\n"
-		RISCV_ACQUIRE_BARRIER
-		: "+A" (lock->lock), "=&r" (tmp)
-		:: "memory");
-}
-
-static inline void arch_write_lock(arch_rwlock_t *lock)
-{
-	int tmp;
-
-	__asm__ __volatile__(
-		"1:	lr.w	%1, %0\n"
-		"	bnez	%1, 1b\n"
-		"	li	%1, -1\n"
-		"	sc.w	%1, %1, %0\n"
-		"	bnez	%1, 1b\n"
-		RISCV_ACQUIRE_BARRIER
-		: "+A" (lock->lock), "=&r" (tmp)
-		:: "memory");
-}
-
-static inline int arch_read_trylock(arch_rwlock_t *lock)
-{
-	int busy;
-
-	__asm__ __volatile__(
-		"1:	lr.w	%1, %0\n"
-		"	bltz	%1, 1f\n"
-		"	addi	%1, %1, 1\n"
-		"	sc.w	%1, %1, %0\n"
-		"	bnez	%1, 1b\n"
-		RISCV_ACQUIRE_BARRIER
-		"1:\n"
-		: "+A" (lock->lock), "=&r" (busy)
-		:: "memory");
-
-	return !busy;
-}
-
-static inline int arch_write_trylock(arch_rwlock_t *lock)
-{
-	int busy;
-
-	__asm__ __volatile__(
-		"1:	lr.w	%1, %0\n"
-		"	bnez	%1, 1f\n"
-		"	li	%1, -1\n"
-		"	sc.w	%1, %1, %0\n"
-		"	bnez	%1, 1b\n"
-		RISCV_ACQUIRE_BARRIER
-		"1:\n"
-		: "+A" (lock->lock), "=&r" (busy)
-		:: "memory");
-
-	return !busy;
-}
-
-static inline void arch_read_unlock(arch_rwlock_t *lock)
-{
-	__asm__ __volatile__(
-		RISCV_RELEASE_BARRIER
-		"	amoadd.w x0, %1, %0\n"
-		: "+A" (lock->lock)
-		: "r" (-1)
-		: "memory");
-}
-
-static inline void arch_write_unlock(arch_rwlock_t *lock)
-{
-	smp_store_release(&lock->lock, 0);
-}
-
-#endif /* _ASM_RISCV_SPINLOCK_H */
+#endif /* __ASM_GENERIC_SPINLOCK_H */

arch/riscv/include/asm/spinlock_types.h

@@ -1,25 +1,9 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2015 Regents of the University of California
- */
+/* SPDX-License-Identifier: GPL-2.0 */
 
-#ifndef _ASM_RISCV_SPINLOCK_TYPES_H
-#define _ASM_RISCV_SPINLOCK_TYPES_H
+#ifndef __ASM_GENERIC_SPINLOCK_TYPES_H
+#define __ASM_GENERIC_SPINLOCK_TYPES_H
 
-#ifndef __LINUX_SPINLOCK_TYPES_H
-# error "please don't include this file directly"
-#endif
+#include <asm-generic/qspinlock_types.h>
+#include <asm-generic/qrwlock_types.h>
 
-typedef struct {
-	volatile unsigned int lock;
-} arch_spinlock_t;
-
-#define __ARCH_SPIN_LOCK_UNLOCKED	{ 0 }
-
-typedef struct {
-	volatile unsigned int lock;
-} arch_rwlock_t;
-
-#define __ARCH_RW_LOCK_UNLOCKED		{ 0 }
-
-#endif /* _ASM_RISCV_SPINLOCK_TYPES_H */
+#endif /* __ASM_GENERIC_SPINLOCK_TYPES_H */

arch/riscv/include/asm/tlbflush.h

@@ -14,7 +14,7 @@
 static inline void local_flush_tlb_all(void)
 {
 #ifdef CONFIG_NO_SFENCE_VMA
-	csr_write(CSR_SMCIR, 1 << 26);
+	csr_write(0x9c3, 1 << 26);
 #else
 	__asm__ __volatile__ ("sfence.vma" : : : "memory");
 #endif
@@ -24,7 +24,7 @@ static inline void local_flush_tlb_all(void)
 static inline void local_flush_tlb_page(unsigned long addr)
 {
 #ifdef CONFIG_NO_SFENCE_VMA
-	csr_write(CSR_SMCIR, 1 << 26);
+	csr_write(0x9c3, 1 << 26);
 #else
 	__asm__ __volatile__ ("sfence.vma %0" : : "r" (addr) : "memory");
 #endif
@@ -58,18 +58,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
 static inline void flush_tlb_kernel_range(unsigned long start,
 	unsigned long end)
 {
-#ifdef CONFIG_NO_SFENCE_VMA
-	csr_write(CSR_SMCIR, 1 << 26);
-#else
-	start &= PAGE_MASK;
-	end   += PAGE_SIZE - 1;
-	end   &= PAGE_MASK;
-
-	while (start < end) {
-		__asm__ __volatile__ ("sfence.vma %0" : : "r" (start) : "memory");
-		start += PAGE_SIZE;
-	}
-#endif
+	flush_tlb_all();
 }
 
 #endif /* _ASM_RISCV_TLBFLUSH_H */

arch/riscv/include/uapi/asm/ptrace.h

@@ -77,8 +77,18 @@ union __riscv_fp_state {
 	struct __riscv_q_ext_state q;
 };
 
+#ifdef CONFIG_VLEN_256
+struct __riscv_vblen {
+	__uint128_t v[2];
+};
+#endif
+
 struct __riscv_v_state {
+#ifdef CONFIG_VLEN_256
+	struct __riscv_vblen v[32];
+#else
 	__uint128_t v[32];
+#endif
 	unsigned long vstart;
 	unsigned long vxsat;
 	unsigned long vxrm;

arch/riscv/kernel/asm-offsets.c

@@ -104,7 +104,11 @@ void asm_offsets(void)
 	OFFSET(TASK_THREAD_VXRM, task_struct, thread.vstate.vxrm);
 	OFFSET(TASK_THREAD_VL, task_struct, thread.vstate.vl);
 	OFFSET(TASK_THREAD_VTYPE, task_struct, thread.vstate.vtype);
+#ifdef CONFIG_VLEN_256
+	DEFINE(RISCV_VECTOR_VLENB, sizeof(struct __riscv_vblen));
+#else
 	DEFINE(RISCV_VECTOR_VLENB, sizeof(__uint128_t));
+#endif
 
 	DEFINE(PT_SIZE, sizeof(struct pt_regs));
 	OFFSET(PT_EPC, pt_regs, epc);

arch/riscv/kernel/entry.S

@@ -251,7 +251,7 @@ ret_from_syscall_rejected:
 	andi t0, t0, _TIF_SYSCALL_WORK
 	bnez t0, handle_syscall_trace_exit
 
-ret_from_exception:
+ENTRY(ret_from_exception)
 	REG_L s0, PT_STATUS(sp)
 	csrc CSR_STATUS, SR_IE
 #ifdef CONFIG_TRACE_IRQFLAGS

arch/riscv/kernel/machine_kexec.c

@@ -14,6 +14,8 @@
 #include <asm/set_memory.h>	/* For set_memory_x() */
 #include <linux/compiler.h>	/* For unreachable() */
 #include <linux/cpu.h>		/* For cpu_down() */
+#include <linux/interrupt.h>
+#include <linux/irq.h>
 
 /**
  * kexec_image_info - Print received image details
@@ -135,19 +137,55 @@ void machine_shutdown(void)
 #endif
 }
 
-/**
+static void machine_kexec_mask_interrupts(void)
+{
+	unsigned int i;
+	struct irq_desc *desc;
+
+	for_each_irq_desc(i, desc) {
+		struct irq_chip *chip;
+		int ret;
+
+		chip = irq_desc_get_chip(desc);
+		if (!chip)
+			continue;
+
+		/*
+		 * First try to remove the active state. If this
+		 * fails, try to EOI the interrupt.
+		 */
+		ret = irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false);
+
+		if (ret && irqd_irq_inprogress(&desc->irq_data) &&
+		    chip->irq_eoi)
+			chip->irq_eoi(&desc->irq_data);
+
+		if (chip->irq_mask)
+			chip->irq_mask(&desc->irq_data);
+
+		if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data))
+			chip->irq_disable(&desc->irq_data);
+	}
+}
+
+/*
  * machine_crash_shutdown - Prepare to kexec after a kernel crash
  *
  * This function is called by crash_kexec just before machine_kexec
- * below and its goal is similar to machine_shutdown, but in case of
- * a kernel crash. Since we don't handle such cases yet, this function
- * is empty.
+ * and its goal is to shutdown non-crashing cpus and save registers.
  */
 void
 machine_crash_shutdown(struct pt_regs *regs)
 {
+	local_irq_disable();
+
+#ifdef CONFIG_SMP
+	/* shutdown non-crashing cpus */
+	crash_smp_send_stop();
+#endif
 	crash_save_cpu(regs, smp_processor_id());
-	machine_shutdown();
+	machine_kexec_mask_interrupts();
+
 	pr_info("Starting crashdump kernel...\n");
 }
 
@@ -168,12 +206,17 @@ machine_kexec(struct kimage *image)
 	struct kimage_arch *internal = &image->arch;
 	unsigned long jump_addr = (unsigned long) image->start;
 	unsigned long first_ind_entry = (unsigned long) &image->head;
-	unsigned long this_cpu_id = smp_processor_id();
+	unsigned long this_cpu_id = __smp_processor_id();
 	unsigned long this_hart_id = cpuid_to_hartid_map(this_cpu_id);
 	unsigned long fdt_addr = internal->fdt_addr;
 	void *control_code_buffer = page_address(image->control_code_page);
 	riscv_kexec_method kexec_method = NULL;
 
+#ifdef CONFIG_SMP
+	WARN(smp_crash_stop_failed(),
+		"Some CPUs may be stale, kdump will be unreliable.\n");
+#endif
+
 	if (image->type != KEXEC_TYPE_CRASH)
 		kexec_method = control_code_buffer;
 	else

arch/riscv/kernel/perf_callchain.c

@@ -75,13 +75,13 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry,
 		fp = user_backtrace(entry, fp, 0);
 }
 
-bool fill_callchain(unsigned long pc, void *entry)
+bool fill_callchain(unsigned long pc, unsigned long regs, void *entry)
 {
 	return perf_callchain_store(entry, pc) == 0;
 }
 
 void notrace walk_stackframe(struct task_struct *task,
-	struct pt_regs *regs, bool (*fn)(unsigned long, void *), void *arg);
+	struct pt_regs *regs, bool (*fn)(unsigned long, unsigned long, void *), void *arg);
 void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry,
 			   struct pt_regs *regs)
 {

arch/riscv/kernel/probes/decode-insn.c

@@ -38,11 +38,10 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api)
 	RISCV_INSN_REJECTED(c_ebreak,		insn);
 #endif
 
-	RISCV_INSN_REJECTED(auipc,		insn);
-	RISCV_INSN_REJECTED(branch,		insn);
-
 	RISCV_INSN_SET_SIMULATE(jal,		insn);
 	RISCV_INSN_SET_SIMULATE(jalr,		insn);
+	RISCV_INSN_SET_SIMULATE(auipc,		insn);
+	RISCV_INSN_SET_SIMULATE(branch,		insn);
 
 	return INSN_GOOD;
 }

arch/riscv/kernel/probes/kprobes.c

@@ -46,6 +46,21 @@ static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
 	post_kprobe_handler(kcb, regs);
 }
 
+static bool __kprobes arch_check_kprobe(struct kprobe *p)
+{
+	unsigned long tmp  = (unsigned long)p->addr - p->offset;
+	unsigned long addr = (unsigned long)p->addr;
+
+	while (tmp <= addr) {
+		if (tmp == addr)
+			return true;
+
+		tmp += GET_INSN_LENGTH(*(u16 *)tmp);
+	}
+
+	return false;
+}
+
 int __kprobes arch_prepare_kprobe(struct kprobe *p)
 {
 	unsigned long probe_addr = (unsigned long)p->addr;
@@ -56,6 +71,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
 		return -EINVAL;
 	}
 
+	if (!arch_check_kprobe(p))
+		return -EILSEQ;
+
 	/* copy instruction */
 	p->opcode = le32_to_cpu(*p->addr);
 

arch/riscv/kernel/probes/simulate-insn.c

@@ -83,3 +83,115 @@ bool __kprobes simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *reg
 
 	return ret;
 }
+
+#define auipc_rd_idx(opcode) \
+	((opcode >> 7) & 0x1f)
+
+#define auipc_imm(opcode) \
+	((((opcode) >> 12) & 0xfffff) << 12)
+
+#if __riscv_xlen == 64
+#define auipc_offset(opcode)	sign_extend64(auipc_imm(opcode), 31)
+#elif __riscv_xlen == 32
+#define auipc_offset(opcode)	auipc_imm(opcode)
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
+bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs)
+{
+	/*
+	 * auipc instruction:
+	 *  31        12 11 7 6      0
+	 * | imm[31:12] | rd | opcode |
+	 *        20       5     7
+	 */
+
+	u32 rd_idx = auipc_rd_idx(opcode);
+	unsigned long rd_val = addr + auipc_offset(opcode);
+
+	if (!rv_insn_reg_set_val(regs, rd_idx, rd_val))
+		return false;
+
+	instruction_pointer_set(regs, addr + 4);
+
+	return true;
+}
+
+#define branch_rs1_idx(opcode) \
+	(((opcode) >> 15) & 0x1f)
+
+#define branch_rs2_idx(opcode) \
+	(((opcode) >> 20) & 0x1f)
+
+#define branch_funct3(opcode) \
+	(((opcode) >> 12) & 0x7)
+
+#define branch_imm(opcode) \
+	(((((opcode) >>  8) & 0xf ) <<  1) | \
+	 ((((opcode) >> 25) & 0x3f) <<  5) | \
+	 ((((opcode) >>  7) & 0x1 ) << 11) | \
+	 ((((opcode) >> 31) & 0x1 ) << 12))
+
+#define branch_offset(opcode) \
+	sign_extend32((branch_imm(opcode)), 12)
+
+#define BRANCH_BEQ	0x0
+#define BRANCH_BNE	0x1
+#define BRANCH_BLT	0x4
+#define BRANCH_BGE	0x5
+#define BRANCH_BLTU	0x6
+#define BRANCH_BGEU	0x7
+
+bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs)
+{
+	/*
+	 * branch instructions:
+	 *      31    30       25 24 20 19 15 14    12 11       8    7      6      0
+	 * | imm[12] | imm[10:5] | rs2 | rs1 | funct3 | imm[4:1] | imm[11] | opcode |
+	 *     1           6        5     5      3         4         1         7
+	 *     imm[12|10:5]        rs2   rs1    000       imm[4:1|11]       1100011  BEQ
+	 *     imm[12|10:5]        rs2   rs1    001       imm[4:1|11]       1100011  BNE
+	 *     imm[12|10:5]        rs2   rs1    100       imm[4:1|11]       1100011  BLT
+	 *     imm[12|10:5]        rs2   rs1    101       imm[4:1|11]       1100011  BGE
+	 *     imm[12|10:5]        rs2   rs1    110       imm[4:1|11]       1100011  BLTU
+	 *     imm[12|10:5]        rs2   rs1    111       imm[4:1|11]       1100011  BGEU
+	 */
+
+	s32 offset;
+	s32 offset_tmp;
+	unsigned long rs1_val;
+	unsigned long rs2_val;
+
+	if (!rv_insn_reg_get_val(regs, branch_rs1_idx(opcode), &rs1_val) ||
+	    !rv_insn_reg_get_val(regs, branch_rs2_idx(opcode), &rs2_val))
+		return false;
+
+	offset_tmp = branch_offset(opcode);
+	switch (branch_funct3(opcode)) {
+	case BRANCH_BEQ:
+		offset = (rs1_val == rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BNE:
+		offset = (rs1_val != rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BLT:
+		offset = ((long)rs1_val < (long)rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BGE:
+		offset = ((long)rs1_val >= (long)rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BLTU:
+		offset = (rs1_val < rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BGEU:
+		offset = (rs1_val >= rs2_val) ? offset_tmp : 4;
+		break;
+	default:
+		return false;
+	}
+
+	instruction_pointer_set(regs, addr + offset);
+
+	return true;
+}

arch/riscv/kernel/smp.c

@@ -11,6 +11,7 @@
 #include <linux/cpu.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
+#include <linux/kexec.h>
 #include <linux/profile.h>
 #include <linux/smp.h>
 #include <linux/sched.h>
@@ -26,6 +27,7 @@ enum ipi_message_type {
 	IPI_RESCHEDULE,
 	IPI_CALL_FUNC,
 	IPI_CPU_STOP,
+	IPI_CPU_CRASH_STOP,
 	IPI_IRQ_WORK,
 	IPI_MAX
 };
@@ -85,6 +87,22 @@ static void ipi_stop(void)
 		wait_for_interrupt();
 }
 
+#ifdef CONFIG_KEXEC_CORE
+static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
+
+static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
+{
+	crash_save_cpu(regs, cpu);
+
+	atomic_dec(&waiting_for_crash_ipi);
+
+	local_irq_disable();
+
+	while(1)
+		wait_for_interrupt();
+}
+#endif
+
 static struct riscv_ipi_ops *ipi_ops;
 
 void riscv_set_ipi_ops(struct riscv_ipi_ops *ops)
@@ -138,6 +156,7 @@ void arch_irq_work_raise(void)
 
 void handle_IPI(struct pt_regs *regs)
 {
+	unsigned int cpu = smp_processor_id();
 	struct pt_regs *old_regs = set_irq_regs(regs);
 	unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
 	unsigned long *stats = ipi_data[smp_processor_id()].stats;
@@ -171,6 +190,13 @@ void handle_IPI(struct pt_regs *regs)
 			ipi_stop();
 		}
 
+		if (ops & (1 << IPI_CPU_CRASH_STOP)) {
+#ifdef CONFIG_KEXEC_CORE
+			ipi_cpu_crash_stop(cpu, get_irq_regs());
+#endif
+			unreachable();
+		}
+
 		if (ops & (1 << IPI_IRQ_WORK)) {
 			stats[IPI_IRQ_WORK]++;
 			irq_work_run();
@@ -191,6 +217,7 @@ static const char * const ipi_names[] = {
 	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
 	[IPI_CALL_FUNC]		= "Function call interrupts",
 	[IPI_CPU_STOP]		= "CPU stop interrupts",
+	[IPI_CPU_CRASH_STOP]    = "CPU stop (for crash dump) interrupts",
 	[IPI_IRQ_WORK]		= "IRQ work interrupts",
 };
 
@@ -242,6 +269,64 @@ void smp_send_stop(void)
 			   cpumask_pr_args(cpu_online_mask));
 }
 
+#ifdef CONFIG_KEXEC_CORE
+/*
+ * The number of CPUs online, not counting this CPU (which may not be
+ * fully online and so not counted in num_online_cpus()).
+ */
+static inline unsigned int num_other_online_cpus(void)
+{
+        unsigned int this_cpu_online = cpu_online(smp_processor_id());
+
+        return num_online_cpus() - this_cpu_online;
+}
+
+void crash_smp_send_stop(void)
+{
+        static int cpus_stopped;
+        cpumask_t mask;
+        unsigned long timeout;
+
+        /*
+         * This function can be called twice in panic path, but obviously
+         * we execute this only once.
+         */
+        if (cpus_stopped)
+                return;
+
+        cpus_stopped = 1;
+
+        /*
+         * If this cpu is the only one alive at this point in time, online or
+         * not, there are no stop messages to be sent around, so just back out.
+         */
+        if (num_other_online_cpus() == 0)
+                return;
+
+        cpumask_copy(&mask, cpu_online_mask);
+        cpumask_clear_cpu(smp_processor_id(), &mask);
+
+        atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
+
+        pr_crit("SMP: stopping secondary CPUs\n");
+        send_ipi_mask(&mask, IPI_CPU_CRASH_STOP);
+
+        /* Wait up to ten seconds for other CPUs to stop */
+        timeout = USEC_PER_SEC * 10;
+        while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
+                udelay(1);
+
+        if (atomic_read(&waiting_for_crash_ipi) > 0)
+                pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
+                        cpumask_pr_args(&mask));
+}
+
+bool smp_crash_stop_failed(void)
+{
+        return (atomic_read(&waiting_for_crash_ipi) > 0);
+}
+#endif
+
 void smp_send_reschedule(int cpu)
 {
 	send_ipi_single(cpu, IPI_RESCHEDULE);

arch/riscv/kernel/stacktrace.c

@@ -21,8 +21,10 @@ struct stackframe {
 	unsigned long ra;
 };
 
+extern asmlinkage void ret_from_exception(void);
+
 void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
-			     bool (*fn)(unsigned long, void *), void *arg)
+			     bool (*fn)(unsigned long, unsigned long, void *), void *arg)
 {
 	unsigned long fp, sp, pc;
 
@@ -46,7 +48,7 @@ void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
 		unsigned long low, high;
 		struct stackframe *frame;
 
-		if (unlikely(!__kernel_text_address(pc) || fn(pc, arg)))
+		if (unlikely(!__kernel_text_address(pc) || fn(pc, 0, arg)))
 			break;
 
 		/* Validate frame pointer */
@@ -57,16 +59,29 @@ void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
 		/* Unwind stack frame */
 		frame = (struct stackframe *)fp - 1;
 		sp = fp;
-		fp = frame->fp;
-		pc = ftrace_graph_ret_addr(current, NULL, frame->ra,
-					   (unsigned long *)(fp - 8));
+		if (regs && (regs->epc == pc) && (frame->fp & 0x7)) {
+			fp = frame->ra;
+			pc = regs->ra;
+		} else {
+			fp = frame->fp;
+			pc = ftrace_graph_ret_addr(current, NULL, frame->ra,
+						   &frame->ra);
+			if (pc == (unsigned long)ret_from_exception) {
+				if (unlikely(!__kernel_text_address(pc) || fn(pc, sp, arg)))
+					break;
+
+				pc = ((struct pt_regs *)sp)->epc;
+				fp = ((struct pt_regs *)sp)->s0;
+			}
+		}
+
 	}
 }
 
 #else /* !CONFIG_FRAME_POINTER */
 
 void notrace walk_stackframe(struct task_struct *task,
-	struct pt_regs *regs, bool (*fn)(unsigned long, void *), void *arg)
+	struct pt_regs *regs, bool (*fn)(unsigned long, unsigned long, void *), void *arg)
 {
 	unsigned long sp, pc;
 	unsigned long *ksp;
@@ -88,7 +103,7 @@ void notrace walk_stackframe(struct task_struct *task,
 
 	ksp = (unsigned long *)sp;
 	while (!kstack_end(ksp)) {
-		if (__kernel_text_address(pc) && unlikely(fn(pc, arg)))
+		if (__kernel_text_address(pc) && unlikely(fn(pc, 0, arg)))
 			break;
 		pc = (*ksp++) - 0x4;
 	}
@@ -97,11 +112,15 @@ void notrace walk_stackframe(struct task_struct *task,
 #endif /* CONFIG_FRAME_POINTER */
 
 
-static bool print_trace_address(unsigned long pc, void *arg)
+static bool print_trace_address(unsigned long pc, unsigned long regs, void *arg)
 {
 	const char *loglvl = arg;
 
 	print_ip_sym(loglvl, pc);
+
+	if (regs)
+		show_regs((struct pt_regs *)regs);
+
 	return false;
 }
 
@@ -109,9 +128,10 @@ void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
 {
 	pr_cont("Call Trace:\n");
 	walk_stackframe(task, NULL, print_trace_address, (void *)loglvl);
+	pr_cont("End Trace.\n");
 }
 
-static bool save_wchan(unsigned long pc, void *arg)
+static bool save_wchan(unsigned long pc, unsigned long regs, void *arg)
 {
 	if (!in_sched_functions(pc)) {
 		unsigned long *p = arg;
@@ -148,7 +168,7 @@ static bool __save_trace(unsigned long pc, void *arg, bool nosched)
 	return (trace->nr_entries >= trace->max_entries);
 }
 
-static bool save_trace(unsigned long pc, void *arg)
+static bool save_trace(unsigned long pc, unsigned long regs, void *arg)
 {
 	return __save_trace(pc, arg, false);
 }

arch/riscv/kernel/vector.S

@@ -46,6 +46,72 @@ ENTRY(__vstate_save)
 	csrr	t0,  CSR_VTYPE
 	sd	t0,  TASK_THREAD_VTYPE_V0(a0)
 
+#ifdef CONFIG_VLEN_256
+	vsetvli	t0, x0, e8,m1
+	V_ST	v0,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v1,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v2,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v3,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v4,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v5,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v6,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v7,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v8,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v9,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v10, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v11, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v12, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v13, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v14, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v15, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v16, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v17, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v18, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v19, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v20, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v21, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v22, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v23, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v24, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v25, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v26, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v27, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v28, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v29, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v30, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v31, (a0)
+#else
 	vsetvli	t0, x0, e8,m8
 	V_ST	v0,  (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
@@ -54,6 +120,7 @@ ENTRY(__vstate_save)
 	V_ST	v16, (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
 	V_ST	v24, (a0)
+#endif
 
 	csrc	sstatus, t1
 	ret
@@ -67,6 +134,72 @@ ENTRY(__vstate_restore)
 	li	t1, (SR_VS | SR_FS)
 	csrs	sstatus, t1
 
+#ifdef CONFIG_VLEN_256
+	vsetvli	t0, x0, e8,m1
+	V_LD	v0,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v1,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v2,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v3,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v4,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v5,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v6,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v7,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v8,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v9,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v10, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v11, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v12, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v13, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v14, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v15, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v16, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v17, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v18, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v19, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v20, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v21, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v22, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v23, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v24, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v25, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v26, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v27, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v28, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v29, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v30, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v31, (a0)
+#else
 	vsetvli	t0, x0, e8,m8
 	V_LD	v0,  (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
@@ -75,6 +208,7 @@ ENTRY(__vstate_restore)
 	V_LD	v16, (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
 	V_LD	v24, (a0)
+#endif
 
 	mv	a0,  t2
 	ld	t0,  TASK_THREAD_VSTART_V0(a0)

arch/riscv/mm/cacheflush.c

@@ -84,14 +84,16 @@ void flush_icache_pte(pte_t pte)
 {
 	struct page *page = pte_page(pte);
 
-	if (!test_and_set_bit(PG_dcache_clean, &page->flags))
+	if (!test_bit(PG_dcache_clean, &page->flags)) {
 		flush_icache_all();
+		set_bit(PG_dcache_clean, &page->flags);
+	}
 }
 #endif /* CONFIG_MMU */
 
 static bool thead_dma_init_flag = false;
 
-#define sync_is()	asm volatile (".long 0x01b0000b")
+#define sync_is()	asm volatile (".long 0x01a0000b")
 void dma_wbinv_range(unsigned long start, unsigned long end)
 {
 	register unsigned long i asm("a0") = start & ~(L1_CACHE_BYTES - 1);

arch/riscv/mm/context.c

@@ -56,14 +56,48 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 	 */
 	cpu = smp_processor_id();
 
-	cpumask_clear_cpu(cpu, mm_cpumask(prev));
 	cpumask_set_cpu(cpu, mm_cpumask(next));
 
 #ifdef CONFIG_MMU
+	__asm__ __volatile__(
+			"jal t0,1f\n\t"
+			"1: \n\t"
+			"jal t0,2f\n\t"
+			"2: \n\t"
+			"jal t0,3f\n\t"
+			"3: \n\t"
+			"jal t0,4f\n\t"
+			"4: \n\t"
+			"jal t0,5f\n\t"
+			"5: \n\t"
+			"jal t0,6f\n\t"
+			"6: \n\t"
+			"jal t0,7f\n\t"
+			"7: \n\t"
+			"jal t0,8f\n\t"
+			"8: \n\t"
+			"jal t0,9f\n\t"
+			"9: \n\t"
+			"jal t0,10f\n\t"
+			"10: \n\t"
+			"jal t0,11f\n\t"
+			"11: \n\t"
+			"jal t0,12f\n\t"
+			"12: \n\t"
+			::: "memory", "t0");
+
 	check_and_switch_context(next, cpu);
 	asid = (next->context.asid.counter & SATP_ASID_MASK)
 		<< SATP_ASID_SHIFT;
 
+	local_flush_tlb_page(0);
+
+	/* flush utlb before setting satp */
+	__asm__ __volatile__(
+			"li t0, 0\n\t"
+			"sfence.vma t0, t0\n\t"
+			::: "memory", "t0");
+
 	csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE | asid);
 #endif
 

arch/riscv/mm/tlbflush.c

@@ -3,73 +3,6 @@
 #include <linux/mm.h>
 #include <linux/smp.h>
 #include <linux/sched.h>
-
-#define XUANTIE
-#ifdef  XUANTIE
-#include <asm/mmu_context.h>
-
-void flush_tlb_all(void)
-{
-#ifdef CONFIG_NO_SFENCE_VMA
-	csr_write(CSR_SMCIR, 1 << 26);
-#else
-	__asm__ __volatile__ ("sfence.vma" : : : "memory");
-#endif
-}
-
-void flush_tlb_mm(struct mm_struct *mm)
-{
-	int newpid = cpu_asid(mm);
-
-#ifdef CONFIG_NO_SFENCE_VMA
-	csr_write(CSR_SMCIR, (1 << 27) | newpid);
-#else
-	__asm__ __volatile__ ("sfence.vma zero, %0"
-				:
-				: "r"(newpid)
-				: "memory");
-#endif
-}
-
-void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
-{
-	int newpid = cpu_asid(vma->vm_mm);
-
-#ifdef CONFIG_NO_SFENCE_VMA
-	csr_write(CSR_SMCIR, (1 << 27) | newpid);
-#else
-	addr &= PAGE_MASK;
-
-	__asm__ __volatile__ ("sfence.vma %0, %1"
-				:
-				: "r"(addr), "r"(newpid)
-				: "memory");
-#endif
-}
-
-void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
-			unsigned long end)
-{
-	unsigned long newpid = cpu_asid(vma->vm_mm);
-
-#ifdef CONFIG_NO_SFENCE_VMA
-	csr_write(CSR_SMCIR, (1 << 27) | newpid);
-#else
-	start &= PAGE_MASK;
-	end   += PAGE_SIZE - 1;
-	end   &= PAGE_MASK;
-
-	while (start < end) {
-		__asm__ __volatile__ ("sfence.vma %0, %1"
-					:
-					: "r"(start), "r"(newpid)
-					: "memory");
-		start += PAGE_SIZE;
-	}
-#endif
-}
-#else
-
 #include <asm/sbi.h>
 
 void flush_tlb_all(void)
@@ -121,4 +54,3 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
 {
 	__sbi_tlb_flush_range(mm_cpumask(vma->vm_mm), start, end - start);
 }
-#endif

drivers/clk/thead/clk-light-fm.c

@@ -5,6 +5,7 @@
 
 #include <dt-bindings/clock/light-fm-ap-clock.h>
 #include <linux/clk.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -640,6 +641,6 @@ static struct platform_driver light_clk_driver = {
 };
 
 module_platform_driver(light_clk_driver);
-MODULE_AUTHOR("wei.liu <lw312886@alibaba-inc.com>");
+MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
 MODULE_DESCRIPTION("Thead Light Fullmask clock driver");
 MODULE_LICENSE("GPL v2");

drivers/clk/thead/clk-light-mpw.c

@@ -487,6 +487,6 @@ static struct platform_driver light_clk_driver = {
 };
 
 module_platform_driver(light_clk_driver);
-MODULE_AUTHOR("fugang.duan <duanfugang.dfg@alibaba-inc.com>");
+MODULE_AUTHOR("fugang.duan <duanfugang.dfg@linux.alibaba.com>");
 MODULE_DESCRIPTION("Thead Light MPW clock driver");
 MODULE_LICENSE("GPL v2");

drivers/clk/thead/gate/Makefile

@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 
-obj-$(CONFIG_CLK_LIGHT_FM) += thead-gate.o visys-gate.o vpsys-gate.o vosys-gate.o dspsys-gate.o
+obj-$(CONFIG_CLK_LIGHT_FM) += thead-gate.o visys-gate.o vpsys-gate.o vosys-gate.o dspsys-gate.o audiosys-gate.o

drivers/clk/thead/gate/audiosys-gate.c

@@ -0,0 +1,124 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include <dt-bindings/clock/light-fm-ap-clock.h>
+#include <dt-bindings/clock/light-audiosys.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include "clk-gate.h"
+#include "../clk.h"
+
+static struct clk *gates[LIGHT_CLKGEN_AUDIO_CLK_END];
+static struct clk_onecell_data clk_gate_data;
+
+static int light_audiosys_clk_probe(struct platform_device *pdev)
+{
+	struct regmap *audiosys_regmap;
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	int ret;
+
+	audiosys_regmap = syscon_regmap_lookup_by_phandle(np, "audiosys-regmap");
+	if (IS_ERR(audiosys_regmap)) {
+		dev_err(&pdev->dev, "cannot find regmap for vi system register\n");
+		return PTR_ERR(audiosys_regmap);
+	}
+
+	printk("%s audiosys_regmap=0x%px\n", __func__, audiosys_regmap);
+
+	/* we assume that the gate clock is a root clock  */
+	gates[LIGHT_CLKGEN_AUDIO_CPU] = thead_gate_clk_register("clkgen_audiosys_cpu_clk", NULL,
+									audiosys_regmap, 0x10, 0, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_SRAM0] = thead_gate_clk_register("clkgen_audiosys_sram0_clk", NULL,
+									audiosys_regmap, 0x10, 1, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_SRAM1] = thead_gate_clk_register("clkgen_audiosys_sram1_clk", NULL,
+									audiosys_regmap, 0x10, 2, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_DMA] = thead_gate_clk_register("clkgen_audiosys_dma_clk", NULL,
+									audiosys_regmap, 0x10, 3, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_BSM] = thead_gate_clk_register("clkgen_audiosys_bsm_clk", NULL,
+									audiosys_regmap, 0x10, 4, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_TIMER] = thead_gate_clk_register("clkgen_audiosys_timer_clk", NULL,
+									audiosys_regmap, 0x10, 8, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT1] = thead_gate_clk_register("clkgen_audiosys_timer_cnt1_clk", NULL,
+									audiosys_regmap, 0x10, 9, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT2] = thead_gate_clk_register("clkgen_audiosys_timer_cnt2_clk", NULL,
+									audiosys_regmap, 0x10, 10, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT3] = thead_gate_clk_register("clkgen_audiosys_timer_cnt3_clk", NULL,
+									audiosys_regmap, 0x10, 11, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_TIMER_CNT4] = thead_gate_clk_register("clkgen_audiosys_timer_cnt4_clk", NULL,
+									audiosys_regmap, 0x10, 12, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_WDR] = thead_gate_clk_register("clkgen_audiosys_wdr_clk", NULL,
+									audiosys_regmap, 0x10, 13, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_I2C0] = thead_gate_clk_register("clkgen_audiosys_i2c0_clk", NULL,
+									audiosys_regmap, 0x10, 14, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_I2C1] = thead_gate_clk_register("clkgen_audiosys_i2c1_clk", NULL,
+									audiosys_regmap, 0x10, 15, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_UART] = thead_gate_clk_register("clkgen_audiosys_uart_clk", NULL,
+									audiosys_regmap, 0x10, 16, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_I2S0] = thead_gate_clk_register("clkgen_audiosys_i2s0_clk", NULL,
+									audiosys_regmap, 0x10, 17, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_I2S1] = thead_gate_clk_register("clkgen_audiosys_i2s1_clk", NULL,
+									audiosys_regmap, 0x10, 18, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_I2S2] = thead_gate_clk_register("clkgen_audiosys_i2s2_clk", NULL,
+									audiosys_regmap, 0x10, 19, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_I2S8CH] = thead_gate_clk_register("clkgen_audiosys_i2s8ch_clk", NULL,
+									audiosys_regmap, 0x10, 20, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_TDM] = thead_gate_clk_register("clkgen_audiosys_tdm_clk", NULL,
+									audiosys_regmap, 0x10, 21, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_GPIO] = thead_gate_clk_register("clkgen_audiosys_gpio_clk", NULL,
+									audiosys_regmap, 0x10, 22, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_SPDIF0] = thead_gate_clk_register("clkgen_audiosys_spdif0_clk", NULL,
+									audiosys_regmap, 0x10, 23, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_SPDIF1] = thead_gate_clk_register("clkgen_audiosys_spdif1_clk", NULL,
+									audiosys_regmap, 0x10, 24, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_VAD] = thead_gate_clk_register("clkgen_audiosys_vad_clk", NULL,
+									audiosys_regmap, 0x10, 25, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_AUDIO_IOMUX] = thead_gate_clk_register("clkgen_audiosys_iomux_clk", NULL,
+									audiosys_regmap, 0x10, 26, GATE_NOT_SHARED, NULL, dev);
+
+	clk_gate_data.clks = gates;
+	clk_gate_data.clk_num = ARRAY_SIZE(gates);
+
+	ret = of_clk_add_provider(np, of_clk_src_onecell_get, &clk_gate_data);
+	if (ret < 0) {
+		dev_err(dev, "failed to register gate clks for light audiosys\n");
+		goto unregister_clks;
+	}
+
+	dev_info(dev, "succeed to register audiosys gate clock provider\n");
+
+	return 0;
+
+unregister_clks:
+	thead_unregister_clocks(gates, ARRAY_SIZE(gates));
+	return ret;
+}
+
+static const struct of_device_id audiosys_clk_gate_of_match[] = {
+	{ .compatible = "thead,audiosys-gate-controller" },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, audiosys_clk_gate_of_match);
+
+static struct platform_driver light_audiosys_clk_driver = {
+	.probe = light_audiosys_clk_probe,
+	.driver = {
+		.name = "audiosys-clk-gate-provider",
+		.of_match_table = of_match_ptr(audiosys_clk_gate_of_match),
+	},
+};
+
+module_platform_driver(light_audiosys_clk_driver);
+MODULE_AUTHOR("nanli.yd <nanli.yd@linux.alibaba.com>");
+MODULE_DESCRIPTION("Thead Light Fullmask audiosys clock gate provider");
+MODULE_LICENSE("GPL v2");

drivers/clk/thead/gate/dspsys-gate.c

@@ -104,6 +104,6 @@ static struct platform_driver light_dspsys_clk_driver = {
 };
 
 module_platform_driver(light_dspsys_clk_driver);
-MODULE_AUTHOR("wei.liu <lw312886@alibaba-inc.com>");
+MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
 MODULE_DESCRIPTION("Thead Light Fullmask dspsys clock gate provider");
 MODULE_LICENSE("GPL v2");

drivers/clk/thead/gate/visys-gate.c

@@ -80,9 +80,9 @@ static int light_visys_clk_probe(struct platform_device *pdev)
 	gates[LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi0_cfg_clk", NULL,
 									visys_regmap, 0xa0, 8, GATE_NOT_SHARED, NULL, dev);
 	gates[LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi1_cfg_clk", NULL,
-									visys_regmap, 0xa0, 7, GATE_NOT_SHARED, NULL, dev);
-	gates[LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi2_cfg_clk", NULL,
 									visys_regmap, 0xa0, 6, GATE_NOT_SHARED, NULL, dev);
+	gates[LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi2_cfg_clk", NULL,
+									visys_regmap, 0xa0, 7, GATE_NOT_SHARED, NULL, dev);
 	gates[LIGHT_CLKGEN_DW200_CLK_VSE] = thead_gate_clk_register("clkgen_dw200_clk_vse", NULL,
 									visys_regmap, 0xa0, 5, GATE_NOT_SHARED, NULL, dev);
 	gates[LIGHT_CLKGEN_DW200_CLK_DWE] = thead_gate_clk_register("clkgen_dw200_clk_dwe", NULL,
@@ -139,6 +139,6 @@ static struct platform_driver light_visys_clk_driver = {
 };
 
 module_platform_driver(light_visys_clk_driver);
-MODULE_AUTHOR("wei.liu <lw312886@alibaba-inc.com>");
+MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
 MODULE_DESCRIPTION("Thead Light Fullmask visys clock gate provider");
 MODULE_LICENSE("GPL v2");

drivers/clk/thead/gate/vosys-gate.c

@@ -106,6 +106,6 @@ static struct platform_driver light_vosys_clk_driver = {
 };
 
 module_platform_driver(light_vosys_clk_driver);
-MODULE_AUTHOR("wei.liu <lw312886@alibaba-inc.com>");
+MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
 MODULE_DESCRIPTION("Thead Light Fullmask vosys clock gate provider");
 MODULE_LICENSE("GPL v2");

drivers/clk/thead/gate/vpsys-gate.c

@@ -89,6 +89,6 @@ static struct platform_driver light_vpsys_clk_driver = {
 };
 
 module_platform_driver(light_vpsys_clk_driver);
-MODULE_AUTHOR("wei.liu <lw312886@alibaba-inc.com>");
+MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
 MODULE_DESCRIPTION("Thead Light Fullmask vpsys clock gate provider");
 MODULE_LICENSE("GPL v2");

drivers/cpufreq/light-mpw-cpufreq.c

@@ -13,9 +13,15 @@
 #include <linux/of_address.h>
 #include <linux/pm_opp.h>
 #include <linux/platform_device.h>
+#include <linux/reboot.h>
 #include <linux/regulator/consumer.h>
 #include <linux/suspend.h>
 #include <linux/clk-provider.h>
+#include <linux/smp.h>
+
+static DEFINE_MUTEX(cpufreq_lock);
+
+bool cpufreq_denied = false;
 
 struct regulator *dvdd_cpu_reg;
 struct regulator *dvddm_cpu_reg;
@@ -62,6 +68,13 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 	u32 val;
 	u32 re_modify_bus_freq = 0;
 
+	mutex_lock(&cpufreq_lock);
+
+	if (cpufreq_denied) {
+		dev_emerg(cpu_dev, "Denied to set cpu frequency temporarily on reboot\n");
+		mutex_unlock(&cpufreq_lock);
+		return 0;
+	}
 	new_freq = freq_table[index].frequency;
 	freq_hz = new_freq * 1000;
 	old_freq = policy->cur;
@@ -69,6 +82,7 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 	opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_hz);
 	if (IS_ERR(opp)) {
 		dev_err(cpu_dev, "failed to find OPP for %ld\n", freq_hz);
+		mutex_unlock(&cpufreq_lock);
 		return PTR_ERR(opp);
 	}
 
@@ -78,6 +92,7 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 	volt_old = regulator_get_voltage(dvdd_cpu_reg);
 	if (volt_old < 0) {
 		dev_err(cpu_dev, "failed to get cpu voltage\n");
+		mutex_unlock(&cpufreq_lock);
 		return volt_old;
 	}
 
@@ -113,12 +128,14 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 		ret = regulator_set_voltage_tol(dvddm_cpu_reg, light_dvddm_volt[index], 0);
 		if (ret) {
 			dev_err(cpu_dev, "failed to scale vddsoc up: %d\n", ret);
+			mutex_unlock(&cpufreq_lock);
 			return ret;
 		}
 		ret = regulator_set_voltage_tol(dvdd_cpu_reg, volt, 0);
 		if (ret) {
 			dev_err(cpu_dev,
 				"failed to scale vddarm up: %d\n", ret);
+			mutex_unlock(&cpufreq_lock);
 			return ret;
 		}
 	}
@@ -150,6 +167,7 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 		ret1 = regulator_set_voltage_tol(dvdd_cpu_reg, volt_old, 0);
 		if (ret1)
 			dev_err(cpu_dev, "failed to restore dvdd_cpu voltage: %d\n", ret1);
+		mutex_unlock(&cpufreq_lock);
 		return ret;
 	}
 
@@ -177,6 +195,8 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 		udelay(1);
 	}
 
+	mutex_unlock(&cpufreq_lock);
+
 	return 0;
 }
 
@@ -191,6 +211,20 @@ static int light_cpufreq_init(struct cpufreq_policy *policy)
 	return 0;
 }
 
+static int light_cpufreq_reboot_notifier(struct notifier_block *this,
+					 unsigned long event, void *ptr)
+{
+	mutex_lock(&cpufreq_lock);
+	cpufreq_denied = true;
+	mutex_unlock(&cpufreq_lock);
+
+	return NOTIFY_DONE;
+}
+
+static struct notifier_block cpufreq_reboot_notifier = {
+	.notifier_call = light_cpufreq_reboot_notifier,
+};
+
 static struct cpufreq_driver light_cpufreq_driver = {
 	.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
 		 CPUFREQ_IS_COOLING_DEV,
@@ -224,6 +258,53 @@ static struct notifier_block light_cpufreq_pm_notifier = {
 	.notifier_call = light_cpufreq_pm_notify,
 };
 
+/*
+ * Set CPU PLL1's frequency as minimum on panic
+ */
+static int panic_cpufreq_notifier_call(struct notifier_block *nb,
+				 unsigned long action, void *data)
+{
+	int cpu = smp_processor_id();
+	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
+	u32 val = readl(ap_sys_reg);
+
+	pr_info("enter panic_cpufreq_notifier_call\n");
+
+	/*
+	 * set CPU PLL1's frequency as minimum to compatible voltage
+	 * becarefull if the PLL1 is serving the cpu core, swith to PLL0 first
+	 */
+	if (strcmp(__clk_get_name(clk_get_parent(clks[LIGHT_C910_CCLK].clk)),
+		__clk_get_name(clks[LIGHT_C910_CCLK_I0].clk))) {
+		pr_debug("[%s,%d]\n", __func__, __LINE__);
+		clk_prepare_enable(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
+		clk_set_rate(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk, policy->min * 1000);
+		udelay(1);
+		clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_C910_CCLK_I0].clk);
+
+		pr_debug("[%s,%d]\n", __func__, __LINE__);
+	}
+
+	pr_debug("[%s,%d]\n", __func__, __LINE__);
+	/*
+	 * since the clk driver will use PLL1 as the default clock source,
+	 * in order to compatible voltage which is unpredictable we should
+	 * set the CPU PLL1's frequency as minimum in advance, otherwise the
+	 * system may crash in crash kernel stage.
+	 */
+	clk_prepare_enable(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
+	clk_set_rate(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk, policy->min * 1000);
+	udelay(1);
+
+	pr_info("finish to execute cpufreq notifier callback on panic\n");
+
+	return 0;
+}
+
+static struct notifier_block panic_cpufreq_notifier = {
+	.notifier_call = panic_cpufreq_notifier_call,
+};
+
 static int light_cpufreq_probe(struct platform_device *pdev)
 {
 	struct device_node *np;
@@ -341,6 +422,15 @@ soc_opp_out:
 
 	of_node_put(np);
 
+	ret = atomic_notifier_chain_register(&panic_notifier_list,
+					     &panic_cpufreq_notifier);
+	if (ret) {
+		pr_err("unable to register notifier(%d)\n", ret);
+		goto free_freq_table;
+	}
+
+	register_reboot_notifier(&cpufreq_reboot_notifier);
+
 	dev_info(cpu_dev, "finish to register cpufreq driver\n");
 
 	return 0;
@@ -391,6 +481,6 @@ static struct platform_driver light_cpufreq_platdrv = {
 module_platform_driver(light_cpufreq_platdrv);
 
 MODULE_ALIAS("platform:light-cpufreq");
-MODULE_AUTHOR("fugang.duan <duanfugang.dfg@alibaba-inc.com>");
+MODULE_AUTHOR("fugang.duan <duanfugang.dfg@linux.alibaba.com>");
 MODULE_DESCRIPTION("Thead Light cpufreq driver");
 MODULE_LICENSE("GPL v2");

drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c

@@ -82,37 +82,49 @@ axi_chan_iowrite64(struct axi_dma_chan *chan, u32 reg, u64 val)
 static inline void axi_dma_disable(struct axi_dma_chip *chip)
 {
 	u32 val;
+	unsigned long flags;
 
+	spin_lock_irqsave(&chip->lock, flags);
 	val = axi_dma_ioread32(chip, DMAC_CFG);
 	val &= ~DMAC_EN_MASK;
 	axi_dma_iowrite32(chip, DMAC_CFG, val);
+	spin_unlock_irqrestore(&chip->lock, flags);
 }
 
 static inline void axi_dma_enable(struct axi_dma_chip *chip)
 {
 	u32 val;
+	unsigned long flags;
 
+	spin_lock_irqsave(&chip->lock, flags);
 	val = axi_dma_ioread32(chip, DMAC_CFG);
 	val |= DMAC_EN_MASK;
 	axi_dma_iowrite32(chip, DMAC_CFG, val);
+	spin_unlock_irqrestore(&chip->lock, flags);
 }
 
 static inline void axi_dma_irq_disable(struct axi_dma_chip *chip)
 {
 	u32 val;
+	unsigned long flags;
 
+	spin_lock_irqsave(&chip->lock, flags);
 	val = axi_dma_ioread32(chip, DMAC_CFG);
 	val &= ~INT_EN_MASK;
 	axi_dma_iowrite32(chip, DMAC_CFG, val);
+	spin_unlock_irqrestore(&chip->lock, flags);
 }
 
 static inline void axi_dma_irq_enable(struct axi_dma_chip *chip)
 {
 	u32 val;
+	unsigned long flags;
 
+	spin_lock_irqsave(&chip->lock, flags);
 	val = axi_dma_ioread32(chip, DMAC_CFG);
 	val |= INT_EN_MASK;
 	axi_dma_iowrite32(chip, DMAC_CFG, val);
+	spin_unlock_irqrestore(&chip->lock, flags);
 }
 
 static inline void axi_chan_irq_disable(struct axi_dma_chan *chan, u32 irq_mask)
@@ -1348,6 +1360,7 @@ static int dw_probe(struct platform_device *pdev)
 	chip->dev = &pdev->dev;
 	chip->dw->hdata = hdata;
 
+	spin_lock_init(&chip->lock);
 	chip->irq = platform_get_irq(pdev, 0);
 	if (chip->irq < 0)
 		return chip->irq;

drivers/dma/dw-axi-dmac/dw-axi-dmac.h

@@ -70,6 +70,7 @@ struct axi_dma_chip {
 	struct clk		*core_clk;
 	struct clk		*cfgr_clk;
 	struct dw_axi_dma	*dw;
+	spinlock_t		lock;
 };
 
 /* LLI == Linked List Item */