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base: t-head:Linux_SDK_V1.0.2
Branches Tags
t-head:lpi4a t-head:huiwei t-head:thead-sdk t-head:fix-toolchains t-head:merged-ahead t-head:update/1.4.2/gpu/dvfs t-head:ahead-new t-head:ov5693 t-head:develop t-head:master
t-head:Linux_SDK_V1.4.2 t-head:Linux_SDK_V1.3.3 t-head:Linux_SDK_V1.2.1 t-head:Linux_SDK_V1.2.0 t-head:Linux_SDK_V1.1.2 t-head:Linux_SDK_V1.0.3 t-head:Linux_SDK_V1.0.2 t-head:Linux_SDK_V0.9.5
...
compare: t-head:Linux_SDK_V1.2.0
Branches Tags
t-head:lpi4a t-head:huiwei t-head:thead-sdk t-head:fix-toolchains t-head:merged-ahead t-head:update/1.4.2/gpu/dvfs t-head:ahead-new t-head:ov5693 t-head:develop t-head:master
t-head:Linux_SDK_V1.4.2 t-head:Linux_SDK_V1.3.3 t-head:Linux_SDK_V1.2.1 t-head:Linux_SDK_V1.2.0 t-head:Linux_SDK_V1.1.2 t-head:Linux_SDK_V1.0.3 t-head:Linux_SDK_V1.0.2 t-head:Linux_SDK_V0.9.5

5 Commits
Linux_SDK_ ... Linux_SDK_

Author SHA1 Message Date
jianghai
599b048690 eth: gmac: adapt to support DMA 32-bit in skb 2023-07-30 04:42:32 +08:00
thead_admin
b269dc8fa7 apply lpi4a patches 2023-07-30 04:42:27 +08:00
Han Gao
87e5c31f94 Linux_SDK_V1.2.0 2023-07-30 04:39:12 +08:00
thead_admin
ada47f394b Linux_SDK_V1.1.2 2023-03-05 22:36:24 +08:00
thead_admin
221913b496 Linux_SDK_V1.0.3 2023-01-04 13:12:21 +08:00
117 changed files with 14244 additions and 1001 deletions
Expand all files Collapse all files

4
arch/riscv/Kconfig
View File

@@ -32,8 +32,10 @@ config RISCV
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_DMA_WRITE_COMBINE
select ARCH_HAS_DMA_MMAP_PGPROT
select ARCH_KEEP_MEMBLOCK
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
@@ -360,6 +362,8 @@ config RISCV_ISA_C
config NO_SFENCE_VMA
bool "Replace sfence.vma with CSR_SMCIR operation"
depends on !SMP
default y
config RISCV_SWIOTLB
bool "Enable SWIOTLB"

9
arch/riscv/boot/dts/thead/Makefile
View File

@@ -4,7 +4,7 @@ dtb-$(CONFIG_SOC_THEAD) += light-fm-emu.dtb light_mpw.dtb
dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-npu-fce.dtb
dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-gpu.dtb
dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsp.dtb
dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb
dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb light-a-val-audio-hdmi.dtb
dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-hdmi.dtb
dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsi0-hdmi.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val.dtb light-a-val-sv.dtb
@@ -13,7 +13,8 @@ dtb-$(CONFIG_SOC_THEAD) += light-a-val-npu-fce.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-iso7816.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-nand.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0.dtb light-a-val-dsi1.dtb light-a-val-hdmi.dtb light-a-val-dsi0-dsi1.dtb light-a-val-dsi0-hdmi.dtb light-a-val-dpi0.dtb light-a-val-dpi0-dpi1.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-tdm.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0.dtb light-a-val-dsi1.dtb light-a-val-hdmi.dtb light-a-val-dsi0-dsi1.dtb light-a-val-dsi0-hdmi.dtb light-a-val-dsi0-hdmi-audio.dtb light-a-val-dpi0.dtb light-a-val-dpi0-dpi1.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-wcn.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-gpio-keys.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-khv.dtb
@@ -27,9 +28,13 @@ dtb-$(CONFIG_SOC_THEAD) += light-a-val-full.dtb
dtb-$(CONFIG_SOC_THEAD) += light-ant-ref.dtb
dtb-$(CONFIG_SOC_THEAD) += light-ant-discrete.dtb
dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb
dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-ddr2G.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-ref.dtb light-a-ref-dsi0.dtb light-a-ref-dsi0-hdmi.dtb
dtb-$(CONFIG_SOC_THEAD) += light-b-ref.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-crash.dtb light-b-product-crash.dtb light-ant-ref-crash.dtb light-ant-discrete-crash.dtb
dtb-$(CONFIG_SOC_THEAD) += light-b-power.dtb
dtb-$(CONFIG_SOC_THEAD) += light-a-val-android.dtb
dtb-$(CONFIG_SOC_THEAD) += fire-emu.dtb fire-emu-crash.dtb
dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb

856
arch/riscv/boot/dts/thead/fire-crash.dts Normal file
View File

@@ -0,0 +1,856 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "fire.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/gpio/gpio.h>
#include "light-vi-devices.dtsi"
/ {
model = "T-HEAD fire fpga board";
compatible = "thead,fire-emu", "thead,fire";
chosen {
bootargs = "console=ttyS0,115200 earlycon";
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
status = "disabled";
led0 {
label = "SYS_STATUS";
gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */
default-state = "off";
};
};
display-subsystem {
status = "okay";
};
lcd0_backlight: pwm-backlight@0 {
status = "disabled";
compatible = "pwm-backlight";
pwms = <&pwm 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
};
light_iopmp: iopmp {
status = "disabled";
compatible = "thead,light-iopmp";
/* config#1: multiple valid regions */
iopmp_emmc: IOPMP_EMMC {
regions = <0x000000 0x100000>,
<0x100000 0x200000>;
attr = <0xFFFFFFFF>;
dummy_slave= <0x800000>;
};
/* config#2: iopmp bypass */
iopmp_sdio0: IOPMP_SDIO0 {
bypass_en;
};
/* config#3: iopmp default region set */
iopmp_sdio1: IOPMP_SDIO1 {
attr = <0xFFFFFFFF>;
is_default_region;
};
iopmp_usb0: IOPMP_USB0 {
attr = <0xFFFFFFFF>;
is_default_region;
};
iopmp_ao: IOPMP_AO {
is_default_region;
};
iopmp_aud: IOPMP_AUD {
is_default_region;
};
iopmp_chip_dbg: IOPMP_CHIP_DBG {
is_default_region;
};
iopmp_eip120i: IOPMP_EIP120I {
is_default_region;
};
iopmp_eip120ii: IOPMP_EIP120II {
is_default_region;
};
iopmp_eip120iii: IOPMP_EIP120III {
is_default_region;
};
iopmp_isp0: IOPMP_ISP0 {
is_default_region;
};
iopmp_isp1: IOPMP_ISP1 {
is_default_region;
};
iopmp_dw200: IOPMP_DW200 {
is_default_region;
};
iopmp_vipre: IOPMP_VIPRE {
is_default_region;
};
iopmp_venc: IOPMP_VENC {
is_default_region;
};
iopmp_vdec: IOPMP_VDEC {
is_default_region;
};
iopmp_g2d: IOPMP_G2D {
is_default_region;
};
iopmp0_dpu: IOPMP0_DPU {
bypass_en;
};
iopmp1_dpu: IOPMP1_DPU {
bypass_en;
};
iopmp_gpu: IOPMP_GPU {
is_default_region;
};
iopmp_gmac1: IOPMP_GMAC1 {
is_default_region;
};
iopmp_gmac2: IOPMP_GMAC2 {
is_default_region;
};
iopmp_dmac: IOPMP_DMAC {
is_default_region;
};
iopmp_tee_dmac: IOPMP_TEE_DMAC {
is_default_region;
};
iopmp_dsp0: IOPMP_DSP0 {
is_default_region;
};
iopmp_dsp1: IOPMP_DSP1 {
is_default_region;
};
};
mbox_910t_client1: mbox_910t_client1 {
compatible = "thead,light-mbox-client";
mbox-names = "902";
mboxes = <&mbox_910t 1 0>;
status = "disabled";
};
mbox_910t_client2: mbox_910t_client2 {
compatible = "thead,light-mbox-client";
mbox-names = "906";
mboxes = <&mbox_910t 2 0>;
status = "disabled";
};
lightsound: lightsound@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Light-Sound-Card";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
dummy_codec: dummy_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
status = "okay";
};
wcn_wifi: wireless-wlan {
compatible = "wlan-platdata";
clock-names = "clk_wifi";
ref-clock-frequency = <24000000>;
keep_wifi_power_on;
pinctrl-names = "default";
wifi_chip_type = "rtl8723ds";
WIFI,poweren_gpio = <&gpio2_porta 26 0>;
WIFI,reset_n = <&gpio2_porta 28 0>;
status = "disabled";
};
wcn_bt: wireless-bluetooth {
compatible = "bluetooth-platdata";
pinctrl-names = "default", "rts_gpio";
BT,power_gpio = <&gpio2_porta 29 0>;
status = "disabled";
};
gpio_keys: gpio_keys{
compatible = "gpio-keys";
pinctrl-names = "default";
status = "disabled";
key-volumedown {
label = "Volume Down Key";
linux,code = <KEY_1>;
debounce-interval = <2>;
gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
};
key-volumeup {
label = "Volume Up Key";
linux,code = <KEY_2>;
debounce-interval = <2>;
gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
};
};
aon: light-aon {
compatible = "thead,light-aon";
mbox-names = "aon";
mboxes = <&mbox_910t 1 0>;
status = "disabled";
pd: light-aon-pd {
compatible = "thead,light-aon-pd";
#power-domain-cells = <1>;
status = "disabled";
};
aon_reg_dialog: light-dialog-reg {
compatible = "thead,light-dialog-pmic";
status = "disabled";
};
c910_cpufreq {
compatible = "thead,light-mpw-cpufreq";
status = "disabled";
};
test: light-aon-test {
compatible = "thead,light-aon-test";
status = "disabled";
};
};
};
&resmem {
#address-cells = <2>;
#size-cells = <2>;
ranges;
tee_mem: memory@1a000000 {
reg = <0x0 0x1a000000 0 0x4000000>;
no-map;
};
dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/
reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/
0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/
0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */
0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/
no-map;
};
dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/
reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */
0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/
0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */
no-map;
};
vi_mem: framebuffer@0f800000 {
reg = <0x0 0x0F800000 0x0 0x05400000 /* vi_mem_pool_region[0] 84 MB (default) */
0x0 0x14C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */
0x0 0x16900000 0x0 0x03200000>; /* vi_mem_pool_region[2] 50 MB */
no-map;
};
facelib_mem: memory@22000000 {
reg = <0x0 0x22000000 0x0 0x10000000>;
no-map;
};
};
&clk {
status = "disabled";
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
codec: wm8960@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8960";
reg = <0x1a>;
wlf,shared-lrclk;
wlf,hp-cfg = <3 2 3>;
wlf,gpio-cfg = <1 3>;
};
touch@5d {
#gpio-cells = <2>;
compatible = "goodix,gt911";
status = "disabled";
reg = <0x5d>;
interrupt-parent = <&gpio1_porta>;
interrupts = <8 0>;
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
&audio_i2c0 {
clock-frequency = <100000>;
status = "disabled";
es8156_audio_codec: es8156@8 {
#sound-dai-cells = <0>;
compatible = "everest,es8156";
reg = <0x08>;
};
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
};
};
&i2c1 {
clock-frequency = <400000>;
status = "disabled";
touch1@5d {
#gpio-cells = <2>;
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio1_porta>;
interrupts = <12 0>;
irq-gpios = <&gpio1_porta 12 0>;
reset-gpios = <&gpio1_porta 11 0>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
&spi0 {
num-cs = <1>;
cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
rx-sample-delay-ns = <10>;
status = "okay";
spi_norflash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q64jwm", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
w25q,fast-read;
status = "disabled";
};
spidev@1 {
compatible = "spidev";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x1>;
spi-max-frequency = <50000000>;
};
};
&qspi0 {
num-cs = <1>;
cs-gpios = <&gpio2_porta 3 0>;
rx-sample-dly = <4>;
status = "disabled";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <100000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
reg = <0>;
partition@0 {
label = "ubi1";
reg = <0x00000000 0x08000000>;
};
};
};
&qspi1 {
num-cs = <1>;
cs-gpios = <&gpio0_porta 1 0>;
status = "disabled";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <66000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
reg = <0>;
partition@0 {
label = "ubi2";
reg = <0x00000000 0x08000000>;
};
};
};
&gmac0 {
phy-mode = "rgmii-id";
rx-clk-delay = <0x00>; /* for RGMII */
tx-clk-delay = <0x00>; /* for RGMII */
phy-handle = <&phy_88E1111_0>;
status = "okay";
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy_88E1111_0: ethernet-phy@0 {
reg = <0x1>;
};
phy_88E1111_1: ethernet-phy@1 {
reg = <0x2>;
};
};
};
&emmc {
max-frequency = <198000000>;
non-removable;
mmc-hs400-1_8v;
io_fixed_1v8;
is_emmc;
no-sdio;
no-sd;
pull_up;
bus-width = <8>;
status = "okay";
};
&sdhci0 {
max-frequency = <198000000>;
bus-width = <4>;
pull_up;
wprtn_ignore;
status = "okay";
};
&sdhci1 {
max-frequency = <100000000>;
bus-width = <4>;
pull_up;
no-sd;
no-mmc;
non-removable;
io_fixed_1v8;
post-power-on-delay-ms = <50>;
wprtn_ignore;
cap-sd-highspeed;
keep-power-in-suspend;
wakeup-source;
status = "disabled";
};
&padctrl0_apsys { /* right-pinctrl */
light-evb-padctrl0 {
/*
* Pin Configuration Node:
* Format: <pin_id mux_node config>
*/
pinctrl_uart0: uart0grp {
thead,pins = <
FM_UART0_TXD 0x0 0x72
FM_UART0_RXD 0x0 0x72
>;
};
pinctrl_spi0: spi0grp {
thead,pins = <
FM_SPI_CSN 0x3 0x20a
FM_SPI_SCLK 0x0 0x20a
FM_SPI_MISO 0x0 0x23a
FM_SPI_MOSI 0x0 0x23a
>;
};
pinctrl_qspi0: qspi0grp {
thead,pins = <
FM_QSPI0_SCLK 0x0 0x20f
FM_QSPI0_CSN0 0x3 0x20f
FM_QSPI0_CSN1 0x0 0x20f
FM_QSPI0_D0_MOSI 0x0 0x23f
FM_QSPI0_D1_MISO 0x0 0x23f
FM_QSPI0_D2_WP 0x0 0x23f
FM_QSPI0_D3_HOLD 0x0 0x23f
>;
};
pinctrl_audio_i2s0: i2s0grp {
thead,pins = <
FM_QSPI0_SCLK 0x2 0x208
FM_QSPI0_CSN0 0x2 0x238
FM_QSPI0_CSN1 0x2 0x208
FM_QSPI0_D0_MOSI 0x2 0x238
FM_QSPI0_D1_MISO 0x2 0x238
FM_QSPI0_D2_WP 0x2 0x238
FM_QSPI0_D3_HOLD 0x2 0x238
>;
};
pinctrl_pwm: pwmgrp {
thead,pins = <
FM_GPIO3_2 0x1 0x208 /* pwm0 */
FM_GPIO3_3 0x1 0x208 /* pwm1 */
>;
};
};
};
&padctrl1_apsys { /* left-pinctrl */
light-evb-padctrl1 {
/*
* Pin Configuration Node:
* Format: <pin_id mux_node config>
*/
pinctrl_uart3: uart3grp {
thead,pins = <
FM_UART3_TXD 0x0 0x72
FM_UART3_RXD 0x0 0x72
>;
};
pinctrl_uart4: uart4grp {
thead,pins = <
FM_UART4_TXD 0x0 0x72
FM_UART4_RXD 0x0 0x72
FM_UART4_CTSN 0x0 0x72
FM_UART4_RTSN 0x0 0x72
>;
};
pinctrl_qspi1: qspi1grp {
thead,pins = <
FM_QSPI1_SCLK 0x0 0x20a
FM_QSPI1_CSN0 0x3 0x20a
FM_QSPI1_D0_MOSI 0x0 0x23a
FM_QSPI1_D1_MISO 0x0 0x23a
FM_QSPI1_D2_WP 0x0 0x23a
FM_QSPI1_D3_HOLD 0x0 0x23a
>;
};
pinctrl_iso7816: iso7816grp {
thead,pins = <
FM_QSPI1_SCLK 0x1 0x208
FM_QSPI1_D0_MOSI 0x1 0x238
FM_QSPI1_D1_MISO 0x1 0x238
FM_QSPI1_D2_WP 0x1 0x238
FM_QSPI1_D3_HOLD 0x1 0x238
>;
};
};
};
&i2c2 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
&i2c3 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
pcal6408ahk_a: gpio@20 {
compatible = "nxp,pcal9554b";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
};
&isp0 {
status = "disabled";
};
&isp1 {
status = "disabled";
};
&isp_ry0 {
status = "disabled";
};
&dewarp {
status = "disabled";
};
&dec400_isp0 {
status = "disabled";
};
&dec400_isp1 {
status = "disabled";
};
&dec400_isp2 {
status = "disabled";
};
&bm_visys {
status = "disabled";
};
&bm_csi0 {
status = "disabled";
};
&bm_csi1 {
status = "disabled";
};
&bm_csi2 {
status = "disabled";
};
&vi_pre {
//vi_pre_irq_en = <1>;
status = "disabled";
};
&xtensa_dsp {
status = "disabled";
};
&xtensa_dsp0 {
status = "disabled";
memory-region = <&dsp0_mem>;
};
&xtensa_dsp1{
status = "disabled";
memory-region = <&dsp1_mem>;
};
&vvcam_flash_led0{
flash_led_name = "aw36413_aw36515";
floodlight_i2c_bus = /bits/ 8 <2>;
floodlight_en_pin = <&gpio1_porta 25 0>;
//projection_i2c_bus = /bits/ 8 <2>;
flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
status = "disabled";
};
&vvcam_sensor1 {
status = "disabled";
};
&vvcam_sensor2 {
status = "disabled";
};
&vvcam_sensor3 {
status = "disabled";
};
&vvcam_sensor4 {
status = "disabled";
};
&vvcam_sensor5 {
status = "disabled";
};
&video0{
status = "disabled";
};
&video1{
status = "disabled";
};
&video2{
status = "disabled";
};
&video3{
status = "disabled";
};
&video4{
status = "disabled";
};
&video5{
status = "disabled";
};
&video6{
status = "disabled";
};
&video7{
status = "disabled";
};
&video8{
status = "disabled";
};
&video9{
status = "disabled";
};
&video10{
status = "disabled";
};
&video11{
status = "disabled";
};
&video12{
status = "disabled";
};
&trng {
status = "disabled";
};
&eip_28 {
status = "disabled";
};
&vdec {
status = "disabled";
};
&venc {
status = "disabled";
};
&isp_venc_shake {
status = "disabled";
};
&vidmem {
status = "disabled";
};
&gpu {
status = "disabled";
};
&dpu_enc0 {
status = "disabled";
};
&dpu_enc1 {
status = "disabled";
};
&dpu {
status = "disabled";
};
&dsi0 {
status = "disabled";
};
&dhost_0 {
status = "disabled";
};
&disp1_out {
status = "disabled";
};
&hdmi_tx {
status = "disabled";
};
&lightsound {
status = "disabled";
};
&light_i2s {
status = "disabled";
};
&i2s0 {
status = "disabled";
};
&i2s1 {
status = "disabled";
};
&i2s3 {
status = "disabled";
};
&khvhost {
status = "disabled";
};

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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021 Alibaba Group Holding Limited.
*/
#include "fire-crash.dts"
&aon {
aon_reg_dialog: light-dialog-reg {
compatible = "thead,light-dialog-pmic";
status = "disabled";
dvdd_cpu_reg: appcpu_dvdd {
regulator-name = "appcpu_dvdd";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
dvddm_cpu_reg: appcpu_dvddm {
regulator-name = "appcpu_dvddm";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
};
};
&cpus {
c910_0: cpu@0 {
operating-points = <
/* kHz uV */
300000 600000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
c910_1: cpu@1 {
operating-points = <
/* kHz uV */
300000 600000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
c910_2: cpu@2 {
operating-points = <
/* kHz uV */
300000 600000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
c910_3: cpu@3 {
operating-points = <
/* kHz uV */
300000 600000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
};

107
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "fire-emu.dts"
&gpu {
status = "okay";
};
&vosys_reg {
status = "okay";
};
&display_subsystem {
status = "okay";
};
&dpu_enc0 {
status = "okay";
ports {
/* output */
port@1 {
reg = <1>;
enc0_out: endpoint {
remote-endpoint = <&dsi0_in>;
};
};
};
};
&dpu {
status = "okay";
};
&dsi0 {
status = "okay";
};
&dhost_0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi0_in: endpoint {
remote-endpoint = <&enc0_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
remote-endpoint = <&panel0_in>;
};
};
};
panel0@0 {
compatible = "hlt,hpk070h275";
reg = <0>;
port {
panel0_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
&aon {
status = "okay";
};
&mbox_910t {
status = "okay";
};
&mbox_910t_client1 {
status = "okay";
};
&mbox_910t_client2 {
status = "okay";
};
&dmac1 {
status = "okay";
};
&lightsound {
status = "okay";
};
&dmac2 {
status = "disabled";
};

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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "fire-emu.dts"
&sdhci0 {
status = "okay";
};
&usb3_drd {
status = "okay";
};
&usb {
status = "okay";
};
&spi0 {
num-cs = <1>;
cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
rx-sample-delay-ns = <10>;
status = "okay";
spi_norflash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q64jwm", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
w25q,fast-read;
status = "okay";
};
spidev@1 {
compatible = "spidev";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x1>;
spi-max-frequency = <50000000>;
};
};
&qspi0 {
num-cs = <1>;
cs-gpios = <&gpio2_porta 3 0>;
rx-sample-dly = <4>;
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <100000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
reg = <0>;
partition@0 {
label = "ubi1";
reg = <0x00000000 0x08000000>;
};
};
};
&qspi1 {
num-cs = <1>;
cs-gpios = <&gpio0_porta 1 0>;
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <66000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
reg = <0>;
partition@0 {
label = "ubi2";
reg = <0x00000000 0x08000000>;
};
};
};

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arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
*/
#include "fire-emu.dts"
&c910_1 {
status = "okay";
};
&c910_2 {
status = "okay";
};
&c910_3 {
status = "okay";
};

57
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "fire-emu.dts"
&c910_1 {
status = "okay";
};
&vi_pre {
status = "okay";
};
&dewarp {
status = "okay";
};
&xtensa_dsp {
status = "okay";
};
&xtensa_dsp0 {
status = "okay";
};
&xtensa_dsp1 {
status = "okay";
};
&vosys_reg {
status = "okay";
};
&display_subsystem {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi_tx {
status = "okay";
};
&dsi0 {
status = "okay";
};
&dpu_enc0 {
status = "okay";
};

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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "fire-emu.dts"
&c910_1 {
status = "okay";
};
&vi_pre {
status = "okay";
};
&dewarp {
status = "okay";
};
&venc {
status = "okay";
};
&vdec {
status = "okay";
};
&g2d {
status = "okay";
};
&vosys_reg {
status = "okay";
};
&display_subsystem {
status = "okay";
};
&dpu_enc0 {
status = "okay";
ports {
/* output */
port@1 {
reg = <1>;
enc0_out: endpoint {
remote-endpoint = <&dsi0_in>;
};
};
};
};
&dsi0 {
status = "okay";
};
&dhost_0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi0_in: endpoint {
remote-endpoint = <&enc0_out>;
};
};
port@1 {
reg = <1>;
dsi0_out: endpoint {
remote-endpoint = <&panel0_in>;
};
};
};
panel0@0 {
compatible = "hlt,hpk070h275";
reg = <0>;
port {
panel0_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
&dpu_enc1 {
ports {
/delete-node/ port@0;
};
};
&disp1_out {
remote-endpoint = <&hdmi_tx_in>;
};
&dpu {
status = "okay";
};
&hdmi_tx {
status = "okay";
port@0 {
/* input */
hdmi_tx_in: endpoint {
remote-endpoint = <&disp1_out>;
};
};
};

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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "fire.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/gpio/gpio.h>
#include "light-vi-devices.dtsi"
/ {
model = "T-HEAD fire fpga board";
compatible = "thead,fire-emu", "thead,fire";
chosen {
bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led0 {
label = "SYS_STATUS";
gpios = <&gpio1_porta 15 0>; /* GPIO_ACTIVE_HIGH: 0 */
default-state = "off";
};
};
lcd0_backlight: pwm-backlight@0 {
compatible = "pwm-backlight";
pwms = <&pwm 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
};
lcd1_backlight: pwm-backlight@1 {
compatible = "pwm-backlight";
pwms = <&pwm 1 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
};
light_iopmp: iopmp {
compatible = "thead,light-iopmp";
/* config#1: multiple valid regions */
iopmp_emmc: IOPMP_EMMC {
regions = <0x000000 0x100000>,
<0x100000 0x200000>;
attr = <0xFFFFFFFF>;
dummy_slave= <0x800000>;
};
/* config#2: iopmp bypass */
iopmp_sdio0: IOPMP_SDIO0 {
bypass_en;
};
/* config#3: iopmp default region set */
iopmp_sdio1: IOPMP_SDIO1 {
attr = <0xFFFFFFFF>;
is_default_region;
};
iopmp_usb0: IOPMP_USB0 {
attr = <0xFFFFFFFF>;
is_default_region;
};
iopmp_ao: IOPMP_AO {
is_default_region;
};
iopmp_aud: IOPMP_AUD {
is_default_region;
};
iopmp_chip_dbg: IOPMP_CHIP_DBG {
is_default_region;
};
iopmp_eip120i: IOPMP_EIP120I {
is_default_region;
};
iopmp_eip120ii: IOPMP_EIP120II {
is_default_region;
};
iopmp_eip120iii: IOPMP_EIP120III {
is_default_region;
};
iopmp_isp0: IOPMP_ISP0 {
is_default_region;
};
iopmp_isp1: IOPMP_ISP1 {
is_default_region;
};
iopmp_dw200: IOPMP_DW200 {
is_default_region;
};
iopmp_vipre: IOPMP_VIPRE {
is_default_region;
};
iopmp_venc: IOPMP_VENC {
is_default_region;
};
iopmp_vdec: IOPMP_VDEC {
is_default_region;
};
iopmp_g2d: IOPMP_G2D {
is_default_region;
};
iopmp0_dpu: IOPMP0_DPU {
bypass_en;
};
iopmp1_dpu: IOPMP1_DPU {
bypass_en;
};
iopmp_gpu: IOPMP_GPU {
is_default_region;
};
iopmp_gmac1: IOPMP_GMAC1 {
is_default_region;
};
iopmp_gmac2: IOPMP_GMAC2 {
is_default_region;
};
iopmp_dmac: IOPMP_DMAC {
is_default_region;
};
iopmp_tee_dmac: IOPMP_TEE_DMAC {
is_default_region;
};
iopmp_dsp0: IOPMP_DSP0 {
is_default_region;
};
iopmp_dsp1: IOPMP_DSP1 {
is_default_region;
};
};
mbox_910t_client1: mbox_910t_client1 {
compatible = "thead,light-mbox-client";
mbox-names = "902";
mboxes = <&mbox_910t 1 0>;
status = "disabled";
};
mbox_910t_client2: mbox_910t_client2 {
compatible = "thead,light-mbox-client";
mbox-names = "906";
mboxes = <&mbox_910t 2 0>;
status = "disabled";
};
lightsound: lightsound@1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Light-Sound-Card";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
dummy_codec: dummy_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
status = "okay";
};
wcn_wifi: wireless-wlan {
compatible = "wlan-platdata";
clock-names = "clk_wifi";
ref-clock-frequency = <24000000>;
keep_wifi_power_on;
pinctrl-names = "default";
wifi_chip_type = "rtl8723ds";
WIFI,poweren_gpio = <&gpio2_porta 26 0>;
WIFI,reset_n = <&gpio2_porta 28 0>;
status = "disabled";
};
wcn_bt: wireless-bluetooth {
compatible = "bluetooth-platdata";
pinctrl-names = "default", "rts_gpio";
BT,power_gpio = <&gpio2_porta 29 0>;
status = "disabled";
};
gpio_keys: gpio_keys{
compatible = "gpio-keys";
pinctrl-names = "default";
status = "disabled";
key-volumedown {
label = "Volume Down Key";
linux,code = <KEY_1>;
debounce-interval = <2>;
gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
};
key-volumeup {
label = "Volume Up Key";
linux,code = <KEY_2>;
debounce-interval = <2>;
gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
};
};
aon: light-aon {
compatible = "thead,light-aon";
mbox-names = "aon";
mboxes = <&mbox_910t 1 0>;
status = "disabled";
pd: light-aon-pd {
compatible = "thead,light-aon-pd";
#power-domain-cells = <1>;
status = "disabled";
};
aon_reg_dialog: light-dialog-reg {
compatible = "thead,light-dialog-pmic";
status = "disabled";
};
c910_cpufreq {
compatible = "thead,light-mpw-cpufreq";
status = "disabled";
};
test: light-aon-test {
compatible = "thead,light-aon-test";
status = "disabled";
};
};
};
&cmamem {
alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
};
&resmem {
#address-cells = <2>;
#size-cells = <2>;
ranges;
tee_mem: memory@1a000000 {
reg = <0x0 0x1a000000 0 0x4000000>;
no-map;
};
dsp0_mem: memory@20000000 { /**0x2000_0000~0x2040_0000 4M**/
reg = <0x0 0x20000000 0x0 0x00280000 /* DSP FW code&data section 2.5M*/
0x0 0x20280000 0x0 0x00001000 /* DSP communication area 4K*/
0x0 0x20281000 0x0 0x00007000 /* Panic/log page 28K */
0x0 0x20288000 0x0 0x00178000>; /* DSP shared memory 1.5M-32K*/
no-map;
};
dsp1_mem: memory@20400000 { /**0x2040_0000~0x2080_0000 4M**/
reg = <0x0 0x20400000 0x0 0x00280000 /* DSP FW code&data section */
0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
0x0 0x20681000 0x0 0x00007000 /* Panic/log page*/
0x0 0x20688000 0x0 0x00178000>; /* DSP shared memory */
no-map;
};
vi_mem: framebuffer@0f800000 {
reg = <0x0 0x0F800000 0x0 0x05400000 /* vi_mem_pool_region[0] 84 MB (default) */
0x0 0x14C00000 0x0 0x01D00000 /* vi_mem_pool_region[1] 29 MB */
0x0 0x16900000 0x0 0x03200000>; /* vi_mem_pool_region[2] 50 MB */
no-map;
};
facelib_mem: memory@22000000 {
reg = <0x0 0x22000000 0x0 0x10000000>;
no-map;
};
};
&clk {
status = "disabled";
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
codec: wm8960@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8960";
reg = <0x1a>;
wlf,shared-lrclk;
wlf,hp-cfg = <3 2 3>;
wlf,gpio-cfg = <1 3>;
};
touch@5d {
#gpio-cells = <2>;
compatible = "goodix,gt911";
status = "disabled";
reg = <0x5d>;
interrupt-parent = <&gpio1_porta>;
interrupts = <8 0>;
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
&audio_i2c0 {
clock-frequency = <100000>;
status = "disabled";
es8156_audio_codec: es8156@8 {
#sound-dai-cells = <0>;
compatible = "everest,es8156";
reg = <0x08>;
};
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
};
};
&i2c1 {
clock-frequency = <400000>;
status = "disabled";
touch1@5d {
#gpio-cells = <2>;
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio1_porta>;
interrupts = <12 0>;
irq-gpios = <&gpio1_porta 12 0>;
reset-gpios = <&gpio1_porta 11 0>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
&spi0 {
num-cs = <1>;
cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
rx-sample-delay-ns = <10>;
status = "okay";
spi_norflash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q64jwm", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
w25q,fast-read;
status = "disabled";
};
spidev@1 {
compatible = "spidev";
#address-cells = <0x1>;
#size-cells = <0x1>;
reg = <0x1>;
spi-max-frequency = <50000000>;
};
};
&qspi0 {
status = "disabled";
};
&qspi1 {
status = "disabled";
};
&gmac0 {
max-speed = <100>;
phy-mode = "mii";
phy-handle = <&phy_88E1111_0>;
status = "okay";
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy_88E1111_0: ethernet-phy@0 {
reg = <0x0>;
};
};
};
&emmc {
max-frequency = <198000000>;
non-removable;
/*mmc-hs400-1_8v;*/
io_fixed_1v8;
is_emmc;
no-sdio;
no-sd;
pull_up;
bus-width = <8>;
status = "okay";
};
&sdhci0 {
max-frequency = <198000000>;
bus-width = <4>;
pull_up;
wprtn_ignore;
status = "disabled";
};
&sdhci1 {
max-frequency = <100000000>;
bus-width = <4>;
pull_up;
no-sd;
no-mmc;
non-removable;
io_fixed_1v8;
post-power-on-delay-ms = <50>;
wprtn_ignore;
cap-sd-highspeed;
keep-power-in-suspend;
wakeup-source;
status = "disabled";
};
&padctrl0_apsys { /* right-pinctrl */
light-evb-padctrl0 {
/*
* Pin Configuration Node:
* Format: <pin_id mux_node config>
*/
pinctrl_uart0: uart0grp {
thead,pins = <
FM_UART0_TXD 0x0 0x72
FM_UART0_RXD 0x0 0x72
>;
};
pinctrl_spi0: spi0grp {
thead,pins = <
FM_SPI_CSN 0x3 0x20a
FM_SPI_SCLK 0x0 0x20a
FM_SPI_MISO 0x0 0x23a
FM_SPI_MOSI 0x0 0x23a
>;
};
pinctrl_qspi0: qspi0grp {
thead,pins = <
FM_QSPI0_SCLK 0x0 0x20f
FM_QSPI0_CSN0 0x3 0x20f
FM_QSPI0_CSN1 0x0 0x20f
FM_QSPI0_D0_MOSI 0x0 0x23f
FM_QSPI0_D1_MISO 0x0 0x23f
FM_QSPI0_D2_WP 0x0 0x23f
FM_QSPI0_D3_HOLD 0x0 0x23f
>;
};
pinctrl_audio_i2s0: i2s0grp {
thead,pins = <
FM_QSPI0_SCLK 0x2 0x208
FM_QSPI0_CSN0 0x2 0x238
FM_QSPI0_CSN1 0x2 0x208
FM_QSPI0_D0_MOSI 0x2 0x238
FM_QSPI0_D1_MISO 0x2 0x238
FM_QSPI0_D2_WP 0x2 0x238
FM_QSPI0_D3_HOLD 0x2 0x238
>;
};
pinctrl_pwm: pwmgrp {
thead,pins = <
FM_GPIO3_2 0x1 0x208 /* pwm0 */
FM_GPIO3_3 0x1 0x208 /* pwm1 */
>;
};
};
};
&padctrl1_apsys { /* left-pinctrl */
light-evb-padctrl1 {
/*
* Pin Configuration Node:
* Format: <pin_id mux_node config>
*/
pinctrl_uart3: uart3grp {
thead,pins = <
FM_UART3_TXD 0x0 0x72
FM_UART3_RXD 0x0 0x72
>;
};
pinctrl_uart4: uart4grp {
thead,pins = <
FM_UART4_TXD 0x0 0x72
FM_UART4_RXD 0x0 0x72
FM_UART4_CTSN 0x0 0x72
FM_UART4_RTSN 0x0 0x72
>;
};
pinctrl_qspi1: qspi1grp {
thead,pins = <
FM_QSPI1_SCLK 0x0 0x20a
FM_QSPI1_CSN0 0x3 0x20a
FM_QSPI1_D0_MOSI 0x0 0x23a
FM_QSPI1_D1_MISO 0x0 0x23a
FM_QSPI1_D2_WP 0x0 0x23a
FM_QSPI1_D3_HOLD 0x0 0x23a
>;
};
pinctrl_iso7816: iso7816grp {
thead,pins = <
FM_QSPI1_SCLK 0x1 0x208
FM_QSPI1_D0_MOSI 0x1 0x238
FM_QSPI1_D1_MISO 0x1 0x238
FM_QSPI1_D2_WP 0x1 0x238
FM_QSPI1_D3_HOLD 0x1 0x238
>;
};
};
};
&i2c2 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
&i2c3 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
pagesize = <32>;
};
pcal6408ahk_a: gpio@20 {
compatible = "nxp,pcal9554b";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
};
&isp0 {
status = "disabled";
};
&isp1 {
status = "disabled";
};
&isp_ry0 {
status = "disabled";
};
&dewarp {
status = "disabled";
};
&dec400_isp0 {
status = "disabled";
};
&dec400_isp1 {
status = "disabled";
};
&dec400_isp2 {
status = "disabled";
};
&bm_visys {
status = "disabled";
};
&bm_csi0 {
status = "disabled";
};
&bm_csi1 {
status = "disabled";
};
&bm_csi2 {
status = "disabled";
};
&vi_pre {
//vi_pre_irq_en = <1>;
status = "disabled";
};
&xtensa_dsp {
status = "disabled";
};
&xtensa_dsp0 {
status = "disabled";
memory-region = <&dsp0_mem>;
};
&xtensa_dsp1{
status = "disabled";
memory-region = <&dsp1_mem>;
};
&vvcam_flash_led0{
flash_led_name = "aw36413_aw36515";
floodlight_i2c_bus = /bits/ 8 <2>;
floodlight_en_pin = <&gpio1_porta 25 0>;
//projection_i2c_bus = /bits/ 8 <2>;
flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
status = "disabled";
};
&trng {
status = "disabled";
};
&eip_28 {
status = "okay";
};
&vdec {
status = "disabled";
};
&venc {
status = "disabled";
};
&isp_venc_shake {
status = "disabled";
};
&vidmem {
status = "okay";
memory-region = <&vi_mem>;
};
&gpu {
status = "disabled";
};
&cpus {
c910_0: cpu@0 {
operating-points = <
/* kHz uV */
300000 650000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
c910_1: cpu@1 {
status = "disabled";
operating-points = <
/* kHz uV */
300000 650000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
c910_2: cpu@2 {
status = "disabled";
operating-points = <
/* kHz uV */
300000 650000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
c910_3: cpu@3 {
status = "disabled";
operating-points = <
/* kHz uV */
300000 650000
800000 700000
1500000 800000
1848000 1000000
>;
light,dvddm-operating-points = <
/* kHz uV */
300000 800000
800000 800000
1500000 800000
1848000 1000000
>;
};
};
&thermal_zones {
cpu-thermal-zone {
status = "disabled";
};
};
&dummy_clock_apb {
clock-frequency = <50000000>;
};
&uart0 {
clocks = <&dummy_clock_apb>;
};
&uart1 {
clocks = <&dummy_clock_apb>;
};
&uart2 {
clocks = <&dummy_clock_apb>;
};
&uart3 {
clocks = <&dummy_clock_apb>;
};
&uart4 {
clocks = <&dummy_clock_apb>;
};
&uart5 {
clocks = <&dummy_clock_apb>;
};
&usb3_drd {
status = "disabled";
};
&usb {
status = "disabled";
};
&dspsys_reg {
status = "disabled";
};
&audio_ioctrl {
status = "disabled";
};
&audio_cpr {
status = "disabled";
};
&timer0 {
clock-frequency = <50000000>;
};
&timer1 {
clock-frequency = <50000000>;
};
&timer2 {
clock-frequency = <50000000>;
};
&timer3 {
clock-frequency = <50000000>;
};
&g2d {
status = "disabled";
};
&vosys_reg {
status = "disabled";
};
&dmac2 {
status = "disabled";
};
&sdhci1 {
status = "disabled";
};
&pvt {
status = "disabled";
};
&audio_i2c0 {
status = "disabled";
};
&csia_reg {
status = "disabled";
};
&visys_clk_gate { /* VI_SYSREG_R */
status = "disabled";
};
&vpsys_clk_gate { /* VP_SYSREG_R */
status = "disabled";
};
&vosys_clk_gate { /* VO_SYSREG_R */
status = "disabled";
};
&dspsys_clk_gate {
status = "disabled";
};
&watchdog0 {
status = "disabled";
};
&watchdog1 {
status = "disabled";
};

2091
arch/riscv/boot/dts/thead/fire.dtsi Normal file
View File

File diff suppressed because it is too large Load Diff

20
arch/riscv/boot/dts/thead/light-a-product.dts
View File

@@ -535,7 +535,7 @@
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
AVDD28-supply = <&reg_tp_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
@@ -552,7 +552,7 @@
irq-gpios = <&gpio1_porta 12 0>;
reset-gpios = <&gpio1_porta 11 0>;
AVDD28-supply = <&reg_tp1_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
@@ -973,8 +973,8 @@
&video0{
status = "okay";
piplane0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -998,8 +998,8 @@
&video1{
status = "okay";
piplane0 { // VSE0
pipline_id = <0>;
channel0 { // VSE0
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -1023,8 +1023,8 @@
&video2{
status = "okay";
piplane0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -1044,8 +1044,8 @@
path_type = "DSP_PATH_VIPRE_ODD";
};
};
piplane1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";

58
arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts Normal file
View File

@@ -0,0 +1,58 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "light-a-val-audio.dts"
/ {
display-subsystem {
status = "okay";
};
};
&dpu_enc1 {
ports {
/delete-node/ port@0;
};
};
&disp1_out {
remote-endpoint = <&hdmi_tx_in>;
};
&dpu {
status = "okay";
};
&hdmi_tx {
status = "okay";
port@0 {
/* input */
hdmi_tx_in: endpoint {
remote-endpoint = <&disp1_out>;
};
};
};
&lightsound {
status = "okay";
simple-audio-card,dai-link@2 { /* I2S - HDMI */
reg = <2>;
format = "i2s";
cpu {
sound-dai = <&light_i2s 1>;
};
codec {
sound-dai = <&dummy_codec 2>;
};
};
};
&light_i2s {
status = "okay";
};

125
arch/riscv/boot/dts/thead/light-a-val-audio-tdm.dts Normal file
View File

@@ -0,0 +1,125 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021 Alibaba Group Holding Limited.
*/
#include "light-a-val.dts"
&tdm_slot1 {
status = "okay";
};
&tdm_slot2 {
status = "okay";
};
&tdm_slot3 {
status = "okay";
};
&tdm_slot4 {
status = "okay";
};
&tdm_slot5 {
status = "okay";
};
&tdm_slot6 {
status = "okay";
};
&tdm_slot7 {
status = "okay";
};
&tdm_slot8 {
status = "okay";
};
&audio_i2c0 {
clock-frequency = <100000>;
status = "okay";
es7210_adc2: es7210@42 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x42>;
work-mode = "ES7210_TDM_1LRCK_DSPB";
channels-max = <8>;
sound-name-prefix = "ES7210_ADC2";
};
es7210_adc3: es7210@43 {
#sound-dai-cells = <0>;
compatible = "MicArray_1";
reg = <0x43>;
work-mode = "ES7210_TDM_1LRCK_DSPB";
channels-max = <8>;
sound-name-prefix = "ES7210_ADC3";
status = "okay";
};
};
&lightsound {
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87519 VO",
"AW87519 IN", "ES8156 ROUT";
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
reg = <0>;
format = "i2s";
cpu {
sound-dai = <&i2s0 0>;
};
codec {
sound-dai = <&es8156_audio_codec>;
};
};
simple-audio-card,dai-link@1 { /* TDM - AUDIO SYS CODEC 7210*/
reg = <1>;
format = "dsp_b";
cpu@0 {
sound-dai = <&tdm_slot1 0>;
};
cpu@1 {
sound-dai = <&tdm_slot2 1>;
};
cpu@2 {
sound-dai = <&tdm_slot3 2>;
};
cpu@3 {
sound-dai = <&tdm_slot4 3>;
};
cpu@4 {
sound-dai = <&tdm_slot5 4>;
};
cpu@5 {
sound-dai = <&tdm_slot6 5>;
};
cpu@6 {
sound-dai = <&tdm_slot7 6>;
};
cpu@7 {
sound-dai = <&tdm_slot8 7>;
};
codec {
sound-dai = <&es7210_adc2>;
};
};
};
&light_i2s {
status = "okay";
};
&i2s0 {
status = "okay";
};
&i2s3 {
status = "okay";
};

20
arch/riscv/boot/dts/thead/light-a-val-audio.dts
View File

@@ -10,9 +10,25 @@
compatible = "thead,light-val-audio", "thead,light";
};
&lightsound {
status = "okay";
&audio_i2c0 {
clock-frequency = <100000>;
status = "okay";
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
};
&lightsound {
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87519 VO",
"AW87519 IN", "ES8156 ROUT";
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
reg = <0>;
format = "i2s";

2
arch/riscv/boot/dts/thead/light-a-val-ddr1G.dts
View File

@@ -11,7 +11,7 @@
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x40000000>;
reg = <0x0 0x200000 0x0 0x3fe00000>;
};
};

2
arch/riscv/boot/dts/thead/light-a-val-ddr2G.dts
View File

@@ -11,7 +11,7 @@
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x80000000>;
reg = <0x0 0x200000 0x0 0x7fe00000>;
};
};

71
arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-audio.dts Normal file
View File

@@ -0,0 +1,71 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "light-a-val-dsi0-hdmi.dts"
&audio_i2c0 {
status = "okay";
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
};
&lightsound {
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87519 VO",
"AW87519 IN", "ES8156 ROUT";
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
reg = <0>;
format = "i2s";
cpu {
sound-dai = <&i2s0 0>;
};
codec {
sound-dai = <&es8156_audio_codec>;
};
};
simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
reg = <1>;
format = "i2s";
cpu {
sound-dai = <&i2s3 0>;
};
codec {
sound-dai = <&es7210_audio_codec>;
};
};
simple-audio-card,dai-link@2 { /* I2S - HDMI */
reg = <2>;
format = "i2s";
cpu {
sound-dai = <&light_i2s 1>;
};
codec {
sound-dai = <&dummy_codec>;
};
};
};
&light_i2s {
status = "okay";
};
&i2s0 {
status = "okay";
};
&i2s3 {
status = "okay";
};

28
arch/riscv/boot/dts/thead/light-a-val-full.dts
View File

@@ -93,9 +93,25 @@
};
};
&lightsound {
&audio_i2c0 {
clock-frequency = <100000>;
status = "okay";
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
};
&lightsound {
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87519 VO",
"AW87519 IN", "ES8156 ROUT";
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
reg = <0>;
format = "i2s";
@@ -106,7 +122,7 @@
sound-dai = <&es8156_audio_codec>;
};
};
simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
reg = <1>;
format = "i2s";
@@ -118,19 +134,19 @@
};
};
};
&light_i2s {
status = "okay";
};
&i2s0 {
status = "okay";
};
&i2s3 {
status = "okay";
};
&qspi0 {
status = "okay";
};

12
arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi.dts
View File

@@ -38,6 +38,18 @@
};
};
&audio_i2c0 {
clock-frequency = <100000>;
status = "okay";
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
};
&lightsound {
status = "okay";

2
arch/riscv/boot/dts/thead/light-a-val-sec.dts
View File

@@ -5,7 +5,7 @@
/dts-v1/;
#include "light-a-val-dsi0-hdmi.dts"
#include "light-a-val-dsi0-hdmi-audio.dts"
&light_iopmp {

119
arch/riscv/boot/dts/thead/light-a-val.dts
View File

@@ -193,8 +193,9 @@
};
dummy_codec: dummy_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
compatible = "thead,light-dummy-pcm";
sound-name-prefix = "DUMMY";
status = "okay";
};
@@ -548,7 +549,7 @@
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
AVDD28-supply = <&reg_tp_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
@@ -561,12 +562,27 @@
#sound-dai-cells = <0>;
compatible = "everest,es8156";
reg = <0x08>;
sound-name-prefix = "ES8156";
};
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
audio_aw87519_pa: amp@58 {
compatible = "awinic,aw87519_pa";
reg = <0x58>;
reset-gpio = <&pcal6408ahk_b 3 0x1>;
sound-name-prefix = "AW87519";
status = "okay";
};
};
&audio_i2c1 {
clock-frequency = <100000>;
status = "okay";
pcal6408ahk_b: gpio@20 {
compatible = "nxp,pcal9554b";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
};
@@ -582,7 +598,7 @@
irq-gpios = <&gpio1_porta 12 0>;
reset-gpios = <&gpio1_porta 11 0>;
AVDD28-supply = <&reg_tp1_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
};
@@ -848,8 +864,27 @@
pinctrl_volume: volume_grp {
thead,pins = <
FM_CPU_JTG_TDI 0x3 0x208
FM_CPU_JTG_TDO 0x3 0x208
FM_CPU_JTG_TDI 0x3 0x238
FM_CPU_JTG_TDO 0x3 0x238
>;
};
};
};
&padctrl_audiosys {
status = "okay";
light-audio-padctrl {
/*
* Pin Configuration Node:
* Format: <pin_id mux_node config>
*/
pinctrl_audio_i2c1: audio_i2c1_grp {
thead,pins = <
FM_AUDIO_IO_PA6 0x2 0x008
FM_AUDIO_IO_PA7 0x2 0x008
>;
};
};
@@ -967,6 +1002,7 @@
&vvcam_sensor0 {
sensor_name = "SC2310";
sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
sensor_regulator_timing_us = <70 50 20>;
sensor_rst = <&gpio1_porta 16 0>;
sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
@@ -1016,6 +1052,9 @@
DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
i2c_bus = /bits/ 8 <4>;
i2c_reg_width = /bits/ 8 <2>;
i2c_data_width = /bits/ 8 <1>;
i2c_addr = /bits/ 8 <0x30>;
status = "okay";
};
@@ -1038,6 +1077,7 @@
&vvcam_sensor5 {
sensor_name = "OV12870";
sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
sensor_regulator_timing_us = <100 50 0>;
sensor_rst = <&gpio1_porta 16 0>;
sensor_pdn_delay_us = <60>; //powerdown pin / shutdown pin actived till I2C ready
@@ -1054,6 +1094,7 @@
&vvcam_sensor6 {
sensor_name = "GC02M1B";
sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
sensor_regulator_voltage_uV = <1800000 1675000 2800000>;
sensor_regulator_timing_us = <70 50 20>;
sensor_rst = <&gpio1_porta 16 0>;
sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
@@ -1069,7 +1110,7 @@
&video0{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1096,7 +1137,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1123,7 +1164,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1155,7 +1196,7 @@
&video1{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1188,7 +1229,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1221,7 +1262,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1258,7 +1299,7 @@
&video2{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1285,7 +1326,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1312,7 +1353,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1343,7 +1384,7 @@
&video3{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1376,7 +1417,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1409,7 +1450,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1446,7 +1487,7 @@
&video4{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1495,7 +1536,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1544,7 +1585,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1597,7 +1638,7 @@
&video5{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1652,7 +1693,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1707,7 +1748,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1766,7 +1807,7 @@
&video6{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; //sc132gs
@@ -1784,7 +1825,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; //sc132gs
@@ -1805,7 +1846,7 @@
};
&video7{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1860,7 +1901,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1915,7 +1956,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1975,7 +2016,7 @@
&video8{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -2005,7 +2046,7 @@
};
&video9{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; //sc132gs
@@ -2026,7 +2067,7 @@
&video10{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -2047,8 +2088,8 @@
};
&video11{
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2073,7 +2114,7 @@
};
&video12{ // TUNINGTOOL
pipline0 { // CSI2
channel0 { // CSI2
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310

79
arch/riscv/boot/dts/thead/light-ant-discrete.dts
View File

@@ -15,7 +15,7 @@
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x80000000>;
reg = <0x0 0x200000 0x0 0x7fe00000>;
};
chosen {
@@ -194,9 +194,10 @@
};
dummy_codec: dummy_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
compatible = "thead,light-dummy-pcm";
status = "okay";
sound-name-prefix = "DUMMY";
};
reg_vref_1v8: regulator-adc-verf {
@@ -571,7 +572,7 @@
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
AVDD28-supply = <&reg_tp_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
@@ -585,18 +586,21 @@
#sound-dai-cells = <0>;
compatible = "everest,es8156";
reg = <0x08>;
sound-name-prefix = "ES8156";
};
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
audio_aw87519_pa@58 {
audio_aw87519_pa: amp@58 {
compatible = "awinic,aw87519_pa";
reg = <0x58>;
reset-gpio = <&ao_gpio4_porta 9 0x1>;
sound-name-prefix = "AW87519";
status = "okay";
};
};
@@ -1034,7 +1038,7 @@
&video0{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1061,7 +1065,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1088,7 +1092,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1120,7 +1124,7 @@
&video1{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1153,7 +1157,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1186,7 +1190,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1223,7 +1227,7 @@
&video2{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1243,7 +1247,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1263,7 +1267,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1287,7 +1291,7 @@
&video3{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1313,7 +1317,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1339,7 +1343,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1369,7 +1373,7 @@
&video4{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1411,7 +1415,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1453,7 +1457,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1499,7 +1503,7 @@
&video5{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1547,7 +1551,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1595,7 +1599,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1647,7 +1651,7 @@
&video6{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <1>; // vivcam1 sc132gs
@@ -1665,7 +1669,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <1>; //vivcam1 sc132gs
@@ -1687,7 +1691,7 @@
};
&video7{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1742,7 +1746,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1797,7 +1801,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1857,7 +1861,7 @@
&video8{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1887,7 +1891,7 @@
};
&video9{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <1>; //vivcam1 sc132gs
@@ -1908,7 +1912,7 @@
&video10{ // TUNINGTOOL
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1929,8 +1933,8 @@
};
&video11{
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -1955,7 +1959,7 @@
};
&video12{ // TUNINGTOOL
pipline0 { // CSI2
channel0 { // CSI2
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -2091,6 +2095,11 @@
&lightsound {
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87519 VO",
"AW87519 IN", "ES8156 ROUT";
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
reg = <0>;
format = "i2s";
@@ -2118,7 +2127,7 @@
sound-dai = <&light_i2s 1>;
};
codec {
sound-dai = <&dummy_codec 2>;
sound-dai = <&dummy_codec>;
};
};
};

119
arch/riscv/boot/dts/thead/light-ant-ref.dts
View File

@@ -15,7 +15,7 @@
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x80000000>;
reg = <0x0 0x200000 0x0 0x7fe00000>;
};
chosen {
@@ -194,9 +194,10 @@
};
dummy_codec: dummy_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
compatible = "thead,light-dummy-pcm";
status = "okay";
sound-name-prefix = "DUMMY";
};
reg_vref_1v8: regulator-adc-verf {
@@ -238,7 +239,8 @@
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&pinctrl_volume>;
pinctrl-0 = <&pinctrl_volume_up
&pinctrl_volume_down>;
pinctrl-names = "default";
key-volumedown {
label = "Volume Down Key";
@@ -578,7 +580,7 @@
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
AVDD28-supply = <&reg_tp_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
@@ -592,18 +594,21 @@
#sound-dai-cells = <0>;
compatible = "everest,es8156";
reg = <0x08>;
sound-name-prefix = "ES8156";
};
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
audio_aw87519_pa@58 {
audio_aw87519_pa: amp@58 {
compatible = "awinic,aw87519_pa";
reg = <0x58>;
reset-gpio = <&ao_gpio4_porta 9 0x1>;
sound-name-prefix = "AW87519";
status = "okay";
};
};
@@ -797,6 +802,12 @@
FM_GPIO3_2 0x1 0x208 /* pwm0 */
>;
};
pinctrl_volume_up: volume_up_grp {
thead,pins = <
FM_GPIO2_25 0x0 0x238
>;
};
};
};
@@ -842,9 +853,9 @@
>;
};
pinctrl_volume: volume_grp {
pinctrl_volume_down: volume_down_grp {
thead,pins = <
FM_CLK_OUT_2 0x3 0x208
FM_CLK_OUT_2 0x3 0x238
>;
};
};
@@ -1008,6 +1019,7 @@
&vvcam_sensor2 {
sensor_name = "GC5035";
sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
sensor_regulator_timing_us = <100 50 0>;
sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
sensor_rst = <&gpio1_porta 29 0>;
@@ -1025,6 +1037,7 @@
&vvcam_sensor3 {
sensor_name = "GC02M1B";
sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
sensor_regulator_voltage_uV = <1800000 1800000 2800000>;
sensor_regulator_timing_us = <100 50 0>;
sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
sensor_rst = <&gpio1_porta 29 0>;
@@ -1041,7 +1054,7 @@
&video0{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1071,7 +1084,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1101,7 +1114,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1136,7 +1149,7 @@
&video1{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1173,7 +1186,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1210,7 +1223,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1251,7 +1264,7 @@
&video2{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1274,7 +1287,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1297,7 +1310,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1324,7 +1337,7 @@
&video3{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1353,7 +1366,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1382,7 +1395,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1415,7 +1428,7 @@
&video4{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1460,7 +1473,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1505,7 +1518,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1554,7 +1567,7 @@
&video5{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1605,7 +1618,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1656,7 +1669,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //vivcam0 sc2310
@@ -1711,7 +1724,7 @@
&video6{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <1>; // vivcam1 sc132gs
@@ -1729,7 +1742,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <1>; //vivcam1 sc132gs
@@ -1751,7 +1764,7 @@
};
&video7{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1810,7 +1823,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1869,7 +1882,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1933,7 +1946,7 @@
&video8{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1966,7 +1979,7 @@
};
&video9{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <1>; //vivcam1 sc132gs
@@ -1987,7 +2000,7 @@
&video10{ // TUNINGTOOL
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -2011,8 +2024,8 @@
};
&video11{
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2037,7 +2050,7 @@
};
&video12{ // TUNINGTOOL
pipline0 { // CSI2
channel0 { // CSI2
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -2046,25 +2059,18 @@
path_type = "SENSOR_1920X1088_30FPS_RAW12_LINER";
skip_init = <1>;
};
sensor1 {
subdev_name = "vivcam";
idx = <6>; //gc02m1b
csi_idx = <1>; //<1>=CSI2_B
mode_idx = <0>;
path_type = "SENSOR_1600x1200_RAW10_LINER";
skip_init = <1>;
dma {
path_type = "VIPRE_CSI1_ISP0";
};
};
dma {
path_type = "VIPRE_CSI1_ISP0";
};
};
&video13{
status = "okay";
//vi_mem_pool_region = <0>;
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2095,8 +2101,8 @@
&video14{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[0]
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2128,8 +2134,8 @@
&video15{
status = "okay";
//vi_mem_pool_region = <0>;
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2270,6 +2276,11 @@
&lightsound {
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87519 VO",
"AW87519 IN", "ES8156 ROUT";
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
reg = <0>;
format = "i2s";
@@ -2297,7 +2308,7 @@
sound-dai = <&light_i2s 1>;
};
codec {
sound-dai = <&dummy_codec 2>;
sound-dai = <&dummy_codec>;
};
};
};

2
arch/riscv/boot/dts/thead/light-b-product-ddr1G.dts
View File

@@ -11,7 +11,7 @@
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x40000000>;
reg = <0x0 0x200000 0x0 0x3fe00000>;
};
};

94
arch/riscv/boot/dts/thead/light-b-product.dts
View File

@@ -15,7 +15,7 @@
memory@0 {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x80000000>;
reg = <0x0 0x200000 0x0 0x7fe00000>;
};
chosen {
@@ -194,9 +194,10 @@
};
dummy_codec: dummy_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
compatible = "thead,light-dummy-pcm";
status = "okay";
sound-name-prefix = "DUMMY";
};
reg_vref_1v8: regulator-adc-verf {
@@ -591,7 +592,7 @@
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
AVDD28-supply = <&reg_tp_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
@@ -605,18 +606,21 @@
#sound-dai-cells = <0>;
compatible = "everest,es8156";
reg = <0x08>;
sound-name-prefix = "ES8156";
};
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
audio_aw87519_pa@58 {
audio_aw87519_pa: amp@58 {
compatible = "awinic,aw87519_pa";
reg = <0x58>;
reset-gpio = <&ao_gpio4_porta 9 0x1>;
sound-name-prefix = "AW87519";
status = "okay";
};
};
@@ -880,8 +884,8 @@
pinctrl_volume: volume_grp {
thead,pins = <
FM_AOGPIO_11 0x0 0x208
FM_AOGPIO_10 0x3 0x208
FM_AOGPIO_11 0x0 0x238
FM_AOGPIO_10 0x3 0x238
>;
};
};
@@ -1054,6 +1058,9 @@
DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
i2c_bus = /bits/ 8 <4>;
i2c_reg_width = /bits/ 8 <2>;
i2c_data_width = /bits/ 8 <1>;
i2c_addr = /bits/ 8 <0x30>;
status = "okay";
};
@@ -1107,7 +1114,7 @@
&video0{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1134,7 +1141,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1161,7 +1168,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1193,7 +1200,7 @@
&video1{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1226,7 +1233,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1259,7 +1266,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1296,7 +1303,7 @@
&video2{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1323,7 +1330,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1350,7 +1357,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1381,7 +1388,7 @@
&video3{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1414,7 +1421,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1447,7 +1454,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1484,7 +1491,7 @@
&video4{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1533,7 +1540,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1582,7 +1589,7 @@
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1635,7 +1642,7 @@
&video5{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1690,7 +1697,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1745,7 +1752,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -1804,7 +1811,7 @@
&video6{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; //sc132gs
@@ -1822,7 +1829,7 @@
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; //sc132gs
@@ -1844,7 +1851,7 @@
};
&video7{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1899,7 +1906,7 @@
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -1954,7 +1961,7 @@
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -2014,7 +2021,7 @@
&video8{
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -2044,7 +2051,7 @@
};
&video9{
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; //sc132gs
@@ -2065,7 +2072,7 @@
&video10{ // TUNINGTOOL
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <2>; //<2>=vivcam2 : gc5035
@@ -2086,8 +2093,8 @@
};
&video11{
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2112,7 +2119,7 @@
};
&video12{ // TUNINGTOOL
pipline0 { // CSI2
channel0 { // CSI2
sensor0 {
subdev_name = "vivcam";
idx = <0>; //sc2310
@@ -2135,8 +2142,8 @@
&video14{
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[0]
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2168,8 +2175,8 @@
&video15{
status = "okay";
//vi_mem_pool_region = <0>;
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -2310,6 +2317,11 @@
&lightsound {
status = "okay";
simple-audio-card,widgets = "Speaker", "Speaker";
simple-audio-card,routing =
"Speaker", "AW87519 VO",
"AW87519 IN", "ES8156 ROUT";
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
reg = <0>;
format = "i2s";
@@ -2337,7 +2349,7 @@
sound-dai = <&light_i2s 1>;
};
codec {
sound-dai = <&dummy_codec 2>;
sound-dai = <&dummy_codec>;
};
};
};

2368
arch/riscv/boot/dts/thead/light-beagle-ref.dts Normal file
View File

File diff suppressed because it is too large Load Diff

135
arch/riscv/boot/dts/thead/light-beagle.dts
View File

@@ -5,7 +5,7 @@
/dts-v1/;
#include "light-ant-ref.dts"
#include "light-beagle-ref.dts"
&vvcam_sensor4 { // beagle board J5 CSI0 connector
sensor_name = "IMX219";
@@ -30,13 +30,13 @@
};
/*
sensor imx219 mounted on beagle board J4
sensor imx219 mounted on beagle board J4 CSI1 (=light CSI2X2_A+CSI2X2_B / CSI2X2_A only)
video0: sensor-vipre-isp0
video1: sensor-vipre-isp0-dw
video7: sensor-vipre-isp0-dsp1-ry-dw
video10: tuningtool
sensor imx219 mounted on beagle board J5
sensor imx219 mounted on beagle board J5 CSI0 (=light CSI2)
video2: sensor-vipre-isp1
video3: sensor-vipre-isp1-dw
video4: sensor-vipre-isp1-dsp0-ry
@@ -44,11 +44,108 @@ video5: sensor-vipre-isp1-dsp0-ry-dw
video12: tuningtool
*/
&video0{
vi_mem_pool_region = <0xFFFFFFFF>; // vi_mem: framebuffer, region[2]
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <5>; // imx219
csi_idx = <2>; //<2>=CSI2X2_A
mode_idx = <0>;
path_type = "SENSOR_1080P_RAW10_LINER";
};
sensor1 {
subdev_name = "vivcam";
idx = <0xff>; // invalid
csi_idx = <0xff>;
path_type = "SENSOR_VGA_RAW10_LINER";
};
dma {
subdev_name = "vipre";
idx = <0>;
path_type = "VIPRE_CSI2_ISP0";
};
isp {
subdev_name = "isp";
idx = <0>;
path_type = "ISP_MI_PATH_MP";
output {
max_width = <1920>;
max_height = <1088>;
bit_per_pixel = <16>;
frame_count = <3>;
};
};
};
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <5>; // imx219
csi_idx = <2>; //<2>=CSI2X2_A
mode_idx = <0>;
path_type = "SENSOR_1080P_RAW10_LINER";
};
sensor1 {
subdev_name = "vivcam";
idx = <0xff>; // invalid
csi_idx = <0xff>;
path_type = "SENSOR_VGA_RAW10_LINER";
};
dma {
subdev_name = "vipre";
idx = <0>;
path_type = "VIPRE_CSI2_ISP0";
};
isp {
subdev_name = "isp";
idx = <0>;
path_type = "ISP_MI_PATH_SP";
output {
max_width = <1920>;
max_height = <1088>;
bit_per_pixel = <16>;
frame_count = <3>;
};
};
};
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <5>; // imx219
csi_idx = <2>; //<2>=CSI2X2_A
mode_idx = <0>;
path_type = "SENSOR_1080P_RAW10_LINER";
};
sensor1 {
subdev_name = "vivcam";
idx = <0xff>; // invalid
csi_idx = <0xff>;
path_type = "SENSOR_VGA_RAW10_LINER";
};
dma {
subdev_name = "vipre";
idx = <0>;
path_type = "VIPRE_CSI2_ISP0";
};
isp {
subdev_name = "isp";
idx = <0>;
path_type = "ISP_MI_PATH_SP2_BP";
output {
max_width = <1920>;
max_height = <1088>;
bit_per_pixel = <16>;
frame_count = <3>;
};
};
};
};
&video2 {
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -80,8 +177,8 @@ video12: tuningtool
};
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -113,8 +210,8 @@ video12: tuningtool
};
};
};
pipline2 {
pipline_id = <2>;
channel2 {
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -150,7 +247,7 @@ video12: tuningtool
&video3{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -187,7 +284,7 @@ video12: tuningtool
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -224,7 +321,7 @@ video12: tuningtool
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -265,7 +362,7 @@ video12: tuningtool
&video4{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -318,7 +415,7 @@ video12: tuningtool
};
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -371,7 +468,7 @@ video12: tuningtool
};
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -428,7 +525,7 @@ video12: tuningtool
&video5{
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
pipline0 {
channel0 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -487,7 +584,7 @@ video12: tuningtool
dw_dst_depth = <2>;
};
};
pipline1 {
channel1 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -546,7 +643,7 @@ video12: tuningtool
dw_dst_depth = <2>;
};
};
pipline2 {
channel2 {
sensor0 {
subdev_name = "vivcam";
idx = <4>; // imx219
@@ -605,4 +702,4 @@ video12: tuningtool
dw_dst_depth = <2>;
};
};
};
};

14
arch/riscv/boot/dts/thead/light-crash.dts
View File

@@ -191,8 +191,9 @@
};
dummy_codec: dummy_codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
compatible = "thead,light-dummy-pcm";
sound-name-prefix = "DUMMY";
status = "okay";
};
@@ -327,7 +328,7 @@
irq-gpios = <&gpio1_porta 8 0>;
reset-gpios = <&gpio1_porta 7 0>;
AVDD28-supply = <&reg_tp_pwr_en>;
touchscreen-size-x = <720>;
touchscreen-size-x = <800>;
touchscreen-size-y = <1280>;
};
@@ -341,18 +342,21 @@
#sound-dai-cells = <0>;
compatible = "everest,es8156";
reg = <0x08>;
sound-name-prefix = "ES8156";
};
es7210_audio_codec: es7210@40 {
#sound-dai-cells = <0>;
compatible = "MicArray_0";
reg = <0x40>;
sound-name-prefix = "ES7210";
};
audio_aw87519_pa@58 {
audio_aw87519_pa: amp@58 {
compatible = "awinic,aw87519_pa";
reg = <0x58>;
reset-gpio = <&ao_gpio4_porta 9 0x1>;
sound-name-prefix = "AW87519";
status = "okay";
};
};
@@ -456,7 +460,7 @@
rx-clk-delay = <0x00>; /* for RGMII */
tx-clk-delay = <0x00>; /* for RGMII */
phy-handle = <&phy_88E1111_1>;
status = "disabled";
status = "okay";
};
&emmc {

2
arch/riscv/boot/dts/thead/light-emu.dtsi
View File

@@ -309,7 +309,7 @@
entry-cnt = <4>;
control-reg = <0xff 0xff015004>;
control-val = <0x1c>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
};
clint0: clint@ffdc000000 {

11
arch/riscv/boot/dts/thead/light-evb.dtsi
View File

@@ -318,7 +318,7 @@
entry-cnt = <4>;
control-reg = <0xff 0xff015004>;
control-val = <0x1c>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
};
clint0: clint@ffdc000000 {
@@ -1193,8 +1193,7 @@
emmc: sdhci@ffe7080000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7080000 0x0 0x10000
0xff 0xef014060 0x0 0x4>;
reg = <0xff 0xe7080000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <62>;
interrupt-names = "sdhciirq";
@@ -1204,8 +1203,7 @@
sdhci0: sd@ffe7090000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7090000 0x0 0x10000
0xff 0xef014064 0x0 0x4>;
reg = <0xff 0xe7090000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <64>;
interrupt-names = "sdhci0irq";
@@ -1215,8 +1213,7 @@
sdhci1: sd@ffe70a0000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe70a0000 0x0 0x10000
0xff 0xef014064 0x0 0x4>;
reg = <0xff 0xe70a0000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <71>;
interrupt-names = "sdhci1irq";

4
arch/riscv/boot/dts/thead/light-fm-emu.dts
View File

@@ -451,8 +451,8 @@
&video{
status = "okay";
piplane0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";

20
arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts Normal file
View File

@@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2022 Alibaba Group Holding Limited.
*/
#include "light-lpi4a.dts"
/ {
model = "T-HEAD Light Lichee Pi 4A configuration for 2GB DDR board";
compatible = "thead,light-val", "thead,light-lpi4a-ddr2G", "thead,light";
memory@0 {
device_type = "memory";
reg = <0x0 0x200000 0x0 0x7fe00000>;
};
};
&cmamem {
alloc-ranges = <0 0x64000000 0 0x14000000>; // [0x6400_0000 ~ 0x7800_0000]
};

1589
arch/riscv/boot/dts/thead/light-lpi4a-ref.dts Normal file
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File diff suppressed because it is too large Load Diff

13
arch/riscv/boot/dts/thead/light-lpi4a-sec.dts Normal file
View File

@@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021 Alibaba Group Holding Limited.
*/
/dts-v1/;
#include "light-lpi4a.dts"
&light_iopmp {
status = "disabled";
};

20
arch/riscv/boot/dts/thead/light-lpi4a.dts Normal file
View File

@@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2022 Alibaba Group Holding Limited.
*/
#include "light-lpi4a-ref.dts"
/ {
model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
memory@0 {
device_type = "memory";
reg = <0x0 0x200000 0x1 0xffe00000>;
};
};
&cmamem {
alloc-ranges = <0x1 0xe4000000 0 0x14000000>; // [0x1E400_0000 ~ 0x1F800_0000]
};

108
arch/riscv/boot/dts/thead/light-vi-devices.dtsi
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@@ -5,8 +5,8 @@
&video0{
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -31,8 +31,8 @@
path_type = "ISP_MI_PATH_MP";
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -57,8 +57,8 @@
path_type = "ISP_MI_PATH_SP";
};
};
pipline2 {
pipline_id = <2>;
channel2 {
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -87,8 +87,8 @@
&video1{
status = "okay";
pipline0 { // VSE0
pipline_id = <0>;
channel0 { // VSE0
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -118,8 +118,8 @@
path_type = "DW_DWE_VSE0";
};
};
pipline1 { // VSE1
pipline_id = <1>;
channel1 { // VSE1
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -149,8 +149,8 @@
path_type = "DW_DWE_VSE1";
};
};
pipline2 { // VSE2
pipline_id = <2>;
channel2 { // VSE2
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -184,8 +184,8 @@
&video2 {
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -210,8 +210,8 @@
path_type = "ISP_MI_PATH_MP";
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -236,8 +236,8 @@
path_type = "ISP_MI_PATH_SP";
};
};
pipline2 {
pipline_id = <2>;
channel2 {
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -267,8 +267,8 @@
&video3 {
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -298,8 +298,8 @@
path_type = "DW_DWE_VSE0";
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -330,8 +330,8 @@
path_type = "DW_DWE_VSE1";
};
};
pipline2 {
pipline_id = <2>;
channel2 {
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -365,8 +365,8 @@
&video4 {
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -402,8 +402,8 @@
path_type = "ISP_RY_MI_PATH_MP";
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -438,8 +438,8 @@
path_type = "ISP_RY_MI_PATH_SP";
};
};
pipline2 {
pipline_id = <2>;
channel2 {
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -478,8 +478,8 @@
&video5 {
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -520,8 +520,8 @@
path_type = "DW_DWE_VSE0";
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -561,8 +561,8 @@
path_type = "DW_DWE_VSE1";
};
};
pipline2 {
pipline_id = <2>;
channel2 {
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -607,8 +607,8 @@
&video6 {
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -633,8 +633,8 @@
path_type = "DSP_PATH_VIPRE_ODD";
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -664,8 +664,8 @@
&video7{
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -706,8 +706,8 @@
};
};
pipline1 {
pipline_id = <1>;
channel1 {
channel_id = <1>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -747,8 +747,8 @@
path_type = "DW_DWE_VSE1";
};
};
pipline2 {
pipline_id = <2>;
channel2 {
channel_id = <2>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -793,8 +793,8 @@
&video8{
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -824,8 +824,8 @@
&video9 { //IR debug
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -857,7 +857,7 @@
&video10{ // TUNING TOOL
status = "okay";
pipline0 { // CSI2X2_B
channel0 { // CSI2X2_B
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -884,8 +884,8 @@
&video11{
status = "okay";
pipline0 {
pipline_id = <0>;
channel0 {
channel_id = <0>;
status = "okay";
sensor0 {
subdev_name = "vivcam";
@@ -915,7 +915,7 @@
&video12{ // TUNING TOOL
status = "okay";
pipline0 { // CSI2
channel0 { // CSI2
status = "okay";
sensor0 {
subdev_name = "vivcam";

331
arch/riscv/boot/dts/thead/light.dtsi
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@@ -6,6 +6,7 @@
#include <dt-bindings/pinctrl/light-fm-left-pinctrl.h>
#include <dt-bindings/pinctrl/light-fm-right-pinctrl.h>
#include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
#include <dt-bindings/pinctrl/light-fm-audio-pinctrl.h>
#include <dt-bindings/clock/light-fm-ap-clock.h>
#include <dt-bindings/clock/light-vpsys.h>
#include <dt-bindings/clock/light-vosys.h>
@@ -34,6 +35,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
audio_i2c0 = &audio_i2c0;
audio_i2c1 = &audio_i2c1;
mmc0 = &emmc;
mmc1 = &sdhci0;
serial0 = &uart0;
@@ -93,6 +95,12 @@
};
};
aon_iram: aon-iram@ffffef8000 {
compatible = "syscon";
reg = <0xff 0xffef8000 0x0 0x10000>;
};
thermal-zones {
cpu-thermal-zone {
polling-delay-passive = <250>;
@@ -382,7 +390,7 @@
entry-cnt = <4>;
control-reg = <0xff 0xff015004>;
control-val = <0x1c>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
};
clint0: clint@ffdc000000 {
@@ -854,6 +862,12 @@
status = "okay";
};
padctrl_audiosys: padctrl-audiosys@ffcb01d000 {
compatible = "thead,light-fm-audio-pinctrl";
reg = <0xff 0xcb01d000 0x0 0x1000>;
status = "disabled";
};
timer4: timer@ffffc33000 {
compatible = "snps,dw-apb-timer";
reg = <0xff 0xffc33000 0x0 0x14>;
@@ -1300,7 +1314,7 @@
65536 65536 65536 65536
65536 65536 65536 65536
65536 65536 65536 65536>;
snps,priority = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
snps,priority = <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; // <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
snps,dma-masters = <1>;
snps,data-width = <4>;
snps,axi-max-burst-len = <16>;
@@ -1353,8 +1367,7 @@
emmc: sdhci@ffe7080000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7080000 0x0 0x10000
0xff 0xef014060 0x0 0x4>;
reg = <0xff 0xe7080000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <62>;
interrupt-names = "sdhciirq";
@@ -1364,8 +1377,7 @@
sdhci0: sd@ffe7090000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7090000 0x0 0x10000
0xff 0xef014064 0x0 0x4>;
reg = <0xff 0xe7090000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <64>;
interrupt-names = "sdhci0irq";
@@ -1375,8 +1387,7 @@
sdhci1: sd@ffe70a0000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe70a0000 0x0 0x10000
0xff 0xef014064 0x0 0x4>;
reg = <0xff 0xe70a0000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <71>;
interrupt-names = "sdhci1irq";
@@ -1534,6 +1545,26 @@
status = "disabled";
};
i2s2: audio_i2s2@0xffcb016000 {
#sound-dai-cells = <1>;
compatible = "light,light-i2s";
reg = <0xff 0xcb016000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,sel = "i2s2";
interrupt-parent = <&intc>;
interrupts = <176>;
dmas = <&dmac2 13>, <&dmac2 12>;
dma-names = "tx", "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
i2s3: audio_i2s3@0xffcb017000 {
#sound-dai-cells = <1>;
compatible = "light,light-i2s";
@@ -1552,6 +1583,174 @@
status = "disabled";
};
tdm_slot1: audio_tdm_slot1@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <1>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 28>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
tdm_slot2: audio_tdm_slot2@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <2>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 29>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
tdm_slot3: audio_tdm_slot3@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <3>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 30>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
tdm_slot4: audio_tdm_slot4@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <4>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 31>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
tdm_slot5: audio_tdm_slot5@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <5>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 32>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
tdm_slot6: audio_tdm_slot6@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <6>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 33>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
tdm_slot7: audio_tdm_slot7@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <7>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 34>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
tdm_slot8: audio_tdm_slot8@0xffcb012000 {
#sound-dai-cells = <1>;
compatible = "light,light-tdm";
reg = <0xff 0xcb012000 0x0 0x1000>;
audio-pin-regmap = <&audio_ioctrl>;
audio-cpr-regmap = <&audio_cpr>;
pinctrl-names = "default";
light,mode = "i2s-master";
light,tdm_slots = <8>;
light,tdm_slot_num = <8>;
interrupt-parent = <&intc>;
interrupts = <178>;
dmas = <&dmac2 35>;
dma-names = "rx";
light,dma_maxburst = <4>;
#dma-cells = <1>;
clocks = <&dummy_clock_apb>;
clock-names = "pclk";
status = "disabled";
};
pvt: pvt@fffff4e000 {
compatible = "moortec,mr75203";
reg = <0xff 0xfff4e000 0x0 0x80>,
@@ -1684,6 +1883,27 @@
#size-cells = <0>;
};
audio_i2c1: i2c@0xffcb01b000 {
compatible = "snps,designware-i2c";
reg = <0xff 0xcb01b000 0x0 0x1000>;
interrupt-parent = <&intc>;
interrupts = <183>;
clocks = <&dummy_clock_apb>;
clock-frequency = <100000>;
ss_hcnt = /bits/ 16 <0x82>;
ss_lcnt = /bits/ 16 <0x78>;
fs_hcnt = /bits/ 16 <0x37>;
fs_lcnt = /bits/ 16 <0x42>;
fp_hcnt = /bits/ 16 <0x14>;
fp_lcnt = /bits/ 16 <0x1a>;
hs_hcnt = /bits/ 16 <0x5>;
hs_lcnt = /bits/ 16 <0x15>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
isp0: isp@ffe4100000 {
compatible = "thead,light-isp";
reg = <0xff 0xe4100000 0x0 0x10000>;
@@ -1761,65 +1981,58 @@
};
bm_csi0: csi@ffe4000000{ //CSI2
compatible = "thead,light-bm-csi";
reg = < 0xff 0xe4000000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <128>;
dphyglueiftester = <0x180>;
sysreg_mipi_csi_ctrl = <0x140>;
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
clock-names = "pclk", "pixclk", "cfg_clk0", "cfg_clk1", "cfg_clk2";
phy_name = "CSI_4LANE";
status = "disabled";
compatible = "thead,light-bm-csi";
reg = < 0xff 0xe4000000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <128>;
dphyglueiftester = <0x180>;
sysreg_mipi_csi_ctrl = <0x140>;
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
clock-names = "pclk", "pixclk", "cfg_clk";
phy_name = "CSI_4LANE";
status = "disabled";
};
csia_reg: visys-reg@ffe4020000 {
csia_reg: visys-reg@ffe4020000 {
compatible = "thead,light-visys-reg", "syscon";
reg = < 0xff 0xe4020000 0x0 0x10000>;
status = "okay";
reg = < 0xff 0xe4020000 0x0 0x10000>;
status = "okay";
};
bm_csi1: csi@ffe4010000{ //CSI2X2_B
compatible = "thead,light-bm-csi";
reg = < 0xff 0xe4010000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
sysreg_mipi_csi_ctrl = <0x148>;
visys-regmap = <&visys_reg>;
csia-regmap = <&csia_reg>;
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
clock-names = "pclk", "pixclk", "cfg_clk0", "cfg_clk1", "cfg_clk2";
phy_name = "CSI_B";
status = "disabled";
compatible = "thead,light-bm-csi";
reg = < 0xff 0xe4010000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
sysreg_mipi_csi_ctrl = <0x148>;
visys-regmap = <&visys_reg>;
csia-regmap = <&csia_reg>;
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
clock-names = "pclk", "pixclk", "cfg_clk";
phy_name = "CSI_B";
status = "disabled";
};
bm_csi2: csi@ffe4020000{ //CSI2X2_A
compatible = "thead,light-bm-csi";
reg = < 0xff 0xe4020000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <127>;
dphyglueiftester = <0x184>;
sysreg_mipi_csi_ctrl = <0x144>;
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
clock-names = "pclk", "pixclk", "cfg_clk0", "cfg_clk1", "cfg_clk2";
phy_name = "CSI_A";
status = "disabled";
compatible = "thead,light-bm-csi";
reg = < 0xff 0xe4020000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <127>;
dphyglueiftester = <0x184>;
sysreg_mipi_csi_ctrl = <0x144>;
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
clock-names = "pclk", "pixclk", "cfg_clk";
phy_name = "CSI_A";
status = "disabled";
};
bm_isp0: bm_isp@ffe4100000 {
compatible = "thead,light-bm-isp";
reg = <0xff 0xe4100000 0x0 0x10000>;
@@ -2119,6 +2332,12 @@
interrupts = <215>; /* TEE INT SRC_7 */
};
light_event: light-event {
compatible = "thead,light-event";
aon-iram-regmap = <&aon_iram>;
status = "okay";
};
visys_clk_gate: visys-clk-gate { /* VI_SYSREG_R */
compatible = "thead,visys-gate-controller";
visys-regmap = <&visys_reg>;

1
arch/riscv/configs/defconfig
View File

@@ -183,6 +183,5 @@ CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_RCU_TRACE is not set

310
arch/riscv/configs/fire_defconfig Normal file
View File

@@ -0,0 +1,310 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_BUG is not set
CONFIG_BPF_SYSCALL=y
CONFIG_PERF_EVENTS=y
CONFIG_FORCE_MAX_ZONEORDER=15
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_THEAD=y
CONFIG_SMP=y
CONFIG_VECTOR=y
CONFIG_VECTOR_0_7=y
CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_CMA=y
CONFIG_CMA_DEBUGFS=y
CONFIG_CMA_AREAS=16
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_BRIDGE=y
CONFIG_VSOCKETS=y
# CONFIG_VSOCKETS_LOOPBACK is not set
CONFIG_VIRTIO_VSOCKETS=y
CONFIG_NETLINK_DIAG=y
CONFIG_BT=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=y
CONFIG_BT_HIDP=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_RTL3WIRE=y
CONFIG_CFG80211=y
CONFIG_RFKILL=y
CONFIG_NET_9P=y
CONFIG_NET_9P_VIRTIO=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_BLOCK=y
CONFIG_MTD_SLRAM=m
CONFIG_MTD_PHRAM=m
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_VIRTIO_BLK=y
CONFIG_LIGHT_DSMART_CARD=y
CONFIG_EEPROM_AT24=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_VIRTIO_NET=y
CONFIG_MACB=y
CONFIG_STMMAC_ETH=y
CONFIG_DWMAC_LIGHT=y
CONFIG_MICROSEMI_PHY=y
CONFIG_REALTEK_PHY=y
CONFIG_MARVELL_PHY=y
CONFIG_USB_USBNET=m
# CONFIG_USB_NET_AX8817X is not set
# CONFIG_USB_NET_AX88179_178A is not set
# CONFIG_USB_NET_NET1080 is not set
CONFIG_RTL8723DS=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_GOODIX=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=6
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_SPI=y
CONFIG_SPI_DW_QUAD=y
CONFIG_SPI_DESIGNWARE=y
CONFIG_SPI_DW_MMIO=y
CONFIG_SPI_SPIDEV=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_PINCTRL=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_POWER_SUPPLY=y
CONFIG_SENSORS_MR75203=y
CONFIG_THERMAL=y
CONFIG_CPU_THERMAL=y
CONFIG_THERMAL_EMULATION=y
CONFIG_WATCHDOG=y
CONFIG_DW_WATCHDOG=y
CONFIG_LIGHT_PMIC_WATCHDOG=y
CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
#CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
CONFIG_WATCHDOG_OPEN_TIMEOUT=32
CONFIG_ABX500_CORE=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=y
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_VIDEO_ASPEED=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA18250 is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MSI001 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2063 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_MEDIA_TUNER_XC4000 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
# CONFIG_MEDIA_TUNER_FC0011 is not set
# CONFIG_MEDIA_TUNER_FC0012 is not set
# CONFIG_MEDIA_TUNER_FC0013 is not set
# CONFIG_MEDIA_TUNER_TDA18212 is not set
# CONFIG_MEDIA_TUNER_E4000 is not set
# CONFIG_MEDIA_TUNER_FC2580 is not set
# CONFIG_MEDIA_TUNER_M88RS6000T is not set
# CONFIG_MEDIA_TUNER_TUA9001 is not set
# CONFIG_MEDIA_TUNER_SI2157 is not set
# CONFIG_MEDIA_TUNER_IT913X is not set
# CONFIG_MEDIA_TUNER_R820T is not set
# CONFIG_MEDIA_TUNER_MXL301RF is not set
# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
CONFIG_DRM=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
CONFIG_DRM_PANEL_ILI9881D=y
CONFIG_DRM_VERISILICON=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_SOC=y
CONFIG_SND_SOC_THEAD_LIGHT=y
CONFIG_SND_SOC_AW87519=y
CONFIG_SND_SOC_BT_SCO=y
CONFIG_SND_SOC_ES7210=y
CONFIG_SND_SOC_ES8156=y
CONFIG_SND_SOC_WM8960=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_SND_AUDIO_GRAPH_CARD=y
CONFIG_UHID=y
CONFIG_HID_PID=y
CONFIG_USB_HIDDEV=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_DWC3=m
# CONFIG_USB_DWC3_OF_SIMPLE is not set
CONFIG_USB_GADGET=y
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_ACC=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_ETH_EEM=y
CONFIG_USB_G_NCM=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_USB_ROLE_SWITCH=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_DWCMSHC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_XGENE=y
CONFIG_DMADEVICES=y
CONFIG_DW_AXI_DMAC=y
CONFIG_DMATEST=y
CONFIG_SW_SYNC=y
CONFIG_UDMABUF=y
CONFIG_DMABUF_SELFTESTS=m
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_KHV_MMIO=y
CONFIG_VHOST_NET=y
CONFIG_VHOST_VSOCK=y
CONFIG_CLK_LIGHT_FM=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_LIGHT=y
CONFIG_HWSPINLOCK_LIGHT_TEST=m
CONFIG_MAILBOX=y
CONFIG_IIO=y
CONFIG_IIO_SW_DEVICE=y
CONFIG_PWM=y
CONFIG_PWM_LIGHT=y
CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_OPTEE_BENCHMARK=y
CONFIG_LIGHT_GPU_VIV=m
# CONFIG_LIGHT_NET is not set
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_HUGETLBFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_ROOT_NFS=y
CONFIG_9P_FS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_DH=y
CONFIG_CRYPTO_CURVE25519=y
CONFIG_CRYPTO_CHACHA20POLY1305=y
CONFIG_CRYPTO_OFB=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=y
CONFIG_CRYPTO_SM3=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_DMA_CMA=y
CONFIG_DMA_PERNUMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=32
CONFIG_PRINTK_TIME=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_RCU_TRACE is not set
CONFIG_OVERLAY_FS=y
CONFIG_LOCKUP_DETECTOR=y
CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
# CONFIG_SUSPEND is not set
# CONFIG_PM_SLEEP is not set

311
arch/riscv/configs/fire_emu_defconfig Normal file
View File

@@ -0,0 +1,311 @@
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_BUG is not set
CONFIG_BPF_SYSCALL=y
CONFIG_PERF_EVENTS=y
CONFIG_FORCE_MAX_ZONEORDER=15
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_THEAD=y
CONFIG_SOC_THEAD_LIGHT_EMU=y
CONFIG_SMP=y
CONFIG_VECTOR=y
CONFIG_VECTOR_0_7=y
CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_CMA=y
CONFIG_CMA_DEBUGFS=y
CONFIG_CMA_AREAS=16
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_BRIDGE=y
CONFIG_VSOCKETS=y
# CONFIG_VSOCKETS_LOOPBACK is not set
CONFIG_VIRTIO_VSOCKETS=y
CONFIG_NETLINK_DIAG=y
CONFIG_BT=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=y
CONFIG_BT_HIDP=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_RTL3WIRE=y
CONFIG_CFG80211=y
CONFIG_RFKILL=y
CONFIG_NET_9P=y
CONFIG_NET_9P_VIRTIO=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_BLOCK=y
CONFIG_MTD_SLRAM=m
CONFIG_MTD_PHRAM=m
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_VIRTIO_BLK=y
CONFIG_LIGHT_DSMART_CARD=y
CONFIG_EEPROM_AT24=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_VIRTIO_NET=y
CONFIG_MACB=y
CONFIG_STMMAC_ETH=y
CONFIG_DWMAC_LIGHT=y
CONFIG_MICROSEMI_PHY=y
CONFIG_REALTEK_PHY=y
CONFIG_MARVELL_PHY=y
CONFIG_USB_USBNET=m
# CONFIG_USB_NET_AX8817X is not set
# CONFIG_USB_NET_AX88179_178A is not set
# CONFIG_USB_NET_NET1080 is not set
CONFIG_RTL8723DS=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_GOODIX=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=6
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_SPI=y
CONFIG_SPI_DW_QUAD=y
CONFIG_SPI_DESIGNWARE=y
CONFIG_SPI_DW_MMIO=y
CONFIG_SPI_SPIDEV=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_PINCTRL=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_POWER_SUPPLY=y
CONFIG_SENSORS_MR75203=y
CONFIG_THERMAL=y
CONFIG_CPU_THERMAL=y
CONFIG_THERMAL_EMULATION=y
CONFIG_WATCHDOG=y
CONFIG_DW_WATCHDOG=y
CONFIG_LIGHT_PMIC_WATCHDOG=y
CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
#CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
CONFIG_WATCHDOG_OPEN_TIMEOUT=32
CONFIG_ABX500_CORE=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=y
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_VIDEO_ASPEED=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA18250 is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MSI001 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2063 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_MEDIA_TUNER_XC4000 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
# CONFIG_MEDIA_TUNER_FC0011 is not set
# CONFIG_MEDIA_TUNER_FC0012 is not set
# CONFIG_MEDIA_TUNER_FC0013 is not set
# CONFIG_MEDIA_TUNER_TDA18212 is not set
# CONFIG_MEDIA_TUNER_E4000 is not set
# CONFIG_MEDIA_TUNER_FC2580 is not set
# CONFIG_MEDIA_TUNER_M88RS6000T is not set
# CONFIG_MEDIA_TUNER_TUA9001 is not set
# CONFIG_MEDIA_TUNER_SI2157 is not set
# CONFIG_MEDIA_TUNER_IT913X is not set
# CONFIG_MEDIA_TUNER_R820T is not set
# CONFIG_MEDIA_TUNER_MXL301RF is not set
# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
CONFIG_DRM=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
CONFIG_DRM_PANEL_ILI9881D=y
CONFIG_DRM_VERISILICON=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_SOC=y
CONFIG_SND_SOC_THEAD_LIGHT=y
CONFIG_SND_SOC_AW87519=y
CONFIG_SND_SOC_BT_SCO=y
CONFIG_SND_SOC_ES7210=y
CONFIG_SND_SOC_ES8156=y
CONFIG_SND_SOC_WM8960=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_SND_AUDIO_GRAPH_CARD=y
CONFIG_UHID=y
CONFIG_HID_PID=y
CONFIG_USB_HIDDEV=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_DWC3=m
# CONFIG_USB_DWC3_OF_SIMPLE is not set
CONFIG_USB_GADGET=y
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_ACC=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_ETH_EEM=y
CONFIG_USB_G_NCM=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_USB_ROLE_SWITCH=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_DWCMSHC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_XGENE=y
CONFIG_DMADEVICES=y
CONFIG_DW_AXI_DMAC=y
CONFIG_DMATEST=y
CONFIG_SW_SYNC=y
CONFIG_UDMABUF=y
CONFIG_DMABUF_SELFTESTS=m
CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_KHV_MMIO=y
CONFIG_VHOST_NET=y
CONFIG_VHOST_VSOCK=y
CONFIG_CLK_LIGHT_FM=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_LIGHT=y
CONFIG_HWSPINLOCK_LIGHT_TEST=m
CONFIG_MAILBOX=y
CONFIG_IIO=y
CONFIG_IIO_SW_DEVICE=y
CONFIG_PWM=y
CONFIG_PWM_LIGHT=y
CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_OPTEE_BENCHMARK=y
CONFIG_LIGHT_GPU_VIV=m
# CONFIG_LIGHT_NET is not set
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_HUGETLBFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_ROOT_NFS=y
CONFIG_9P_FS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_DH=y
CONFIG_CRYPTO_CURVE25519=y
CONFIG_CRYPTO_CHACHA20POLY1305=y
CONFIG_CRYPTO_OFB=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=y
CONFIG_CRYPTO_SM3=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_DMA_CMA=y
CONFIG_DMA_PERNUMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=32
CONFIG_PRINTK_TIME=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_RCU_TRACE is not set
CONFIG_OVERLAY_FS=y
CONFIG_LOCKUP_DETECTOR=y
CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
# CONFIG_SUSPEND is not set
# CONFIG_PM_SLEEP is not set

1
arch/riscv/configs/ice_defconfig
View File

@@ -180,6 +180,5 @@ CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_RCU_TRACE is not set

1
arch/riscv/configs/light-android_defconfig
View File

@@ -561,7 +561,6 @@ CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_FS=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
CONFIG_SCHEDSTATS=y
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_GCC_PLUGINS is not set

19
arch/riscv/configs/light_defconfig
View File

@@ -3,6 +3,10 @@ CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
@@ -20,6 +24,7 @@ CONFIG_SOC_THEAD=y
CONFIG_SMP=y
CONFIG_VECTOR=y
CONFIG_VECTOR_0_7=y
CONFIG_THEAD_ISA=y
CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y
CONFIG_CPU_IDLE=y
@@ -91,6 +96,7 @@ CONFIG_TUN=y
CONFIG_VIRTIO_NET=y
CONFIG_MACB=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_RX_ZERO_COPY=y
CONFIG_DWMAC_LIGHT=y
CONFIG_MICROSEMI_PHY=y
CONFIG_REALTEK_PHY=y
@@ -197,6 +203,8 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_DRM=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
CONFIG_DRM_PANEL_ILI9881D=y
CONFIG_DRM_PANEL_HX8394=y
CONFIG_DRM_VERISILICON=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
@@ -263,6 +271,7 @@ CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_LIGHT=y
CONFIG_HWSPINLOCK_LIGHT_TEST=m
CONFIG_MAILBOX=y
CONFIG_EXTCON=y
CONFIG_IIO=y
CONFIG_IIO_SW_DEVICE=y
CONFIG_PWM=y
@@ -296,13 +305,21 @@ CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_DH=y
CONFIG_CRYPTO_CURVE25519=y
CONFIG_CRYPTO_CHACHA20POLY1305=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_OFB=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SHA3=y
CONFIG_CRYPTO_SM3=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_SM4=y
CONFIG_CRYPTO_USER=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_USER_API_RNG=y
# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
CONFIG_CRYPTO_USER_API_AEAD=y
CONFIG_DMA_CMA=y
CONFIG_DMA_PERNUMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=32
@@ -312,13 +329,13 @@ CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_RCU_TRACE is not set
CONFIG_OVERLAY_FS=y
CONFIG_LOCKUP_DETECTOR=y
CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_INFO=y
CONFIG_PM=y
# CONFIG_SUSPEND is not set
# CONFIG_PM_SLEEP is not set

1
arch/riscv/configs/light_emu_defconfig
View File

@@ -189,7 +189,6 @@ CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_RCU_TRACE is not set
CONFIG_FORCE_MAX_ZONEORDER=15

1
arch/riscv/configs/vector_0_7_defconfig
View File

@@ -184,6 +184,5 @@ CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_RCU_TRACE is not set

2
arch/riscv/include/asm/Kbuild
View File

@@ -3,5 +3,7 @@ generic-y += early_ioremap.h
generic-y += extable.h
generic-y += flat.h
generic-y += kvm_para.h
generic-y += qrwlock.h
generic-y += qrwlock_types.h
generic-y += user.h
generic-y += vmlinux.lds.h

5
arch/riscv/include/asm/csr.h
View File

@@ -143,11 +143,6 @@
#define CSR_VTYPE 0xc21
#define CSR_VLENB 0xc22
#define CSR_SMIR 0x9c0
#define CSR_SMEL 0x9c1
#define CSR_SMEH 0x9c2
#define CSR_SMCIR 0x9c3
#ifdef CONFIG_RISCV_M_MODE
# define CSR_STATUS CSR_MSTATUS
# define CSR_IE CSR_MIE

167
arch/riscv/include/asm/spinlock.h
View File

@@ -1,135 +1,92 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2015 Regents of the University of California
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM_RISCV_SPINLOCK_H
#define _ASM_RISCV_SPINLOCK_H
#include <linux/kernel.h>
#include <asm/current.h>
#include <asm/fence.h>
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Simple spin lock operations. These provide no fairness guarantees.
* 'Generic' ticket-lock implementation.
*
* It relies on atomic_fetch_add() having well defined forward progress
* guarantees under contention. If your architecture cannot provide this, stick
* to a test-and-set lock.
*
* It also relies on atomic_fetch_add() being safe vs smp_store_release() on a
* sub-word of the value. This is generally true for anything LL/SC although
* you'd be hard pressed to find anything useful in architecture specifications
* about this. If your architecture cannot do this you might be better off with
* a test-and-set.
*
* It further assumes atomic_*_release() + atomic_*_acquire() is RCpc and hence
* uses atomic_fetch_add() which is RCsc to create an RCsc hot path, along with
* a full fence after the spin to upgrade the otherwise-RCpc
* atomic_cond_read_acquire().
*
* The implementation uses smp_cond_load_acquire() to spin, so if the
* architecture has WFE like instructions to sleep instead of poll for word
* modifications be sure to implement that (see ARM64 for example).
*
*/
/* FIXME: Replace this with a ticket lock, like MIPS. */
#ifndef __ASM_GENERIC_SPINLOCK_H
#define __ASM_GENERIC_SPINLOCK_H
#define arch_spin_is_locked(x) (READ_ONCE((x)->lock) != 0)
#include <linux/atomic.h>
#include <asm/spinlock_types.h>
static inline void arch_spin_unlock(arch_spinlock_t *lock)
static __always_inline void arch_spin_lock(arch_spinlock_t *lock)
{
smp_store_release(&lock->lock, 0);
u32 val = atomic_fetch_add(1<<16, lock);
u16 ticket = val >> 16;
if (ticket == (u16)val)
return;
/*
* atomic_cond_read_acquire() is RCpc, but rather than defining a
* custom cond_read_rcsc() here we just emit a full fence. We only
* need the prior reads before subsequent writes ordering from
* smb_mb(), but as atomic_cond_read_acquire() just emits reads and we
* have no outstanding writes due to the atomic_fetch_add() the extra
* orderings are free.
*/
atomic_cond_read_acquire(lock, ticket == (u16)VAL);
smp_mb();
}
static inline int arch_spin_trylock(arch_spinlock_t *lock)
static __always_inline bool arch_spin_trylock(arch_spinlock_t *lock)
{
int tmp = 1, busy;
u32 old = atomic_read(lock);
__asm__ __volatile__ (
" amoswap.w %0, %2, %1\n"
RISCV_ACQUIRE_BARRIER
: "=r" (busy), "+A" (lock->lock)
: "r" (tmp)
: "memory");
if ((old >> 16) != (old & 0xffff))
return false;
return !busy;
return atomic_try_cmpxchg(lock, &old, old + (1<<16)); /* SC, for RCsc */
}
static inline void arch_spin_lock(arch_spinlock_t *lock)
static __always_inline void arch_spin_unlock(arch_spinlock_t *lock)
{
while (1) {
if (arch_spin_is_locked(lock))
continue;
u16 *ptr = (u16 *)lock + IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
u32 val = atomic_read(lock);
if (arch_spin_trylock(lock))
break;
}
smp_store_release(ptr, (u16)val + 1);
}
/***********************************************************/
static inline void arch_read_lock(arch_rwlock_t *lock)
static __always_inline int arch_spin_is_locked(arch_spinlock_t *lock)
{
int tmp;
u32 val = atomic_read(lock);
__asm__ __volatile__(
"1: lr.w %1, %0\n"
" bltz %1, 1b\n"
" addi %1, %1, 1\n"
" sc.w %1, %1, %0\n"
" bnez %1, 1b\n"
RISCV_ACQUIRE_BARRIER
: "+A" (lock->lock), "=&r" (tmp)
:: "memory");
return ((val >> 16) != (val & 0xffff));
}
static inline void arch_write_lock(arch_rwlock_t *lock)
static __always_inline int arch_spin_is_contended(arch_spinlock_t *lock)
{
int tmp;
u32 val = atomic_read(lock);
__asm__ __volatile__(
"1: lr.w %1, %0\n"
" bnez %1, 1b\n"
" li %1, -1\n"
" sc.w %1, %1, %0\n"
" bnez %1, 1b\n"
RISCV_ACQUIRE_BARRIER
: "+A" (lock->lock), "=&r" (tmp)
:: "memory");
return (s16)((val >> 16) - (val & 0xffff)) > 1;
}
static inline int arch_read_trylock(arch_rwlock_t *lock)
static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
{
int busy;
__asm__ __volatile__(
"1: lr.w %1, %0\n"
" bltz %1, 1f\n"
" addi %1, %1, 1\n"
" sc.w %1, %1, %0\n"
" bnez %1, 1b\n"
RISCV_ACQUIRE_BARRIER
"1:\n"
: "+A" (lock->lock), "=&r" (busy)
:: "memory");
return !busy;
return !arch_spin_is_locked(&lock);
}
static inline int arch_write_trylock(arch_rwlock_t *lock)
{
int busy;
#include <asm/qrwlock.h>
__asm__ __volatile__(
"1: lr.w %1, %0\n"
" bnez %1, 1f\n"
" li %1, -1\n"
" sc.w %1, %1, %0\n"
" bnez %1, 1b\n"
RISCV_ACQUIRE_BARRIER
"1:\n"
: "+A" (lock->lock), "=&r" (busy)
:: "memory");
return !busy;
}
static inline void arch_read_unlock(arch_rwlock_t *lock)
{
__asm__ __volatile__(
RISCV_RELEASE_BARRIER
" amoadd.w x0, %1, %0\n"
: "+A" (lock->lock)
: "r" (-1)
: "memory");
}
static inline void arch_write_unlock(arch_rwlock_t *lock)
{
smp_store_release(&lock->lock, 0);
}
#endif /* _ASM_RISCV_SPINLOCK_H */
#endif /* __ASM_GENERIC_SPINLOCK_H */

34
arch/riscv/include/asm/spinlock_types.h
View File

@@ -1,25 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_GENERIC_SPINLOCK_TYPES_H
#define __ASM_GENERIC_SPINLOCK_TYPES_H
#include <linux/types.h>
typedef atomic_t arch_spinlock_t;
/*
* Copyright (C) 2015 Regents of the University of California
* qrwlock_types depends on arch_spinlock_t, so we must typedef that before the
* include.
*/
#include <asm/qrwlock_types.h>
#ifndef _ASM_RISCV_SPINLOCK_TYPES_H
#define _ASM_RISCV_SPINLOCK_TYPES_H
#define __ARCH_SPIN_LOCK_UNLOCKED ATOMIC_INIT(0)
#ifndef __LINUX_SPINLOCK_TYPES_H
# error "please don't include this file directly"
#endif
typedef struct {
volatile unsigned int lock;
} arch_spinlock_t;
#define __ARCH_SPIN_LOCK_UNLOCKED { 0 }
typedef struct {
volatile unsigned int lock;
} arch_rwlock_t;
#define __ARCH_RW_LOCK_UNLOCKED { 0 }
#endif /* _ASM_RISCV_SPINLOCK_TYPES_H */
#endif /* __ASM_GENERIC_SPINLOCK_TYPES_H */

22
arch/riscv/include/asm/tlbflush.h
View File

@@ -14,7 +14,7 @@
static inline void local_flush_tlb_all(void)
{
#ifdef CONFIG_NO_SFENCE_VMA
csr_write(CSR_SMCIR, 1 << 26);
csr_write(0x9c3, 1 << 26);
#else
__asm__ __volatile__ ("sfence.vma" : : : "memory");
#endif
@@ -24,7 +24,7 @@ static inline void local_flush_tlb_all(void)
static inline void local_flush_tlb_page(unsigned long addr)
{
#ifdef CONFIG_NO_SFENCE_VMA
csr_write(CSR_SMCIR, 1 << 26);
csr_write(0x9c3, 1 << 26);
#else
__asm__ __volatile__ ("sfence.vma %0" : : "r" (addr) : "memory");
#endif
@@ -58,23 +58,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
static inline void flush_tlb_kernel_range(unsigned long start,
unsigned long end)
{
#ifdef CONFIG_NO_SFENCE_VMA
csr_write(CSR_SMCIR, 1 << 26);
#else
start &= PAGE_MASK;
end += PAGE_SIZE - 1;
end &= PAGE_MASK;
if ((end - start) > SZ_1M) {
flush_tlb_all();
return;
}
while (start < end) {
__asm__ __volatile__ ("sfence.vma %0" : : "r" (start) : "memory");
start += PAGE_SIZE;
}
#endif
flush_tlb_all();
}
#endif /* _ASM_RISCV_TLBFLUSH_H */

2
arch/riscv/kernel/entry.S
View File

@@ -251,7 +251,7 @@ ret_from_syscall_rejected:
andi t0, t0, _TIF_SYSCALL_WORK
bnez t0, handle_syscall_trace_exit
ret_from_exception:
ENTRY(ret_from_exception)
REG_L s0, PT_STATUS(sp)
csrc CSR_STATUS, SR_IE
#ifdef CONFIG_TRACE_IRQFLAGS

5
arch/riscv/kernel/machine_kexec.c
View File

@@ -179,9 +179,10 @@ machine_crash_shutdown(struct pt_regs *regs)
{
local_irq_disable();
#ifdef CONFIG_SMP
/* shutdown non-crashing cpus */
crash_smp_send_stop();
#endif
crash_save_cpu(regs, smp_processor_id());
machine_kexec_mask_interrupts();
@@ -211,8 +212,10 @@ machine_kexec(struct kimage *image)
void *control_code_buffer = page_address(image->control_code_page);
riscv_kexec_method kexec_method = NULL;
#ifdef CONFIG_SMP
WARN(smp_crash_stop_failed(),
"Some CPUs may be stale, kdump will be unreliable.\n");
#endif
if (image->type != KEXEC_TYPE_CRASH)
kexec_method = control_code_buffer;

4
arch/riscv/kernel/perf_callchain.c
View File

@@ -75,13 +75,13 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry,
fp = user_backtrace(entry, fp, 0);
}
bool fill_callchain(unsigned long pc, void *entry)
bool fill_callchain(unsigned long pc, unsigned long regs, void *entry)
{
return perf_callchain_store(entry, pc) == 0;
}
void notrace walk_stackframe(struct task_struct *task,
struct pt_regs *regs, bool (*fn)(unsigned long, void *), void *arg);
struct pt_regs *regs, bool (*fn)(unsigned long, unsigned long, void *), void *arg);
void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry,
struct pt_regs *regs)
{

18
arch/riscv/kernel/probes/kprobes.c
View File

@@ -46,6 +46,21 @@ static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
post_kprobe_handler(kcb, regs);
}
static bool __kprobes arch_check_kprobe(struct kprobe *p)
{
unsigned long tmp = (unsigned long)p->addr - p->offset;
unsigned long addr = (unsigned long)p->addr;
while (tmp <= addr) {
if (tmp == addr)
return true;
tmp += GET_INSN_LENGTH(*(u16 *)tmp);
}
return false;
}
int __kprobes arch_prepare_kprobe(struct kprobe *p)
{
unsigned long probe_addr = (unsigned long)p->addr;
@@ -56,6 +71,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
return -EINVAL;
}
if (!arch_check_kprobe(p))
return -EILSEQ;
/* copy instruction */
p->opcode = le32_to_cpu(*p->addr);

40
arch/riscv/kernel/stacktrace.c
View File

@@ -21,8 +21,10 @@ struct stackframe {
unsigned long ra;
};
extern asmlinkage void ret_from_exception(void);
void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
bool (*fn)(unsigned long, void *), void *arg)
bool (*fn)(unsigned long, unsigned long, void *), void *arg)
{
unsigned long fp, sp, pc;
@@ -46,7 +48,7 @@ void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
unsigned long low, high;
struct stackframe *frame;
if (unlikely(!__kernel_text_address(pc) || fn(pc, arg)))
if (unlikely(!__kernel_text_address(pc) || fn(pc, 0, arg)))
break;
/* Validate frame pointer */
@@ -57,16 +59,29 @@ void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
/* Unwind stack frame */
frame = (struct stackframe *)fp - 1;
sp = fp;
fp = frame->fp;
pc = ftrace_graph_ret_addr(current, NULL, frame->ra,
(unsigned long *)(fp - 8));
if (regs && (regs->epc == pc) && (frame->fp & 0x7)) {
fp = frame->ra;
pc = regs->ra;
} else {
fp = frame->fp;
pc = ftrace_graph_ret_addr(current, NULL, frame->ra,
&frame->ra);
if (pc == (unsigned long)ret_from_exception) {
if (unlikely(!__kernel_text_address(pc) || fn(pc, sp, arg)))
break;
pc = ((struct pt_regs *)sp)->epc;
fp = ((struct pt_regs *)sp)->s0;
}
}
}
}
#else /* !CONFIG_FRAME_POINTER */
void notrace walk_stackframe(struct task_struct *task,
struct pt_regs *regs, bool (*fn)(unsigned long, void *), void *arg)
struct pt_regs *regs, bool (*fn)(unsigned long, unsigned long, void *), void *arg)
{
unsigned long sp, pc;
unsigned long *ksp;
@@ -88,7 +103,7 @@ void notrace walk_stackframe(struct task_struct *task,
ksp = (unsigned long *)sp;
while (!kstack_end(ksp)) {
if (__kernel_text_address(pc) && unlikely(fn(pc, arg)))
if (__kernel_text_address(pc) && unlikely(fn(pc, 0, arg)))
break;
pc = (*ksp++) - 0x4;
}
@@ -97,11 +112,15 @@ void notrace walk_stackframe(struct task_struct *task,
#endif /* CONFIG_FRAME_POINTER */
static bool print_trace_address(unsigned long pc, void *arg)
static bool print_trace_address(unsigned long pc, unsigned long regs, void *arg)
{
const char *loglvl = arg;
print_ip_sym(loglvl, pc);
if (regs)
show_regs((struct pt_regs *)regs);
return false;
}
@@ -109,9 +128,10 @@ void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
{
pr_cont("Call Trace:\n");
walk_stackframe(task, NULL, print_trace_address, (void *)loglvl);
pr_cont("End Trace.\n");
}
static bool save_wchan(unsigned long pc, void *arg)
static bool save_wchan(unsigned long pc, unsigned long regs, void *arg)
{
if (!in_sched_functions(pc)) {
unsigned long *p = arg;
@@ -148,7 +168,7 @@ static bool __save_trace(unsigned long pc, void *arg, bool nosched)
return (trace->nr_entries >= trace->max_entries);
}
static bool save_trace(unsigned long pc, void *arg)
static bool save_trace(unsigned long pc, unsigned long regs, void *arg)
{
return __save_trace(pc, arg, false);
}

4
arch/riscv/mm/cacheflush.c
View File

@@ -84,8 +84,10 @@ void flush_icache_pte(pte_t pte)
{
struct page *page = pte_page(pte);
if (!test_and_set_bit(PG_dcache_clean, &page->flags))
if (!test_bit(PG_dcache_clean, &page->flags)) {
flush_icache_all();
set_bit(PG_dcache_clean, &page->flags);
}
}
#endif /* CONFIG_MMU */

36
arch/riscv/mm/context.c
View File

@@ -56,14 +56,48 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next,
*/
cpu = smp_processor_id();
cpumask_clear_cpu(cpu, mm_cpumask(prev));
cpumask_set_cpu(cpu, mm_cpumask(next));
#ifdef CONFIG_MMU
__asm__ __volatile__(
"jal t0,1f\n\t"
"1: \n\t"
"jal t0,2f\n\t"
"2: \n\t"
"jal t0,3f\n\t"
"3: \n\t"
"jal t0,4f\n\t"
"4: \n\t"
"jal t0,5f\n\t"
"5: \n\t"
"jal t0,6f\n\t"
"6: \n\t"
"jal t0,7f\n\t"
"7: \n\t"
"jal t0,8f\n\t"
"8: \n\t"
"jal t0,9f\n\t"
"9: \n\t"
"jal t0,10f\n\t"
"10: \n\t"
"jal t0,11f\n\t"
"11: \n\t"
"jal t0,12f\n\t"
"12: \n\t"
::: "memory", "t0");
check_and_switch_context(next, cpu);
asid = (next->context.asid.counter & SATP_ASID_MASK)
<< SATP_ASID_SHIFT;
local_flush_tlb_page(0);
/* flush utlb before setting satp */
__asm__ __volatile__(
"li t0, 0\n\t"
"sfence.vma t0, t0\n\t"
::: "memory", "t0");
csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE | asid);
#endif

68
arch/riscv/mm/tlbflush.c
View File

@@ -3,73 +3,6 @@
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/sched.h>
#define XUANTIE
#ifdef XUANTIE
#include <asm/mmu_context.h>
void flush_tlb_all(void)
{
#ifdef CONFIG_NO_SFENCE_VMA
csr_write(CSR_SMCIR, 1 << 26);
#else
__asm__ __volatile__ ("sfence.vma" : : : "memory");
#endif
}
void flush_tlb_mm(struct mm_struct *mm)
{
int newpid = cpu_asid(mm);
#ifdef CONFIG_NO_SFENCE_VMA
csr_write(CSR_SMCIR, (1 << 27) | newpid);
#else
__asm__ __volatile__ ("sfence.vma zero, %0"
:
: "r"(newpid)
: "memory");
#endif
}
void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
{
int newpid = cpu_asid(vma->vm_mm);
#ifdef CONFIG_NO_SFENCE_VMA
csr_write(CSR_SMCIR, (1 << 27) | newpid);
#else
addr &= PAGE_MASK;
__asm__ __volatile__ ("sfence.vma %0, %1"
:
: "r"(addr), "r"(newpid)
: "memory");
#endif
}
void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
unsigned long end)
{
unsigned long newpid = cpu_asid(vma->vm_mm);
#ifdef CONFIG_NO_SFENCE_VMA
csr_write(CSR_SMCIR, (1 << 27) | newpid);
#else
start &= PAGE_MASK;
end += PAGE_SIZE - 1;
end &= PAGE_MASK;
while (start < end) {
__asm__ __volatile__ ("sfence.vma %0, %1"
:
: "r"(start), "r"(newpid)
: "memory");
start += PAGE_SIZE;
}
#endif
}
#else
#include <asm/sbi.h>
void flush_tlb_all(void)
@@ -121,4 +54,3 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
{
__sbi_tlb_flush_range(mm_cpumask(vma->vm_mm), start, end - start);
}
#endif

2
drivers/clk/thead/clk-light-fm.c
View File

@@ -608,8 +608,6 @@ static int light_clocks_probe(struct platform_device *pdev)
#ifndef FPGA_EMU
/* HW defalut */
clk_prepare_enable(clks[CPU_PLL1_FOUTPOSTDIV]);
udelay(1);
clk_set_parent(clks[C910_CCLK], clks[CPU_PLL1_FOUTPOSTDIV]);
#else
clk_set_parent(clks[C910_CCLK_I0], clks[OSC_24M]);

4
drivers/clk/thead/gate/visys-gate.c
View File

@@ -80,9 +80,9 @@ static int light_visys_clk_probe(struct platform_device *pdev)
gates[LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi0_cfg_clk", NULL,
visys_regmap, 0xa0, 8, GATE_NOT_SHARED, NULL, dev);
gates[LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi1_cfg_clk", NULL,
visys_regmap, 0xa0, 7, GATE_NOT_SHARED, NULL, dev);
gates[LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi2_cfg_clk", NULL,
visys_regmap, 0xa0, 6, GATE_NOT_SHARED, NULL, dev);
gates[LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK] = thead_gate_clk_register("clkgen_mipi_csi2_cfg_clk", NULL,
visys_regmap, 0xa0, 7, GATE_NOT_SHARED, NULL, dev);
gates[LIGHT_CLKGEN_DW200_CLK_VSE] = thead_gate_clk_register("clkgen_dw200_clk_vse", NULL,
visys_regmap, 0xa0, 5, GATE_NOT_SHARED, NULL, dev);
gates[LIGHT_CLKGEN_DW200_CLK_DWE] = thead_gate_clk_register("clkgen_dw200_clk_dwe", NULL,

6
drivers/cpufreq/light-mpw-cpufreq.c
View File

@@ -268,7 +268,7 @@ static int panic_cpufreq_notifier_call(struct notifier_block *nb,
struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
u32 val = readl(ap_sys_reg);
pr_debug("[%s,%d]Enter panic_cpufreq_notifier_call\n", __func__, __LINE__);
pr_info("enter panic_cpufreq_notifier_call\n");
/*
* set CPU PLL1's frequency as minimum to compatible voltage
@@ -277,7 +277,7 @@ static int panic_cpufreq_notifier_call(struct notifier_block *nb,
if (strcmp(__clk_get_name(clk_get_parent(clks[LIGHT_C910_CCLK].clk)),
__clk_get_name(clks[LIGHT_C910_CCLK_I0].clk))) {
pr_debug("[%s,%d]\n", __func__, __LINE__);
clk_prepare_enable(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
clk_set_rate(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk, policy->min * 1000);
udelay(1);
clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_C910_CCLK_I0].clk);
@@ -296,7 +296,7 @@ static int panic_cpufreq_notifier_call(struct notifier_block *nb,
clk_set_rate(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk, policy->min * 1000);
udelay(1);
pr_debug("finish to execute cpufreq notifier callback on panic\n");
pr_info("finish to execute cpufreq notifier callback on panic\n");
return 0;
}

24
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
View File

@@ -6,6 +6,7 @@
* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
* Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*/
#include <linux/extcon-provider.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
@@ -103,6 +104,11 @@ static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = {
{ 0x0000, 0x0000, 0x1b7c, 0x0020 }
};
static const unsigned int hdmi_extcon_cable[] = {
EXTCON_DISP_HDMI,
EXTCON_NONE,
};
struct hdmi_vmode {
bool mdataenablepolarity;
@@ -160,6 +166,7 @@ struct dw_hdmi {
struct clk *pix_clk;
struct clk *i2s_clk;
struct dw_hdmi_i2c *i2c;
struct extcon_dev *edev;
struct hdmi_data_info hdmi_data;
const struct dw_hdmi_plat_data *plat_data;
@@ -3117,6 +3124,10 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
dev_dbg(hdmi->dev, "EVENT=%s\n",
status == connector_status_connected ?
"plugin" : "plugout");
if (status == connector_status_connected)
extcon_set_state_sync(hdmi->edev, EXTCON_DISP_HDMI, true);
else
extcon_set_state_sync(hdmi->edev, EXTCON_DISP_HDMI, false);
if (hdmi->bridge.dev) {
drm_helper_hpd_irq_event(hdmi->bridge.dev);
@@ -3423,6 +3434,19 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
dw_hdmi_init_hw(hdmi);
hdmi->edev = devm_extcon_dev_allocate(dev, hdmi_extcon_cable);
if (IS_ERR(hdmi->edev)) {
dev_err(dev, "failed to allocate extcon device\n");
ret = -ENOMEM;
goto err_res;
}
ret = devm_extcon_dev_register(dev, hdmi->edev);
if (ret < 0) {
dev_err(dev, "failed to register extcon device\n");
goto err_res;
}
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
ret = irq;

19
drivers/gpu/drm/panel/Kconfig
View File

@@ -500,4 +500,23 @@ config DRM_PANEL_XINPENG_XPP055C272
Say Y here if you want to enable support for the Xinpeng
XPP055C272 controller for 720x1280 LCD panels with MIPI/RGB/SPI
system interfaces.
config DRM_PANEL_ILI9881D
tristate "ILI9881D-based panels"
depends on OF
depends on DRM_MIPI_DSI
depends on BACKLIGHT_CLASS_DEVICE
help
Say Y if you want to enable support for panels based on the
ILI9881d controller.
config DRM_PANEL_HX8394
tristate "HX8394-based panels"
depends on OF
depends on DRM_MIPI_DSI
depends on BACKLIGHT_CLASS_DEVICE
help
Say Y if you want to enable support for panels based on the
HX8394 controller.
endmenu

2
drivers/gpu/drm/panel/Makefile
View File

@@ -53,3 +53,5 @@ obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o
obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o
obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o
obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o
obj-$(CONFIG_DRM_PANEL_ILI9881D) += panel-ili9881d.o
obj-$(CONFIG_DRM_PANEL_HX8394) += panel-himax8394.o

429
drivers/gpu/drm/panel/panel-himax8394.c Normal file
View File

@@ -0,0 +1,429 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Diiver for panels based on Himax HX8394 controller
* Copyright (c) 2023, Alibaba-inc Co., Ltd
*
*/
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
#include <drm/drm_device.h>
#include <drm/drm_mipi_dsi.h>
#include <drm/drm_modes.h>
#include <drm/drm_panel.h>
#include <video/mipi_display.h>
struct hx8394_panel_cmd {
char cmdlen;
char cmddata[0x40];
};
struct hx8394_panel_desc {
const struct drm_display_mode *display_mode;
unsigned long mode_flags;
enum mipi_dsi_pixel_format format;
unsigned int lanes;
const struct hx8394_panel_cmd *on_cmds;
unsigned int on_cmds_num;
};
struct panel_info {
struct drm_panel base;
struct mipi_dsi_device *link;
const struct hx8394_panel_desc *desc;
struct gpio_desc *reset;
struct regulator *hsvcc;
struct regulator *vspn3v3;
bool prepared;
bool enabled;
};
static inline struct panel_info *to_panel_info(struct drm_panel *panel)
{
return container_of(panel, struct panel_info, base);
}
static int hx8394_send_mipi_cmds(struct drm_panel *panel, const struct hx8394_panel_cmd *cmds)
{
struct panel_info *pinfo = to_panel_info(panel);
unsigned int i = 0;
int err;
for (i = 0; i < pinfo->desc->on_cmds_num; i++) {
err = mipi_dsi_dcs_write_buffer(pinfo->link, &(cmds[i].cmddata[0]), cmds[i].cmdlen);
if (err < 0)
return err;
}
return 0;
}
static int hx8394_panel_disable(struct drm_panel *panel)
{
struct panel_info *pinfo = to_panel_info(panel);
int err;
if (!pinfo->enabled)
return 0;
err = mipi_dsi_dcs_set_display_off(pinfo->link);
if (err < 0) {
dev_err(panel->dev, "failed to set display off: %d\n", err);
return err;
}
pinfo->enabled = false;
return 0;
}
static int hx8394_panel_unprepare(struct drm_panel *panel)
{
struct panel_info *pinfo = to_panel_info(panel);
int err;
if (!pinfo->prepared)
return 0;
err = mipi_dsi_dcs_set_display_off(pinfo->link);
if (err < 0)
dev_err(panel->dev, "failed to set display off: %d\n", err);
err = mipi_dsi_dcs_enter_sleep_mode(pinfo->link);
if (err < 0)
dev_err(panel->dev, "failed to enter sleep mode: %d\n", err);
/* sleep_mode_delay: 1ms - 2ms */
usleep_range(1000, 2000);
gpiod_set_value(pinfo->reset, 1);
regulator_disable(pinfo->hsvcc);
regulator_disable(pinfo->vspn3v3);
pinfo->prepared = false;
return 0;
}
static int hx8394_panel_prepare(struct drm_panel *panel)
{
struct panel_info *pinfo = to_panel_info(panel);
int ret;
if (pinfo->prepared)
return 0;
gpiod_set_value(pinfo->reset, 1);
/* Power the panel */
ret = regulator_enable(pinfo->hsvcc);
if (ret) {
dev_err(pinfo->base.dev, "Failed to enable hsvcc supply: %d\n", ret);
return ret;
}
usleep_range(1000, 2000);
ret = regulator_enable(pinfo->vspn3v3);
if (ret) {
dev_err(pinfo->base.dev, "Failed to enable vspn3v3 supply: %d\n", ret);
goto fail;
}
usleep_range(5000, 6000);
gpiod_set_value(pinfo->reset, 0);
msleep(180);
pinfo->prepared = true;
return 0;
fail:
gpiod_set_value(pinfo->reset, 1);
regulator_disable(pinfo->hsvcc);
return ret;
}
static int hx8394_read_id(struct mipi_dsi_device *dsi, u8 *id1)
{
int ret;
ret = mipi_dsi_dcs_read(dsi, 0xDA, id1, 1);
if (ret < 0) {
dev_err(&dsi->dev, "could not read ID1\n");
return ret;
}
dev_info(&dsi->dev, "ID1 : 0x%02x\n", *id1);
return 0;
}
static int hx8394_panel_enable(struct drm_panel *panel)
{
struct panel_info *pinfo = to_panel_info(panel);
int ret;
u8 id1;
if (pinfo->enabled)
return 0;
ret = hx8394_read_id(pinfo->link, &id1);
if (ret < 0)
dev_info(panel->dev, "No LCD connected,pls check your hardware! ret:%d\n", ret);
/* send init code */
ret = hx8394_send_mipi_cmds(panel, pinfo->desc->on_cmds);
if (ret < 0) {
dev_err(panel->dev, "failed to send DCS Init Code: %d\n", ret);
return ret;
}
ret = mipi_dsi_dcs_exit_sleep_mode(pinfo->link);
if (ret < 0) {
dev_err(panel->dev, "failed to exit sleep mode: %d\n", ret);
return ret;
}
msleep(120);
ret = mipi_dsi_dcs_set_display_on(pinfo->link);
if (ret < 0) {
dev_err(panel->dev, "failed to set display on: %d\n", ret);
return ret;
}
pinfo->enabled = true;
return 0;
}
static int hx8394_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
struct panel_info *pinfo = to_panel_info(panel);
const struct drm_display_mode *m = pinfo->desc->display_mode;
struct drm_display_mode *mode;
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
dev_err(pinfo->base.dev, "failed to add mode %ux%u@%u\n",
m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
return -ENOMEM;
}
drm_mode_set_name(mode);
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
drm_mode_probed_add(connector, mode);
connector->display_info.width_mm = mode->width_mm;
connector->display_info.height_mm = mode->height_mm;
return 1;
}
static const struct drm_panel_funcs panel_funcs = {
.disable = hx8394_panel_disable,
.unprepare = hx8394_panel_unprepare,
.prepare = hx8394_panel_prepare,
.enable = hx8394_panel_enable,
.get_modes = hx8394_panel_get_modes,
};
static const struct drm_display_mode hx8394_default_mode = {
.clock = 76000,
.hdisplay = 720,
.hsync_start = 720 + 45,
.hsync_end = 720 + 45 + 8,
.htotal = 720 + 45 + 8 + 45,
.vdisplay = 1280,
.vsync_start = 1280 + 16,
.vsync_end = 1280 + 16 + 8,
.vtotal = 1280 + 16 + 8 + 16,
.width_mm = 62,
.height_mm = 110,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
static const struct hx8394_panel_cmd hx8394_on_cmds[] = {
{ .cmdlen = 4, .cmddata = {0xB9, 0xFF, 0x83, 0x94} },
{ .cmdlen = 11, .cmddata = {0xB1, 0x48, 0x0A, 0x6A, 0x09, 0x33, 0x54,
0x71, 0x71, 0x2E, 0x45} },
{ .cmdlen = 7, .cmddata = {0xBA, 0x63, 0x03, 0x68, 0x6B, 0xB2, 0xC0} },
{ .cmdlen = 7, .cmddata = {0xB2, 0x00, 0x80, 0x64, 0x0C, 0x06, 0x2F} },
{ .cmdlen = 22, .cmddata = {0xB4, 0x1C, 0x78, 0x1C, 0x78, 0x1C, 0x78, 0x01,
0x0C, 0x86, 0x75, 0x00, 0x3F, 0x1C, 0x78, 0x1C,
0x78, 0x1C, 0x78, 0x01, 0x0C, 0x86} },
{ .cmdlen = 34, .cmddata = {0xD3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
0x08, 0x32, 0x10, 0x05, 0x00, 0x05, 0x32, 0x13,
0xC1, 0x00, 0x01, 0x32, 0x10, 0x08, 0x00, 0x00,
0x37, 0x03, 0x07, 0x07, 0x37, 0x05, 0x05, 0x37,
0x0C, 0x40} },
{ .cmdlen = 45, .cmddata = {0xD5, 0x18, 0x18, 0x18, 0x18, 0x22, 0x23, 0x20,
0x21, 0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02,
0x03, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
0x18, 0x19, 0x19, 0x19, 0x19} },
{ .cmdlen = 45, .cmddata = {0xD6, 0x18, 0x18, 0x19, 0x19, 0x21, 0x20, 0x23,
0x22, 0x03, 0x02, 0x01, 0x00, 0x07, 0x06, 0x05,
0x04, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
0x18, 0x19, 0x19, 0x18, 0x18} },
{ .cmdlen = 59, .cmddata = {0xE0, 0x07, 0x08, 0x09, 0x0D, 0x10, 0x14, 0x16,
0x13, 0x24, 0x36, 0x48, 0x4A, 0x58, 0x6F, 0x76,
0x80, 0x97, 0xA5, 0xA8, 0xB5, 0xC6, 0x62, 0x63,
0x68, 0x6F, 0x72, 0x78, 0x7F, 0x7F, 0x00, 0x02,
0x08, 0x0D, 0x0C, 0x0E, 0x0F, 0x10, 0x24, 0x36,
0x48, 0x4A, 0x58, 0x6F, 0x78, 0x82, 0x99, 0xA4,
0xA0, 0xB1, 0xC0, 0x5E, 0x5E, 0x64, 0x6B, 0x6C,
0x73, 0x7F, 0x7F} },
{ .cmdlen = 2, .cmddata = {0xCC, 0x03} },
{ .cmdlen = 3, .cmddata = {0xC0, 0x1F, 0x73} },
{ .cmdlen = 3, .cmddata = {0xB6, 0x90, 0x90} },
{ .cmdlen = 2, .cmddata = {0xD4, 0x02} },
{ .cmdlen = 2, .cmddata = {0xBD, 0x01} },
{ .cmdlen = 2, .cmddata = {0xB1, 0x00} },
{ .cmdlen = 2, .cmddata = {0xBD, 0x00} },
{ .cmdlen = 8, .cmddata = {0xBF, 0x40, 0x81, 0x50, 0x00, 0x1A, 0xFC, 0x01} },
{ .cmdlen = 2, .cmddata = {0x36, 0x02} },
};
static const struct hx8394_panel_desc hx8394_desc = {
.display_mode = &hx8394_default_mode,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO_BURST,
.format = MIPI_DSI_FMT_RGB888,
.lanes = 4,
.on_cmds = hx8394_on_cmds,
.on_cmds_num = ARRAY_SIZE(hx8394_on_cmds),
};
static const struct of_device_id panel_of_match[] = {
{
.compatible = "himax,hx8394",
.data = &hx8394_desc,
},
{
/* sentinel */
}
};
MODULE_DEVICE_TABLE(of, panel_of_match);
static int hx8394_panel_add(struct panel_info *pinfo)
{
struct device *dev = &pinfo->link->dev;
int ret;
pinfo->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(pinfo->reset))
return dev_err_probe(dev, PTR_ERR(pinfo->reset),
"Couldn't get our reset GPIO\n");
pinfo->hsvcc = devm_regulator_get(dev, "hsvcc");
if (IS_ERR(pinfo->hsvcc))
return dev_err_probe(dev, PTR_ERR(pinfo->hsvcc),
"Failed to request hsvcc regulator\n");
pinfo->vspn3v3 = devm_regulator_get(dev, "vspn3v3");
if (IS_ERR(pinfo->vspn3v3))
return dev_err_probe(dev, PTR_ERR(pinfo->vspn3v3),
"Failed to request vspn3v3 regulator\n");
drm_panel_init(&pinfo->base, dev, &panel_funcs,
DRM_MODE_CONNECTOR_DSI);
ret = drm_panel_of_backlight(&pinfo->base);
if (ret)
return ret;
drm_panel_add(&pinfo->base);
return 0;
}
static int hx8394_panel_probe(struct mipi_dsi_device *dsi)
{
struct panel_info *pinfo;
const struct hx8394_panel_desc *desc;
int err;
pinfo = devm_kzalloc(&dsi->dev, sizeof(*pinfo), GFP_KERNEL);
if (!pinfo)
return -ENOMEM;
desc = of_device_get_match_data(&dsi->dev);
dsi->mode_flags = desc->mode_flags;
dsi->format = desc->format;
dsi->lanes = desc->lanes;
pinfo->desc = desc;
pinfo->link = dsi;
mipi_dsi_set_drvdata(dsi, pinfo);
err = hx8394_panel_add(pinfo);
if (err < 0)
return err;
err = mipi_dsi_attach(dsi);
if (err < 0)
drm_panel_remove(&pinfo->base);
return err;
}
static int hx8394_panel_remove(struct mipi_dsi_device *dsi)
{
struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi);
int err;
err = hx8394_panel_disable(&pinfo->base);
if (err < 0)
dev_err(&dsi->dev, "failed to disable panel: %d\n", err);
err = hx8394_panel_unprepare(&pinfo->base);
if (err < 0)
dev_err(&dsi->dev, "failed to unprepare panel: %d\n", err);
err = mipi_dsi_detach(dsi);
if (err < 0)
dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
drm_panel_remove(&pinfo->base);
return 0;
}
static void hx8394_panel_shutdown(struct mipi_dsi_device *dsi)
{
struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi);
hx8394_panel_disable(&pinfo->base);
hx8394_panel_unprepare(&pinfo->base);
}
static struct mipi_dsi_driver panel_driver = {
.driver = {
.name = "panel-himax8394",
.of_match_table = panel_of_match,
},
.probe = hx8394_panel_probe,
.remove = hx8394_panel_remove,
.shutdown = hx8394_panel_shutdown,
};
module_mipi_dsi_driver(panel_driver);
MODULE_DESCRIPTION("Himax8394 driver");
MODULE_LICENSE("GPL v2");

909
drivers/gpu/drm/panel/panel-ili9881d.c Normal file
View File

@@ -0,0 +1,909 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* ILI9881D panel driver
*
* Copyright (c) 2020 Seeed Studio
*/
#include "panel-ili9881d.h"
#include <linux/version.h>
#define ILI9881_PAGE(_page) DSI_DCS_WRITE(dsi, 0xff, 0x98, 0x81, _page)
#define IILI9881_COMMAND(_cmd, _data...) DSI_DCS_WRITE(dsi, _cmd, _data)
#define DCS_CMD_READ_ID1 0xDA
#define ILI_9881D_I2C_ADAPTER 1
#define ILI_9881D_I2C_ADDR 0x45
#define GOODIX_STATUS_SIZE 2
#define GOODIX_CONTACT_SIZE 8
#define GOODIX_BUFFER_STATUS_READY (((uint32_t)0x01) << 7)//BIT(7)
#define GOODIX_HAVE_KEY (((uint32_t)0x01) << 4)//BIT(4)
#define TP_DEFAULT_WIDTH 1280
#define TP_DEFAULT_HEIGHT 720
#define TP_MAX_POINTS 5
#define TP_POLL_INTERVAL 15
static struct i2c_mipi_dsi *ili9881d_mipi_dsi;
static int goodix_ts_read_input_report(struct i2c_mipi_dsi *md, u8 *data)
{
int header = GOODIX_STATUS_SIZE + GOODIX_CONTACT_SIZE;
int i, ret, touch_num;
for (i = 0; i < 2; i++) {
ret = i2c_md_read(md, REG_TP_STATUS, data, header);
if (ret < 0)
return -EIO;
if (data[0] & GOODIX_BUFFER_STATUS_READY) {
touch_num = data[0] & 0x0f;
if (touch_num > TP_MAX_POINTS)
return -EPROTO;
if (touch_num > 1) {
ret = i2c_md_read(md, REG_TP_POINT, data+header, (touch_num-1)*GOODIX_CONTACT_SIZE);
if (ret < 0)
return -EIO;
}
return touch_num;
}
usleep_range(3000, 5000); /* Poll every 3 - 5 ms */
}
/*
* The Goodix panel will send spurious interrupts after a
* 'finger up' event, which will always cause a timeout.
*/
return -ENOMSG;
}
//TODO
//need more work for it's compatibility
static void x_y_rotate(int *x, int *y)
{
int temp_x, temp_y;
int temp;
if (*x < 0 || *y < 0) {
pr_err("%s<%d> parameter error\n", __func__, __LINE__);
return;
}
//1 move rectangle center to (0,0)
temp_x = *x - TP_DEFAULT_WIDTH/2;
temp_y = *y - TP_DEFAULT_HEIGHT/2;
//2 rotate the point anti-clockwise for 90 degree
temp = temp_x;
temp_x = temp_y;
temp_y = temp;
temp_x *= (-1);
temp_y *= 1;
//3 zoom
temp_x = temp_x * TP_DEFAULT_WIDTH / TP_DEFAULT_HEIGHT;
temp_y = temp_y * TP_DEFAULT_HEIGHT / TP_DEFAULT_WIDTH;
//4 move rectangle center back to (TP_DEFAULT_WIDTH/2, TP_DEFAULT_HEIGHT/2)
temp_x += TP_DEFAULT_WIDTH/2;
temp_y += TP_DEFAULT_HEIGHT/2;
*x = temp_x;
*y = temp_y;
}
static void goodix_ts_report_touch_8b(struct i2c_mipi_dsi *md, u8 *coor_data)
{
struct input_dev *input_dev = md->input;
int id = coor_data[7];
int input_x = 0;
int input_y = 0;
int input_w = coor_data[4];
input_x = coor_data[1];
input_x <<= 8;
input_x += coor_data[0];
input_y = coor_data[3];
input_y <<= 8;
input_y += coor_data[2];
if (md->tp_point_rotate)
x_y_rotate(&input_x, &input_y);
input_mt_slot(input_dev, id);
input_mt_report_slot_state(input_dev, MT_TOOL_FINGER, true);
touchscreen_report_pos(input_dev, &md->prop, input_x, input_y, true);
input_report_abs(input_dev, ABS_MT_TOUCH_MAJOR, input_w);
input_report_abs(input_dev, ABS_MT_WIDTH_MAJOR, input_w);
}
static void tp_poll_func(struct input_dev *input)
{
struct i2c_mipi_dsi *md = (struct i2c_mipi_dsi *)input_get_drvdata(input);
u8 point_data[GOODIX_STATUS_SIZE + TP_MAX_POINTS * GOODIX_CONTACT_SIZE] = { 0 };
int touch_num;
int i;
touch_num = goodix_ts_read_input_report(md, point_data);
if (touch_num < 0)
return;
for (i = 0; i < touch_num; i++)
goodix_ts_report_touch_8b(md, &point_data[GOODIX_STATUS_SIZE + i*GOODIX_CONTACT_SIZE]);
input_mt_sync_frame(input);
input_sync(input);
}
int tp_init(struct i2c_mipi_dsi *md)
{
struct i2c_client *i2c = md->i2c;
struct device *dev = &i2c->dev;
struct input_dev *input;
int ret;
input = devm_input_allocate_device(dev);
if (!input) {
dev_err(dev, "Failed to allocate input device\n");
return -ENOMEM;
}
md->input = input;
input_set_drvdata(input, md);
input->dev.parent = dev;
input->name = "seeed-tp";
input->id.bustype = BUS_I2C;
input->id.vendor = 0x1234;
input->id.product = 0x1001;
input->id.version = 0x0100;
input_set_abs_params(input, ABS_MT_WIDTH_MAJOR, 0, 255, 0, 0);
input_set_abs_params(input, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0);
input_set_abs_params(input, ABS_MT_POSITION_X, 0, TP_DEFAULT_WIDTH, 0, 0);
input_set_abs_params(input, ABS_MT_POSITION_Y, 0, TP_DEFAULT_HEIGHT, 0, 0);
ret = input_mt_init_slots(input, TP_MAX_POINTS, INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED);
if (ret) {
dev_err(dev, "could not init mt slots, %d\n", ret);
return ret;
}
ret = input_setup_polling(input, tp_poll_func);
if (ret) {
dev_err(dev, "could not set up polling mode, %d\n", ret);
return ret;
}
input_set_poll_interval(input, TP_POLL_INTERVAL);
ret = input_register_device(input);
if (ret) {
dev_err(dev, "could not register input device, %d\n", ret);
return ret;
}
return 0;
}
int tp_deinit(struct i2c_mipi_dsi *md)
{
input_unregister_device(md->input);
return 0;
}
static const struct drm_display_mode ili9881d_modes = {
.clock = 76000,
.hdisplay = 800,
.hsync_start = 800 + 60,
.hsync_end = 800 + 60 + 40,
.htotal = 800 + 60 + 40 + 60,
.vdisplay = 1280,
.vsync_start = 1280 + 16,
.vsync_end = 1280 + 16 + 8,
.vtotal = 1280 + 16 + 8 + 16,
.width_mm = 62,
.height_mm = 110,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
};
static int ili9881d_get_modes(struct drm_panel *panel, struct drm_connector *connector)
{
struct drm_display_mode *mode;
mode = drm_mode_duplicate(connector->dev, &ili9881d_modes);
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
mode->hdisplay, mode->vdisplay,
drm_mode_vrefresh(mode));
return -ENOMEM;
}
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
drm_mode_set_name(mode);
connector->display_info.width_mm = mode->width_mm;
connector->display_info.height_mm = mode->height_mm;
drm_mode_probed_add(connector, mode);
return 1;
}
static int ili9881d_read_id(struct mipi_dsi_device *dsi, u8 *id1)
{
int ret;
ret = mipi_dsi_dcs_read(dsi, DCS_CMD_READ_ID1, id1, 1);
if (ret < 0) {
dev_err(&dsi->dev, "could not read ID1\n");
return ret;
}
dev_info(&dsi->dev, "ID1 : %02x\n", *id1);
return 0;
}
static int ili9881d_enable(struct drm_panel *panel)
{
struct mipi_dsi_device *dsi = ili9881d_mipi_dsi->dsi;
int ret = 0;
u8 id1;
DBG_FUNC();
if (!dsi)
return -1;
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
ILI9881_PAGE(0x00);
mipi_dsi_set_maximum_return_packet_size(dsi, 1);
ret = ili9881d_read_id(dsi, &id1);
if (ret < 0) {
dev_info(&dsi->dev, "No LCD connected,pls check your hardware! ret:%d\n", ret);
return -ENODEV;
}
ILI9881_PAGE(0x01);
IILI9881_COMMAND(0x91,0x00);
IILI9881_COMMAND(0x92,0x00);
IILI9881_COMMAND(0x93,0x72);
IILI9881_COMMAND(0x94,0x00);
IILI9881_COMMAND(0x95,0x00);
IILI9881_COMMAND(0x96,0x09);
IILI9881_COMMAND(0x97,0x00);
IILI9881_COMMAND(0x98,0x00);
IILI9881_COMMAND(0x09,0x01);
IILI9881_COMMAND(0x0a,0x00);
IILI9881_COMMAND(0x0b,0x00);
IILI9881_COMMAND(0x0c,0x01);
IILI9881_COMMAND(0x0d,0x00);
IILI9881_COMMAND(0x0e,0x00);
IILI9881_COMMAND(0x0f,0x1D);
IILI9881_COMMAND(0x10,0x1D);
IILI9881_COMMAND(0x11,0x00);
IILI9881_COMMAND(0x12,0x00);
IILI9881_COMMAND(0x13,0x00);
IILI9881_COMMAND(0x14,0x00);
IILI9881_COMMAND(0x15,0x00);
IILI9881_COMMAND(0x16,0x00);
IILI9881_COMMAND(0x17,0x00);
IILI9881_COMMAND(0x18,0x00);
IILI9881_COMMAND(0x19,0x00);
IILI9881_COMMAND(0x1a,0x00);
IILI9881_COMMAND(0x1b,0x00);
IILI9881_COMMAND(0x1c,0x00);
IILI9881_COMMAND(0x1d,0x00);
IILI9881_COMMAND(0x1e,0xc0);
IILI9881_COMMAND(0x1f,0x00);
IILI9881_COMMAND(0x20,0x06);
IILI9881_COMMAND(0x21,0x02);
IILI9881_COMMAND(0x22,0x00);
IILI9881_COMMAND(0x23,0x00);
IILI9881_COMMAND(0x24,0x00);
IILI9881_COMMAND(0x25,0x00);
IILI9881_COMMAND(0x26,0x00);
IILI9881_COMMAND(0x27,0x00);
IILI9881_COMMAND(0x28,0x33);
IILI9881_COMMAND(0x29,0x03);
IILI9881_COMMAND(0x2a,0x00);
IILI9881_COMMAND(0x2b,0x00);
IILI9881_COMMAND(0x2c,0x00);
IILI9881_COMMAND(0x2d,0x00);
IILI9881_COMMAND(0x2e,0x00);
IILI9881_COMMAND(0x2f,0x00);
IILI9881_COMMAND(0x30,0x00);
IILI9881_COMMAND(0x31,0x00);
IILI9881_COMMAND(0x32,0x00);
IILI9881_COMMAND(0x33,0x00);
IILI9881_COMMAND(0x34,0x04);
IILI9881_COMMAND(0x35,0x00);
IILI9881_COMMAND(0x36,0x00);
IILI9881_COMMAND(0x37,0x00);
IILI9881_COMMAND(0x38,0x3C);
IILI9881_COMMAND(0x39,0x07);
IILI9881_COMMAND(0x3a,0x00);
IILI9881_COMMAND(0x3b,0x00);
IILI9881_COMMAND(0x3c,0x00);
IILI9881_COMMAND(0x40,0x03);
IILI9881_COMMAND(0x41,0x20);
IILI9881_COMMAND(0x42,0x00);
IILI9881_COMMAND(0x43,0x00);
IILI9881_COMMAND(0x44,0x03);
IILI9881_COMMAND(0x45,0x00);
IILI9881_COMMAND(0x46,0x01);
IILI9881_COMMAND(0x47,0x08);
IILI9881_COMMAND(0x48,0x00);
IILI9881_COMMAND(0x49,0x00);
IILI9881_COMMAND(0x4a,0x00);
IILI9881_COMMAND(0x4b,0x00);
// ==== GL[3OUT=
IILI9881_COMMAND(0x4c,0x01);
IILI9881_COMMAND(0x4d,0x54);
IILI9881_COMMAND(0x4e,0x57);
IILI9881_COMMAND(0x4f,0x9b);
IILI9881_COMMAND(0x50,0xf9);
IILI9881_COMMAND(0x51,0x27);
IILI9881_COMMAND(0x52,0x2f);
IILI9881_COMMAND(0x53,0xf2);
IILI9881_COMMAND(0x54,0xff);
IILI9881_COMMAND(0x55,0xff);
IILI9881_COMMAND(0x56,0xff);
// ==== GR[3OUT==
IILI9881_COMMAND(0x57,0x01);
IILI9881_COMMAND(0x58,0x54);
IILI9881_COMMAND(0x59,0x46);
IILI9881_COMMAND(0x5a,0x8a);
IILI9881_COMMAND(0x5b,0xf8);
IILI9881_COMMAND(0x5c,0x26);
IILI9881_COMMAND(0x5d,0x2f);
IILI9881_COMMAND(0x5e,0xf2);
IILI9881_COMMAND(0x5f,0xff);
IILI9881_COMMAND(0x60,0xff);
IILI9881_COMMAND(0x61,0xff);
IILI9881_COMMAND(0x62,0x06);
// == GOUT:4]_BWUTL[5:0]==
IILI9881_COMMAND(0x63,0x01);
IILI9881_COMMAND(0x64,0x00);
IILI9881_COMMAND(0x65,0xa4);
IILI9881_COMMAND(0x66,0xa5);
IILI9881_COMMAND(0x67,0x58);
IILI9881_COMMAND(0x68,0x5a);
IILI9881_COMMAND(0x69,0x54);
IILI9881_COMMAND(0x6a,0x56);
IILI9881_COMMAND(0x6b,0x06);
IILI9881_COMMAND(0x6c,0xff);
IILI9881_COMMAND(0x6d,0x08);
IILI9881_COMMAND(0x6e,0x02);
IILI9881_COMMAND(0x6f,0xff);
IILI9881_COMMAND(0x70,0x02);
IILI9881_COMMAND(0x71,0x02);
IILI9881_COMMAND(0x72,0xff);
IILI9881_COMMAND(0x73,0xff);
IILI9881_COMMAND(0x74,0xff);
IILI9881_COMMAND(0x75,0xff);
IILI9881_COMMAND(0x76,0xff);
IILI9881_COMMAND(0x77,0xff);
IILI9881_COMMAND(0x78,0xff);
// == GOUT:4]_BWUTR[5:0]==
IILI9881_COMMAND(0x79,0x01);
IILI9881_COMMAND(0x7a,0x00);
IILI9881_COMMAND(0x7b,0xa4);
IILI9881_COMMAND(0x7c,0xa5);
IILI9881_COMMAND(0x7d,0x59);
IILI9881_COMMAND(0x7e,0x5b);
IILI9881_COMMAND(0x7f,0x55);
IILI9881_COMMAND(0x80,0x57);
IILI9881_COMMAND(0x81,0x07);
IILI9881_COMMAND(0x82,0xff);
IILI9881_COMMAND(0x83,0x09);
IILI9881_COMMAND(0x84,0x02);
IILI9881_COMMAND(0x85,0xff);
IILI9881_COMMAND(0x86,0x02);
IILI9881_COMMAND(0x87,0x02);
IILI9881_COMMAND(0x88,0xff);
IILI9881_COMMAND(0x89,0xff);
IILI9881_COMMAND(0x8a,0xff);
IILI9881_COMMAND(0x8b,0xff);
IILI9881_COMMAND(0x8c,0xff);
IILI9881_COMMAND(0x8d,0xff);
IILI9881_COMMAND(0x8e,0xff);
IILI9881_COMMAND(0x8f,0x00);
IILI9881_COMMAND(0x90,0x00);
IILI9881_COMMAND(0x9d,0x00);
IILI9881_COMMAND(0x9e,0x00);
IILI9881_COMMAND(0xa0,0x35);
IILI9881_COMMAND(0xa1,0x00);
IILI9881_COMMAND(0xa2,0x00);
IILI9881_COMMAND(0xa3,0x00);
IILI9881_COMMAND(0xa4,0x00);
IILI9881_COMMAND(0xa5,0x00);
IILI9881_COMMAND(0xa6,0x08);
IILI9881_COMMAND(0xa7,0x00);
IILI9881_COMMAND(0xa8,0x00);
IILI9881_COMMAND(0xa9,0x00);
IILI9881_COMMAND(0xaa,0x00);
IILI9881_COMMAND(0xab,0x00);
IILI9881_COMMAND(0xac,0x00);
IILI9881_COMMAND(0xad,0x00);
IILI9881_COMMAND(0xae,0xff);
IILI9881_COMMAND(0xaf,0x00);
IILI9881_COMMAND(0xb0,0x00);
ILI9881_PAGE(0x02);
IILI9881_COMMAND(0x08,0x11);
IILI9881_COMMAND(0x0a,0x0c);
IILI9881_COMMAND(0x0f,0x06);
IILI9881_COMMAND(0xA0,0x00,0x26,0x35,0x16,0x19,0x2C,0x1F,0x1F,0x96,0x1C,0x28,0x80,0x1A,0x18,0x4C,0x21,0x27,0x55,0x65,0x39);
IILI9881_COMMAND(0xC0,0x00,0x26,0x35,0x16,0x19,0x2C,0x1F,0x1F,0x96,0x1C,0x28,0x80,0x1A,0x18,0x4C,0x21,0x27,0x55,0x65,0x39);
//===== GIP code finish =====//
IILI9881_COMMAND(0x4C,0xA4); // PS_EN on ,0x default :A4
IILI9881_COMMAND(0x18,0xF4); // SH on ,0x default E4
//=========================//
ILI9881_PAGE(0x04);
IILI9881_COMMAND(0x5D,0xAF); // VREG1 5.5V
IILI9881_COMMAND(0x5E,0xAF); // VREG2 5.5V
IILI9881_COMMAND(0x60,0x9B); // VCM1
IILI9881_COMMAND(0x62,0x9B); // VCM2
IILI9881_COMMAND(0x82,0x38); // VREF_VGH_MOD_CLPSEL 16V
IILI9881_COMMAND(0x84,0x38); // VREF_VGH_DC 16V
IILI9881_COMMAND(0x86,0x18); // VREF_VGL_CLPSEL -10V
IILI9881_COMMAND(0x66,0xC4); // VGH_AC x4 ,0xdefault :04
IILI9881_COMMAND(0xC1,0xF0); // VGH_DC x4 ,0xdefault :70
IILI9881_COMMAND(0x70,0x60);
IILI9881_COMMAND(0x71,0x00);
//=========================//
IILI9881_COMMAND(0x5B,0x33); // vcore_sel Voltage
IILI9881_COMMAND(0x6C,0x10); // vcore bias L
IILI9881_COMMAND(0x77,0x03); // vcore_sel Voltage
IILI9881_COMMAND(0x7B,0x02); // vcore bias R
//=========================//
ILI9881_PAGE(0x01);
IILI9881_COMMAND(0xF0,0x00); // 1280 Gate NL
IILI9881_COMMAND(0xF1,0xC8); // 1280 Gate NL
ILI9881_PAGE(0x05);
IILI9881_COMMAND(0x22,0x3A); // RGB to BGR
ILI9881_PAGE(0x00);
IILI9881_COMMAND(0x35,0x00);
IILI9881_COMMAND(0x11);
msleep(120);
IILI9881_COMMAND(0x29);
return 0;
}
static const struct drm_panel_funcs ili9881d_funcs = {
.get_modes = ili9881d_get_modes,
.enable = ili9881d_enable,
};
static void ili9881d_set_dsi(struct mipi_dsi_device *dsi)
{
dsi->mode_flags = (MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM);
dsi->format = MIPI_DSI_FMT_RGB888;
dsi->lanes = 4;
}
const struct panel_data ili9881d_data = {
.set_dsi = ili9881d_set_dsi,
.funcs = &ili9881d_funcs,
};
static int i2c_md_read(struct i2c_mipi_dsi *md, u8 reg, u8 *buf, int len)
{
struct i2c_client *client = md->i2c;
struct i2c_msg msgs[1];
u8 addr_buf[1] = { reg };
u8 data_buf[1] = { 0, };
int ret;
mutex_lock(&md->mutex);
/* Write register address */
msgs[0].addr = client->addr;
msgs[0].flags = 0;
msgs[0].len = ARRAY_SIZE(addr_buf);
msgs[0].buf = addr_buf;
ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
if (ret != ARRAY_SIZE(msgs)) {
mutex_unlock(&md->mutex);
return -EIO;
}
usleep_range(1000, 1500);
/* Read data from register */
msgs[0].addr = client->addr;
msgs[0].flags = I2C_M_RD;
if (buf == NULL) {
msgs[0].len = 1;
msgs[0].buf = data_buf;
} else {
msgs[0].len = len;
msgs[0].buf = buf;
}
ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
if (ret != ARRAY_SIZE(msgs)) {
mutex_unlock(&md->mutex);
return -EIO;
}
mutex_unlock(&md->mutex);
if (buf == NULL)
return data_buf[0];
else
return ret;
}
static void i2c_md_write(struct i2c_mipi_dsi *md, u8 reg, u8 val)
{
struct i2c_client *client = md->i2c;
int ret;
mutex_lock(&md->mutex);
ret = i2c_smbus_write_byte_data(client, reg, val);
if (ret)
dev_err(&client->dev, "I2C write failed: %d\n", ret);
usleep_range(1000, 1500);
mutex_unlock(&md->mutex);
}
/* panel_funcs */
static int panel_prepare(struct drm_panel *panel)
{
int ret = 0;
struct i2c_mipi_dsi *md = panel_to_md(panel);
const struct drm_panel_funcs *funcs = md->panel_data->funcs;
DBG_FUNC("");
/* i2c */
/* reset pin */
i2c_md_write(md, REG_LCD_RST, 0);
msleep(20);
i2c_md_write(md, REG_LCD_RST, 1);
msleep(20);
/* panel */
if (funcs && funcs->prepare) {
ret = funcs->prepare(panel);
if (ret < 0) {
i2c_md_write(md, REG_POWERON, 0);
i2c_md_write(md, REG_LCD_RST, 0);
i2c_md_write(md, REG_PWM, 0);
return ret;
}
}
return ret;
}
static int panel_unprepare(struct drm_panel *panel)
{
int ret = 0;
struct i2c_mipi_dsi *md = panel_to_md(panel);
const struct drm_panel_funcs *funcs = md->panel_data->funcs;
DBG_FUNC("");
if (funcs && funcs->unprepare) {
ret = funcs->unprepare(panel);
if (ret < 0)
return ret;
}
return ret;
}
static int panel_enable(struct drm_panel *panel)
{
int ret = 0;
struct i2c_mipi_dsi *md = panel_to_md(panel);
const struct drm_panel_funcs *funcs = md->panel_data->funcs;
DBG_FUNC("");
/* panel */
if (funcs && funcs->enable) {
ret = funcs->enable(panel);
if (ret < 0)
return ret;
}
/* i2c */
i2c_md_write(md, REG_PWM, md->brightness);
return ret;
}
static int panel_disable(struct drm_panel *panel)
{
int ret = 0;
struct i2c_mipi_dsi *md = panel_to_md(panel);
const struct drm_panel_funcs *funcs = md->panel_data->funcs;
DBG_FUNC("");
/* i2c */
i2c_md_write(md, REG_PWM, 0);
i2c_md_write(md, REG_LCD_RST, 0);
/* panel */
if (funcs && funcs->disable) {
ret = funcs->disable(panel);
if (ret < 0)
return ret;
}
return ret;
}
static int panel_get_modes(struct drm_panel *panel, struct drm_connector *connector)
{
int ret = 0;
struct i2c_mipi_dsi *md = panel_to_md(panel);
const struct drm_panel_funcs *funcs = md->panel_data->funcs;
if (funcs && funcs->get_modes) {
ret = funcs->get_modes(panel, connector);
if (ret < 0)
return ret;
}
return ret;
}
static const struct drm_panel_funcs panel_funcs = {
.prepare = panel_prepare,
.unprepare = panel_unprepare,
.enable = panel_enable,
.disable = panel_disable,
.get_modes = panel_get_modes,
};
/* backlight */
static int backlight_update(struct backlight_device *bd)
{
struct i2c_mipi_dsi *md = bl_get_data(bd);
int brightness = bd->props.brightness;
if (bd->props.power != FB_BLANK_UNBLANK ||
bd->props.fb_blank != FB_BLANK_UNBLANK ||
(bd->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))) {
brightness = 0;
}
md->brightness = brightness;
i2c_md_write(md, REG_PWM, brightness);
return 0;
}
static const struct backlight_ops backlight_ops = {
.options = BL_CORE_SUSPENDRESUME,
.update_status = backlight_update,
};
static int backlight_init(struct i2c_mipi_dsi *md)
{
struct device *dev = &md->i2c->dev;
struct backlight_properties props;
struct backlight_device *bd;
memset(&props, 0, sizeof(props));
props.type = BACKLIGHT_RAW;
props.max_brightness = 255;
bd = devm_backlight_device_register(dev, dev_name(dev),
dev, md, &backlight_ops,
&props);
if (IS_ERR(bd)) {
dev_err(dev, "failed to register backlight\n");
return PTR_ERR(bd);
}
bd->props.brightness = 255;
backlight_update_status(bd);
return 0;
}
static int i2c_md_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
{
struct device *dev = &i2c->dev;
struct i2c_mipi_dsi *md = ili9881d_mipi_dsi;
int ret = 0;
DBG_FUNC("start");
i2c_set_clientdata(i2c, md);
mutex_init(&md->mutex);
md->i2c = i2c;
md->panel_data = &ili9881d_data;
if (!md->panel_data) {
dev_err(dev, "No valid panel data.\n");
return -ENODEV;
}
ret = i2c_md_read(md, REG_ID, NULL, 0);
if (ret != 0xC3) {
dev_err(dev, "Unknown chip id: 0x%02x\n", ret);
return -ENODEV;
}
dev_info(dev, "I2C Address:0x%x read id: 0x%x\n", i2c->addr, ret);
/* Turn on */
i2c_md_write(md, REG_POWERON, 1);
DBG_FUNC("finished.");
return 0;
}
static int i2c_md_remove(struct i2c_client *i2c)
{
struct i2c_mipi_dsi *md = i2c_get_clientdata(i2c);
DBG_FUNC();
tp_deinit(md);
/* Turn off power */
i2c_md_write(md, REG_POWERON, 0);
i2c_md_write(md, REG_LCD_RST, 0);
i2c_md_write(md, REG_PWM, 0);
mipi_dsi_detach(md->dsi);
drm_panel_remove(&md->panel);
return 0;
}
static void i2c_md_shutdown(struct i2c_client *i2c)
{
struct i2c_mipi_dsi *md = i2c_get_clientdata(i2c);
DBG_FUNC();
tp_deinit(md);
/* Turn off power */
i2c_md_write(md, REG_POWERON, 0);
i2c_md_write(md, REG_LCD_RST, 0);
i2c_md_write(md, REG_PWM, 0);
mipi_dsi_detach(md->dsi);
drm_panel_remove(&md->panel);
}
static const struct of_device_id i2c_md_of_ids[] = {
{
.compatible = "ili9881d",
},
{ }
};
MODULE_DEVICE_TABLE(of, i2c_md_of_ids);
static struct i2c_driver i2c_md_driver = {
.driver = {
.name = "i2c_mipi_dsi",
.of_match_table = i2c_md_of_ids,
},
.probe = i2c_md_probe,
.remove = i2c_md_remove,
.shutdown = i2c_md_shutdown,
};
static int ili9881d_hack_create_device(void)
{
struct i2c_adapter *adapter;
struct i2c_client *client;
struct i2c_board_info info = {
.type = "ili9881d",
.addr = ILI_9881D_I2C_ADDR,
};
adapter = i2c_get_adapter(ILI_9881D_I2C_ADAPTER);
if (!adapter) {
pr_err("%s: i2c_get_adapter(%d) failed\n", __func__,
ILI_9881D_I2C_ADAPTER);
return -EINVAL;
}
client = i2c_new_client_device(adapter, &info);
if (IS_ERR(client)) {
pr_err("%s: creating I2C device failed\n", __func__);
i2c_put_adapter(adapter);
return PTR_ERR(client);
}
return 0;
}
static int ili9881d_dsi_probe(struct mipi_dsi_device *dsi)
{
int ret;
struct i2c_mipi_dsi *ctx;
ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);
if (!ctx)
return -ENOMEM;
ili9881d_mipi_dsi = ctx;
ili9881d_hack_create_device();
ret = i2c_add_driver(&i2c_md_driver);
if (ret < 0) {
dev_err(&dsi->dev, "i2c_add_driver ret:%d\n", ret);
return ret;
}
mipi_dsi_set_drvdata(dsi, ctx);
ctx->dsi = dsi;
ctx->panel_data->set_dsi(ctx->dsi);
drm_panel_init(&ctx->panel, &dsi->dev, &panel_funcs, DRM_MODE_CONNECTOR_DSI);
drm_panel_add(&ctx->panel);
tp_init(ctx);
backlight_init(ctx);
ret = device_property_read_u32(&dsi->dev, "mcu_auto_reset_enable", &ctx->mcu_auto_reset);
if (ret < 0)
dev_err(&dsi->dev, "Can't get the data of mcu_auto_reset!\n");
i2c_md_write(ctx, REG_MCU_AUTO_RESET, (ctx->mcu_auto_reset&0xff));
ret = device_property_read_u32(&dsi->dev, "tp_point_rotate", &ctx->tp_point_rotate);
if (ret < 0)
dev_err(&dsi->dev, "Can't get the data of tp_point_rotate!\n");
return mipi_dsi_attach(dsi);
}
static int ili9881d_dsi_remove(struct mipi_dsi_device *dsi)
{
struct i2c_mipi_dsi *ctx = mipi_dsi_get_drvdata(dsi);
mipi_dsi_detach(dsi);
drm_panel_remove(&ctx->panel);
return 0;
}
static const struct of_device_id ili9881d_of_match[] = {
{ .compatible = "i2c_dsi,ili9881d", },
{ }
};
MODULE_DEVICE_TABLE(of, ili9881d_of_match);
static struct mipi_dsi_driver ili9881d_dsi_driver = {
.probe = ili9881d_dsi_probe,
.remove = ili9881d_dsi_remove,
.driver = {
.name = "ili9881d-dsi",
.of_match_table = ili9881d_of_match,
},
};
module_mipi_dsi_driver(ili9881d_dsi_driver);
MODULE_DESCRIPTION("Ilitek ILI9881D Controller Driver");
MODULE_LICENSE("GPL v2");

128
drivers/gpu/drm/panel/panel-ili9881d.h Normal file
View File

@@ -0,0 +1,128 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* mipi_dsi.h - MIPI dsi module
*
* Copyright (c) 2020 Seeed Studio
*
* I2C slave address: 0x45
*/
#ifndef __MIPI_DSI_H__
#define __MIPI_DSI_H__
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/pm.h>
#include <drm/drm_crtc.h>
#include <drm/drm_device.h>
#include <drm/drm_mipi_dsi.h>
#include <drm/drm_panel.h>
#include <drm/drm_modes.h>
#include <video/mipi_display.h>
#include <linux/input.h>
#include <linux/input/mt.h>
#include <linux/input/touchscreen.h>
#ifdef I2C_DSI_DBG
#define DBG_FUNC(format, x...) printk(KERN_INFO "[DSI]%s:" format"\n", __func__, ##x)
#define DBG_PRINT(format, x...) printk(KERN_INFO "[DSI]" format"\n", ##x)
#else
#define DBG_FUNC(format, x...)
#define DBG_PRINT(format, x...)
#endif
#define DSI_DRIVER_NAME "i2c_mipi_dsi"
/* i2c: commands */
enum REG_ADDR {
REG_ID = 0x80,
REG_PORTA, /* BIT(2) for horizontal flip, BIT(3) for vertical flip */
REG_PORTB, // --
REG_PORTC,
REG_PORTD,
REG_POWERON,// --
REG_PWM, // --
REG_DDRA,
REG_DDRB,
REG_DDRC,
REG_DDRD,
REG_TEST,
REG_WR_ADDRL,
REG_WR_ADDRH,
REG_READH,
REG_READL,
REG_WRITEH,
REG_WRITEL,
REG_ID2,
REG_LCD_RST,
REG_TP_RST,
REG_TP_STATUS,
REG_TP_POINT,
REG_TP_VERSION,
REG_ADC1,
REG_ADC2,
REG_MCU_AUTO_RESET,
REG_MAX
};
#define DSI_DCS_WRITE(dsi, seq...) \
{ \
int ret = 0; \
const u8 d[] = { seq }; \
ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
if (ret < 0) \
return ret; \
}
struct panel_data {
void (*set_dsi)(struct mipi_dsi_device *dsi);
const struct drm_panel_funcs *funcs;
};
struct i2c_mipi_dsi {
struct i2c_client *i2c;
struct mutex mutex;
// panel
struct drm_panel panel;
struct panel_data *panel_data;
// dsi
struct mipi_dsi_device *dsi;
// tp
struct input_dev *input;
struct touchscreen_properties prop;
uint32_t tp_point_rotate;
// backlight
int brightness;
// mcu auto reset enable when the tp driver is not working
uint32_t mcu_auto_reset;
};
#define panel_to_md(_p) container_of(_p, struct i2c_mipi_dsi, panel)
static int i2c_md_read(struct i2c_mipi_dsi *md, u8 reg, u8 *buf, int len);
#endif /*End of header guard macro */

1
drivers/i2c/busses/i2c-designware-core.h
View File

@@ -107,6 +107,7 @@
#define DW_IC_STATUS_ACTIVITY 0x1
#define DW_IC_STATUS_TFE BIT(2)
#define DW_IC_STATUS_RFNE BIT(3)
#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)

8
drivers/i2c/busses/i2c-designware-master.c
View File

@@ -613,7 +613,7 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev)
*/
static int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
{
u32 stat;
u32 stat, status;
stat = i2c_dw_read_clear_intrbits(dev);
if (stat & DW_IC_INTR_TX_ABRT) {
@@ -641,7 +641,11 @@ static int i2c_dw_irq_handler_master(struct dw_i2c_dev *dev)
*/
tx_aborted:
if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err)
regmap_read(dev->map, DW_IC_STATUS, &status);
if ((stat & DW_IC_INTR_TX_ABRT) || dev->msg_err ||
((status & DW_IC_STATUS_TFE) &&
(!(status & DW_IC_STATUS_RFNE)) &&
(!(status & DW_IC_STATUS_MASTER_ACTIVITY))))
complete(&dev->cmd_complete);
else if (unlikely(dev->flags & ACCESS_INTR_MASK)) {
/* Workaround to trigger pending interrupt */

2
drivers/irqchip/irq-riscv-intc.c
View File

@@ -30,6 +30,7 @@ static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
#define MATCH_DCACHE_CVAL1 0x0240000b
#define MASK_DCACHE_CVAL1 0xfff07fff
pagefault_disable();
if ((epc & 0x7f) != 4)
goto out;
@@ -47,6 +48,7 @@ static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
instruction_pointer_set(regs, epc - 4);
out:
pagefault_enable();
if (unlikely(cause >= BITS_PER_LONG))
panic("unexpected interrupt cause");

10
drivers/mmc/host/sdhci-of-dwcmshc.c
View File

@@ -28,7 +28,6 @@
struct dwcmshc_priv {
struct clk *bus_clk;
void __iomem *soc_base;
bool is_emmc_card;
bool pull_up_en;
bool io_fixed_1v8;
@@ -289,12 +288,6 @@ static void snps_sdhci_reset(struct sdhci_host *host, u8 mask)
pltfm_host = sdhci_priv(host);
priv = sdhci_pltfm_priv(pltfm_host);
/*soc reset, fix host reset error*/
//soc_reg = readl( priv->soc_base);
//soc_reg &= ~1;
//writel(soc_reg, priv->soc_base);
//soc_reg |= 1;
//writel(soc_reg, priv->soc_base);
/*host reset*/
sdhci_reset(host, mask);
@@ -604,9 +597,6 @@ static int dwcmshc_probe(struct platform_device *pdev)
pltfm_host = sdhci_priv(host);
priv = sdhci_pltfm_priv(pltfm_host);
/*used fix sdhci reset error*/
priv->soc_base = devm_platform_ioremap_resource(pdev, 1);
if (device_property_present(&pdev->dev, "is_emmc")) {
priv->is_emmc_card = 1;
} else {

10
drivers/net/ethernet/stmicro/stmmac/Kconfig
View File

@@ -25,6 +25,16 @@ config STMMAC_SELFTESTS
feature if you are facing problems with your HW and submit the test
results to the netdev Mailing List.
config STMMAC_RX_ZERO_COPY
bool "Support for STMMAC Zero Copy in Recv"
default n
help
This adds support for STMMAC reduce memcpy packet ring_buffer data
to skb data in stmmac_rx. Enable this feature will alloc skb in filling
ring buffer, mapping skb->data to ring buffer DMA addr.
If unsure, say N.
config STMMAC_PLATFORM
tristate "STMMAC Platform bus support"
depends on STMMAC_ETH

9
drivers/net/ethernet/stmicro/stmmac/stmmac.h
View File

@@ -67,12 +67,18 @@ struct stmmac_rx_buffer {
dma_addr_t addr;
dma_addr_t sec_addr;
};
struct stmmac_rx_skbuffer {
struct sk_buff *rx_skbuff;
struct page *sec_page;
dma_addr_t addr;
dma_addr_t sec_addr;
};
struct stmmac_rx_queue {
u32 rx_count_frames;
u32 queue_index;
struct page_pool *page_pool;
struct stmmac_rx_buffer *buf_pool;
struct stmmac_rx_skbuffer *skbuf_pool;
struct stmmac_priv *priv_data;
struct dma_extended_desc *dma_erx;
struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
@@ -210,6 +216,7 @@ struct stmmac_priv {
unsigned int mode;
unsigned int chain_mode;
int extend_desc;
bool extend_stat_need;
struct hwtstamp_config tstamp_config;
struct ptp_clock *ptp_clock;
struct ptp_clock_info ptp_clock_ops;

255
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@@ -1324,7 +1324,7 @@ static void stmmac_clear_descriptors(struct stmmac_priv *priv)
for (queue = 0; queue < tx_queue_cnt; queue++)
stmmac_clear_tx_descriptors(priv, queue);
}
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
/**
* stmmac_init_rx_buffers - init the RX descriptor buffer.
* @priv: driver private structure
@@ -1335,18 +1335,21 @@ static void stmmac_clear_descriptors(struct stmmac_priv *priv)
* Description: this function is called to allocate a receive buffer, perform
* the DMA mapping and init the descriptor.
*/
static int stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p,
static int __stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p,
int i, gfp_t flags, u32 queue)
{
struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i];
gfp_t gfp = (GFP_ATOMIC | __GFP_NOWARN);
if (priv->dma_cap.addr64 <= 32)
gfp |= GFP_DMA32;
buf->page = page_pool_dev_alloc_pages(rx_q->page_pool);
buf->page = page_pool_alloc_pages(rx_q->page_pool,gfp);
if (!buf->page)
return -ENOMEM;
if (priv->sph) {
buf->sec_page = page_pool_dev_alloc_pages(rx_q->page_pool);
buf->sec_page = page_pool_alloc_pages(rx_q->page_pool,gfp);
if (!buf->sec_page)
return -ENOMEM;
@@ -1364,14 +1367,13 @@ static int stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p,
return 0;
}
/**
* stmmac_free_rx_buffer - free RX dma buffers
* @priv: private structure
* @queue: RX queue index
* @i: buffer index.
*/
static void stmmac_free_rx_buffer(struct stmmac_priv *priv, u32 queue, int i)
static void __stmmac_free_rx_buffer(struct stmmac_priv *priv, u32 queue, int i)
{
struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i];
@@ -1385,6 +1387,122 @@ static void stmmac_free_rx_buffer(struct stmmac_priv *priv, u32 queue, int i)
buf->sec_page = NULL;
}
#else
static inline unsigned int stmmac_get_rx_buf_frsize(struct stmmac_priv *priv)
{
return priv->dma_buf_sz;
}
#define STMMAC_RX_ALIGN 0x3f
static int
stmmac_get_skb_dma_addr(struct stmmac_priv *priv,struct sk_buff *skb,dma_addr_t *dma_addr)
{
int off;
off = ((unsigned long)skb->data) & STMMAC_RX_ALIGN;
if (off)
skb_reserve(skb, STMMAC_RX_ALIGN + 1 - off);
*dma_addr = dma_map_single(priv->device,skb->data,stmmac_get_rx_buf_frsize(priv) - off,DMA_FROM_DEVICE);
if (dma_mapping_error(priv->device, *dma_addr)) {
//if (net_ratelimit())
netdev_err(priv->dev, "Rx DMA memory map failed\n");
return -ENOMEM;
}
return 0;
}
/**
* stmmac_init_rx_skbuffers - init the RX descriptor buffer.
* @priv: driver private structure
* @p: descriptor pointer
* @i: descriptor index
* @flags: gfp flag
* @queue: RX queue index
* Description: this function is called to allocate a receive buffer, perform
* the DMA mapping and init the descriptor.
*/
static int __stmmac_init_rx_skbuffers(struct stmmac_priv *priv, struct dma_desc *p,
int i, gfp_t flags, u32 queue)
{
struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
struct stmmac_rx_skbuffer *buf = &rx_q->skbuf_pool[i];
struct sk_buff *skb = NULL;
gfp_t gfp = (GFP_ATOMIC | __GFP_NOWARN);
if (priv->dma_cap.addr64 <= 32)
gfp |= GFP_DMA32;
skb = netdev_alloc_skb(priv->dev, stmmac_get_rx_buf_frsize(priv));
if (!skb)
return -ENOMEM;
if(stmmac_get_skb_dma_addr(priv,skb,&buf->addr) < 0)
return -ENOMEM;
if (priv->sph) {
buf->sec_page = page_pool_alloc_pages(rx_q->page_pool,gfp);
if (!buf->sec_page)
return -ENOMEM;
buf->sec_addr = page_pool_get_dma_addr(buf->sec_page);
stmmac_set_desc_sec_addr(priv, p, buf->sec_addr, true);
} else {
buf->sec_page = NULL;
stmmac_set_desc_sec_addr(priv, p, buf->sec_addr, false);
}
stmmac_set_desc_addr(priv, p, buf->addr);
if (priv->dma_buf_sz == BUF_SIZE_16KiB)
stmmac_init_desc3(priv, p);
buf->rx_skbuff = skb;
return 0;
}
/**
* stmmac_free_rx_skbuffer - free RX dma buffers
* @priv: private structure
* @queue: RX queue index
* @i: buffer index.
*/
static void __stmmac_free_rx_skbuffer(struct stmmac_priv *priv, u32 queue, int i)
{
struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
struct stmmac_rx_skbuffer *buf = &rx_q->skbuf_pool[i];
if (buf->rx_skbuff){
dma_unmap_single(priv->device,
buf->addr,
stmmac_get_rx_buf_frsize(priv) - STMMAC_RX_ALIGN,
DMA_FROM_DEVICE);
dev_kfree_skb(buf->rx_skbuff);
buf->rx_skbuff = NULL;
}
if (buf->sec_page)
page_pool_put_full_page(rx_q->page_pool, buf->sec_page, false);
buf->sec_page = NULL;
}
#endif
static int stmmac_init_rx_buffers(struct stmmac_priv *priv, struct dma_desc *p,
int i, gfp_t flags, u32 queue)
{
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
return __stmmac_init_rx_buffers(priv,p,i,flags,queue);
#else
return __stmmac_init_rx_skbuffers(priv,p,i,flags,queue);
#endif
}
static void stmmac_free_rx_buffer(struct stmmac_priv *priv, u32 queue, int i)
{
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
__stmmac_free_rx_buffer(priv,queue,i);
#else
__stmmac_free_rx_skbuffer(priv,queue,i);
#endif
}
/**
* stmmac_free_tx_buffer - free RX dma buffers
* @priv: private structure
@@ -1644,8 +1762,11 @@ static void free_dma_rx_desc_resources(struct stmmac_priv *priv)
dma_free_coherent(priv->device, priv->dma_rx_size *
sizeof(struct dma_extended_desc),
rx_q->dma_erx, rx_q->dma_rx_phy);
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
kfree(rx_q->buf_pool);
#else
kfree(rx_q->skbuf_pool);
#endif
if (rx_q->page_pool)
page_pool_destroy(rx_q->page_pool);
}
@@ -1711,7 +1832,6 @@ static int alloc_dma_rx_desc_resources(struct stmmac_priv *priv)
rx_q->queue_index = queue;
rx_q->priv_data = priv;
pp_params.flags = PP_FLAG_DMA_MAP;
pp_params.pool_size = priv->dma_rx_size;
num_pages = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE);
@@ -1726,13 +1846,19 @@ static int alloc_dma_rx_desc_resources(struct stmmac_priv *priv)
rx_q->page_pool = NULL;
goto err_dma;
}
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
rx_q->buf_pool = kcalloc(priv->dma_rx_size,
sizeof(*rx_q->buf_pool),
GFP_KERNEL);
if (!rx_q->buf_pool)
goto err_dma;
#else
rx_q->skbuf_pool = kcalloc(priv->dma_rx_size,
sizeof(*rx_q->skbuf_pool),
GFP_KERNEL);
if (!rx_q->skbuf_pool)
goto err_dma;
#endif
if (priv->extend_desc) {
rx_q->dma_erx = dma_alloc_coherent(priv->device,
priv->dma_rx_size *
@@ -3664,27 +3790,37 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)
struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
int len, dirty = stmmac_rx_dirty(priv, queue);
unsigned int entry = rx_q->dirty_rx;
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
struct stmmac_rx_buffer *buf;
#else
struct stmmac_rx_skbuffer *buf ;
struct sk_buff *skb = NULL;
#endif
gfp_t gfp = (GFP_ATOMIC | __GFP_NOWARN);
if (priv->dma_cap.addr64 <= 32)
gfp |= GFP_DMA32;
len = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;
while (dirty-- > 0) {
struct stmmac_rx_buffer *buf = &rx_q->buf_pool[entry];
struct dma_desc *p;
bool use_rx_wd;
if (priv->extend_desc)
p = (struct dma_desc *)(rx_q->dma_erx + entry);
else
p = rx_q->dma_rx + entry;
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
buf = &rx_q->buf_pool[entry];
if (!buf->page) {
buf->page = page_pool_dev_alloc_pages(rx_q->page_pool);
buf->page = page_pool_alloc_pages(rx_q->page_pool,gfp);
if (!buf->page)
break;
}
if (priv->sph && !buf->sec_page) {
buf->sec_page = page_pool_dev_alloc_pages(rx_q->page_pool);
buf->sec_page = page_pool_alloc_pages(rx_q->page_pool,gfp);
if (!buf->sec_page)
break;
@@ -3695,12 +3831,47 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)
}
buf->addr = page_pool_get_dma_addr(buf->page);
/* Sync whole allocation to device. This will invalidate old
* data.
*/
dma_sync_single_for_device(priv->device, buf->addr, len,
DMA_FROM_DEVICE);
#else
buf = &rx_q->skbuf_pool[entry];
if(likely(!buf->rx_skbuff)){
len = stmmac_get_rx_buf_frsize(priv);
skb = netdev_alloc_skb(priv->dev, len);
if (!skb){
//priv->dev->stats.rx_dropped += (1ul<<32);
netdev_err(priv->dev, "%s: dalloc_skb failed,dirty ring %d :\n", __func__,dirty);
break;
}
if(stmmac_get_skb_dma_addr(priv,skb,&buf->addr) < 0){
//priv->dev->stats.rx_dropped += (1ul<<32);
break;
}
buf->rx_skbuff = skb;
}
/* Sync whole allocation to device. This will invalidate old
* data.
*/
dma_sync_single_for_device(priv->device, buf->addr, len,
DMA_FROM_DEVICE);
if (priv->sph && !buf->sec_page) {
buf->sec_page = page_pool_alloc_pages(rx_q->page_pool,gfp);
if (!buf->sec_page)
break;
buf->sec_addr = page_pool_get_dma_addr(buf->sec_page);
dma_sync_single_for_device(priv->device, buf->sec_addr,
len, DMA_FROM_DEVICE);
}
#endif
stmmac_set_desc_addr(priv, p, buf->addr);
if (priv->sph)
@@ -3815,7 +3986,11 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
while (count < limit) {
unsigned int buf1_len = 0, buf2_len = 0;
enum pkt_hash_types hash_type;
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
struct stmmac_rx_buffer *buf;
#else
struct stmmac_rx_skbuffer *skbuf;
#endif
struct dma_desc *np, *p;
int entry;
u32 hash;
@@ -3838,8 +4013,11 @@ read_again:
buf1_len = 0;
buf2_len = 0;
entry = next_entry;
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
buf = &rx_q->buf_pool[entry];
#else
skbuf = &rx_q->skbuf_pool[entry];
#endif
if (priv->extend_desc)
p = (struct dma_desc *)(rx_q->dma_erx + entry);
else
@@ -3863,12 +4041,14 @@ read_again:
prefetch(np);
if (priv->extend_desc)
if (priv->extend_desc && priv->extend_stat_need)
stmmac_rx_extended_status(priv, &priv->dev->stats,
&priv->xstats, rx_q->dma_erx + entry);
if (unlikely(status == discard_frame)) {
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
page_pool_recycle_direct(rx_q->page_pool, buf->page);
buf->page = NULL;
#endif
error = 1;
if (!priv->hwts_rx_en)
priv->dev->stats.rx_errors++;
@@ -3884,11 +4064,14 @@ read_again:
}
/* Buffer is good. Go on. */
#ifndef CONFIG_STMMAC_RX_ZERO_COPY
prefetch(page_address(buf->page));
if (buf->sec_page)
prefetch(page_address(buf->sec_page));
#else
skb = skbuf->rx_skbuff;
prefetch(skb->data);
#endif
buf1_len = stmmac_rx_buf1_len(priv, p, status, len);
len += buf1_len;
buf2_len = stmmac_rx_buf2_len(priv, p, status, len);
@@ -3911,7 +4094,30 @@ read_again:
len -= ETH_FCS_LEN;
}
#ifdef CONFIG_STMMAC_RX_ZERO_COPY
skb = skbuf->rx_skbuff;
if (!skb) {
priv->dev->stats.rx_dropped++;
count++;
goto drain_data;
}
dma_sync_single_for_cpu(priv->device, skbuf->addr,
buf1_len, DMA_FROM_DEVICE);
skb_put(skb, buf1_len);
skbuf->rx_skbuff = NULL;
if (buf2_len) {
dma_sync_single_for_cpu(priv->device, skbuf->sec_addr,
buf2_len, DMA_FROM_DEVICE);
skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
skbuf->sec_page, 0, buf2_len,
priv->dma_buf_sz);
/* Data payload appended into SKB */
page_pool_release_page(rx_q->page_pool, skbuf->sec_page);
skbuf->sec_page = NULL;
}
#else
if (!skb) {
skb = napi_alloc_skb(&ch->rx_napi, buf1_len);
if (!skb) {
@@ -3952,7 +4158,7 @@ read_again:
page_pool_release_page(rx_q->page_pool, buf->sec_page);
buf->sec_page = NULL;
}
#endif
drain_data:
if (likely(status & rx_not_ls))
goto read_again;
@@ -4104,8 +4310,12 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
new_mtu = STMMAC_ALIGN(new_mtu);
/* If condition true, FIFO is too small or MTU too large */
if ((txfifosz < new_mtu) || (new_mtu > BUF_SIZE_16KiB))
if ((txfifosz && txfifosz < new_mtu) || (new_mtu > BUF_SIZE_16KiB)){
netdev_err(priv->dev,"FIFO is too small or MTU too large\n");
printk("new_mtu %d -- %d,%d,%d \n",new_mtu,txfifosz,priv->plat->tx_fifo_size,priv->dma_cap.tx_fifo_size);
return -EINVAL;
}
dev->mtu = mtu;
@@ -5083,6 +5293,11 @@ int stmmac_dvr_probe(struct device *device,
priv->dma_cap.addr64 = 32;
}
}
if(priv->dma_cap.addr64 <= 32){
skb_set_alloc_dma32(GFP_DMA32);
}
dev_info(priv->device, "Using %d bits DMA width,skb alloc dma32 flag %x\n",
priv->dma_cap.addr64,skb_get_alloc_dma32());
ndev->features |= ndev->hw_features | NETIF_F_HIGHDMA;
ndev->watchdog_timeo = msecs_to_jiffies(watchdog);

1
drivers/net/phy/realtek.c
View File

@@ -635,6 +635,7 @@ static struct phy_driver realtek_drvs[] = {
.name = "RTL8211F Gigabit Ethernet",
.config_init = &rtl8211f_config_init,
.ack_interrupt = &rtl8211f_ack_interrupt,
.read_status = rtlgen_read_status,
.config_intr = &rtl8211f_config_intr,
.suspend = genphy_suspend,
.resume = rtl821x_resume,

126
drivers/nvmem/light-efuse.c
View File

@@ -37,6 +37,7 @@
#define SHADOW_RDATA6 0xd8
#define SHADOW_RDATA7 0xdc
#define TEE_SYS_EFUSE_LC_PRELD_OFF 0x64
#define TEE_SYS_EFUSE_DBG_KEY1_OFF 0x70
#define ENABLE_DFT_FUNC_MASK GENMASK(3, 0)
#define ENABLE_DFT_FUNC 0x5
@@ -837,14 +838,139 @@ exit:
return ret < 0 ? ret : count;
}
static ssize_t lc_preld_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct light_efuse_priv *priv = dev_get_drvdata(dev);
int ret;
u32 data;
ret = regmap_read(priv->teesys_regs, TEE_SYS_EFUSE_LC_PRELD_OFF, &data);
if (ret) {
dev_err(dev, "failed to read data from LC_PRELD area\n");
return ret;
}
return sprintf(buf, "0x%08x\n", data);
}
static ssize_t update_lc_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct light_efuse_priv *priv = dev_get_drvdata(dev);
int ret;
u32 value, data;
const char *p, *life_cycle = buf;
int len;
p = memchr(buf, '\n', count);
len = p ? p - buf : count;
dev_dbg(dev, "life_cycle: %s, buf: %s, len: %d\n", life_cycle, buf, len);
if (!strncmp(life_cycle, "LC_RMA", len)) {
/* If target life cycle is RMA, open permission in teesystem regs */
ret = regmap_read(priv->teesys_regs,
TEE_SYS_EFUSE_DBG_KEY1_OFF,
&data); /* Register from tee system */
if (ret) {
dev_err(dev, "failed to read data from DBG_KEY1 area\n");
return ret;
}
data &= ~0xf;
data |= 0x5;
ret = regmap_write(priv->teesys_regs,
TEE_SYS_EFUSE_DBG_KEY1_OFF,
data);
if (ret) {
dev_err(dev, "failed to write data to DBG_KEY1 area\n");
return ret;
}
value = 0x1A946F9B;
} else if (!strncmp(life_cycle, "LC_OEM", len))
value = 0x64EA9B8E;
else if (!strncmp(life_cycle, "LC_PRO", len))
value = 0xB0E047A8;
else if (!strncmp(life_cycle, "LC_DEV", len))
value = 0x59DD3BDF;
else if (!strncmp(life_cycle, "LC_RIP", len))
value = 0xEE45E8A7;
else if (!strncmp(life_cycle, "LC_KILL_KEY1", len))
value = 0x7D8E9CA1;
else if (!strncmp(life_cycle, "LC_KILL_KEY0", len))
value = 0xC29F604B;
else {
dev_err(dev, "invalid life cycle type!\n");
return -EINVAL;
}
/*
* Check permission:
* Check it every time to avoid wp0~3 are changed somewhere
*/
efuse_permission_magic_config(priv->base, cmd_perm_magic_num, CMD_UPDATE_LC);
/* Config life cycle */
efuse_life_cycle_para_config(priv->base, value);
/* set command */
ret = efuse_cmd_start(priv->base, CON_CMD_UP_LC);
if (ret)
goto exit;
/* Wait controller completed */
ret = efuse_idle_check(priv->base);
exit:
/* Check status, if there has error, reort and clear status */
ret |= efuse_status_check(priv->base);
if (ret)
dev_err(dev, "error occurs while starting write\n");
efuse_data_clear(priv->base);
if (strncmp(life_cycle, "LC_RMA", len))
goto out;
dev_info(dev, "set LC_RMA life cycle\n");
/* If target life cycle is RMA, close permission in teesystem regs */
ret = regmap_read(priv->teesys_regs,
TEE_SYS_EFUSE_DBG_KEY1_OFF,
&data); /* Register from tee system */
if (ret) {
dev_err(dev, "failed to read data from DBG_KEY1 area\n");
return ret;
}
data &= ~0xf;
data |= 0xa;
ret = regmap_write(priv->teesys_regs,
TEE_SYS_EFUSE_DBG_KEY1_OFF,
data);
if (ret) {
dev_err(dev, "failed to write data to DBG_KEY1 area\n");
return ret;
}
out:
return ret < 0 ? ret : count;
}
static DEVICE_ATTR_WO(rma_lc);
static DEVICE_ATTR_WO(rip_lc);
static DEVICE_ATTR_RW(efuse_nvmem);
static DEVICE_ATTR_RO(lc_preld);
static DEVICE_ATTR_WO(update_lc);
static struct attribute *light_efuse_sysfs_entries[] = {
&dev_attr_efuse_nvmem.attr,
&dev_attr_rip_lc.attr,
&dev_attr_rma_lc.attr,
&dev_attr_lc_preld.attr,
&dev_attr_update_lc.attr,
NULL
};

2
drivers/phy/synopsys/phy-dw-mipi-dphy.c
View File

@@ -473,7 +473,7 @@ static int dw_dphy_get_pll_cfg(struct dw_dphy *dphy,
vco_div = 1 << (range->vco_range >> 4);
fout = fout * vco_div;
pr_info("%s: vco_div = %u\n", __func__, vco_div);
pr_debug("%s: vco_div = %u\n", __func__, vco_div);
n_min = DIV_ROUND_UP_ULL(fin, FIN_DIV_N_FREQ_MAX * 1000);
n_max = DIV_ROUND_UP_ULL(fin, FIN_DIV_N_FREQ_MIN * 1000);

102
drivers/pinctrl/thead/pinctrl-light.c
View File

@@ -18,9 +18,18 @@
#include <dt-bindings/pinctrl/light-fm-right-pinctrl.h>
#include <dt-bindings/pinctrl/light-fm-left-pinctrl.h>
#include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
#include <dt-bindings/pinctrl/light-fm-audio-pinctrl.h>
#include "../core.h"
enum light_pinctrl_type {
LIGHT_MPW,
LIGHT_FM_RIGHT,
LIGHT_FM_LEFT,
LIGHT_FM_AON,
LIGHT_FM_AUDIO,
};
struct light_pin {
unsigned int pin_id;
unsigned int mux_mode;
@@ -50,6 +59,8 @@ struct light_pinctrl_soc_info {
unsigned int grp_index;
struct light_pmx_func *functions;
unsigned int nfunctions;
char *label;
enum light_pinctrl_type type;
unsigned int cfg_off;
unsigned int mux_off;
@@ -66,6 +77,7 @@ struct light_pinctrl {
#define LIGHT_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
#define LIGHT_PAD_CONFIG(idx) (priv->info->cfg_off + (idx >> 1) * 4)
#define LIGHT_PAD_MUX(idx) (priv->info->mux_off + ((idx >> 3) * 4))
#define LIGHT_AUDIO_PAD_MUX(idx) (priv->info->mux_off + ((idx >> 4) * 4))
static const char *pin_get_name_from_info(struct light_pinctrl_soc_info *info,
const unsigned int pin_id)
@@ -247,13 +259,31 @@ static int light_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
continue;
}
mux = readl(priv->base + LIGHT_PAD_MUX(pin_id));
shift = ((pin_id % 8) << 2);
mux &= ~(0xF << shift); /* 4 mux bits for one pad */
mux |= (pin->mux_mode << shift);
writel(mux, priv->base + LIGHT_PAD_MUX(pin_id));
dev_dbg(priv->dev, "write: offset 0x%x val 0x%x\n",
LIGHT_PAD_MUX(pin_id), mux);
if (info->type == LIGHT_FM_AUDIO) {
if (pin->mux_mode == AUDIO_IO_GPIO) {
mux = ~(1 << pin_id) & readl(priv->base);
writel(mux, priv->base); /* Controlled by GPIO under AUDIO_SUBSYS */
continue;
}
mux = (1 << pin_id) | readl(priv->base);
writel(mux, priv->base);
mux = readl(priv->base + LIGHT_AUDIO_PAD_MUX(pin_id));
shift = ((pin_id % 16) << 1);
mux &= ~(0x3 << shift); /* 2 mux bits for one pad */
mux |= (pin->mux_mode << shift);
writel(mux, priv->base + LIGHT_AUDIO_PAD_MUX(pin_id));
dev_dbg(priv->dev, "write: offset 0x%x val 0x%x\n",
LIGHT_AUDIO_PAD_MUX(pin_id), mux);
} else {
mux = readl(priv->base + LIGHT_PAD_MUX(pin_id));
shift = ((pin_id % 8) << 2);
mux &= ~(0xF << shift); /* 4 mux bits for one pad */
mux |= (pin->mux_mode << shift);
writel(mux, priv->base + LIGHT_PAD_MUX(pin_id));
dev_dbg(priv->dev, "write: offset 0x%x val 0x%x\n",
LIGHT_PAD_MUX(pin_id), mux);
}
}
return 0;
@@ -430,7 +460,15 @@ static int light_pinctrl_parse_groups(struct device_node *np,
struct light_pin *pin = &grp->pins[i];
pin->pin_id = be32_to_cpu(*list++);
pin->mux_mode = be32_to_cpu(*list++) & 0xF;
if (info->type == LIGHT_FM_AUDIO) {
pin->mux_mode = be32_to_cpu(*list++);
if (pin->mux_mode != AUDIO_IO_GPIO){
pin->mux_mode &= 0x3;
}
} else {
pin->mux_mode = be32_to_cpu(*list++) & 0xF;
}
pin->config = be32_to_cpu(*list++) & 0xFFFF;
grp->pin_ids[i] = grp->pins[i].pin_id;
@@ -841,6 +879,40 @@ static const struct pinctrl_pin_desc light_fm_aon_pinctrl_pads[] = {
LIGHT_PINCTRL_PIN(FM_AUDIO_PA30),
};
static const struct pinctrl_pin_desc light_fm_audio_pinctrl_pads[] = {
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA0),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA1),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA2),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA3),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA4),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA5),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA6),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA7),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA8),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA9),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA10),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA11),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA12),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA13),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA14),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA15),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA16),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA17),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA18),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA19),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA20),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA21),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA22),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA23),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA24),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA25),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA26),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA27),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA28),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA29),
LIGHT_PINCTRL_PIN(FM_AUDIO_IO_PA30),
};
static int light_pinctrl_mpw_convert_pin_off(const unsigned int pin_id)
{
unsigned int cov_pin_id = pin_id;
@@ -865,6 +937,7 @@ static int light_pinctrl_fm_aon_covert_pin_off(const unsigned int pin_id)
static struct light_pinctrl_soc_info light_mpw_pinctrl_info = {
.pins = light_mpw_pinctrl_pads,
.npins = ARRAY_SIZE(light_mpw_pinctrl_pads),
.type = LIGHT_MPW,
.cfg_off = 0x4c,
.mux_off = 0x404,
.covert_pin_off = light_pinctrl_mpw_convert_pin_off,
@@ -873,6 +946,7 @@ static struct light_pinctrl_soc_info light_mpw_pinctrl_info = {
static struct light_pinctrl_soc_info light_fm_right_pinctrl_info = {
.pins = light_fm_right_pinctrl_pads,
.npins = ARRAY_SIZE(light_fm_right_pinctrl_pads),
.type = LIGHT_FM_RIGHT,
.cfg_off = 0x0,
.mux_off = 0x400,
};
@@ -880,6 +954,7 @@ static struct light_pinctrl_soc_info light_fm_right_pinctrl_info = {
static struct light_pinctrl_soc_info light_fm_left_pinctrl_info = {
.pins = light_fm_left_pinctrl_pads,
.npins = ARRAY_SIZE(light_fm_left_pinctrl_pads),
.type = LIGHT_FM_LEFT,
.cfg_off = 0x0,
.mux_off = 0x400,
};
@@ -887,16 +962,27 @@ static struct light_pinctrl_soc_info light_fm_left_pinctrl_info = {
static struct light_pinctrl_soc_info light_fm_aon_pinctrl_info = {
.pins = light_fm_aon_pinctrl_pads,
.npins = ARRAY_SIZE(light_fm_aon_pinctrl_pads),
.type = LIGHT_FM_AON,
.cfg_off = 0x0,
.mux_off = 0x400,
.covert_pin_off = light_pinctrl_fm_aon_covert_pin_off,
};
static struct light_pinctrl_soc_info light_fm_audio_pinctrl_info = {
.pins = light_fm_audio_pinctrl_pads,
.npins = ARRAY_SIZE(light_fm_audio_pinctrl_pads),
.label = "LIGHT-AUDIO-IO",
.type = LIGHT_FM_AUDIO,
.cfg_off = 0x0C,
.mux_off = 0x4,
};
static const struct of_device_id light_pinctrl_of_match[] = {
{ .compatible = "thead,light-mpw-pinctrl", .data = &light_mpw_pinctrl_info},
{ .compatible = "thead,light-fm-right-pinctrl", .data = &light_fm_right_pinctrl_info},
{ .compatible = "thead,light-fm-left-pinctrl", .data = &light_fm_left_pinctrl_info},
{ .compatible = "thead,light-fm-aon-pinctrl", .data = &light_fm_aon_pinctrl_info},
{ .compatible = "thead,light-fm-audio-pinctrl", .data = &light_fm_audio_pinctrl_info},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, light_pinctrl_of_match);

6
drivers/soc/thead/Kconfig
View File

@@ -16,6 +16,12 @@ config LIGHT_SUSPEND
help
This driver supports system suspend low power feature in Light FM platform
config LIGHT_REBOOTMODE
bool "Thead light rebootmode support"
default y
help
This driver supports check rebootmode feature in Light FM platform
endmenu
endif

1
drivers/soc/thead/Makefile
View File

@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_LIGHT_IOPMP) += light-iopmp.o
obj-$(CONFIG_LIGHT_SUSPEND) += pm-light.o
obj-$(CONFIG_LIGHT_REBOOTMODE) += light_event.o

278
drivers/soc/thead/light_event.c Normal file
View File

@@ -0,0 +1,278 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/platform_device.h>
#include <linux/firmware/thead/ipc.h>
#include <linux/firmware/thead/light_event.h>
/*
* AON SRAM total size is 0x10000, reserve 0x100 for event.
* Notice: c902 *.ld also need resize.
* -------------- 0xff_ffef8000
* | |
* | |
* | |
* | c902 |
* | |
* | |
* | |
* -------------- 0xff_fff07f00
* | reserve |
* | |
* --------------
*/
#define LIGHT_AON_SRAM_LEN 0x10000
#define LIGHT_AON_SRAM_RESERV (LIGHT_AON_SRAM_LEN - 0x100)
#define LIGHT_EVENT_OFFSET (LIGHT_AON_SRAM_RESERV + 0x10)
#define LIGHT_EVENT_CHECK (LIGHT_EVENT_OFFSET + 0x4)
#define LIGHT_EVENT_MAGIC 0x5A5A5A5A
struct light_aon_msg_event_ctrl {
struct light_aon_rpc_msg_hdr hdr;
u32 reserve_offset;
u32 reserved[5];
} __packed __aligned(4);
struct light_event {
struct device *dev;
struct light_aon_ipc *ipc_handle;
struct light_aon_msg_event_ctrl msg;
struct regmap *aon_iram;
bool init;
};
struct light_event *light_event;
static void light_event_msg_hdr_fill(struct light_aon_rpc_msg_hdr *hdr, enum light_aon_misc_func func)
{
hdr->ver = LIGHT_AON_RPC_VERSION;
hdr->svc = (uint8_t)LIGHT_AON_RPC_SVC_MISC;
hdr->func = (uint8_t)func;
hdr->size = LIGHT_AON_RPC_MSG_NUM;
}
static int light_event_aon_reservemem(struct light_event *event)
{
struct light_aon_ipc *ipc = event->ipc_handle;
int ret = 0;
dev_dbg(light_event->dev, "aon reservemem...\n");
light_event_msg_hdr_fill(&event->msg.hdr, LIGHT_AON_MISC_FUNC_AON_RESERVE_MEM);
event->msg.reserve_offset = LIGHT_EVENT_OFFSET;
ret = light_aon_call_rpc(ipc, &event->msg, true);
if (ret)
dev_err(light_event->dev, "failed to set aon reservemem\n");
return ret;
}
int light_event_set_rebootmode(enum light_rebootmode_index mode)
{
int ret;
if (!light_event->init)
return -EINVAL;
ret = regmap_write(light_event->aon_iram, LIGHT_EVENT_OFFSET, mode);
if (ret) {
dev_err(light_event->dev, "set rebootmode failed,ret:%d\n", ret);
return ret;
}
dev_info(light_event->dev, "set rebootmode:0x%x\n", mode);
return 0;
}
EXPORT_SYMBOL_GPL(light_event_set_rebootmode);
int light_event_get_rebootmode(enum light_rebootmode_index *mode)
{
int ret;
if (!light_event->init)
return -EINVAL;
ret = regmap_read(light_event->aon_iram, LIGHT_EVENT_OFFSET, mode);
if (ret) {
dev_err(light_event->dev, "get rebootmode failed,ret:%d\n", ret);
return ret;
}
dev_dbg(light_event->dev, "%s get rebootmode:0x%x\n", __func__, *mode);
return 0;
}
EXPORT_SYMBOL_GPL(light_event_get_rebootmode);
static int light_event_check_powerup(void)
{
enum light_rebootmode_index mode;
unsigned int val;
int ret;
if (!light_event->init)
return -EINVAL;
ret = regmap_read(light_event->aon_iram, LIGHT_EVENT_CHECK, &val);
if (ret) {
dev_err(light_event->dev, "get magicnum failed,ret:%d\n", ret);
return ret;
}
ret = regmap_read(light_event->aon_iram, LIGHT_EVENT_OFFSET, &mode);
if (ret) {
dev_err(light_event->dev, "get rebootmode failed,ret:%d\n", ret);
return ret;
}
dev_info(light_event->dev, "magicnum:0x%x mode:0x%x\n", val, mode);
/* powerup means SRAM data is randam */
if (val != LIGHT_EVENT_MAGIC && mode != LIGHT_EVENT_PMIC_ONKEY)
light_event_set_rebootmode(LIGHT_EVENT_PMIC_POWERUP);
ret = regmap_write(light_event->aon_iram, LIGHT_EVENT_CHECK, LIGHT_EVENT_MAGIC);
if (ret) {
dev_err(light_event->dev, "set magicnum failed,ret:%d\n", ret);
return ret;
}
return 0;
}
static ssize_t rebootmode_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
enum light_rebootmode_index mode;
if (kstrtouint(buf, 0, &mode) < 0)
return -EINVAL;
light_event_set_rebootmode(mode);
return count;
}
static ssize_t
rebootmode_show(struct device *dev, struct device_attribute *attr, char *buf)
{
enum light_rebootmode_index mode;
light_event_get_rebootmode(&mode);
return sprintf(buf, "0x%x\n", mode);
}
static DEVICE_ATTR_RW(rebootmode);
static struct attribute *event_attrs[] = {
&dev_attr_rebootmode.attr,
NULL
};
ATTRIBUTE_GROUPS(event);
static int light_event_open(struct inode *inode, struct file *f)
{
return 0;
}
static int light_event_release(struct inode *inode, struct file *f)
{
return 0;
}
static long light_event_ioctl(struct file *f, unsigned int ioctl,
unsigned long arg)
{
return 0;
}
static const struct file_operations light_event_fops = {
.owner = THIS_MODULE,
.release = light_event_release,
.open = light_event_open,
.unlocked_ioctl = light_event_ioctl,
};
static struct miscdevice light_event_misc = {
.minor = MISC_DYNAMIC_MINOR,
.name = "light-event",
.fops = &light_event_fops,
};
static int light_event_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct light_event *thead;
int ret;
thead = devm_kzalloc(&pdev->dev, sizeof(*thead), GFP_KERNEL);
if (!thead)
return -ENOMEM;
light_event = thead;
ret = light_aon_get_handle(&(thead->ipc_handle));
if (ret == -EPROBE_DEFER)
return ret;
platform_set_drvdata(pdev, thead);
thead->dev = &pdev->dev;
thead->aon_iram = syscon_regmap_lookup_by_phandle(np, "aon-iram-regmap");
if (IS_ERR(thead->aon_iram))
return PTR_ERR(thead->aon_iram);
ret = misc_register(&light_event_misc);
if (ret < 0)
return ret;
ret = light_event_aon_reservemem(thead);
if (ret) {
dev_err(dev, "set aon reservemem failed!\n");
return -EPERM;
}
thead->init = true;
ret = light_event_check_powerup();
if (ret) {
dev_err(dev, "check powerup failed!\n");
return -EPERM;
}
dev_info(dev, "light-event driver init successfully\n");
return 0;
}
static int light_event_remove(struct platform_device *pdev)
{
misc_deregister(&light_event_misc);
return 0;
}
static const struct of_device_id light_event_of_match[] = {
{ .compatible = "thead,light-event" },
{ },
};
MODULE_DEVICE_TABLE(of, light_event_of_match);
static struct platform_driver light_event_driver = {
.probe = light_event_probe,
.remove = light_event_remove,
.driver = {
.name = "light-event",
.dev_groups = event_groups,
.of_match_table = light_event_of_match,
},
};
module_platform_driver(light_event_driver);
MODULE_DESCRIPTION("light-event driver");
MODULE_LICENSE("GPL v2");

29
drivers/usb/dwc3/dwc3-thead.c
View File

@@ -14,6 +14,8 @@
#include <linux/kernel.h>
#include <linux/extcon.h>
#include <linux/of_platform.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/platform_device.h>
@@ -83,6 +85,11 @@ struct dwc3_thead {
struct notifier_block vbus_nb;
struct notifier_block host_nb;
struct gpio_desc *hubswitch;
struct regulator *hub1v2;
struct regulator *hub5v;
struct regulator *vbus;
enum usb_dr_mode mode;
bool is_suspended;
bool pm_suspended;
@@ -248,6 +255,28 @@ static int dwc3_thead_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, thead);
thead->dev = &pdev->dev;
thead->hubswitch = devm_gpiod_get(dev, "hubswitch", GPIOD_OUT_HIGH);
if (IS_ERR(thead->hubswitch))
dev_dbg(dev, "no need to get hubswitch GPIO\n");
thead->vbus = devm_regulator_get(dev, "vbus");
if (IS_ERR(thead->vbus))
dev_dbg(dev, "no need to get vbus\n");
else
regulator_enable(thead->vbus);
thead->hub1v2 = devm_regulator_get(dev, "hub1v2");
if (IS_ERR(thead->hub1v2))
dev_dbg(dev, "no need to set hub1v2\n");
else
regulator_enable(thead->hub1v2);
thead->hub5v = devm_regulator_get(dev, "hub5v");
if (IS_ERR(thead->hub5v))
dev_dbg(dev, "no need to set hub5v\n");
else
regulator_enable(thead->hub5v);
thead->misc_sysreg = syscon_regmap_lookup_by_phandle(np, "usb3-misc-regmap");
if (IS_ERR(thead->misc_sysreg))
return PTR_ERR(thead->misc_sysreg);

2
drivers/watchdog/dw_wdt.c
View File

@@ -29,6 +29,7 @@
#include <linux/reset.h>
#include <linux/watchdog.h>
#include <linux/debugfs.h>
#include <linux/firmware/thead/light_event.h>
#define WDOG_CONTROL_REG_OFFSET 0x00
#define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
@@ -376,6 +377,7 @@ static irqreturn_t dw_wdt_irq(int irq, void *devid)
pr_warn("watchdog irq enter. however status is 0\n");
return IRQ_NONE;
}
light_event_set_rebootmode(LIGHT_EVENT_SW_WATCHDOG);
WARN(1, "watchdog app was stuck! watchdog pretimeout event\n");
watchdog_notify_pretimeout(&dw_wdt->wdd);

2
drivers/watchdog/light_wdt.c
View File

@@ -17,6 +17,7 @@
#include <linux/device.h>
#include <linux/watchdog.h>
#include <linux/firmware/thead/ipc.h>
#include <linux/firmware/thead/light_event.h>
#define DRV_NAME "light-wdt"
@@ -189,6 +190,7 @@ static int light_wdt_restart(struct watchdog_device *wdd, unsigned long action,
pr_debug("[%s,%d]: Inform aon to restart the whole system....\n", __func__, __LINE__);
light_event_set_rebootmode(LIGHT_EVENT_SW_REBOOT);
ret = light_aon_call_rpc(ipc, &wdt_dev->msg, false);
if (ret)
return ret;

12
include/asm-generic/spinlock.h
View File

@@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_GENERIC_SPINLOCK_H
#define __ASM_GENERIC_SPINLOCK_H
/*
* You need to implement asm/spinlock.h for SMP support. The generic
* version does not handle SMP.
*/
#ifdef CONFIG_SMP
#error need an architecture specific asm/spinlock.h
#endif
#endif /* __ASM_GENERIC_SPINLOCK_H */

32
include/dt-bindings/pinctrl/light-fm-aon-pinctrl.h
View File

@@ -43,4 +43,36 @@
#define FM_AUDIO_PA29 45
#define FM_AUDIO_PA30 46
#define FM_AUDIO_CFG_PA0 25
#define FM_AUDIO_CFG_PA1 26
#define FM_AUDIO_CFG_PA2 27
#define FM_AUDIO_CFG_PA3 28
#define FM_AUDIO_CFG_PA4 29
#define FM_AUDIO_CFG_PA5 30
#define FM_AUDIO_CFG_PA6 31
#define FM_AUDIO_CFG_PA7 32
#define FM_AUDIO_CFG_PA8 33
#define FM_AUDIO_CFG_PA9 34
#define FM_AUDIO_CFG_PA10 35
#define FM_AUDIO_CFG_PA11 36
#define FM_AUDIO_CFG_PA12 37
#define FM_AUDIO_CFG_PA13 38
#define FM_AUDIO_CFG_PA14 39
#define FM_AUDIO_CFG_PA15 40
#define FM_AUDIO_CFG_PA16 41
#define FM_AUDIO_CFG_PA17 42
#define FM_AUDIO_CFG_PA18 43
#define FM_AUDIO_CFG_PA19 44
#define FM_AUDIO_CFG_PA20 45
#define FM_AUDIO_CFG_PA21 46
#define FM_AUDIO_CFG_PA22 47
#define FM_AUDIO_CFG_PA23 48
#define FM_AUDIO_CFG_PA24 49
#define FM_AUDIO_CFG_PA25 50
#define FM_AUDIO_CFG_PA26 51
#define FM_AUDIO_CFG_PA27 52
#define FM_AUDIO_CFG_PA28 53
#define FM_AUDIO_CFG_PA29 54
#define FM_AUDIO_CFG_PA30 55
#endif /* _LIGHT_FM_AUDIO_PINCTRL_H */

38
include/dt-bindings/pinctrl/light-fm-audio-pinctrl.h Normal file
View File

@@ -0,0 +1,38 @@
#ifndef _LIGHT_FM_AUDIO_IO_PINCTRL_H
#define _LIGHT_FM_AUDIO_IO_PINCTRL_H
#define FM_AUDIO_IO_PA0 0
#define FM_AUDIO_IO_PA1 1
#define FM_AUDIO_IO_PA2 2
#define FM_AUDIO_IO_PA3 3
#define FM_AUDIO_IO_PA4 4
#define FM_AUDIO_IO_PA5 5
#define FM_AUDIO_IO_PA6 6
#define FM_AUDIO_IO_PA7 7
#define FM_AUDIO_IO_PA8 8
#define FM_AUDIO_IO_PA9 9
#define FM_AUDIO_IO_PA10 10
#define FM_AUDIO_IO_PA11 11
#define FM_AUDIO_IO_PA12 12
#define FM_AUDIO_IO_PA13 13
#define FM_AUDIO_IO_PA14 14
#define FM_AUDIO_IO_PA15 15
#define FM_AUDIO_IO_PA16 16
#define FM_AUDIO_IO_PA17 17
#define FM_AUDIO_IO_PA18 18
#define FM_AUDIO_IO_PA19 19
#define FM_AUDIO_IO_PA20 20
#define FM_AUDIO_IO_PA21 21
#define FM_AUDIO_IO_PA22 22
#define FM_AUDIO_IO_PA23 23
#define FM_AUDIO_IO_PA24 24
#define FM_AUDIO_IO_PA25 25
#define FM_AUDIO_IO_PA26 26
#define FM_AUDIO_IO_PA27 27
#define FM_AUDIO_IO_PA28 28
#define FM_AUDIO_IO_PA29 29
#define FM_AUDIO_IO_PA30 30
#define AUDIO_IO_GPIO 0xF /* Flag set to gpio */
#endif /* _LIGHT_FM_AUDIO_IO_PINCTRL_H */

10
include/linux/bpf.h
View File

@@ -1472,6 +1472,9 @@ int bpf_prog_test_run_flow_dissector(struct bpf_prog *prog,
int bpf_prog_test_run_raw_tp(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr);
int bpf_prog_test_run_sk_lookup(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr);
bool btf_ctx_access(int off, int size, enum bpf_access_type type,
const struct bpf_prog *prog,
struct bpf_insn_access_aux *info);
@@ -1686,6 +1689,13 @@ static inline int bpf_prog_test_run_flow_dissector(struct bpf_prog *prog,
return -ENOTSUPP;
}
static inline int bpf_prog_test_run_sk_lookup(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr)
{
return -ENOTSUPP;
}
static inline void bpf_map_put(struct bpf_map *map)
{
}

1
include/linux/firmware/thead/ipc.h
View File

@@ -36,6 +36,7 @@ enum light_aon_misc_func {
LIGHT_AON_MISC_FUNC_WDG_POWER_OFF = 9,
LIGHT_AON_MISC_FUNC_AON_WDT_ON = 10,
LIGHT_AON_MISC_FUNC_AON_WDT_OFF = 11,
LIGHT_AON_MISC_FUNC_AON_RESERVE_MEM = 12,
};
enum light_aon_pm_func {

35
include/linux/firmware/thead/light_event.h Normal file
View File

@@ -0,0 +1,35 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LIGHT_EVENT_H
#define _LIGHT_EVENT_H
enum light_rebootmode_index {
/* C902 event rebootmode */
LIGHT_EVENT_PMIC_RESET = 0x0,
LIGHT_EVENT_PMIC_ONKEY,
LIGHT_EVENT_PMIC_POWERUP,
/* C910 event rebootmode */
LIGHT_EVENT_SW_REBOOT = 0x20,
LIGHT_EVENT_SW_WATCHDOG,
LIGHT_EVENT_SW_PANIC,
LIGHT_EVENT_SW_HANG,
LIGHT_EVENT_MAX,
};
#if IS_ENABLED(CONFIG_LIGHT_REBOOTMODE)
extern int light_event_set_rebootmode(enum light_rebootmode_index mode);
extern int light_event_get_rebootmode(enum light_rebootmode_index *mode);
#else
static int light_event_set_rebootmode(enum light_rebootmode_index mode)
{
return 0;
}
static int light_event_get_rebootmode(enum light_rebootmode_index *mode)
{
*mode = LIGHT_EVENT_MAX;
return 0;
}
#endif
#endif

2
include/linux/skbuff.h
View File

@@ -1088,6 +1088,8 @@ struct sk_buff *build_skb(void *data, unsigned int frag_size);
struct sk_buff *build_skb_around(struct sk_buff *skb,
void *data, unsigned int frag_size);
void skb_set_alloc_dma32(gfp_t gfp_dma32);
gfp_t skb_get_alloc_dma32(void);
/**
* alloc_skb - allocate a network buffer
* @size: size to allocate

5
include/uapi/linux/bpf.h
View File

@@ -5007,7 +5007,10 @@ struct bpf_pidns_info {
/* User accessible data for SK_LOOKUP programs. Add new fields at the end. */
struct bpf_sk_lookup {
__bpf_md_ptr(struct bpf_sock *, sk); /* Selected socket */
union {
__bpf_md_ptr(struct bpf_sock *, sk); /* Selected socket */
__u64 cookie; /* Non-zero if socket was selected in PROG_TEST_RUN */
};
__u32 family; /* Protocol family (AF_INET, AF_INET6) */
__u32 protocol; /* IP protocol (IPPROTO_TCP, IPPROTO_UDP) */

5
kernel/panic.c
View File

@@ -32,6 +32,7 @@
#include <linux/ratelimit.h>
#include <linux/debugfs.h>
#include <asm/sections.h>
#include <linux/firmware/thead/light_event.h>
#define PANIC_TIMER_STEP 100
#define PANIC_BLINK_SPD 18
@@ -182,7 +183,11 @@ void panic(const char *fmt, ...)
int state = 0;
int old_cpu, this_cpu;
bool _crash_kexec_post_notifiers = crash_kexec_post_notifiers;
enum light_rebootmode_index mode;
if (!light_event_get_rebootmode(&mode) &&
mode != LIGHT_EVENT_SW_WATCHDOG)
light_event_set_rebootmode(LIGHT_EVENT_SW_PANIC);
/*
* Disable local interrupts. This will prevent panic_smp_self_stop
* from deadlocking the first cpu that invokes the panic, since

3
kernel/softirq.c
View File

@@ -328,10 +328,9 @@ restart:
goto restart;
}
#ifdef CONFIG_RT_SOFTINT_OPTIMIZATION
if (pending | deferred)
wakeup_softirqd();
#endif
lockdep_softirq_end(in_hardirq);
account_irq_exit_time(current);
__local_bh_enable(SOFTIRQ_OFFSET);

249
net/bpf/test_run.c
View File

@@ -10,20 +10,86 @@
#include <net/bpf_sk_storage.h>
#include <net/sock.h>
#include <net/tcp.h>
#include <net/net_namespace.h>
#include <linux/error-injection.h>
#include <linux/smp.h>
#include <linux/sock_diag.h>
#define CREATE_TRACE_POINTS
#include <trace/events/bpf_test_run.h>
struct bpf_test_timer {
enum { NO_PREEMPT, NO_MIGRATE } mode;
u32 i;
u64 time_start, time_spent;
};
static void bpf_test_timer_enter(struct bpf_test_timer *t)
__acquires(rcu)
{
rcu_read_lock();
if (t->mode == NO_PREEMPT)
preempt_disable();
else
migrate_disable();
t->time_start = ktime_get_ns();
}
static void bpf_test_timer_leave(struct bpf_test_timer *t)
__releases(rcu)
{
t->time_start = 0;
if (t->mode == NO_PREEMPT)
preempt_enable();
else
migrate_enable();
rcu_read_unlock();
}
static bool bpf_test_timer_continue(struct bpf_test_timer *t, u32 repeat, int *err, u32 *duration)
__must_hold(rcu)
{
t->i++;
if (t->i >= repeat) {
/* We're done. */
t->time_spent += ktime_get_ns() - t->time_start;
do_div(t->time_spent, t->i);
*duration = t->time_spent > U32_MAX ? U32_MAX : (u32)t->time_spent;
*err = 0;
goto reset;
}
if (signal_pending(current)) {
/* During iteration: we've been cancelled, abort. */
*err = -EINTR;
goto reset;
}
if (need_resched()) {
/* During iteration: we need to reschedule between runs. */
t->time_spent += ktime_get_ns() - t->time_start;
bpf_test_timer_leave(t);
cond_resched();
bpf_test_timer_enter(t);
}
/* Do another round. */
return true;
reset:
t->i = 0;
return false;
}
static int bpf_test_run(struct bpf_prog *prog, void *ctx, u32 repeat,
u32 *retval, u32 *time, bool xdp)
{
struct bpf_cgroup_storage *storage[MAX_BPF_CGROUP_STORAGE_TYPE] = { NULL };
struct bpf_test_timer t = { NO_MIGRATE };
enum bpf_cgroup_storage_type stype;
u64 time_start, time_spent = 0;
int ret = 0;
u32 i;
int ret;
for_each_cgroup_storage_type(stype) {
storage[stype] = bpf_cgroup_storage_alloc(prog, stype);
@@ -38,10 +104,8 @@ static int bpf_test_run(struct bpf_prog *prog, void *ctx, u32 repeat,
if (!repeat)
repeat = 1;
rcu_read_lock();
migrate_disable();
time_start = ktime_get_ns();
for (i = 0; i < repeat; i++) {
bpf_test_timer_enter(&t);
do {
ret = bpf_cgroup_storage_set(storage);
if (ret)
break;
@@ -53,29 +117,8 @@ static int bpf_test_run(struct bpf_prog *prog, void *ctx, u32 repeat,
bpf_cgroup_storage_unset();
if (signal_pending(current)) {
ret = -EINTR;
break;
}
if (need_resched()) {
time_spent += ktime_get_ns() - time_start;
migrate_enable();
rcu_read_unlock();
cond_resched();
rcu_read_lock();
migrate_disable();
time_start = ktime_get_ns();
}
}
time_spent += ktime_get_ns() - time_start;
migrate_enable();
rcu_read_unlock();
do_div(time_spent, repeat);
*time = time_spent > U32_MAX ? U32_MAX : (u32)time_spent;
} while (bpf_test_timer_continue(&t, repeat, &ret, time));
bpf_test_timer_leave(&t);
for_each_cgroup_storage_type(stype)
bpf_cgroup_storage_free(storage[stype]);
@@ -688,18 +731,17 @@ int bpf_prog_test_run_flow_dissector(struct bpf_prog *prog,
const union bpf_attr *kattr,
union bpf_attr __user *uattr)
{
struct bpf_test_timer t = { NO_PREEMPT };
u32 size = kattr->test.data_size_in;
struct bpf_flow_dissector ctx = {};
u32 repeat = kattr->test.repeat;
struct bpf_flow_keys *user_ctx;
struct bpf_flow_keys flow_keys;
u64 time_start, time_spent = 0;
const struct ethhdr *eth;
unsigned int flags = 0;
u32 retval, duration;
void *data;
int ret;
u32 i;
if (prog->type != BPF_PROG_TYPE_FLOW_DISSECTOR)
return -EINVAL;
@@ -735,39 +777,15 @@ int bpf_prog_test_run_flow_dissector(struct bpf_prog *prog,
ctx.data = data;
ctx.data_end = (__u8 *)data + size;
rcu_read_lock();
preempt_disable();
time_start = ktime_get_ns();
for (i = 0; i < repeat; i++) {
retval = bpf_flow_dissect(prog, &ctx, eth->h_proto, ETH_HLEN,
size, flags);
bpf_test_timer_enter(&t);
do {
retval = bpf_flow_dissect(prog, &ctx, eth->h_proto, ETH_HLEN,
size, flags);
} while (bpf_test_timer_continue(&t, repeat, &ret, &duration));
bpf_test_timer_leave(&t);
if (signal_pending(current)) {
preempt_enable();
rcu_read_unlock();
ret = -EINTR;
goto out;
}
if (need_resched()) {
time_spent += ktime_get_ns() - time_start;
preempt_enable();
rcu_read_unlock();
cond_resched();
rcu_read_lock();
preempt_disable();
time_start = ktime_get_ns();
}
}
time_spent += ktime_get_ns() - time_start;
preempt_enable();
rcu_read_unlock();
do_div(time_spent, repeat);
duration = time_spent > U32_MAX ? U32_MAX : (u32)time_spent;
if (ret < 0)
goto out;
ret = bpf_test_finish(kattr, uattr, &flow_keys, sizeof(flow_keys),
retval, duration);
@@ -780,3 +798,106 @@ out:
kfree(data);
return ret;
}
int bpf_prog_test_run_sk_lookup(struct bpf_prog *prog, const union bpf_attr *kattr,
union bpf_attr __user *uattr)
{
struct bpf_test_timer t = { NO_PREEMPT };
struct bpf_prog_array *progs = NULL;
struct bpf_sk_lookup_kern ctx = {};
u32 repeat = kattr->test.repeat;
struct bpf_sk_lookup *user_ctx;
u32 retval, duration;
int ret = -EINVAL;
if (prog->type != BPF_PROG_TYPE_SK_LOOKUP)
return -EINVAL;
if (kattr->test.flags || kattr->test.cpu)
return -EINVAL;
if (kattr->test.data_in || kattr->test.data_size_in || kattr->test.data_out ||
kattr->test.data_size_out)
return -EINVAL;
if (!repeat)
repeat = 1;
user_ctx = bpf_ctx_init(kattr, sizeof(*user_ctx));
if (IS_ERR(user_ctx))
return PTR_ERR(user_ctx);
if (!user_ctx)
return -EINVAL;
if (user_ctx->sk)
goto out;
if (!range_is_zero(user_ctx, offsetofend(typeof(*user_ctx), local_port), sizeof(*user_ctx)))
goto out;
if (user_ctx->local_port > U16_MAX || user_ctx->remote_port > U16_MAX) {
ret = -ERANGE;
goto out;
}
ctx.family = (u16)user_ctx->family;
ctx.protocol = (u16)user_ctx->protocol;
ctx.dport = (u16)user_ctx->local_port;
ctx.sport = (__force __be16)user_ctx->remote_port;
switch (ctx.family) {
case AF_INET:
ctx.v4.daddr = (__force __be32)user_ctx->local_ip4;
ctx.v4.saddr = (__force __be32)user_ctx->remote_ip4;
break;
#if IS_ENABLED(CONFIG_IPV6)
case AF_INET6:
ctx.v6.daddr = (struct in6_addr *)user_ctx->local_ip6;
ctx.v6.saddr = (struct in6_addr *)user_ctx->remote_ip6;
break;
#endif
default:
ret = -EAFNOSUPPORT;
goto out;
}
progs = bpf_prog_array_alloc(1, GFP_KERNEL);
if (!progs) {
ret = -ENOMEM;
goto out;
}
progs->items[0].prog = prog;
bpf_test_timer_enter(&t);
do {
ctx.selected_sk = NULL;
retval = BPF_PROG_SK_LOOKUP_RUN_ARRAY(progs, ctx, BPF_PROG_RUN);
} while (bpf_test_timer_continue(&t, repeat, &ret, &duration));
bpf_test_timer_leave(&t);
if (ret < 0)
goto out;
user_ctx->cookie = 0;
if (ctx.selected_sk) {
if (ctx.selected_sk->sk_reuseport && !ctx.no_reuseport) {
ret = -EOPNOTSUPP;
goto out;
}
user_ctx->cookie = sock_gen_cookie(ctx.selected_sk);
}
ret = bpf_test_finish(kattr, uattr, NULL, 0, retval, duration);
if (!ret)
ret = bpf_ctx_finish(kattr, uattr, user_ctx, sizeof(*user_ctx));
out:
bpf_prog_array_free(progs);
kfree(user_ctx);
return ret;
}

1
net/core/filter.c
View File

@@ -10295,6 +10295,7 @@ static u32 sk_lookup_convert_ctx_access(enum bpf_access_type type,
}
const struct bpf_prog_ops sk_lookup_prog_ops = {
.test_run = bpf_prog_test_run_sk_lookup,
};
const struct bpf_verifier_ops sk_lookup_verifier_ops = {

27
net/core/skbuff.c
View File

@@ -87,6 +87,21 @@ static struct kmem_cache *skbuff_ext_cache __ro_after_init;
#endif
int sysctl_max_skb_frags __read_mostly = MAX_SKB_FRAGS;
EXPORT_SYMBOL(sysctl_max_skb_frags);
gfp_t skb_gfp_dma32 = 0;
void skb_set_alloc_dma32(gfp_t gfp_dma32)
{
if(gfp_dma32 | GFP_DMA32)
skb_gfp_dma32 = __GFP_DMA32;
else
skb_gfp_dma32 = 0;
}
EXPORT_SYMBOL(skb_set_alloc_dma32);
gfp_t skb_get_alloc_dma32(void)
{
return skb_gfp_dma32;
}
EXPORT_SYMBOL(skb_get_alloc_dma32);
/**
* skb_panic - private function for out-of-line support
@@ -379,7 +394,7 @@ static void *__napi_alloc_frag(unsigned int fragsz, gfp_t gfp_mask)
{
struct napi_alloc_cache *nc = this_cpu_ptr(&napi_alloc_cache);
return page_frag_alloc(&nc->page, fragsz, gfp_mask);
return page_frag_alloc(&nc->page, fragsz, gfp_mask | skb_gfp_dma32);
}
void *napi_alloc_frag(unsigned int fragsz)
@@ -405,10 +420,10 @@ void *netdev_alloc_frag(unsigned int fragsz)
fragsz = SKB_DATA_ALIGN(fragsz);
if (in_irq() || irqs_disabled()) {
nc = this_cpu_ptr(&netdev_alloc_cache);
data = page_frag_alloc(nc, fragsz, GFP_ATOMIC);
data = page_frag_alloc(nc, fragsz, GFP_ATOMIC | skb_gfp_dma32);
} else {
local_bh_disable();
data = __napi_alloc_frag(fragsz, GFP_ATOMIC);
data = __napi_alloc_frag(fragsz, GFP_ATOMIC | skb_gfp_dma32);
local_bh_enable();
}
return data;
@@ -458,12 +473,12 @@ struct sk_buff *__netdev_alloc_skb(struct net_device *dev, unsigned int len,
if (in_irq() || irqs_disabled()) {
nc = this_cpu_ptr(&netdev_alloc_cache);
data = page_frag_alloc(nc, len, gfp_mask);
data = page_frag_alloc(nc, len, gfp_mask | skb_gfp_dma32);
pfmemalloc = nc->pfmemalloc;
} else {
local_bh_disable();
nc = this_cpu_ptr(&napi_alloc_cache.page);
data = page_frag_alloc(nc, len, gfp_mask);
data = page_frag_alloc(nc, len, gfp_mask | skb_gfp_dma32);
pfmemalloc = nc->pfmemalloc;
local_bh_enable();
}
@@ -531,7 +546,7 @@ struct sk_buff *__napi_alloc_skb(struct napi_struct *napi, unsigned int len,
if (sk_memalloc_socks())
gfp_mask |= __GFP_MEMALLOC;
data = page_frag_alloc(&nc->page, len, gfp_mask);
data = page_frag_alloc(&nc->page, len, gfp_mask | skb_gfp_dma32);
if (unlikely(!data))
return NULL;

575
sound/soc/codecs/es7210.c
View File

File diff suppressed because it is too large Load Diff

16
sound/soc/codecs/es7210.h
View File

@@ -69,5 +69,19 @@
#define ES7210_MIC4_LP_REG4A 0x4A
#define ES7210_MIC12_PDN_REG4B 0x4B
#define ES7210_MIC34_PDN_REG4C 0x4C
/* codec private data */
struct es7210_priv {
struct regmap *regmap;
struct i2c_client *i2c_client;
unsigned int dmic_enable;
unsigned int sysclk;
struct clk *mclk;
struct snd_pcm_hw_constraint_list *sysclk_constraints;
unsigned int tdm_mode;
struct delayed_work pcm_pop_work;
int mclk_lrck_ratio;
int pcm_format;
};
#endif /* _ES7210_H_ */

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