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huiwei
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update/1.4
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bc48e4fc49 |
72
.github/workflows/kernel.yml
vendored
72
.github/workflows/kernel.yml
vendored
@@ -8,16 +8,16 @@ on:
|
||||
- cron: "0 2 * * *"
|
||||
|
||||
env:
|
||||
xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395627867
|
||||
toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1-20240115.tar.gz
|
||||
mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2024.03.01
|
||||
mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2024.03.01-nightly.tar.gz
|
||||
xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1698113812618
|
||||
toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.0-20231018.tar.gz
|
||||
mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2023.10.18
|
||||
mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2023.10.18-nightly.tar.gz
|
||||
wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
|
||||
ARCH: riscv
|
||||
board: yocto-standard
|
||||
board: lpi4a
|
||||
KBUILD_BUILD_USER: builder
|
||||
KBUILD_BUILD_HOST: revyos-riscv-builder
|
||||
KDEB_COMPRESS: none
|
||||
KDEB_COMPRESS: xz
|
||||
KDEB_CHANGELOG_DIST: unstable
|
||||
|
||||
jobs:
|
||||
@@ -25,27 +25,22 @@ jobs:
|
||||
strategy:
|
||||
fail-fast: false
|
||||
matrix:
|
||||
include:
|
||||
- name: gcc-13
|
||||
cross: riscv64-unknown-linux-gnu-
|
||||
machine: ubuntu-22.04
|
||||
run_image: ghcr.io/revyos/revyos-kernel-builder:amd64-2024.04.02
|
||||
- name: thead-gcc
|
||||
cross: riscv64-unknown-linux-gnu-
|
||||
machine: ubuntu-22.04
|
||||
run_image: ghcr.io/revyos/revyos-kernel-builder:amd64-2024.04.02
|
||||
- name: native
|
||||
cross: riscv64-linux-gnu-
|
||||
machine: [ self-hosted, Linux, riscv64 ]
|
||||
run_image: ghcr.io/revyos/revyos-kernel-builder:riscv64-2024.04.02
|
||||
name: [thead-gcc, gcc-13]
|
||||
board: [lpi4a, ahead]
|
||||
|
||||
runs-on: ${{ matrix.machine }}
|
||||
container:
|
||||
image: ${{ matrix.run_image }}
|
||||
runs-on: ubuntu-22.04
|
||||
env:
|
||||
CROSS_COMPILE: ${{ matrix.cross }}
|
||||
CROSS_COMPILE: riscv64-unknown-linux-gnu-
|
||||
|
||||
steps:
|
||||
- name: Install software
|
||||
run: |
|
||||
sudo apt update && \
|
||||
sudo apt install -y gdisk dosfstools g++-12-riscv64-linux-gnu build-essential \
|
||||
libncurses-dev gawk flex bison openssl libssl-dev tree \
|
||||
dkms libelf-dev libudev-dev libpci-dev libiberty-dev autoconf device-tree-compiler \
|
||||
devscripts pahole
|
||||
|
||||
- name: Checkout kernel
|
||||
uses: actions/checkout@v4
|
||||
with:
|
||||
@@ -57,40 +52,37 @@ jobs:
|
||||
if [[ ${{ matrix.name }} = "thead-gcc" ]]; then
|
||||
${wget_alias} ${xuantie_toolchain}/${toolchain_file_name}
|
||||
tar -xvf ${toolchain_file_name} -C /opt
|
||||
export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1/bin:$PATH"
|
||||
elif [[ ${{ matrix.name }} = "gcc-13" ]]; then
|
||||
export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.0/bin:$PATH"
|
||||
else
|
||||
${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
|
||||
tar -xvf ${mainline_toolchain_file_name} -C /opt
|
||||
export PATH="/opt/riscv/bin:$PATH"
|
||||
else
|
||||
echo "No download toolchain."
|
||||
fi
|
||||
${CROSS_COMPILE}gcc -v
|
||||
|
||||
pushd kernel
|
||||
make revyos_defconfig
|
||||
export KDEB_PKGVERSION="$(make kernelversion)-$(date "+%Y.%m.%d.%H.%M")+$(git rev-parse --short HEAD)"
|
||||
if [ x"${{ matrix.board }}" = x"lpi4a" ]; then
|
||||
make revyos_defconfig
|
||||
elif [ x"${{ matrix.board }}" = x"ahead" ]; then
|
||||
make revyos_beaglev_defconfig
|
||||
fi
|
||||
export KDEB_PKGVERSION="$(date "+%Y.%m.%d.%H.%M")+$(git rev-parse --short HEAD)"
|
||||
sed -i '/CONFIG_LOCALVERSION_AUTO/d' .config && echo "CONFIG_LOCALVERSION_AUTO=n" >> .config
|
||||
cat .config | grep "CONFIG_THEAD_ISA"
|
||||
if [ `uname -m` = "riscv64" ]; then
|
||||
# FIXME: force use 32 thread
|
||||
make -j32 bindeb-pkg LOCALVERSION="-${board}"
|
||||
else
|
||||
make -j$(nproc) bindeb-pkg LOCALVERSION="-${board}"
|
||||
fi
|
||||
|
||||
make -j$(nproc) bindeb-pkg LOCALVERSION="-${{ matrix.board }}"
|
||||
|
||||
# Copy deb
|
||||
dcmd cp -v ../*.changes ${GITHUB_WORKSPACE}/rootfs/
|
||||
sudo dcmd cp -v ../*.changes ${GITHUB_WORKSPACE}/rootfs/
|
||||
|
||||
# record commit-id
|
||||
git rev-parse HEAD > kernel-commitid
|
||||
cp -v kernel-commitid ${GITHUB_WORKSPACE}/rootfs/
|
||||
git rev-parse HEAD > ${{ matrix.board }}-kernel-commitid
|
||||
sudo cp -v ${{ matrix.board }}-kernel-commitid ${GITHUB_WORKSPACE}/rootfs/
|
||||
|
||||
ls -al ${GITHUB_WORKSPACE}/rootfs/
|
||||
popd
|
||||
|
||||
- name: 'Upload Artifact'
|
||||
uses: actions/upload-artifact@v4
|
||||
uses: actions/upload-artifact@v3
|
||||
with:
|
||||
name: thead-kernel-${{ matrix.name }}
|
||||
path: rootfs/*
|
||||
|
||||
@@ -15,18 +15,20 @@ dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-hdmi.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-dsi0-hdmi.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val.dtb th1520-a-val-sec.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-crash.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-i2s-8ch.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-tdm.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-spdif.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-hdmi.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-dsi1.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-audio.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-sv.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-ddr2G.dtb th1520-a-val-ddr1G.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-npu-fce.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-iso7816.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-nand.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-dsi0.dtb th1520-a-val-dsi1.dtb th1520-a-val-hdmi.dtb th1520-a-val-dsi0-hdmi-audio.dtb th1520-a-val-dpi0.dtb th1520-a-val-dpi0-dpi1.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-wcn.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-gpio-keys.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-khv.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-miniapp-hdmi.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD_TH1520_PRD) += th1520-a-product.dtb
|
||||
@@ -61,9 +63,6 @@ dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-cluster.dtb th1520-lpi4a-cluster-16gb.dt
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-z14inch-m0.dtb th1520-lpi4a-z14inch-m0-16g.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-milkv-meles.dtb th1520-milkv-meles-4g.dtb th1520-milkv-meles-dsi0.dtb
|
||||
|
||||
# huiwei support
|
||||
dtb-$(CONFIG_SOC_THEAD) += th1520-huiwei-product.dtb th1520-huiwei-dsi0.dtb
|
||||
|
||||
# compat old name
|
||||
dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-16gb.dtb
|
||||
dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-console.dtb light-lpi4a-console-16g.dtb
|
||||
|
||||
@@ -5,8 +5,7 @@ dtbo-$(CONFIG_SOC_THEAD) += \
|
||||
BBORG_RELAY-00A2.dtbo \
|
||||
BONE-LED_P8_03.dtbo \
|
||||
BONE-LED_P9_11.dtbo \
|
||||
BVA-MIKROBUS-0.dtbo \
|
||||
meles-wifibt-external-antenna.dtbo
|
||||
BVA-MIKROBUS-0.dtbo
|
||||
|
||||
targets += dtbs dtbs_install
|
||||
targets += $(dtbo-y)
|
||||
|
||||
@@ -1,28 +0,0 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
/ {
|
||||
fragment@0 {
|
||||
target-path = "/";
|
||||
|
||||
__overlay__ {
|
||||
ext_antenna: ext-antenna {
|
||||
status = "okay";
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-low;
|
||||
gpio = <&gpio1_porta 24 1>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "ext_antenna";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fragment@1 {
|
||||
target = <&board_antenna>;
|
||||
|
||||
__overlay__ {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -3,23 +3,75 @@
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
#include "th1520-a-val.dtsi"
|
||||
#include "th1520-a-val-audio.dts"
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light FM Audio VAL board";
|
||||
compatible = "thead,light-val-audio-i2s-8ch", "thead,light";
|
||||
};
|
||||
|
||||
&lightsound_i2s_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s0 {
|
||||
&lightsound {
|
||||
status = "okay";
|
||||
|
||||
simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd2>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc0>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@2 { /* I2S - AUDIO SYS CODEC 7210*/
|
||||
reg = <2>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd3>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc0>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@3 { /* I2S - AUDIO SYS CODEC 7210_1*/
|
||||
reg = <3>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd0>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc1>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@4 { /* I2S - AUDIO SYS CODEC 7210_1*/
|
||||
reg = <4>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd1>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2s_8ch_sd0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audiopa4>,
|
||||
<&pinctrl_audio_i2s_8ch_sd0>,
|
||||
<&pinctrl_audiopa2>,
|
||||
<&pinctrl_audiopa3>,
|
||||
<&pinctrl_audiopa8>,
|
||||
<&pinctrl_audio_i2s_8ch_bus>;
|
||||
};
|
||||
|
||||
&i2s_8ch_sd1 {
|
||||
@@ -28,16 +80,15 @@
|
||||
|
||||
&i2s_8ch_sd2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audiopa0>,
|
||||
<&pinctrl_audio_i2s_8ch_sd2>;
|
||||
};
|
||||
|
||||
&i2s_8ch_sd3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&es8156_audio_codec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&es7210_audio_codec_adc0 {
|
||||
status = "okay";
|
||||
channels-max = <8>;
|
||||
@@ -47,7 +98,3 @@
|
||||
status = "okay";
|
||||
channels-max = <8>;
|
||||
};
|
||||
|
||||
&audio_aw87519_pa {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -6,13 +6,37 @@
|
||||
#include "th1520-a-val.dtsi"
|
||||
|
||||
&spdif0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audio_spdif0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spdif1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audio_spdif1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&lightsound_spdif {
|
||||
status = "okay";
|
||||
&lightsound {
|
||||
status = "okay";
|
||||
simple-audio-card,dai-link@0 { /* SPDIF0 */
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&spdif0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&dummy_codec>;
|
||||
};
|
||||
};
|
||||
simple-audio-card,dai-link@1 { /* SPDIF1 */
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&spdif1>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&dummy_codec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -6,6 +6,8 @@
|
||||
#include "th1520-a-val.dtsi"
|
||||
|
||||
&tdm_slot1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audio_tdm>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -37,26 +39,144 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&es8156_audio_codec {
|
||||
status = "okay";
|
||||
&audio_i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
|
||||
es7210_adc2: es7210@42 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_0";
|
||||
reg = <0x42>;
|
||||
work-mode = "ES7210_TDM_1LRCK_DSPB";
|
||||
channels-max = <8>;
|
||||
sound-name-prefix = "ES7210_ADC2";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
};
|
||||
|
||||
es7210_adc3: es7210@43 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_1";
|
||||
reg = <0x43>;
|
||||
work-mode = "ES7210_TDM_1LRCK_DSPB";
|
||||
channels-max = <8>;
|
||||
sound-name-prefix = "ES7210_ADC3";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
&es7210_adc2 {
|
||||
status = "okay";
|
||||
};
|
||||
&lightsound {
|
||||
status = "okay";
|
||||
simple-audio-card,widgets = "Speaker", "Speaker";
|
||||
simple-audio-card,routing =
|
||||
"AW87519 IN", "ES8156 ROUT",
|
||||
"Speaker", "AW87519 VO";
|
||||
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
|
||||
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
|
||||
reg = <0>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es8156_audio_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
&es7210_adc3 {
|
||||
status = "okay";
|
||||
};
|
||||
simple-audio-card,dai-link@1 { /* TDM - AUDIO SYS CODEC 7210*/
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot1>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
&lightsound_tdm {
|
||||
status = "okay";
|
||||
simple-audio-card,dai-link@2 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot2>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@3 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot3>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@4 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot4>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@5 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot5>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@6 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot6>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@7 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot7>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@8 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot8>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2s0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&audio_aw87519_pa {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
55
arch/riscv/boot/dts/thead/th1520-a-val-audio.dts
Normal file
55
arch/riscv/boot/dts/thead/th1520-a-val-audio.dts
Normal file
@@ -0,0 +1,55 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
#include "th1520-a-val.dtsi"
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light FM Audio VAL board";
|
||||
compatible = "thead,light-val-audio", "thead,light";
|
||||
};
|
||||
|
||||
&lightsound {
|
||||
status = "okay";
|
||||
simple-audio-card,widgets = "Speaker", "Speaker";
|
||||
simple-audio-card,routing =
|
||||
"Speaker", "AW87519 VO",
|
||||
"AW87519 IN", "ES8156 ROUT";
|
||||
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
|
||||
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
|
||||
reg = <0>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es8156_audio_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd2 2>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_audio_codec_adc0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2s0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s_8ch_sd2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&es7210_audio_codec_adc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -1,334 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2021-2022 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
/ {
|
||||
lightsound: lightsound@1 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "Light-Sound-Card";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
simple-audio-card,widgets = "Speaker", "Speaker";
|
||||
simple-audio-card,routing =
|
||||
"Speaker", "AW87519 VO",
|
||||
"AW87519 IN", "ES8156 ROUT";
|
||||
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
|
||||
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
|
||||
reg = <0>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es8156_audio_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd2 2>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_audio_codec_adc0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lightsound_spdif: lightsound@2 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "Light-Sound-Card";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
simple-audio-card,dai-link@0 { /* SPDIF0 */
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&spdif0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&dummy_codec>;
|
||||
};
|
||||
};
|
||||
simple-audio-card,dai-link@1 { /* SPDIF1 */
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&spdif1>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&dummy_codec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lightsound_tdm: lightsound@3 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "Light-Sound-Card";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
simple-audio-card,widgets = "Speaker", "Speaker";
|
||||
simple-audio-card,routing =
|
||||
"Speaker", "AW87519 VO",
|
||||
"AW87519 IN", "ES8156 ROUT";
|
||||
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
|
||||
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
|
||||
reg = <0>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es8156_audio_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@1 { /* TDM - AUDIO SYS CODEC 7210*/
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot1>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@2 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot2>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@3 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot3>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@4 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot4>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@5 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot5>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@6 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot6>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@7 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot7>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@8 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&tdm_slot8>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es7210_adc2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lightsound_i2s_8ch: lightsound@4 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "Light-Sound-Card";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
simple-audio-card,widgets = "Speaker", "Speaker";
|
||||
simple-audio-card,routing =
|
||||
"Speaker", "AW87519 VO",
|
||||
"AW87519 IN", "ES8156 ROUT";
|
||||
simple-audio-card,aux-devs = <&audio_aw87519_pa>;
|
||||
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8156*/
|
||||
reg = <0>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es8156_audio_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC 7210*/
|
||||
reg = <1>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd2>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc0>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@2 { /* I2S - AUDIO SYS CODEC 7210*/
|
||||
reg = <2>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd3>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc0>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@3 { /* I2S - AUDIO SYS CODEC 7210_1*/
|
||||
reg = <3>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd0>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc1>;
|
||||
};
|
||||
};
|
||||
|
||||
simple-audio-card,dai-link@4 { /* I2S - AUDIO SYS CODEC 7210_1*/
|
||||
reg = <4>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s_8ch_sd1>;
|
||||
};
|
||||
codec {
|
||||
mclk-fs = <512>;
|
||||
sound-dai = <&es7210_audio_codec_adc1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&audio_i2c0 {
|
||||
es8156_audio_codec: es8156@8 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "everest,es8156";
|
||||
reg = <0x08>;
|
||||
sound-name-prefix = "ES8156";
|
||||
AVDD-supply = <&soc_aud_dac_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
mclk-sclk-ratio = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
es7210_audio_codec_adc0: es7210@40 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_0";
|
||||
reg = <0x40>;
|
||||
work-mode = "ES7210_NORMAL_I2S";
|
||||
channels-max = <2>;
|
||||
mclk-sclk-ratio = <4>;
|
||||
sound-name-prefix = "ES7210_ADC0";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
es7210_audio_codec_adc1: es7210@41 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_1";
|
||||
reg = <0x41>;
|
||||
work-mode = "ES7210_NORMAL_I2S";
|
||||
channels-max = <2>;
|
||||
mclk-sclk-ratio = <4>;
|
||||
sound-name-prefix = "ES7210_ADC1";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
es7210_adc2: es7210@42 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_0";
|
||||
reg = <0x42>;
|
||||
work-mode = "ES7210_TDM_1LRCK_DSPB";
|
||||
channels-max = <8>;
|
||||
sound-name-prefix = "ES7210_ADC2";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
es7210_adc3: es7210@43 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_1";
|
||||
reg = <0x43>;
|
||||
work-mode = "ES7210_TDM_1LRCK_DSPB";
|
||||
channels-max = <8>;
|
||||
sound-name-prefix = "ES7210_ADC3";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
audio_aw87519_pa: amp@58 {
|
||||
compatible = "awinic,aw87519_pa";
|
||||
reg = <0x58>;
|
||||
reset-gpio = <&pcal6408ahk_b 3 0x1>;
|
||||
sound-name-prefix = "AW87519";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
@@ -5,16 +5,6 @@
|
||||
|
||||
#include "th1520-crash.dtsi"
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light val board";
|
||||
compatible = "thead,light-val", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x0 0xffe00000>;
|
||||
};
|
||||
};
|
||||
|
||||
&aon {
|
||||
aon_reg_dialog: light-dialog-reg {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
|
||||
@@ -5,54 +5,60 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520-a-val.dtsi"
|
||||
|
||||
&i2c0 {
|
||||
touch@5d {
|
||||
compatible = "goodix,gt911";
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1280>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
touch1@5d {
|
||||
compatible = "goodix,gt911";
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1280>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
};
|
||||
#include "th1520-a-val-dsi0.dts"
|
||||
|
||||
&dpu_enc1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
ports {
|
||||
/* output */
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
enc1_out: endpoint {
|
||||
remote-endpoint = <&dsi1_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
status = "okay";
|
||||
|
||||
panel0@0 {
|
||||
compatible = "txd,dy800qwxpab";
|
||||
};
|
||||
};
|
||||
|
||||
&dhost_1 {
|
||||
status = "okay";
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi1_in: endpoint {
|
||||
remote-endpoint = <&enc1_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi1_out: endpoint {
|
||||
remote-endpoint = <&panel1_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel1@0 {
|
||||
compatible = "txd,dy800qwxpab";
|
||||
reg = <0>;
|
||||
reset-gpio = <&gpio1_porta 9 1>; /* active low */
|
||||
vdd1v8-supply = <&lcd1_1v8>;
|
||||
vspn5v7-supply = <&lcd1_5v7>;
|
||||
|
||||
port {
|
||||
panel1_in: endpoint {
|
||||
remote-endpoint = <&dsi1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -5,20 +5,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520-a-val.dtsi"
|
||||
|
||||
&i2c0 {
|
||||
touch@5d {
|
||||
compatible = "goodix,gt911";
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1280>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
};
|
||||
#include "th1520-a-val-dsi0.dts"
|
||||
|
||||
&dpu_enc1 {
|
||||
ports {
|
||||
@@ -32,16 +19,11 @@
|
||||
|
||||
&hdmi_tx {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
status = "okay";
|
||||
|
||||
panel0@0 {
|
||||
compatible = "txd,dy800qwxpab";
|
||||
port@0 {
|
||||
/* input */
|
||||
hdmi_tx_in: endpoint {
|
||||
remote-endpoint = <&disp1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
75
arch/riscv/boot/dts/thead/th1520-a-val-dsi0.dts
Normal file
75
arch/riscv/boot/dts/thead/th1520-a-val-dsi0.dts
Normal file
@@ -0,0 +1,75 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520-a-val.dtsi"
|
||||
|
||||
/ {
|
||||
display-subsystem {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
/* output */
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
enc0_out: endpoint {
|
||||
remote-endpoint = <&dsi0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi0_in: endpoint {
|
||||
remote-endpoint = <&enc0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi0_out: endpoint {
|
||||
remote-endpoint = <&panel0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel0@0 {
|
||||
compatible = "txd,dy800qwxpab";
|
||||
reg = <0>;
|
||||
backlight = <&lcd0_backlight>;
|
||||
reset-gpio = <&gpio1_porta 5 1>; /* active low */
|
||||
vdd1v8-supply = <&lcd0_1v8>;
|
||||
vspn5v7-supply = <&lcd0_5v7>;
|
||||
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -5,7 +5,13 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520-a-val.dtsi"
|
||||
#include "th1520-a-val-audio.dts"
|
||||
|
||||
/ {
|
||||
display-subsystem {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc1 {
|
||||
ports {
|
||||
@@ -17,13 +23,24 @@
|
||||
remote-endpoint = <&hdmi_tx_in>;
|
||||
};
|
||||
|
||||
&dpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_tx {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
/* input */
|
||||
hdmi_tx_in: endpoint {
|
||||
remote-endpoint = <&disp1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&lightsound {
|
||||
status = "okay";
|
||||
|
||||
|
||||
simple-audio-card,dai-link@2 { /* I2S - HDMI */
|
||||
reg = <2>;
|
||||
format = "i2s";
|
||||
@@ -39,23 +56,3 @@
|
||||
&light_i2s {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s_8ch_sd2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&es8156_audio_codec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&es7210_audio_codec_adc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&audio_aw87519_pa {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -9,17 +9,11 @@
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "th1520-vi-devices.dtsi"
|
||||
#include "th1520-a-val-audio.dtsi"
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light val board";
|
||||
compatible = "thead,light-val", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x0 0xffe00000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
|
||||
stdout-path = "serial0";
|
||||
@@ -35,10 +29,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
display-subsystem {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
lcd0_backlight: pwm-backlight@0 {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm 0 5000000>;
|
||||
@@ -58,8 +48,10 @@
|
||||
|
||||
/* config#1: multiple valid regions */
|
||||
iopmp_emmc: IOPMP_EMMC {
|
||||
regions = <0x000000 0x100000>,
|
||||
<0x100000 0x200000>;
|
||||
attr = <0xFFFFFFFF>;
|
||||
is_default_region;
|
||||
dummy_slave= <0x800000>;
|
||||
};
|
||||
|
||||
/* config#2: iopmp bypass */
|
||||
@@ -199,6 +191,16 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
lightsound: lightsound@1 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "Light-Sound-Card";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
light_rpmsg: light_rpmsg {
|
||||
compatible = "light,rpmsg-bus", "simple-bus";
|
||||
memory-region = <&rpmsgmem>;
|
||||
@@ -209,7 +211,6 @@
|
||||
vdev-nums = <1>;
|
||||
reg = <0x0 0x1E000000 0 0x10000>;
|
||||
compatible = "light,light-rpmsg";
|
||||
log-memory-region = <&audio_log_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
@@ -222,32 +223,32 @@
|
||||
};
|
||||
|
||||
reg_vref_1v8: regulator-adc-verf {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&pcal6408ahk_a 3 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&pcal6408ahk_a 3 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_tp1_pwr_en: regulator-tp1-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&pcal6408ahk_a 6 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
reg_tp1_pwr_en: regulator-tp1-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&pcal6408ahk_a 6 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lcd0_1v8: regulator-lcd0-vdd18 {
|
||||
compatible = "regulator-fixed";
|
||||
@@ -347,7 +348,6 @@
|
||||
compatible = "thead,light-aon";
|
||||
mbox-names = "aon";
|
||||
mboxes = <&mbox_910t 1 0>;
|
||||
log-memory-region = <&aon_log_mem>;
|
||||
status = "okay";
|
||||
|
||||
pd: light-aon-pd {
|
||||
@@ -356,212 +356,164 @@
|
||||
};
|
||||
|
||||
aon_reg_dialog: light-dialog-reg {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dvdd_cpu_reg: appcpu_dvdd {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "appcpu_dvdd";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1570000>;
|
||||
regulator-type = "dvdd";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dvddm_cpu_reg: appcpu_dvddm {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "appcpu_dvddm";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1570000>;
|
||||
regulator-type = "dvddm";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dvdd18_aon_reg: soc_dvdd18_aon {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_aon";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd33_usb3_reg: soc_avdd33_usb3 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd33_usb3";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd28_scan_en";
|
||||
regulator-type = "gpio";
|
||||
};
|
||||
|
||||
soc_dvdd08_aon_reg: soc_dvdd08_aon {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_aon";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_ddr";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_1v8";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_1v1";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_0v6";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd18_ap_reg: soc_dvdd18_ap {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_ap";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ap_reg: soc_dvdd08_ap {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_ap";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd08_mipi_hdmi";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd18_mipi_hdmi";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd33_emmc_reg: soc_vdd33_emmc {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd33_emmc";
|
||||
regulator-type = "common";
|
||||
regulator-name = "soc_vdd33_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd18_emmc_reg: soc_vdd18_emmc {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_emmc";
|
||||
regulator-type = "common";
|
||||
regulator-name = "soc_vdd18_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dovdd18_scan_reg: soc_dovdd18_scan {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dovdd18_scan";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
};
|
||||
soc_vext_2v8_reg: soc_vext_2v8 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vext_2v8";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dvdd12_scan_reg: soc_dvdd12_scan {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd12_scan";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
};
|
||||
|
||||
soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
|
||||
regulator-name = "soc_avdd28_scan_en";
|
||||
};
|
||||
soc_avdd28_rgb_reg: soc_avdd28_rgb {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd28_rgb";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <2200000>;
|
||||
regulator-max-microvolt = <3475000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dovdd18_rgb";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd12_rgb";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1675000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_avdd25_ir_reg: soc_avdd25_ir {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd25_ir";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <2200000>;
|
||||
regulator-max-microvolt = <3475000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dovdd18_ir_reg: soc_dovdd18_ir {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dovdd18_ir";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dvdd12_ir_reg: soc_dvdd12_ir {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd12_ir";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1675000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
c910_cpufreq {
|
||||
compatible = "thead,light-mpw-cpufreq";
|
||||
status = "okay";
|
||||
@@ -573,11 +525,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
&aon_suspend_ctrl {
|
||||
audio-text-memory-region = <&audio_text_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cmamem {
|
||||
alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
|
||||
};
|
||||
@@ -615,24 +562,10 @@
|
||||
reg = <0x0 0x22000000 0x0 0x10000000>;
|
||||
//no-map;
|
||||
};
|
||||
audio_text_mem: memory@32000000 {
|
||||
reg = <0x0 0x32000000 0x0 0xE00000>;
|
||||
audio_mem: memory@32000000 {
|
||||
reg = <0x0 0x32000000 0x0 0x6400000>;
|
||||
//no-map;
|
||||
};
|
||||
audio_data_mem: memory@32E00000 {
|
||||
reg = <0x0 0x32E00000 0x0 0x600000>;
|
||||
//no-map;
|
||||
};
|
||||
audio_log_mem: memory@33400000 {
|
||||
reg = <0x0 0x33400000 0x0 0x200000>;
|
||||
};
|
||||
aon_log_mem: memory@33600000 {
|
||||
reg = <0x0 0x33600000 0x0 0x200000>;
|
||||
};
|
||||
regdump_mem: memory@38400000 {
|
||||
reg = <0x0 0x38400000 0x0 0x1E00000>;
|
||||
no-map;
|
||||
};
|
||||
rpmsgmem: memory@1E000000 {
|
||||
reg = <0x0 0x1E000000 0x0 0x10000>;
|
||||
//no-map;
|
||||
@@ -655,25 +588,76 @@
|
||||
pagesize = <32>;
|
||||
};
|
||||
|
||||
touch@5d {
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x5d>;
|
||||
interrupt-parent = <&gpio1_porta>;
|
||||
interrupts = <8 0>;
|
||||
irq-gpios = <&gpio1_porta 8 0>;
|
||||
reset-gpios = <&gpio1_porta 7 0>;
|
||||
AVDD28-supply = <®_tp_pwr_en>;
|
||||
status = "disbale";
|
||||
};
|
||||
touch@5d {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "goodix,gt911";
|
||||
reg = <0x5d>;
|
||||
interrupt-parent = <&gpio1_porta>;
|
||||
interrupts = <8 0>;
|
||||
irq-gpios = <&gpio1_porta 8 0>;
|
||||
reset-gpios = <&gpio1_porta 7 0>;
|
||||
AVDD28-supply = <®_tp_pwr_en>;
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1280>;
|
||||
};
|
||||
};
|
||||
|
||||
&audio_i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audiopa6>,
|
||||
<&pinctrl_audiopa7>,
|
||||
<&pinctrl_audio_i2c0>;
|
||||
|
||||
es8156_audio_codec: es8156@8 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "everest,es8156";
|
||||
reg = <0x08>;
|
||||
sound-name-prefix = "ES8156";
|
||||
AVDD-supply = <&soc_aud_dac_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
mclk-sclk-ratio = <4>;
|
||||
};
|
||||
|
||||
es7210_audio_codec_adc0: es7210@40 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_0";
|
||||
reg = <0x40>;
|
||||
status = "disabled";
|
||||
work-mode = "ES7210_NORMAL_I2S";
|
||||
channels-max = <2>;
|
||||
mclk-sclk-ratio = <4>;
|
||||
sound-name-prefix = "ES7210_ADC0";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
};
|
||||
|
||||
es7210_audio_codec_adc1: es7210@41 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "MicArray_1";
|
||||
reg = <0x41>;
|
||||
status = "disabled";
|
||||
work-mode = "ES7210_NORMAL_I2S";
|
||||
channels-max = <2>;
|
||||
mclk-sclk-ratio = <4>;
|
||||
sound-name-prefix = "ES7210_ADC1";
|
||||
MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
|
||||
DVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
PVDD-supply = <&soc_dvdd18_aon_reg>;
|
||||
};
|
||||
|
||||
audio_aw87519_pa: amp@58 {
|
||||
compatible = "awinic,aw87519_pa";
|
||||
reg = <0x58>;
|
||||
reset-gpio = <&pcal6408ahk_b 3 0x1>;
|
||||
sound-name-prefix = "AW87519";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&audio_i2c1 {
|
||||
@@ -699,13 +683,15 @@
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
touch1@5d {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "goodix,gt911";
|
||||
reg = <0x5d>;
|
||||
interrupt-parent = <&gpio1_porta>;
|
||||
interrupts = <12 0>;
|
||||
irq-gpios = <&gpio1_porta 12 0>;
|
||||
reset-gpios = <&gpio1_porta 11 0>;
|
||||
AVDD28-supply = <®_tp1_pwr_en>;
|
||||
status = "disbale";
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1280>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -713,9 +699,6 @@
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
|
||||
rx-sample-delay-ns = <10>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "okay";
|
||||
|
||||
spi_norflash@0 {
|
||||
status = "okay";
|
||||
@@ -791,8 +774,6 @@
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio0_porta 1 0>;
|
||||
rx-sample-dly = <5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1>;
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
@@ -1343,112 +1324,6 @@
|
||||
memory-region = <&dsp1_mem>;
|
||||
};
|
||||
|
||||
&dpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
|
||||
ports {
|
||||
/* output */
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
enc0_out: endpoint {
|
||||
remote-endpoint = <&dsi0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc1 {
|
||||
|
||||
ports {
|
||||
/* output */
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
enc1_out: endpoint {
|
||||
remote-endpoint = <&dsi1_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi0_in: endpoint {
|
||||
remote-endpoint = <&enc0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi0_out: endpoint {
|
||||
remote-endpoint = <&panel0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel0@0 {
|
||||
reg = <0>;
|
||||
backlight = <&lcd0_backlight>;
|
||||
reset-gpio = <&gpio1_porta 5 1>; /* active low */
|
||||
vdd1v8-supply = <&lcd0_1v8>;
|
||||
vspn5v7-supply = <&lcd0_5v7>;
|
||||
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dhost_1 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi1_in: endpoint {
|
||||
remote-endpoint = <&enc1_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi1_out: endpoint {
|
||||
remote-endpoint = <&panel1_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel1@0 {
|
||||
reg = <0>;
|
||||
backlight = <&lcd1_backlight>;
|
||||
reset-gpio = <&gpio1_porta 9 1>; /* active low */
|
||||
vdd1v8-supply = <&lcd1_1v8>;
|
||||
vspn5v7-supply = <&lcd1_5v7>;
|
||||
|
||||
port {
|
||||
panel1_in: endpoint {
|
||||
remote-endpoint = <&dsi1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&vvcam_flash_led0{
|
||||
flash_led_name = "aw36413_aw36515";
|
||||
floodlight_i2c_bus = /bits/ 8 <2>;
|
||||
@@ -2710,12 +2585,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&npu_opp_table {
|
||||
opp-1000000000 {
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
&fce {
|
||||
memory-region = <&facelib_mem>;
|
||||
status = "okay";
|
||||
@@ -2730,21 +2599,6 @@
|
||||
<&pinctrl_audio_i2s0>;
|
||||
};
|
||||
|
||||
&tdm_slot1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audio_tdm>;
|
||||
};
|
||||
|
||||
&spdif0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audio_spdif0>;
|
||||
};
|
||||
|
||||
&spdif1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audio_spdif1>;
|
||||
};
|
||||
|
||||
&i2s_8ch_sd0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audiopa4>,
|
||||
@@ -2776,189 +2630,74 @@
|
||||
|
||||
&cpus {
|
||||
c910_0: cpu@0 {
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
300000 600000
|
||||
400000 700000
|
||||
500000 700000
|
||||
600000 700000
|
||||
702000 700000
|
||||
300000 650000
|
||||
800000 700000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
light,dvddm-operating-points = <
|
||||
/* kHz uV */
|
||||
300000 800000
|
||||
400000 800000
|
||||
500000 800000
|
||||
600000 800000
|
||||
702000 800000
|
||||
800000 800000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
};
|
||||
c910_1: cpu@1 {
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
300000 600000
|
||||
400000 700000
|
||||
500000 700000
|
||||
600000 700000
|
||||
702000 700000
|
||||
300000 650000
|
||||
800000 700000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
light,dvddm-operating-points = <
|
||||
/* kHz uV */
|
||||
300000 800000
|
||||
400000 800000
|
||||
500000 800000
|
||||
600000 800000
|
||||
702000 800000
|
||||
800000 800000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
};
|
||||
c910_2: cpu@2 {
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
300000 600000
|
||||
400000 700000
|
||||
500000 700000
|
||||
600000 700000
|
||||
702000 700000
|
||||
300000 650000
|
||||
800000 700000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
light,dvddm-operating-points = <
|
||||
/* kHz uV */
|
||||
300000 800000
|
||||
400000 800000
|
||||
500000 800000
|
||||
600000 800000
|
||||
702000 800000
|
||||
800000 800000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
};
|
||||
c910_3: cpu@3 {
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
300000 600000
|
||||
400000 700000
|
||||
500000 700000
|
||||
600000 700000
|
||||
702000 700000
|
||||
300000 650000
|
||||
800000 700000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
light,dvddm-operating-points = <
|
||||
/* kHz uV */
|
||||
300000 800000
|
||||
400000 800000
|
||||
500000 800000
|
||||
600000 800000
|
||||
702000 800000
|
||||
800000 800000
|
||||
900000 800000
|
||||
1000000 800000
|
||||
1104000 800000
|
||||
1200000 800000
|
||||
1296000 800000
|
||||
1404000 800000
|
||||
1500000 800000
|
||||
1608000 1000000
|
||||
1704000 1000000
|
||||
1848000 1000000
|
||||
1848000 1000000
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_tx {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hdmi>;
|
||||
|
||||
port@0 {
|
||||
/* input */
|
||||
hdmi_tx_in: endpoint {
|
||||
remote-endpoint = <&disp1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm>;
|
||||
};
|
||||
|
||||
&light_regdump {
|
||||
memory-region = <®dump_mem>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hdmi>;
|
||||
};
|
||||
|
||||
@@ -5,16 +5,6 @@
|
||||
|
||||
#include "th1520-crash.dtsi"
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light product board";
|
||||
compatible = "thead,light-val", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x0 0x7fe00000>;
|
||||
};
|
||||
};
|
||||
|
||||
&aon {
|
||||
aon_reg_ricoh: light-ricoh-reg {
|
||||
compatible = "thead,light-ricoh-pmic";
|
||||
|
||||
@@ -3,7 +3,6 @@
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520.dtsi"
|
||||
@@ -11,7 +10,7 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "th1520-vi-devices.dtsi"
|
||||
/ {
|
||||
model = "T-HEAD Light product board";
|
||||
model = "T-HEAD Light val board";
|
||||
compatible = "thead,light-val", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
@@ -50,8 +49,10 @@
|
||||
|
||||
/* config#1: multiple valid regions */
|
||||
iopmp_emmc: IOPMP_EMMC {
|
||||
regions = <0x000000 0x100000>,
|
||||
<0x100000 0x200000>;
|
||||
attr = <0xFFFFFFFF>;
|
||||
is_default_region;
|
||||
dummy_slave= <0x800000>;
|
||||
};
|
||||
|
||||
/* config#2: iopmp bypass */
|
||||
@@ -211,7 +212,6 @@
|
||||
vdev-nums = <1>;
|
||||
reg = <0x0 0x1E000000 0 0x10000>;
|
||||
compatible = "light,light-rpmsg";
|
||||
log-memory-region = <&audio_log_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
@@ -224,22 +224,22 @@
|
||||
};
|
||||
|
||||
reg_vref_1v8: regulator-adc-verf {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&gpio1_porta 12 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&gpio1_porta 12 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
wcn_wifi: wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
@@ -284,7 +284,6 @@
|
||||
compatible = "thead,light-aon";
|
||||
mbox-names = "aon";
|
||||
mboxes = <&mbox_910t 1 0>;
|
||||
log-memory-region = <&aon_log_mem>;
|
||||
status = "okay";
|
||||
|
||||
pd: light-aon-pd {
|
||||
@@ -446,143 +445,112 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
aon_reg_ricoh: light-ricoh-reg {
|
||||
compatible = "thead,light-ricoh-pmic";
|
||||
status = "okay";
|
||||
|
||||
dvdd_cpu_reg: appcpu_dvdd {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "appcpu_dvdd";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-type = "dvdd";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dvddm_cpu_reg: appcpu_dvddm {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "appcpu_dvddm";
|
||||
regulator-min-microvolt = <600000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-type = "dvddm";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dvdd18_aon_reg: soc_dvdd18_aon {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_aon";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd33_usb3_reg: soc_avdd33_usb3 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd33_usb3";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_aon_reg: soc_dvdd08_aon {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_aon";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_ddr";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_1v8";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_1v1";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_0v6";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd18_ap_reg: soc_dvdd18_ap {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_ap";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ap_reg: soc_dvdd08_ap {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_ap";
|
||||
regulator-type = "gpio";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd08_mipi_hdmi";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd18_mipi_hdmi";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd33_emmc";
|
||||
regulator-type = "common";
|
||||
soc_vdd33_emmc_reg: soc_vdd33_emmc {
|
||||
regulator-name = "soc_vdd33_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_emmc";
|
||||
regulator-type = "common";
|
||||
soc_vdd18_emmc_reg: soc_vdd18_emmc {
|
||||
regulator-name = "soc_vdd18_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd18_lcd0_en_reg: soc_lcd0_en {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_lcd0_en";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_vext_1v8_reg: soc_vext_1v8 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vext_1v8";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
c910_cpufreq {
|
||||
compatible = "thead,light-mpw-cpufreq";
|
||||
@@ -592,15 +560,10 @@
|
||||
test: light-aon-test {
|
||||
compatible = "thead,light-aon-test";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&aon_suspend_ctrl {
|
||||
audio-text-memory-region = <&audio_text_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&resmem {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
@@ -636,24 +599,11 @@
|
||||
reg = <0x0 0x17000000 0 0x02000000>;
|
||||
//no-map;
|
||||
};
|
||||
audio_text_mem: memory@32000000 {
|
||||
reg = <0x0 0x32000000 0x0 0xE00000>;
|
||||
|
||||
audio_mem: memory@32000000 {
|
||||
reg = <0x0 0x32000000 0x0 0x6400000>;
|
||||
//no-map;
|
||||
};
|
||||
audio_data_mem: memory@32E00000 {
|
||||
reg = <0x0 0x32E00000 0x0 0x600000>;
|
||||
//no-map;
|
||||
};
|
||||
audio_log_mem: memory@33400000 {
|
||||
reg = <0x0 0x33400000 0x0 0x200000>;
|
||||
};
|
||||
aon_log_mem: memory@33600000 {
|
||||
reg = <0x0 0x33600000 0x0 0x200000>;
|
||||
};
|
||||
regdump_mem: memory@38400000 {
|
||||
reg = <0x0 0x38400000 0x0 0x1E00000>;
|
||||
no-map;
|
||||
};
|
||||
rpmsgmem: memory@1E000000 {
|
||||
reg = <0x0 0x1E000000 0x0 0x10000>;
|
||||
//no-map;
|
||||
@@ -734,16 +684,60 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
|
||||
rx-sample-delay-ns = <10>;
|
||||
status = "disabled";
|
||||
|
||||
spi_norflash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "winbond,w25q64jwm", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
w25q,fast-read;
|
||||
};
|
||||
|
||||
spidev@1 {
|
||||
compatible = "spidev";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
reg = <0x1>;
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
clock-frequency = <100000000>;
|
||||
};
|
||||
|
||||
&qspi0 {
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio2_porta 3 0>;
|
||||
rx-sample-dly = <4>;
|
||||
status = "disabled";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
spi-max-frequency = <100000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
reg = <0>;
|
||||
|
||||
partition@0 {
|
||||
label = "ubi1";
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qspi1 {
|
||||
compatible = "snps,dw-apb-ssi";
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio0_porta 1 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1>;
|
||||
status = "okay";
|
||||
|
||||
spidev@0 {
|
||||
@@ -1027,10 +1021,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <400000>;
|
||||
@@ -1145,28 +1135,37 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vvcam_sensor1 {
|
||||
sensor_name = "OV5693";
|
||||
/*
|
||||
&vvcam_sensor0 {
|
||||
sensor_name = "IMX334";
|
||||
sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
|
||||
sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
|
||||
sensor_regulator_timing_us = <70 50 20>;
|
||||
sensor_rst = <&gpio1_porta 16 0>;
|
||||
sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
|
||||
sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
|
||||
DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
|
||||
DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
|
||||
AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
|
||||
i2c_reg_width = /bits/ 8 <2>;
|
||||
i2c_data_width = /bits/ 8 <1>;
|
||||
i2c_addr = /bits/ 8 <0x36>;
|
||||
i2c_reg_width = /bits/ 8 <2>;
|
||||
i2c_data_width = /bits/ 8 <1>;
|
||||
i2c_addr = /bits/ 8 <0x1a>;
|
||||
i2c_bus = /bits/ 8 <3>;
|
||||
status = "okay";
|
||||
};
|
||||
*/
|
||||
|
||||
&vvcam_sensor1 {
|
||||
sensor_name = "OV5693";
|
||||
i2c_bus = /bits/ 8 <3>;
|
||||
i2c_reg_width = /bits/ 8 <1>;
|
||||
i2c_data_width = /bits/ 8 <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&vvcam_sensor2 {
|
||||
sensor_name = "GC5035";
|
||||
sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
|
||||
sensor_regulator_timing_us = <100 50 0>;
|
||||
sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
|
||||
sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
|
||||
sensor_rst = <&gpio1_porta 29 0>;
|
||||
sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
|
||||
DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
|
||||
@@ -1237,31 +1236,14 @@
|
||||
DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
|
||||
DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
|
||||
AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
|
||||
i2c_reg_width = /bits/ 8 <1>;
|
||||
i2c_data_width = /bits/ 8 <1>;
|
||||
i2c_addr = /bits/ 8 <0x37>;
|
||||
i2c_bus = /bits/ 8 <3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vvcam_sensor7 {
|
||||
sensor_name = "IMX334";
|
||||
sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
|
||||
sensor_regulator_timing_us = <70 50 20>;
|
||||
sensor_rst = <&gpio1_porta 16 0>;
|
||||
sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
|
||||
DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
|
||||
DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
|
||||
AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
|
||||
i2c_reg_width = /bits/ 8 <2>;
|
||||
i2c_data_width = /bits/ 8 <1>;
|
||||
i2c_addr = /bits/ 8 <0x1a>;
|
||||
i2c_reg_width = /bits/ 8 <1>;
|
||||
i2c_data_width = /bits/ 8 <1>;
|
||||
i2c_addr = /bits/ 8 <0x37>;
|
||||
i2c_bus = /bits/ 8 <3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&video0{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
@@ -1348,7 +1330,6 @@
|
||||
|
||||
|
||||
&video1{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <2>; // vi_mem: framebuffer, region[2]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
@@ -1452,8 +1433,7 @@
|
||||
};
|
||||
|
||||
&video2{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
|
||||
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
subdev_name = "vivcam";
|
||||
@@ -1538,8 +1518,7 @@
|
||||
};
|
||||
|
||||
&video3{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
|
||||
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
subdev_name = "vivcam";
|
||||
@@ -1642,8 +1621,7 @@
|
||||
};
|
||||
|
||||
&video4{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
|
||||
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
subdev_name = "vivcam";
|
||||
@@ -1794,7 +1772,6 @@
|
||||
};
|
||||
|
||||
&video5{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <0>; // vi_mem: framebuffer, region[0]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
@@ -1964,7 +1941,6 @@
|
||||
};
|
||||
|
||||
&video6{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
@@ -2006,7 +1982,6 @@
|
||||
};
|
||||
|
||||
&video7{
|
||||
status = "okay";
|
||||
channel0 {
|
||||
sensor0 {
|
||||
subdev_name = "vivcam";
|
||||
@@ -2176,7 +2151,6 @@
|
||||
|
||||
|
||||
&video8{
|
||||
status = "okay";
|
||||
vi_mem_pool_region = <1>; // vi_mem: framebuffer, region[1]
|
||||
channel0 {
|
||||
sensor0 {
|
||||
@@ -2208,7 +2182,6 @@
|
||||
};
|
||||
|
||||
&video9{
|
||||
status = "okay";
|
||||
channel0 {
|
||||
sensor0 {
|
||||
subdev_name = "vivcam";
|
||||
@@ -2230,7 +2203,6 @@
|
||||
|
||||
|
||||
&video10{ // TUNINGTOOL
|
||||
status = "okay";
|
||||
channel0 {
|
||||
sensor0 {
|
||||
subdev_name = "vivcam";
|
||||
@@ -2252,8 +2224,7 @@
|
||||
};
|
||||
|
||||
&video11{
|
||||
status = "okay";
|
||||
channel0 {
|
||||
channel0 {
|
||||
channel_id = <0>;
|
||||
status = "okay";
|
||||
sensor0 {
|
||||
@@ -2279,7 +2250,6 @@
|
||||
};
|
||||
|
||||
&video12{ // TUNINGTOOL
|
||||
status = "okay";
|
||||
channel0 { // CSI2
|
||||
sensor0 {
|
||||
subdev_name = "vivcam";
|
||||
@@ -2389,12 +2359,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&npu_opp_table {
|
||||
opp-792000000 {
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
&fce {
|
||||
memory-region = <&facelib_mem>;
|
||||
status = "okay";
|
||||
@@ -2499,11 +2463,6 @@
|
||||
<&pinctrl_audio_i2s_8ch_sd3>;
|
||||
};
|
||||
|
||||
&light_regdump {
|
||||
memory-region = <®dump_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpus {
|
||||
c910_0: cpu@0 {
|
||||
operating-points = <
|
||||
|
||||
@@ -46,8 +46,10 @@
|
||||
|
||||
/* config#1: multiple valid regions */
|
||||
iopmp_emmc: IOPMP_EMMC {
|
||||
regions = <0x000000 0x100000>,
|
||||
<0x100000 0x200000>;
|
||||
attr = <0xFFFFFFFF>;
|
||||
is_default_region;
|
||||
dummy_slave= <0x800000>;
|
||||
};
|
||||
|
||||
/* config#2: iopmp bypass */
|
||||
@@ -204,22 +206,22 @@
|
||||
};
|
||||
|
||||
reg_vref_1v8: regulator-adc-verf {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&gpio1_porta 12 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PWR_EN";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&gpio1_porta 12 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
wcn_wifi: wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
@@ -262,7 +264,6 @@
|
||||
compatible = "thead,light-aon";
|
||||
mbox-names = "aon";
|
||||
mboxes = <&mbox_910t 1 0>;
|
||||
log-memory-region = <&aon_log_mem>;
|
||||
status = "okay";
|
||||
|
||||
pd: light-aon-pd {
|
||||
@@ -315,9 +316,6 @@
|
||||
reg = <0x0 0x17000000 0 0x02000000>;
|
||||
//no-map;
|
||||
};
|
||||
aon_log_mem: memory@33600000 {
|
||||
reg = <0x0 0x33600000 0x0 0x200000>;
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
|
||||
@@ -1,161 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2022 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
#include "th1520-huiwei.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TH1520 Huiweibook";
|
||||
compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x00000000 0x2 0x00000000>;
|
||||
};
|
||||
|
||||
vcc1v8_lontium: vcc1v8-lontium {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
gpio = <&gpio3_porta 17 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc1v8_lontium_pwren>;
|
||||
regulator-name = "vcc1v8-lontium";
|
||||
};
|
||||
|
||||
vcc3v3_edp: vcc3v3-edp {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio2_porta 18 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc3v3_edp_pwren>;
|
||||
regulator-name = "vcc3v3-edp";
|
||||
};
|
||||
};
|
||||
|
||||
&cmamem {
|
||||
alloc-ranges = <0x1 0xe4000000 0 0x14000000>; // [0x1E400_0000 ~ 0x1F800_0000]
|
||||
};
|
||||
|
||||
&pwm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
|
||||
lt8911i2c: lt8911i2c@29{
|
||||
compatible = "i2c,lt8911";
|
||||
reg = <0x29>;
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
/* output */
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
enc0_out: endpoint {
|
||||
remote-endpoint = <&dsi0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc1 {
|
||||
ports {
|
||||
/delete-node/ port@0;
|
||||
};
|
||||
};
|
||||
|
||||
&dpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
panel0@0 {
|
||||
compatible = "i2c_dsi,lt8911";
|
||||
reg = <0>;
|
||||
lt8911,backlight-gpio = <&gpio2_porta 20 GPIO_ACTIVE_HIGH>;
|
||||
lt8911,irq-gpio = <&gpio3_porta 16 GPIO_ACTIVE_LOW>;
|
||||
lt8911,reset-gpio = <&gpio3_porta 15 GPIO_ACTIVE_LOW>;
|
||||
lt8911,rst-delay-ms = <10>;
|
||||
lt8911,edp-lane-cnt = <2>;
|
||||
lt8911,mipi-lane-cnt = <4>;
|
||||
lt8911,edp-depth = <8>; /* 6 or 8 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <<8911exb_gpios>;
|
||||
hsvcc-supply = <&vcc1v8_lontium>;
|
||||
vspn3v3-supply = <&vcc3v3_edp>;
|
||||
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&padctrl0_apsys { /* right-pinctrl */
|
||||
light-evb-padctrl0 {
|
||||
/*
|
||||
* Pin Configuration Node:
|
||||
* Format: <pin_id mux_node config>
|
||||
*/
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
thead,pins = <
|
||||
FM_I2C3_SCL LIGHT_PIN_FUNC_0 0x204
|
||||
FM_I2C3_SDA LIGHT_PIN_FUNC_0 0x204
|
||||
>;
|
||||
};
|
||||
|
||||
lt8911exb_gpios: lt8911exb-gpios {
|
||||
thead,pins = <
|
||||
FM_GPIO2_20 LIGHT_PIN_FUNC_0 0x208
|
||||
FM_GMAC0_RXD1 LIGHT_PIN_FUNC_3 0x0
|
||||
FM_GMAC0_RXD0 LIGHT_PIN_FUNC_3 0x208
|
||||
>;
|
||||
};
|
||||
|
||||
vcc1v8_lontium_pwren: vcc1v8-lontium-pwren {
|
||||
thead,pins = <
|
||||
FM_GMAC0_RXD2 LIGHT_PIN_FUNC_3 0x208
|
||||
>;
|
||||
};
|
||||
|
||||
vcc3v3_edp_pwren: vcc3v3-edp-pwren {
|
||||
thead,pins = <
|
||||
FM_GPIO2_18 LIGHT_PIN_FUNC_0 0x208
|
||||
>;
|
||||
};
|
||||
dsi_reset_gpio: dsi-reset-gpio {
|
||||
thead,pins = <
|
||||
FM_GPIO2_22 LIGHT_PIN_FUNC_0 0x0
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/delete-node/ &iso7816;
|
||||
@@ -1,40 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520-huiwei-dsi0.dts"
|
||||
|
||||
&lightsound {
|
||||
status = "okay";
|
||||
simple-audio-card,dai-link@0 { /* I2S - AUDIO SYS CODEC 8388*/
|
||||
reg = <0>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s1 0>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es8388_audio_codec>;
|
||||
};
|
||||
};
|
||||
simple-audio-card,dai-link@1 { /* I2S - AUDIO SYS CODEC HDMI*/
|
||||
reg = <2>;
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&light_i2s 1>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&dummy_codec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
};
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,32 +1,13 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520-lpi4a.dtsi"
|
||||
#include "th1520-lpi4a-dsi0.dts"
|
||||
|
||||
&i2c3 {
|
||||
touch@14 {
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1200>;
|
||||
};
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
panel0@0 {
|
||||
compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
|
||||
};
|
||||
};
|
||||
|
||||
&video10{ // TUNINGTOOL
|
||||
status = "okay";
|
||||
|
||||
@@ -8,12 +8,10 @@
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light Lichee Pi 4A configuration for LicheeConsole4A";
|
||||
compatible = "thead,light", "sipeed,th1520-laptop", "sipeed,console4a";
|
||||
};
|
||||
|
||||
&dsi0_panel0 {
|
||||
compatible = "mingjun,mj070bi30ia2";
|
||||
rotation = <90>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
|
||||
@@ -8,26 +8,52 @@
|
||||
/ {
|
||||
model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
|
||||
compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x1 0xffe00000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cmamem {
|
||||
size = <0 0x20000000>; // 512MB on lpi4a (SOM)
|
||||
alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
touch@14 {
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1200>;
|
||||
status = "okay";
|
||||
};
|
||||
touch@14 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "goodix,gt9271";
|
||||
reg = <0x14>;
|
||||
interrupt-parent = <&ao_gpio_porta>;
|
||||
interrupts = <3 0>;
|
||||
irq-gpios = <&ao_gpio_porta 3 0>;
|
||||
reset-gpios = <&pcal6408ahk_d 0 0>;
|
||||
AVDD28-supply = <®_tp_pwr_en>;
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <1200>;
|
||||
tp-size = <9271>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
panel0@0 {
|
||||
panel0@0 {
|
||||
compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
|
||||
};
|
||||
reg = <0>;
|
||||
backlight = <&lcd0_backlight>;
|
||||
reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
|
||||
hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
|
||||
vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
|
||||
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -8,26 +8,53 @@
|
||||
/ {
|
||||
model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
|
||||
compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x1 0xffe00000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cmamem {
|
||||
size = <0 0x20000000>; // 512MB on lpi4a (SOM)
|
||||
alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
touch@14 {
|
||||
touchscreen-size-x = <1200>;
|
||||
touchscreen-size-y = <1920>;
|
||||
status = "okay";
|
||||
};
|
||||
#gpio-cells = <2>;
|
||||
compatible = "goodix,gt9271";
|
||||
reg = <0x14>;
|
||||
interrupt-parent = <&ao_gpio_porta>;
|
||||
interrupts = <3 0>;
|
||||
irq-gpios = <&ao_gpio_porta 3 0>;
|
||||
reset-gpios = <&pcal6408ahk_d 0 0>;
|
||||
AVDD28-supply = <®_tp_pwr_en>;
|
||||
touchscreen-size-x = <1200>;
|
||||
touchscreen-size-y = <1920>;
|
||||
tp-size = <9271>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dhost_0 {
|
||||
panel0@0 {
|
||||
compatible = "himax,hx8279";
|
||||
};
|
||||
compatible = "himax,hx8279";
|
||||
reg = <0>;
|
||||
backlight = <&lcd0_backlight>;
|
||||
reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
|
||||
hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
|
||||
vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
|
||||
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -7,7 +7,6 @@
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board use on laptop";
|
||||
compatible = "thead,light", "sipeed,th1520-laptop";
|
||||
|
||||
reg_sys_vcc_5v: regulator-sys-vcc-5v-en {
|
||||
status = "okay";
|
||||
@@ -20,15 +19,12 @@
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
|
||||
// suspend for lichee laptop is not ready so dont turn it off
|
||||
/*
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
regulator-state-standby {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
*/
|
||||
};
|
||||
|
||||
reg_sys_vcc_3v3: regulator-sys-vcc-3v3-en {
|
||||
@@ -119,7 +115,7 @@
|
||||
charger: dc-charger {
|
||||
compatible = "gpio-charger";
|
||||
charger-type = "mains";
|
||||
gpios = <&gpio0_porta 16 GPIO_ACTIVE_HIGH>;
|
||||
gpios = <&ao_gpio_porta 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -232,7 +228,6 @@
|
||||
|
||||
&uart3 {
|
||||
clock-frequency = <100000000>;
|
||||
pinctrl-0 = <&pinctrl_uart3_tx_is_gpio>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -5,16 +5,6 @@
|
||||
|
||||
#include "th1520-crash.dtsi"
|
||||
|
||||
/ {
|
||||
model = "T-HEAD Light Lichee Pi 4A board";
|
||||
compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x1 0xffe00000>;
|
||||
};
|
||||
};
|
||||
|
||||
&aon {
|
||||
aon_reg_dialog: light-dialog-reg {
|
||||
compatible = "thead,light-dialog-pmic-ant";
|
||||
|
||||
@@ -1,11 +1,11 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "th1520-lpi4a.dtsi"
|
||||
#include "th1520-lpi4a-dsi0.dts"
|
||||
|
||||
&lightsound {
|
||||
status = "okay";
|
||||
@@ -40,3 +40,11 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -10,14 +10,6 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "th1520-vi-devices.dtsi"
|
||||
/ {
|
||||
model = "T-HEAD Light Lichee Pi 4A board";
|
||||
compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x1 0xffe00000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
|
||||
stdout-path = "serial0:115200n8";
|
||||
@@ -49,8 +41,10 @@
|
||||
|
||||
/* config#1: multiple valid regions */
|
||||
iopmp_emmc: IOPMP_EMMC {
|
||||
regions = <0x000000 0x100000>,
|
||||
<0x100000 0x200000>;
|
||||
attr = <0xFFFFFFFF>;
|
||||
is_default_region;
|
||||
dummy_slave= <0x800000>;
|
||||
};
|
||||
|
||||
/* config#2: iopmp bypass */
|
||||
@@ -210,7 +204,6 @@
|
||||
vdev-nums = <1>;
|
||||
reg = <0x0 0x1E000000 0 0x10000>;
|
||||
compatible = "light,light-rpmsg";
|
||||
log-memory-region = <&audio_log_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
@@ -230,22 +223,22 @@
|
||||
};
|
||||
|
||||
reg_vref_1v8: regulator-adc-verf {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vref-1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-pwr-en";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&pcal6408ahk_d 4 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
reg_tp_pwr_en: regulator-pwr-en {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-pwr-en";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
gpio = <&pcal6408ahk_d 4 1>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_hub_vdd1v2: regulator-hub-vdd12-en {
|
||||
compatible = "regulator-fixed";
|
||||
@@ -254,6 +247,7 @@
|
||||
regulator-max-microvolt = <1200000>;
|
||||
gpio = <&pcal6408ahk_d 2 1>;
|
||||
enable-active-high;
|
||||
|
||||
};
|
||||
|
||||
reg_usb_hub_vcc5v: regulator-hub-vcc5v-en {
|
||||
@@ -263,6 +257,7 @@
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&pcal6408ahk_d 3 1>;
|
||||
enable-active-high;
|
||||
|
||||
};
|
||||
|
||||
wcn_wifi: wireless-wlan {
|
||||
@@ -301,11 +296,10 @@
|
||||
debounce-interval = <1>;
|
||||
gpios = <&gpio2_porta 25 0x1>;
|
||||
};
|
||||
|
||||
key-wake {
|
||||
label = "Wake Key";
|
||||
key-sleep {
|
||||
label = "Sleep Wake Key";
|
||||
wakeup-source;
|
||||
linux,code = <KEY_WAKEUP>;
|
||||
linux,code = <KEY_SLEEP>;
|
||||
debounce-interval = <1>;
|
||||
gpios = <&ao_gpio_porta 2 0x1>;
|
||||
};
|
||||
@@ -315,7 +309,6 @@
|
||||
compatible = "thead,light-aon";
|
||||
mbox-names = "aon";
|
||||
mboxes = <&mbox_910t 1 0>;
|
||||
log-memory-region = <&aon_log_mem>;
|
||||
status = "okay";
|
||||
|
||||
pd: light-aon-pd {
|
||||
@@ -481,155 +474,123 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
aon_reg_dialog: light-dialog-reg {
|
||||
compatible = "thead,light-dialog-pmic-ant";
|
||||
status = "okay";
|
||||
|
||||
dvdd_cpu_reg: appcpu_dvdd {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "appcpu_dvdd";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1570000>;
|
||||
regulator-type = "dvdd";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dvddm_cpu_reg: appcpu_dvddm {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "appcpu_dvddm";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1570000>;
|
||||
regulator-type = "dvddm";
|
||||
regulator-dual-rail;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd18_aon_reg: soc_dvdd18_aon {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_aon";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd33_usb3_reg: soc_avdd33_usb3 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd33_usb3";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_aon_reg: soc_dvdd08_aon {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_aon";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_ddr";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_1v8";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_1v1";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_vdd_ddr_0v6";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd18_ap_reg: soc_dvdd18_ap {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_ap";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ap_reg: soc_dvdd08_ap {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd08_ap";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd08_mipi_hdmi";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd18_mipi_hdmi";
|
||||
regulator-type = "common";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd33_emmc_reg: soc_vdd33_emmc {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd33_emmc";
|
||||
regulator-type = "common";
|
||||
regulator-name = "soc_vdd33_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd18_emmc_reg: soc_vdd18_emmc {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd18_emmc";
|
||||
regulator-type = "gpio";
|
||||
regulator-name = "soc_vdd18_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dovdd18_scan_reg: soc_dovdd18_scan {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dovdd18_scan";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
};
|
||||
|
||||
soc_dvdd12_scan_reg: soc_dvdd12_scan {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_dvdd12_scan";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
};
|
||||
|
||||
soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
regulator-name = "soc_avdd28_scan_en";
|
||||
regulator-type = "common";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
c910_cpufreq {
|
||||
compatible = "thead,light-mpw-cpufreq";
|
||||
@@ -691,16 +652,6 @@
|
||||
|
||||
};
|
||||
|
||||
&aon_suspend_ctrl {
|
||||
audio-text-memory-region = <&audio_text_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cmamem {
|
||||
size = <0 0x20000000>; // 512MB on lpi4a (SOM)
|
||||
alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
|
||||
};
|
||||
|
||||
&resmem {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
@@ -732,24 +683,9 @@
|
||||
facelib_mem: memory@17000000 {
|
||||
reg = <0x0 0x17000000 0 0x02000000>;
|
||||
};
|
||||
audio_text_mem: memory@32000000 {
|
||||
reg = <0x0 0x32000000 0x0 0xE00000>;
|
||||
//no-map;
|
||||
audio_mem: memory@32000000 {
|
||||
reg = <0x0 0x32000000 0x0 0x6400000>;
|
||||
};
|
||||
audio_data_mem: memory@32E00000 {
|
||||
reg = <0x0 0x32E00000 0x0 0x600000>;
|
||||
//no-map;
|
||||
};
|
||||
audio_log_mem: memory@33400000 {
|
||||
reg = <0x0 0x33400000 0x0 0x200000>;
|
||||
};
|
||||
aon_log_mem: memory@33600000 {
|
||||
reg = <0x0 0x33600000 0x0 0x200000>;
|
||||
};
|
||||
regdump_mem: memory@38400000 {
|
||||
reg = <0x0 0x38400000 0x0 0x1E00000>;
|
||||
no-map;
|
||||
};
|
||||
rpmsgmem: memory@1E000000 {
|
||||
reg = <0x0 0x1E000000 0x0 0x10000>;
|
||||
};
|
||||
@@ -844,9 +780,6 @@
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
|
||||
rx-sample-delay-ns = <10>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "okay";
|
||||
|
||||
spi_norflash@0 {
|
||||
status = "okay";
|
||||
@@ -915,8 +848,6 @@
|
||||
compatible = "snps,dw-apb-ssi";
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio0_porta 1 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1>;
|
||||
status = "okay";
|
||||
|
||||
spidev@0 {
|
||||
@@ -987,7 +918,7 @@
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
max-frequency = <198000000>;
|
||||
max-frequency = <100000000>;
|
||||
bus-width = <4>;
|
||||
pull_up;
|
||||
no-sd;
|
||||
@@ -996,7 +927,6 @@
|
||||
io_fixed_1v8;
|
||||
post-power-on-delay-ms = <50>;
|
||||
wprtn_ignore;
|
||||
sd-uhs-sdr104;
|
||||
cap-sd-highspeed;
|
||||
wakeup-source;
|
||||
status = "okay";
|
||||
@@ -1175,16 +1105,6 @@
|
||||
>;
|
||||
};
|
||||
|
||||
|
||||
pinctrl_uart3_tx_is_gpio: uart3txisgpiogrp {
|
||||
thead,pins = <
|
||||
FM_UART3_TXD 0x3 0x202
|
||||
FM_UART3_RXD 0x1 0x202
|
||||
>;
|
||||
};
|
||||
|
||||
|
||||
|
||||
pinctrl_wifi_wake: wifi_grp {
|
||||
thead,pins = <
|
||||
FM_GPIO0_27 0x0 0x202
|
||||
@@ -1269,8 +1189,10 @@
|
||||
pinctrl_audiopa30: audiopa30 {
|
||||
thead,pins = < FM_AUDIO_PA30 LIGHT_PIN_FUNC_0 0x000 >;
|
||||
};
|
||||
pinctrl_sleep: sleep_grp {
|
||||
thead,pins = <FM_CPU_JTG_TCLK 0x3 0x238 >;
|
||||
pinctrl_sleep: sleep_grp {
|
||||
thead,pins = <
|
||||
FM_CPU_JTG_TCLK 0x3 0x238
|
||||
>;
|
||||
};
|
||||
|
||||
};
|
||||
@@ -1317,11 +1239,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
@@ -1369,19 +1286,6 @@
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
touch@14 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "goodix,gt9271";
|
||||
reg = <0x14>;
|
||||
interrupt-parent = <&ao_gpio_porta>;
|
||||
interrupts = <3 0>;
|
||||
irq-gpios = <&ao_gpio_porta 3 0>;
|
||||
reset-gpios = <&pcal6408ahk_d 0 0>;
|
||||
AVDD28-supply = <®_tp_pwr_en>;
|
||||
tp-size = <9271>;
|
||||
status = "disable";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
@@ -1728,18 +1632,13 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&npu_opp_table {
|
||||
opp-1000000000 {
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
&fce {
|
||||
memory-region = <&facelib_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dpu_enc0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
/* output */
|
||||
@@ -1784,20 +1683,6 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel0@0 {
|
||||
reg = <0>;
|
||||
backlight = <&lcd0_backlight>;
|
||||
reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
|
||||
hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
|
||||
vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
|
||||
|
||||
port {
|
||||
panel0_in: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&disp1_out {
|
||||
@@ -1887,11 +1772,6 @@
|
||||
hub5v-supply = <®_usb_hub_vcc5v>;
|
||||
};
|
||||
|
||||
&light_regdump {
|
||||
memory-region = <®dump_mem>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpus {
|
||||
c910_0: cpu@0 {
|
||||
operating-points = <
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -80,6 +80,11 @@
|
||||
viv_video15 = &video15;
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x200000 0x0 0xffe00000>;
|
||||
};
|
||||
|
||||
resmem: reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
@@ -157,7 +162,7 @@
|
||||
};
|
||||
|
||||
dev_crit: trip2 {
|
||||
temperature = <110000>;
|
||||
temperature = <105000>;
|
||||
hysteresis = <2000>;
|
||||
type = "critical";
|
||||
};
|
||||
@@ -938,6 +943,8 @@
|
||||
clocks = <&clk CLKGEN_PWM_PCLK>,
|
||||
<&clk CLKGEN_PWM_CCLK>;
|
||||
clock-names = "pclk", "cclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm>;
|
||||
};
|
||||
|
||||
timer0: timer@ffefc32000 {
|
||||
@@ -1132,6 +1139,8 @@
|
||||
spi0: spi@ffe700c000 {
|
||||
compatible = "snps,dw-apb-ssi";
|
||||
reg = <0xff 0xe700c000 0x0 0x1000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <54>;
|
||||
clocks = <&clk CLKGEN_SPI_SSI_CLK>,
|
||||
@@ -1140,7 +1149,6 @@
|
||||
num-cs = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qspi0: spi@ffea000000 {
|
||||
@@ -1155,12 +1163,13 @@
|
||||
clock-names = "sclk", "pclk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qspi1: spi@fff8000000 {
|
||||
compatible = "snps,dw-apb-ssi-quad";
|
||||
reg = <0xff 0xf8000000 0x0 0x1000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_qspi1>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <53>;
|
||||
clocks = <&clk CLKGEN_QSPI1_SSI_CLK>,
|
||||
@@ -1168,7 +1177,6 @@
|
||||
clock-names = "sclk", "pclk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
g2d_opp_table:g2d-opp-table {
|
||||
@@ -1767,8 +1775,8 @@
|
||||
light,sel = "ap_i2s";
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <70>;
|
||||
dmas = <&dmac0 35>;
|
||||
dma-names = "tx";
|
||||
dmas = <&dmac0 35>, <&dmac0 40>;
|
||||
dma-names = "tx", "rx";
|
||||
light,dma_maxburst = <4>;
|
||||
#dma-cells = <1>;
|
||||
clocks = <&vosys_clk_gate LIGHT_CLKGEN_HDMI_I2S_CLK>;
|
||||
@@ -2381,67 +2389,56 @@
|
||||
};
|
||||
|
||||
bm_csi0: csi@ffe4000000{ //CSI2
|
||||
compatible = "thead,light-bm-csi";
|
||||
reg = < 0xff 0xe4000000 0x0 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <128>;
|
||||
dphyglueiftester = <0x180>;
|
||||
sysreg_mipi_csi_ctrl = <0x140>;
|
||||
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
|
||||
clock-names = "pclk", "pixclk", "cfg_clk";
|
||||
phy_name = "CSI_4LANE";
|
||||
status = "disabled";
|
||||
compatible = "thead,light-bm-csi";
|
||||
reg = < 0xff 0xe4000000 0x0 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <128>;
|
||||
dphyglueiftester = <0x180>;
|
||||
sysreg_mipi_csi_ctrl = <0x140>;
|
||||
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
|
||||
clock-names = "pclk", "pixclk", "cfg_clk";
|
||||
phy_name = "CSI_4LANE";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
csia_reg: visys-reg@ffe4020000 {
|
||||
compatible = "thead,light-visys-reg", "syscon";
|
||||
reg = < 0xff 0xe4020000 0x0 0x10000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
csib_reg: visys-reg@ffe4010000{
|
||||
compatible = "thead,light-visys-reg", "syscon";
|
||||
reg = < 0xff 0xe4010000 0x0 0x10000>;
|
||||
status = "okay";
|
||||
compatible = "thead,light-visys-reg", "syscon";
|
||||
reg = < 0xff 0xe4020000 0x0 0x10000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
bm_csi1: csi@ffe4010000{ //CSI2X2_B
|
||||
compatible = "thead,light-bm-csi";
|
||||
reg = < 0xff 0xe4010000 0x0 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
|
||||
dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
|
||||
sysreg_mipi_csi_ctrl = <0x148>;
|
||||
visys-regmap = <&visys_reg>;
|
||||
csia-regmap = <&csia_reg>;
|
||||
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
|
||||
clock-names = "pclk", "pixclk", "cfg_clk";
|
||||
phy_name = "CSI_B";
|
||||
status = "disabled";
|
||||
compatible = "thead,light-bm-csi";
|
||||
reg = < 0xff 0xe4010000 0x0 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
|
||||
dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
|
||||
sysreg_mipi_csi_ctrl = <0x148>;
|
||||
visys-regmap = <&visys_reg>;
|
||||
csia-regmap = <&csia_reg>;
|
||||
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
|
||||
clock-names = "pclk", "pixclk", "cfg_clk";
|
||||
phy_name = "CSI_B";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bm_csi2: csi@ffe4020000{ //CSI2X2_A
|
||||
compatible = "thead,light-bm-csi";
|
||||
reg = < 0xff 0xe4020000 0x0 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <127>;
|
||||
dphyglueiftester = <0x184>;
|
||||
sysreg_mipi_csi_ctrl = <0x144>;
|
||||
sysreg_mipi_csi_fifo_ctrl = <0x14c>;
|
||||
csib-regmap = <&csib_reg>;
|
||||
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
|
||||
clock-names = "pclk", "pixclk", "cfg_clk", "pclk1", "pixclk1", "cfg_clk1";
|
||||
phy_name = "CSI_A";
|
||||
status = "disabled";
|
||||
compatible = "thead,light-bm-csi";
|
||||
reg = < 0xff 0xe4020000 0x0 0x10000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <127>;
|
||||
dphyglueiftester = <0x184>;
|
||||
sysreg_mipi_csi_ctrl = <0x144>;
|
||||
clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
|
||||
<&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
|
||||
clock-names = "pclk", "pixclk", "cfg_clk";
|
||||
phy_name = "CSI_A";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bm_isp0: bm_isp@ffe4100000 {
|
||||
@@ -2624,7 +2621,6 @@
|
||||
interrupts = <156>;
|
||||
#cooling-cells = <2>;
|
||||
firmware-name = "xrp0.elf";
|
||||
power-domains = <&pd LIGHT_AON_DSP0_PD>;
|
||||
clocks = <&dspsys_clk_gate CLKGEN_DSP0_PCLK>,
|
||||
<&dspsys_clk_gate CLKGEN_DSP0_CCLK>;
|
||||
clock-names = "pclk", "cclk";
|
||||
@@ -2666,7 +2662,6 @@
|
||||
interrupts = <157>;
|
||||
firmware-name = "xrp1.elf";
|
||||
#cooling-cells = <2>;
|
||||
power-domains = <&pd LIGHT_AON_DSP1_PD>;
|
||||
clocks = <&dspsys_clk_gate CLKGEN_DSP1_PCLK>,
|
||||
<&dspsys_clk_gate CLKGEN_DSP1_CCLK>;
|
||||
clock-names = "pclk", "cclk";
|
||||
@@ -2838,10 +2833,7 @@
|
||||
#clock-cells = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
light_regdump: light-regdump {
|
||||
compatible = "thead,light-regdump";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
@@ -282,7 +282,6 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
|
||||
CONFIG_PM_WAKELOCKS_LIMIT=0
|
||||
|
||||
@@ -31,7 +31,7 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
|
||||
CONFIG_VIRTUALIZATION=y
|
||||
@@ -351,5 +351,4 @@ CONFIG_ENERGY_MODEL=y
|
||||
# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
|
||||
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
|
||||
CONFIG_DEVFREQ_THERMAL=y
|
||||
CONFIG_THERMAL_STATISTICS=y
|
||||
|
||||
|
||||
@@ -38,6 +38,7 @@ CONFIG_FORCE_MAX_ZONEORDER=15
|
||||
CONFIG_SOC_SIFIVE=y
|
||||
CONFIG_SOC_THEAD=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_VECTOR=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_LADDER=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
@@ -61,6 +62,7 @@ CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_BLK_DEV_THROTTLING=y
|
||||
CONFIG_BINFMT_MISC=m
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_DEBUGFS=y
|
||||
CONFIG_CMA_AREAS=16
|
||||
CONFIG_NET=y
|
||||
@@ -152,7 +154,6 @@ CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
CONFIG_LIGHT_DSMART_CARD=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_MCU_HC32FX=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_MD=y
|
||||
@@ -180,21 +181,20 @@ CONFIG_USB_USBNET=m
|
||||
# CONFIG_USB_NET_AX88179_178A is not set
|
||||
# CONFIG_USB_NET_NET1080 is not set
|
||||
CONFIG_BRCMFMAC=m
|
||||
CONFIG_RTL8723DS=m
|
||||
CONFIG_RTL8723DS=y
|
||||
CONFIG_AIC_WLAN_SUPPORT=y
|
||||
CONFIG_AIC_FW_PATH="/lib/firmware/aic8800"
|
||||
CONFIG_AIC8800_WLAN_SUPPORT=m
|
||||
CONFIG_AIC8800_BTLPM_SUPPORT=m
|
||||
CONFIG_RTL8822CS=m
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
CONFIG_INPUT_JOYDEV=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_GOODIX=y
|
||||
CONFIG_TOUCHSCREEN_GT9XX=y
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_UINPUT=y
|
||||
CONFIG_MTK_FINGERPRINT_SUPPORT=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
@@ -206,8 +206,6 @@ CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_VIRTIO=y
|
||||
CONFIG_TCG_TPM=y
|
||||
CONFIG_TCG_TIS_SPI=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
CONFIG_SPI=y
|
||||
@@ -222,10 +220,12 @@ CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_DWAPB=y
|
||||
CONFIG_GPIO_PCA953X=y
|
||||
CONFIG_GPIO_PCA953X_IRQ=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_BATTERY_CW2015=m
|
||||
CONFIG_CHARGER_GPIO=m
|
||||
CONFIG_SENSORS_MR75203=y
|
||||
CONFIG_SENSORS_PWM_FAN=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_THERMAL_EMULATION=y
|
||||
@@ -292,7 +292,6 @@ CONFIG_DRM_PANEL_HX8394=y
|
||||
CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y
|
||||
CONFIG_DRM_PANEL_MINGJUN_070BI30IA2=y
|
||||
CONFIG_DRM_PANEL_HX8279=y
|
||||
CONFIG_DRM_PANEL_LT8911=y
|
||||
CONFIG_DRM_LONTIUM_LT8911EXB=m
|
||||
CONFIG_DRM_ETNAVIV=m
|
||||
CONFIG_DRM_VERISILICON=y
|
||||
@@ -311,15 +310,13 @@ CONFIG_SND_SOC_AW87519=y
|
||||
CONFIG_SND_SOC_BT_SCO=y
|
||||
CONFIG_SND_SOC_ES7210=y
|
||||
CONFIG_SND_SOC_ES8156=y
|
||||
CONFIG_SND_SOC_ES8323=y
|
||||
CONFIG_SND_SOC_WM8960=y
|
||||
CONFIG_SND_SIMPLE_CARD=y
|
||||
CONFIG_SND_AUDIO_GRAPH_CARD=y
|
||||
CONFIG_RK_HEADSET=y
|
||||
CONFIG_UHID=y
|
||||
CONFIG_HID_PID=y
|
||||
CONFIG_USB_HIDDEV=y
|
||||
CONFIG_I2C_HID=y
|
||||
CONFIG_I2C_HID=m
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
@@ -395,9 +392,7 @@ CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_G_MULTI=m
|
||||
CONFIG_USB_G_MULTI_CDC=y
|
||||
CONFIG_TYPEC=m
|
||||
CONFIG_TYPEC_TCPM=m
|
||||
CONFIG_TYPEC_TCPCI=m
|
||||
CONFIG_USB_ROLE_SWITCH=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
@@ -405,22 +400,6 @@ CONFIG_MMC_SDHCI_OF_DWCMSHC=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_ONESHOT=y
|
||||
CONFIG_LEDS_TRIGGER_MTD=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
|
||||
CONFIG_LEDS_TRIGGER_CPU=y
|
||||
CONFIG_LEDS_TRIGGER_ACTIVITY=y
|
||||
CONFIG_LEDS_TRIGGER_GPIO=y
|
||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
CONFIG_LEDS_TRIGGER_TRANSIENT=y
|
||||
CONFIG_LEDS_TRIGGER_CAMERA=y
|
||||
CONFIG_LEDS_TRIGGER_PANIC=y
|
||||
CONFIG_LEDS_TRIGGER_NETDEV=y
|
||||
CONFIG_LEDS_TRIGGER_PATTERN=y
|
||||
CONFIG_LEDS_TRIGGER_AUDIO=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_XGENE=y
|
||||
CONFIG_DMADEVICES=y
|
||||
@@ -440,6 +419,7 @@ CONFIG_HWSPINLOCK=y
|
||||
CONFIG_HWSPINLOCK_LIGHT=y
|
||||
CONFIG_HWSPINLOCK_LIGHT_TEST=m
|
||||
CONFIG_MAILBOX=y
|
||||
CONFIG_RPMSG=y
|
||||
CONFIG_RPMSG_CHAR=y
|
||||
CONFIG_RPMSG_THEAD_LIGHT=y
|
||||
CONFIG_RPMSG_VIRTIO=y
|
||||
@@ -449,6 +429,7 @@ CONFIG_DEVFREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_DEVFREQ_GOV_POWERSAVE=y
|
||||
CONFIG_DEVFREQ_GOV_USERSPACE=y
|
||||
CONFIG_DEVFREQ_GOV_PASSIVE=y
|
||||
CONFIG_PM_DEVFREQ=y
|
||||
CONFIG_PM_DEVFREQ_EVENT=y
|
||||
CONFIG_EXTCON=y
|
||||
CONFIG_IIO=y
|
||||
@@ -471,6 +452,7 @@ CONFIG_OVERLAY_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_EXFAT_FS=m
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_HUGETLBFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
@@ -504,6 +486,7 @@ CONFIG_CRYPTO_USER_API_HASH=y
|
||||
CONFIG_CRYPTO_USER_API_SKCIPHER=y
|
||||
CONFIG_CRYPTO_USER_API_RNG=y
|
||||
CONFIG_CRYPTO_USER_API_AEAD=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_PERNUMA_CMA=y
|
||||
CONFIG_CMA_SIZE_MBYTES=32
|
||||
CONFIG_PRINTK_TIME=y
|
||||
|
||||
@@ -3403,16 +3403,6 @@ static void clk_debug_unregister(struct clk_core *core)
|
||||
core->dentry = NULL;
|
||||
mutex_unlock(&clk_debug_lock);
|
||||
}
|
||||
static bool noclk_debug_init = false;
|
||||
|
||||
/* noclkdebug bootargs: for option not init ftrace*/
|
||||
static int __init noclk_debug_setup(char *str)
|
||||
{
|
||||
noclk_debug_init = true;
|
||||
return 1;
|
||||
}
|
||||
|
||||
__setup("noclkdebug", noclk_debug_setup);
|
||||
|
||||
/**
|
||||
* clk_debug_init - lazily populate the debugfs clk directory
|
||||
@@ -3427,8 +3417,6 @@ static int __init clk_debug_init(void)
|
||||
{
|
||||
struct clk_core *core;
|
||||
|
||||
if(noclk_debug_init)
|
||||
return 0;
|
||||
#ifdef CLOCK_ALLOW_WRITE_DEBUGFS
|
||||
pr_warn("\n");
|
||||
pr_warn("********************************************************************\n");
|
||||
|
||||
@@ -430,7 +430,7 @@ static int light_clocks_probe(struct platform_device *pdev)
|
||||
clks[VISYS_AHB_HCLK] = thead_clk_light_divider("visys_ahb_hclk", "video_pll_foutvco", ap_base + 0x1d0, 0, 4, 4, MUX_TYPE_DIV, 6, 15);
|
||||
clks[VPSYS_APB_PCLK] = thead_clk_light_divider("vpsys_apb_pclk", "gmac_pll_fout1ph0", ap_base + 0x1e0, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
|
||||
clks[VPSYS_AXI_ACLK] = thead_clk_light_divider("vpsys_axi_aclk", "video_pll_foutvco", ap_base + 0x1e0, 8, 4, 12, MUX_TYPE_DIV, 3, 15);
|
||||
clks[VENC_CCLK] = thead_clk_light_divider_closest("venc_cclk", "gmac_pll_foutpostdiv", ap_base + 0x1e4, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
|
||||
clks[VENC_CCLK] = thead_clk_light_divider("venc_cclk", "gmac_pll_foutpostdiv", ap_base + 0x1e4, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
|
||||
clks[DPU0_PLL_DIV_CLK] = thead_clk_light_divider("dpu0_pll_div_clk", "dpu0_pll_foutpostdiv", ap_base + 0x1e8, 0, 8, 8, MUX_TYPE_DIV, 2, 214);
|
||||
clks[DPU1_PLL_DIV_CLK] = thead_clk_light_divider("dpu1_pll_div_clk", "dpu1_pll_foutpostdiv", ap_base + 0x1ec, 0, 8, 8, MUX_TYPE_DIV, 2, 214);
|
||||
|
||||
|
||||
@@ -550,12 +550,7 @@ static int clk_lightdiv_set_rate(struct clk_hw *hw, unsigned long rate,
|
||||
unsigned long flags = 0;
|
||||
u32 val;
|
||||
|
||||
/**
|
||||
* The clk-divider will calculate the node frequency by rounding up
|
||||
* based on the parent frequency and the target divider.
|
||||
* This calculation is to restore accurate frequency divider.
|
||||
*/
|
||||
divider = DIV64_U64_ROUND_CLOSEST(parent_rate, rate);
|
||||
divider = parent_rate / rate;
|
||||
|
||||
/* DIV is zero based divider, but CDE is not */
|
||||
if (light_div->div_type == MUX_TYPE_DIV)
|
||||
@@ -597,10 +592,10 @@ static const struct clk_ops clk_lightdiv_ops = {
|
||||
.set_rate = clk_lightdiv_set_rate,
|
||||
};
|
||||
|
||||
static struct clk *thead_clk_light_divider_internal(const char *name, const char *parent,
|
||||
struct clk *thead_clk_light_divider(const char *name, const char *parent,
|
||||
void __iomem *reg, u8 shift, u8 width,
|
||||
u8 sync, enum light_div_type div_type,
|
||||
u16 min, u16 max, bool closest)
|
||||
u16 min, u16 max)
|
||||
{
|
||||
struct clk_lightdiv *light_div;
|
||||
struct clk_hw *hw;
|
||||
@@ -627,10 +622,6 @@ static struct clk *thead_clk_light_divider_internal(const char *name, const char
|
||||
light_div->div_type = div_type;
|
||||
if (light_div->div_type == MUX_TYPE_DIV)
|
||||
light_div->divider.flags = CLK_DIVIDER_ONE_BASED;
|
||||
|
||||
if (closest)
|
||||
light_div->divider.flags |= CLK_DIVIDER_ROUND_CLOSEST;
|
||||
|
||||
light_div->min_div = min > ((1 << width) - 1) ?
|
||||
((1 << width) - 1) : min;
|
||||
light_div->max_div = max > ((1 << width) - 1) ?
|
||||
@@ -647,24 +638,6 @@ static struct clk *thead_clk_light_divider_internal(const char *name, const char
|
||||
return hw->clk;
|
||||
}
|
||||
|
||||
struct clk *thead_clk_light_divider(const char *name, const char *parent,
|
||||
void __iomem *reg, u8 shift, u8 width,
|
||||
u8 sync, enum light_div_type div_type,
|
||||
u16 min, u16 max)
|
||||
{
|
||||
return thead_clk_light_divider_internal(name, parent, reg, shift, width,
|
||||
sync, div_type, min, max, false);
|
||||
}
|
||||
|
||||
struct clk *thead_clk_light_divider_closest(const char *name, const char *parent,
|
||||
void __iomem *reg, u8 shift, u8 width,
|
||||
u8 sync, enum light_div_type div_type,
|
||||
u16 min, u16 max)
|
||||
{
|
||||
return thead_clk_light_divider_internal(name, parent, reg, shift, width,
|
||||
sync, div_type, min, max, true);
|
||||
}
|
||||
|
||||
static inline struct clk_lightgate *to_clk_lightgate(struct clk_hw *hw)
|
||||
{
|
||||
struct clk_gate *gate = to_clk_gate(hw);
|
||||
|
||||
@@ -90,15 +90,6 @@ struct clk *thead_clk_light_divider(const char *name, const char *parent,
|
||||
u8 sync, enum light_div_type div_type,
|
||||
u16 min, u16 max);
|
||||
|
||||
/**
|
||||
* By default, the clk framework calculates frequency by rounding downwards.
|
||||
* This function is to achieve closest frequency.
|
||||
*/
|
||||
struct clk *thead_clk_light_divider_closest(const char *name, const char *parent,
|
||||
void __iomem *reg, u8 shift, u8 width,
|
||||
u8 sync, enum light_div_type div_type,
|
||||
u16 min, u16 max);
|
||||
|
||||
void thead_unregister_clocks(struct clk *clks[], unsigned int count);
|
||||
|
||||
static inline struct clk *thead_clk_fixed(const char *name, unsigned long rate)
|
||||
|
||||
@@ -1,4 +1,3 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
obj-$(CONFIG_LIGHT_AON) += light_aon.o light_aon_misc.o light_aon_test.o
|
||||
obj-$(CONFIG_LIGHT_AON_PD) += light_aon_pd.o
|
||||
obj-y += light_proc_debug.o
|
||||
|
||||
@@ -12,12 +12,7 @@
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/light_proc_debug.h>
|
||||
#include <linux/firmware/thead/ipc.h>
|
||||
|
||||
/* wait for response for 3000ms instead of 300ms (fix me pls)*/
|
||||
#define MAX_RX_TIMEOUT (msecs_to_jiffies(3000))
|
||||
@@ -29,12 +24,6 @@ struct light_aon_chan {
|
||||
struct mbox_client cl;
|
||||
struct mbox_chan *ch;
|
||||
struct completion tx_done;
|
||||
/*for log proc*/
|
||||
phys_addr_t log_phy;
|
||||
size_t log_size;
|
||||
void __iomem *log_mem;
|
||||
void *log_ctrl;
|
||||
struct proc_dir_entry *proc_dir;
|
||||
};
|
||||
|
||||
struct light_aon_ipc {
|
||||
@@ -112,11 +101,9 @@ static void light_aon_rx_callback(struct mbox_client *c, void *msg)
|
||||
{
|
||||
struct light_aon_chan *aon_chan = container_of(c, struct light_aon_chan, cl);
|
||||
struct light_aon_ipc *aon_ipc = aon_chan->aon_ipc;
|
||||
struct light_aon_rpc_msg_hdr* hdr = (struct light_aon_rpc_msg_hdr*)msg;
|
||||
uint8_t recv_size = sizeof(struct light_aon_rpc_msg_hdr) + hdr->size;
|
||||
|
||||
memcpy(aon_ipc->msg, msg, recv_size);
|
||||
dev_dbg(aon_ipc->dev, "msg head: 0x%x, size:%d\n", *((u32 *)msg), recv_size);
|
||||
memcpy(aon_ipc->msg, msg, LIGHT_AON_RPC_MSG_NUM * sizeof(u32));
|
||||
dev_dbg(aon_ipc->dev, "msg head: 0x%x\n", *((u32 *)msg));
|
||||
complete(&aon_ipc->done);
|
||||
}
|
||||
|
||||
@@ -153,29 +140,19 @@ static int light_aon_ipc_write(struct light_aon_ipc *aon_ipc, void *msg)
|
||||
/*
|
||||
* RPC command/response
|
||||
*/
|
||||
int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, void *ack_msg, bool have_resp)
|
||||
int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, bool have_resp)
|
||||
{
|
||||
struct light_aon_rpc_msg_hdr *hdr = msg;
|
||||
int ret = 0;
|
||||
struct light_aon_rpc_msg_hdr *hdr;
|
||||
int ret;
|
||||
|
||||
if (WARN_ON(!aon_ipc || !msg))
|
||||
return -EINVAL;
|
||||
if(have_resp && WARN_ON(!ack_msg))
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&aon_ipc->lock);
|
||||
reinit_completion(&aon_ipc->done);
|
||||
|
||||
RPC_SET_VER(hdr, LIGHT_AON_RPC_VERSION);
|
||||
/*svc id use 6bit for version 2*/
|
||||
RPC_SET_SVC_ID(hdr, hdr->svc);
|
||||
RPC_SET_SVC_FLAG_MSG_TYPE(hdr, RPC_SVC_MSG_TYPE_DATA);
|
||||
|
||||
if (have_resp){
|
||||
aon_ipc->msg = ack_msg;
|
||||
RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NEED_ACK);
|
||||
} else {
|
||||
RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NO_NEED_ACK);
|
||||
}
|
||||
if (have_resp)
|
||||
aon_ipc->msg = msg;
|
||||
|
||||
ret = light_aon_ipc_write(aon_ipc, msg);
|
||||
if (ret < 0) {
|
||||
@@ -191,9 +168,9 @@ int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, void *ack_msg,
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
/* response status is stored in msg data[0] field */
|
||||
struct light_aon_rpc_ack_common* ack = ack_msg;
|
||||
ret = ack->err_code;
|
||||
/* response status is stored in hdr->func field */
|
||||
hdr = msg;
|
||||
ret = hdr->func;
|
||||
}
|
||||
|
||||
out:
|
||||
@@ -205,41 +182,12 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL(light_aon_call_rpc);
|
||||
|
||||
int get_aon_log_mem(struct device *dev, phys_addr_t* mem, size_t* mem_size)
|
||||
{
|
||||
struct resource r;
|
||||
ssize_t fw_size;
|
||||
void *mem_va;
|
||||
struct device_node *node;
|
||||
int ret;
|
||||
|
||||
*mem = 0;
|
||||
*mem_size = 0;
|
||||
|
||||
node = of_parse_phandle(dev->of_node, "log-memory-region", 0);
|
||||
if (!node) {
|
||||
dev_err(dev, "no memory-region specified\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = of_address_to_resource(node, 0, &r);
|
||||
if (ret) {
|
||||
dev_err(dev, "memory-region get resource faild\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
*mem = r.start;
|
||||
*mem_size = resource_size(&r);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int light_aon_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct light_aon_ipc *aon_ipc;
|
||||
struct light_aon_chan *aon_chan;
|
||||
struct mbox_client *cl;
|
||||
char dir_name[32] = {0x0};
|
||||
int ret;
|
||||
|
||||
aon_ipc = devm_kzalloc(dev, sizeof(*aon_ipc), GFP_KERNEL);
|
||||
@@ -272,33 +220,7 @@ static int light_aon_probe(struct platform_device *pdev)
|
||||
aon_ipc->dev = dev;
|
||||
mutex_init(&aon_ipc->lock);
|
||||
init_completion(&aon_ipc->done);
|
||||
aon_chan->log_ctrl = NULL;
|
||||
|
||||
ret = get_aon_log_mem(dev, &aon_chan->log_phy, &aon_chan->log_size);
|
||||
if(ret) {
|
||||
return ret;
|
||||
}
|
||||
aon_chan->log_mem = ioremap(aon_chan->log_phy, aon_chan->log_size);
|
||||
if (!IS_ERR(aon_chan->log_mem)) {
|
||||
printk("%s:virtual_log_mem=0x%p, phy base=0x%llx,size:%d\n",
|
||||
__func__, aon_chan->log_mem, aon_chan->log_phy,
|
||||
aon_chan->log_size);
|
||||
} else {
|
||||
aon_chan->log_mem = NULL;
|
||||
dev_err(dev, "%s:get aon log region fail\n",
|
||||
__func__);
|
||||
return -1;
|
||||
}
|
||||
|
||||
sprintf(dir_name, "aon_proc");
|
||||
aon_chan->proc_dir = proc_mkdir(dir_name, NULL);
|
||||
if (NULL != aon_chan->proc_dir) {
|
||||
aon_chan->log_ctrl = light_create_panic_log_proc(aon_chan->log_phy,
|
||||
aon_chan->proc_dir, aon_chan->log_mem, aon_chan->log_size);
|
||||
} else {
|
||||
dev_err(dev, "create %s fail\n", dir_name);
|
||||
return ret;
|
||||
}
|
||||
light_aon_ipc_handle = aon_ipc;
|
||||
|
||||
return devm_of_platform_populate(dev);
|
||||
|
||||
@@ -11,37 +11,37 @@ struct light_aon_msg_req_misc_set_ctrl {
|
||||
u32 val;
|
||||
u16 resource;
|
||||
u16 reserved[7];
|
||||
} __packed __aligned(1);
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct light_aon_msg_req_misc_get_ctrl {
|
||||
struct light_aon_rpc_msg_hdr hdr;
|
||||
u32 ctrl;
|
||||
u16 resource;
|
||||
u16 reserved[9];
|
||||
} __packed __aligned(1);
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct light_aon_msg_resp_misc_get_ctrl {
|
||||
struct light_aon_rpc_ack_common ack_hdr;
|
||||
struct light_aon_rpc_msg_hdr hdr;
|
||||
u32 val;
|
||||
u32 reserved[5];
|
||||
} __packed __aligned(1);
|
||||
} __packed __aligned(4);
|
||||
|
||||
int light_aon_misc_set_control(struct light_aon_ipc *ipc, u16 resource,
|
||||
u32 ctrl, u32 val)
|
||||
{
|
||||
struct light_aon_msg_req_misc_set_ctrl msg;
|
||||
struct light_aon_rpc_ack_common ack_msg;
|
||||
struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
|
||||
|
||||
hdr->ver = LIGHT_AON_RPC_VERSION;
|
||||
hdr->svc = (uint8_t)LIGHT_AON_RPC_SVC_MISC;
|
||||
hdr->func = (uint8_t)LIGHT_AON_MISC_FUNC_SET_CONTROL;
|
||||
hdr->size = LIGHT_AON_RPC_MSG_NUM;
|
||||
|
||||
RPC_SET_BE32(&msg.ctrl, 0, ctrl);
|
||||
RPC_SET_BE32(&msg.ctrl, 4, val);
|
||||
RPC_SET_BE16(&msg.ctrl, 8, resource);
|
||||
msg.ctrl = ctrl;
|
||||
msg.val = val;
|
||||
msg.resource = resource;
|
||||
|
||||
return light_aon_call_rpc(ipc, &msg, &ack_msg, true);
|
||||
return light_aon_call_rpc(ipc, &msg, true);
|
||||
}
|
||||
EXPORT_SYMBOL(light_aon_misc_set_control);
|
||||
|
||||
@@ -49,23 +49,25 @@ int light_aon_misc_get_control(struct light_aon_ipc *ipc, u16 resource,
|
||||
u32 ctrl, u32 *val)
|
||||
{
|
||||
struct light_aon_msg_req_misc_get_ctrl msg;
|
||||
struct light_aon_msg_resp_misc_get_ctrl resp;
|
||||
struct light_aon_msg_resp_misc_get_ctrl *resp;
|
||||
struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
|
||||
int ret;
|
||||
|
||||
hdr->ver = LIGHT_AON_RPC_VERSION;
|
||||
hdr->svc = (uint8_t)LIGHT_AON_RPC_SVC_MISC;
|
||||
hdr->func = (uint8_t)LIGHT_AON_MISC_FUNC_GET_CONTROL;
|
||||
hdr->size = LIGHT_AON_RPC_MSG_NUM;
|
||||
|
||||
RPC_SET_BE32(&msg.ctrl, 0, ctrl);
|
||||
RPC_SET_BE16(&msg.ctrl, 4, resource);
|
||||
msg.ctrl = ctrl;
|
||||
msg.resource = resource;
|
||||
|
||||
ret = light_aon_call_rpc(ipc, &msg, &resp, true);
|
||||
ret = light_aon_call_rpc(ipc, &msg, true);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
resp = (struct light_aon_msg_resp_misc_get_ctrl *)&msg;
|
||||
if (val != NULL)
|
||||
RPC_GET_BE32(&resp.val, 0, val);
|
||||
*val = resp->val;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -23,7 +23,7 @@ struct light_aon_msg_req_set_resource_power_mode {
|
||||
u16 resource;
|
||||
u16 mode;
|
||||
u16 reserved[10];
|
||||
} __packed __aligned(1);
|
||||
} __packed __aligned(4);
|
||||
|
||||
#define LIGHT_AONU_PD_NAME_SIZE 20
|
||||
#define LIGHT_AONU_PD_STATE_NAME_SIZE 10
|
||||
@@ -79,21 +79,21 @@ static inline struct light_aon_pm_domain *to_light_aon_pd(struct generic_pm_doma
|
||||
static int light_aon_pd_power(struct generic_pm_domain *domain, bool power_on)
|
||||
{
|
||||
struct light_aon_msg_req_set_resource_power_mode msg;
|
||||
struct light_aon_rpc_ack_common ack_msg;
|
||||
struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
|
||||
struct light_aon_pm_domain *pd;
|
||||
int ret;
|
||||
|
||||
pd = to_light_aon_pd(domain);
|
||||
|
||||
hdr->ver = LIGHT_AON_RPC_VERSION;
|
||||
hdr->svc = LIGHT_AON_RPC_SVC_PM;
|
||||
hdr->func = LIGHT_AON_PM_FUNC_SET_RESOURCE_POWER_MODE;
|
||||
hdr->size = LIGHT_AON_RPC_MSG_NUM;
|
||||
|
||||
RPC_SET_BE16(&msg.resource, 0, pd->rsrc);
|
||||
RPC_SET_BE16(&msg.resource, 2, (power_on ? LIGHT_AON_PM_PW_MODE_ON : LIGHT_AON_PM_PW_MODE_OFF));
|
||||
msg.resource = pd->rsrc;
|
||||
msg.mode = power_on ? LIGHT_AON_PM_PW_MODE_ON : LIGHT_AON_PM_PW_MODE_OFF;
|
||||
|
||||
ret = light_aon_call_rpc(pm_ipc_handle, &msg, &ack_msg, true);
|
||||
ret = light_aon_call_rpc(pm_ipc_handle, &msg, true);
|
||||
if (ret)
|
||||
dev_err(&domain->dev, "failed to power %s resource %d ret %d\n",
|
||||
power_on ? "up" : "off", pd->rsrc, ret);
|
||||
|
||||
@@ -25,20 +25,20 @@ struct light_aon_msg_req_misc_set_ctrl {
|
||||
u32 val;
|
||||
u16 resource;
|
||||
u16 reserved[7];
|
||||
} __packed __aligned(1);
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct light_aon_msg_req_misc_get_ctrl {
|
||||
struct light_aon_rpc_msg_hdr hdr;
|
||||
u32 ctrl;
|
||||
u16 resource;
|
||||
u16 reserved[9];
|
||||
} __packed __aligned(1);
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct light_aon_msg_resp_misc_get_ctrl {
|
||||
struct light_aon_rpc_msg_hdr hdr;
|
||||
u32 val;
|
||||
u32 reserved[5];
|
||||
} __packed __aligned(1);
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct light_aon_device {
|
||||
struct device *dev;
|
||||
|
||||
@@ -1,171 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* sys log sys for light c906 and e902
|
||||
* Copyright (C) 2021 Alibaba Group Holding Limited.
|
||||
*/
|
||||
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
#define GET_PAGE_NUM(size, offset) \
|
||||
((((size) + ((offset) & ~PAGE_MASK)) + PAGE_SIZE - 1) >> PAGE_SHIFT)
|
||||
|
||||
struct light_log_ring_buffer {
|
||||
__u32 read;
|
||||
__u32 write;
|
||||
__u32 size;
|
||||
__u32 reserved[1];
|
||||
__u8 data[0];
|
||||
};
|
||||
|
||||
struct light_hw_log {
|
||||
__u32 panic;
|
||||
__u32 reserved[2];
|
||||
struct light_log_ring_buffer rb;
|
||||
};
|
||||
|
||||
struct light_proc_log_ctrl {
|
||||
struct light_hw_log __iomem *log;
|
||||
struct proc_dir_entry *log_proc_file;
|
||||
phys_addr_t log_phy;
|
||||
};
|
||||
|
||||
static void memset_hw(void __iomem *dst, int c, size_t sz)
|
||||
{
|
||||
int i;
|
||||
volatile u32 *d_ptr = dst;
|
||||
for (i = 0; i < sz / 4; i++) {
|
||||
__raw_writel(c, d_ptr++);
|
||||
}
|
||||
}
|
||||
static void dump_regs(const char *fn, void *hw_arg)
|
||||
{
|
||||
struct light_proc_log_ctrl *log_ctrl = hw_arg;
|
||||
|
||||
if (!log_ctrl->log)
|
||||
return;
|
||||
|
||||
pr_debug("%s: panic = 0x%08x\n", fn,
|
||||
__raw_readl(&log_ctrl->log->panic));
|
||||
pr_debug("%s: read = 0x%08x, write = 0x%08x, size = 0x%08x\n", fn,
|
||||
__raw_readl(&log_ctrl->log->rb.read),
|
||||
__raw_readl(&log_ctrl->log->rb.write),
|
||||
__raw_readl(&log_ctrl->log->rb.size));
|
||||
}
|
||||
|
||||
static int log_proc_show(struct seq_file *file, void *v)
|
||||
{
|
||||
struct light_proc_log_ctrl *log_ctrl = file->private;
|
||||
char *buf;
|
||||
size_t i;
|
||||
/*dcache clean and invalid*/
|
||||
dma_wbinv_range(log_ctrl->log_phy, ((char*)log_ctrl->log_phy + sizeof(struct light_hw_log)));
|
||||
|
||||
uint32_t write = __raw_readl(&log_ctrl->log->rb.write);
|
||||
uint32_t read = __raw_readl(&log_ctrl->log->rb.read);
|
||||
uint32_t size = __raw_readl(&log_ctrl->log->rb.size);
|
||||
size_t log_size = write >= read ? write - read : size + write - read;
|
||||
|
||||
seq_printf(file,"****************** device log >>>>>>>>>>>>>>>>>\n");
|
||||
dump_regs(__func__, log_ctrl);
|
||||
if(!log_size) {
|
||||
seq_printf(file,"****************** end device log <<<<<<<<<<<<<<<<<\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
int page_num = GET_PAGE_NUM(log_size, 0);
|
||||
|
||||
int log_patch_1 = -1, log_patch_2 = -1;
|
||||
|
||||
buf = kmalloc(PAGE_SIZE * page_num, GFP_KERNEL);
|
||||
if (buf) {
|
||||
if(read + log_size >= size) {
|
||||
log_patch_2 = read + log_size - size + 1;
|
||||
log_patch_1 = log_size - log_patch_2;
|
||||
|
||||
} else {
|
||||
log_patch_1 = log_size;
|
||||
}
|
||||
|
||||
memcpy_fromio(buf, &log_ctrl->log->rb.data[read], log_patch_1);
|
||||
if(log_patch_2 > 0) {
|
||||
memcpy_fromio(buf, &log_ctrl->log->rb.data[0], log_patch_2);
|
||||
}
|
||||
|
||||
uint8_t last_fame_size = log_size % 64;
|
||||
|
||||
for (i = 0; i < log_size - last_fame_size; i += 64) {
|
||||
seq_printf(file, " %*pEp", 64, buf + i);
|
||||
}
|
||||
if(last_fame_size) {
|
||||
seq_printf(file, " %*pEp", last_fame_size, buf + log_size - last_fame_size);
|
||||
}
|
||||
|
||||
__raw_writel(write, &log_ctrl->log->rb.read);
|
||||
kfree(buf);
|
||||
/*dcahce clean*/
|
||||
dma_wb_range(log_ctrl->log_phy, ((char*)log_ctrl->log_phy + sizeof(struct light_hw_log)));
|
||||
//seq_printf(file,"\n%d %d %d %d %d\n",log_patch_1, log_patch_2, log_size ,last_fame_size, read);
|
||||
seq_printf(file,"\n****************** end device log <<<<<<<<<<<<<<<<<\n");
|
||||
return 0;
|
||||
} else {
|
||||
pr_debug("Fail to alloc buf\n");
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static bool light_panic_init(struct light_hw_log *hw_log, size_t size)
|
||||
{
|
||||
if (size < sizeof(struct light_hw_log)) {
|
||||
return false;
|
||||
}
|
||||
hw_log->rb.read = 0;
|
||||
hw_log->rb.size = size - sizeof(struct light_hw_log);
|
||||
return true;
|
||||
}
|
||||
|
||||
void *light_create_panic_log_proc(phys_addr_t log_phy, void *dir, void *log_info_addr, size_t size)
|
||||
{
|
||||
struct light_proc_log_ctrl *log_ctrl =
|
||||
kmalloc(sizeof(struct light_proc_log_ctrl), GFP_KERNEL);
|
||||
|
||||
if (log_ctrl == NULL)
|
||||
return NULL;
|
||||
|
||||
log_ctrl->log = log_info_addr;
|
||||
|
||||
light_panic_init(log_ctrl->log, size);
|
||||
|
||||
log_ctrl->log_proc_file = proc_create_single_data(
|
||||
"proc_log", 0644, dir, &log_proc_show, log_ctrl);
|
||||
if (log_ctrl->log_proc_file == NULL) {
|
||||
pr_debug("Error: Could not initialize %s\n", "dsp_log");
|
||||
kfree(log_ctrl);
|
||||
log_ctrl = NULL;
|
||||
} else {
|
||||
pr_debug("%s create Success!\n", "dsp_log");
|
||||
}
|
||||
log_ctrl->log_phy = log_phy;
|
||||
return log_ctrl;
|
||||
}
|
||||
|
||||
void light_remove_panic_log_proc(void *arg)
|
||||
{
|
||||
struct light_proc_log_ctrl *log_ctrl = (struct light_proc_log_ctrl *)arg;
|
||||
|
||||
proc_remove(log_ctrl->log_proc_file);
|
||||
kfree(log_ctrl);
|
||||
pr_debug("light proc log removed\n");
|
||||
}
|
||||
@@ -775,7 +775,6 @@ static int dwapb_gpio_suspend(struct device *dev)
|
||||
static int dwapb_gpio_resume(struct device *dev)
|
||||
{
|
||||
struct dwapb_gpio *gpio = dev_get_drvdata(dev);
|
||||
struct dwapb_context *ctx = gpio->ports[0].ctx;
|
||||
struct gpio_chip *gc = &gpio->ports[0].gc;
|
||||
unsigned long flags;
|
||||
int i, err;
|
||||
@@ -789,7 +788,6 @@ static int dwapb_gpio_resume(struct device *dev)
|
||||
spin_lock_irqsave(&gc->bgpio_lock, flags);
|
||||
for (i = 0; i < gpio->nr_ports; i++) {
|
||||
unsigned int offset;
|
||||
unsigned int int_pol,preserve_bit,resume_bit;
|
||||
unsigned int idx = gpio->ports[i].idx;
|
||||
struct dwapb_context *ctx = gpio->ports[i].ctx;
|
||||
|
||||
@@ -805,11 +803,7 @@ static int dwapb_gpio_resume(struct device *dev)
|
||||
/* Only port A can provide interrupts */
|
||||
if (idx == 0) {
|
||||
dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type);
|
||||
int_pol = dwapb_read(gpio, GPIO_INT_POLARITY);
|
||||
preserve_bit = int_pol & ctx->wake_en;
|
||||
resume_bit = ctx->int_pol & (~ctx->wake_en);
|
||||
int_pol = preserve_bit | resume_bit;
|
||||
dwapb_write(gpio, GPIO_INT_POLARITY, int_pol);
|
||||
dwapb_write(gpio, GPIO_INT_POLARITY, ctx->int_pol);
|
||||
dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb);
|
||||
dwapb_write(gpio, GPIO_INTEN, ctx->int_en);
|
||||
dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask);
|
||||
@@ -824,13 +818,8 @@ static int dwapb_gpio_resume(struct device *dev)
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops dwapb_gpio_pm_ops = {
|
||||
SET_LATE_SYSTEM_SLEEP_PM_OPS(dwapb_gpio_suspend, dwapb_gpio_resume)
|
||||
};
|
||||
|
||||
|
||||
//static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend,
|
||||
// dwapb_gpio_resume);
|
||||
static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend,
|
||||
dwapb_gpio_resume);
|
||||
|
||||
static struct platform_driver dwapb_gpio_driver = {
|
||||
.driver = {
|
||||
|
||||
@@ -58,7 +58,7 @@ SDK_DIR ?= $(AQROOT)/build/sdk
|
||||
VIVANTE_ENABLE_3D ?= 0
|
||||
VIVANTE_ENABLE_2D ?= 1
|
||||
VIVANTE_ENABLE_VG ?= 0
|
||||
VIVANTE_ENABLE_DRM ?= 0
|
||||
VIVANTE_ENABLE_DRM ?= 1
|
||||
NO_DMA_COHERENT ?= 0
|
||||
USE_PLATFORM_DRIVER ?= 1
|
||||
ENABLE_GPU_CLOCK_BY_DRIVER ?= 1
|
||||
|
||||
@@ -59,10 +59,6 @@
|
||||
|
||||
#include "gc_feature_database.h"
|
||||
#include <gc_hal_kernel_debug.h>
|
||||
#include <linux/printk.h>
|
||||
|
||||
#define CREATE_TRACE_POINTS
|
||||
#include <trace/events/g2d.h>
|
||||
|
||||
#define _GC_OBJ_ZONE gcvZONE_HARDWARE
|
||||
|
||||
@@ -302,7 +298,7 @@ _IdentifyHardwareByDatabase(
|
||||
|
||||
if (database == gcvNULL)
|
||||
{
|
||||
pr_err("[galcore]: Feature database is not found,"
|
||||
gcmkPRINT("[galcore]: Feature database is not found,"
|
||||
"chipModel=0x%0x, chipRevision=0x%x, productID=0x%x, ecoID=0x%x, customerID=0x%x",
|
||||
Hardware->identity.chipModel,
|
||||
Hardware->identity.chipRevision,
|
||||
@@ -313,7 +309,7 @@ _IdentifyHardwareByDatabase(
|
||||
}
|
||||
else if (database->chipVersion != Hardware->identity.chipRevision)
|
||||
{
|
||||
pr_warn("[galcore]: Warning: chipRevision mismatch, database chipRevision=0x%x register read chipRevision=0x%x\n",
|
||||
gcmkPRINT("[galcore]: Warning: chipRevision mismatch, database chipRevision=0x%x register read chipRevision=0x%x\n",
|
||||
database->chipVersion, Hardware->identity.chipRevision);
|
||||
}
|
||||
|
||||
@@ -1188,7 +1184,7 @@ _IsGPUPresent(
|
||||
|| (Hardware->signature.chipMinorFeatures2 != signature.chipMinorFeatures2)
|
||||
)
|
||||
{
|
||||
pr_err("[galcore]: GPU is not present.");
|
||||
gcmkPRINT("[galcore]: GPU is not present.");
|
||||
gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
|
||||
}
|
||||
|
||||
@@ -1751,7 +1747,7 @@ _ConfigurePolicyID(
|
||||
/* Check whether this bit changes. */
|
||||
if (auxBit != ((policyID >> 4) & 0x1))
|
||||
{
|
||||
pr_warn("[galcore]: AUX_BIT changes");
|
||||
gcmkPRINT("[galcore]: AUX_BIT changes");
|
||||
return;
|
||||
}
|
||||
}
|
||||
@@ -1834,7 +1830,7 @@ _QueryNNClusters(
|
||||
/* We only support maximum 8 clusters by current. */
|
||||
if (enableNN > 0x7)
|
||||
{
|
||||
pr_warn("[Galcore warning]: Invalid enableNN value is configured.");
|
||||
gcmkPRINT("[Galcore warning]: Invalid enableNN value is configured.");
|
||||
|
||||
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
|
||||
}
|
||||
@@ -1847,7 +1843,7 @@ _QueryNNClusters(
|
||||
|
||||
if (value && Hardware->identity.customerID != 0x85)
|
||||
{
|
||||
pr_warn("Galcore warning: Don't set enableNN as this chip not support NN cluster power control!\n");
|
||||
gcmkPRINT("Galcore warning: Don't set enableNN as this chip not support NN cluster power control!\n");
|
||||
}
|
||||
|
||||
Hardware->options.configNNPowerControl = value;
|
||||
@@ -1905,7 +1901,7 @@ _SetHardwareOptions(
|
||||
|
||||
if (options->enableMMU == gcvFALSE)
|
||||
{
|
||||
pr_err("Galcore warning: MMU is disabled!\n");
|
||||
gcmkPRINT("Galcore warning: MMU is disabled!\n");
|
||||
}
|
||||
|
||||
/* Query enabled NN clusters. */
|
||||
@@ -1939,7 +1935,7 @@ _SetHardwareOptions(
|
||||
}
|
||||
else if (options->userClusterMask & (~Hardware->identity.clusterAvailMask))
|
||||
{
|
||||
pr_warn("%s(%d): user cluster mask(0x%x) must be a subset of available clusters(0x%x),ignored it!",
|
||||
gcmkPRINT("%s(%d): user cluster mask(0x%x) must be a subset of available clusters(0x%x),ignored it!",
|
||||
__FUNCTION__, __LINE__, options->userClusterMask, Hardware->identity.clusterAvailMask);
|
||||
options->userClusterMasks[Hardware->core] = options->userClusterMask = Hardware->identity.clusterAvailMask;
|
||||
}
|
||||
@@ -3068,7 +3064,7 @@ gckHARDWARE_InitializeHardware(
|
||||
|
||||
gcmkSAFECASTPHYSADDRT(offset, Hardware->identity.registerAPB);
|
||||
|
||||
pr_warn("Initailize APB1 registers, APB offset is 0x%x.\n", offset);
|
||||
gcmkPRINT("Initailize APB1 registers, APB offset is 0x%x.\n", offset);
|
||||
|
||||
/* APB FE ctrl. */
|
||||
gcmkONERROR(gckOS_WriteRegisterEx(
|
||||
@@ -4625,7 +4621,7 @@ OnError:
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
static void
|
||||
_ResumeWaitLinkFE(
|
||||
gckHARDWARE Hardware
|
||||
)
|
||||
@@ -4636,18 +4632,14 @@ _ResumeWaitLinkFE(
|
||||
gctUINT32 idle;
|
||||
|
||||
/* Make sure FE is idle. */
|
||||
|
||||
gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
|
||||
do
|
||||
{
|
||||
gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
|
||||
Hardware->core,
|
||||
0x00004,
|
||||
&idle));
|
||||
|
||||
gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
|
||||
Hardware->core,
|
||||
0x00004,
|
||||
&idle));
|
||||
if(idle != 0x7FFFFFFF)
|
||||
return;
|
||||
}
|
||||
while (idle != 0x7FFFFFFF);
|
||||
|
||||
gcmkDUMP(Hardware->os, "@[register.wait 0x%05X 0x%08X 0x%08X]",
|
||||
0x00004,
|
||||
@@ -4720,7 +4712,6 @@ gckHARDWARE_Interrupt(
|
||||
Hardware->core,
|
||||
0x00010,
|
||||
&data);
|
||||
trace_g2d_irq_reg(0x00010,data);
|
||||
|
||||
if (gcmIS_ERROR(status))
|
||||
{
|
||||
@@ -4755,7 +4746,7 @@ gckHARDWARE_Interrupt(
|
||||
0x000D4,
|
||||
&dataEx
|
||||
);
|
||||
trace_g2d_irq_reg(0x000D4,dataEx);
|
||||
|
||||
if (gcmIS_ERROR(statusEx))
|
||||
{
|
||||
/*
|
||||
@@ -4824,6 +4815,13 @@ gckHARDWARE_Notify(
|
||||
|
||||
gckOS_AtomGet(Hardware->os, Hardware->kernel->eventObj->pending, (gctINT32_PTR)&pending);
|
||||
|
||||
if (pending & (1 << 29))
|
||||
{
|
||||
/* Event ID 29 is not a normal event, but for invalidating pipe. */
|
||||
_ResumeWaitLinkFE(Hardware);
|
||||
pending &= ~(1 << 29);
|
||||
}
|
||||
|
||||
gckOS_AtomSetMask(Hardware->kernel->eventObj->pending, pending);
|
||||
|
||||
/* Handle events. */
|
||||
@@ -7885,7 +7883,7 @@ gckHARDWARE_PowerControlClusters(
|
||||
#if gcdGPU_TIMEOUT
|
||||
if (timer >= Hardware->kernel->timeOut)
|
||||
{
|
||||
pr_err("%s %d Galcore timeout...\n", __FUNCTION__, __LINE__);
|
||||
gcmkPRINT("%s %d Galcore timeout...\n", __FUNCTION__, __LINE__);
|
||||
|
||||
gcmkONERROR(gcvSTATUS_DEVICE);
|
||||
}
|
||||
@@ -9221,7 +9219,7 @@ gckHARDWARE_SetPowerState(
|
||||
status = gckOS_TryAcquireSemaphore(os, Hardware->globalSemaphore);
|
||||
if (status != gcvSTATUS_TIMEOUT && Hardware->isLastPowerGlobal)
|
||||
{
|
||||
pr_err("%s: global state error", __FUNCTION__);
|
||||
gcmkPRINT("%s: global state error", __FUNCTION__);
|
||||
}
|
||||
|
||||
/* Switched to global ON, now release the global semaphore. */
|
||||
@@ -12623,14 +12621,14 @@ gckHARDWARE_Reset(
|
||||
Hardware, state
|
||||
));
|
||||
|
||||
pr_warn("[galcore]: recovery done");
|
||||
gcmkPRINT("[galcore]: recovery done");
|
||||
|
||||
/* Success. */
|
||||
gcmkFOOTER_NO();
|
||||
return gcvSTATUS_OK;
|
||||
|
||||
OnError:
|
||||
pr_err("[galcore]: Hardware not reset successfully, give up");
|
||||
gcmkPRINT("[galcore]: Hardware not reset successfully, give up");
|
||||
|
||||
if (globalAcquired)
|
||||
{
|
||||
|
||||
@@ -2436,39 +2436,39 @@ _FuncExecute_FLOPRESET(IN gcsFUNCTION_EXECUTION_PTR Execution)
|
||||
#if gcdENABLE_FLOP_RESET_DEBUG
|
||||
for (i = 0; i < Execution->funcCmdCount - minus_flag; i++)
|
||||
{
|
||||
pr_warn("outSizeBytes is : %d", Execution->funcCmd[i].outSize);
|
||||
pr_warn("outAddress is %x", Execution->funcCmd[i].data[2].address);
|
||||
gcmkPRINT("outSizeBytes is : %d", Execution->funcCmd[i].outSize);
|
||||
gcmkPRINT("outAddress is %x", Execution->funcCmd[i].data[2].address);
|
||||
for(j = 0; j < Execution->funcCmd[i].outSize; j++ )
|
||||
{
|
||||
if(((gctUINT8_PTR)(Execution->funcCmd[i].golden))[j] != ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[j])
|
||||
{
|
||||
if(i == 0)
|
||||
{
|
||||
pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
pr_warn("NN workaround verify failed!");
|
||||
gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
gcmkPRINT("NN workaround verify failed!");
|
||||
return status;
|
||||
}
|
||||
else if(i == 1)
|
||||
{
|
||||
pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
pr_warn("TP workaround verify failed!");
|
||||
gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
gcmkPRINT("TP workaround verify failed!");
|
||||
return status;
|
||||
}
|
||||
}
|
||||
}
|
||||
if(i == 0)
|
||||
{
|
||||
pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
pr_warn("NN workaround verify success!");
|
||||
gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
gcmkPRINT("NN workaround verify success!");
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
pr_warn("TP workaround verify success!");
|
||||
gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
|
||||
gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
|
||||
gcmkPRINT("TP workaround verify success!");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@@ -2576,7 +2576,7 @@ _ProgramMMUStates(
|
||||
case gcvSECURE_IN_TA:
|
||||
default:
|
||||
gcmkASSERT(gcvFALSE);
|
||||
pr_err("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
|
||||
gcmkPRINT("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -3467,7 +3467,7 @@ _ProgramMMUStatesMCFE(
|
||||
case gcvSECURE_IN_TA:
|
||||
default:
|
||||
gcmkASSERT(gcvFALSE);
|
||||
pr_err("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
|
||||
gcmkPRINT("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -4792,10 +4792,10 @@ _FuncRelease_PPU(IN gcsFUNCTION_EXECUTION_PTR Execution)
|
||||
if (((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i] != 0x02020202)
|
||||
{
|
||||
pass = gcvFALSE;
|
||||
pr_warn("Incorrect Result:[%d] 0x%08x\n", i, ((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i]);
|
||||
gcmkPRINT("Incorrect Result:[%d] 0x%08x\n", i, ((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i]);
|
||||
}
|
||||
}
|
||||
pr_warn("PPU %s!\n", pass?"PASS":"FAIL");
|
||||
gcmkPRINT("PPU %s!\n", pass?"PASS":"FAIL");
|
||||
|
||||
#endif
|
||||
|
||||
@@ -9831,7 +9831,7 @@ _FuncRelease_USC(IN gcsFUNCTION_EXECUTION_PTR Execution)
|
||||
|| *((gctUINT32_PTR)(Execution->funcCmd[0].data[3].logical)) == 0x44004400 /*FP16*/
|
||||
)
|
||||
{
|
||||
pr_warn("USC PASS! ");
|
||||
gcmkPRINT("USC PASS! ");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -176,7 +176,7 @@ _AllocateDescRingBuf(
|
||||
|
||||
if (Channel->physical > 0xffffffffull)
|
||||
{
|
||||
pr_err("%s(%d): MCFE ring buffer physical over 4G: 0x%llx",
|
||||
gcmkPRINT("%s(%d): MCFE ring buffer physical over 4G: 0x%llx",
|
||||
__FUNCTION__, __LINE__, (unsigned long long)Channel->physical);
|
||||
}
|
||||
|
||||
@@ -807,7 +807,7 @@ gckMCFE_Execute(
|
||||
|
||||
if (_NextPtr(ringBuf->writePtr) == ringBuf->readPtr)
|
||||
{
|
||||
pr_warn("%s: MCFE channel %s-%d ringBuf is full!",
|
||||
gcmkPRINT("%s: MCFE channel %s-%d ringBuf is full!",
|
||||
__FUNCTION__,
|
||||
Priority ? "Pri" : "Std",
|
||||
ChannelId);
|
||||
|
||||
@@ -54,8 +54,6 @@
|
||||
|
||||
|
||||
#include "gc_hal_kernel_precomp.h"
|
||||
#include <linux/module.h>
|
||||
#include <linux/ktime.h>
|
||||
|
||||
#if gcdDEC_ENABLE_AHB
|
||||
#include "viv_dec300_main.h"
|
||||
@@ -67,11 +65,9 @@
|
||||
|
||||
#define _GC_OBJ_ZONE gcvZONE_KERNEL
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
***** Version Signature *******************************************************/
|
||||
#define MAX_THREADS 10
|
||||
#define MAX_TIMESTAMPS 10
|
||||
|
||||
#define _gcmTXT2STR(t) #t
|
||||
#define gcmTXT2STR(t) _gcmTXT2STR(t)
|
||||
const char * _VERSION = "\n\0$VERSION$"
|
||||
@@ -84,7 +80,6 @@ const char * _VERSION = "\n\0$VERSION$"
|
||||
******************************* gckKERNEL API Code ******************************
|
||||
\******************************************************************************/
|
||||
|
||||
|
||||
#if gcmIS_DEBUG(gcdDEBUG_TRACE)
|
||||
#define gcmDEFINE2TEXT(d) #d
|
||||
gctCONST_STRING _DispatchText[] =
|
||||
@@ -1256,7 +1251,7 @@ AllocateMemory:
|
||||
#if gcdCAPTURE_ONLY_MODE
|
||||
else
|
||||
{
|
||||
pr_err("Capture only mode: Out of Memory");
|
||||
gcmkPRINT("Capture only mode: Out of Memory");
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -2342,7 +2337,7 @@ gckKERNEL_CacheOperation(
|
||||
if (!printed)
|
||||
{
|
||||
printed = gcvTRUE;
|
||||
pr_warn("[galcore]: %s: Flush Video Memory", __FUNCTION__);
|
||||
gcmkPRINT("[galcore]: %s: Flush Video Memory", __FUNCTION__);
|
||||
}
|
||||
|
||||
gcmkFOOTER_NO();
|
||||
@@ -2912,8 +2907,6 @@ gckKERNEL_Dispatch(
|
||||
gckCONTEXT context = gcvNULL;
|
||||
gckKERNEL kernel = Kernel;
|
||||
gctUINT32 processID;
|
||||
gcsDATABASE_PTR database;
|
||||
gctUINT i;
|
||||
#if !USE_NEW_LINUX_SIGNAL
|
||||
gctSIGNAL signal;
|
||||
#endif
|
||||
@@ -3239,35 +3232,9 @@ gckKERNEL_Dispatch(
|
||||
|
||||
case gcvUSER_SIGNAL_WAIT:
|
||||
/* Wait on the signal. */
|
||||
gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
|
||||
for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
|
||||
{
|
||||
for (database = kernel->db->db[i];
|
||||
database != gcvNULL;
|
||||
database = database->next)
|
||||
{
|
||||
database->st = database->st % 10;
|
||||
database->start_times[database->st] = ktime_get();
|
||||
}
|
||||
}
|
||||
gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
|
||||
|
||||
status = gckOS_WaitUserSignal(Kernel->os,
|
||||
Interface->u.UserSignal.id,
|
||||
Interface->u.UserSignal.wait);
|
||||
gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
|
||||
for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
|
||||
{
|
||||
for (database = kernel->db->db[i];
|
||||
database != gcvNULL;
|
||||
database = database->next)
|
||||
{
|
||||
database->st = database->st % 9;
|
||||
database->end_times[database->st++] = ktime_get();
|
||||
}
|
||||
}
|
||||
gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
|
||||
|
||||
break;
|
||||
|
||||
case gcvUSER_SIGNAL_MAP:
|
||||
@@ -3505,7 +3472,7 @@ gckKERNEL_Dispatch(
|
||||
Interface->u.ReadRegisterData.data = 0;
|
||||
status = gcvSTATUS_CHIP_NOT_READY;
|
||||
|
||||
pr_err("[galcore]: Can't dump state if GPU isn't POWER ON.");
|
||||
gcmkPRINT("[galcore]: Can't dump state if GPU isn't POWER ON.");
|
||||
}
|
||||
}
|
||||
break;
|
||||
@@ -4232,7 +4199,7 @@ gckKERNEL_Recovery(
|
||||
|
||||
if (Kernel->stuckDump == gcvSTUCK_DUMP_NONE)
|
||||
{
|
||||
pr_err("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core);
|
||||
gcmkPRINT("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core);
|
||||
}
|
||||
else if (Kernel->stuckDump == gcvSTUCK_DUMP_ALL_CORE)
|
||||
{
|
||||
@@ -4266,7 +4233,7 @@ gckKERNEL_Recovery(
|
||||
|
||||
if (Kernel->recovery == gcvFALSE)
|
||||
{
|
||||
pr_err("[galcore]: Stop driver to keep scene.");
|
||||
gcmkPRINT("[galcore]: Stop driver to keep scene.");
|
||||
|
||||
/* Stop monitor timer. */
|
||||
Kernel->monitorTimerStop = gcvTRUE;
|
||||
@@ -6046,7 +6013,7 @@ gckDEVICE_Profiler_Dispatch(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("unknown profileMode argument");
|
||||
gcmkPRINT("unknown profileMode argument");
|
||||
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -62,7 +62,6 @@
|
||||
#include "gc_hal_driver.h"
|
||||
#include "gc_hal_kernel_mutex.h"
|
||||
#include "gc_hal_metadata.h"
|
||||
#include <linux/ktime.h>
|
||||
|
||||
#if gcdENABLE_SW_PREEMPTION
|
||||
#include "gc_hal_kernel_preemption.h"
|
||||
@@ -292,13 +291,6 @@ typedef struct _gcsDATABASE
|
||||
/* Process ID. */
|
||||
gctUINT32 processID;
|
||||
|
||||
/* Process time. */
|
||||
ktime_t start_times[10];
|
||||
ktime_t end_times[10];
|
||||
gctUINT32 st;
|
||||
ktime_t max_hw_time;
|
||||
|
||||
|
||||
/* Open-Close ref count */
|
||||
gctPOINTER refs;
|
||||
|
||||
|
||||
@@ -4532,7 +4532,7 @@ gckCOMMAND_DumpExecutingBuffer(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("Can not find command buffer around 0x%08X.\n", gpuAddress);
|
||||
gcmkPRINT("Can not find command buffer around 0x%08X.\n", gpuAddress);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -4616,7 +4616,7 @@ gckCOMMAND_DumpExecutingBuffer(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("Not found");
|
||||
gcmkPRINT("Not found");
|
||||
}
|
||||
|
||||
/* new line. */
|
||||
@@ -4662,7 +4662,7 @@ gckCOMMAND_DumpExecutingBuffer(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("%08X sub command not found", node->address);
|
||||
gcmkPRINT("%08X sub command not found", node->address);
|
||||
}
|
||||
|
||||
/* new line */
|
||||
@@ -4842,7 +4842,7 @@ gckCOMMAND_PreemptCommit(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("Don't enable SW preemption for aysnc FE.\n");
|
||||
gcmkPRINT("Don't enable SW preemption for aysnc FE.\n");
|
||||
|
||||
gcmkONERROR(gcvSTATUS_NOT_SUPPORTED);
|
||||
}
|
||||
|
||||
@@ -1159,7 +1159,7 @@ gckKERNEL_DestroyProcessDB(
|
||||
}
|
||||
|
||||
#if gcdCAPTURE_ONLY_MODE
|
||||
pr_warn("Capture only mode: The max allocation from System Pool is %llu bytes", database->vidMemPool[gcvPOOL_SYSTEM].maxBytes);
|
||||
gcmkPRINT("Capture only mode: The max allocation from System Pool is %llu bytes", database->vidMemPool[gcvPOOL_SYSTEM].maxBytes);
|
||||
#endif
|
||||
|
||||
/* Cannot remove the database from the hash list
|
||||
@@ -1344,7 +1344,7 @@ gckKERNEL_DestroyProcessDB(
|
||||
|
||||
if (priorityID >= gcdMAX_PRIORITY_QUEUE_NUM)
|
||||
{
|
||||
pr_err("Galcore Info: get an error priority.");
|
||||
gcmkPRINT("Galcore Info: get an error priority.");
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
@@ -64,7 +64,6 @@
|
||||
#define gcdEVENT_ALLOCATION_COUNT (4096 / gcmSIZEOF(gcsHAL_INTERFACE))
|
||||
#define gcdEVENT_MIN_THRESHOLD 4
|
||||
|
||||
extern void _ResumeWaitLinkFE(gckHARDWARE Hardware);
|
||||
/******************************************************************************\
|
||||
********************************* Support Code *********************************
|
||||
\******************************************************************************/
|
||||
@@ -1871,12 +1870,6 @@ gckEVENT_Interrupt(
|
||||
)
|
||||
{
|
||||
/* Combine current interrupt status with pending flags. */
|
||||
if (Data & (1 << 29))
|
||||
{
|
||||
/* Event ID 29 is not a normal event, but for invalidating pipe. */
|
||||
_ResumeWaitLinkFE(Event->kernel->hardware);
|
||||
Data &= ~(1 << 29);
|
||||
}
|
||||
gckOS_AtomSetMask(Event->pending, Data);
|
||||
|
||||
#if gcdINTERRUPT_STATISTIC
|
||||
@@ -1985,7 +1978,7 @@ gckEVENT_Notify(
|
||||
|
||||
if (pending & 0x80000000)
|
||||
{
|
||||
pr_err("AXI BUS ERROR");
|
||||
gcmkPRINT("AXI BUS ERROR");
|
||||
pending &= 0x7FFFFFFF;
|
||||
|
||||
fault |= gcvEVENT_BUS_ERROR_FAULT;
|
||||
@@ -2491,29 +2484,29 @@ _PrintRecord(
|
||||
switch (record->info.command)
|
||||
{
|
||||
case gcvHAL_WRITE_DATA:
|
||||
pr_warn(" gcvHAL_WRITE_DATA");
|
||||
gcmkPRINT(" gcvHAL_WRITE_DATA");
|
||||
break;
|
||||
|
||||
case gcvHAL_UNLOCK_VIDEO_MEMORY:
|
||||
pr_warn(" gcvHAL_UNLOCK_VIDEO_MEMORY");
|
||||
gcmkPRINT(" gcvHAL_UNLOCK_VIDEO_MEMORY");
|
||||
break;
|
||||
|
||||
case gcvHAL_SIGNAL:
|
||||
pr_warn(" gcvHAL_SIGNAL process=%lld signal=0x%llx",
|
||||
gcmkPRINT(" gcvHAL_SIGNAL process=%lld signal=0x%llx",
|
||||
record->info.u.Signal.process,
|
||||
record->info.u.Signal.signal);
|
||||
break;
|
||||
|
||||
case gcvHAL_TIMESTAMP:
|
||||
pr_warn(" gcvHAL_TIMESTAMP");
|
||||
gcmkPRINT(" gcvHAL_TIMESTAMP");
|
||||
break;
|
||||
|
||||
case gcvHAL_COMMIT_DONE:
|
||||
pr_warn(" gcvHAL_COMMIT_DONE");
|
||||
gcmkPRINT(" gcvHAL_COMMIT_DONE");
|
||||
break;
|
||||
|
||||
case gcvHAL_DESTROY_MMU:
|
||||
pr_warn(" gcvHAL_DESTORY_MMU mmu=%p",
|
||||
gcmkPRINT(" gcvHAL_DESTORY_MMU mmu=%p",
|
||||
gcmUINT64_TO_PTR(record->info.u.DestroyMmu.mmu));
|
||||
|
||||
break;
|
||||
@@ -2603,7 +2596,7 @@ gckEVENT_Dump(
|
||||
);
|
||||
if (gcmIS_ERROR(status))
|
||||
{
|
||||
pr_err(" READ INTR_ACKNOWLEDGE ERROR!");
|
||||
gcmkPRINT(" READ INTR_ACKNOWLEDGE ERROR!");
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@@ -868,17 +868,17 @@ gckHEAP_ProfileEnd(
|
||||
gcmkVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
|
||||
gcmkVERIFY_ARGUMENT(Title != gcvNULL);
|
||||
|
||||
pr_debug("\n");
|
||||
pr_debug("=====[ HEAP - %s ]=====", Title);
|
||||
pr_debug("Number of allocations : %12u", Heap->allocCount);
|
||||
pr_debug("Number of bytes allocated : %12llu", Heap->allocBytes);
|
||||
pr_debug("Maximum allocation size : %12llu", Heap->allocBytesMax);
|
||||
pr_debug("Total number of bytes allocated : %12llu", Heap->allocBytesTotal);
|
||||
pr_debug("Number of heaps : %12u", Heap->heapCount);
|
||||
pr_debug("Heap memory in bytes : %12llu", Heap->heapMemory);
|
||||
pr_debug("Maximum number of heaps : %12u", Heap->heapCountMax);
|
||||
pr_debug("Maximum heap memory in bytes : %12llu", Heap->heapMemoryMax);
|
||||
pr_debug("==============================================");
|
||||
gcmkPRINT("\n");
|
||||
gcmkPRINT("=====[ HEAP - %s ]=====", Title);
|
||||
gcmkPRINT("Number of allocations : %12u", Heap->allocCount);
|
||||
gcmkPRINT("Number of bytes allocated : %12llu", Heap->allocBytes);
|
||||
gcmkPRINT("Maximum allocation size : %12llu", Heap->allocBytesMax);
|
||||
gcmkPRINT("Total number of bytes allocated : %12llu", Heap->allocBytesTotal);
|
||||
gcmkPRINT("Number of heaps : %12u", Heap->heapCount);
|
||||
gcmkPRINT("Heap memory in bytes : %12llu", Heap->heapMemory);
|
||||
gcmkPRINT("Maximum number of heaps : %12u", Heap->heapCountMax);
|
||||
gcmkPRINT("Maximum heap memory in bytes : %12llu", Heap->heapMemoryMax);
|
||||
gcmkPRINT("==============================================");
|
||||
|
||||
/* Success. */
|
||||
gcmkFOOTER_NO();
|
||||
|
||||
@@ -568,7 +568,7 @@ _CollectFreeSpace(
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
gcmkPRINT("%s(%d): [%d]: start=%d, entries=%d.\n",
|
||||
gckOS_Print("%s(%d): [%d]: start=%d, entries=%d.\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
i,
|
||||
array[i].start,
|
||||
@@ -775,7 +775,7 @@ gckMMU_FillFlatMappingWithPage16M(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -807,7 +807,7 @@ gckMMU_FillFlatMappingWithPage16M(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -915,12 +915,12 @@ gckMMU_FillFlatMappingWithPage16M(
|
||||
_WritePageEntry(Mmu->mtlbLogical + mCursor, mtlbEntry);
|
||||
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
mStart,
|
||||
_ReadPageEntry(Mmu->mtlbLogical + mCursor));
|
||||
|
||||
pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
stlbLogical,
|
||||
stlbPhyBase);
|
||||
@@ -952,7 +952,7 @@ gckMMU_FillFlatMappingWithPage16M(
|
||||
_WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
|
||||
}
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert STLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
sStart,
|
||||
_ReadPageEntry(stlbLogical + sStart));
|
||||
@@ -1123,7 +1123,7 @@ gckMMU_FillFlatMappingWithPage1M(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1144,7 +1144,7 @@ gckMMU_FillFlatMappingWithPage1M(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1241,12 +1241,12 @@ gckMMU_FillFlatMappingWithPage1M(
|
||||
_WritePageEntry(Mmu->mtlbLogical + mStart, mtlbEntry);
|
||||
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
mStart,
|
||||
_ReadPageEntry(Mmu->mtlbLogical + mStart));
|
||||
|
||||
pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
stlbLogical,
|
||||
stlbPhyBase);
|
||||
@@ -1298,7 +1298,7 @@ gckMMU_FillFlatMappingWithPage1M(
|
||||
_WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
|
||||
}
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert STLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
sStart,
|
||||
_ReadPageEntry(stlbLogical + sStart));
|
||||
@@ -1481,7 +1481,7 @@ gckMMU_FillFlatMappingWithPage64K(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1502,7 +1502,7 @@ gckMMU_FillFlatMappingWithPage64K(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1599,12 +1599,12 @@ gckMMU_FillFlatMappingWithPage64K(
|
||||
_WritePageEntry(Mmu->mtlbLogical + mStart, mtlbEntry);
|
||||
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
mStart,
|
||||
_ReadPageEntry(Mmu->mtlbLogical + mStart));
|
||||
|
||||
pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
stlbLogical,
|
||||
stlbPhyBase);
|
||||
@@ -1656,7 +1656,7 @@ gckMMU_FillFlatMappingWithPage64K(
|
||||
_WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
|
||||
}
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert STLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
sStart,
|
||||
_ReadPageEntry(stlbLogical + sStart));
|
||||
@@ -1839,7 +1839,7 @@ gckMMU_FillFlatMappingWithPage4K(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1860,7 +1860,7 @@ gckMMU_FillFlatMappingWithPage4K(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_warn("There is a hole in new flat mapping range, which is not correct");
|
||||
gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1957,12 +1957,12 @@ gckMMU_FillFlatMappingWithPage4K(
|
||||
_WritePageEntry(Mmu->mtlbLogical + mStart, mtlbEntry);
|
||||
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
mStart,
|
||||
_ReadPageEntry(Mmu->mtlbLogical + mStart));
|
||||
|
||||
pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
stlbLogical,
|
||||
stlbPhyBase);
|
||||
@@ -2016,7 +2016,7 @@ gckMMU_FillFlatMappingWithPage4K(
|
||||
_WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
|
||||
}
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert STLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
sStart,
|
||||
_ReadPageEntry(stlbLogical + sStart));
|
||||
@@ -2262,7 +2262,7 @@ _ConstructDynamicStlb(
|
||||
_WritePageEntry(Mmu->mtlbLogical + i, mtlbEntry);
|
||||
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
i,
|
||||
_ReadPageEntry(Mmu->mtlbLogical + i));
|
||||
@@ -2726,7 +2726,7 @@ _Construct(
|
||||
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
|
||||
}
|
||||
|
||||
pr_warn("Galcore warning: pre-flat mapping base address can't be lower than 0x1000000, adjust it to 0x1000000. ");
|
||||
gcmkPRINT("Galcore warning: pre-flat mapping base address can't be lower than 0x1000000, adjust it to 0x1000000. ");
|
||||
|
||||
physSize = gpuAddress + physSize - gcdMTLB_RESERVED_SIZE;
|
||||
|
||||
@@ -3049,7 +3049,7 @@ _Destroy(
|
||||
{
|
||||
_WritePageEntry(Mmu->mtlbLogical + pre->mtlbIndex + i, 0);
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): clean MTLB[%d]\n",
|
||||
gckOS_Print("%s(%d): clean MTLB[%d]\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
pre->mtlbIndex + i);
|
||||
#endif
|
||||
@@ -3697,7 +3697,7 @@ gckMMU_AllocatePagesEx(
|
||||
)
|
||||
{
|
||||
#if gcdDISABLE_GPU_VIRTUAL_ADDRESS
|
||||
pr_warn("GPU virtual address is disabled.");
|
||||
gcmkPRINT("GPU virtual address is disabled.");
|
||||
return gcvSTATUS_NOT_SUPPORTED;
|
||||
#else
|
||||
return _AllocatePages(Mmu, PageCount, Type, PageType, Secure, PageTable, Address);
|
||||
@@ -3883,7 +3883,7 @@ gckMMU_DumpPageTableEntry(
|
||||
* stlbEntryNum
|
||||
+ stlb;
|
||||
|
||||
pr_warn(" Page table entry = 0x%08X", _ReadPageEntry(pageTable + index));
|
||||
gcmkPRINT(" Page table entry = 0x%08X", _ReadPageEntry(pageTable + index));
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -3905,7 +3905,7 @@ gckMMU_DumpPageTableEntry(
|
||||
(gctUINT32_PTR)((gctUINT8_PTR)stlbChunkObj->logical + (i * gcdMMU_STLB_1M_SIZE));
|
||||
if (entry == stlbPhysBase)
|
||||
{
|
||||
pr_warn(" Page table entry = 0x%08X", stlbLogical[stlb]);
|
||||
gcmkPRINT(" Page table entry = 0x%08X", stlbLogical[stlb]);
|
||||
found = gcvTRUE;
|
||||
break;
|
||||
}
|
||||
@@ -3941,7 +3941,7 @@ gckMMU_CheckSaftPage(
|
||||
{
|
||||
if (safeLogical[offsets[i]] != 0)
|
||||
{
|
||||
pr_warn("%s(%d) safe page is over written [%d] = %x",
|
||||
gcmkPRINT("%s(%d) safe page is over written [%d] = %x",
|
||||
__FUNCTION__, __LINE__, i, safeLogical[offsets[i]]);
|
||||
}
|
||||
}
|
||||
@@ -3992,7 +3992,7 @@ gckMMU_DumpAddressSpace(
|
||||
|
||||
if (!used)
|
||||
{
|
||||
pr_warn("Available Range [%d - %d)", i, i + numPages);
|
||||
gcmkPRINT("Available Range [%d - %d)", i, i + numPages);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -4012,13 +4012,13 @@ gckMMU_DumpRecentFreedAddress(
|
||||
|
||||
if (queue->count)
|
||||
{
|
||||
pr_warn(" Recent %d freed GPU address ranges:", queue->count);
|
||||
gcmkPRINT(" Recent %d freed GPU address ranges:", queue->count);
|
||||
|
||||
for (i = 0; i < queue->count; i++)
|
||||
{
|
||||
gckQUEUE_GetData(queue, i, &data);
|
||||
|
||||
pr_warn(" [%08X - %08X]", data->addressData.start, data->addressData.end);
|
||||
gcmkPRINT(" [%08X - %08X]", data->addressData.start, data->addressData.end);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -4190,7 +4190,7 @@ gckMMU_FillFlatMapping(
|
||||
/* Flat mapping in page table. */
|
||||
_WritePageEntry(stlbEntry, _SetPage(physBase + i * gcdMMU_PAGE_4K_SIZE, 0, gcvTRUE));
|
||||
#if gcdMMU_TABLE_DUMP
|
||||
pr_warn("%s(%d): insert MTLB[%d] STLB[%d]: %08x\n",
|
||||
gckOS_Print("%s(%d): insert MTLB[%d] STLB[%d]: %08x\n",
|
||||
__FUNCTION__, __LINE__,
|
||||
(physBase & gcdMMU_MTLB_MASK) >> gcdMMU_MTLB_SHIFT,
|
||||
((physBase & gcdMMU_STLB_4K_MASK) >> gcdMMU_STLB_4K_SHIFT) + i,
|
||||
@@ -4407,7 +4407,7 @@ gckMMU_SetupSRAM(
|
||||
{
|
||||
if (Device->showSRAMMapInfo)
|
||||
{
|
||||
pr_warn("Galcore Info: MMU mapped core%d SRAM base=0x%llx size=0x%x",
|
||||
gcmkPRINT("Galcore Info: MMU mapped core%d SRAM base=0x%llx size=0x%x",
|
||||
i,
|
||||
reservedBase,
|
||||
reservedSize
|
||||
@@ -4547,7 +4547,7 @@ gckMMU_SetupSRAM(
|
||||
|
||||
if (Device->showSRAMMapInfo)
|
||||
{
|
||||
pr_warn("Galcore Info: MMU mapped core %d SRAM[%d] hardware virtual address=0x%x size=0x%x",
|
||||
gcmkPRINT("Galcore Info: MMU mapped core %d SRAM[%d] hardware virtual address=0x%x size=0x%x",
|
||||
Hardware->core,
|
||||
i,
|
||||
kernel->sRAMBaseAddresses[i],
|
||||
@@ -4577,7 +4577,7 @@ gckMMU_SetupSRAM(
|
||||
|
||||
if (Device->showSRAMMapInfo)
|
||||
{
|
||||
pr_warn("Galcore Info: MMU mapped external shared SRAM[%d] CPU view base=0x%llx GPU view base=0x%llx GPU virtual address=0x%x size=0x%x",
|
||||
gcmkPRINT("Galcore Info: MMU mapped external shared SRAM[%d] CPU view base=0x%llx GPU view base=0x%llx GPU virtual address=0x%x size=0x%x",
|
||||
i,
|
||||
Device->extSRAMBases[i],
|
||||
Device->extSRAMGPUBases[i],
|
||||
|
||||
@@ -189,10 +189,10 @@ _Policy(
|
||||
|
||||
if (Dvfs->totalConfig % 100 == 0)
|
||||
{
|
||||
pr_warn("=======================================================");
|
||||
pr_warn("GPU Load: %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
|
||||
gcmkPRINT("=======================================================");
|
||||
gcmkPRINT("GPU Load: %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
|
||||
8, 16, 24, 32, 40, 48, 56, 64);
|
||||
pr_warn(" %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
|
||||
gcmkPRINT(" %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
|
||||
_GetLoadHistory(Dvfs,2, 0),
|
||||
_GetLoadHistory(Dvfs,2, 1),
|
||||
_GetLoadHistory(Dvfs,2, 2),
|
||||
@@ -203,9 +203,9 @@ _Policy(
|
||||
_GetLoadHistory(Dvfs,2, 7)
|
||||
);
|
||||
|
||||
pr_warn("Frequency(MHz) %-8d %-8d %-8d %-8d %-8d",
|
||||
gcmkPRINT("Frequency(MHz) %-8d %-8d %-8d %-8d %-8d",
|
||||
58, 120, 240, 360, 480);
|
||||
pr_warn(" %-8d %-8d %-8d %-8d %-8d",
|
||||
gcmkPRINT(" %-8d %-8d %-8d %-8d %-8d",
|
||||
_GetFrequencyHistory(Dvfs, 58),
|
||||
_GetFrequencyHistory(Dvfs,120),
|
||||
_GetFrequencyHistory(Dvfs,240),
|
||||
|
||||
@@ -4552,7 +4552,7 @@ gckVIDMEM_NODE_WrapUserMemory(
|
||||
|
||||
if (IS_ERR(gcmUINT64_TO_PTR(Desc->dmabuf)))
|
||||
{
|
||||
pr_err("Wrap memory: invalid dmabuf from kernel.\n");
|
||||
gcmkPRINT("Wrap memory: invalid dmabuf from kernel.\n");
|
||||
|
||||
gcmkFOOTER();
|
||||
return gcvSTATUS_INVALID_ARGUMENT;
|
||||
@@ -4562,7 +4562,7 @@ gckVIDMEM_NODE_WrapUserMemory(
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("Wrap memory: invalid dmabuf fd.\n");
|
||||
gcmkPRINT("Wrap memory: invalid dmabuf fd.\n");
|
||||
|
||||
gcmkFOOTER();
|
||||
return gcvSTATUS_INVALID_ARGUMENT;
|
||||
|
||||
@@ -197,12 +197,12 @@ _DmaAlloc(
|
||||
#if gcdENABLE_BUFFERABLE_VIDEO_MEMORY
|
||||
if (set_memory_wc((unsigned long)(mdlPriv->kvaddr), NumPages) != 0)
|
||||
{
|
||||
pr_debug("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
|
||||
printk("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
|
||||
}
|
||||
#else
|
||||
if (set_memory_uc((unsigned long)(mdlPriv->kvaddr), NumPages) != 0)
|
||||
{
|
||||
pr_debug("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
|
||||
printk("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -591,12 +591,12 @@ _GFPAlloc(
|
||||
#if gcdENABLE_BUFFERABLE_VIDEO_MEMORY
|
||||
if (set_memory_wc((unsigned long)page_address(mdlPriv->contiguousPages), NumPages) != 0)
|
||||
{
|
||||
pr_debug("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
|
||||
printk("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
|
||||
}
|
||||
#else
|
||||
if (set_memory_uc((unsigned long)page_address(mdlPriv->contiguousPages), NumPages) != 0)
|
||||
{
|
||||
pr_debug("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
|
||||
printk("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@@ -665,12 +665,12 @@ _GFPAlloc(
|
||||
#if gcdENABLE_BUFFERABLE_VIDEO_MEMORY
|
||||
if (set_pages_array_wc(mdlPriv->nonContiguousPages, NumPages))
|
||||
{
|
||||
pr_debug("%s(%d): failed to set_pages_array_wc\n", __func__, __LINE__);
|
||||
printk("%s(%d): failed to set_pages_array_wc\n", __func__, __LINE__);
|
||||
}
|
||||
#else
|
||||
if (set_pages_array_uc(mdlPriv->nonContiguousPages, NumPages))
|
||||
{
|
||||
pr_debug("%s(%d): failed to set_pages_array_uc\n", __func__, __LINE__);
|
||||
printk("%s(%d): failed to set_pages_array_uc\n", __func__, __LINE__);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -195,7 +195,7 @@ reserved_mem_attach(
|
||||
|
||||
if (!region)
|
||||
{
|
||||
pr_debug("request mem %s(0x%lx - 0x%lx) failed\n",
|
||||
printk("request mem %s(0x%lx - 0x%lx) failed\n",
|
||||
res->name, res->start, res->start + res->size - 1);
|
||||
|
||||
kfree(res);
|
||||
@@ -314,13 +314,13 @@ reserved_mem_unmap_user(
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,0)
|
||||
if (vm_munmap((unsigned long)MdlMap->vmaAddr - res->offset_in_page, res->size) < 0)
|
||||
{
|
||||
pr_debug("%s: vm_munmap failed\n", __func__);
|
||||
printk("%s: vm_munmap failed\n", __func__);
|
||||
}
|
||||
#else
|
||||
down_write(¤t_mm_mmap_sem);
|
||||
if (do_munmap(current->mm, (unsigned long)MdlMap->vmaAddr - res->offset_in_page, res->size) < 0)
|
||||
{
|
||||
pr_debug("%s: do_munmap failed\n", __func__);
|
||||
printk("%s: do_munmap failed\n", __func__);
|
||||
}
|
||||
up_write(¤t_mm_mmap_sem);
|
||||
#endif
|
||||
|
||||
@@ -225,14 +225,14 @@ static int import_page_map(gckOS Os, struct um_desc *um,
|
||||
#endif
|
||||
if (unlikely(result < 0))
|
||||
{
|
||||
pr_debug("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
|
||||
printk("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
|
||||
goto error;
|
||||
}
|
||||
|
||||
result = dma_map_sg(galcore_device, um->sgt.sgl, um->sgt.nents, DMA_TO_DEVICE);
|
||||
if (unlikely(result != um->sgt.nents))
|
||||
{
|
||||
pr_debug("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
|
||||
printk("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
|
||||
goto error;
|
||||
}
|
||||
|
||||
@@ -393,7 +393,7 @@ static int import_pfn_map(gckOS Os, struct um_desc *um,
|
||||
#endif
|
||||
if (unlikely(result < 0))
|
||||
{
|
||||
pr_debug("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
|
||||
printk("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
|
||||
goto err;
|
||||
}
|
||||
|
||||
@@ -406,7 +406,7 @@ static int import_pfn_map(gckOS Os, struct um_desc *um,
|
||||
#else
|
||||
kfree(um->sgt.sgl);
|
||||
#endif
|
||||
pr_debug("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
|
||||
printk("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
|
||||
goto err;
|
||||
}
|
||||
|
||||
|
||||
@@ -148,7 +148,7 @@ gckOS_ImportAllocators(
|
||||
|
||||
if (gcmIS_ERROR(status))
|
||||
{
|
||||
pr_err("["DEVICE_NAME"]: Can't construct allocator(%s)",
|
||||
gcmkPRINT("["DEVICE_NAME"]: Can't construct allocator(%s)",
|
||||
allocatorArray[i].name);
|
||||
|
||||
continue;
|
||||
|
||||
@@ -1288,7 +1288,7 @@ gckOS_DumpBuffer(
|
||||
/* memory dump below. */
|
||||
if (Type >= gcvDUMP_BUFFER_TYPE_COUNT)
|
||||
{
|
||||
pr_err("#[ERROR: invalid buffer type]\n");
|
||||
gcmkPRINT("#[ERROR: invalid buffer type]\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@@ -72,24 +72,13 @@
|
||||
#include <linux/export.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/utsname.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#define _GC_OBJ_ZONE gcvZONE_DEVICE
|
||||
|
||||
#define MAX_TIMESTAMPS 10
|
||||
#define MAX_HW_PROCESS_TIME 90000000
|
||||
|
||||
static struct timer_list my_timer;
|
||||
static struct workqueue_struct *my_workqueue;
|
||||
static struct work_struct my_work;
|
||||
|
||||
static gckGALDEVICE galDevice;
|
||||
|
||||
extern gcTA globalTA[gcdMAX_GPU_COUNT];
|
||||
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
#if defined(CONFIG_CPU_CSKYV2) && LINUX_VERSION_CODE <= KERNEL_VERSION(3,0,8)
|
||||
static void
|
||||
@@ -334,9 +323,9 @@ int gc_load_show(void* m, void* data)
|
||||
{
|
||||
int len = 0;
|
||||
gctUINT32 i = 0;
|
||||
|
||||
|
||||
gckGALDEVICE device = galDevice;
|
||||
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
void* ptr = m;
|
||||
#else
|
||||
@@ -346,8 +335,8 @@ int gc_load_show(void* m, void* data)
|
||||
if (!device) {
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
for (i = 0; i <= gcvCORE_2D_MAX; i++)
|
||||
{
|
||||
@@ -1262,7 +1251,7 @@ static int set_clk(const char* buf)
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("Error: command format must be this: echo \"0 32 32\" > /sys/kernel/debug/gc/clk\n");
|
||||
printk("Error: command format must be this: echo \"0 32 32\" > /sys/kernel/debug/gc/clk\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1275,10 +1264,10 @@ static int set_clk(const char* buf)
|
||||
}
|
||||
|
||||
if (3 == sscanf(data, "%d %d %d", &dumpCore, &clkScale[0], &clkScale[1])) {
|
||||
pr_err("Change core:%d MC scale:%d SH scale:%d\n",
|
||||
printk("Change core:%d MC scale:%d SH scale:%d\n",
|
||||
dumpCore, clkScale[0], clkScale[1]);
|
||||
} else {
|
||||
pr_err("usage: echo \"0 32 32\" > clk\n");
|
||||
printk("usage: echo \"0 32 32\" > clk\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1290,7 +1279,7 @@ static int set_clk(const char* buf)
|
||||
}
|
||||
else
|
||||
{
|
||||
pr_err("Error: invalid core\n");
|
||||
printk("Error: invalid core\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
@@ -1365,7 +1354,7 @@ static int debugfs_copy_from_user(char *k_buf, const char __user *buf, size_t co
|
||||
ret = copy_from_user(k_buf, buf, count);
|
||||
if (ret != 0)
|
||||
{
|
||||
pr_err("Error: lost data: %d\n", (int)ret);
|
||||
printk("Error: lost data: %d\n", (int)ret);
|
||||
return -1;
|
||||
}
|
||||
|
||||
@@ -1855,7 +1844,7 @@ _SetupContiguousVidMem(
|
||||
|
||||
if (Args->showArgs)
|
||||
{
|
||||
pr_warn("Galcore Info: ContiguousBase=0x%llx ContiguousSize=0x%zx\n", device->contiguousBase, device->contiguousSize);
|
||||
gcmkPRINT("Galcore Info: ContiguousBase=0x%llx ContiguousSize=0x%zx\n", device->contiguousBase, device->contiguousSize);
|
||||
}
|
||||
|
||||
OnError:
|
||||
@@ -2079,7 +2068,7 @@ _SetupIsr(
|
||||
gcmkONERROR(gcvSTATUS_GENERIC_IO);
|
||||
}
|
||||
|
||||
pr_err("galcore: polling core%d int state\n", Core);
|
||||
gcmkPRINT("galcore: polling core%d int state\n", Core);
|
||||
|
||||
Device->isrThread[Core] = task;
|
||||
Device->isrInitializeds[Core] = gcvTRUE;
|
||||
@@ -2343,7 +2332,7 @@ _StopPreemptThread(
|
||||
/******************************************************************************\
|
||||
******************************* G2D Devfreq support START***********************
|
||||
\******************************************************************************/
|
||||
#ifdef CONFIG_PM_DEVFREQ
|
||||
|
||||
static int gc_df_target(struct device * dev, unsigned long *freq, u32 flags) {
|
||||
|
||||
int i = 0;
|
||||
@@ -2380,7 +2369,7 @@ static int gc_df_target(struct device * dev, unsigned long *freq, u32 flags) {
|
||||
for(i = 0; i < gcvCORE_2D_MAX; i++) {
|
||||
if(device->kernels[i]) {
|
||||
hardware = device->kernels[i]->hardware;
|
||||
if(hardware->os->clockStates[i]) {
|
||||
if(hardware->clockState) {
|
||||
gckHARDWARE_SetClock(hardware, i, _freq, _freq);
|
||||
device->kernels[i]->cur_freq = *freq;
|
||||
}
|
||||
@@ -2436,7 +2425,7 @@ static int gc_df_get_cur_freq(struct device *dev, unsigned long *freq) {
|
||||
struct devfreq_simple_ondemand_data galcore_gov_data;
|
||||
|
||||
static struct devfreq_dev_profile gc_df_profile = {
|
||||
.polling_ms = 50,
|
||||
.polling_ms = 500,
|
||||
.target = gc_df_target,
|
||||
.get_dev_status = gc_df_status,
|
||||
.get_cur_freq = gc_df_get_cur_freq,
|
||||
@@ -2452,7 +2441,7 @@ g2d_EnableDevfreq(void) {
|
||||
|
||||
ret = dev_pm_opp_of_add_table(galcore_device);
|
||||
if(ret) {
|
||||
pr_err("add table failed \n");
|
||||
gcmkPRINT("add table failed \n");
|
||||
}
|
||||
|
||||
new_clk = devm_clk_get(galcore_device, "cclk");
|
||||
@@ -2476,255 +2465,17 @@ g2d_EnableDevfreq(void) {
|
||||
galDevice->g2d_devfreq = devm_devfreq_add_device(galcore_device, &gc_df_profile, DEVFREQ_GOV_SIMPLE_ONDEMAND, &galcore_gov_data);
|
||||
|
||||
if(IS_ERR(galDevice->g2d_devfreq)) {
|
||||
pr_err("Errot: init devgreq %lx\n", (unsigned long)galcore_device);
|
||||
gcmkPRINT("Errot: init devgreq %lx\n", (unsigned long)galcore_device);
|
||||
status = gcvSTATUS_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
#endif
|
||||
|
||||
/******************************************************************************\
|
||||
******************************* Driver status query ****************************
|
||||
******************************* G2D Devfreq support END ************************
|
||||
\******************************************************************************/
|
||||
|
||||
gctUINT64 cur_on = 0, cur_idle = 0, cur_suspend = 0, cur_off = 0,
|
||||
busy_time = 0, total_time = 0, freq = 396000000;
|
||||
gctUINT64 on = 0;
|
||||
gctUINT64 off = 0;
|
||||
gctUINT64 idle = 0;
|
||||
gctUINT64 suspend = 0;
|
||||
int dev_loading_percent;
|
||||
int dev_loading_max_percent;
|
||||
int updatePeriod_ms = 50;
|
||||
|
||||
static ssize_t log_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
|
||||
{
|
||||
ssize_t len = 0;
|
||||
gctINT i, j,ct, pid, id = 0;
|
||||
gctINT devIncenum = 0;
|
||||
char name[24];
|
||||
gceSTATUS status;
|
||||
gckVIDMEM memory;
|
||||
gctUINT32 free = 0, used = 0, total = 0, minFree = 0, maxUsed = 0;
|
||||
gckGALDEVICE device = galDevice;
|
||||
gcsDATABASE_PTR database;
|
||||
gcsDATABASE_COUNTERS virtualCounter = {0, 0, 0};
|
||||
gckKERNEL kernel = _GetValidKernel(device);
|
||||
ktime_t result;
|
||||
|
||||
status = gckKERNEL_GetVideoMemoryPool(kernel, gcvPOOL_SYSTEM, &memory);
|
||||
|
||||
if (gcmIS_SUCCESS(status))
|
||||
{
|
||||
gcmkVERIFY_OK(
|
||||
gckOS_AcquireMutex(memory->os, memory->mutex, gcvINFINITE));
|
||||
|
||||
free = memory->freeBytes;
|
||||
minFree = memory->minFreeBytes;
|
||||
used = memory->bytes - memory->freeBytes;
|
||||
maxUsed = memory->bytes - memory->minFreeBytes;
|
||||
total = memory->bytes;
|
||||
|
||||
gcmkVERIFY_OK(gckOS_ReleaseMutex(memory->os, memory->mutex));
|
||||
}
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"[G2D] Version: %s\n"
|
||||
"Build Time【%s,%s,%s,%s】\n"
|
||||
"-------------------------------------------MODULE PARAM----------------------------------\n"
|
||||
"updatePeriod_ms\n"
|
||||
" %d\n",
|
||||
gcvVERSION_STRING, utsname()->sysname, utsname()->release, utsname()->version, utsname()->machine,
|
||||
updatePeriod_ms
|
||||
);
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"-------------------------------------------INSTANCE INFO---------------------------------\n");
|
||||
|
||||
if (!kernel)
|
||||
return -ENXIO;
|
||||
|
||||
gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
|
||||
if (kernel->db->idleTime)
|
||||
{
|
||||
/* Record idle time if DB upated. */
|
||||
kernel->db->idleTime = 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
|
||||
{
|
||||
for (database = kernel->db->db[i];
|
||||
database != gcvNULL;
|
||||
database = database->next)
|
||||
{
|
||||
static const char * otherCounterNames[] = {
|
||||
"AllocContiguous",
|
||||
"MapMemory",
|
||||
};
|
||||
gcsDATABASE_COUNTERS * otherCounters[] = {
|
||||
&database->contiguous,
|
||||
&database->mapMemory,
|
||||
};
|
||||
gcsDATABASE_COUNTERS * counter;
|
||||
pid = database->processID;
|
||||
|
||||
|
||||
for(j = 0; j < MAX_TIMESTAMPS; j++) {
|
||||
if(database->start_times[j] == 0) continue;
|
||||
if(database->end_times[j] - database->start_times[j] > result &&
|
||||
database->end_times[j] - database->start_times[j] < MAX_HW_PROCESS_TIME) {
|
||||
result = database->end_times[j] - database->start_times[j];
|
||||
if(result > database->max_hw_time) {
|
||||
database->max_hw_time = result;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
gcmkVERIFY_OK(gckOS_GetProcessNameByPid(pid, gcmSIZEOF(name), name));
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"ID: %d ProId: %-8d NAME: %s\n"
|
||||
"\n",
|
||||
id, pid, name
|
||||
);
|
||||
id++;
|
||||
devIncenum++;
|
||||
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
" Current Maximum Total\n");
|
||||
for (ct = 0; ct < gcmCOUNTOF(otherCounterNames); ct++)
|
||||
{
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"%-16s %16lld %16lld %16lld\n",
|
||||
otherCounterNames[ct],
|
||||
otherCounters[ct]->bytes,
|
||||
otherCounters[ct]->maxBytes,
|
||||
otherCounters[ct]->totalBytes);
|
||||
|
||||
}
|
||||
counter = &database->vidMemPool[gcvPOOL_VIRTUAL];
|
||||
virtualCounter.bytes += counter->bytes;
|
||||
virtualCounter.maxBytes += counter->maxBytes;
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"HwProcNs %lld %lld \n",
|
||||
result,database->max_hw_time);
|
||||
result = 0;
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"\n");
|
||||
|
||||
memset(database->start_times, 0, sizeof(database->start_times));
|
||||
memset(database->end_times, 0, sizeof(database->end_times));
|
||||
database->st = 0;
|
||||
|
||||
}
|
||||
}
|
||||
gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"-------------------------------------------MODULE STATUS---------------------------------\n"
|
||||
"DevInstanceNum DevLoading_%% DevLoadingMax_%%\n"
|
||||
"%d %d %d\n",
|
||||
devIncenum, dev_loading_percent, dev_loading_max_percent
|
||||
);
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"-----------------------------------------VIDEO MEMORY INFO-------------------------------\n"
|
||||
" POOL SYSTEM:\n"
|
||||
" Free Minfree Used MaxUsed Total\n"
|
||||
"%10u B %10u B %10u B %10u B %10u B\n"
|
||||
"\n"
|
||||
" POOL VIRTUAL:\n"
|
||||
" Used MaxUsed\n"
|
||||
"%10llu B %10llu B\n",
|
||||
free, minFree, used, maxUsed,total,
|
||||
virtualCounter.bytes, virtualCounter.maxBytes);
|
||||
|
||||
gckHARDWARE_QueryStateTimer(kernel->hardware, &on, &off, &idle, &suspend);
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"--------------------------------------------IDLE INFO------------------------------------\n"
|
||||
" On Off Suspend\n"
|
||||
"%lld ns %lld ns %lld ns",
|
||||
on, off, suspend);
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"\n\n");
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static ssize_t log_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
dev_loading_max_percent = 0;
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t updatePeriod_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf,"%u\n",updatePeriod_ms);
|
||||
}
|
||||
|
||||
static void timer_callback(struct timer_list *t) {
|
||||
queue_work(my_workqueue, &my_work);
|
||||
mod_timer(t, jiffies + msecs_to_jiffies(updatePeriod_ms));
|
||||
}
|
||||
|
||||
static void my_work_func(struct work_struct *work)
|
||||
{
|
||||
gckGALDEVICE device = galDevice;
|
||||
gckKERNEL kernel = _GetValidKernel(device);
|
||||
int i;
|
||||
|
||||
gckHARDWARE_QueryStateTimer(kernel->hardware, &on, &off, &idle, &suspend);
|
||||
|
||||
for(i = 0; i < gcvCORE_2D_MAX; i++) {
|
||||
if(device->kernels[i]) {
|
||||
freq = device->kernels[i]->cur_freq;
|
||||
}
|
||||
}
|
||||
|
||||
busy_time = on - cur_on;
|
||||
total_time = on - cur_on + idle - cur_idle + suspend - cur_suspend + off - cur_off;
|
||||
dev_loading_percent = busy_time * 100 / total_time / (396000000 / freq);
|
||||
if(dev_loading_max_percent < dev_loading_percent) {
|
||||
dev_loading_max_percent = dev_loading_percent;
|
||||
}
|
||||
cur_on = on;
|
||||
cur_idle = idle;
|
||||
cur_suspend = suspend;
|
||||
cur_off = off;
|
||||
}
|
||||
|
||||
static ssize_t updatePeriod_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
char *start = (char *)buf;
|
||||
updatePeriod_ms = simple_strtoul(start, &start, 0);
|
||||
if(updatePeriod_ms <= 0) {
|
||||
del_timer(&my_timer);
|
||||
if (my_workqueue)
|
||||
destroy_workqueue(my_workqueue);
|
||||
} else {
|
||||
my_workqueue = create_workqueue("my_workqueue");
|
||||
INIT_WORK(&my_work, my_work_func);
|
||||
timer_setup(&my_timer, timer_callback, 0);
|
||||
mod_timer(&my_timer, jiffies + msecs_to_jiffies(updatePeriod_ms));
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
static struct kobj_attribute log_attr = __ATTR(log, 0664, log_show, log_store);
|
||||
|
||||
static struct kobj_attribute updatePeriod_attr = __ATTR(updatePeriod_ms, 0664, updatePeriod_show, updatePeriod_store);
|
||||
|
||||
static struct attribute *attrs[] = {
|
||||
&log_attr.attr,
|
||||
&updatePeriod_attr.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct attribute_group xrp_dev_attr_group = {
|
||||
.name = "info",
|
||||
.attrs = attrs,
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
**
|
||||
@@ -2751,7 +2502,7 @@ gckGALDEVICE_Construct(
|
||||
gckGALDEVICE device;
|
||||
gceSTATUS status = gcvSTATUS_OK;
|
||||
gctUINT64 isrPolling = -1;
|
||||
gctINT32 i, ret;
|
||||
gctINT32 i;
|
||||
|
||||
gcmkHEADER_ARG("Platform=%p Args=%p", Platform, Args);
|
||||
|
||||
@@ -2802,7 +2553,7 @@ gckGALDEVICE_Construct(
|
||||
else
|
||||
{
|
||||
#if USE_LINUX_PCIE
|
||||
pr_warn("register should be mapped in platform layer");
|
||||
gcmkPRINT("register should be mapped in platform layer");
|
||||
#endif
|
||||
if (!request_mem_region(physical,
|
||||
device->requestedRegisterMemSizes[i],
|
||||
@@ -3095,21 +2846,8 @@ gckGALDEVICE_Construct(
|
||||
|
||||
/* Return pointer to the device. */
|
||||
*Device = galDevice = device;
|
||||
#ifdef CONFIG_PM_DEVFREQ
|
||||
g2d_EnableDevfreq();
|
||||
devfreq_suspend_device(galDevice->g2d_devfreq);
|
||||
#endif
|
||||
ret = sysfs_create_group(&galcore_device->kobj, &xrp_dev_attr_group);
|
||||
if (ret) {
|
||||
dev_err(galcore_device, "Failed to create xrp dev sysfs.\n");
|
||||
goto OnError;
|
||||
}
|
||||
my_workqueue = create_workqueue("my_workqueue");
|
||||
|
||||
INIT_WORK(&my_work, my_work_func);
|
||||
timer_setup(&my_timer, timer_callback, 0);
|
||||
|
||||
mod_timer(&my_timer, jiffies + msecs_to_jiffies(100));
|
||||
|
||||
OnError:
|
||||
if (gcmIS_ERROR(status))
|
||||
@@ -3148,12 +2886,7 @@ gckGALDEVICE_Destroy(
|
||||
gckKERNEL kernel = gcvNULL;
|
||||
|
||||
gcmkHEADER_ARG("Device=%p", Device);
|
||||
|
||||
sysfs_remove_group(&galcore_device->kobj, &xrp_dev_attr_group);
|
||||
del_timer(&my_timer);
|
||||
if (my_workqueue) {
|
||||
destroy_workqueue(my_workqueue);
|
||||
}
|
||||
|
||||
if (Device != gcvNULL)
|
||||
{
|
||||
/* Grab the first available kernel */
|
||||
|
||||
@@ -150,12 +150,11 @@ typedef struct _gckGALDEVICE
|
||||
/* gctsOs object for trust application. */
|
||||
gctaOS taos;
|
||||
|
||||
/*Number of devices opened*/
|
||||
/*Number of devices opened*/
|
||||
atomic_t openNum;
|
||||
/*object of devfreq add device*/
|
||||
#ifdef CONFIG_PM_DEVFREQ
|
||||
struct devfreq *g2d_devfreq;
|
||||
#endif
|
||||
|
||||
#if gcdENABLE_DRM
|
||||
void * drm;
|
||||
#endif
|
||||
|
||||
@@ -70,6 +70,7 @@
|
||||
MODULE_DESCRIPTION("Vivante Graphics Driver");
|
||||
MODULE_LICENSE("Dual MIT/GPL");
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)
|
||||
MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);
|
||||
#endif
|
||||
|
||||
static struct class* gpuClass = NULL;
|
||||
@@ -644,7 +645,7 @@ gckOS_DumpParam(
|
||||
{
|
||||
gctINT i;
|
||||
|
||||
gcmkPRINT("Galcore options:\n");
|
||||
printk("Galcore options:\n");
|
||||
|
||||
#if USE_LINUX_PCIE
|
||||
if (bar != -1)
|
||||
@@ -821,10 +822,8 @@ static int drv_open(
|
||||
filp->private_data = data;
|
||||
|
||||
/* Success. */
|
||||
#ifdef CONFIG_PM_DEVFREQ
|
||||
atomic_inc_return(&galDevice->openNum);
|
||||
devfreq_resume_device(galDevice->g2d_devfreq);
|
||||
#endif
|
||||
gcmkFOOTER_NO();
|
||||
return 0;
|
||||
}
|
||||
@@ -890,12 +889,10 @@ static int drv_release(
|
||||
|
||||
kfree(data);
|
||||
filp->private_data = NULL;
|
||||
#ifdef CONFIG_PM_DEVFREQ
|
||||
|
||||
if(atomic_dec_return(&galDevice->openNum) == 0) {
|
||||
devfreq_suspend_device(galDevice->g2d_devfreq);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Success. */
|
||||
ret = 0;
|
||||
|
||||
@@ -1163,7 +1160,7 @@ static int drv_init(void)
|
||||
|
||||
gcmkHEADER();
|
||||
|
||||
pr_info("Galcore version %s\n", gcvVERSION_STRING);
|
||||
printk(KERN_INFO "Galcore version %s\n", gcvVERSION_STRING);
|
||||
|
||||
if (showArgs)
|
||||
{
|
||||
@@ -1388,11 +1385,11 @@ static int __devinit gpu_probe(struct platform_device *pdev)
|
||||
contiguousBaseCap = platform->params.contiguousBase;
|
||||
contiguousSizeCap = platform->params.contiguousSize;
|
||||
|
||||
pr_warn("Capture only mode is enabled in Hal Kernel.");
|
||||
gcmkPRINT("Capture only mode is enabled in Hal Kernel.");
|
||||
|
||||
if ((contiguousBaseCap + contiguousSizeCap) > 0x80000000)
|
||||
{
|
||||
pr_err("Capture only mode: contiguousBase + contiguousSize > 2G, there is error in CModel and old MMU version RTL simulation.");
|
||||
gcmkPRINT("Capture only mode: contiguousBase + contiguousSize > 2G, there is error in CModel and old MMU version RTL simulation.");
|
||||
}
|
||||
|
||||
for (i = 0; i < gcvCORE_COUNT; i++)
|
||||
@@ -1441,7 +1438,7 @@ static int __devinit gpu_probe(struct platform_device *pdev)
|
||||
|
||||
if (powerManagement == 0)
|
||||
{
|
||||
pr_err("[galcore warning]: power saveing is disabled.");
|
||||
gcmkPRINT("[galcore warning]: power saveing is disabled.");
|
||||
}
|
||||
|
||||
ret = drv_init();
|
||||
@@ -1465,14 +1462,14 @@ static int __devinit gpu_probe(struct platform_device *pdev)
|
||||
}
|
||||
}
|
||||
|
||||
pr_info("Failed to register gpu driver: %d\n", ret);
|
||||
gcmkFOOTER_ARG(KERN_INFO "Failed to register gpu driver: %d\n", ret);
|
||||
}
|
||||
else
|
||||
{
|
||||
gcmkFOOTER_NO();
|
||||
}
|
||||
|
||||
pr_info("Success ret=%d", ret);
|
||||
gcmkFOOTER_ARG(KERN_INFO "Success ret=%d", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -1653,7 +1650,7 @@ static int __init gpu_init(void)
|
||||
|
||||
if (ret || !platform)
|
||||
{
|
||||
pr_err("galcore: Soc platform init failed.\n");
|
||||
printk(KERN_ERR "galcore: Soc platform init failed.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@@ -1661,7 +1658,7 @@ static int __init gpu_init(void)
|
||||
|
||||
if (ret)
|
||||
{
|
||||
pr_err("galcore: gpu_init() failed to register driver!\n");
|
||||
printk(KERN_ERR "galcore: gpu_init() failed to register driver!\n");
|
||||
gckPLATFORM_Terminate(platform);
|
||||
platform = NULL;
|
||||
return -ENODEV;
|
||||
|
||||
@@ -905,7 +905,7 @@ OnError:
|
||||
{
|
||||
drm_dev_unref(drm);
|
||||
}
|
||||
pr_err("galcore: Failed to setup drm device.\n");
|
||||
printk(KERN_ERR "galcore: Failed to setup drm device.\n");
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ gckIOMMU_Construct(
|
||||
|
||||
*Iommu = iommu;
|
||||
|
||||
pr_debug("[galcore]: Enable IOMMU\n");
|
||||
gcmkPRINT("[galcore]: Enable IOMMU\n");
|
||||
OnError:
|
||||
if (gcmIS_ERROR(status))
|
||||
{
|
||||
|
||||
@@ -1664,7 +1664,7 @@ gckOS_RequestReservedMemory(
|
||||
allocator = _FindAllocator(Os, gcvALLOC_FLAG_LINUX_RESERVED_MEM);
|
||||
if (!allocator)
|
||||
{
|
||||
pr_err("reserved-mem allocator not integrated!");
|
||||
gcmkPRINT("reserved-mem allocator not integrated!");
|
||||
gcmkONERROR(gcvSTATUS_GENERIC_IO);
|
||||
}
|
||||
|
||||
@@ -1913,7 +1913,7 @@ gckOS_ReadRegisterEx(
|
||||
* 2. In non-irq context, register access should not be called,
|
||||
* otherwise it's driver bug.
|
||||
*/
|
||||
pr_err("[galcore]: %s(%d) GPU[%d] external clock off",
|
||||
printk(KERN_ERR "[galcore]: %s(%d) GPU[%d] external clock off",
|
||||
__func__, __LINE__, Core);
|
||||
gcmkBUG_ON(1);
|
||||
return gcvSTATUS_GENERIC_IO;
|
||||
@@ -1924,7 +1924,7 @@ gckOS_ReadRegisterEx(
|
||||
|
||||
#if gcdDUMP_AHB_ACCESS
|
||||
/* Dangerous to print in interrupt context, skip. */
|
||||
pr_warn("@[RD %d] %08x %08x", Core, Address, *Data);
|
||||
gcmkPRINT("@[RD %d] %08x %08x", Core, Address, *Data);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -1954,7 +1954,7 @@ _WriteRegisterEx(
|
||||
{
|
||||
spin_unlock(&Os->registerAccessLock);
|
||||
|
||||
pr_err("[galcore]: %s(%d) GPU[%d] external clock off",
|
||||
printk(KERN_ERR "[galcore]: %s(%d) GPU[%d] external clock off",
|
||||
__func__, __LINE__, Core);
|
||||
|
||||
/* Driver bug: register write when clock off. */
|
||||
@@ -1980,7 +1980,7 @@ _WriteRegisterEx(
|
||||
{
|
||||
spin_unlock_irqrestore(&Os->registerAccessLock, flags);
|
||||
|
||||
pr_err("[galcore]: %s(%d) GPU[%d] external clock off",
|
||||
printk(KERN_ERR "[galcore]: %s(%d) GPU[%d] external clock off",
|
||||
__func__, __LINE__, Core);
|
||||
|
||||
/* Driver bug: register write when clock off. */
|
||||
@@ -1993,7 +1993,7 @@ _WriteRegisterEx(
|
||||
|
||||
#if gcdDUMP_AHB_ACCESS
|
||||
/* Dangerous to print in interrupt context, skip. */
|
||||
pr_warn("@[WR %d] %08x %08x", Core, Address, Data);
|
||||
gcmkPRINT("@[WR %d] %08x %08x", Core, Address, Data);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -4462,7 +4462,7 @@ _CacheOperation(
|
||||
|
||||
if (!mdl || !mdl->allocator)
|
||||
{
|
||||
pr_err("[galcore]: %s: Logical=%p no mdl", __FUNCTION__, Logical);
|
||||
gcmkPRINT("[galcore]: %s: Logical=%p no mdl", __FUNCTION__, Logical);
|
||||
return gcvSTATUS_INVALID_ARGUMENT;
|
||||
}
|
||||
|
||||
@@ -7600,7 +7600,7 @@ gckOS_WrapMemory(
|
||||
{
|
||||
/* Won't enter here currently, the caller confirms the dmabuf is valid. */
|
||||
|
||||
pr_err("Wrap memory: invalid dmabuf.\n");
|
||||
gcmkPRINT("Wrap memory: invalid dmabuf.\n");
|
||||
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
|
||||
}
|
||||
|
||||
|
||||
@@ -584,7 +584,7 @@ _QueryBarInfo(
|
||||
return;
|
||||
}
|
||||
|
||||
pr_warn("Bar%d addr=0x%x size=0x%x", BarNum, addr, size);
|
||||
gcmkPRINT("Bar%d addr=0x%x size=0x%x", BarNum, addr, size);
|
||||
|
||||
*BarAddr = addr;
|
||||
*BarSize = size;
|
||||
@@ -613,31 +613,31 @@ static int gpu_sub_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
static u64 dma_mask = DMA_40BIT_MASK;
|
||||
#endif
|
||||
|
||||
pr_debug("PCIE DRIVER PROBED");
|
||||
gcmkPRINT("PCIE DRIVER PROBED");
|
||||
if (pci_enable_device(pdev)) {
|
||||
pr_err("galcore: pci_enable_device() failed.\n");
|
||||
printk(KERN_ERR "galcore: pci_enable_device() failed.\n");
|
||||
}
|
||||
|
||||
if (pci_set_dma_mask(pdev, dma_mask)) {
|
||||
pr_err("galcore: Failed to set DMA mask.\n");
|
||||
printk(KERN_ERR "galcore: Failed to set DMA mask.\n");
|
||||
}
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
if (pci_request_regions(pdev, "galcore")) {
|
||||
pr_err("galcore: Failed to get ownership of BAR region.\n");
|
||||
printk(KERN_ERR "galcore: Failed to get ownership of BAR region.\n");
|
||||
}
|
||||
|
||||
#if USE_MSI
|
||||
if (pci_enable_msi(pdev)) {
|
||||
pr_err("galcore: Failed to enable MSI.\n");
|
||||
printk(KERN_ERR "galcore: Failed to enable MSI.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PPC)
|
||||
/* On PPC platform, enable bus master, enable irq. */
|
||||
if (pci_write_config_word(pdev, 0x4, 0x0006) < 0) {
|
||||
pr_err("galcore: Failed to enable bus master on PPC.\n");
|
||||
printk(KERN_ERR "galcore: Failed to enable bus master on PPC.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -824,14 +824,14 @@ int gckPLATFORM_Init(struct platform_driver *pdrv,
|
||||
struct platform_device *default_dev = platform_device_alloc(pdrv->driver.name, -1);
|
||||
|
||||
if (!default_dev) {
|
||||
pr_err("galcore: platform_device_alloc failed.\n");
|
||||
printk(KERN_ERR "galcore: platform_device_alloc failed.\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* Add device */
|
||||
ret = platform_device_add(default_dev);
|
||||
if (ret) {
|
||||
pr_err("galcore: platform_device_add failed.\n");
|
||||
printk(KERN_ERR "galcore: platform_device_add failed.\n");
|
||||
platform_device_put(default_dev);
|
||||
return ret;
|
||||
}
|
||||
@@ -848,7 +848,7 @@ int gckPLATFORM_Init(struct platform_driver *pdrv,
|
||||
pdrv->driver.of_match_table = gpu_dt_ids;
|
||||
ret = gpu_power_domain_init();
|
||||
if (ret) {
|
||||
pr_err("galcore: gpu_gpc_init failed.\n");
|
||||
printk(KERN_ERR "galcore: gpu_gpc_init failed.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -60,7 +60,6 @@
|
||||
#include "gc_hal_ta_hardware.h"
|
||||
#include "gc_hal.h"
|
||||
#include "gc_feature_database.h"
|
||||
#include <linux/printk.h>
|
||||
|
||||
|
||||
#define _GC_OBJ_ZONE 1
|
||||
@@ -188,7 +187,7 @@ _IdentifyHardwareByDatabase(
|
||||
|
||||
if (database == gcvNULL)
|
||||
{
|
||||
pr_warn("[galcore]: Feature database is not found,"
|
||||
gcmkPRINT("[galcore]: Feature database is not found,"
|
||||
"chipModel=0x%0x, chipRevision=0x%x, productID=0x%x, ecoID=0x%x, customerID=0x%x",
|
||||
Hardware->chipModel,
|
||||
Hardware->chipRevision,
|
||||
|
||||
@@ -58,7 +58,6 @@
|
||||
#include "gc_hal_security_interface.h"
|
||||
#include "gc_hal_ta.h"
|
||||
#include "gc_hal.h"
|
||||
#include <linux/printk.h>
|
||||
|
||||
#define _GC_OBJ_ZONE 2
|
||||
/*******************************************************************************
|
||||
@@ -561,11 +560,11 @@ gctaMMU_DumpPagetableEntry(
|
||||
|
||||
stlb = stlbs[mtlb];
|
||||
|
||||
pr_warn(" MTLB entry = %d\n", mtlb);
|
||||
gcmkPRINT(" MTLB entry = %d\n", mtlb);
|
||||
|
||||
pr_warn(" STLB entry = %d\n", stlbOffset);
|
||||
gcmkPRINT(" STLB entry = %d\n", stlbOffset);
|
||||
|
||||
pr_warn(" Offset = 0x%08X (%d)\n", offsetInPage, offsetInPage);
|
||||
gcmkPRINT(" Offset = 0x%08X (%d)\n", offsetInPage, offsetInPage);
|
||||
|
||||
|
||||
if (stlb == gcvNULL)
|
||||
@@ -573,13 +572,13 @@ gctaMMU_DumpPagetableEntry(
|
||||
/* Dmp mtlb entry. */
|
||||
entry = mtlbLogical[mtlb];
|
||||
|
||||
pr_warn(" mtlb entry [%d] = %x", mtlb, entry);
|
||||
gcmkPRINT(" mtlb entry [%d] = %x", mtlb, entry);
|
||||
}
|
||||
else
|
||||
{
|
||||
stlbLogical = stlb->logical;
|
||||
|
||||
pr_warn(" stlb entry = 0x%08X", stlbLogical[stlbOffset]);
|
||||
gcmkPRINT(" stlb entry = 0x%08X", stlbLogical[stlbOffset]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -34,7 +34,6 @@
|
||||
#include <drm/drm_print.h>
|
||||
#include <drm/drm_probe_helper.h>
|
||||
#include <drm/drm_scdc_helper.h>
|
||||
#include <linux/suspend.h>
|
||||
|
||||
#include "dw-hdmi-audio.h"
|
||||
#include "dw-hdmi-cec.h"
|
||||
@@ -220,12 +219,8 @@ struct dw_hdmi {
|
||||
hdmi_codec_plugged_cb plugged_cb;
|
||||
struct device *codec_dev;
|
||||
enum drm_connector_status last_connector_result;
|
||||
|
||||
struct notifier_block pm_notify; /*Used to receive STD notification*/
|
||||
};
|
||||
|
||||
static bool g_is_hdmi_std_suspend __nosavedata;
|
||||
|
||||
#define HDMI_IH_PHY_STAT0_RX_SENSE \
|
||||
(HDMI_IH_PHY_STAT0_RX_SENSE0 | HDMI_IH_PHY_STAT0_RX_SENSE1 | \
|
||||
HDMI_IH_PHY_STAT0_RX_SENSE2 | HDMI_IH_PHY_STAT0_RX_SENSE3)
|
||||
@@ -1436,11 +1431,6 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
|
||||
unsigned int i;
|
||||
u8 val;
|
||||
|
||||
if(g_is_hdmi_std_suspend){
|
||||
printk(KERN_INFO "dw_hdmi_phy_power_on under std mod, do not resume\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (phy->gen == 1) {
|
||||
dw_hdmi_phy_enable_powerdown(hdmi, false);
|
||||
|
||||
@@ -2069,12 +2059,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
|
||||
drm_scdc_set_scrambling(hdmi->ddc, 0);
|
||||
}
|
||||
}
|
||||
else{
|
||||
hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
|
||||
hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
|
||||
HDMI_MC_SWRSTZ);
|
||||
drm_scdc_set_scrambling(hdmi->ddc, 0);
|
||||
}
|
||||
|
||||
/* Set up horizontal active pixel width */
|
||||
hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1);
|
||||
@@ -3294,27 +3278,6 @@ static void dw_hdmi_init_hw(struct dw_hdmi *hdmi)
|
||||
hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data);
|
||||
}
|
||||
|
||||
static int hdmi_light_notify(struct notifier_block *notify_block,
|
||||
unsigned long mode, void *unused)
|
||||
{
|
||||
printk(KERN_INFO"pm_notify: mode (%ld)\n", mode);
|
||||
|
||||
switch (mode) {
|
||||
case PM_HIBERNATION_PREPARE:
|
||||
printk(KERN_INFO"hdmi_pm_notify PM_HIBERNATION_PREPARE\n");
|
||||
g_is_hdmi_std_suspend = true;
|
||||
break;
|
||||
case PM_POST_HIBERNATION:
|
||||
printk(KERN_INFO"hdmi_pm_notify PM_HIBERNATION_PREPARE\n");
|
||||
g_is_hdmi_std_suspend = false;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
* Probe/remove API, used from platforms based on the DRM bridge API.
|
||||
*/
|
||||
@@ -3582,13 +3545,6 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
|
||||
|
||||
drm_bridge_add(&hdmi->bridge);
|
||||
|
||||
if (IS_ENABLED(CONFIG_PM))
|
||||
hdmi->pm_notify.notifier_call = hdmi_light_notify;
|
||||
|
||||
ret = register_pm_notifier(&hdmi->pm_notify);
|
||||
if (ret)
|
||||
printk(KERN_ERR"register_pm_notifier failed: %d\n", ret);
|
||||
|
||||
return hdmi;
|
||||
|
||||
err_res:
|
||||
@@ -3600,8 +3556,6 @@ EXPORT_SYMBOL_GPL(dw_hdmi_probe);
|
||||
|
||||
void dw_hdmi_remove(struct dw_hdmi *hdmi)
|
||||
{
|
||||
unregister_pm_notifier(&hdmi->pm_notify);
|
||||
|
||||
drm_bridge_remove(&hdmi->bridge);
|
||||
|
||||
if (hdmi->audio && !IS_ERR(hdmi->audio))
|
||||
|
||||
@@ -148,6 +148,7 @@
|
||||
#define PVRSRV_RGX_LOG2_CLIENT_CCB_MAX_SIZE_TDM 17
|
||||
#define PVRSRV_RGX_LOG2_CLIENT_CCB_MAX_SIZE_RDM 15
|
||||
#define SUPPORT_BUFFER_SYNC 1
|
||||
#define SUPPORT_LINUX_DVFS 1
|
||||
#ifdef CONFIG_DRM_POWERVR_ROGUE_DEBUG
|
||||
#define DEBUG
|
||||
#define DEBUG_BRIDGE_KM
|
||||
|
||||
@@ -43,6 +43,7 @@ override SUPPORT_DI_BRG_IMPL := 1
|
||||
override SUPPORT_NATIVE_FENCE_SYNC := 1
|
||||
override SUPPORT_DMA_FENCE := 1
|
||||
override SUPPORT_BUFFER_SYNC := 1
|
||||
override SUPPORT_LINUX_DVFS := 1
|
||||
ifeq ($(CONFIG_DRM_POWERVR_ROGUE_DEBUG),y)
|
||||
override BUILD := debug
|
||||
override PVRSRV_ENABLE_GPU_MEMORY_INFO := 1
|
||||
|
||||
@@ -1,34 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#undef TRACE_SYSTEM
|
||||
#define TRACE_SYSTEM gpu_trace_point
|
||||
|
||||
#if !defined(_TRACE_GPU_H) || defined(TRACE_HEADER_MULTI_READ)
|
||||
#define _TRACE_GPU_H
|
||||
|
||||
#include <linux/sched/numa_balancing.h>
|
||||
#include <linux/tracepoint.h>
|
||||
#include <linux/binfmts.h>
|
||||
|
||||
TRACE_EVENT(gpu_interrupt,
|
||||
|
||||
TP_PROTO(unsigned int IRQStatusReg, unsigned int IRQStatus),
|
||||
|
||||
TP_ARGS(IRQStatusReg, IRQStatus),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__field( unsigned int, IRQStatusReg)
|
||||
__field( unsigned int, IRQStatus)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__entry->IRQStatusReg = IRQStatusReg;
|
||||
__entry->IRQStatus = IRQStatus;
|
||||
),
|
||||
|
||||
TP_printk("IRQStatusReg=%d IRQStatus=%d", __entry->IRQStatusReg, __entry->IRQStatus)
|
||||
);
|
||||
|
||||
#endif /* _TRACE_GPU_H */
|
||||
|
||||
/* This part must be outside protection */
|
||||
#include <trace/define_trace.h>
|
||||
@@ -550,14 +550,6 @@ out:
|
||||
return iErr;
|
||||
}
|
||||
|
||||
static void wrap_pvr_sync_close(void *connection_data)
|
||||
{
|
||||
CONNECTION_DATA *psConnection = (CONNECTION_DATA *)connection_data;
|
||||
pvr_sync_close(connection_data);
|
||||
OSConnectionPrivateDataDeInit(psConnection->hOsPrivateData);
|
||||
kfree(psConnection);
|
||||
}
|
||||
|
||||
/**************************************************************************/ /*!
|
||||
@Function PVRSRVDeviceSyncOpen
|
||||
@Description Sync device open.
|
||||
@@ -641,7 +633,7 @@ static int PVRSRVDeviceSyncOpen(PVRSRV_DEVICE_NODE *psDeviceNode,
|
||||
|
||||
#if defined(SUPPORT_NATIVE_FENCE_SYNC) && !defined(USE_PVRSYNC_DEVNODE)
|
||||
#if (PVRSRV_DEVICE_INIT_MODE == PVRSRV_LINUX_DEV_INIT_ON_CONNECT)
|
||||
psConnectionPriv->pfDeviceRelease = wrap_pvr_sync_close;
|
||||
psConnectionPriv->pfDeviceRelease = pvr_sync_close;
|
||||
#endif
|
||||
#endif
|
||||
psDRMFile->driver_priv = psConnectionPriv;
|
||||
|
||||
@@ -1843,34 +1843,6 @@ void OSDumpVersionInfo(DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf,
|
||||
utsname()->version,
|
||||
utsname()->machine);
|
||||
}
|
||||
|
||||
void OSWriteHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value)
|
||||
{
|
||||
writel((IMG_UINT32)(ui32Value), (IMG_BYTE __iomem *)(pvLinRegBaseAddr) + (ui32Offset));
|
||||
}
|
||||
|
||||
void OSWriteHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT64 ui64Value)
|
||||
{
|
||||
volatile void *_addr = pvLinRegBaseAddr;
|
||||
IMG_UINT32 _off = ui32Offset;
|
||||
IMG_UINT64 _val = ui64Value;
|
||||
writel((IMG_UINT32)((_val) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off));
|
||||
writel((IMG_UINT32)(((IMG_UINT64)(_val) >> 32) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off) + 4);
|
||||
}
|
||||
|
||||
IMG_UINT32 OSReadHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset)
|
||||
{
|
||||
return ((IMG_UINT32)readl((IMG_BYTE __iomem *)(pvLinRegBaseAddr) + (ui32Offset)));
|
||||
}
|
||||
|
||||
IMG_UINT64 OSReadHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset)
|
||||
{
|
||||
volatile void *_addr = pvLinRegBaseAddr;
|
||||
IMG_UINT32 _off = ui32Offset;
|
||||
return (IMG_UINT64)(( (IMG_UINT64)(readl((IMG_BYTE __iomem *)(_addr) + (_off) + 4)) << 32) \
|
||||
| readl((IMG_BYTE __iomem *)(_addr) + (_off)));
|
||||
}
|
||||
|
||||
#if defined(SUPPORT_DMA_TRANSFER)
|
||||
|
||||
typedef struct _OS_CLEANUP_DATA_
|
||||
|
||||
@@ -1022,24 +1022,34 @@ void OSWriteMemoryBarrier(volatile void *hReadback);
|
||||
} while (0)
|
||||
|
||||
#if defined(__linux__) && defined(__KERNEL__) && !defined(NO_HARDWARE)
|
||||
|
||||
void OSWriteHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value);
|
||||
void OSWriteHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT64 ui64Value);
|
||||
IMG_UINT32 OSReadHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset);
|
||||
IMG_UINT64 OSReadHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset);
|
||||
|
||||
#define OSReadHWReg8(addr, off) ((IMG_UINT8)readb((IMG_BYTE __iomem *)(addr) + (off)))
|
||||
#define OSReadHWReg16(addr, off) ((IMG_UINT16)readw((IMG_BYTE __iomem *)(addr) + (off)))
|
||||
#define OSReadHWReg32(addr, off) OSReadHWRegl(addr, off)
|
||||
#define OSReadHWReg32(addr, off) ((IMG_UINT32)readl((IMG_BYTE __iomem *)(addr) + (off)))
|
||||
|
||||
/* Little endian support only */
|
||||
#define OSReadHWReg64(addr, off) OSReadHWRegll(addr, off)
|
||||
#define OSReadHWReg64(addr, off) \
|
||||
({ \
|
||||
__typeof__(addr) _addr = addr; \
|
||||
__typeof__(off) _off = off; \
|
||||
(IMG_UINT64) \
|
||||
( \
|
||||
( (IMG_UINT64)(readl((IMG_BYTE __iomem *)(_addr) + (_off) + 4)) << 32) \
|
||||
| readl((IMG_BYTE __iomem *)(_addr) + (_off)) \
|
||||
); \
|
||||
})
|
||||
|
||||
#define OSWriteHWReg8(addr, off, val) writeb((IMG_UINT8)(val), (IMG_BYTE __iomem *)(addr) + (off))
|
||||
#define OSWriteHWReg16(addr, off, val) writew((IMG_UINT16)(val), (IMG_BYTE __iomem *)(addr) + (off))
|
||||
#define OSWriteHWReg32(addr, off, val) OSWriteHWRegl(addr, off, val)
|
||||
#define OSWriteHWReg32(addr, off, val) writel((IMG_UINT32)(val), (IMG_BYTE __iomem *)(addr) + (off))
|
||||
/* Little endian support only */
|
||||
#define OSWriteHWReg64(addr, off, val) OSWriteHWRegll(addr, off, val)
|
||||
#define OSWriteHWReg64(addr, off, val) do \
|
||||
{ \
|
||||
__typeof__(addr) _addr = addr; \
|
||||
__typeof__(off) _off = off; \
|
||||
__typeof__(val) _val = val; \
|
||||
writel((IMG_UINT32)((_val) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off)); \
|
||||
writel((IMG_UINT32)(((IMG_UINT64)(_val) >> 32) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off) + 4); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#elif defined(NO_HARDWARE)
|
||||
|
||||
138
drivers/gpu/drm/img-rogue/pvr_dvfs.h
Normal file
138
drivers/gpu/drm/img-rogue/pvr_dvfs.h
Normal file
@@ -0,0 +1,138 @@
|
||||
/*************************************************************************/ /*!
|
||||
@File pvr_dvfs.h
|
||||
@Title System level interface for DVFS
|
||||
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
|
||||
@License Dual MIT/GPLv2
|
||||
|
||||
The contents of this file are subject to the MIT license as set out below.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
Alternatively, the contents of this file may be used under the terms of
|
||||
the GNU General Public License Version 2 ("GPL") in which case the provisions
|
||||
of GPL are applicable instead of those above.
|
||||
|
||||
If you wish to allow use of your version of this file only under the terms of
|
||||
GPL, and not to allow others to use your version of this file under the terms
|
||||
of the MIT license, indicate your decision by deleting the provisions above
|
||||
and replace them with the notice and other provisions required by GPL as set
|
||||
out in the file called "GPL-COPYING" included in this distribution. If you do
|
||||
not delete the provisions above, a recipient may use your version of this file
|
||||
under the terms of either the MIT license or GPL.
|
||||
|
||||
This License is also included in this distribution in the file called
|
||||
"MIT-COPYING".
|
||||
|
||||
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
|
||||
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
|
||||
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
|
||||
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
|
||||
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/ /**************************************************************************/
|
||||
|
||||
#ifndef PVR_DVFS_H
|
||||
#define PVR_DVFS_H
|
||||
|
||||
#include <linux/version.h>
|
||||
|
||||
#if defined(SUPPORT_LINUX_DVFS)
|
||||
#include <linux/devfreq.h>
|
||||
#include <linux/thermal.h>
|
||||
|
||||
#if defined(CONFIG_DEVFREQ_THERMAL)
|
||||
#include <linux/devfreq_cooling.h>
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0))
|
||||
#include <linux/opp.h>
|
||||
#else
|
||||
#include <linux/pm_opp.h>
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#include "img_types.h"
|
||||
|
||||
typedef void (*PFN_SYS_DEV_DVFS_SET_FREQUENCY)(IMG_UINT32 ui32Freq);
|
||||
typedef void (*PFN_SYS_DEV_DVFS_SET_VOLTAGE)(IMG_UINT32 ui32Volt);
|
||||
|
||||
typedef struct _IMG_OPP_
|
||||
{
|
||||
IMG_UINT32 ui32Volt;
|
||||
/*
|
||||
* Unit of frequency in Hz.
|
||||
*/
|
||||
IMG_UINT32 ui32Freq;
|
||||
} IMG_OPP;
|
||||
|
||||
typedef struct _IMG_DVFS_DEVICE_CFG_
|
||||
{
|
||||
const IMG_OPP *pasOPPTable;
|
||||
IMG_UINT32 ui32OPPTableSize;
|
||||
#if defined(SUPPORT_LINUX_DVFS)
|
||||
IMG_UINT32 ui32PollMs;
|
||||
#endif
|
||||
IMG_BOOL bIdleReq;
|
||||
PFN_SYS_DEV_DVFS_SET_FREQUENCY pfnSetFrequency;
|
||||
PFN_SYS_DEV_DVFS_SET_VOLTAGE pfnSetVoltage;
|
||||
|
||||
#if defined(CONFIG_DEVFREQ_THERMAL) && defined(SUPPORT_LINUX_DVFS)
|
||||
struct devfreq_cooling_power *psPowerOps;
|
||||
#endif
|
||||
} IMG_DVFS_DEVICE_CFG;
|
||||
|
||||
#if defined(SUPPORT_LINUX_DVFS)
|
||||
typedef struct _IMG_DVFS_GOVERNOR_
|
||||
{
|
||||
IMG_BOOL bEnabled;
|
||||
} IMG_DVFS_GOVERNOR;
|
||||
|
||||
typedef struct _IMG_DVFS_GOVERNOR_CFG_
|
||||
{
|
||||
IMG_UINT32 ui32UpThreshold;
|
||||
IMG_UINT32 ui32DownDifferential;
|
||||
} IMG_DVFS_GOVERNOR_CFG;
|
||||
#endif
|
||||
|
||||
#if defined(__linux__)
|
||||
#if defined(SUPPORT_LINUX_DVFS)
|
||||
typedef struct _IMG_DVFS_DEVICE_
|
||||
{
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0))
|
||||
struct opp *psOPP;
|
||||
#else
|
||||
struct dev_pm_opp *psOPP;
|
||||
#endif
|
||||
struct devfreq *psDevFreq;
|
||||
IMG_BOOL bInitPending;
|
||||
IMG_BOOL bReady;
|
||||
IMG_BOOL bEnabled;
|
||||
IMG_HANDLE hGpuUtilUserDVFS;
|
||||
struct devfreq_simple_ondemand_data data;
|
||||
#if defined(CONFIG_DEVFREQ_THERMAL)
|
||||
struct thermal_cooling_device *psDevfreqCoolingDevice;
|
||||
#endif
|
||||
} IMG_DVFS_DEVICE;
|
||||
#endif
|
||||
|
||||
typedef struct _IMG_DVFS_
|
||||
{
|
||||
#if defined(SUPPORT_LINUX_DVFS)
|
||||
IMG_DVFS_DEVICE sDVFSDevice;
|
||||
IMG_DVFS_GOVERNOR sDVFSGovernor;
|
||||
IMG_DVFS_GOVERNOR_CFG sDVFSGovernorCfg;
|
||||
#endif
|
||||
IMG_DVFS_DEVICE_CFG sDVFSDeviceCfg;
|
||||
} PVRSRV_DVFS;
|
||||
#endif/* (__linux__) */
|
||||
|
||||
#endif /* PVR_DVFS_H */
|
||||
824
drivers/gpu/drm/img-rogue/pvr_dvfs_device.c
Normal file
824
drivers/gpu/drm/img-rogue/pvr_dvfs_device.c
Normal file
@@ -0,0 +1,824 @@
|
||||
/*************************************************************************/ /*!
|
||||
@File
|
||||
@Title PowerVR devfreq device implementation
|
||||
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
|
||||
@Description Linux module setup
|
||||
@License Dual MIT/GPLv2
|
||||
|
||||
The contents of this file are subject to the MIT license as set out below.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
Alternatively, the contents of this file may be used under the terms of
|
||||
the GNU General Public License Version 2 ("GPL") in which case the provisions
|
||||
of GPL are applicable instead of those above.
|
||||
|
||||
If you wish to allow use of your version of this file only under the terms of
|
||||
GPL, and not to allow others to use your version of this file under the terms
|
||||
of the MIT license, indicate your decision by deleting the provisions above
|
||||
and replace them with the notice and other provisions required by GPL as set
|
||||
out in the file called "GPL-COPYING" included in this distribution. If you do
|
||||
not delete the provisions above, a recipient may use your version of this file
|
||||
under the terms of either the MIT license or GPL.
|
||||
|
||||
This License is also included in this distribution in the file called
|
||||
"MIT-COPYING".
|
||||
|
||||
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
|
||||
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
|
||||
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
|
||||
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
|
||||
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/ /**************************************************************************/
|
||||
|
||||
#if !defined(NO_HARDWARE)
|
||||
|
||||
#include <linux/devfreq.h>
|
||||
#if defined(CONFIG_DEVFREQ_THERMAL)
|
||||
#include <linux/devfreq_cooling.h>
|
||||
#endif
|
||||
#include <linux/version.h>
|
||||
#include <linux/device.h>
|
||||
#include <drm/drm.h>
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0))
|
||||
#include <drm/drm_device.h>
|
||||
#include <drm/drm_file.h>
|
||||
#else
|
||||
#include <drm/drmP.h>
|
||||
#endif
|
||||
|
||||
#include "power.h"
|
||||
#include "pvrsrv.h"
|
||||
#include "pvrsrv_device.h"
|
||||
|
||||
#include "rgxdevice.h"
|
||||
#include "rgxinit.h"
|
||||
#include "sofunc_rgx.h"
|
||||
|
||||
#include "syscommon.h"
|
||||
|
||||
#include "pvr_dvfs_device.h"
|
||||
|
||||
#include "kernel_compatibility.h"
|
||||
|
||||
static int _device_get_devid(struct device *dev)
|
||||
{
|
||||
struct drm_device *ddev = dev_get_drvdata(dev);
|
||||
int deviceId;
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 12, 0))
|
||||
/*
|
||||
* Older kernels do not have render drm_minor member in drm_device,
|
||||
* so we fallback to primary node for device identification
|
||||
*/
|
||||
deviceId = ddev->primary->index;
|
||||
#else
|
||||
if (ddev->render)
|
||||
deviceId = ddev->render->index;
|
||||
else /* when render node is NULL, fallback to primary node */
|
||||
deviceId = ddev->primary->index;
|
||||
#endif
|
||||
|
||||
return deviceId;
|
||||
}
|
||||
|
||||
static IMG_INT32 devfreq_target(struct device *dev, unsigned long *requested_freq, IMG_UINT32 flags)
|
||||
{
|
||||
int deviceId = _device_get_devid(dev);
|
||||
PVRSRV_DEVICE_NODE *psDeviceNode = PVRSRVGetDeviceInstanceByOSId(deviceId);
|
||||
RGX_DATA *psRGXData = NULL;
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
IMG_DVFS_DEVICE_CFG *psDVFSDeviceCfg = NULL;
|
||||
RGX_TIMING_INFORMATION *psRGXTimingInfo = NULL;
|
||||
IMG_UINT32 ui32Freq, ui32CurFreq, ui32Volt;
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0))
|
||||
struct opp *opp;
|
||||
#else
|
||||
struct dev_pm_opp *opp;
|
||||
#endif
|
||||
|
||||
/* Check the device is registered */
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
psRGXData = (RGX_DATA*) psDeviceNode->psDevConfig->hDevData;
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
psDVFSDeviceCfg = &psDeviceNode->psDevConfig->sDVFS.sDVFSDeviceCfg;
|
||||
|
||||
/* Check the RGX device is initialised */
|
||||
if (!psRGXData)
|
||||
{
|
||||
return -ENODATA;
|
||||
}
|
||||
|
||||
psRGXTimingInfo = psRGXData->psRGXTimingInfo;
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
|
||||
rcu_read_lock();
|
||||
#endif
|
||||
|
||||
opp = devfreq_recommended_opp(dev, requested_freq, flags);
|
||||
if (IS_ERR(opp)) {
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
|
||||
rcu_read_unlock();
|
||||
#endif
|
||||
PVR_DPF((PVR_DBG_ERROR, "Invalid OPP"));
|
||||
return PTR_ERR(opp);
|
||||
}
|
||||
|
||||
ui32Freq = dev_pm_opp_get_freq(opp);
|
||||
ui32Volt = dev_pm_opp_get_voltage(opp);
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
|
||||
rcu_read_unlock();
|
||||
#else
|
||||
dev_pm_opp_put(opp);
|
||||
#endif
|
||||
|
||||
ui32CurFreq = psRGXTimingInfo->ui32CoreClockSpeed;
|
||||
|
||||
if (ui32CurFreq == ui32Freq)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (psDeviceNode->eCurrentSysPowerState != PVRSRV_SYS_POWER_STATE_ON)
|
||||
{
|
||||
*requested_freq = psRGXTimingInfo->ui32CoreClockSpeed;
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (PVRSRV_OK != PVRSRVDevicePreClockSpeedChange(psDeviceNode,
|
||||
psDVFSDeviceCfg->bIdleReq,
|
||||
NULL))
|
||||
{
|
||||
dev_err(dev, "PVRSRVDevicePreClockSpeedChange failed\n");
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
if (!psDVFSDevice->bEnabled)
|
||||
{
|
||||
*requested_freq = psRGXTimingInfo->ui32CoreClockSpeed;
|
||||
goto ClockSpeedChangePost;
|
||||
}
|
||||
|
||||
/* Increasing frequency, change voltage first */
|
||||
if (ui32Freq > ui32CurFreq)
|
||||
{
|
||||
psDVFSDeviceCfg->pfnSetVoltage(ui32Volt);
|
||||
}
|
||||
|
||||
psDVFSDeviceCfg->pfnSetFrequency(ui32Freq);
|
||||
|
||||
/* Decreasing frequency, change frequency first */
|
||||
if (ui32Freq < ui32CurFreq)
|
||||
{
|
||||
psDVFSDeviceCfg->pfnSetVoltage(ui32Volt);
|
||||
}
|
||||
|
||||
psRGXTimingInfo->ui32CoreClockSpeed = ui32Freq;
|
||||
|
||||
ClockSpeedChangePost:
|
||||
PVRSRVDevicePostClockSpeedChange(psDeviceNode, psDVFSDeviceCfg->bIdleReq,
|
||||
NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int devfreq_get_dev_status(struct device *dev, struct devfreq_dev_status *stat)
|
||||
{
|
||||
int deviceId = _device_get_devid(dev);
|
||||
PVRSRV_DEVICE_NODE *psDeviceNode = PVRSRVGetDeviceInstanceByOSId(deviceId);
|
||||
PVRSRV_RGXDEV_INFO *psDevInfo = NULL;
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
RGX_DATA *psRGXData = NULL;
|
||||
RGX_TIMING_INFORMATION *psRGXTimingInfo = NULL;
|
||||
RGXFWIF_GPU_UTIL_STATS sGpuUtilStats;
|
||||
PVRSRV_ERROR eError;
|
||||
|
||||
/* Check the device is registered */
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
psDevInfo = psDeviceNode->pvDevice;
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
psRGXData = (RGX_DATA*) psDeviceNode->psDevConfig->hDevData;
|
||||
|
||||
/* Check the RGX device is initialised */
|
||||
if (!psDevInfo || !psRGXData)
|
||||
{
|
||||
return -ENODATA;
|
||||
}
|
||||
|
||||
psRGXTimingInfo = psRGXData->psRGXTimingInfo;
|
||||
stat->current_frequency = psRGXTimingInfo->ui32CoreClockSpeed;
|
||||
|
||||
if (psDevInfo->pfnGetGpuUtilStats == NULL)
|
||||
{
|
||||
/* Not yet ready. So set times to something sensible. */
|
||||
stat->busy_time = 0;
|
||||
stat->total_time = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
eError = psDevInfo->pfnGetGpuUtilStats(psDeviceNode,
|
||||
psDVFSDevice->hGpuUtilUserDVFS,
|
||||
&sGpuUtilStats);
|
||||
|
||||
if (eError != PVRSRV_OK)
|
||||
{
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
stat->busy_time = sGpuUtilStats.ui64GpuStatActive;
|
||||
stat->total_time = sGpuUtilStats.ui64GpuStatCumulative;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
|
||||
static IMG_INT32 devfreq_cur_freq(struct device *dev, unsigned long *freq)
|
||||
{
|
||||
int deviceId = _device_get_devid(dev);
|
||||
PVRSRV_DEVICE_NODE *psDeviceNode = PVRSRVGetDeviceInstanceByOSId(deviceId);
|
||||
RGX_DATA *psRGXData = NULL;
|
||||
|
||||
/* Check the device is registered */
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
psRGXData = (RGX_DATA*) psDeviceNode->psDevConfig->hDevData;
|
||||
|
||||
/* Check the RGX device is initialised */
|
||||
if (!psRGXData)
|
||||
{
|
||||
return -ENODATA;
|
||||
}
|
||||
|
||||
*freq = psRGXData->psRGXTimingInfo->ui32CoreClockSpeed;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct devfreq_dev_profile img_devfreq_dev_profile =
|
||||
{
|
||||
.target = devfreq_target,
|
||||
.get_dev_status = devfreq_get_dev_status,
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
|
||||
.get_cur_freq = devfreq_cur_freq,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int FillOPPTable(struct device *dev, PVRSRV_DEVICE_NODE *psDeviceNode)
|
||||
{
|
||||
const IMG_OPP *iopp;
|
||||
int i, err = 0;
|
||||
IMG_DVFS_DEVICE_CFG *psDVFSDeviceCfg = NULL;
|
||||
|
||||
/* Check the device exists */
|
||||
if (!dev || !psDeviceNode)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
psDVFSDeviceCfg = &psDeviceNode->psDevConfig->sDVFS.sDVFSDeviceCfg;
|
||||
|
||||
for (i = 0, iopp = psDVFSDeviceCfg->pasOPPTable;
|
||||
i < psDVFSDeviceCfg->ui32OPPTableSize;
|
||||
i++, iopp++)
|
||||
{
|
||||
err = dev_pm_opp_add(dev, iopp->ui32Freq, iopp->ui32Volt);
|
||||
if (err) {
|
||||
dev_err(dev, "Could not add OPP entry, %d\n", err);
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ClearOPPTable(struct device *dev, PVRSRV_DEVICE_NODE *psDeviceNode)
|
||||
{
|
||||
#if (defined(CHROMIUMOS_KERNEL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0))) || \
|
||||
(LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0))
|
||||
const IMG_OPP *iopp;
|
||||
int i;
|
||||
IMG_DVFS_DEVICE_CFG *psDVFSDeviceCfg = NULL;
|
||||
|
||||
/* Check the device exists */
|
||||
if (!dev || !psDeviceNode)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
psDVFSDeviceCfg = &psDeviceNode->psDevConfig->sDVFS.sDVFSDeviceCfg;
|
||||
|
||||
for (i = 0, iopp = psDVFSDeviceCfg->pasOPPTable;
|
||||
i < psDVFSDeviceCfg->ui32OPPTableSize;
|
||||
i++, iopp++)
|
||||
{
|
||||
dev_pm_opp_remove(dev, iopp->ui32Freq);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static int GetOPPValues(struct device *dev,
|
||||
unsigned long *min_freq,
|
||||
unsigned long *min_volt,
|
||||
unsigned long *max_freq)
|
||||
{
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0))
|
||||
struct opp *opp;
|
||||
#else
|
||||
struct dev_pm_opp *opp;
|
||||
#endif
|
||||
int count, i, err = 0;
|
||||
unsigned long freq;
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0)) && \
|
||||
(!defined(CHROMIUMOS_KERNEL) || (LINUX_VERSION_CODE < KERNEL_VERSION(3, 18, 0)))
|
||||
unsigned int *freq_table;
|
||||
#else
|
||||
unsigned long *freq_table;
|
||||
#endif
|
||||
|
||||
count = dev_pm_opp_get_opp_count(dev);
|
||||
if (count < 0)
|
||||
{
|
||||
dev_err(dev, "Could not fetch OPP count, %d\n", count);
|
||||
return count;
|
||||
}
|
||||
|
||||
dev_info(dev, "Found %d OPP points.\n", count);
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0))
|
||||
freq_table = devm_kcalloc(dev, count, sizeof(*freq_table), GFP_ATOMIC);
|
||||
#else
|
||||
freq_table = kcalloc(count, sizeof(*freq_table), GFP_ATOMIC);
|
||||
#endif
|
||||
if (! freq_table)
|
||||
{
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
|
||||
/* Start RCU read-side critical section to map frequency to OPP */
|
||||
rcu_read_lock();
|
||||
#endif
|
||||
|
||||
/* Iterate over OPP table; Iteration 0 finds "opp w/ freq >= 0 Hz". */
|
||||
freq = 0;
|
||||
opp = dev_pm_opp_find_freq_ceil(dev, &freq);
|
||||
if (IS_ERR(opp))
|
||||
{
|
||||
err = PTR_ERR(opp);
|
||||
dev_err(dev, "Couldn't find lowest frequency, %d\n", err);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
*min_volt = dev_pm_opp_get_voltage(opp);
|
||||
*max_freq = *min_freq = freq_table[0] = freq;
|
||||
dev_info(dev, "opp[%d/%d]: (%lu Hz, %lu uV)\n", 1, count, freq, *min_volt);
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
|
||||
dev_pm_opp_put(opp);
|
||||
#endif
|
||||
|
||||
/* Iteration i > 0 finds "opp w/ freq >= (opp[i-1].freq + 1)". */
|
||||
for (i = 1; i < count; i++)
|
||||
{
|
||||
freq++;
|
||||
opp = dev_pm_opp_find_freq_ceil(dev, &freq);
|
||||
if (IS_ERR(opp))
|
||||
{
|
||||
err = PTR_ERR(opp);
|
||||
dev_err(dev, "Couldn't find %dth frequency, %d\n", i, err);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
freq_table[i] = freq;
|
||||
*max_freq = freq;
|
||||
dev_info(dev,
|
||||
"opp[%d/%d]: (%lu Hz, %lu uV)\n",
|
||||
i + 1,
|
||||
count,
|
||||
freq,
|
||||
dev_pm_opp_get_voltage(opp));
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0))
|
||||
dev_pm_opp_put(opp);
|
||||
#endif
|
||||
}
|
||||
|
||||
exit:
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
|
||||
rcu_read_unlock();
|
||||
#endif
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0))
|
||||
if (!err)
|
||||
{
|
||||
img_devfreq_dev_profile.freq_table = freq_table;
|
||||
img_devfreq_dev_profile.max_state = count;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0))
|
||||
devm_kfree(dev, freq_table);
|
||||
#else
|
||||
kfree(freq_table);
|
||||
#endif
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DEVFREQ_THERMAL)
|
||||
static int RegisterCoolingDevice(struct device *dev,
|
||||
IMG_DVFS_DEVICE *psDVFSDevice,
|
||||
struct devfreq_cooling_power *powerOps)
|
||||
{
|
||||
struct device_node *of_node;
|
||||
int err = 0;
|
||||
PVRSRV_VZ_RET_IF_MODE(GUEST, err);
|
||||
|
||||
if (!psDVFSDevice)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!powerOps)
|
||||
{
|
||||
dev_info(dev, "Cooling: power ops not registered, not enabling cooling");
|
||||
return 0;
|
||||
}
|
||||
|
||||
of_node = of_node_get(dev->of_node);
|
||||
|
||||
psDVFSDevice->psDevfreqCoolingDevice = of_devfreq_cooling_register_power(
|
||||
of_node, psDVFSDevice->psDevFreq, powerOps);
|
||||
|
||||
if (IS_ERR(psDVFSDevice->psDevfreqCoolingDevice))
|
||||
{
|
||||
err = PTR_ERR(psDVFSDevice->psDevfreqCoolingDevice);
|
||||
dev_err(dev, "Failed to register as devfreq cooling device %d", err);
|
||||
}
|
||||
|
||||
of_node_put(of_node);
|
||||
|
||||
return err;
|
||||
}
|
||||
#endif
|
||||
|
||||
#define TO_IMG_ERR(err) ((err == -EPROBE_DEFER) ? PVRSRV_ERROR_PROBE_DEFER : PVRSRV_ERROR_INIT_FAILURE)
|
||||
|
||||
PVRSRV_ERROR InitDVFS(PPVRSRV_DEVICE_NODE psDeviceNode)
|
||||
{
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
IMG_DVFS_DEVICE_CFG *psDVFSDeviceCfg = NULL;
|
||||
struct device *psDev;
|
||||
PVRSRV_ERROR eError;
|
||||
int err;
|
||||
|
||||
PVRSRV_VZ_RET_IF_MODE(GUEST, PVRSRV_OK);
|
||||
|
||||
#if !defined(CONFIG_PM_OPP)
|
||||
return PVRSRV_ERROR_NOT_SUPPORTED;
|
||||
#endif
|
||||
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return PVRSRV_ERROR_INVALID_PARAMS;
|
||||
}
|
||||
|
||||
if (psDeviceNode->psDevConfig->sDVFS.sDVFSDevice.bInitPending)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR,
|
||||
"DVFS initialise pending for device node %p",
|
||||
psDeviceNode));
|
||||
return PVRSRV_ERROR_INIT_FAILURE;
|
||||
}
|
||||
|
||||
psDev = psDeviceNode->psDevConfig->pvOSDevice;
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
psDVFSDeviceCfg = &psDeviceNode->psDevConfig->sDVFS.sDVFSDeviceCfg;
|
||||
psDeviceNode->psDevConfig->sDVFS.sDVFSDevice.bInitPending = IMG_TRUE;
|
||||
|
||||
#if defined(SUPPORT_SOC_TIMER)
|
||||
if (! psDeviceNode->psDevConfig->pfnSoCTimerRead)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "System layer SoC timer callback not implemented"));
|
||||
return PVRSRV_ERROR_NOT_IMPLEMENTED;
|
||||
}
|
||||
#endif
|
||||
|
||||
eError = SORgxGpuUtilStatsRegister(&psDVFSDevice->hGpuUtilUserDVFS);
|
||||
if (eError != PVRSRV_OK)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "Failed to register to the GPU utilisation stats, %d", eError));
|
||||
return eError;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
err = dev_pm_opp_of_add_table(psDev);
|
||||
if (err)
|
||||
{
|
||||
/*
|
||||
* If there are no device tree or system layer provided operating points
|
||||
* then return an error
|
||||
*/
|
||||
if (err != -ENODEV || !psDVFSDeviceCfg->pasOPPTable)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "Failed to init opp table from devicetree, %d", err));
|
||||
eError = TO_IMG_ERR(err);
|
||||
goto err_exit;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (psDVFSDeviceCfg->pasOPPTable)
|
||||
{
|
||||
err = FillOPPTable(psDev, psDeviceNode);
|
||||
if (err)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "Failed to fill OPP table with data, %d", err));
|
||||
eError = TO_IMG_ERR(err);
|
||||
goto err_exit;
|
||||
}
|
||||
}
|
||||
|
||||
PVR_TRACE(("PVR DVFS init pending: dev = %p, PVR device = %p",
|
||||
psDev, psDeviceNode));
|
||||
|
||||
return PVRSRV_OK;
|
||||
|
||||
err_exit:
|
||||
DeinitDVFS(psDeviceNode);
|
||||
return eError;
|
||||
}
|
||||
|
||||
PVRSRV_ERROR RegisterDVFSDevice(PPVRSRV_DEVICE_NODE psDeviceNode)
|
||||
{
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
IMG_DVFS_DEVICE_CFG *psDVFSDeviceCfg = NULL;
|
||||
IMG_DVFS_GOVERNOR_CFG *psDVFSGovernorCfg = NULL;
|
||||
RGX_TIMING_INFORMATION *psRGXTimingInfo = NULL;
|
||||
struct device *psDev;
|
||||
unsigned long min_freq = 0, max_freq = 0, min_volt = 0;
|
||||
PVRSRV_ERROR eError;
|
||||
int err;
|
||||
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return PVRSRV_ERROR_INVALID_PARAMS;
|
||||
}
|
||||
|
||||
if (!psDeviceNode->psDevConfig->sDVFS.sDVFSDevice.bInitPending)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR,
|
||||
"DVFS initialise not yet pending for device node %p",
|
||||
psDeviceNode));
|
||||
return PVRSRV_ERROR_INIT_FAILURE;
|
||||
}
|
||||
|
||||
psDev = psDeviceNode->psDevConfig->pvOSDevice;
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
psDVFSDeviceCfg = &psDeviceNode->psDevConfig->sDVFS.sDVFSDeviceCfg;
|
||||
psDVFSGovernorCfg = &psDeviceNode->psDevConfig->sDVFS.sDVFSGovernorCfg;
|
||||
psRGXTimingInfo = ((RGX_DATA *)psDeviceNode->psDevConfig->hDevData)->psRGXTimingInfo;
|
||||
psDeviceNode->psDevConfig->sDVFS.sDVFSDevice.bInitPending = IMG_FALSE;
|
||||
psDeviceNode->psDevConfig->sDVFS.sDVFSDevice.bReady = IMG_TRUE;
|
||||
|
||||
err = GetOPPValues(psDev, &min_freq, &min_volt, &max_freq);
|
||||
if (err)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "Failed to read OPP points, %d", err));
|
||||
eError = TO_IMG_ERR(err);
|
||||
goto err_exit;
|
||||
}
|
||||
|
||||
img_devfreq_dev_profile.initial_freq = min_freq;
|
||||
img_devfreq_dev_profile.polling_ms = psDVFSDeviceCfg->ui32PollMs;
|
||||
|
||||
psRGXTimingInfo->ui32CoreClockSpeed = min_freq;
|
||||
|
||||
psDVFSDeviceCfg->pfnSetFrequency(min_freq);
|
||||
psDVFSDeviceCfg->pfnSetVoltage(min_volt);
|
||||
|
||||
psDVFSDevice->data.upthreshold = psDVFSGovernorCfg->ui32UpThreshold;
|
||||
psDVFSDevice->data.downdifferential = psDVFSGovernorCfg->ui32DownDifferential;
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0))
|
||||
psDVFSDevice->psDevFreq = devm_devfreq_add_device(psDev,
|
||||
&img_devfreq_dev_profile,
|
||||
"simple_ondemand",
|
||||
&psDVFSDevice->data);
|
||||
#else
|
||||
psDVFSDevice->psDevFreq = devfreq_add_device(psDev,
|
||||
&img_devfreq_dev_profile,
|
||||
"simple_ondemand",
|
||||
&psDVFSDevice->data);
|
||||
#endif
|
||||
|
||||
if (IS_ERR(psDVFSDevice->psDevFreq))
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR,
|
||||
"Failed to add as devfreq device %p, %ld",
|
||||
psDVFSDevice->psDevFreq,
|
||||
PTR_ERR(psDVFSDevice->psDevFreq)));
|
||||
eError = TO_IMG_ERR(PTR_ERR(psDVFSDevice->psDevFreq));
|
||||
goto err_exit;
|
||||
}
|
||||
|
||||
eError = SuspendDVFS(psDeviceNode);
|
||||
if (eError != PVRSRV_OK)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "PVRSRVInit: Failed to suspend DVFS"));
|
||||
goto err_exit;
|
||||
}
|
||||
err = devfreq_suspend_device(psDVFSDevice->psDevFreq);
|
||||
if (err < 0)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "failed to suspend the devfreq devices"));
|
||||
eError = TO_IMG_ERR(err);
|
||||
goto err_exit;
|
||||
}
|
||||
|
||||
#if defined(CHROMIUMOS_KERNEL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0))
|
||||
psDVFSDevice->psDevFreq->policy.user.min_freq = min_freq;
|
||||
psDVFSDevice->psDevFreq->policy.user.max_freq = max_freq;
|
||||
#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0))
|
||||
psDVFSDevice->psDevFreq->scaling_min_freq = min_freq;
|
||||
psDVFSDevice->psDevFreq->scaling_max_freq = max_freq;
|
||||
#else
|
||||
psDVFSDevice->psDevFreq->min_freq = min_freq;
|
||||
psDVFSDevice->psDevFreq->max_freq = max_freq;
|
||||
#endif
|
||||
|
||||
err = devfreq_register_opp_notifier(psDev, psDVFSDevice->psDevFreq);
|
||||
if (err)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "Failed to register opp notifier, %d", err));
|
||||
eError = TO_IMG_ERR(err);
|
||||
goto err_exit;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DEVFREQ_THERMAL)
|
||||
err = RegisterCoolingDevice(psDev, psDVFSDevice, psDVFSDeviceCfg->psPowerOps);
|
||||
if (err)
|
||||
{
|
||||
eError = TO_IMG_ERR(err);
|
||||
goto err_exit;
|
||||
}
|
||||
#endif
|
||||
|
||||
PVR_TRACE(("PVR DVFS activated: %lu-%lu Hz, Period: %ums",
|
||||
min_freq,
|
||||
max_freq,
|
||||
psDVFSDeviceCfg->ui32PollMs));
|
||||
|
||||
return PVRSRV_OK;
|
||||
|
||||
err_exit:
|
||||
UnregisterDVFSDevice(psDeviceNode);
|
||||
return eError;
|
||||
}
|
||||
|
||||
void UnregisterDVFSDevice(PPVRSRV_DEVICE_NODE psDeviceNode)
|
||||
{
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
struct device *psDev = NULL;
|
||||
IMG_INT32 i32Error;
|
||||
|
||||
/* Check the device exists */
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
PVRSRV_VZ_RETN_IF_MODE(GUEST);
|
||||
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
psDev = psDeviceNode->psDevConfig->pvOSDevice;
|
||||
|
||||
if (! psDVFSDevice)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DEVFREQ_THERMAL)
|
||||
if (!IS_ERR_OR_NULL(psDVFSDevice->psDevfreqCoolingDevice))
|
||||
{
|
||||
devfreq_cooling_unregister(psDVFSDevice->psDevfreqCoolingDevice);
|
||||
psDVFSDevice->psDevfreqCoolingDevice = NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (psDVFSDevice->psDevFreq)
|
||||
{
|
||||
i32Error = devfreq_unregister_opp_notifier(psDev, psDVFSDevice->psDevFreq);
|
||||
if (i32Error < 0)
|
||||
{
|
||||
PVR_DPF((PVR_DBG_ERROR, "Failed to unregister OPP notifier"));
|
||||
}
|
||||
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 16, 0))
|
||||
devfreq_remove_device(psDVFSDevice->psDevFreq);
|
||||
#else
|
||||
devm_devfreq_remove_device(psDev, psDVFSDevice->psDevFreq);
|
||||
#endif
|
||||
|
||||
psDVFSDevice->psDevFreq = NULL;
|
||||
}
|
||||
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0) && \
|
||||
LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0))
|
||||
kfree(img_devfreq_dev_profile.freq_table);
|
||||
#endif
|
||||
|
||||
psDVFSDevice->bInitPending = IMG_FALSE;
|
||||
psDVFSDevice->bReady = IMG_FALSE;
|
||||
}
|
||||
|
||||
void DeinitDVFS(PPVRSRV_DEVICE_NODE psDeviceNode)
|
||||
{
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
struct device *psDev = NULL;
|
||||
|
||||
/* Check the device exists */
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
PVRSRV_VZ_RETN_IF_MODE(GUEST);
|
||||
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
psDev = psDeviceNode->psDevConfig->pvOSDevice;
|
||||
|
||||
/* Remove OPP entries for this device */
|
||||
ClearOPPTable(psDev, psDeviceNode);
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0)) || \
|
||||
(defined(CHROMIUMOS_KERNEL) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)))
|
||||
dev_pm_opp_of_remove_table(psDev);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
SORgxGpuUtilStatsUnregister(psDVFSDevice->hGpuUtilUserDVFS);
|
||||
psDVFSDevice->hGpuUtilUserDVFS = NULL;
|
||||
psDVFSDevice->bInitPending = IMG_FALSE;
|
||||
psDVFSDevice->bReady = IMG_FALSE;
|
||||
}
|
||||
|
||||
PVRSRV_ERROR SuspendDVFS(PPVRSRV_DEVICE_NODE psDeviceNode)
|
||||
{
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
|
||||
/* Check the device is registered */
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return PVRSRV_ERROR_INVALID_DEVICE;
|
||||
}
|
||||
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
psDVFSDevice->bEnabled = IMG_FALSE;
|
||||
|
||||
return PVRSRV_OK;
|
||||
}
|
||||
|
||||
PVRSRV_ERROR ResumeDVFS(PPVRSRV_DEVICE_NODE psDeviceNode)
|
||||
{
|
||||
IMG_DVFS_DEVICE *psDVFSDevice = NULL;
|
||||
|
||||
/* Check the device is registered */
|
||||
if (!psDeviceNode)
|
||||
{
|
||||
return PVRSRV_ERROR_INVALID_DEVICE;
|
||||
}
|
||||
|
||||
psDVFSDevice = &psDeviceNode->psDevConfig->sDVFS.sDVFSDevice;
|
||||
|
||||
/* Not supported in GuestOS drivers */
|
||||
psDVFSDevice->bEnabled = !PVRSRV_VZ_MODE_IS(GUEST);
|
||||
|
||||
return PVRSRV_OK;
|
||||
}
|
||||
|
||||
#endif /* !NO_HARDWARE */
|
||||
62
drivers/gpu/drm/img-rogue/pvr_dvfs_device.h
Normal file
62
drivers/gpu/drm/img-rogue/pvr_dvfs_device.h
Normal file
@@ -0,0 +1,62 @@
|
||||
/*************************************************************************/ /*!
|
||||
@File pvr_dvfs.c
|
||||
@Title System level interface for DVFS
|
||||
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
|
||||
@License Dual MIT/GPLv2
|
||||
|
||||
The contents of this file are subject to the MIT license as set out below.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
Alternatively, the contents of this file may be used under the terms of
|
||||
the GNU General Public License Version 2 ("GPL") in which case the provisions
|
||||
of GPL are applicable instead of those above.
|
||||
|
||||
If you wish to allow use of your version of this file only under the terms of
|
||||
GPL, and not to allow others to use your version of this file under the terms
|
||||
of the MIT license, indicate your decision by deleting the provisions above
|
||||
and replace them with the notice and other provisions required by GPL as set
|
||||
out in the file called "GPL-COPYING" included in this distribution. If you do
|
||||
not delete the provisions above, a recipient may use your version of this file
|
||||
under the terms of either the MIT license or GPL.
|
||||
|
||||
This License is also included in this distribution in the file called
|
||||
"MIT-COPYING".
|
||||
|
||||
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
|
||||
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
|
||||
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
|
||||
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
|
||||
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/ /**************************************************************************/
|
||||
|
||||
#ifndef PVR_DVFS_DEVICE_H
|
||||
#define PVR_DVFS_DEVICE_H
|
||||
|
||||
#include "opaque_types.h"
|
||||
#include "pvrsrv_error.h"
|
||||
|
||||
|
||||
PVRSRV_ERROR InitDVFS(PPVRSRV_DEVICE_NODE psDeviceNode);
|
||||
|
||||
void DeinitDVFS(PPVRSRV_DEVICE_NODE psDeviceNode);
|
||||
|
||||
PVRSRV_ERROR RegisterDVFSDevice(PPVRSRV_DEVICE_NODE psDeviceNode);
|
||||
|
||||
void UnregisterDVFSDevice(PPVRSRV_DEVICE_NODE psDeviceNode);
|
||||
|
||||
PVRSRV_ERROR SuspendDVFS(PPVRSRV_DEVICE_NODE psDeviceNode);
|
||||
|
||||
PVRSRV_ERROR ResumeDVFS(PPVRSRV_DEVICE_NODE psDeviceNode);
|
||||
|
||||
#endif /* PVR_DVFS_DEVICE_H */
|
||||
@@ -136,7 +136,8 @@ pvrsrvkm-y += \
|
||||
dma_support.o \
|
||||
vmm_type_stub.o \
|
||||
sysconfig.o \
|
||||
thead_sys.o
|
||||
thead_sys.o \
|
||||
pvr_dvfs_device.o
|
||||
pvrsrvkm-$(CONFIG_DRM_POWERVR_ROGUE_DEBUG) += \
|
||||
client_ri_direct_bridge.o \
|
||||
server_ri_bridge.o \
|
||||
|
||||
@@ -127,10 +127,6 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
#include "pdump_physmem.h"
|
||||
#endif
|
||||
|
||||
#undef linux
|
||||
#define CREATE_TRACE_POINTS
|
||||
#include "gpu_trace_point.h"
|
||||
|
||||
static PVRSRV_ERROR RGXDevInitCompatCheck(PVRSRV_DEVICE_NODE *psDeviceNode);
|
||||
static PVRSRV_ERROR RGXDevVersionString(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_CHAR **ppszVersionString);
|
||||
static PVRSRV_ERROR RGXDevClockSpeed(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_PUINT32 pui32RGXClockSpeed);
|
||||
@@ -406,7 +402,6 @@ static inline IMG_BOOL RGXAckHwIrq(PVRSRV_RGXDEV_INFO *psDevInfo,
|
||||
{
|
||||
IMG_UINT32 ui32IRQStatus = OSReadHWReg32(psDevInfo->pvRegsBaseKM, ui32IRQStatusReg);
|
||||
|
||||
trace_gpu_interrupt(ui32IRQStatusReg, ui32IRQStatus);
|
||||
if (ui32IRQStatus & ui32IRQStatusEventMsk)
|
||||
{
|
||||
/* acknowledge and clear the interrupt */
|
||||
@@ -516,9 +511,6 @@ static IMG_BOOL RGX_LISRHandler(void *pvData)
|
||||
{
|
||||
UPDATE_LISR_DBG_STATUS(RGX_LISR_DEVICE_NOT_POWERED);
|
||||
}
|
||||
/* When handling interrupts, there may be a situation where the GPU is powered off,
|
||||
* return IMG_TRUE to avoid the OS considering that this interrupt is nobody cared */
|
||||
bIrqAcknowledged = IMG_TRUE;
|
||||
}
|
||||
|
||||
return bIrqAcknowledged;
|
||||
|
||||
@@ -373,7 +373,7 @@ PVRSRVBridgeEventObjectClose(IMG_UINT32 ui32DispatchTableEntry,
|
||||
(psEventObjectCloseOUT->eError != PVRSRV_ERROR_KERNEL_CCB_FULL) &&
|
||||
(psEventObjectCloseOUT->eError != PVRSRV_ERROR_RETRY)))
|
||||
{
|
||||
PVR_DPF((PVR_DBG_WARNING,
|
||||
PVR_DPF((PVR_DBG_ERROR,
|
||||
"%s: %s", __func__, PVRSRVGetErrorString(psEventObjectCloseOUT->eError)));
|
||||
UnlockHandle(psConnection->psHandleBase);
|
||||
goto EventObjectClose_exit;
|
||||
|
||||
95
drivers/gpu/drm/img-rogue/sofunc_rgx.h
Normal file
95
drivers/gpu/drm/img-rogue/sofunc_rgx.h
Normal file
@@ -0,0 +1,95 @@
|
||||
/*************************************************************************/ /*!
|
||||
@File
|
||||
@Title SO Interface header file for devices/RGX functions
|
||||
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
|
||||
@Description Contains SO interface functions. These functions are defined in
|
||||
the common devices layer and are called from the env layer OS
|
||||
specific implementation.
|
||||
@License Dual MIT/GPLv2
|
||||
|
||||
The contents of this file are subject to the MIT license as set out below.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
Alternatively, the contents of this file may be used under the terms of
|
||||
the GNU General Public License Version 2 ("GPL") in which case the provisions
|
||||
of GPL are applicable instead of those above.
|
||||
|
||||
If you wish to allow use of your version of this file only under the terms of
|
||||
GPL, and not to allow others to use your version of this file under the terms
|
||||
of the MIT license, indicate your decision by deleting the provisions above
|
||||
and replace them with the notice and other provisions required by GPL as set
|
||||
out in the file called "GPL-COPYING" included in this distribution. If you do
|
||||
not delete the provisions above, a recipient may use your version of this file
|
||||
under the terms of either the MIT license or GPL.
|
||||
|
||||
This License is also included in this distribution in the file called
|
||||
"MIT-COPYING".
|
||||
|
||||
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
|
||||
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
|
||||
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
|
||||
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
|
||||
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/ /**************************************************************************/
|
||||
|
||||
#if !defined(SOFUNC_RGX_H_)
|
||||
#define SOFUNC_RGX_H_
|
||||
|
||||
#include "img_types.h"
|
||||
#include "pvrsrv_error.h"
|
||||
|
||||
|
||||
#if !defined(NO_HARDWARE)
|
||||
/*!
|
||||
*******************************************************************************
|
||||
|
||||
@Function SORgxGpuUtilStatsRegister
|
||||
|
||||
@Description SO Interface function called from the OS layer implementation.
|
||||
Initialise data used to compute GPU utilisation statistics
|
||||
for a particular user (identified by the handle passed as
|
||||
argument). This function must be called only once for each
|
||||
different user/handle.
|
||||
|
||||
@Input phGpuUtilUser - Pointer to handle used to identify a user of
|
||||
RGXGetGpuUtilStats
|
||||
|
||||
@Return PVRSRV_ERROR
|
||||
|
||||
******************************************************************************/
|
||||
PVRSRV_ERROR SORgxGpuUtilStatsRegister(IMG_HANDLE *phGpuUtilUser);
|
||||
|
||||
|
||||
/*!
|
||||
*******************************************************************************
|
||||
|
||||
@Function SORgxGpuUtilStatsUnregister
|
||||
|
||||
@Description SO Interface function called from the OS layer implementation.
|
||||
Free data previously used to compute GPU utilisation statistics
|
||||
for a particular user (identified by the handle passed as
|
||||
argument).
|
||||
|
||||
@Input hGpuUtilUser - Handle used to identify a user of
|
||||
RGXGetGpuUtilStats
|
||||
|
||||
@Return PVRSRV_ERROR
|
||||
|
||||
******************************************************************************/
|
||||
PVRSRV_ERROR SORgxGpuUtilStatsUnregister(IMG_HANDLE hGpuUtilUser);
|
||||
#endif /* !defined(NO_HARDWARE) */
|
||||
|
||||
|
||||
|
||||
#endif /* SOFUNC_RGX_H_ */
|
||||
@@ -307,8 +307,6 @@ PVRSRV_ERROR SysDevInit(void *pvOSDevice, PVRSRV_DEVICE_CONFIG **ppsDevConfig)
|
||||
dma_set_mask(pvOSDevice, DMA_BIT_MASK(40));
|
||||
#endif
|
||||
|
||||
thead_sysfs_init(pvOSDevice);
|
||||
|
||||
mfg = dt_hw_init(pvOSDevice);
|
||||
if (IS_ERR(mfg)) {
|
||||
if (PTR_ERR(mfg) == -EPROBE_DEFER)
|
||||
@@ -421,7 +419,6 @@ void SysDevDeInit(PVRSRV_DEVICE_CONFIG *psDevConfig)
|
||||
#endif
|
||||
|
||||
PhysHeapsDestroy(psDevConfig->pasPhysHeaps);
|
||||
thead_sysfs_uninit(psDevConfig->pvOSDevice);
|
||||
OSFreeMem(psDevConfig);
|
||||
}
|
||||
|
||||
|
||||
@@ -54,340 +54,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
#include <linux/thermal.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/sysfs.h>
|
||||
#include <linux/utsname.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <drm/drm_device.h>
|
||||
|
||||
#include "pvrsrv.h"
|
||||
#include "pvr_drv.h"
|
||||
#include "proc_stats.h"
|
||||
#include "pvrversion.h"
|
||||
#include "rgxhwperf.h"
|
||||
#include "rgxinit.h"
|
||||
#include "process_stats.h"
|
||||
#include "thead_sys.h"
|
||||
|
||||
#ifdef SUPPORT_RGX
|
||||
static IMG_HANDLE ghGpuUtilSysFS;
|
||||
#endif
|
||||
static int thead_gpu_period_ms = -1;
|
||||
static int thead_gpu_loading_max_percent = -1;
|
||||
static int thead_gpu_last_server_error = 0;
|
||||
static int thead_gpu_last_rgx_error = 0;
|
||||
|
||||
struct gpu_sysfs_private_data {
|
||||
struct device *dev;
|
||||
struct timer_list timer;
|
||||
struct workqueue_struct *workqueue;
|
||||
struct work_struct work;
|
||||
};
|
||||
static struct gpu_sysfs_private_data thead_gpu_sysfs_private_data;
|
||||
|
||||
/******************定义log的读写属性*************************************/
|
||||
static ssize_t thead_gpu_log_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
|
||||
{
|
||||
ssize_t len = 0;
|
||||
PDLLIST_NODE pNext, pNode;
|
||||
struct device *dev = kobj_to_dev(kobj);
|
||||
struct drm_device *drm_dev = dev_get_drvdata(dev);
|
||||
struct pvr_drm_private *priv = drm_dev->dev_private;
|
||||
PVRSRV_DEVICE_NODE *psDevNode = priv->dev_node;
|
||||
PVRSRV_DEVICE_HEALTH_STATUS eHealthStatus = OSAtomicRead(&psDevNode->eHealthStatus);
|
||||
PVRSRV_DATA *psPVRSRVData = PVRSRVGetPVRSRVData();
|
||||
|
||||
// 驱动信息
|
||||
int dev_id = (int)psDevNode->sDevId.ui32InternalID;
|
||||
int dev_connection_num = 0;
|
||||
int dev_loading_percent = -1;
|
||||
|
||||
// 内存信息
|
||||
IMG_UINT32 dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_COUNT];
|
||||
|
||||
// 实例/会话/通道信息
|
||||
int instance_id = 0;
|
||||
|
||||
// 异常信息
|
||||
char* server_state[3] = {"UNDEFINED", "OK", "BAD"};
|
||||
char* rgx_state[5] = {"UNDEFINED", "OK", "NOT RESPONDING", "DEAD", "FAULT"};
|
||||
int rgx_err = 0;
|
||||
|
||||
if (psDevNode->pvDevice != NULL)
|
||||
{
|
||||
PVRSRV_RGXDEV_INFO *psDevInfo = psDevNode->pvDevice;
|
||||
#ifdef SUPPORT_RGX
|
||||
if (!PVRSRV_VZ_MODE_IS(GUEST) &&
|
||||
psDevInfo->pfnGetGpuUtilStats &&
|
||||
eHealthStatus == PVRSRV_DEVICE_HEALTH_STATUS_OK)
|
||||
{
|
||||
RGXFWIF_GPU_UTIL_STATS sGpuUtilStats;
|
||||
PVRSRV_ERROR eError = PVRSRV_OK;
|
||||
|
||||
eError = psDevInfo->pfnGetGpuUtilStats(psDevNode,
|
||||
ghGpuUtilSysFS,
|
||||
&sGpuUtilStats);
|
||||
|
||||
if ((eError == PVRSRV_OK) &&
|
||||
((IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative))
|
||||
{
|
||||
IMG_UINT64 util;
|
||||
IMG_UINT32 rem;
|
||||
|
||||
util = 100 * sGpuUtilStats.ui64GpuStatActive;
|
||||
util = OSDivide64(util, (IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative, &rem);
|
||||
|
||||
dev_loading_percent = (int)util;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
rgx_err = psDevInfo->sErrorCounts.ui32WGPErrorCount + psDevInfo->sErrorCounts.ui32TRPErrorCount;
|
||||
}
|
||||
|
||||
if (dev_loading_percent > thead_gpu_loading_max_percent)
|
||||
thead_gpu_loading_max_percent = dev_loading_percent;
|
||||
|
||||
PVRSRVFindProcessMemStats(0, PVRSRV_DRIVER_STAT_TYPE_COUNT, IMG_TRUE, dev_mem_state);
|
||||
|
||||
if (!psDevNode->hConnectionsLock)
|
||||
{
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"[GPU] Version: %s\n"
|
||||
"Build Info: %s %s %s %s\n"
|
||||
"----------------------------------------MODULE PARAM-----------------------------------------\n"
|
||||
"updatePeriod_ms\n"
|
||||
"%d\n"
|
||||
"----------------------------------------MODULE STATUS----------------------------------------\n"
|
||||
"DevId DevInstanceNum DevLoading_%% DevLoadingMax_%%\n"
|
||||
"%-10d%-20d%-15d%-15d\n"
|
||||
"----------------------------------------MEM INFO(KB)-----------------------------------------\n"
|
||||
"KMalloc VMalloc PTMemoryUMA VMapPTUMA\n"
|
||||
"%-18d%-18d%-18d%-18d\n"
|
||||
"PTMemoryLMA IORemapPTLMA GPUMemLMA GPUMemUMA\n"
|
||||
"%-18d%-18d%-18d%-18d\n"
|
||||
"GPUMemUMAPool MappedGPUMemUMA/LMA DmaBufImport\n"
|
||||
"%-18d%-36d%-18d\n"
|
||||
"----------------------------------------INSTANCE INFO----------------------------------------\n"
|
||||
"Id ProName ProId ThdId\n"
|
||||
"---------------------------------------EXCEPTION INFO----------------------------------------\n"
|
||||
"Server_State Server_Error RGX_State RGX_Error\n"
|
||||
"%-18s%-18d%-18s%-18d\n",
|
||||
PVRVERSION_STRING, utsname()->sysname, utsname()->release, utsname()->version, utsname()->machine, thead_gpu_period_ms,
|
||||
dev_id, 0, dev_loading_percent, thead_gpu_loading_max_percent,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_KMALLOC] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMALLOC],
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_UMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMAP_PT_UMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_IOREMAP_PT_LMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA_POOL] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_MAPPED_GPUMEM_UMA_LMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_DMA_BUF_IMPORT] >> 10,
|
||||
server_state[psPVRSRVData->eServicesState], PVRSRV_KM_ERRORS - thead_gpu_last_server_error,
|
||||
rgx_state[eHealthStatus], rgx_err - thead_gpu_last_rgx_error);
|
||||
return len;
|
||||
}
|
||||
|
||||
OSLockAcquire(psDevNode->hConnectionsLock);
|
||||
dllist_foreach_node(&psDevNode->sConnections, pNode, pNext)
|
||||
{
|
||||
dev_connection_num++;
|
||||
}
|
||||
|
||||
// 格式化输出
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"[GPU] Version: %s\n"
|
||||
"Build Info: %s %s %s %s\n"
|
||||
"----------------------------------------MODULE PARAM-----------------------------------------\n"
|
||||
"updatePeriod_ms\n"
|
||||
"%d\n"
|
||||
"----------------------------------------MODULE STATUS----------------------------------------\n"
|
||||
"DevId DevInstanceNum DevLoading_%% DevLoadingMax_%%\n"
|
||||
"%-10d%-20d%-15d%-15d\n"
|
||||
"----------------------------------------MEM INFO(KB)-----------------------------------------\n"
|
||||
"KMalloc VMalloc PTMemoryUMA VMapPTUMA\n"
|
||||
"%-18d%-18d%-18d%-18d\n"
|
||||
"PTMemoryLMA IORemapPTLMA GPUMemLMA GPUMemUMA\n"
|
||||
"%-18d%-18d%-18d%-18d\n"
|
||||
"GPUMemUMAPool MappedGPUMemUMA/LMA DmaBufImport\n"
|
||||
"%-18d%-36d%-18d\n"
|
||||
"----------------------------------------INSTANCE INFO----------------------------------------\n"
|
||||
"Id ProName ProId ThdId\n",
|
||||
PVRVERSION_STRING, utsname()->sysname, utsname()->release, utsname()->version, utsname()->machine, thead_gpu_period_ms,
|
||||
dev_id, dev_connection_num, dev_loading_percent, thead_gpu_loading_max_percent,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_KMALLOC] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMALLOC],
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_UMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMAP_PT_UMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_IOREMAP_PT_LMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA_POOL] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_MAPPED_GPUMEM_UMA_LMA] >> 10,
|
||||
dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_DMA_BUF_IMPORT] >> 10);
|
||||
|
||||
dllist_foreach_node(&psDevNode->sConnections, pNode, pNext)
|
||||
{
|
||||
CONNECTION_DATA *sData = IMG_CONTAINER_OF(pNode, CONNECTION_DATA, sConnectionListNode);
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"%-5d%-20s%-10d%-10d\n",
|
||||
instance_id, sData->pszProcName, sData->pid, sData->tid);
|
||||
instance_id++;
|
||||
}
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len,
|
||||
"---------------------------------------EXCEPTION INFO----------------------------------------\n"
|
||||
"Server_State Server_Error RGX_State RGX_Error\n"
|
||||
"%-18s%-18d%-18s%-18d\n",
|
||||
server_state[psPVRSRVData->eServicesState], PVRSRV_KM_ERRORS - thead_gpu_last_server_error,
|
||||
rgx_state[eHealthStatus], rgx_err - thead_gpu_last_rgx_error);
|
||||
|
||||
OSLockRelease(psDevNode->hConnectionsLock);
|
||||
return len;
|
||||
}
|
||||
|
||||
static ssize_t thead_gpu_log_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
struct device *dev = kobj_to_dev(kobj);
|
||||
struct drm_device *drm_dev = dev_get_drvdata(dev);
|
||||
struct pvr_drm_private *priv = drm_dev->dev_private;
|
||||
PVRSRV_DEVICE_NODE *psDevNode = priv->dev_node;
|
||||
|
||||
thead_gpu_loading_max_percent = -1;
|
||||
thead_gpu_last_server_error = PVRSRV_KM_ERRORS;
|
||||
if (psDevNode->pvDevice != NULL)
|
||||
{
|
||||
PVRSRV_RGXDEV_INFO *psDevInfo = psDevNode->pvDevice;
|
||||
thead_gpu_last_rgx_error = psDevInfo->sErrorCounts.ui32WGPErrorCount + psDevInfo->sErrorCounts.ui32TRPErrorCount;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
static struct kobj_attribute sthead_gpu_log_attr = __ATTR(log, 0664, thead_gpu_log_show, thead_gpu_log_store);
|
||||
|
||||
/******************定义updatePeriod的读写属性*************************************/
|
||||
static ssize_t thead_gpu_updatePeriod_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "%d\n(set 50~10000 to enable update period, set other value to disable)\n",
|
||||
thead_gpu_period_ms);
|
||||
}
|
||||
|
||||
static ssize_t thead_gpu_updatePeriod_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
char *start = (char *)buf;
|
||||
int temp_period_ms = simple_strtoul(start, &start, 0);
|
||||
if (temp_period_ms >= 50 && temp_period_ms <= 10000) {
|
||||
thead_gpu_period_ms = temp_period_ms;
|
||||
mod_timer(&thead_gpu_sysfs_private_data.timer, jiffies + msecs_to_jiffies(thead_gpu_period_ms));
|
||||
} else {
|
||||
thead_gpu_period_ms = -1;
|
||||
del_timer(&thead_gpu_sysfs_private_data.timer);
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
static struct kobj_attribute sthead_gpu_updateperiod_attr = __ATTR(updatePeriod_ms, 0664, thead_gpu_updatePeriod_show, thead_gpu_updatePeriod_store);
|
||||
|
||||
/******************定义sysfs属性info group*************************************/
|
||||
static struct attribute *pthead_gpu_attrs[] = {
|
||||
&sthead_gpu_log_attr.attr,
|
||||
&sthead_gpu_updateperiod_attr.attr,
|
||||
NULL, // must be NULL
|
||||
};
|
||||
|
||||
static struct attribute_group sthead_gpu_attr_group = {
|
||||
.name = "info", // device下目录指定
|
||||
.attrs = pthead_gpu_attrs,
|
||||
};
|
||||
|
||||
static void thead_gpu_work_func(struct work_struct *w)
|
||||
{
|
||||
struct gpu_sysfs_private_data *data = container_of(w, struct gpu_sysfs_private_data, work);
|
||||
struct device *dev = data->dev;
|
||||
struct drm_device *drm_dev = dev_get_drvdata(dev);
|
||||
struct pvr_drm_private *priv = drm_dev->dev_private;
|
||||
PVRSRV_DEVICE_NODE *psDevNode = priv->dev_node;
|
||||
PVRSRV_DEVICE_HEALTH_STATUS eHealthStatus = OSAtomicRead(&psDevNode->eHealthStatus);
|
||||
int current_loading_percent = -1;
|
||||
if (psDevNode->pvDevice != NULL)
|
||||
{
|
||||
PVRSRV_RGXDEV_INFO *psDevInfo = psDevNode->pvDevice;
|
||||
#ifdef SUPPORT_RGX
|
||||
if (!PVRSRV_VZ_MODE_IS(GUEST) &&
|
||||
psDevInfo->pfnGetGpuUtilStats &&
|
||||
eHealthStatus == PVRSRV_DEVICE_HEALTH_STATUS_OK)
|
||||
{
|
||||
RGXFWIF_GPU_UTIL_STATS sGpuUtilStats;
|
||||
PVRSRV_ERROR eError = PVRSRV_OK;
|
||||
|
||||
eError = psDevInfo->pfnGetGpuUtilStats(psDevNode,
|
||||
ghGpuUtilSysFS,
|
||||
&sGpuUtilStats);
|
||||
|
||||
if ((eError == PVRSRV_OK) &&
|
||||
((IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative))
|
||||
{
|
||||
IMG_UINT64 util;
|
||||
IMG_UINT32 rem;
|
||||
|
||||
util = 100 * sGpuUtilStats.ui64GpuStatActive;
|
||||
util = OSDivide64(util, (IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative, &rem);
|
||||
|
||||
current_loading_percent = (int)util;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
if (current_loading_percent > thead_gpu_loading_max_percent)
|
||||
thead_gpu_loading_max_percent = current_loading_percent;
|
||||
mod_timer(&data->timer, jiffies + msecs_to_jiffies(thead_gpu_period_ms));
|
||||
}
|
||||
|
||||
void thead_gpu_timer_callback(struct timer_list *t)
|
||||
{
|
||||
struct gpu_sysfs_private_data *data = container_of(t, struct gpu_sysfs_private_data, timer);
|
||||
queue_work(data->workqueue, &data->work);
|
||||
}
|
||||
|
||||
int thead_sysfs_init(struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
ret = sysfs_create_group(&dev->kobj, &sthead_gpu_attr_group);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to create gpu dev sysfs.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if defined(SUPPORT_RGX) && !defined(NO_HARDWARE)
|
||||
if (SORgxGpuUtilStatsRegister(&ghGpuUtilSysFS) != PVRSRV_OK)
|
||||
{
|
||||
dev_err(dev, "Failed to register GpuUtil for sysfs.\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
#endif
|
||||
|
||||
thead_gpu_sysfs_private_data.workqueue = create_workqueue("gpu_sysfs_workqueue");
|
||||
if (!thead_gpu_sysfs_private_data.workqueue)
|
||||
return -ENOMEM;
|
||||
INIT_WORK(&thead_gpu_sysfs_private_data.work, thead_gpu_work_func);
|
||||
|
||||
thead_gpu_sysfs_private_data.dev = dev;
|
||||
timer_setup(&thead_gpu_sysfs_private_data.timer, thead_gpu_timer_callback, 0);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void thead_sysfs_uninit(struct device *dev)
|
||||
{
|
||||
if (thead_gpu_sysfs_private_data.dev == dev)
|
||||
del_timer(&thead_gpu_sysfs_private_data.timer);
|
||||
|
||||
if (thead_gpu_sysfs_private_data.workqueue)
|
||||
destroy_workqueue(thead_gpu_sysfs_private_data.workqueue);
|
||||
|
||||
#if defined(SUPPORT_RGX) && !defined(NO_HARDWARE)
|
||||
if (SORgxGpuUtilStatsUnregister(ghGpuUtilSysFS) != PVRSRV_OK)
|
||||
{
|
||||
dev_err(dev, "Failed to unregister GpuUtil for sysfs.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
sysfs_remove_group(&dev->kobj, &sthead_gpu_attr_group);
|
||||
}
|
||||
|
||||
int thead_mfg_enable(struct gpu_plat_if *mfg)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@@ -63,9 +63,6 @@ struct gpu_plat_if {
|
||||
struct regmap *vosys_regmap;
|
||||
};
|
||||
|
||||
int thead_sysfs_init(struct device *dev);
|
||||
void thead_sysfs_uninit(struct device *dev);
|
||||
|
||||
struct gpu_plat_if *dt_hw_init(struct device *dev);
|
||||
void dt_hw_uninit(struct gpu_plat_if *mfg);
|
||||
|
||||
|
||||
@@ -557,13 +557,4 @@ config DRM_PANEL_HX8279
|
||||
Say Y if you want to enable support for panels based on the
|
||||
HX8279 controller.
|
||||
|
||||
config DRM_PANEL_LT8911
|
||||
tristate "LT8911-based panels"
|
||||
depends on OF
|
||||
depends on DRM_MIPI_DSI
|
||||
depends on BACKLIGHT_CLASS_DEVICE
|
||||
help
|
||||
Say Y if you want to enable support for panels based on the
|
||||
lt8911 controller.
|
||||
|
||||
endmenu
|
||||
|
||||
@@ -59,4 +59,3 @@ obj-$(CONFIG_DRM_PANEL_HX8394) += panel-himax8394.o
|
||||
obj-$(CONFIG_DRM_PANEL_JADARD_JD9365DA_H3) += panel-jadard-jd9365da-h3.o
|
||||
obj-$(CONFIG_DRM_PANEL_MINGJUN_070BI30IA2) += panel-mingjun-070bi30ia2.o
|
||||
obj-$(CONFIG_DRM_PANEL_HX8279) += panel-hx8279.o
|
||||
obj-$(CONFIG_DRM_PANEL_LT8911) += panel-lt8911.o
|
||||
|
||||
@@ -135,17 +135,17 @@ static int hx8279_panel_enable(struct drm_panel *panel)
|
||||
if (pinfo->enabled)
|
||||
return 0;
|
||||
|
||||
ret = mipi_dsi_dcs_set_display_on(pinfo->link);
|
||||
ret = mipi_dsi_dcs_exit_sleep_mode(pinfo->link);
|
||||
if (ret < 0) {
|
||||
dev_err(panel->dev, "failed to set display on: %d\n", ret);
|
||||
dev_err(panel->dev, "failed to exit sleep mode: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
msleep(120);
|
||||
|
||||
ret = mipi_dsi_dcs_exit_sleep_mode(pinfo->link);
|
||||
ret = mipi_dsi_dcs_set_display_on(pinfo->link);
|
||||
if (ret < 0) {
|
||||
dev_err(panel->dev, "failed to exit sleep mode: %d\n", ret);
|
||||
dev_err(panel->dev, "failed to set display on: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -136,10 +136,10 @@ static int jadard_prepare(struct drm_panel *panel)
|
||||
dev_err(pinfo->base.dev, "Failed to enable vspn3v3 supply: %d\n", ret);
|
||||
goto fail;
|
||||
}
|
||||
usleep_range(1000, 2000);
|
||||
usleep_range(5000, 6000);
|
||||
|
||||
gpiod_set_value(pinfo->reset, 1);
|
||||
msleep(10);
|
||||
msleep(180);
|
||||
|
||||
pinfo->prepared = true;
|
||||
|
||||
@@ -165,7 +165,7 @@ static int jadard_enable(struct drm_panel *panel)
|
||||
return ret;
|
||||
}
|
||||
|
||||
msleep(10);
|
||||
msleep(120);
|
||||
|
||||
ret = mipi_dsi_dcs_set_display_on(pinfo->link);
|
||||
if (ret < 0) {
|
||||
@@ -212,19 +212,19 @@ static const struct drm_panel_funcs panel_funcs = {
|
||||
};
|
||||
|
||||
static const struct drm_display_mode jadard_default_mode = {
|
||||
.clock = 152840,
|
||||
.hdisplay = 1920,
|
||||
.hsync_start = 1920 + 140,
|
||||
.hsync_end = 1920 + 140 + 160,
|
||||
.htotal = 1920 + 140 + 160 + 30,
|
||||
.clock = 76000,
|
||||
.hdisplay = 800,
|
||||
.hsync_start = 800 + 32,
|
||||
.hsync_end = 800 + 32 + 8,
|
||||
.htotal = 800 + 32 + 8 + 32,
|
||||
|
||||
.vdisplay = 1080,
|
||||
.vsync_start = 1080 + 18,
|
||||
.vsync_end = 1080 + 18 + 28,
|
||||
.vtotal = 1080 + 18 + 28 + 6,
|
||||
.vdisplay = 1280,
|
||||
.vsync_start = 1280 + 16,
|
||||
.vsync_end = 1280 + 16 + 8,
|
||||
.vtotal = 1280 + 16 + 8 + 16,
|
||||
|
||||
.width_mm = 110,
|
||||
.height_mm = 62,
|
||||
.width_mm = 62,
|
||||
.height_mm = 110,
|
||||
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
|
||||
};
|
||||
|
||||
|
||||
@@ -1,989 +0,0 @@
|
||||
#include "panel-lt8911.h"
|
||||
#include <linux/version.h>
|
||||
#include <linux/of_gpio.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
|
||||
#define ILI9881_PAGE(_page) DSI_DCS_WRITE(dsi, 0xff, 0x98, 0x81, _page)
|
||||
#define IILI9881_COMMAND(_cmd, _data...) DSI_DCS_WRITE(dsi, _cmd, _data)
|
||||
#define DCS_CMD_READ_ID1 0xDA
|
||||
|
||||
#define LT_8911_I2C_ADAPTER 3
|
||||
#define LT_8911_I2C_ADDR 0x45
|
||||
|
||||
static struct i2c_mipi_dsi g_lt8911_mipi_dsi;
|
||||
static bool g_is_std_suspend __nosavedata;
|
||||
|
||||
static const struct drm_display_mode lt8911_default_mode = {
|
||||
.clock = 152840,
|
||||
.hdisplay = 1920,
|
||||
.hsync_start = 1920 + 140,
|
||||
.hsync_end = 1920 + 140 + 160,
|
||||
.htotal = 1920 + 140 + 160 + 30,
|
||||
|
||||
.vdisplay = 1080,
|
||||
.vsync_start = 1080 + 18,
|
||||
.vsync_end = 1080 + 18 + 28,
|
||||
.vtotal = 1080 + 18 + 28 + 6,
|
||||
|
||||
.width_mm = 110,
|
||||
.height_mm = 62,
|
||||
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
|
||||
};
|
||||
|
||||
static const struct panel_data lt8911_panel_data = {
|
||||
.display_mode = <8911_default_mode,
|
||||
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO_BURST,
|
||||
.format = MIPI_DSI_FMT_RGB888,
|
||||
.lanes = 4,
|
||||
};
|
||||
|
||||
enum {
|
||||
hfp = 0,
|
||||
hs,
|
||||
hbp,
|
||||
hact,
|
||||
htotal,
|
||||
vfp,
|
||||
vs,
|
||||
vbp,
|
||||
vact,
|
||||
vtotal,
|
||||
pclk_10khz
|
||||
};
|
||||
|
||||
static int mipi_timing[] = {
|
||||
140, /* hfp */
|
||||
30, /* hs */
|
||||
160, /* hbp */
|
||||
1920, /* hact */
|
||||
2250, /* htotal */
|
||||
18, /* vfp */
|
||||
6, /* vs */
|
||||
28, /* vbp */
|
||||
1080, /* vact */
|
||||
1132, /* vtotal */
|
||||
15284 /* pixel_clk / 10000 */
|
||||
};
|
||||
|
||||
static int lt8911_i2c_write(struct i2c_client *client,
|
||||
uint8_t reg, uint8_t val)
|
||||
{
|
||||
int ret = -1;
|
||||
int retries = 0;
|
||||
uint8_t buf[2] = { reg, val };
|
||||
struct i2c_msg msg = {
|
||||
.flags = !I2C_M_RD,
|
||||
.addr = client->addr,
|
||||
.len = 2,
|
||||
.buf = buf,
|
||||
};
|
||||
|
||||
while (retries < 5) {
|
||||
ret = i2c_transfer(client->adapter, &msg, 1);
|
||||
if (ret == 1)
|
||||
return 0;
|
||||
retries++;
|
||||
}
|
||||
|
||||
DBG_FUNC("%s: write addr 0x%02x error! ret = %d\n",
|
||||
__func__, reg, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lt8911_i2c_read(struct i2c_client *client, uint8_t reg)
|
||||
{
|
||||
int ret = -1;
|
||||
int retries = 0;
|
||||
uint8_t buf[2] = { reg, 0 };
|
||||
struct i2c_msg msgs[2];
|
||||
|
||||
msgs[0].flags = client->flags;
|
||||
msgs[0].addr = client->addr;
|
||||
msgs[0].len = 1;
|
||||
msgs[0].buf = &buf[0];
|
||||
|
||||
msgs[1].flags = client->flags | I2C_M_RD;
|
||||
msgs[1].addr = client->addr;
|
||||
msgs[1].len = 1;
|
||||
msgs[1].buf = &buf[1];
|
||||
|
||||
while (retries < 5) {
|
||||
ret = i2c_transfer(client->adapter, msgs, 2);
|
||||
if (ret == 2)
|
||||
return buf[1];
|
||||
retries++;
|
||||
}
|
||||
|
||||
DBG_FUNC("%s: read addr 0x%02x error! ret = %d\n",
|
||||
__func__, reg, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void lt8911_reset(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
gpio_set_value(md->reset_pin, 0);
|
||||
msleep(md->rst_delay_ms);
|
||||
gpio_set_value(md->reset_pin, 1);
|
||||
msleep(md->rst_delay_ms);
|
||||
}
|
||||
|
||||
static void lt8911exb_cfg_set_mipi_timing(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
struct i2c_client *client = md->client;
|
||||
|
||||
/* lt8911exb MIPI video timing configuration */
|
||||
lt8911_i2c_write(client, 0xff, 0xd0);
|
||||
lt8911_i2c_write(client, 0x0d, (u8)(mipi_timing[vtotal] / 256));
|
||||
lt8911_i2c_write(client, 0x0e, (u8)(mipi_timing[vtotal] % 256));
|
||||
lt8911_i2c_write(client, 0x0f, (u8)(mipi_timing[vact] / 256));
|
||||
lt8911_i2c_write(client, 0x10, (u8)(mipi_timing[vact] % 256));
|
||||
lt8911_i2c_write(client, 0x11, (u8)(mipi_timing[htotal] / 256));
|
||||
lt8911_i2c_write(client, 0x12, (u8)(mipi_timing[htotal] % 256));
|
||||
lt8911_i2c_write(client, 0x13, (u8)(mipi_timing[hact] / 256));
|
||||
lt8911_i2c_write(client, 0x14, (u8)(mipi_timing[hact] % 256));
|
||||
lt8911_i2c_write(client, 0x15, (u8)(mipi_timing[vs] % 256));
|
||||
lt8911_i2c_write(client, 0x16, (u8)(mipi_timing[hs] % 256));
|
||||
lt8911_i2c_write(client, 0x17, (u8)(mipi_timing[vfp] / 256));
|
||||
lt8911_i2c_write(client, 0x18, (u8)(mipi_timing[vfp] % 256));
|
||||
lt8911_i2c_write(client, 0x19, (u8)(mipi_timing[hfp] / 256));
|
||||
lt8911_i2c_write(client, 0x1a, (u8)(mipi_timing[hfp] % 256));
|
||||
}
|
||||
|
||||
static void lt8911exb_cfg_set_edp_timing(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
struct i2c_client *client = md->client;
|
||||
|
||||
/* lt8911exb eDP video timing configuration */
|
||||
lt8911_i2c_write(client, 0xff, 0xa8);
|
||||
lt8911_i2c_write(client, 0x2d, 0x88);
|
||||
lt8911_i2c_write(client, 0x05,
|
||||
(u8)(mipi_timing[htotal] / 256));
|
||||
lt8911_i2c_write(client, 0x06,
|
||||
(u8)(mipi_timing[htotal] % 256));
|
||||
lt8911_i2c_write(client, 0x07,
|
||||
(u8)((mipi_timing[hs] + mipi_timing[hbp]) / 256));
|
||||
lt8911_i2c_write(client, 0x08,
|
||||
(u8)((mipi_timing[hs] + mipi_timing[hbp]) % 256));
|
||||
lt8911_i2c_write(client, 0x09,
|
||||
(u8)(mipi_timing[hs] / 256));
|
||||
lt8911_i2c_write(client, 0x0a,
|
||||
(u8)(mipi_timing[hs] % 256));
|
||||
lt8911_i2c_write(client, 0x0b,
|
||||
(u8)(mipi_timing[hact] / 256));
|
||||
lt8911_i2c_write(client, 0x0c,
|
||||
(u8)(mipi_timing[hact] % 256));
|
||||
lt8911_i2c_write(client, 0x0d,
|
||||
(u8)(mipi_timing[vtotal] / 256));
|
||||
lt8911_i2c_write(client, 0x0e,
|
||||
(u8)(mipi_timing[vtotal] % 256));
|
||||
lt8911_i2c_write(client, 0x11,
|
||||
(u8)((mipi_timing[vs] + mipi_timing[vbp]) / 256));
|
||||
lt8911_i2c_write(client, 0x12,
|
||||
(u8)((mipi_timing[vs] + mipi_timing[vbp]) % 256));
|
||||
lt8911_i2c_write(client, 0x14,
|
||||
(u8)(mipi_timing[vs] % 256));
|
||||
lt8911_i2c_write(client, 0x15,
|
||||
(u8)(mipi_timing[vact] / 256));
|
||||
lt8911_i2c_write(client, 0x16,
|
||||
(u8)(mipi_timing[vact] % 256));
|
||||
}
|
||||
|
||||
static void lt8911exb_cfg_init_regs(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
u32 val = 0;
|
||||
u8 i, pcr_pll_postdiv, pcr_m;
|
||||
struct i2c_client *client = md->client;
|
||||
u8 swing_ds1[13][2] = {
|
||||
{ 0x83, 0x00 }, /* 27.8 mA */
|
||||
{ 0x82, 0xe0 }, /* 26.2 mA */
|
||||
{ 0x82, 0xc0 }, /* 24.6 mA */
|
||||
{ 0x82, 0xa0 }, /* 23.0 mA */
|
||||
{ 0x82, 0x80 }, /* 21.4 mA */
|
||||
{ 0x82, 0x40 }, /* 18.2 mA */
|
||||
{ 0x82, 0x20 }, /* 16.6 mA */
|
||||
{ 0x82, 0x00 }, /* 15.0 mA */
|
||||
{ 0x81, 0x00 }, /* 12.8 mA */
|
||||
{ 0x80, 0xe0 }, /* 11.2 mA */
|
||||
{ 0x80, 0xc0 }, /* 9.6 mA */
|
||||
{ 0x80, 0xa0 }, /* 8 mA */
|
||||
{ 0x80, 0x80 } /* 6 mA */
|
||||
};
|
||||
|
||||
/* initialization */
|
||||
lt8911_i2c_write(client, 0xff, 0x81);
|
||||
lt8911_i2c_write(client, 0x49, 0xff);
|
||||
lt8911_i2c_write(client, 0xff, 0x82);
|
||||
lt8911_i2c_write(client, 0x5a, 0x0e);
|
||||
|
||||
/* MIPI Rx analog */
|
||||
lt8911_i2c_write(client, 0xff, 0x82);
|
||||
lt8911_i2c_write(client, 0x32, 0x51);
|
||||
lt8911_i2c_write(client, 0x35, 0x22);
|
||||
lt8911_i2c_write(client, 0x4c, 0x0c);
|
||||
lt8911_i2c_write(client, 0x4d, 0x00);
|
||||
|
||||
lt8911_i2c_write(client, 0x3a, 0x77);
|
||||
lt8911_i2c_write(client, 0x3b, 0x77);
|
||||
|
||||
/* dessc_pcr pll analog */
|
||||
lt8911_i2c_write(client, 0xff, 0x82);
|
||||
lt8911_i2c_write(client, 0x6a, 0x40);
|
||||
lt8911_i2c_write(client, 0x6b, 0x40);
|
||||
|
||||
if (mipi_timing[pclk_10khz] < 8800) {
|
||||
/* 0x44: pre-div = 2, pixel_clk = 44~88MHz */
|
||||
lt8911_i2c_write(client, 0x6e, 0x82);
|
||||
pcr_pll_postdiv = 0x08;
|
||||
} else {
|
||||
/* 0x40: pre-div = 1, pixel_clk = 88~176MHz */
|
||||
lt8911_i2c_write(client, 0x6e, 0x81);
|
||||
pcr_pll_postdiv = 0x04;
|
||||
}
|
||||
pcr_m = (u8)(mipi_timing[pclk_10khz] * pcr_pll_postdiv / 25 / 100);
|
||||
|
||||
/* dessc pll digital */
|
||||
lt8911_i2c_write(client, 0xff, 0x85);
|
||||
lt8911_i2c_write(client, 0xa9, 0x31);
|
||||
lt8911_i2c_write(client, 0xaa, 0x17);
|
||||
lt8911_i2c_write(client, 0xab, 0xba);
|
||||
lt8911_i2c_write(client, 0xac, 0xe1);
|
||||
lt8911_i2c_write(client, 0xad, 0x47);
|
||||
lt8911_i2c_write(client, 0xae, 0x01);
|
||||
lt8911_i2c_write(client, 0xae, 0x11);
|
||||
|
||||
/* digital top */
|
||||
lt8911_i2c_write(client, 0xff, 0x85);
|
||||
lt8911_i2c_write(client, 0xc0, 0x01);/* select mipi rx */
|
||||
|
||||
if (md->edp_depth == 6)
|
||||
val = 0xd0; /* enable dither */
|
||||
else if (md->edp_depth == 8)
|
||||
val = 0x00; /* disable dither */
|
||||
lt8911_i2c_write(client, 0xb0, val);
|
||||
|
||||
/* MIPI Rx digital */
|
||||
lt8911_i2c_write(client, 0xff, 0xd0);
|
||||
/* 0: 4 lane; 1: 1 lane; 2: 2 lane; 3: 3 lane */
|
||||
lt8911_i2c_write(client, 0x00, md->mipi_lane_cnt % 4);
|
||||
lt8911_i2c_write(client, 0x02, 0x08);
|
||||
lt8911_i2c_write(client, 0x08, 0x00);
|
||||
lt8911_i2c_write(client, 0x0a, 0x12);/* pcr mode */
|
||||
lt8911_i2c_write(client, 0x0c, 0x40);
|
||||
|
||||
lt8911_i2c_write(client, 0x1c, 0x3a);
|
||||
lt8911_i2c_write(client, 0x31, 0x0a);
|
||||
|
||||
lt8911_i2c_write(client, 0x3f, 0x10);
|
||||
lt8911_i2c_write(client, 0x40, 0x20);
|
||||
lt8911_i2c_write(client, 0x41, 0x30);
|
||||
|
||||
#ifdef TEST_PATTERN
|
||||
lt8911_i2c_write(client, 0x26, pcr_m | 0x80);
|
||||
#else
|
||||
lt8911_i2c_write(client, 0x26, pcr_m);
|
||||
#endif
|
||||
|
||||
lt8911_i2c_write(client, 0x27, 0x28);
|
||||
lt8911_i2c_write(client, 0x28, 0xf8);
|
||||
|
||||
lt8911_i2c_write(client, 0xff, 0x81);/* pcr reset */
|
||||
lt8911_i2c_write(client, 0x03, 0x7b);
|
||||
lt8911_i2c_write(client, 0x03, 0xff);
|
||||
|
||||
/* Tx PLL 2.7GHz */
|
||||
lt8911_i2c_write(client, 0xff, 0x87);
|
||||
lt8911_i2c_write(client, 0x19, 0x31);
|
||||
lt8911_i2c_write(client, 0xff, 0x82);
|
||||
lt8911_i2c_write(client, 0x02, 0x42);
|
||||
lt8911_i2c_write(client, 0x03, 0x00);
|
||||
lt8911_i2c_write(client, 0x03, 0x01);
|
||||
lt8911_i2c_write(client, 0xff, 0x81);
|
||||
lt8911_i2c_write(client, 0x09, 0xfc);
|
||||
lt8911_i2c_write(client, 0x09, 0xfd);
|
||||
lt8911_i2c_write(client, 0xff, 0x87);
|
||||
lt8911_i2c_write(client, 0x0c, 0x11);
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
msleep(5);
|
||||
if (lt8911_i2c_read(client, 0x37) & 0x02) {
|
||||
DBG_FUNC("%s: lt8911exb tx pll locked\n",
|
||||
__func__);
|
||||
break;
|
||||
}
|
||||
|
||||
DBG_FUNC("%s: lt8911exb tx pll unlocked\n", __func__);
|
||||
lt8911_i2c_write(client, 0xff, 0x81);
|
||||
lt8911_i2c_write(client, 0x09, 0xfc);
|
||||
lt8911_i2c_write(client, 0x09, 0xfd);
|
||||
lt8911_i2c_write(client, 0xff, 0x87);
|
||||
lt8911_i2c_write(client, 0x0c, 0x10);
|
||||
lt8911_i2c_write(client, 0x0c, 0x11);
|
||||
}
|
||||
|
||||
/* Tx PHY */
|
||||
lt8911_i2c_write(client, 0xff, 0x82);
|
||||
lt8911_i2c_write(client, 0x11, 0x00);
|
||||
lt8911_i2c_write(client, 0x13, 0x10);
|
||||
lt8911_i2c_write(client, 0x14, 0x0c);
|
||||
lt8911_i2c_write(client, 0x14, 0x08);
|
||||
lt8911_i2c_write(client, 0x13, 0x20);
|
||||
lt8911_i2c_write(client, 0xff, 0x82);
|
||||
lt8911_i2c_write(client, 0x0e, 0x25);
|
||||
lt8911_i2c_write(client, 0x12, 0xff);
|
||||
|
||||
/* eDP tx digital */
|
||||
lt8911_i2c_write(client, 0xff, 0xa8);
|
||||
|
||||
#ifdef TEST_PATTERN
|
||||
/* bit[2:0]: test panttern image mode */
|
||||
lt8911_i2c_write(client, 0x24, 0x50);
|
||||
/* bit[6:4]: test pattern color */
|
||||
lt8911_i2c_write(client, 0x25, 0x70);
|
||||
/* 0x50: pattern; 0x10: mipi video */
|
||||
lt8911_i2c_write(client, 0x27, 0x50);
|
||||
#else
|
||||
/* 0x50: pattern; 0x10: mipi video */
|
||||
lt8911_i2c_write(client, 0x27, 0x10);
|
||||
#endif
|
||||
|
||||
if (md->edp_depth == 6)
|
||||
val = 0x00;
|
||||
else if (md->edp_depth == 8)
|
||||
val = 0x10;
|
||||
lt8911_i2c_write(client, 0x17, val);
|
||||
lt8911_i2c_write(client, 0x18, val << 1);
|
||||
|
||||
lt8911_i2c_write(client, 0xff, 0xa0);
|
||||
lt8911_i2c_write(client, 0x00, 0x08);
|
||||
lt8911_i2c_write(client, 0x01, 0x00);
|
||||
|
||||
/* set eDP drive strength */
|
||||
lt8911_i2c_write(client, 0xff, 0x82);
|
||||
/* lane 0 tap0 */
|
||||
lt8911_i2c_write(client, 0x22, swing_ds1[0][0]);
|
||||
lt8911_i2c_write(client, 0x23, swing_ds1[0][1]);
|
||||
/* lane 0 tap1 */
|
||||
lt8911_i2c_write(client, 0x24, 0x80);
|
||||
lt8911_i2c_write(client, 0x25, 0x00);
|
||||
/* lane 1 tap0 */
|
||||
lt8911_i2c_write(client, 0x26, swing_ds1[0][0]);
|
||||
lt8911_i2c_write(client, 0x27, swing_ds1[0][1]);
|
||||
/* lane 1 tap1 */
|
||||
lt8911_i2c_write(client, 0x28, 0x80);
|
||||
lt8911_i2c_write(client, 0x29, 0x00);
|
||||
}
|
||||
|
||||
/*
|
||||
* MIPI signal from SoC should be ready before
|
||||
* configuring below video check setting
|
||||
*/
|
||||
static void lt8911exb_dbg_check_mipi_timing(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
u32 val = 0;
|
||||
struct i2c_client *client = md->client;
|
||||
|
||||
/* MIPI byte clk check */
|
||||
lt8911_i2c_write(client, 0xff, 0x85);
|
||||
/* FM select byte clk */
|
||||
lt8911_i2c_write(client, 0x1d, 0x00);
|
||||
lt8911_i2c_write(client, 0x40, 0xf7);
|
||||
lt8911_i2c_write(client, 0x41, 0x30);
|
||||
/* eDP scramble mode; video chech from mipi */
|
||||
lt8911_i2c_write(client, 0xa1, 0x02);
|
||||
/* 0xf0: close scramble; 0xD0: open scramble */
|
||||
//lt8911_i2c_write(client, 0x17, 0xf0);
|
||||
|
||||
/* video check reset */
|
||||
lt8911_i2c_write(client, 0xff, 0x81);
|
||||
lt8911_i2c_write(client, 0x09, 0x7d);
|
||||
lt8911_i2c_write(client, 0x09, 0xfd);
|
||||
|
||||
lt8911_i2c_write(client, 0xff, 0x85);
|
||||
//msleep(200);
|
||||
msleep(10);
|
||||
if (lt8911_i2c_read(client, 0x50) == 0x03) {
|
||||
val = lt8911_i2c_read(client, 0x4d);
|
||||
val = (val << 8) + lt8911_i2c_read(client, 0x4e);
|
||||
val = (val << 8) + lt8911_i2c_read(client, 0x4f);
|
||||
/* MIPI clk = val * 1000 */
|
||||
DBG_FUNC("%s: video check: mipi clk = %d\n",
|
||||
__func__, val);
|
||||
} else {
|
||||
DBG_FUNC("%s: video check: mipi clk unstable",
|
||||
__func__);
|
||||
}
|
||||
|
||||
/* MIPI Vtotal check */
|
||||
val = lt8911_i2c_read(client, 0x76);
|
||||
val = (val << 8) + lt8911_i2c_read(client, 0x77);
|
||||
DBG_FUNC("%s: video check: Vtotal = %d\n",
|
||||
__func__, val);
|
||||
|
||||
/* MIPI word count check */
|
||||
lt8911_i2c_write(client, 0xff, 0xd0);
|
||||
val = lt8911_i2c_read(client, 0x82);
|
||||
val = (val << 8) + lt8911_i2c_read(client, 0x83);
|
||||
val = val / 3;
|
||||
DBG_FUNC("%s: video check: Hact(word counter) = %d\n",
|
||||
__func__, val);
|
||||
|
||||
/* MIPI Vact check */
|
||||
val = lt8911_i2c_read(client, 0x85);
|
||||
val = (val << 8) + lt8911_i2c_read(client, 0x86);
|
||||
DBG_FUNC("%s: video check: Vact = %d\n",
|
||||
__func__, val);
|
||||
}
|
||||
|
||||
static void lt8911exb_link_train_start(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
struct i2c_client *client = md->client;
|
||||
|
||||
/* lt8911exb link training */
|
||||
lt8911_i2c_write(client, 0xff, 0x85);
|
||||
/* eDP scramble mode */
|
||||
lt8911_i2c_write(client, 0xa1, 0x02);
|
||||
|
||||
/* AUX setup */
|
||||
lt8911_i2c_write(client, 0xff, 0xac);
|
||||
/* soft link training */
|
||||
lt8911_i2c_write(client, 0x00, 0x60);
|
||||
lt8911_i2c_write(client, 0xff, 0xa6);
|
||||
lt8911_i2c_write(client, 0x2a, 0x00);
|
||||
|
||||
lt8911_i2c_write(client, 0xff, 0x81);
|
||||
lt8911_i2c_write(client, 0x07, 0xfe);
|
||||
lt8911_i2c_write(client, 0x07, 0xff);
|
||||
lt8911_i2c_write(client, 0x0a, 0xfc);
|
||||
lt8911_i2c_write(client, 0x0a, 0xfe);
|
||||
|
||||
/* link training */
|
||||
lt8911_i2c_write(client, 0xff, 0x85);
|
||||
lt8911_i2c_write(client, 0x1a, md->edp_lane_cnt);
|
||||
//lt8911_i2c_write(client, 0x13, 0xd1);
|
||||
lt8911_i2c_write(client, 0xff, 0xac);
|
||||
lt8911_i2c_write(client, 0x00, 0x64);
|
||||
lt8911_i2c_write(client, 0x01, 0x0a);
|
||||
lt8911_i2c_write(client, 0x0c, 0x85);
|
||||
lt8911_i2c_write(client, 0x0c, 0xc5);
|
||||
}
|
||||
|
||||
static void lt8911exb_link_train_get_result(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
u32 i, val;
|
||||
struct i2c_client *client = md->client;
|
||||
|
||||
lt8911_i2c_write(client, 0xff, 0xac);
|
||||
for (i = 0; i < 10; i++) {
|
||||
val = lt8911_i2c_read(client, 0x82);
|
||||
if (val & 0x20) {
|
||||
if ((val & 0x1f) == 0x1e)
|
||||
DBG_FUNC("%s: link training succeeded\n",
|
||||
__func__);
|
||||
else
|
||||
DBG_FUNC("%s: link training failed\n",
|
||||
__func__);
|
||||
|
||||
DBG_FUNC("%s: panel link rate: %d\n", __func__,
|
||||
lt8911_i2c_read(client, 0x83));
|
||||
DBG_FUNC("%s: panel link count: %d\n", __func__,
|
||||
lt8911_i2c_read(client, 0x84));
|
||||
break;
|
||||
}
|
||||
DBG_FUNC("%s: link training ongoing...\n", __func__);
|
||||
msleep(100);
|
||||
}
|
||||
}
|
||||
|
||||
/* panel_funcs */
|
||||
static int panel_prepare(struct drm_panel *panel)
|
||||
{
|
||||
int ret = 0;
|
||||
struct i2c_mipi_dsi *md = panel_to_md(panel);
|
||||
struct i2c_client *client = md->client;
|
||||
|
||||
DBG_FUNC("lt8911exb enter\n");
|
||||
|
||||
if(g_is_std_suspend){
|
||||
DBG_FUNC("lt8911exb prepare under std mode, do not prepare\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
if(md->client == NULL){
|
||||
DBG_FUNC("lt8911exb i2c client still not ready\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = regulator_enable(md->vspn3v3);
|
||||
if(ret){
|
||||
goto fail;
|
||||
}
|
||||
|
||||
ret = regulator_enable(md->hsvcc);
|
||||
if(ret){
|
||||
goto fail;
|
||||
}
|
||||
|
||||
//msleep(200);
|
||||
msleep(10);
|
||||
|
||||
lt8911_reset(md);
|
||||
|
||||
lt8911_i2c_write(client, 0xff, 0x81); /* 0x81: register bank */
|
||||
lt8911_i2c_write(client, 0x08, 0x7f);
|
||||
|
||||
DBG_FUNC("%s: lt8911exb chip ID: 0x%02x-0x%02x-0x%02x\n",
|
||||
__func__, lt8911_i2c_read(client, 0x00),
|
||||
lt8911_i2c_read(client, 0x01),
|
||||
lt8911_i2c_read(client, 0x02));
|
||||
|
||||
return 0;
|
||||
|
||||
fail:
|
||||
gpio_set_value(md->reset_pin, 0);
|
||||
regulator_disable(md->hsvcc);
|
||||
regulator_disable(md->vspn3v3);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int panel_unprepare(struct drm_panel *panel)
|
||||
{
|
||||
int ret = 0;
|
||||
struct i2c_mipi_dsi *md = panel_to_md(panel);
|
||||
|
||||
DBG_FUNC("panel_unprepare enter\n");
|
||||
gpio_set_value(md->reset_pin, 0);
|
||||
|
||||
regulator_disable(md->hsvcc);
|
||||
regulator_disable(md->vspn3v3);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int panel_enable(struct drm_panel *panel)
|
||||
{
|
||||
int ret = 0;
|
||||
struct i2c_mipi_dsi *md = panel_to_md(panel);
|
||||
|
||||
DBG_FUNC("panel_enable enter\n");
|
||||
|
||||
if(g_is_std_suspend){
|
||||
DBG_FUNC("lt8911exb enable under std mode, do not enable\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
gpio_set_value(md->backlight_pin, 1);
|
||||
|
||||
lt8911exb_cfg_set_mipi_timing(md);
|
||||
lt8911exb_cfg_set_edp_timing(md);
|
||||
lt8911exb_cfg_init_regs(md);
|
||||
lt8911exb_dbg_check_mipi_timing(md);
|
||||
lt8911exb_link_train_start(md);
|
||||
lt8911exb_link_train_get_result(md);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int panel_disable(struct drm_panel *panel)
|
||||
{
|
||||
int ret = 0;
|
||||
struct i2c_mipi_dsi *md = panel_to_md(panel);
|
||||
|
||||
DBG_FUNC("panel_disable enter\n");
|
||||
|
||||
gpio_set_value(md->backlight_pin, 0);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int panel_get_modes(struct drm_panel *panel, struct drm_connector *connector)
|
||||
{
|
||||
struct i2c_mipi_dsi *md = panel_to_md(panel);
|
||||
const struct drm_display_mode *m = md->desc->display_mode;
|
||||
struct drm_display_mode *mode;
|
||||
|
||||
DBG_FUNC("panel_get_modes enter\n");
|
||||
|
||||
mode = drm_mode_duplicate(connector->dev, m);
|
||||
if (!mode) {
|
||||
/*
|
||||
dev_err(pinfo->base.dev, "failed to add mode %ux%u@%u\n",
|
||||
m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
|
||||
*/
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
drm_mode_set_name(mode);
|
||||
|
||||
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
||||
drm_mode_probed_add(connector, mode);
|
||||
|
||||
connector->display_info.width_mm = mode->width_mm;
|
||||
connector->display_info.height_mm = mode->height_mm;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static const struct drm_panel_funcs panel_funcs = {
|
||||
.prepare = panel_prepare,
|
||||
.unprepare = panel_unprepare,
|
||||
.enable = panel_enable,
|
||||
.disable = panel_disable,
|
||||
.get_modes = panel_get_modes,
|
||||
};
|
||||
|
||||
/* backlight */
|
||||
static int backlight_update(struct backlight_device *bd)
|
||||
{
|
||||
struct i2c_mipi_dsi *md = bl_get_data(bd);
|
||||
int brightness = bd->props.brightness;
|
||||
|
||||
if (bd->props.power != FB_BLANK_UNBLANK ||
|
||||
bd->props.fb_blank != FB_BLANK_UNBLANK ||
|
||||
(bd->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))) {
|
||||
brightness = 0;
|
||||
}
|
||||
|
||||
md->brightness = brightness;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct backlight_ops backlight_ops = {
|
||||
.options = BL_CORE_SUSPENDRESUME,
|
||||
.update_status = backlight_update,
|
||||
};
|
||||
|
||||
static int lt8911_pm_notify(struct notifier_block *notify_block,
|
||||
unsigned long mode, void *unused)
|
||||
{
|
||||
struct i2c_mipi_dsi *ctx = container_of(
|
||||
notify_block, struct i2c_mipi_dsi, pm_notify);
|
||||
|
||||
DBG_FUNC("pm_notify: mode (%ld)\n", mode);
|
||||
|
||||
switch (mode) {
|
||||
case PM_HIBERNATION_PREPARE:
|
||||
DBG_FUNC("pm_notify PM_HIBERNATION_PREPARE\n");
|
||||
g_is_std_suspend = true;
|
||||
break;
|
||||
case PM_POST_HIBERNATION:
|
||||
DBG_FUNC("pm_notify PM_HIBERNATION_PREPARE\n");
|
||||
g_is_std_suspend = false;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
/**
|
||||
static int backlight_init(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
struct device *dev = &md->client->dev;
|
||||
struct backlight_properties props;
|
||||
struct backlight_device *bd;
|
||||
|
||||
printk(KERN_ERR "=====Function %s line %d\n", __FUNCTION__, __LINE__);
|
||||
|
||||
memset(&props, 0, sizeof(props));
|
||||
props.type = BACKLIGHT_RAW;
|
||||
props.max_brightness = 255;
|
||||
bd = devm_backlight_device_register(dev, dev_name(dev),
|
||||
dev, md, &backlight_ops,
|
||||
&props);
|
||||
if (IS_ERR(bd)) {
|
||||
dev_err(dev, "failed to register backlight\n");
|
||||
return PTR_ERR(bd);
|
||||
}
|
||||
|
||||
bd->props.brightness = 255;
|
||||
backlight_update_status(bd);
|
||||
|
||||
return 0;
|
||||
}
|
||||
*/
|
||||
|
||||
static int i2c_md_probe(struct i2c_client *client, const struct i2c_device_id *id)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
struct i2c_mipi_dsi *md = &g_lt8911_mipi_dsi;
|
||||
|
||||
DBG_FUNC("start");
|
||||
|
||||
i2c_set_clientdata(client, md);
|
||||
mutex_init(&md->mutex);
|
||||
md->client = client;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int i2c_md_remove(struct i2c_client *i2c)
|
||||
{
|
||||
struct i2c_mipi_dsi *md = i2c_get_clientdata(i2c);
|
||||
|
||||
DBG_FUNC();
|
||||
|
||||
mipi_dsi_detach(md->dsi);
|
||||
drm_panel_remove(&md->panel);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void i2c_md_shutdown(struct i2c_client *i2c)
|
||||
{
|
||||
struct i2c_mipi_dsi *md = i2c_get_clientdata(i2c);
|
||||
|
||||
DBG_FUNC();
|
||||
|
||||
mipi_dsi_detach(md->dsi);
|
||||
drm_panel_remove(&md->panel);
|
||||
}
|
||||
|
||||
static int lt8911_parse_dt(struct i2c_mipi_dsi *md)
|
||||
{
|
||||
int ret = -1;
|
||||
struct mipi_dsi_device *dsi = md->dsi;
|
||||
struct device_node *np = dsi->dev.of_node;
|
||||
|
||||
md->hsvcc = devm_regulator_get(&dsi->dev, "hsvcc");
|
||||
if (IS_ERR(md->hsvcc))
|
||||
return dev_err_probe(&dsi->dev, PTR_ERR(md->hsvcc),
|
||||
"Failed to request hsvcc regulator\n");
|
||||
|
||||
md->vspn3v3 = devm_regulator_get(&dsi->dev, "vspn3v3");
|
||||
if (IS_ERR(md->vspn3v3))
|
||||
return dev_err_probe(&dsi->dev, PTR_ERR(md->vspn3v3),
|
||||
"Failed to request vspn3v3 regulator\n");
|
||||
|
||||
md->backlight_pin = of_get_named_gpio_flags(np,
|
||||
"lt8911,backlight-gpio",
|
||||
0, NULL);
|
||||
if (!gpio_is_valid(md->backlight_pin)) {
|
||||
DBG_FUNC("%s: backlight-gpio is invalid\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = devm_gpio_request_one(&dsi->dev,
|
||||
md->backlight_pin,
|
||||
GPIOF_DIR_OUT, NULL);
|
||||
if (ret) {
|
||||
DBG_FUNC("%s: failed to request backlight gpio\n",
|
||||
__func__);
|
||||
return ret;
|
||||
}
|
||||
gpio_set_value(md->backlight_pin, 0);
|
||||
DBG_FUNC("%s: succeed to init backlight gpio\n", __func__);
|
||||
|
||||
md->irq_pin = of_get_named_gpio_flags(np,
|
||||
"lt8911,irq-gpio", 0, NULL);
|
||||
if (!gpio_is_valid(md->irq_pin)) {
|
||||
DBG_FUNC("%s: irq-gpio is invalid\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = devm_gpio_request_one(&dsi->dev,
|
||||
md->irq_pin,
|
||||
GPIOF_DIR_IN, NULL);
|
||||
if (ret) {
|
||||
DBG_FUNC("%s: failed to request irq gpio\n",
|
||||
__func__);
|
||||
return ret;
|
||||
}
|
||||
DBG_FUNC("%s: succeed to init irq gpio\n", __func__);
|
||||
|
||||
ret = of_property_read_u32(np, "lt8911,rst-delay-ms",
|
||||
&md->rst_delay_ms);
|
||||
if (ret < 0) {
|
||||
DBG_FUNC("%s: no rst-delay-ms property in dts\n",
|
||||
__func__);
|
||||
md->rst_delay_ms = 100;
|
||||
}
|
||||
|
||||
md->reset_pin = of_get_named_gpio_flags(np,
|
||||
"lt8911,reset-gpio", 0, NULL);
|
||||
if (!gpio_is_valid(md->reset_pin)) {
|
||||
DBG_FUNC("%s: reset-gpio is invalid\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = devm_gpio_request_one(&dsi->dev,
|
||||
md->reset_pin,
|
||||
GPIOF_DIR_OUT, NULL);
|
||||
if (ret) {
|
||||
DBG_FUNC("%s: failed to request reset gpio\n",
|
||||
__func__);
|
||||
return ret;
|
||||
}
|
||||
gpio_set_value(md->reset_pin, 0);
|
||||
DBG_FUNC("%s: succeed to init reset gpio\n", __func__);
|
||||
|
||||
if (of_property_read_u32(np, "lt8911,edp-lane-cnt",
|
||||
&md->edp_lane_cnt)) {
|
||||
DBG_FUNC("%s: miss edp-lane-cnt property in dts\n",
|
||||
__func__);
|
||||
md->edp_lane_cnt = 2; /* default value */
|
||||
}
|
||||
|
||||
if (of_property_read_u32(np, "lt8911,mipi-lane-cnt",
|
||||
&md->mipi_lane_cnt)) {
|
||||
DBG_FUNC("%s: miss mipi-lane-cnt property in dts\n",
|
||||
__func__);
|
||||
md->mipi_lane_cnt = 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* eDP panel color depth:
|
||||
* 6 bit: 262K colors
|
||||
* 8 bit: 16.7M colors
|
||||
*/
|
||||
if (of_property_read_u32(np, "lt8911,edp-depth",
|
||||
&md->edp_depth)) {
|
||||
DBG_FUNC("%s: miss edp-depth property in dts\n",
|
||||
__func__);
|
||||
md->edp_depth = 8;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct of_device_id i2c_md_of_ids[] = {
|
||||
{
|
||||
.compatible = "i2c,lt8911",
|
||||
},
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, i2c_md_of_ids);
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
|
||||
static int edpi2c_suspend(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int edpi2c_resume(struct device *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops edpi2c_pm_ops = {
|
||||
SET_LATE_SYSTEM_SLEEP_PM_OPS(edpi2c_suspend,
|
||||
edpi2c_resume)
|
||||
};
|
||||
|
||||
#define EDPI2C_PM_OPS &edpi2c_pm_ops
|
||||
|
||||
#else
|
||||
|
||||
#define EDPI2C_PM_OPS NULL
|
||||
|
||||
#endif
|
||||
|
||||
static struct i2c_driver i2c_md_driver = {
|
||||
.driver = {
|
||||
.name = "i2c_mipi_dsi",
|
||||
.pm = EDPI2C_PM_OPS,
|
||||
.of_match_table = i2c_md_of_ids,
|
||||
},
|
||||
.probe = i2c_md_probe,
|
||||
.remove = i2c_md_remove,
|
||||
.shutdown = i2c_md_shutdown,
|
||||
};
|
||||
|
||||
module_i2c_driver(i2c_md_driver);
|
||||
|
||||
static int lt8911_dsi_probe(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
int ret;
|
||||
struct i2c_mipi_dsi *ctx;
|
||||
|
||||
ctx = &g_lt8911_mipi_dsi;
|
||||
|
||||
if(ctx == NULL){
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
if(ctx->client == NULL){
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
g_is_std_suspend = false;
|
||||
|
||||
ctx->dsi = dsi;
|
||||
ctx->desc = <8911_panel_data;
|
||||
ret = lt8911_parse_dt(ctx);
|
||||
if (ret) {
|
||||
DBG_FUNC("%s: failed to parse device tree\n", __func__);
|
||||
return ret;
|
||||
}
|
||||
|
||||
dsi->mode_flags = ctx->desc->mode_flags;
|
||||
dsi->format = ctx->desc->format;
|
||||
dsi->lanes = ctx->desc->lanes;
|
||||
|
||||
mipi_dsi_set_drvdata(dsi, ctx);
|
||||
|
||||
//ctx->panel_data->set_dsi(ctx->dsi);
|
||||
drm_panel_init(&ctx->panel, &dsi->dev, &panel_funcs, DRM_MODE_CONNECTOR_DSI);
|
||||
|
||||
ret = drm_panel_of_backlight(&ctx->panel);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
drm_panel_add(&ctx->panel);
|
||||
|
||||
//backlight_init(ctx);
|
||||
|
||||
if (IS_ENABLED(CONFIG_PM))
|
||||
ctx->pm_notify.notifier_call = lt8911_pm_notify;
|
||||
|
||||
ret = register_pm_notifier(&ctx->pm_notify);
|
||||
if (ret)
|
||||
DBG_FUNC("register_pm_notifier failed: %d\n", ret);
|
||||
|
||||
ret = mipi_dsi_attach(dsi);
|
||||
if (ret < 0)
|
||||
{
|
||||
drm_panel_remove(&ctx->panel);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int lt8911_dsi_remove(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
struct i2c_mipi_dsi *ctx = mipi_dsi_get_drvdata(dsi);
|
||||
|
||||
unregister_pm_notifier(&ctx->pm_notify);
|
||||
|
||||
mipi_dsi_detach(dsi);
|
||||
drm_panel_remove(&ctx->panel);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void lt8911_dsi_shutdown(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static const struct of_device_id lt8911_of_match[] = {
|
||||
{.compatible = "i2c_dsi,lt8911", },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, lt8911_of_match);
|
||||
|
||||
static struct mipi_dsi_driver lt8911_dsi_driver = {
|
||||
.probe = lt8911_dsi_probe,
|
||||
.remove = lt8911_dsi_remove,
|
||||
.shutdown = lt8911_dsi_shutdown,
|
||||
.driver = {
|
||||
.name = "panel-lt8911",
|
||||
.of_match_table = lt8911_of_match,
|
||||
},
|
||||
};
|
||||
module_mipi_dsi_driver(lt8911_dsi_driver);
|
||||
|
||||
MODULE_DESCRIPTION("LT8911 Controller Driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
@@ -1,89 +0,0 @@
|
||||
#ifndef __MIPI_DSI_H__
|
||||
#define __MIPI_DSI_H__
|
||||
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/string.h>
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_graph.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
#include <drm/drm_crtc.h>
|
||||
#include <drm/drm_device.h>
|
||||
#include <drm/drm_mipi_dsi.h>
|
||||
#include <drm/drm_panel.h>
|
||||
#include <drm/drm_modes.h>
|
||||
|
||||
#include <video/mipi_display.h>
|
||||
|
||||
|
||||
#if 0
|
||||
#define DBG_FUNC(format, x...) printk(KERN_ERR "[DSI]%s:" format"\n", __func__, ##x)
|
||||
#define DBG_PRINT(format, x...) printk(KERN_ERR "[DSI]" format"\n", ##x)
|
||||
#else
|
||||
#define DBG_FUNC(format, x...)
|
||||
#define DBG_PRINT(format, x...)
|
||||
#endif
|
||||
|
||||
#define DSI_DRIVER_NAME "i2c_mipi_dsi"
|
||||
|
||||
#define DSI_DCS_WRITE(dsi, seq...) \
|
||||
{ \
|
||||
int ret = 0; \
|
||||
const u8 d[] = { seq }; \
|
||||
ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
|
||||
if (ret < 0) \
|
||||
return ret; \
|
||||
}
|
||||
|
||||
struct panel_data {
|
||||
struct drm_display_mode *display_mode;
|
||||
unsigned long mode_flags;
|
||||
enum mipi_dsi_pixel_format format;
|
||||
unsigned int lanes;
|
||||
};
|
||||
|
||||
struct i2c_mipi_dsi {
|
||||
struct i2c_client *client;
|
||||
struct mutex mutex;
|
||||
|
||||
struct regulator *hsvcc;
|
||||
struct regulator *vspn3v3;
|
||||
|
||||
struct notifier_block pm_notify;
|
||||
|
||||
// panel
|
||||
struct drm_panel panel;
|
||||
struct panel_data *desc;
|
||||
|
||||
// dsi
|
||||
struct mipi_dsi_device *dsi;
|
||||
|
||||
int backlight_pin;
|
||||
int irq_pin;
|
||||
int reset_pin;
|
||||
int enable_pin;
|
||||
int rst_delay_ms;
|
||||
|
||||
u32 edp_lane_cnt;
|
||||
u32 mipi_lane_cnt;
|
||||
u32 edp_depth;
|
||||
|
||||
// backlight
|
||||
int brightness;
|
||||
};
|
||||
|
||||
#define panel_to_md(_p) container_of(_p, struct i2c_mipi_dsi, panel)
|
||||
|
||||
#endif /*End of header guard macro */
|
||||
@@ -49,7 +49,6 @@ struct panel_minjun_info {
|
||||
struct regulator *hsvcc;
|
||||
struct regulator *vspn3v3;
|
||||
|
||||
enum drm_panel_orientation orientation;
|
||||
bool prepared;
|
||||
bool enabled;
|
||||
};
|
||||
@@ -214,7 +213,6 @@ static int mingjun_get_modes(struct drm_panel *panel,
|
||||
|
||||
connector->display_info.width_mm = mode->width_mm;
|
||||
connector->display_info.height_mm = mode->height_mm;
|
||||
drm_connector_set_panel_orientation(connector, pinfo->orientation);
|
||||
|
||||
return 1;
|
||||
}
|
||||
@@ -527,10 +525,6 @@ static int mj070bi30ia2_panel_add(struct panel_minjun_info *pinfo)
|
||||
|
||||
drm_panel_init(&pinfo->base, dev, &panel_funcs,
|
||||
DRM_MODE_CONNECTOR_DSI);
|
||||
ret = of_drm_get_panel_orientation(dev->of_node, &pinfo->orientation);
|
||||
if (ret < 0) {
|
||||
dev_warn(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
|
||||
}
|
||||
|
||||
ret = drm_panel_of_backlight(&pinfo->base);
|
||||
if (ret)
|
||||
|
||||
@@ -158,7 +158,7 @@ static int dw_hdmi_light_probe(struct platform_device *pdev)
|
||||
|
||||
static int dw_hdmi_light_remove(struct platform_device *pdev)
|
||||
{
|
||||
component_del(&pdev->dev, &dw_hdmi_light_ops);
|
||||
component_del(&pdev->dev, &dw_hdmi_light_ops);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -181,10 +181,10 @@ static int hdmi_runtime_resume(struct device *dev)
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int hdmi_resume(struct device *dev)
|
||||
{
|
||||
struct light_hdmi *hdmi = dev_get_drvdata(dev);
|
||||
dev_info(dev,"hdmi resume\n");
|
||||
dw_hdmi_resume(hdmi->dw_hdmi);
|
||||
return 0;
|
||||
struct light_hdmi *hdmi = dev_get_drvdata(dev);
|
||||
dev_info(dev,"hdmi resume\n");
|
||||
dw_hdmi_resume(hdmi->dw_hdmi);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
static const struct dev_pm_ops dw_hdmi_pm_ops = {
|
||||
|
||||
@@ -29,8 +29,6 @@ static void vs_crtc_reset(struct drm_crtc *crtc)
|
||||
{
|
||||
struct vs_crtc_state *state;
|
||||
|
||||
vs_crtc_reset_count ++;
|
||||
|
||||
if (crtc->state) {
|
||||
__drm_atomic_helper_crtc_destroy_state(crtc->state);
|
||||
|
||||
|
||||
@@ -11,8 +11,6 @@
|
||||
|
||||
#include "vs_type.h"
|
||||
|
||||
extern int vs_crtc_reset_count;
|
||||
|
||||
struct vs_crtc_funcs {
|
||||
void (*enable)(struct device *dev, struct drm_crtc *crtc);
|
||||
void (*disable)(struct device *dev, struct drm_crtc *crtc);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user