use register satp instead of sptbr

the register was renamed
remove regulator_enable from dwc3 suspend & resume for rvbook
2026-06-21 17:22:24 +02:00 · 2025-02-03 09:40:30 +08:00 · 2024-07-21 00:17:45 +08:00 · 2024-07-21 00:17:45 +08:00 · 2024-07-21 00:17:45 +08:00 · 2024-07-21 00:17:45 +08:00
284 changed files with 10324 additions and 6362 deletions
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -326,6 +326,14 @@ config SMP

 	  If you don't know what to do here, say N.

+config SCHED_MC
+	bool "Multi-core scheduler support"
+	depends on SMP
+	help
+	  Multi-core scheduler support improves the CPU scheduler's decision
+	  making when dealing with multi-core CPU chips at a cost of slightly
+	  increased overhead in some places. If unsure say N here.
+
 config NR_CPUS
 	int "Maximum number of CPUs (2-32)"
 	range 2 32
--- a/arch/riscv/boot/dts/thead/Makefile
+++ b/arch/riscv/boot/dts/thead/Makefile
@@ -15,20 +15,18 @@ dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val.dtb th1520-a-val-sec.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-crash.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-i2s-8ch.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-tdm.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-spdif.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-dsi1.dtb
+dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-audio.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-sv.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-ddr2G.dtb th1520-a-val-ddr1G.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-npu-fce.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-iso7816.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-nand.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-dsi0.dtb th1520-a-val-dsi1.dtb th1520-a-val-hdmi.dtb th1520-a-val-dsi0-hdmi-audio.dtb th1520-a-val-dpi0.dtb th1520-a-val-dpi0-dpi1.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-wcn.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-gpio-keys.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-khv.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-miniapp-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_PRD) += th1520-a-product.dtb
@@ -58,10 +56,12 @@ dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu-soc-base-sec.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-beagle.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-16gb.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-laptop.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-pocket.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-console.dtb th1520-lpi4a-console-16g.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-plastic.dtb th1520-lpi4a-plastic-16g.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-cluster.dtb th1520-lpi4a-cluster-16gb.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-z14inch-m0.dtb th1520-lpi4a-z14inch-m0-16g.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-milkv-meles.dtb th1520-milkv-meles-4g.dtb th1520-milkv-meles-dsi0.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-milkv-meles.dtb th1520-milkv-meles-4g.dtb th1520-milkv-meles-16g.dtb th1520-milkv-meles-dsi0.dtb

 # compat old name
 dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-16gb.dtb
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio-i2s-8ch.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio-i2s-8ch.dts
@@ -3,75 +3,23 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

-#include "th1520-a-val-audio.dts"
+#include "th1520-a-val.dtsi"

 / {
 	model = "T-HEAD Light FM Audio VAL board";
 	compatible = "thead,light-val-audio-i2s-8ch", "thead,light";
 };

+&lightsound_i2s_8ch {
+	status = "okay";
+};

-&lightsound {
+&i2s0 {
        status = "okay";
-
-	simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
-                reg = <1>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s_8ch_sd2>;
-                };
-                codec {
-                        mclk-fs = <512>;
-                        sound-dai = <&es7210_audio_codec_adc0>;
-                };
-        };
-
-	simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 7210*/
-                reg = <2>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s_8ch_sd3>;
-                };
-                codec {
-                        mclk-fs = <512>;
-                        sound-dai = <&es7210_audio_codec_adc0>;
-                };
-        };
-
-        simple-audio-card,dai-link@3 {          /* I2S - AUDIO SYS CODEC 7210_1*/
-                reg = <3>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s_8ch_sd0>;
-                };
-                codec {
-                        mclk-fs = <512>;
-                        sound-dai = <&es7210_audio_codec_adc1>;
-                };
-        };
-
-        simple-audio-card,dai-link@4 {          /* I2S - AUDIO SYS CODEC 7210_1*/
-                reg = <4>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s_8ch_sd1>;
-                };
-                codec {
-                        mclk-fs = <512>;
-                        sound-dai = <&es7210_audio_codec_adc1>;
-                };
-        };
 };

 &i2s_8ch_sd0 {
        status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_audiopa4>,
-                    <&pinctrl_audio_i2s_8ch_sd0>,
-                    <&pinctrl_audiopa2>,
-                    <&pinctrl_audiopa3>,
-                    <&pinctrl_audiopa8>,
-                    <&pinctrl_audio_i2s_8ch_bus>;
 };

 &i2s_8ch_sd1 {
@@ -80,15 +28,16 @@

 &i2s_8ch_sd2 {
        status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_audiopa0>,
-                    <&pinctrl_audio_i2s_8ch_sd2>;
 };

 &i2s_8ch_sd3 {
        status = "okay";
 };

+&es8156_audio_codec {
+		status = "okay";
+};
+
 &es7210_audio_codec_adc0 {
        status = "okay";
        channels-max = <8>;
@@ -98,3 +47,7 @@
        status = "okay";
        channels-max = <8>;
 };
+
+&audio_aw87519_pa {
+        status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio-spdif.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio-spdif.dts
@@ -6,37 +6,13 @@
 #include "th1520-a-val.dtsi"

 &spdif0 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_audio_spdif0>;
-	status = "okay";
+		status = "okay";
 };

 &spdif1 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_audio_spdif1>;
-	status = "okay";
+		status = "okay";
 };

-&lightsound {
-        status = "okay";
-        simple-audio-card,dai-link@0 {          /* SPDIF0 */
-                reg = <1>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&spdif0>;
-                };
-                codec {
-                        sound-dai = <&dummy_codec>;
-                };
-        };
-        simple-audio-card,dai-link@1 {          /* SPDIF1 */
-                reg = <1>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&spdif1>;
-                };
-                codec {
-                        sound-dai = <&dummy_codec>;
-                };
-        };
+&lightsound_spdif {
+		status = "okay";
 };
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio-tdm.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio-tdm.dts
@@ -6,8 +6,6 @@
 #include "th1520-a-val.dtsi"

 &tdm_slot1 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_audio_tdm>;
 	status = "okay";
 };

@@ -39,144 +37,26 @@
 	status = "okay";
 };

-&audio_i2c0 {
-        clock-frequency = <100000>;
-        status = "okay";
-
-        es7210_adc2: es7210@42 {
-                #sound-dai-cells = <0>;
-                compatible = "MicArray_0";
-                reg = <0x42>;
-                work-mode = "ES7210_TDM_1LRCK_DSPB";
-                channels-max = <8>;
-                sound-name-prefix = "ES7210_ADC2";
-                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                DVDD-supply = <&soc_dvdd18_aon_reg>;
-                PVDD-supply = <&soc_dvdd18_aon_reg>;
-        };
-
-        es7210_adc3: es7210@43 {
-                #sound-dai-cells = <0>;
-                compatible = "MicArray_1";
-                reg = <0x43>;
-                work-mode = "ES7210_TDM_1LRCK_DSPB";
-                channels-max = <8>;
-                sound-name-prefix = "ES7210_ADC3";
-                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                DVDD-supply = <&soc_dvdd18_aon_reg>;
-                PVDD-supply = <&soc_dvdd18_aon_reg>;
-        };
+&es8156_audio_codec {
+		status = "okay";
 };

-&lightsound {
-        status = "okay";
-        simple-audio-card,widgets = "Speaker", "Speaker";
-        simple-audio-card,routing = 
-        	"AW87519 IN", "ES8156 ROUT",
-        	"Speaker", "AW87519 VO";
-        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
-        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
-                reg = <0>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s0 0>;
-                };
-                codec {
-                        sound-dai = <&es8156_audio_codec>;
-                };
-        };
+&es7210_adc2 {
+	status = "okay";
+};

-        simple-audio-card,dai-link@1 {          /* TDM - AUDIO SYS CODEC 7210*/
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot1>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
+&es7210_adc3 {
+	status = "okay";
+};

-        simple-audio-card,dai-link@2 {
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot2>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
-
-        simple-audio-card,dai-link@3 {
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot3>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
-
-        simple-audio-card,dai-link@4 {
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot4>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
-
-        simple-audio-card,dai-link@5 {
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot5>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
-
-        simple-audio-card,dai-link@6 {
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot6>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
-
-        simple-audio-card,dai-link@7 {
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot7>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
-
-        simple-audio-card,dai-link@8 {
-                reg = <1>;
-                format = "dsp_b";
-                cpu {
-                        sound-dai = <&tdm_slot8>;
-                };
-                codec {
-                        sound-dai = <&es7210_adc2>;
-                };
-        };
+&lightsound_tdm {
+	status = "okay";
 };

 &i2s0 {
+	status = "okay";
+};
+
+&audio_aw87519_pa {
        status = "okay";
 };
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio.dts
@@ -1,55 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2021 Alibaba Group Holding Limited.
- */
-
-#include "th1520-a-val.dtsi"
-
-/ {
-	model = "T-HEAD Light FM Audio VAL board";
-	compatible = "thead,light-val-audio", "thead,light";
-};
-
-&lightsound {
-        status = "okay";
-        simple-audio-card,widgets = "Speaker", "Speaker";
-        simple-audio-card,routing = 
-        	"Speaker", "AW87519 VO",
-        	"AW87519 IN", "ES8156 ROUT";
-        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
-        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
-                reg = <0>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s0 0>;
-                };
-                codec {
-                        sound-dai = <&es8156_audio_codec>;
-                };
-        };
-
-        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
-                reg = <1>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s_8ch_sd2 2>;
-                };
-                codec {
-                        sound-dai = <&es7210_audio_codec_adc0>;
-                };
-        };
-};
-
-&i2s0 {
-        status = "okay";
-};
-
-&i2s_8ch_sd2 {
-        status = "okay";
-};
-
-&es7210_audio_codec_adc0 {
-        status = "okay";
-};
-
-
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio.dtsi
@@ -0,0 +1,334 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/ {
+	lightsound: lightsound@1 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		simple-audio-card,widgets = "Speaker", "Speaker";
+		simple-audio-card,routing =
+			"Speaker", "AW87519 VO",
+			"AW87519 IN", "ES8156 ROUT";
+		simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+		simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+				reg = <0>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s0 0>;
+				};
+				codec {
+						sound-dai = <&es8156_audio_codec>;
+				};
+		};
+
+		simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+				reg = <1>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s_8ch_sd2 2>;
+				};
+				codec {
+						sound-dai = <&es7210_audio_codec_adc0>;
+				};
+		};
+	};
+
+	lightsound_spdif: lightsound@2 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		simple-audio-card,dai-link@0 {          /* SPDIF0 */
+				reg = <1>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&spdif0>;
+				};
+				codec {
+						sound-dai = <&dummy_codec>;
+				};
+		};
+		simple-audio-card,dai-link@1 {          /* SPDIF1 */
+				reg = <1>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&spdif1>;
+				};
+				codec {
+						sound-dai = <&dummy_codec>;
+				};
+		};
+	};
+
+	lightsound_tdm: lightsound@3 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		simple-audio-card,widgets = "Speaker", "Speaker";
+		simple-audio-card,routing =
+			"Speaker", "AW87519 VO",
+			"AW87519 IN", "ES8156 ROUT";
+		simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+		simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+				reg = <0>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s0 0>;
+				};
+				codec {
+						sound-dai = <&es8156_audio_codec>;
+				};
+		};
+
+		simple-audio-card,dai-link@1 {          /* TDM - AUDIO SYS CODEC 7210*/
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot1>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+
+		simple-audio-card,dai-link@2 {
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot2>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+
+		simple-audio-card,dai-link@3 {
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot3>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+
+		simple-audio-card,dai-link@4 {
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot4>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+
+		simple-audio-card,dai-link@5 {
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot5>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+
+		simple-audio-card,dai-link@6 {
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot6>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+
+		simple-audio-card,dai-link@7 {
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot7>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+
+		simple-audio-card,dai-link@8 {
+				reg = <1>;
+				format = "dsp_b";
+				cpu {
+						sound-dai = <&tdm_slot8>;
+				};
+				codec {
+						sound-dai = <&es7210_adc2>;
+				};
+		};
+	};
+
+	lightsound_i2s_8ch: lightsound@4 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		simple-audio-card,widgets = "Speaker", "Speaker";
+		simple-audio-card,routing =
+			"Speaker", "AW87519 VO",
+			"AW87519 IN", "ES8156 ROUT";
+		simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+		simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+				reg = <0>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s0 0>;
+				};
+				codec {
+						sound-dai = <&es8156_audio_codec>;
+				};
+		};
+
+		simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+				reg = <1>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s_8ch_sd2>;
+				};
+				codec {
+						mclk-fs = <512>;
+						sound-dai = <&es7210_audio_codec_adc0>;
+				};
+		};
+
+		simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 7210*/
+				reg = <2>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s_8ch_sd3>;
+				};
+				codec {
+						mclk-fs = <512>;
+						sound-dai = <&es7210_audio_codec_adc0>;
+				};
+		};
+
+		simple-audio-card,dai-link@3 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+				reg = <3>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s_8ch_sd0>;
+				};
+				codec {
+						mclk-fs = <512>;
+						sound-dai = <&es7210_audio_codec_adc1>;
+				};
+		};
+
+		simple-audio-card,dai-link@4 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+				reg = <4>;
+				format = "i2s";
+				cpu {
+						sound-dai = <&i2s_8ch_sd1>;
+				};
+				codec {
+						mclk-fs = <512>;
+						sound-dai = <&es7210_audio_codec_adc1>;
+				};
+		};
+	};
+};
+
+&audio_i2c0 {
+		es8156_audio_codec: es8156@8 {
+			#sound-dai-cells = <0>;
+			compatible = "everest,es8156";
+			reg = <0x08>;
+			sound-name-prefix = "ES8156";
+			AVDD-supply = <&soc_aud_dac_3v3_en_reg>;
+			DVDD-supply = <&soc_dvdd18_aon_reg>;
+			PVDD-supply = <&soc_dvdd18_aon_reg>;
+			mclk-sclk-ratio = <4>;
+			status = "disabled";
+		};
+
+		es7210_audio_codec_adc0: es7210@40 {
+			#sound-dai-cells = <0>;
+			compatible = "MicArray_0";
+			reg = <0x40>;
+			work-mode = "ES7210_NORMAL_I2S";
+			channels-max = <2>;
+			mclk-sclk-ratio = <4>;
+			sound-name-prefix = "ES7210_ADC0";
+			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			DVDD-supply = <&soc_dvdd18_aon_reg>;
+			PVDD-supply = <&soc_dvdd18_aon_reg>;
+			status = "disabled";
+		};
+
+		es7210_audio_codec_adc1: es7210@41 {
+			#sound-dai-cells = <0>;
+			compatible = "MicArray_1";
+			reg = <0x41>;
+			work-mode = "ES7210_NORMAL_I2S";
+			channels-max = <2>;
+			mclk-sclk-ratio = <4>;
+			sound-name-prefix = "ES7210_ADC1";
+			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			DVDD-supply = <&soc_dvdd18_aon_reg>;
+			PVDD-supply = <&soc_dvdd18_aon_reg>;
+			status = "disabled";
+		};
+
+		es7210_adc2: es7210@42 {
+			#sound-dai-cells = <0>;
+			compatible = "MicArray_0";
+			reg = <0x42>;
+			work-mode = "ES7210_TDM_1LRCK_DSPB";
+			channels-max = <8>;
+			sound-name-prefix = "ES7210_ADC2";
+			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			DVDD-supply = <&soc_dvdd18_aon_reg>;
+			PVDD-supply = <&soc_dvdd18_aon_reg>;
+			status = "disabled";
+		};
+
+		es7210_adc3: es7210@43 {
+			#sound-dai-cells = <0>;
+			compatible = "MicArray_1";
+			reg = <0x43>;
+			work-mode = "ES7210_TDM_1LRCK_DSPB";
+			channels-max = <8>;
+			sound-name-prefix = "ES7210_ADC3";
+			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+			DVDD-supply = <&soc_dvdd18_aon_reg>;
+			PVDD-supply = <&soc_dvdd18_aon_reg>;
+			status = "disabled";
+		};
+
+		audio_aw87519_pa: amp@58 {
+			compatible = "awinic,aw87519_pa";
+			reg = <0x58>;
+			reset-gpio = <&pcal6408ahk_b 3 0x1>;
+			sound-name-prefix = "AW87519";
+			status = "disabled";
+		};
+};
--- a/arch/riscv/boot/dts/thead/th1520-a-val-crash.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-crash.dts
@@ -5,6 +5,16 @@

 #include "th1520-crash.dtsi"

+/ {
+	model = "T-HEAD Light val board";
+	compatible = "thead,light-val", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0xffe00000>;
+	};
+};
+
 &aon {
 	aon_reg_dialog: light-dialog-reg {
 		compatible = "thead,light-dialog-pmic";
--- a/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-dsi1.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-dsi1.dts
@@ -5,60 +5,54 @@

 /dts-v1/;

-#include "th1520-a-val-dsi0.dts"
+#include "th1520-a-val.dtsi"
+
+&i2c0 {
+	touch@5d {
+		compatible = "goodix,gt911";
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <1280>;
+		status = "okay";
+	};
+};
+
+&i2c1 {
+	touch1@5d {
+		compatible = "goodix,gt911";
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <1280>;
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+	status = "okay";
+};

 &dpu_enc1 {
 	status = "okay";
+};

-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc1_out: endpoint {
-				remote-endpoint = <&dsi1_in>;
-			};
-		};
-	};
+&dsi0 {
+        status = "okay";
 };

 &dsi1 {
        status = "okay";
 };

-&dhost_1 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
+&dhost_0 {
+	status = "okay";

-		port@0 {
-			reg = <0>;
-
-			dsi1_in: endpoint {
-				remote-endpoint = <&enc1_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi1_out: endpoint {
-				remote-endpoint = <&panel1_in>;
-			};
-		};
+	panel0@0 {
+		compatible = "txd,dy800qwxpab";
 	};
+};
+
+&dhost_1 {
+	status = "okay";

 	panel1@0 {
 		compatible = "txd,dy800qwxpab";
-		reg = <0>;
-		reset-gpio = <&gpio1_porta 9 1>;		/* active low */
-		vdd1v8-supply = <&lcd1_1v8>;
-		vspn5v7-supply = <&lcd1_5v7>;
-
-		port {
-			panel1_in: endpoint {
-				remote-endpoint = <&dsi1_out>;
-			};
-		};
 	};
 };
--- a/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-hdmi.dts
@@ -5,7 +5,20 @@

 /dts-v1/;

-#include "th1520-a-val-dsi0.dts"
+#include "th1520-a-val.dtsi"
+
+&i2c0 {
+	touch@5d {
+		compatible = "goodix,gt911";
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <1280>;
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+	status = "okay";
+};

 &dpu_enc1 {
        ports {
@@ -19,11 +32,16 @@

 &hdmi_tx {
 	status = "okay";
+};

-	port@0 {
-		/* input */
-		hdmi_tx_in: endpoint {
-			remote-endpoint = <&disp1_out>;
-		};
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+	status = "okay";
+
+	panel0@0 {
+		compatible = "txd,dy800qwxpab";
 	};
 };
--- a/arch/riscv/boot/dts/thead/th1520-a-val-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-dsi0.dts
@@ -1,75 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2021 Alibaba Group Holding Limited.
- */
-
-/dts-v1/;
-
-#include "th1520-a-val.dtsi"
-
-/ {
-	display-subsystem {
-		status = "okay";
-	};
-};
-
-&dpu_enc0 {
-	status = "okay";
-
-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc0_out: endpoint {
-				remote-endpoint = <&dsi0_in>;
-			};
-		};
-	};
-};
-
-&dpu {
-        status = "okay";
-};
-
-&dsi0 {
-        status = "okay";
-};
-
-&dhost_0 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi0_in: endpoint {
-				remote-endpoint = <&enc0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi0_out: endpoint {
-				remote-endpoint = <&panel0_in>;
-			};
-		};
-	};
-
-	panel0@0 {
-		compatible = "txd,dy800qwxpab";
-		reg = <0>;
-		backlight = <&lcd0_backlight>;
-		reset-gpio = <&gpio1_porta 5 1>; /* active low */
-		vdd1v8-supply = <&lcd0_1v8>;
-		vspn5v7-supply = <&lcd0_5v7>;
-
-		port {
-			panel0_in: endpoint {
-				remote-endpoint = <&dsi0_out>;
-			};
-		};
-	};
-};
--- a/arch/riscv/boot/dts/thead/th1520-a-val.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val.dts
@@ -5,13 +5,7 @@

 /dts-v1/;

-#include "th1520-a-val-audio.dts"
-
-/ {
-	display-subsystem {
-		status = "okay";
-	};
-};
+#include "th1520-a-val.dtsi"

 &dpu_enc1 {
 	ports {
@@ -23,24 +17,13 @@
 	remote-endpoint = <&hdmi_tx_in>;
 };

-&dpu {
-	status = "okay";
-};
-
 &hdmi_tx {
 	status = "okay";
-
-	port@0 {
-		/* input */
-		hdmi_tx_in: endpoint {
-			remote-endpoint = <&disp1_out>;
-		};
-	};
 };

 &lightsound {
 	status = "okay";
-	
+
 	simple-audio-card,dai-link@2 {          /* I2S - HDMI */
 		reg = <2>;
 		format = "i2s";
@@ -56,3 +39,23 @@
 &light_i2s {
        status = "okay";
 };
+
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es8156_audio_codec {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
+
+&audio_aw87519_pa {
+        status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/th1520-a-val.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-a-val.dtsi
@@ -9,11 +9,17 @@
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "th1520-vi-devices.dtsi"
+#include "th1520-a-val-audio.dtsi"

 / {
 	model = "T-HEAD Light val board";
 	compatible = "thead,light-val", "thead,light";

+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0xffe00000>;
+	};
+
 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
 		stdout-path = "serial0";
@@ -29,6 +35,10 @@
 		};
 	};

+	display-subsystem {
+		status = "okay";
+	};
+
 	lcd0_backlight: pwm-backlight@0 {
 		compatible = "pwm-backlight";
 		pwms = <&pwm 0 5000000>;
@@ -48,10 +58,8 @@

 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
-			regions = <0x000000 0x100000>,
-				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			dummy_slave= <0x800000>;
+			is_default_region;
 		};

 		/* config#2: iopmp bypass */
@@ -191,16 +199,6 @@
 		status = "okay";
 	};

-	lightsound: lightsound@1 {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "Light-Sound-Card";
-
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		status = "disabled";
-	};
-
 	light_rpmsg: light_rpmsg {
 		compatible = "light,rpmsg-bus", "simple-bus";
 		memory-region = <&rpmsgmem>;
@@ -211,6 +209,7 @@
 			vdev-nums = <1>;
            reg = <0x0 0x1E000000 0 0x10000>;
 			compatible = "light,light-rpmsg";
+			log-memory-region = <&audio_log_mem>;
 			status = "okay";
 		};
 	};
@@ -223,32 +222,32 @@
 	};

 	reg_vref_1v8: regulator-adc-verf {
-			compatible = "regulator-fixed";
-			regulator-name = "vref-1v8";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-	status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "vref-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		status = "okay";
 	};

-		reg_tp_pwr_en: regulator-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "PWR_EN";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&pcal6408ahk_a 3 1>;
-                enable-active-high;
-                regulator-always-on;
-        };
+	reg_tp_pwr_en: regulator-pwr-en {
+		compatible = "regulator-fixed";
+		regulator-name = "PWR_EN";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		gpio = <&pcal6408ahk_a 3 1>;
+		enable-active-high;
+		regulator-always-on;
+	};

-        reg_tp1_pwr_en: regulator-tp1-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "PWR_EN";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&pcal6408ahk_a 6 1>;
-                enable-active-high;
-                regulator-always-on;
-        };
+	reg_tp1_pwr_en: regulator-tp1-pwr-en {
+		compatible = "regulator-fixed";
+		regulator-name = "PWR_EN";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		gpio = <&pcal6408ahk_a 6 1>;
+		enable-active-high;
+		regulator-always-on;
+	};

 	lcd0_1v8: regulator-lcd0-vdd18 {
 		compatible = "regulator-fixed";
@@ -348,6 +347,7 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
+		log-memory-region = <&aon_log_mem>;
 		status = "okay";

 		pd: light-aon-pd {
@@ -356,164 +356,212 @@
 		};

 		aon_reg_dialog: light-dialog-reg {
-			compatible = "thead,light-dialog-pmic";
 			status = "okay";
-
+	    };
 			dvdd_cpu_reg: appcpu_dvdd {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvdd";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
+				regulator-type = "dvdd";
 				regulator-boot-on;
 				regulator-always-on;
+				status = "okay";
 			};

 			dvddm_cpu_reg: appcpu_dvddm {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvddm";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
+				regulator-type = "dvddm";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd18_aon_reg: soc_dvdd18_aon {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_aon";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd33_usb3";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
-
+			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_avdd28_scan_en";
+				regulator-type = "gpio";
+			};
 			soc_dvdd08_aon_reg: soc_dvdd08_aon {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_aon";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ddr";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v8";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v1";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_0v6";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd18_ap_reg: soc_dvdd18_ap {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_ap";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_ap_reg: soc_dvdd08_ap {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ap";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd08_mipi_hdmi";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd18_mipi_hdmi";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd33_emmc_reg: soc_vdd33_emmc {
-				regulator-name = "soc_vdd33_emmc";
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_dvdd33_emmc";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd18_emmc_reg: soc_vdd18_emmc {
-				regulator-name = "soc_vdd18_emmc";
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_dvdd18_emmc";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dovdd18_scan_reg: soc_dovdd18_scan {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_scan";
+				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};
 			soc_vext_2v8_reg: soc_vext_2v8 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vext_2v8";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd12_scan_reg: soc_dvdd12_scan {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_scan";
+				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};
-			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
-				regulator-name = "soc_avdd28_scan_en";
-			};
+
 			soc_avdd28_rgb_reg: soc_avdd28_rgb {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd28_rgb";
+				regulator-type = "common";
 				regulator-min-microvolt = <2200000>;
 				regulator-max-microvolt = <3475000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_rgb";
+				regulator-type = "common";
 				regulator-min-microvolt = <1200000>;
 				regulator-max-microvolt = <3600000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_rgb";
+				regulator-type = "common";
 				regulator-min-microvolt = <400000>;
 				regulator-max-microvolt = <1675000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_avdd25_ir_reg: soc_avdd25_ir {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd25_ir";
+				regulator-type = "common";
 				regulator-min-microvolt = <2200000>;
 				regulator-max-microvolt = <3475000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dovdd18_ir_reg: soc_dovdd18_ir {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_ir";
+				regulator-type = "common";
 				regulator-min-microvolt = <1200000>;
 				regulator-max-microvolt = <3600000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd12_ir_reg: soc_dvdd12_ir {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_ir";
+				regulator-type = "common";
 				regulator-min-microvolt = <400000>;
 				regulator-max-microvolt = <1675000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};

-		};
-
 		c910_cpufreq {
 			compatible = "thead,light-mpw-cpufreq";
 			status = "okay";
@@ -525,6 +573,11 @@
 	};
 };

+&aon_suspend_ctrl {
+	audio-text-memory-region = <&audio_text_mem>;
+	status = "okay";
+};
+
 &cmamem {
 	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
 };
@@ -562,10 +615,24 @@
 		reg = <0x0 0x22000000 0x0 0x10000000>;
 		//no-map;
 	};
-    audio_mem: memory@32000000 {
-		reg = <0x0 0x32000000 0x0 0x6400000>;
+    audio_text_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0xE00000>;
 		//no-map;
    };
+    audio_data_mem: memory@32E00000 {
+		reg = <0x0 0x32E00000 0x0 0x600000>;
+		//no-map;
+    };
+	audio_log_mem: memory@33400000 {
+        reg = <0x0 0x33400000 0x0 0x200000>;
+	};
+	aon_log_mem: memory@33600000 {
+        reg = <0x0 0x33600000 0x0 0x200000>;
+	};
+	regdump_mem: memory@38400000 {
+		reg = <0x0 0x38400000 0x0 0x1E00000>;
+		no-map;
+	};
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
 		//no-map;
@@ -588,76 +655,25 @@
 		pagesize = <32>;
 	};

-       touch@5d {
-               #gpio-cells = <2>;
-               compatible = "goodix,gt911";
-               reg = <0x5d>;
-               interrupt-parent = <&gpio1_porta>;
-               interrupts = <8 0>;
-               irq-gpios = <&gpio1_porta 8 0>;
-               reset-gpios = <&gpio1_porta 7 0>;
-               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <800>;
-               touchscreen-size-y = <1280>;
-       };
+	touch@5d {
+			#gpio-cells = <2>;
+			reg = <0x5d>;
+			interrupt-parent = <&gpio1_porta>;
+			interrupts = <8 0>;
+			irq-gpios = <&gpio1_porta 8 0>;
+			reset-gpios = <&gpio1_porta 7 0>;
+			AVDD28-supply = <&reg_tp_pwr_en>;
+			status = "disbale";
+	};
 };

 &audio_i2c0 {
-        clock-frequency = <100000>;
-        status = "okay";
+		clock-frequency = <100000>;
+		status = "okay";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_audiopa6>,
 					<&pinctrl_audiopa7>,
 					<&pinctrl_audio_i2c0>;
-
-        es8156_audio_codec: es8156@8 {
-                #sound-dai-cells = <0>;
-                compatible = "everest,es8156";
-                reg = <0x08>;
-                sound-name-prefix = "ES8156";
-                AVDD-supply = <&soc_aud_dac_3v3_en_reg>;
-                DVDD-supply = <&soc_dvdd18_aon_reg>;
-                PVDD-supply = <&soc_dvdd18_aon_reg>;
-				mclk-sclk-ratio = <4>;
-        };
-
-        es7210_audio_codec_adc0: es7210@40 {
-                #sound-dai-cells = <0>;
-                compatible = "MicArray_0";
-                reg = <0x40>;
-                status = "disabled";
-                work-mode = "ES7210_NORMAL_I2S";
-                channels-max = <2>;
-                mclk-sclk-ratio = <4>;
-                sound-name-prefix = "ES7210_ADC0";
-                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                DVDD-supply = <&soc_dvdd18_aon_reg>;
-                PVDD-supply = <&soc_dvdd18_aon_reg>;
-        };
-
-        es7210_audio_codec_adc1: es7210@41 {
-                #sound-dai-cells = <0>;
-                compatible = "MicArray_1";
-                reg = <0x41>;
-                status = "disabled";
-                work-mode = "ES7210_NORMAL_I2S";
-                channels-max = <2>;
-                mclk-sclk-ratio = <4>;
-                sound-name-prefix = "ES7210_ADC1";
-                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-                DVDD-supply = <&soc_dvdd18_aon_reg>;
-                PVDD-supply = <&soc_dvdd18_aon_reg>;
-        };
-
-        audio_aw87519_pa: amp@58 {
-                compatible = "awinic,aw87519_pa";
-                reg = <0x58>;
-                reset-gpio = <&pcal6408ahk_b 3 0x1>;
-                sound-name-prefix = "AW87519";
-                status = "okay";
-        };
 };

 &audio_i2c1 {
@@ -683,15 +699,13 @@
 		pinctrl-0 = <&pinctrl_i2c1>;
        touch1@5d {
                #gpio-cells = <2>;
-                compatible = "goodix,gt911";
                reg = <0x5d>;
                interrupt-parent = <&gpio1_porta>;
                interrupts = <12 0>;
                irq-gpios = <&gpio1_porta 12 0>;
                reset-gpios = <&gpio1_porta 11 0>;
                AVDD28-supply = <&reg_tp1_pwr_en>;
-                touchscreen-size-x = <800>;
-                touchscreen-size-y = <1280>;
+				status = "disbale";
        };
 };

@@ -699,6 +713,9 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spi0>;
+	status = "okay";

 	spi_norflash@0 {
 		status = "okay";
@@ -774,6 +791,8 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
 	rx-sample-dly = <5>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi1>;
 	status = "okay";

 	spi-flash@0 {
@@ -1324,6 +1343,112 @@
    memory-region = <&dsp1_mem>;
 };

+&dpu {
+        status = "okay";
+};
+
+&dpu_enc0 {
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu_enc1 {
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc1_out: endpoint {
+				remote-endpoint = <&dsi1_in>;
+			};
+		};
+	};
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&gpio1_porta 5 1>; /* active low */
+		vdd1v8-supply = <&lcd0_1v8>;
+		vspn5v7-supply = <&lcd0_5v7>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&dhost_1 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi1_in: endpoint {
+				remote-endpoint = <&enc1_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi1_out: endpoint {
+				remote-endpoint = <&panel1_in>;
+			};
+		};
+	};
+
+	panel1@0 {
+		reg = <0>;
+		backlight = <&lcd1_backlight>;
+		reset-gpio = <&gpio1_porta 9 1>;		/* active low */
+		vdd1v8-supply = <&lcd1_1v8>;
+		vspn5v7-supply = <&lcd1_5v7>;
+
+		port {
+			panel1_in: endpoint {
+				remote-endpoint = <&dsi1_out>;
+			};
+		};
+	};
+};
+
 &vvcam_flash_led0{
    flash_led_name = "aw36413_aw36515";
 	floodlight_i2c_bus = /bits/ 8 <2>;
@@ -2585,6 +2710,12 @@
 	status = "okay";
 };

+&npu_opp_table {
+	opp-1000000000 {
+		opp-suspend;
+	};
+};
+
 &fce {
 	memory-region = <&facelib_mem>;
 	status = "okay";
@@ -2599,6 +2730,21 @@
                    <&pinctrl_audio_i2s0>;
 };

+&tdm_slot1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audio_tdm>;
+};
+
+&spdif0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif0>;
+};
+
+&spdif1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif1>;
+};
+
 &i2s_8ch_sd0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_audiopa4>,
@@ -2630,74 +2776,189 @@

 &cpus {
 	c910_0: cpu@0 {
+
 		operating-points = <
 			/* kHz    uV */
-			300000	650000
+			300000	600000
+			400000  700000
+			500000  700000
+			600000  700000
+			702000  700000
 			800000	700000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
+			400000  800000
+			500000  800000
+			600000  800000
+			702000  800000
 			800000	800000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 	};
 	c910_1: cpu@1 {
+
 		operating-points = <
 			/* kHz    uV */
-			300000	650000
+			300000	600000
+			400000  700000
+			500000  700000
+			600000  700000
+			702000  700000
 			800000	700000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
+			400000  800000
+			500000  800000
+			600000  800000
+			702000  800000
 			800000	800000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 	};
 	c910_2: cpu@2 {

 		operating-points = <
 			/* kHz    uV */
-			300000	650000
+			300000	600000
+			400000  700000
+			500000  700000
+			600000  700000
+			702000  700000
 			800000	700000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
+			400000  800000
+			500000  800000
+			600000  800000
+			702000  800000
 			800000	800000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 	};
 	c910_3: cpu@3 {

 		operating-points = <
 			/* kHz    uV */
-			300000	650000
+			300000	600000
+			400000  700000
+			500000  700000
+			600000  700000
+			702000  700000
 			800000	700000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
+			400000  800000
+			500000  800000
+			600000  800000
+			702000  800000
 			800000	800000
+			900000	800000
+			1000000	800000
+			1104000	800000
+			1200000	800000
+			1296000 800000
+			1404000 800000
 			1500000	800000
-			1848000	1000000
+			1608000 1000000
+			1704000	1000000
+			1848000 1000000
 		>;
 	};
 };

 &hdmi_tx {
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_hdmi>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi>;
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm>;
+};
+
+&light_regdump {
+	memory-region = <&regdump_mem>;
+	status = "okay";
 };
--- a/arch/riscv/boot/dts/thead/th1520-b-product-crash.dts
+++ b/arch/riscv/boot/dts/thead/th1520-b-product-crash.dts
@@ -5,6 +5,16 @@

 #include "th1520-crash.dtsi"

+/ {
+	model = "T-HEAD Light product board";
+	compatible = "thead,light-val", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
+	};
+};
+
 &aon {
 	aon_reg_ricoh: light-ricoh-reg {
 		compatible = "thead,light-ricoh-pmic";
--- a/arch/riscv/boot/dts/thead/th1520-b-product.dts
+++ b/arch/riscv/boot/dts/thead/th1520-b-product.dts
@@ -3,6 +3,7 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

+
 /dts-v1/;

 #include "th1520.dtsi"
@@ -10,7 +11,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "th1520-vi-devices.dtsi"
 / {
-	model = "T-HEAD Light val board";
+	model = "T-HEAD Light product board";
 	compatible = "thead,light-val", "thead,light";

 	memory@0 {
@@ -49,10 +50,8 @@

 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
-			regions = <0x000000 0x100000>,
-				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			dummy_slave= <0x800000>;
+			is_default_region;
 		};

 		/* config#2: iopmp bypass */
@@ -212,6 +211,7 @@
 			vdev-nums = <1>;
            reg = <0x0 0x1E000000 0 0x10000>;
 			compatible = "light,light-rpmsg";
+			log-memory-region = <&audio_log_mem>;
 			status = "okay";
 		};
 	};
@@ -224,22 +224,22 @@
 	};

 	reg_vref_1v8: regulator-adc-verf {
-			compatible = "regulator-fixed";
-			regulator-name = "vref-1v8";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-	status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "vref-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		status = "okay";
 	};

-        reg_tp_pwr_en: regulator-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "PWR_EN";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpio1_porta 12 1>;
-                enable-active-high;
-                regulator-always-on;
-        };
+	reg_tp_pwr_en: regulator-pwr-en {
+		compatible = "regulator-fixed";
+		regulator-name = "PWR_EN";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		gpio = <&gpio1_porta 12 1>;
+		enable-active-high;
+		regulator-always-on;
+	};

 	wcn_wifi: wireless-wlan {
 		compatible = "wlan-platdata";
@@ -284,6 +284,7 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
+		log-memory-region = <&aon_log_mem>;
 		status = "okay";

 		pd: light-aon-pd {
@@ -445,112 +446,143 @@
 			enable-active-high;
 		};

-		aon_reg_ricoh: light-ricoh-reg {
-			compatible = "thead,light-ricoh-pmic";
-			status = "okay";
-
 			dvdd_cpu_reg: appcpu_dvdd {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvdd";
 				regulator-min-microvolt = <600000>;
 				regulator-max-microvolt = <1500000>;
+				regulator-type = "dvdd";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			dvddm_cpu_reg: appcpu_dvddm {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvddm";
 				regulator-min-microvolt = <600000>;
 				regulator-max-microvolt = <1500000>;
+				regulator-type = "dvddm";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd18_aon_reg: soc_dvdd18_aon {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_aon";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd33_usb3";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_aon_reg: soc_dvdd08_aon {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_aon";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ddr";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v8";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v1";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_0v6";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd18_ap_reg: soc_dvdd18_ap {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_ap";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_ap_reg: soc_dvdd08_ap {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ap";
+				regulator-type = "gpio";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd08_mipi_hdmi";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd18_mipi_hdmi";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

-			soc_vdd33_emmc_reg: soc_vdd33_emmc {
-				regulator-name = "soc_vdd33_emmc";
+			soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_dvdd33_emmc";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

-			soc_vdd18_emmc_reg: soc_vdd18_emmc {
-				regulator-name = "soc_vdd18_emmc";
+			soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_dvdd18_emmc";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd18_lcd0_en_reg: soc_lcd0_en {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_lcd0_en";
-			};
-			soc_vext_1v8_reg: soc_vext_1v8 {
-				regulator-name = "soc_vext_1v8";
+				regulator-type = "common";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+			soc_vext_1v8_reg: soc_vext_1v8 {
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_vext_1v8";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
-		};

 		c910_cpufreq {
 			compatible = "thead,light-mpw-cpufreq";
@@ -560,10 +592,15 @@
 		test: light-aon-test {
 			compatible = "thead,light-aon-test";
 		};
-	};
+};

 };

+&aon_suspend_ctrl {
+	audio-text-memory-region = <&audio_text_mem>;
+	status = "okay";
+};
+
 &resmem {
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -599,11 +636,24 @@
 		reg = <0x0 0x17000000 0 0x02000000>;
 		//no-map;
 	};
-
-	audio_mem: memory@32000000 {
-		reg = <0x0 0x32000000 0x0 0x6400000>;
+    audio_text_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0xE00000>;
 		//no-map;
    };
+    audio_data_mem: memory@32E00000 {
+		reg = <0x0 0x32E00000 0x0 0x600000>;
+		//no-map;
+    };
+	audio_log_mem: memory@33400000 {
+        reg = <0x0 0x33400000 0x0 0x200000>;
+	};
+	aon_log_mem: memory@33600000 {
+        reg = <0x0 0x33600000 0x0 0x200000>;
+	};
+	regdump_mem: memory@38400000 {
+		reg = <0x0 0x38400000 0x0 0x1E00000>;
+		no-map;
+	};
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
 		//no-map;
@@ -684,60 +734,16 @@
        status = "okay";
 };

-&spi0 {
-	num-cs = <1>;
-	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
-	rx-sample-delay-ns = <10>;
-	status = "disabled";
-
-	spi_norflash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <50000000>;
-		w25q,fast-read;
-	};
-
-	spidev@1 {
-		compatible = "spidev";
-		#address-cells = <0x1>;
-		#size-cells = <0x1>;
-		reg = <0x1>;
-		spi-max-frequency = <50000000>;
-	};
-};
-
 &uart0 {
 	clock-frequency = <100000000>;
 };

-&qspi0 {
-	num-cs = <1>;
-	cs-gpios = <&gpio2_porta 3 0>;
-	rx-sample-dly = <4>;
-	status = "disabled";
-
-	spi-flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "spi-nand";
-		spi-max-frequency = <100000000>;
-		spi-tx-bus-width = <4>;
-		spi-rx-bus-width = <4>;
-		reg = <0>;
-
-		partition@0 {
-			label = "ubi1";
-			reg = <0x00000000 0x08000000>;
-		};
-	};
-};
-
 &qspi1 {
 	compatible = "snps,dw-apb-ssi";
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi1>;
 	status = "okay";

 	spidev@0 {
@@ -1021,6 +1027,10 @@
 	};
 };

+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm>;
+};

 &i2c0 {
 	clock-frequency = <400000>;
@@ -1135,37 +1145,28 @@
 	status = "okay";
 };

-/*
-&vvcam_sensor0 {
-	sensor_name = "IMX334";
+&vvcam_sensor1 {
+	sensor_name = "OV5693";
 	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
+	sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
 	sensor_regulator_timing_us = <70 50 20>;
 	sensor_rst = <&gpio1_porta 16 0>;
-	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
+	sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
 	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
 	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
 	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-    i2c_reg_width = /bits/ 8 <2>;
-    i2c_data_width = /bits/ 8 <1>;
-    i2c_addr = /bits/ 8 <0x1a>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	i2c_addr = /bits/ 8 <0x36>;
 	i2c_bus = /bits/ 8 <3>;
 	status = "okay";
 };
-*/
-
-&vvcam_sensor1 {
-	sensor_name = "OV5693";
-	i2c_bus = /bits/ 8 <3>;
-	i2c_reg_width = /bits/ 8 <1>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "disabled";
-};

 &vvcam_sensor2 {
 	sensor_name = "GC5035";
 	sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
 	sensor_regulator_timing_us = <100 50 0>;
-	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin 
+	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
 	sensor_rst = <&gpio1_porta 29 0>;
 	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
 	DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
@@ -1236,14 +1237,31 @@
 	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
 	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
 	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-    i2c_reg_width = /bits/ 8 <1>;
-    i2c_data_width = /bits/ 8 <1>;
-    i2c_addr = /bits/ 8 <0x37>;
+	i2c_reg_width = /bits/ 8 <1>;
+	i2c_data_width = /bits/ 8 <1>;
+	i2c_addr = /bits/ 8 <0x37>;
+	i2c_bus = /bits/ 8 <3>;
+	status = "okay";
+};
+
+&vvcam_sensor7 {
+	sensor_name = "IMX334";
+	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
+	sensor_regulator_timing_us = <70 50 20>;
+	sensor_rst = <&gpio1_porta 16 0>;
+	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
+	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
+	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
+	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	i2c_addr = /bits/ 8 <0x1a>;
 	i2c_bus = /bits/ 8 <3>;
 	status = "okay";
 };

 &video0{
+	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1330,6 +1348,7 @@


 &video1{
+	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1433,7 +1452,8 @@
 };

 &video2{
-    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	status = "okay";
+	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -1518,7 +1538,8 @@
 };

 &video3{
-    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	status = "okay";
+	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -1621,7 +1642,8 @@
 };

 &video4{
-    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	status = "okay";
+	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -1772,6 +1794,7 @@
 };

 &video5{
+	status = "okay";
 	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1941,6 +1964,7 @@
 };

 &video6{
+	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
 	channel0 {
 		sensor0 {
@@ -1982,6 +2006,7 @@
 };

 &video7{
+	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2151,6 +2176,7 @@


 &video8{
+	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
    channel0 {
 		sensor0 {
@@ -2182,6 +2208,7 @@
 };

 &video9{
+	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2203,6 +2230,7 @@


 &video10{ // TUNINGTOOL
+	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2224,7 +2252,8 @@
 };

 &video11{
-	channel0 { 
+	status = "okay";
+	channel0 {
 		channel_id = <0>;
 		status = "okay";
 		sensor0 {
@@ -2250,6 +2279,7 @@
 };

 &video12{ // TUNINGTOOL
+	status = "okay";
 	channel0 { // CSI2
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2359,6 +2389,12 @@
 	status = "okay";
 };

+&npu_opp_table {
+	opp-792000000 {
+		opp-suspend;
+	};
+};
+
 &fce {
 	memory-region = <&facelib_mem>;
 	status = "okay";
@@ -2463,6 +2499,11 @@
                    <&pinctrl_audio_i2s_8ch_sd3>;
 };

+&light_regdump {
+	memory-region = <&regdump_mem>;
+	status = "okay";
+};
+
 &cpus {
 	c910_0: cpu@0 {
 		operating-points = <
--- a/arch/riscv/boot/dts/thead/th1520-crash.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-crash.dtsi
@@ -46,10 +46,8 @@

 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
-			regions = <0x000000 0x100000>,
-				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			dummy_slave= <0x800000>;
+			is_default_region;
 		};

 		/* config#2: iopmp bypass */
@@ -206,22 +204,22 @@
 	};

 	reg_vref_1v8: regulator-adc-verf {
-			compatible = "regulator-fixed";
-			regulator-name = "vref-1v8";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-	status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "vref-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		status = "okay";
 	};

-        reg_tp_pwr_en: regulator-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "PWR_EN";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpio1_porta 12 1>;
-                enable-active-high;
-                regulator-always-on;
-        };
+	reg_tp_pwr_en: regulator-pwr-en {
+		compatible = "regulator-fixed";
+		regulator-name = "PWR_EN";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		gpio = <&gpio1_porta 12 1>;
+		enable-active-high;
+		regulator-always-on;
+	};

 	wcn_wifi: wireless-wlan {
 		compatible = "wlan-platdata";
@@ -264,6 +262,7 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
+		log-memory-region = <&aon_log_mem>;
 		status = "okay";

 		pd: light-aon-pd {
@@ -316,6 +315,9 @@
 		reg = <0x0 0x17000000 0 0x02000000>;
 		//no-map;
 	};
+	aon_log_mem: memory@33600000 {
+	reg = <0x0 0x33600000 0x0 0x200000>;
+	};
 };

 &adc {
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-camera-tuning.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-camera-tuning.dts
@@ -1,13 +1,32 @@
-/* SPDX-License-Identifier: GPL-2.0 */	
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

 /dts-v1/;

-#include "th1520-lpi4a-dsi0.dts"
+#include "th1520-lpi4a.dtsi"

+&i2c3 {
+        touch@14 {
+			touchscreen-size-x = <800>;
+			touchscreen-size-y = <1200>;
+        };
+};

+&dsi0 {
+        status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+};
+
+&dhost_0 {
+        panel0@0 {
+			compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
+        };
+};

 &video10{ // TUNINGTOOL
 	status = "okay";
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-console.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-console.dts
@@ -13,6 +13,7 @@

 &dsi0_panel0 {
 	compatible = "mingjun,mj070bi30ia2";
+	rotation = <90>;
 };

 &i2c2 {
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-dsi0-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-dsi0-hdmi.dts
@@ -32,7 +32,7 @@
 };

 &i2c3 {
-	touch@14 {
+	goodix_tp: touch@14 {
 		#gpio-cells = <2>;
 		compatible = "goodix,gt9271";
 		reg = <0x14>;
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-dsi0.dts
@@ -8,52 +8,26 @@
 / {
 	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
 	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x1 0xffe00000>;
-	};
-};
-
-&cmamem {
-	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
-	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
 };

 &i2c3 {
-        touch@14 {
-                #gpio-cells = <2>;
-                compatible = "goodix,gt9271";
-                reg = <0x14>;
-                interrupt-parent = <&ao_gpio_porta>;
-                interrupts = <3 0>;
-                irq-gpios = <&ao_gpio_porta 3 0>;
-                reset-gpios = <&pcal6408ahk_d 0 0>;
-                AVDD28-supply = <&reg_tp_pwr_en>;
-                touchscreen-size-x = <800>;
-                touchscreen-size-y = <1200>;
-                tp-size = <9271>;
-                status = "okay";
-        };
+        goodix_tp: touch@14 {
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <1200>;
+		status = "okay";
+	};
 };

 &dsi0 {
        status = "okay";
 };

-&dhost_0 {
-        panel0@0 {
-		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
-                reg = <0>;
-                backlight = <&lcd0_backlight>;
-                reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
-                hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
-                vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
-
-                port {
-                        panel0_in: endpoint {
-                                remote-endpoint = <&dsi0_out>;
-                        };
-                };
-        };
+&dpu_enc0 {
+	status = "okay";
+};
+
+&dhost_0 {
+	panel0@0 {
+		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
+	};
 };
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-hx8279.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-hx8279.dts
@@ -8,53 +8,26 @@
 / {
 	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
 	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x1 0xffe00000>;
-	};
-};
-
-&cmamem {
-	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
-	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
 };

 &i2c3 {
 	touch@14 {
-                #gpio-cells = <2>;
-                compatible = "goodix,gt9271";
-                reg = <0x14>;
-                interrupt-parent = <&ao_gpio_porta>;
-                interrupts = <3 0>;
-                irq-gpios = <&ao_gpio_porta 3 0>;
-                reset-gpios = <&pcal6408ahk_d 0 0>;
-                AVDD28-supply = <&reg_tp_pwr_en>;
-                touchscreen-size-x = <1200>;
-                touchscreen-size-y = <1920>;
-                tp-size = <9271>;
-                status = "okay";
-        };
+		touchscreen-size-x = <1200>;
+		touchscreen-size-y = <1920>;
+		status = "okay";
+    };
 };

 &dsi0 {
        status = "okay";
 };

+&dpu_enc0 {
+	status = "okay";
+};

 &dhost_0 {
 	panel0@0 {
-                compatible = "himax,hx8279";
-                reg = <0>;
-                backlight = <&lcd0_backlight>;
-                reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
-                hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
-                vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
-
-                port {
-                        panel0_in: endpoint {
-                                remote-endpoint = <&dsi0_out>;
-                        };
-                };
-        };
+		compatible = "himax,hx8279";
+	};
 };
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-laptop.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-laptop.dts
@@ -76,9 +76,17 @@
 		vin-supply = <&reg_sys_vcc_5v>;
 		gpio = <&pcal6408ahk_c 1 1>;
 		enable-active-high;
+		regulator-boot-on;
 		regulator-always-on;
 	};

+	sata_pwr_switch: sata-pwr-switch {
+		status = "okay";
+		compatible = "reg-userspace-consumer";
+		regulator-name = "sata-pwr-consumer";
+		vcc-supply = <&reg_sata_vcc_5v>;
+	};
+
 	audio_amp: regulator-audio-amp-en {
                status = "okay";
                compatible = "regulator-fixed";
@@ -137,14 +145,12 @@
 };

 &wcn_wifi {
-	// WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
-	/delete-property/ WIFI,poweren_gpio;
+	WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
 };


 &wcn_bt {
-	// BT,power_gpio = <&pcal6408ahk_c 5 0>;
-	/delete-property/ BT,power_gpio;
+	BT,power_gpio = <&pcal6408ahk_c 5 0>;
 };

 &usb_1 {
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-plastic-16g.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-plastic-16g.dts
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-lpi4a-plastic.dts"
+
+/ {
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x3 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
+};
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-plastic.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-plastic.dts
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 Sipeed.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "th1520-lpi4a-laptop.dts"
+
+/ {
+        model = "T-HEAD Light Lichee Pi 4A configuration for Plastic laptop";
+};
+
+&dsi0_panel0 {
+	compatible = "cmn,5171_1920x1200_40Hz";
+};
+
+&i2c2 {
+        touchpad: touchpad@2c {
+                compatible = "hid-over-i2c";
+                reg = <0x2c>;
+                hid-descr-addr = <0x0020>;
+                interrupt-parent = <&gpio1_porta>;
+                interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+        };
+};
+
+&cw2015 {
+	cellwise,battery-profile = /bits/ 8 <
+		0x17 0x67 0x72 0x68 0x66 0x63 0x62 0x5A
+		0x64 0x61 0x4D 0x57 0x5A 0x51 0x43 0x38
+		0x31 0x2A 0x24 0x22 0x29 0x31 0x3E 0x4C
+		0x29 0x4D 0x0B 0x85 0x1C 0x38 0x47 0x57
+		0x5D 0x5E 0x5F 0x60 0x3F 0x1A 0x6F 0x41
+		0x0A 0x43 0x12 0x38 0x7B 0x95 0x9A 0x18
+		0x4B 0x6F 0x9E 0xD5 0x80 0x57 0x87 0xCB
+		0x2F 0x00 0x64 0xA5 0xB5 0x13 0x54 0xB9
+	>;
+};
+
+&lt8911 {
+	// CMN5171
+	lontium,pclk = <160000000>; // 60Hz
+	lontium,hact = <1920>;
+	lontium,vact = <1200>;
+	lontium,hbp = <105>;
+	lontium,hfp = <58>;
+	lontium,vbp = <20>;
+	lontium,vfp = <10>;
+	lontium,hs = <37>;
+	lontium,vs = <6>;
+	lontium,mipi_lane = <2>;
+	lontium,lane_cnt = <2>;
+	lontium,color = <1>; //Color Depth 0:6bit 1:8bit
+	lontium,test = <0>;
+};
+
+&fan_config0 {
+	temperature = <40000>;
+};
+
+&fan_config1 {
+	temperature = <60000>;
+};
+
+&fan_config2 {
+	temperature = <80000>;
+};
+
+&fan {
+        pwms = <&pwm 1 100000 0>;
+        cooling-levels = <0x10 0x30 0x50 0xFF>;
+};
+
+&lcd0_backlight {
+	//pwms = <&pwm 0 50000>;
+	pwms = <&pwm 0 1000000>;
+        default-brightness-level = <40>;
+};
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-pocket.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-pocket.dts
@@ -0,0 +1,219 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "th1520-lpi4a-dsi0-hdmi.dts"
+
+/ {
+	model = "LicheePocket4A 8G";
+	compatible = "thead,light", "sipeed,pocket4a";
+
+	charger: dc-charger {
+		compatible = "gpio-charger";
+		charger-type = "mains";
+		gpios = <&gpio1_porta 3 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&lcd0_backlight {
+        pwms = <&pwm 0 10000>; // 100Khz
+        brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
+        36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
+        76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
+        default-brightness-level = <30>;
+};
+
+&fan {
+        pwms = <&pwm 1 10000000 0>;
+        //cooling-levels = <0 64 192 255>;
+        cooling-levels = <192 192 192 255>;
+};
+
+&i2c0 {
+	/delete-node/ gpio@18;
+
+	cw2015: cw2015@62 {
+		compatible = "cellwise,cw2015";
+		status = "disabled";
+		reg = <0x62>;
+		cellwise,monitor-interval-ms = <5000>;
+		power-supplies = <&charger>;
+		cellwise,battery-profile = /bits/ 8 <
+			0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63
+			0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36
+			0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69
+			0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59
+			0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17
+			0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D
+			0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB
+			0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11
+		>;
+	};
+};
+
+&i2c3 {
+	/delete-node/ gpio@18;
+};
+
+&goodix_tp {
+	#gpio-cells = <2>;
+	compatible = "goodix,gt9271";
+	reg = <0x14>;
+	interrupt-parent = <&ao_gpio_porta>;
+	interrupts = <3 0>;
+	irq-gpios = <&ao_gpio_porta 3 0>;
+	reset-gpios = <&pcal6408ahk_c 0 0>;
+	touchscreen-size-x = <800>;
+	touchscreen-size-y = <1280>;
+	status = "okay";
+};
+
+&reg_tp_pwr_en {
+	/delete-property/ gpio;
+};
+
+&reg_usb_hub_vdd1v2 {
+	/delete-property/ gpio;
+};
+
+&vvcam_sensor1 {
+	sensor_pdn = <&gpio1_porta 30 0>;
+	sensor_rst = <&pcal6408ahk_c 2 0>;
+	i2c_bus = /bits/ 8 <0>;
+};
+
+&key_volup {
+	gpios = <&gpio2_porta 16 0x1>;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio; 
+};
+
+&soc_vdd33_lcd0_en_reg {
+	/delete-property/ gpio; 
+};
+
+&soc_vdd18_lcd0_en_reg {
+	/delete-property/ gpio; 
+};
+
+&soc_avdd28_rgb_reg {
+	/delete-property/ gpio;
+};
+
+&soc_dovdd18_rgb_reg {
+	/delete-property/ gpio;
+};
+
+&soc_dvdd12_rgb_reg {
+	/delete-property/ gpio;
+};
+
+&soc_avdd25_ir_reg {
+	/delete-property/ gpio;
+};
+
+&soc_dovdd18_ir_reg {
+	/delete-property/ gpio;
+};
+
+&soc_dvdd12_ir_reg {
+	/delete-property/ gpio;
+};
+
+&soc_cam2_avdd25_ir_reg {
+	/delete-property/ gpio;
+};
+
+&soc_cam2_dovdd18_ir_reg {
+	/delete-property/ gpio;
+};
+
+&soc_cam2_dvdd12_ir_reg {
+	/delete-property/ gpio;
+};
+
+&dsi0_panel0 {
+	compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
+	backlight = <&lcd0_backlight>;
+	reset-gpio = <&pcal6408ahk_c 3 0>; /* active low */
+	/delete-property/ hsvcc-supply;
+	/delete-property/ vspn3v3-supply;
+};
+
+&usb_1 {
+	/delete-property/ hubswitch-gpio;
+	/delete-property/ hub1v2-supply;
+	/delete-property/ hub5v-supply;
+};
+
+&cpus {
+        c910_0: cpu@0 {
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+        c910_1: cpu@1 {
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+        c910_2: cpu@2 {
+
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+        c910_3: cpu@3 {
+
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+};
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-product-crash.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-product-crash.dts
@@ -5,6 +5,16 @@

 #include "th1520-crash.dtsi"

+/ {
+	model = "T-HEAD Light Lichee Pi 4A board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+};
+
 &aon {
 	aon_reg_dialog: light-dialog-reg {
 		compatible = "thead,light-dialog-pmic-ant";
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-product.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-product.dts
@@ -1,11 +1,11 @@
-/* SPDX-License-Identifier: GPL-2.0 */	
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

 /dts-v1/;

-#include "th1520-lpi4a-dsi0.dts"
+#include "th1520-lpi4a.dtsi"

 &lightsound {
        status = "okay";
@@ -40,11 +40,3 @@
                };
        };
 };
-
-&dpu_enc0 {
-        status = "disabled";
-};
-
-&dsi0 {
-        status = "disabled";
-};
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a.dtsi
@@ -10,6 +10,14 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "th1520-vi-devices.dtsi"
 / {
+	model = "T-HEAD Light Lichee Pi 4A board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+
 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
 		stdout-path = "serial0:115200n8";
@@ -41,10 +49,8 @@

 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
-			regions = <0x000000 0x100000>,
-				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			dummy_slave= <0x800000>;
+			is_default_region;
 		};

 		/* config#2: iopmp bypass */
@@ -204,6 +210,7 @@
 			vdev-nums = <1>;
            reg = <0x0 0x1E000000 0 0x10000>;
 			compatible = "light,light-rpmsg";
+			log-memory-region = <&audio_log_mem>;
 			status = "okay";
 		};
 	};
@@ -223,22 +230,22 @@
 	};

 	reg_vref_1v8: regulator-adc-verf {
-			compatible = "regulator-fixed";
-			regulator-name = "vref-1v8";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-			status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "vref-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		status = "okay";
 	};

-        reg_tp_pwr_en: regulator-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "regulator-pwr-en";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&pcal6408ahk_d 4 1>;
-                enable-active-high;
-                regulator-always-on;
-        };
+	reg_tp_pwr_en: regulator-pwr-en {
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-pwr-en";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		gpio = <&pcal6408ahk_d 4 1>;
+		enable-active-high;
+		regulator-always-on;
+	};

 	reg_usb_hub_vdd1v2: regulator-hub-vdd12-en {
 		compatible = "regulator-fixed";
@@ -247,7 +254,6 @@
 		regulator-max-microvolt = <1200000>;
 		gpio = <&pcal6408ahk_d 2 1>;
 		enable-active-high;
-
 	};

 	reg_usb_hub_vcc5v: regulator-hub-vcc5v-en {
@@ -257,7 +263,6 @@
 		regulator-max-microvolt = <5000000>;
 		gpio = <&pcal6408ahk_d 3 1>;
 		enable-active-high;
-
 	};

 	wcn_wifi: wireless-wlan {
@@ -268,7 +273,8 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_wifi_wake>;
 		wifi_chip_type = "rtl8723ds";
-		// WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
+		WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
+		support_power_ctrl;
 		status = "okay";
 	};

@@ -276,7 +282,7 @@
 		compatible = "bluetooth-platdata";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_bt_wake>;
-		// BT,power_gpio    = <&pcal6408ahk_c 5 0>;
+		BT,power_gpio    = <&pcal6408ahk_c 5 0>;
 		status = "okay";
 	};

@@ -290,12 +296,13 @@
 			debounce-interval = <1>;
 			gpios = <&gpio1_porta 19 0x1>;
 		};
-		key-volumeup {
+		key_volup: key-volumeup {
 			label = "Volume Up Key";
 			linux,code = <KEY_VOLUMEUP>;
 			debounce-interval = <1>;
 			gpios = <&gpio2_porta 25 0x1>;
 		};
+
 		key-wake {
 			label = "Wake Key";
 			wakeup-source;
@@ -309,6 +316,7 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
+		log-memory-region = <&aon_log_mem>;
 		status = "okay";

 		pd: light-aon-pd {
@@ -474,123 +482,155 @@
 			enable-active-high;
 		};

-		aon_reg_dialog: light-dialog-reg {
-			compatible = "thead,light-dialog-pmic-ant";
-			status = "okay";
-
 			dvdd_cpu_reg: appcpu_dvdd {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvdd";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
+				regulator-type = "dvdd";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			dvddm_cpu_reg: appcpu_dvddm {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvddm";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
+				regulator-type = "dvddm";
+				regulator-dual-rail;
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd18_aon_reg: soc_dvdd18_aon {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_aon";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd33_usb3";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_aon_reg: soc_dvdd08_aon {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_aon";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ddr";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v8";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v1";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_0v6";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd18_ap_reg: soc_dvdd18_ap {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_ap";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dvdd08_ap_reg: soc_dvdd08_ap {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ap";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd08_mipi_hdmi";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd18_mipi_hdmi";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd33_emmc_reg: soc_vdd33_emmc {
-				regulator-name = "soc_vdd33_emmc";
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_dvdd33_emmc";
+				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_vdd18_emmc_reg: soc_vdd18_emmc {
-				regulator-name = "soc_vdd18_emmc";
+				compatible = "thead,light-dialog-pmic";
+				regulator-name = "soc_dvdd18_emmc";
+				regulator-type = "gpio";
 				regulator-boot-on;
 				regulator-always-on;
 			};

 			soc_dovdd18_scan_reg: soc_dovdd18_scan {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_scan";
+				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};

 			soc_dvdd12_scan_reg: soc_dvdd12_scan {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_scan";
+				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};

 			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd28_scan_en";
+				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};

-		};

 		c910_cpufreq {
 			compatible = "thead,light-mpw-cpufreq";
@@ -652,6 +692,16 @@

 };

+&aon_suspend_ctrl {
+	audio-text-memory-region = <&audio_text_mem>;
+	status = "okay";
+};
+
+&cmamem {
+	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
+	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
+};
+
 &resmem {
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -683,9 +733,24 @@
 	facelib_mem: memory@17000000 {
 		reg = <0x0 0x17000000 0 0x02000000>;
 	};
-    audio_mem: memory@32000000 {
-		reg = <0x0 0x32000000 0x0 0x6400000>;
+    audio_text_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0xE00000>;
+		//no-map;
    };
+    audio_data_mem: memory@32E00000 {
+		reg = <0x0 0x32E00000 0x0 0x600000>;
+		//no-map;
+    };
+	audio_log_mem: memory@33400000 {
+        reg = <0x0 0x33400000 0x0 0x200000>;
+	};
+	aon_log_mem: memory@33600000 {
+        reg = <0x0 0x33600000 0x0 0x200000>;
+	};
+	regdump_mem: memory@38400000 {
+		reg = <0x0 0x38400000 0x0 0x1E00000>;
+		no-map;
+	};
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
 	};
@@ -780,6 +845,9 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spi0>;
+	status = "okay";

 	spi_norflash@0 {
 		status = "okay";
@@ -848,6 +916,8 @@
 	compatible = "snps,dw-apb-ssi";
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi1>;
 	status = "okay";

 	spidev@0 {
@@ -923,12 +993,13 @@
 	pull_up;
 	no-sd;
 	no-mmc;
-	non-removable;
+	broken-cd;
 	io_fixed_1v8;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
 	wakeup-source;
+	keep-power-in-suspend;
 	status = "okay";
 };

@@ -1105,7 +1176,6 @@
 				>;
 			};

-
 			pinctrl_uart3_tx_is_gpio: uart3txisgpiogrp {
 				thead,pins = <
 					FM_UART3_TXD	0x3	0x202
@@ -1115,6 +1185,7 @@



+
 			pinctrl_wifi_wake: wifi_grp {
 				thead,pins = <
 					FM_GPIO0_27	0x0	0x202
@@ -1199,10 +1270,8 @@
 			pinctrl_audiopa30: audiopa30 {
 				thead,pins = < FM_AUDIO_PA30 LIGHT_PIN_FUNC_0 0x000 >;
 			};
-            pinctrl_sleep: sleep_grp {
-				thead,pins = <
-                    FM_CPU_JTG_TCLK 0x3   0x238
-				>;
+			pinctrl_sleep: sleep_grp {
+				thead,pins = <FM_CPU_JTG_TCLK 0x3   0x238 >;
 			};

 	};
@@ -1249,6 +1318,11 @@
 	};
 };

+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm>;
+};
+
 &i2c0 {
    clock-frequency = <400000>;
 	status = "okay";
@@ -1296,6 +1370,19 @@
 		gpio-controller;
 		#gpio-cells = <2>;
 	};
+
+	touch@14 {
+		#gpio-cells = <2>;
+		compatible = "goodix,gt9271";
+		reg = <0x14>;
+		interrupt-parent = <&ao_gpio_porta>;
+		interrupts = <3 0>;
+		irq-gpios = <&ao_gpio_porta 3 0>;
+		reset-gpios = <&pcal6408ahk_d 0 0>;
+		AVDD28-supply = <&reg_tp_pwr_en>;
+		tp-size = <9271>;
+		status = "disable";
+	};
 };

 &i2c4 {
@@ -1440,6 +1527,13 @@
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <0>;
+			csi_idx = <0>;
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+		};
 		sensor1 {
 			subdev_name = "vivcam";
 			idx = <3>;
@@ -1465,6 +1559,13 @@
 		};
 	};
 	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <0>;
+			csi_idx = <0>;
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+		};
 		sensor1 {
 			subdev_name = "vivcam";
 			idx = <3>;
@@ -1485,6 +1586,13 @@
 		};
 	};
 	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <0>;
+			csi_idx = <0>;
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+		};
 		sensor1 {
 			subdev_name = "vivcam";
 			idx = <3>;
@@ -1510,6 +1618,14 @@
    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	status = "okay";
    channel0 {
+		sensor0 {
+            subdev_name = "vivcam";
+			idx = <0>;
+			csi_idx = <0>;
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+
+		};
 		sensor1 {
 			subdev_name = "vivcam";
 			idx = <3>;
@@ -1642,13 +1758,18 @@
 	status = "okay";
 };

+&npu_opp_table {
+	opp-1000000000 {
+		opp-suspend;
+	};
+};
+
 &fce {
 	memory-region = <&facelib_mem>;
 	status = "okay";
 };

 &dpu_enc0 {
-	status = "okay";

 	ports {
 		/* output */
@@ -1693,6 +1814,20 @@
 			};
 		};
 	};
+
+	panel0@0 {
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
+		hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
+		vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
+
+		port {
+				panel0_in: endpoint {
+						remote-endpoint = <&dsi0_out>;
+				};
+		};
+	};
 };

 &disp1_out {
@@ -1782,6 +1917,11 @@
 	hub5v-supply = <&reg_usb_hub_vcc5v>;
 };

+&light_regdump {
+	memory-region = <&regdump_mem>;
+	status = "okay";
+};
+
 &cpus {
 	c910_0: cpu@0 {
 		operating-points = <
--- a/arch/riscv/boot/dts/thead/th1520-milkv-meles-16g.dts
+++ b/arch/riscv/boot/dts/thead/th1520-milkv-meles-16g.dts
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-milkv-meles.dts"
+
+/ {
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x3 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
+};
--- a/arch/riscv/boot/dts/thead/th1520-milkv-meles.dts
+++ b/arch/riscv/boot/dts/thead/th1520-milkv-meles.dts
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -80,11 +80,6 @@
 		viv_video15 = &video15;
 	};

-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x0 0xffe00000>;
-	};
-
 	resmem: reserved-memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -162,7 +157,7 @@
 				};

 				dev_crit: trip2 {
-					temperature = <105000>;
+					temperature = <110000>;
 					hysteresis = <2000>;
 					type = "critical";
 				};
@@ -943,8 +938,6 @@
 			clocks = <&clk CLKGEN_PWM_PCLK>,
 			         <&clk CLKGEN_PWM_CCLK>;
 			clock-names = "pclk", "cclk";
-			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_pwm>;
 		};

 		timer0: timer@ffefc32000 {
@@ -1139,8 +1132,6 @@
 		spi0: spi@ffe700c000 {
 			compatible = "snps,dw-apb-ssi";
 			reg = <0xff 0xe700c000 0x0 0x1000>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_spi0>;
 			interrupt-parent = <&intc>;
 			interrupts = <54>;
            clocks = <&clk CLKGEN_SPI_SSI_CLK>,
@@ -1149,6 +1140,7 @@
 			num-cs = <2>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};

 		qspi0: spi@ffea000000 {
@@ -1163,13 +1155,12 @@
            clock-names = "sclk", "pclk";
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};

 		qspi1: spi@fff8000000 {
 			compatible = "snps,dw-apb-ssi-quad";
 			reg = <0xff 0xf8000000 0x0 0x1000>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_qspi1>;
 			interrupt-parent = <&intc>;
 			interrupts = <53>;
            clocks = <&clk CLKGEN_QSPI1_SSI_CLK>,
@@ -1177,6 +1168,7 @@
            clock-names = "sclk", "pclk";
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};

 		g2d_opp_table:g2d-opp-table {
@@ -2389,56 +2381,67 @@
 		};

 		bm_csi0: csi@ffe4000000{ //CSI2
-		    compatible = "thead,light-bm-csi";
-		    reg = < 0xff 0xe4000000 0x0 0x10000>;
-		    interrupt-parent = <&intc>;
-		    interrupts = <128>;
-		    dphyglueiftester = <0x180>;
-		    sysreg_mipi_csi_ctrl = <0x140>;
-		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
-		    clock-names = "pclk", "pixclk", "cfg_clk";
-		    phy_name = "CSI_4LANE";
-		    status = "disabled";
+			compatible = "thead,light-bm-csi";
+			reg = < 0xff 0xe4000000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <128>;
+			dphyglueiftester = <0x180>;
+			sysreg_mipi_csi_ctrl = <0x140>;
+			clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
+			clock-names = "pclk", "pixclk", "cfg_clk";
+			phy_name = "CSI_4LANE";
+			status = "disabled";
 		};

 		csia_reg: visys-reg@ffe4020000 {
-		    compatible = "thead,light-visys-reg", "syscon";
-		    reg = < 0xff 0xe4020000 0x0 0x10000>;
-		    status = "okay";
+			compatible = "thead,light-visys-reg", "syscon";
+			reg = < 0xff 0xe4020000 0x0 0x10000>;
+			status = "okay";
+		};
+
+		csib_reg: visys-reg@ffe4010000{
+			compatible = "thead,light-visys-reg", "syscon";
+			reg = < 0xff 0xe4010000 0x0 0x10000>;
+			status = "okay";
 		};

 		bm_csi1: csi@ffe4010000{ //CSI2X2_B
-		    compatible = "thead,light-bm-csi";
-		    reg = < 0xff 0xe4010000 0x0 0x10000>;
-		    interrupt-parent = <&intc>;
-		    interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
-		    dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
-		    sysreg_mipi_csi_ctrl = <0x148>;
-		    visys-regmap = <&visys_reg>;
-		    csia-regmap = <&csia_reg>;
-		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
-		    clock-names = "pclk", "pixclk", "cfg_clk";
-		    phy_name = "CSI_B";
-		    status = "disabled";
+			compatible = "thead,light-bm-csi";
+			reg = < 0xff 0xe4010000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
+			dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
+			sysreg_mipi_csi_ctrl = <0x148>;
+			visys-regmap = <&visys_reg>;
+			csia-regmap = <&csia_reg>;
+			clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
+			clock-names = "pclk", "pixclk", "cfg_clk";
+			phy_name = "CSI_B";
+			status = "disabled";
 		};

 		bm_csi2: csi@ffe4020000{ //CSI2X2_A
-		    compatible = "thead,light-bm-csi";
-		    reg = < 0xff 0xe4020000 0x0 0x10000>;
-		    interrupt-parent = <&intc>;
-		    interrupts = <127>;
-		    dphyglueiftester = <0x184>;
-		    sysreg_mipi_csi_ctrl = <0x144>;
-		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
-		    clock-names = "pclk", "pixclk", "cfg_clk";
-		    phy_name = "CSI_A";
-		    status = "disabled";
+			compatible = "thead,light-bm-csi";
+			reg = < 0xff 0xe4020000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <127>;
+			dphyglueiftester = <0x184>;
+			sysreg_mipi_csi_ctrl = <0x144>;
+			sysreg_mipi_csi_fifo_ctrl = <0x14c>;
+			csib-regmap = <&csib_reg>;
+			clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
+			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
+			clock-names = "pclk", "pixclk", "cfg_clk", "pclk1", "pixclk1", "cfg_clk1";
+			phy_name = "CSI_A";
+			status = "disabled";
 		};

 		bm_isp0: bm_isp@ffe4100000 {
@@ -2621,6 +2624,7 @@
 			interrupts = <156>;
 			#cooling-cells = <2>;
 			firmware-name = "xrp0.elf";
+			power-domains = <&pd LIGHT_AON_DSP0_PD>;
 			clocks = <&dspsys_clk_gate CLKGEN_DSP0_PCLK>,
 			<&dspsys_clk_gate CLKGEN_DSP0_CCLK>;
 			clock-names = "pclk", "cclk";
@@ -2662,6 +2666,7 @@
 			interrupts = <157>;
 			firmware-name = "xrp1.elf";
 			#cooling-cells = <2>;
+			power-domains = <&pd LIGHT_AON_DSP1_PD>;
 			clocks = <&dspsys_clk_gate CLKGEN_DSP1_PCLK>,
 			<&dspsys_clk_gate CLKGEN_DSP1_CCLK>;
 			clock-names = "pclk", "cclk";
@@ -2833,7 +2838,10 @@
 			#clock-cells = <1>;
 			status = "okay";
 		};
-
+		light_regdump: light-regdump {
+			compatible = "thead,light-regdump";
+			status = "disabled";
+		};
 	};

 };
--- a/arch/riscv/configs/beaglev_defconfig
+++ b/arch/riscv/configs/beaglev_defconfig
@@ -1319,6 +1319,7 @@ CONFIG_BT_DEBUGFS=y
 # CONFIG_BT_HCIBTSDIO is not set
 CONFIG_BT_HCIUART=y
 CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_RTL3WIRE=y
 # CONFIG_BT_HCIUART_BCSP is not set
 # CONFIG_BT_HCIUART_ATH3K is not set
 # CONFIG_BT_HCIUART_INTEL is not set
--- a/arch/riscv/configs/light-android_defconfig
+++ b/arch/riscv/configs/light-android_defconfig
@@ -282,6 +282,7 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
 CONFIG_PM_WAKELOCKS_LIMIT=0
--- a/arch/riscv/configs/light_defconfig
+++ b/arch/riscv/configs/light_defconfig
@@ -10,6 +10,7 @@ CONFIG_NAMESPACES=y
 CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BLK_DEV_INITRD=y
+CONFIG_SCHED_MC=y
 CONFIG_EXPERT=y
 # CONFIG_BUG is not set
 CONFIG_BPF_SYSCALL=y
@@ -31,7 +32,7 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
 CONFIG_VIRTUALIZATION=y
@@ -351,4 +352,5 @@ CONFIG_ENERGY_MODEL=y
 # CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
 CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
 CONFIG_DEVFREQ_THERMAL=y
+CONFIG_THERMAL_STATISTICS=y

--- a/arch/riscv/configs/revyos_beaglev_defconfig
+++ b/arch/riscv/configs/revyos_beaglev_defconfig
--- a/arch/riscv/configs/revyos_defconfig
+++ b/arch/riscv/configs/revyos_defconfig
--- a/arch/riscv/mm/context.c
+++ b/arch/riscv/mm/context.c
@@ -98,7 +98,7 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 			"sfence.vma t0, t0\n\t"
 			::: "memory", "t0");

-	csr_write(sptbr, virt_to_pfn(next->pgd) | SATP_MODE | asid);
+	csr_write(satp, virt_to_pfn(next->pgd) | SATP_MODE | asid);
 #endif

 	flush_icache_deferred(next);
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -115,6 +115,14 @@ config BT_HCIUART_H4

 	  Say Y here to compile support for HCI UART (H4) protocol.

+config BT_HCIUART_RTL3WIRE
+	bool "Realtek Three-wire UART (H5) protocol support"
+	depends on BT_HCIUART
+	help
+		Realtek Three-wire UART (H5) transport layer makes it possible
+		to use Realtek Bluetooth controller with Three-wire UART.
+		Say Y here to compile support for Realtek Three-wire UART.
+
 config BT_HCIUART_NOKIA
 	tristate "UART Nokia H4+ protocol support"
 	depends on BT_HCIUART
@@ -425,6 +433,4 @@ config BT_HCIRSI
 	  Say Y here to compile support for HCI over Redpine into the
 	  kernel or say M to compile as a module.

-source "drivers/bluetooth/rtkbt/Kconfig"
-
 endmenu
--- a/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
@@ -45,6 +45,6 @@ hci_uart-$(CONFIG_BT_HCIUART_BCM)	+= hci_bcm.o
 hci_uart-$(CONFIG_BT_HCIUART_QCA)	+= hci_qca.o
 hci_uart-$(CONFIG_BT_HCIUART_AG6XX)	+= hci_ag6xx.o
 hci_uart-$(CONFIG_BT_HCIUART_MRVL)	+= hci_mrvl.o
+hci_uart-y += rtk_coex.o
+hci_uart-$(CONFIG_BT_HCIUART_RTL3WIRE) += hci_rtk_h5.o
 hci_uart-objs				:= $(hci_uart-y)
-
-obj-$(CONFIG_BT_RTKBT) += rtkbt/
--- a/drivers/bluetooth/hci_bcm.c
+++ b/drivers/bluetooth/hci_bcm.c
@@ -654,6 +654,7 @@ static const struct h4_recv_pkt bcm_recv_pkts[] = {
 	{ H4_RECV_ACL,      .recv = hci_recv_frame },
 	{ H4_RECV_SCO,      .recv = hci_recv_frame },
 	{ H4_RECV_EVENT,    .recv = hci_recv_frame },
+	{ H4_RECV_ISO,      .recv = hci_recv_frame },
 	{ BCM_RECV_LM_DIAG, .recv = hci_recv_diag  },
 	{ BCM_RECV_NULL,    .recv = hci_recv_diag  },
 	{ BCM_RECV_TYPE49,  .recv = hci_recv_diag  },
--- a/drivers/bluetooth/hci_h4.c
+++ b/drivers/bluetooth/hci_h4.c
@@ -1,4 +1,3 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
 /*
 *
 *  Bluetooth HCI UART driver
@@ -6,10 +5,25 @@
 *  Copyright (C) 2000-2001  Qualcomm Incorporated
 *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
 *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
+ *
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
 */

 #include <linux/module.h>
-
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/types.h>
@@ -17,7 +31,6 @@
 #include <linux/interrupt.h>
 #include <linux/ptrace.h>
 #include <linux/poll.h>
-
 #include <linux/slab.h>
 #include <linux/tty.h>
 #include <linux/errno.h>
@@ -25,18 +38,32 @@
 #include <linux/signal.h>
 #include <linux/ioctl.h>
 #include <linux/skbuff.h>
-#include <asm/unaligned.h>
-
 #include <net/bluetooth/bluetooth.h>
 #include <net/bluetooth/hci_core.h>
+#include <linux/version.h>

 #include "hci_uart.h"

+#ifdef BTCOEX
+#include "rtk_coex.h"
+#endif
+
+//#define VERSION "1.2"
+
 struct h4_struct {
+	unsigned long rx_state;
+	unsigned long rx_count;
 	struct sk_buff *rx_skb;
 	struct sk_buff_head txq;
 };

+/* H4 receiver States */
+#define H4_W4_PACKET_TYPE	0
+#define H4_W4_EVENT_HDR		1
+#define H4_W4_ACL_HDR		2
+#define H4_W4_SCO_HDR		3
+#define H4_W4_DATA		4
+
 /* Initialize protocol */
 static int h4_open(struct hci_uart *hu)
 {
@@ -44,7 +71,7 @@ static int h4_open(struct hci_uart *hu)

 	BT_DBG("hu %p", hu);

-	h4 = kzalloc(sizeof(*h4), GFP_KERNEL);
+	h4 = kzalloc(sizeof(*h4), GFP_ATOMIC);
 	if (!h4)
 		return -ENOMEM;

@@ -71,6 +98,8 @@ static int h4_close(struct hci_uart *hu)
 {
 	struct h4_struct *h4 = hu->priv;

+	hu->priv = NULL;
+
 	BT_DBG("hu %p", hu);

 	skb_queue_purge(&h4->txq);
@@ -83,7 +112,7 @@ static int h4_close(struct hci_uart *hu)
 	return 0;
 }

-/* Enqueue frame for transmission (padding, crc, etc) */
+/* Enqueue frame for transmittion (padding, crc, etc) */
 static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 {
 	struct h4_struct *h4 = hu->priv;
@@ -91,34 +120,174 @@ static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 	BT_DBG("hu %p skb %p", hu, skb);

 	/* Prepend skb with frame type */
-	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
+	memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
 	skb_queue_tail(&h4->txq, skb);

 	return 0;
 }

-static const struct h4_recv_pkt h4_recv_pkts[] = {
-	{ H4_RECV_ACL,   .recv = hci_recv_frame },
-	{ H4_RECV_SCO,   .recv = hci_recv_frame },
-	{ H4_RECV_EVENT, .recv = hci_recv_frame },
-	{ H4_RECV_ISO,   .recv = hci_recv_frame },
-};
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+static inline int h4_check_data_len(struct h4_struct *h4, int len)
+#else
+static inline int h4_check_data_len(struct hci_dev *hdev, struct h4_struct *h4, int len)
+#endif
+{
+	register int room = skb_tailroom(h4->rx_skb);
+
+	BT_DBG("len %d room %d", len, room);
+
+	if (!len) {
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+		hci_recv_frame(h4->rx_skb);
+#else
+		hci_recv_frame(hdev, h4->rx_skb);
+#endif
+	} else if (len > room) {
+		BT_ERR("Data length is too large");
+		kfree_skb(h4->rx_skb);
+	} else {
+		h4->rx_state = H4_W4_DATA;
+		h4->rx_count = len;
+		return len;
+	}
+
+	h4->rx_state = H4_W4_PACKET_TYPE;
+	h4->rx_skb   = NULL;
+	h4->rx_count = 0;
+
+	return 0;
+}

 /* Recv data */
-static int h4_recv(struct hci_uart *hu, const void *data, int count)
+static int h4_recv(struct hci_uart *hu, void *data, int count)
 {
 	struct h4_struct *h4 = hu->priv;
+	register char *ptr;
+	struct hci_event_hdr *eh;
+	struct hci_acl_hdr   *ah;
+	struct hci_sco_hdr   *sh;
+	register int len, type, dlen;

-	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
-		return -EUNATCH;
+	BT_DBG("hu %p count %d rx_state %ld rx_count %ld", 
+			hu, count, h4->rx_state, h4->rx_count);

-	h4->rx_skb = h4_recv_buf(hu->hdev, h4->rx_skb, data, count,
-				 h4_recv_pkts, ARRAY_SIZE(h4_recv_pkts));
-	if (IS_ERR(h4->rx_skb)) {
-		int err = PTR_ERR(h4->rx_skb);
-		bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
-		h4->rx_skb = NULL;
-		return err;
+	ptr = data;
+	while (count) {
+		if (h4->rx_count) {
+			len = min_t(unsigned int, h4->rx_count, count);
+			memcpy(skb_put(h4->rx_skb, len), ptr, len);
+			h4->rx_count -= len; count -= len; ptr += len;
+
+			if (h4->rx_count)
+				continue;
+
+			switch (h4->rx_state) {
+			case H4_W4_DATA:
+				BT_DBG("Complete data");
+#ifdef BTCOEX
+				if(bt_cb(h4->rx_skb)->pkt_type == HCI_EVENT_PKT)
+					rtk_btcoex_parse_event(
+							h4->rx_skb->data,
+							h4->rx_skb->len);
+
+				if(bt_cb(h4->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
+					rtk_btcoex_parse_l2cap_data_rx(
+							h4->rx_skb->data,
+							h4->rx_skb->len);
+#endif
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				hci_recv_frame(h4->rx_skb);
+#else
+				hci_recv_frame(hu->hdev, h4->rx_skb);
+#endif
+
+				h4->rx_state = H4_W4_PACKET_TYPE;
+				h4->rx_skb = NULL;
+				continue;
+
+			case H4_W4_EVENT_HDR:
+				eh = hci_event_hdr(h4->rx_skb);
+
+				BT_DBG("Event header: evt 0x%2.2x plen %d", eh->evt, eh->plen);
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				h4_check_data_len(h4, eh->plen);
+#else
+				h4_check_data_len(hu->hdev, h4, eh->plen);
+#endif
+				continue;
+
+			case H4_W4_ACL_HDR:
+				ah = hci_acl_hdr(h4->rx_skb);
+				dlen = __le16_to_cpu(ah->dlen);
+
+				BT_DBG("ACL header: dlen %d", dlen);
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				h4_check_data_len(h4, dlen);
+#else
+				h4_check_data_len(hu->hdev, h4, dlen);
+#endif
+				continue;
+
+			case H4_W4_SCO_HDR:
+				sh = hci_sco_hdr(h4->rx_skb);
+
+				BT_DBG("SCO header: dlen %d", sh->dlen);
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				h4_check_data_len(h4, sh->dlen);
+#else
+				h4_check_data_len(hu->hdev, h4, sh->dlen);
+#endif
+				continue;
+			}
+		}
+
+		/* H4_W4_PACKET_TYPE */
+		switch (*ptr) {
+		case HCI_EVENT_PKT:
+			BT_DBG("Event packet");
+			h4->rx_state = H4_W4_EVENT_HDR;
+			h4->rx_count = HCI_EVENT_HDR_SIZE;
+			type = HCI_EVENT_PKT;
+			break;
+
+		case HCI_ACLDATA_PKT:
+			BT_DBG("ACL packet");
+			h4->rx_state = H4_W4_ACL_HDR;
+			h4->rx_count = HCI_ACL_HDR_SIZE;
+			type = HCI_ACLDATA_PKT;
+			break;
+
+		case HCI_SCODATA_PKT:
+			BT_DBG("SCO packet");
+			h4->rx_state = H4_W4_SCO_HDR;
+			h4->rx_count = HCI_SCO_HDR_SIZE;
+			type = HCI_SCODATA_PKT;
+			break;
+
+		default:
+			BT_ERR("Unknown HCI packet type %2.2x", (__u8)*ptr);
+			hu->hdev->stat.err_rx++;
+			ptr++; count--;
+			continue;
+		};
+
+		ptr++; count--;
+
+		/* Allocate packet */
+		h4->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
+		if (!h4->rx_skb) {
+			BT_ERR("Can't allocate mem for new packet");
+			h4->rx_state = H4_W4_PACKET_TYPE;
+			h4->rx_count = 0;
+			return -ENOMEM;
+		}
+
+		h4->rx_skb->dev = (void *) hu->hdev;
+		bt_cb(h4->rx_skb)->pkt_type = type;
 	}

 	return count;
@@ -130,9 +299,8 @@ static struct sk_buff *h4_dequeue(struct hci_uart *hu)
 	return skb_dequeue(&h4->txq);
 }

-static const struct hci_uart_proto h4p = {
+static struct hci_uart_proto h4p = {
 	.id		= HCI_UART_H4,
-	.name		= "H4",
 	.open		= h4_open,
 	.close		= h4_close,
 	.recv		= h4_recv,
@@ -143,132 +311,17 @@ static const struct hci_uart_proto h4p = {

 int __init h4_init(void)
 {
-	return hci_uart_register_proto(&h4p);
+	int err = hci_uart_register_proto(&h4p);
+
+	if (!err)
+		BT_INFO("HCI H4 protocol initialized");
+	else
+		BT_ERR("HCI H4 protocol registration failed");
+
+	return err;
 }

 int __exit h4_deinit(void)
 {
 	return hci_uart_unregister_proto(&h4p);
 }
-
-struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
-			    const unsigned char *buffer, int count,
-			    const struct h4_recv_pkt *pkts, int pkts_count)
-{
-	struct hci_uart *hu = hci_get_drvdata(hdev);
-	u8 alignment = hu->alignment ? hu->alignment : 1;
-
-	/* Check for error from previous call */
-	if (IS_ERR(skb))
-		skb = NULL;
-
-	while (count) {
-		int i, len;
-
-		/* remove padding bytes from buffer */
-		for (; hu->padding && count > 0; hu->padding--) {
-			count--;
-			buffer++;
-		}
-		if (!count)
-			break;
-
-		if (!skb) {
-			for (i = 0; i < pkts_count; i++) {
-				if (buffer[0] != (&pkts[i])->type)
-					continue;
-
-				skb = bt_skb_alloc((&pkts[i])->maxlen,
-						   GFP_ATOMIC);
-				if (!skb)
-					return ERR_PTR(-ENOMEM);
-
-				hci_skb_pkt_type(skb) = (&pkts[i])->type;
-				hci_skb_expect(skb) = (&pkts[i])->hlen;
-				break;
-			}
-
-			/* Check for invalid packet type */
-			if (!skb)
-				return ERR_PTR(-EILSEQ);
-
-			count -= 1;
-			buffer += 1;
-		}
-
-		len = min_t(uint, hci_skb_expect(skb) - skb->len, count);
-		skb_put_data(skb, buffer, len);
-
-		count -= len;
-		buffer += len;
-
-		/* Check for partial packet */
-		if (skb->len < hci_skb_expect(skb))
-			continue;
-
-		for (i = 0; i < pkts_count; i++) {
-			if (hci_skb_pkt_type(skb) == (&pkts[i])->type)
-				break;
-		}
-
-		if (i >= pkts_count) {
-			kfree_skb(skb);
-			return ERR_PTR(-EILSEQ);
-		}
-
-		if (skb->len == (&pkts[i])->hlen) {
-			u16 dlen;
-
-			switch ((&pkts[i])->lsize) {
-			case 0:
-				/* No variable data length */
-				dlen = 0;
-				break;
-			case 1:
-				/* Single octet variable length */
-				dlen = skb->data[(&pkts[i])->loff];
-				hci_skb_expect(skb) += dlen;
-
-				if (skb_tailroom(skb) < dlen) {
-					kfree_skb(skb);
-					return ERR_PTR(-EMSGSIZE);
-				}
-				break;
-			case 2:
-				/* Double octet variable length */
-				dlen = get_unaligned_le16(skb->data +
-							  (&pkts[i])->loff);
-				hci_skb_expect(skb) += dlen;
-
-				if (skb_tailroom(skb) < dlen) {
-					kfree_skb(skb);
-					return ERR_PTR(-EMSGSIZE);
-				}
-				break;
-			default:
-				/* Unsupported variable length */
-				kfree_skb(skb);
-				return ERR_PTR(-EILSEQ);
-			}
-
-			if (!dlen) {
-				hu->padding = (skb->len - 1) % alignment;
-				hu->padding = (alignment - hu->padding) % alignment;
-
-				/* No more data, complete frame */
-				(&pkts[i])->recv(hdev, skb);
-				skb = NULL;
-			}
-		} else {
-			hu->padding = (skb->len - 1) % alignment;
-			hu->padding = (alignment - hu->padding) % alignment;
-
-			/* Complete frame */
-			(&pkts[i])->recv(hdev, skb);
-			skb = NULL;
-		}
-	}
-
-	return skb;
-}
-EXPORT_SYMBOL_GPL(h4_recv_buf);
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
--- a/drivers/bluetooth/rtkbt/hci_rtk_h5.c
+++ b/drivers/bluetooth/rtkbt/hci_rtk_h5.c
--- a/drivers/bluetooth/hci_uart.h
+++ b/drivers/bluetooth/hci_uart.h
@@ -1,4 +1,3 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
 *
 *  Bluetooth HCI UART driver
@@ -6,12 +5,50 @@
 *  Copyright (C) 2000-2001  Qualcomm Incorporated
 *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
 *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
+ *
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
 */
+#include <linux/version.h>
+#include <net/bluetooth/bluetooth.h>
+#include <net/bluetooth/hci_core.h>
+
+/* #define HCI_VERSION_CODE KERNEL_VERSION(3, 14, 41) */
+#define HCI_VERSION_CODE LINUX_VERSION_CODE

 #ifndef N_HCI
 #define N_HCI	15
 #endif

+#ifndef CONFIG_BT_HCIUART_H4
+#define CONFIG_BT_HCIUART_H4
+#endif
+
+#define BTCOEX
+
+/* Send host sleep notification to Controller */
+#define WOBT_NOTIFY		0	/* 1  enable; 0  disable */
+
+/* Send LE whitelist only for Background scan parameters */
+#define WOBT_NOTIFY_BG_SCAN_LE_WHITELIST_ONLY	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
+
+/* RTKBT Power-on Whitelist for sideband wake-up by LE Advertising from Remote.
+* Note that it's necessary to apply TV FW Patch. */
+#define RTKBT_TV_POWERON_WHITELIST	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
+
 /* Ioctls */
 #define HCIUARTSETPROTO		_IOW('U', 200, int)
 #define HCIUARTGETPROTO		_IOR('U', 201, int)
@@ -20,7 +57,7 @@
 #define HCIUARTGETFLAGS		_IOR('U', 204, int)

 /* UART protocols */
-#define HCI_UART_MAX_PROTO	12
+#define HCI_UART_MAX_PROTO	6

 #define HCI_UART_H4	0
 #define HCI_UART_BCSP	1
@@ -28,12 +65,6 @@
 #define HCI_UART_H4DS	3
 #define HCI_UART_LL	4
 #define HCI_UART_ATH3K	5
-#define HCI_UART_INTEL	6
-#define HCI_UART_BCM	7
-#define HCI_UART_QCA	8
-#define HCI_UART_AG6XX	9
-#define HCI_UART_NOKIA	10
-#define HCI_UART_MRVL	11

 #define HCI_UART_RAW_DEVICE	0
 #define HCI_UART_RESET_ON_INIT	1
@@ -43,46 +74,42 @@
 #define HCI_UART_VND_DETECT	5

 struct hci_uart;
-struct serdev_device;

 struct hci_uart_proto {
 	unsigned int id;
-	const char *name;
-	unsigned int manufacturer;
-	unsigned int init_speed;
-	unsigned int oper_speed;
 	int (*open)(struct hci_uart *hu);
 	int (*close)(struct hci_uart *hu);
 	int (*flush)(struct hci_uart *hu);
-	int (*setup)(struct hci_uart *hu);
-	int (*set_baudrate)(struct hci_uart *hu, unsigned int speed);
-	int (*recv)(struct hci_uart *hu, const void *data, int len);
+	int (*recv)(struct hci_uart *hu, void *data, int len);
 	int (*enqueue)(struct hci_uart *hu, struct sk_buff *skb);
 	struct sk_buff *(*dequeue)(struct hci_uart *hu);
 };

 struct hci_uart {
 	struct tty_struct	*tty;
-	struct serdev_device	*serdev;
 	struct hci_dev		*hdev;
 	unsigned long		flags;
 	unsigned long		hdev_flags;

-	struct work_struct	init_ready;
 	struct work_struct	write_work;
+	struct workqueue_struct *hci_uart_wq;

-	const struct hci_uart_proto *proto;
-	struct percpu_rw_semaphore proto_lock;	/* Stop work for proto close */
+	struct hci_uart_proto	*proto;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)
+	struct percpu_rw_semaphore proto_lock; /* Stop work for proto close */
+#else
+	struct rw_semaphore proto_lock;
+#endif
 	void			*priv;

+	struct semaphore tx_sem;	/* semaphore for tx */
+
 	struct sk_buff		*tx_skb;
 	unsigned long		tx_state;

-	unsigned int init_speed;
-	unsigned int oper_speed;
-
-	u8			alignment;
-	u8			padding;
+#if WOBT_NOTIFY
+	struct notifier_block pm_notify_block;
+#endif
 };

 /* HCI_UART proto flag bits */
@@ -94,108 +121,20 @@ struct hci_uart {
 #define HCI_UART_SENDING	1
 #define HCI_UART_TX_WAKEUP	2

-int hci_uart_register_proto(const struct hci_uart_proto *p);
-int hci_uart_unregister_proto(const struct hci_uart_proto *p);
-int hci_uart_register_device(struct hci_uart *hu, const struct hci_uart_proto *p);
-void hci_uart_unregister_device(struct hci_uart *hu);
-
-int hci_uart_tx_wakeup(struct hci_uart *hu);
-int hci_uart_wait_until_sent(struct hci_uart *hu);
-int hci_uart_init_ready(struct hci_uart *hu);
-void hci_uart_init_work(struct work_struct *work);
-void hci_uart_set_baudrate(struct hci_uart *hu, unsigned int speed);
-bool hci_uart_has_flow_control(struct hci_uart *hu);
-void hci_uart_set_flow_control(struct hci_uart *hu, bool enable);
-void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed,
-			 unsigned int oper_speed);
+extern int hci_uart_register_proto(struct hci_uart_proto *p);
+extern int hci_uart_unregister_proto(struct hci_uart_proto *p);
+extern int hci_uart_tx_wakeup(struct hci_uart *hu);

 #ifdef CONFIG_BT_HCIUART_H4
-int h4_init(void);
-int h4_deinit(void);
-
-struct h4_recv_pkt {
-	u8  type;	/* Packet type */
-	u8  hlen;	/* Header length */
-	u8  loff;	/* Data length offset in header */
-	u8  lsize;	/* Data length field size */
-	u16 maxlen;	/* Max overall packet length */
-	int (*recv)(struct hci_dev *hdev, struct sk_buff *skb);
-};
-
-#define H4_RECV_ACL \
-	.type = HCI_ACLDATA_PKT, \
-	.hlen = HCI_ACL_HDR_SIZE, \
-	.loff = 2, \
-	.lsize = 2, \
-	.maxlen = HCI_MAX_FRAME_SIZE \
-
-#define H4_RECV_SCO \
-	.type = HCI_SCODATA_PKT, \
-	.hlen = HCI_SCO_HDR_SIZE, \
-	.loff = 2, \
-	.lsize = 1, \
-	.maxlen = HCI_MAX_SCO_SIZE
-
-#define H4_RECV_EVENT \
-	.type = HCI_EVENT_PKT, \
-	.hlen = HCI_EVENT_HDR_SIZE, \
-	.loff = 1, \
-	.lsize = 1, \
-	.maxlen = HCI_MAX_EVENT_SIZE
-
-#define H4_RECV_ISO \
-	.type = HCI_ISODATA_PKT, \
-	.hlen = HCI_ISO_HDR_SIZE, \
-	.loff = 2, \
-	.lsize = 2, \
-	.maxlen = HCI_MAX_FRAME_SIZE \
-
-struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
-			    const unsigned char *buffer, int count,
-			    const struct h4_recv_pkt *pkts, int pkts_count);
+extern int h4_init(void);
+extern int h4_deinit(void);
 #endif

-#ifdef CONFIG_BT_HCIUART_BCSP
-int bcsp_init(void);
-int bcsp_deinit(void);
-#endif
+extern int h5_init(void);
+extern int h5_deinit(void);

-#ifdef CONFIG_BT_HCIUART_LL
-int ll_init(void);
-int ll_deinit(void);
-#endif
-
-#ifdef CONFIG_BT_HCIUART_ATH3K
-int ath_init(void);
-int ath_deinit(void);
-#endif
-
-#ifdef CONFIG_BT_HCIUART_3WIRE
-int h5_init(void);
-int h5_deinit(void);
-#endif
-
-#ifdef CONFIG_BT_HCIUART_INTEL
-int intel_init(void);
-int intel_deinit(void);
-#endif
-
-#ifdef CONFIG_BT_HCIUART_BCM
-int bcm_init(void);
-int bcm_deinit(void);
-#endif
-
-#ifdef CONFIG_BT_HCIUART_QCA
-int qca_init(void);
-int qca_deinit(void);
-#endif
-
-#ifdef CONFIG_BT_HCIUART_AG6XX
-int ag6xx_init(void);
-int ag6xx_deinit(void);
-#endif
-
-#ifdef CONFIG_BT_HCIUART_MRVL
-int mrvl_init(void);
-int mrvl_deinit(void);
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+extern int hci_uart_send_frame(struct sk_buff *skb);
+#else
+extern int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb);
 #endif
--- a/drivers/bluetooth/rtkbt/rtk_coex.c
+++ b/drivers/bluetooth/rtkbt/rtk_coex.c
--- a/drivers/bluetooth/rtkbt/rtk_coex.h
+++ b/drivers/bluetooth/rtkbt/rtk_coex.h
--- a/drivers/bluetooth/rtkbt/Kconfig
+++ b/drivers/bluetooth/rtkbt/Kconfig
@@ -1,5 +0,0 @@
-config BT_RTKBT
-	tristate "BT_RTKBT"
-	default n
-	help
-	  Help message of RTKBT
--- a/drivers/bluetooth/rtkbt/Makefile
+++ b/drivers/bluetooth/rtkbt/Makefile
@@ -1,2 +0,0 @@
-obj-$(CONFIG_BT_RTKBT)			:= rtkbt.o
-rtkbt-objs		:= hci_ldisc.o hci_h4.o hci_rtk_h5.o rtk_coex.o
--- a/drivers/bluetooth/rtkbt/hci_h4.c
+++ b/drivers/bluetooth/rtkbt/hci_h4.c
@@ -1,327 +0,0 @@
-/*
- *
- *  Bluetooth HCI UART driver
- *
- *  Copyright (C) 2000-2001  Qualcomm Incorporated
- *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
- *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/interrupt.h>
-#include <linux/ptrace.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/tty.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/signal.h>
-#include <linux/ioctl.h>
-#include <linux/skbuff.h>
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-#include <linux/version.h>
-
-#include "hci_uart.h"
-
-#ifdef BTCOEX
-#include "rtk_coex.h"
-#endif
-
-//#define VERSION "1.2"
-
-struct h4_struct {
-	unsigned long rx_state;
-	unsigned long rx_count;
-	struct sk_buff *rx_skb;
-	struct sk_buff_head txq;
-};
-
-/* H4 receiver States */
-#define H4_W4_PACKET_TYPE	0
-#define H4_W4_EVENT_HDR		1
-#define H4_W4_ACL_HDR		2
-#define H4_W4_SCO_HDR		3
-#define H4_W4_DATA		4
-
-/* Initialize protocol */
-static int h4_open(struct hci_uart *hu)
-{
-	struct h4_struct *h4;
-
-	BT_DBG("hu %p", hu);
-
-	h4 = kzalloc(sizeof(*h4), GFP_ATOMIC);
-	if (!h4)
-		return -ENOMEM;
-
-	skb_queue_head_init(&h4->txq);
-
-	hu->priv = h4;
-	return 0;
-}
-
-/* Flush protocol data */
-static int h4_flush(struct hci_uart *hu)
-{
-	struct h4_struct *h4 = hu->priv;
-
-	BT_DBG("hu %p", hu);
-
-	skb_queue_purge(&h4->txq);
-
-	return 0;
-}
-
-/* Close protocol */
-static int h4_close(struct hci_uart *hu)
-{
-	struct h4_struct *h4 = hu->priv;
-
-	hu->priv = NULL;
-
-	BT_DBG("hu %p", hu);
-
-	skb_queue_purge(&h4->txq);
-
-	kfree_skb(h4->rx_skb);
-
-	hu->priv = NULL;
-	kfree(h4);
-
-	return 0;
-}
-
-/* Enqueue frame for transmittion (padding, crc, etc) */
-static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
-{
-	struct h4_struct *h4 = hu->priv;
-
-	BT_DBG("hu %p skb %p", hu, skb);
-
-	/* Prepend skb with frame type */
-	memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
-	skb_queue_tail(&h4->txq, skb);
-
-	return 0;
-}
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-static inline int h4_check_data_len(struct h4_struct *h4, int len)
-#else
-static inline int h4_check_data_len(struct hci_dev *hdev, struct h4_struct *h4, int len)
-#endif
-{
-	register int room = skb_tailroom(h4->rx_skb);
-
-	BT_DBG("len %d room %d", len, room);
-
-	if (!len) {
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-		hci_recv_frame(h4->rx_skb);
-#else
-		hci_recv_frame(hdev, h4->rx_skb);
-#endif
-	} else if (len > room) {
-		BT_ERR("Data length is too large");
-		kfree_skb(h4->rx_skb);
-	} else {
-		h4->rx_state = H4_W4_DATA;
-		h4->rx_count = len;
-		return len;
-	}
-
-	h4->rx_state = H4_W4_PACKET_TYPE;
-	h4->rx_skb   = NULL;
-	h4->rx_count = 0;
-
-	return 0;
-}
-
-/* Recv data */
-static int h4_recv(struct hci_uart *hu, void *data, int count)
-{
-	struct h4_struct *h4 = hu->priv;
-	register char *ptr;
-	struct hci_event_hdr *eh;
-	struct hci_acl_hdr   *ah;
-	struct hci_sco_hdr   *sh;
-	register int len, type, dlen;
-
-	BT_DBG("hu %p count %d rx_state %ld rx_count %ld", 
-			hu, count, h4->rx_state, h4->rx_count);
-
-	ptr = data;
-	while (count) {
-		if (h4->rx_count) {
-			len = min_t(unsigned int, h4->rx_count, count);
-			memcpy(skb_put(h4->rx_skb, len), ptr, len);
-			h4->rx_count -= len; count -= len; ptr += len;
-
-			if (h4->rx_count)
-				continue;
-
-			switch (h4->rx_state) {
-			case H4_W4_DATA:
-				BT_DBG("Complete data");
-#ifdef BTCOEX
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_EVENT_PKT)
-					rtk_btcoex_parse_event(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
-					rtk_btcoex_parse_l2cap_data_rx(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-#endif
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				hci_recv_frame(h4->rx_skb);
-#else
-				hci_recv_frame(hu->hdev, h4->rx_skb);
-#endif
-
-				h4->rx_state = H4_W4_PACKET_TYPE;
-				h4->rx_skb = NULL;
-				continue;
-
-			case H4_W4_EVENT_HDR:
-				eh = hci_event_hdr(h4->rx_skb);
-
-				BT_DBG("Event header: evt 0x%2.2x plen %d", eh->evt, eh->plen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, eh->plen);
-#else
-				h4_check_data_len(hu->hdev, h4, eh->plen);
-#endif
-				continue;
-
-			case H4_W4_ACL_HDR:
-				ah = hci_acl_hdr(h4->rx_skb);
-				dlen = __le16_to_cpu(ah->dlen);
-
-				BT_DBG("ACL header: dlen %d", dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, dlen);
-#endif
-				continue;
-
-			case H4_W4_SCO_HDR:
-				sh = hci_sco_hdr(h4->rx_skb);
-
-				BT_DBG("SCO header: dlen %d", sh->dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, sh->dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, sh->dlen);
-#endif
-				continue;
-			}
-		}
-
-		/* H4_W4_PACKET_TYPE */
-		switch (*ptr) {
-		case HCI_EVENT_PKT:
-			BT_DBG("Event packet");
-			h4->rx_state = H4_W4_EVENT_HDR;
-			h4->rx_count = HCI_EVENT_HDR_SIZE;
-			type = HCI_EVENT_PKT;
-			break;
-
-		case HCI_ACLDATA_PKT:
-			BT_DBG("ACL packet");
-			h4->rx_state = H4_W4_ACL_HDR;
-			h4->rx_count = HCI_ACL_HDR_SIZE;
-			type = HCI_ACLDATA_PKT;
-			break;
-
-		case HCI_SCODATA_PKT:
-			BT_DBG("SCO packet");
-			h4->rx_state = H4_W4_SCO_HDR;
-			h4->rx_count = HCI_SCO_HDR_SIZE;
-			type = HCI_SCODATA_PKT;
-			break;
-
-		default:
-			BT_ERR("Unknown HCI packet type %2.2x", (__u8)*ptr);
-			hu->hdev->stat.err_rx++;
-			ptr++; count--;
-			continue;
-		};
-
-		ptr++; count--;
-
-		/* Allocate packet */
-		h4->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
-		if (!h4->rx_skb) {
-			BT_ERR("Can't allocate mem for new packet");
-			h4->rx_state = H4_W4_PACKET_TYPE;
-			h4->rx_count = 0;
-			return -ENOMEM;
-		}
-
-		h4->rx_skb->dev = (void *) hu->hdev;
-		bt_cb(h4->rx_skb)->pkt_type = type;
-	}
-
-	return count;
-}
-
-static struct sk_buff *h4_dequeue(struct hci_uart *hu)
-{
-	struct h4_struct *h4 = hu->priv;
-	return skb_dequeue(&h4->txq);
-}
-
-static struct hci_uart_proto h4p = {
-	.id		= HCI_UART_H4,
-	.open		= h4_open,
-	.close		= h4_close,
-	.recv		= h4_recv,
-	.enqueue	= h4_enqueue,
-	.dequeue	= h4_dequeue,
-	.flush		= h4_flush,
-};
-
-int __init h4_init(void)
-{
-	int err = hci_uart_register_proto(&h4p);
-
-	if (!err)
-		BT_INFO("HCI H4 protocol initialized");
-	else
-		BT_ERR("HCI H4 protocol registration failed");
-
-	return err;
-}
-
-int __exit h4_deinit(void)
-{
-	return hci_uart_unregister_proto(&h4p);
-}
--- a/drivers/bluetooth/rtkbt/hci_ldisc.c
+++ b/drivers/bluetooth/rtkbt/hci_ldisc.c
--- a/drivers/bluetooth/rtkbt/hci_uart.h
+++ b/drivers/bluetooth/rtkbt/hci_uart.h
@@ -1,145 +0,0 @@
-/*
- *
- *  Bluetooth HCI UART driver
- *
- *  Copyright (C) 2000-2001  Qualcomm Incorporated
- *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
- *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-#include <linux/version.h>
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-
-/* #define HCI_VERSION_CODE KERNEL_VERSION(3, 14, 41) */
-#define HCI_VERSION_CODE LINUX_VERSION_CODE
-
-#ifndef N_HCI
-#define N_HCI	15
-#endif
-
-#ifndef CONFIG_BT_HCIUART_H4
-#define CONFIG_BT_HCIUART_H4
-#endif
-
-#define BTCOEX
-
-/* Send host sleep notification to Controller */
-#define WOBT_NOTIFY		0	/* 1  enable; 0  disable */
-
-/* Send LE whitelist only for Background scan parameters */
-#define WOBT_NOTIFY_BG_SCAN_LE_WHITELIST_ONLY	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
-/* RTKBT Power-on Whitelist for sideband wake-up by LE Advertising from Remote.
-* Note that it's necessary to apply TV FW Patch. */
-#define RTKBT_TV_POWERON_WHITELIST	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
-/* RTKBT Power-on Data Filter for Manufacturer field */
-/* Note that please edit the datafilter in
- *   rtkbt_set_le_device_poweron_data_filter() of hci_ldisc.c */
-#define RTKBT_TV_POWERON_DATA_FILTER	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
-/* Ioctls */
-#define HCIUARTSETPROTO		_IOW('U', 200, int)
-#define HCIUARTGETPROTO		_IOR('U', 201, int)
-#define HCIUARTGETDEVICE	_IOR('U', 202, int)
-#define HCIUARTSETFLAGS		_IOW('U', 203, int)
-#define HCIUARTGETFLAGS		_IOR('U', 204, int)
-
-/* UART protocols */
-#define HCI_UART_MAX_PROTO	6
-
-#define HCI_UART_H4	0
-#define HCI_UART_BCSP	1
-#define HCI_UART_3WIRE	2
-#define HCI_UART_H4DS	3
-#define HCI_UART_LL	4
-#define HCI_UART_ATH3K	5
-
-#define HCI_UART_RAW_DEVICE	0
-#define HCI_UART_RESET_ON_INIT	1
-#define HCI_UART_CREATE_AMP	2
-#define HCI_UART_INIT_PENDING	3
-#define HCI_UART_EXT_CONFIG	4
-#define HCI_UART_VND_DETECT	5
-
-struct hci_uart;
-
-struct hci_uart_proto {
-	unsigned int id;
-	int (*open)(struct hci_uart *hu);
-	int (*close)(struct hci_uart *hu);
-	int (*flush)(struct hci_uart *hu);
-	int (*recv)(struct hci_uart *hu, void *data, int len);
-	int (*enqueue)(struct hci_uart *hu, struct sk_buff *skb);
-	struct sk_buff *(*dequeue)(struct hci_uart *hu);
-};
-
-struct hci_uart {
-	struct tty_struct	*tty;
-	struct hci_dev		*hdev;
-	unsigned long		flags;
-	unsigned long		hdev_flags;
-
-	struct work_struct	write_work;
-	struct workqueue_struct *hci_uart_wq;
-
-	struct hci_uart_proto	*proto;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)
-	struct percpu_rw_semaphore proto_lock; /* Stop work for proto close */
-#else
-	struct rw_semaphore proto_lock;
-#endif
-	void			*priv;
-
-	struct semaphore tx_sem;	/* semaphore for tx */
-
-	struct sk_buff		*tx_skb;
-	unsigned long		tx_state;
-
-#if WOBT_NOTIFY
-	struct notifier_block pm_notify_block;
-#endif
-};
-
-/* HCI_UART proto flag bits */
-#define HCI_UART_PROTO_SET	0
-#define HCI_UART_REGISTERED	1
-#define HCI_UART_PROTO_READY	2
-
-/* TX states  */
-#define HCI_UART_SENDING	1
-#define HCI_UART_TX_WAKEUP	2
-
-extern int hci_uart_register_proto(struct hci_uart_proto *p);
-extern int hci_uart_unregister_proto(struct hci_uart_proto *p);
-extern int hci_uart_tx_wakeup(struct hci_uart *hu);
-
-#ifdef CONFIG_BT_HCIUART_H4
-extern int h4_init(void);
-extern int h4_deinit(void);
-#endif
-
-extern int h5_init(void);
-extern int h5_deinit(void);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-extern int hci_uart_send_frame(struct sk_buff *skb);
-#else
-extern int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb);
-#endif
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -3403,6 +3403,16 @@ static void clk_debug_unregister(struct clk_core *core)
 	core->dentry = NULL;
 	mutex_unlock(&clk_debug_lock);
 }
+static bool noclk_debug_init = false;
+
+/* noclkdebug bootargs: for option not init ftrace*/
+static int __init noclk_debug_setup(char *str)
+{
+	noclk_debug_init = true;
+	return 1;
+}
+
+__setup("noclkdebug", noclk_debug_setup);

 /**
 * clk_debug_init - lazily populate the debugfs clk directory
@@ -3417,6 +3427,8 @@ static int __init clk_debug_init(void)
 {
 	struct clk_core *core;

+	if(noclk_debug_init)
+		return 0;
 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
 	pr_warn("\n");
 	pr_warn("********************************************************************\n");
--- a/drivers/clk/thead/clk-light-fm.c
+++ b/drivers/clk/thead/clk-light-fm.c
@@ -430,7 +430,7 @@ static int light_clocks_probe(struct platform_device *pdev)
 	clks[VISYS_AHB_HCLK] = thead_clk_light_divider("visys_ahb_hclk", "video_pll_foutvco", ap_base + 0x1d0, 0, 4, 4, MUX_TYPE_DIV, 6, 15);
 	clks[VPSYS_APB_PCLK] = thead_clk_light_divider("vpsys_apb_pclk", "gmac_pll_fout1ph0", ap_base + 0x1e0, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
 	clks[VPSYS_AXI_ACLK] = thead_clk_light_divider("vpsys_axi_aclk", "video_pll_foutvco", ap_base + 0x1e0, 8, 4, 12, MUX_TYPE_DIV, 3, 15);
-	clks[VENC_CCLK] = thead_clk_light_divider("venc_cclk", "gmac_pll_foutpostdiv", ap_base + 0x1e4, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
+	clks[VENC_CCLK] = thead_clk_light_divider_closest("venc_cclk", "gmac_pll_foutpostdiv", ap_base + 0x1e4, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
 	clks[DPU0_PLL_DIV_CLK] = thead_clk_light_divider("dpu0_pll_div_clk", "dpu0_pll_foutpostdiv", ap_base + 0x1e8, 0, 8, 8, MUX_TYPE_DIV, 2, 214);
 	clks[DPU1_PLL_DIV_CLK] = thead_clk_light_divider("dpu1_pll_div_clk", "dpu1_pll_foutpostdiv", ap_base + 0x1ec, 0, 8, 8, MUX_TYPE_DIV, 2, 214);

--- a/drivers/clk/thead/clk.c
+++ b/drivers/clk/thead/clk.c
@@ -550,7 +550,12 @@ static int clk_lightdiv_set_rate(struct clk_hw *hw, unsigned long rate,
 	unsigned long flags = 0;
 	u32 val;

-	divider = parent_rate / rate;
+	/** 
+	 * The clk-divider will calculate the node frequency by rounding up 
+	 * based on the parent frequency and the target divider.
+	 * This calculation is to restore accurate frequency divider. 
+	*/
+	divider = DIV64_U64_ROUND_CLOSEST(parent_rate, rate);

 	/* DIV is zero based divider, but CDE is not */
 	if (light_div->div_type == MUX_TYPE_DIV)
@@ -592,10 +597,10 @@ static const struct clk_ops clk_lightdiv_ops = {
 	.set_rate = clk_lightdiv_set_rate,
 };

-struct clk *thead_clk_light_divider(const char *name, const char *parent,
+static struct clk *thead_clk_light_divider_internal(const char *name, const char *parent,
 				       void __iomem *reg, u8 shift, u8 width,
 				       u8 sync, enum light_div_type div_type,
-				       u16 min, u16 max)
+				       u16 min, u16 max, bool closest)
 {
 	struct clk_lightdiv *light_div;
 	struct clk_hw *hw;
@@ -622,6 +627,10 @@ struct clk *thead_clk_light_divider(const char *name, const char *parent,
 	light_div->div_type = div_type;
 	if (light_div->div_type == MUX_TYPE_DIV)
 		light_div->divider.flags = CLK_DIVIDER_ONE_BASED;
+
+	if (closest)
+		light_div->divider.flags |= CLK_DIVIDER_ROUND_CLOSEST;
+
 	light_div->min_div = min > ((1 << width) - 1) ?
 			     ((1 << width) - 1) : min;
 	light_div->max_div = max > ((1 << width) - 1) ?
@@ -638,6 +647,24 @@ struct clk *thead_clk_light_divider(const char *name, const char *parent,
 	return hw->clk;
 }

+struct clk *thead_clk_light_divider(const char *name, const char *parent,
+				       void __iomem *reg, u8 shift, u8 width,
+				       u8 sync, enum light_div_type div_type,
+				       u16 min, u16 max)
+{
+	return thead_clk_light_divider_internal(name, parent, reg, shift, width,
+											sync, div_type, min, max, false);
+}
+
+struct clk *thead_clk_light_divider_closest(const char *name, const char *parent,
+				       void __iomem *reg, u8 shift, u8 width,
+				       u8 sync, enum light_div_type div_type,
+				       u16 min, u16 max)
+{
+	return thead_clk_light_divider_internal(name, parent, reg, shift, width,
+											sync, div_type, min, max, true);
+}
+
 static inline struct clk_lightgate *to_clk_lightgate(struct clk_hw *hw)
 {
 	struct clk_gate *gate = to_clk_gate(hw);
--- a/drivers/clk/thead/clk.h
+++ b/drivers/clk/thead/clk.h
@@ -90,6 +90,15 @@ struct clk *thead_clk_light_divider(const char *name, const char *parent,
 				    u8 sync, enum light_div_type div_type,
 				    u16 min, u16 max);

+/**
+* By default, the clk framework calculates frequency by rounding downwards.
+* This function is to achieve closest frequency.
+*/
+struct clk *thead_clk_light_divider_closest(const char *name, const char *parent,
+				    void __iomem *reg, u8 shift, u8 width,
+				    u8 sync, enum light_div_type div_type,
+				    u16 min, u16 max);
+
 void thead_unregister_clocks(struct clk *clks[], unsigned int count);

 static inline struct clk *thead_clk_fixed(const char *name, unsigned long rate)
--- a/drivers/firmware/thead/Makefile
+++ b/drivers/firmware/thead/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_LIGHT_AON)	+= light_aon.o light_aon_misc.o light_aon_test.o
 obj-$(CONFIG_LIGHT_AON_PD) += light_aon_pd.o
+obj-y += light_proc_debug.o
--- a/drivers/firmware/thead/light_aon.c
+++ b/drivers/firmware/thead/light_aon.c
@@ -12,7 +12,12 @@
 #include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
+#include <linux/proc_fs.h>
+#include <linux/light_proc_debug.h>
+#include <linux/firmware/thead/ipc.h>

 /* wait for response for 3000ms instead of 300ms (fix me pls)*/
 #define MAX_RX_TIMEOUT		(msecs_to_jiffies(3000))
@@ -24,6 +29,12 @@ struct light_aon_chan {
 	struct mbox_client cl;
 	struct mbox_chan *ch;
 	struct completion tx_done;
+    /*for log proc*/
+	phys_addr_t log_phy;
+	size_t log_size;
+	void __iomem *log_mem;
+	void *log_ctrl;
+    struct proc_dir_entry *proc_dir;
 };

 struct light_aon_ipc {
@@ -101,9 +112,11 @@ static void light_aon_rx_callback(struct mbox_client *c, void *msg)
 {
 	struct light_aon_chan *aon_chan = container_of(c, struct light_aon_chan, cl);
 	struct light_aon_ipc *aon_ipc = aon_chan->aon_ipc;
+	struct light_aon_rpc_msg_hdr* hdr = (struct light_aon_rpc_msg_hdr*)msg;
+	uint8_t recv_size  = sizeof(struct light_aon_rpc_msg_hdr) + hdr->size;

-	memcpy(aon_ipc->msg, msg, LIGHT_AON_RPC_MSG_NUM * sizeof(u32));
-	dev_dbg(aon_ipc->dev, "msg head: 0x%x\n", *((u32 *)msg));
+	memcpy(aon_ipc->msg, msg, recv_size);
+	dev_dbg(aon_ipc->dev, "msg head: 0x%x, size:%d\n", *((u32 *)msg), recv_size);
 	complete(&aon_ipc->done);
 }

@@ -140,19 +153,29 @@ static int light_aon_ipc_write(struct light_aon_ipc *aon_ipc, void *msg)
 /*
 * RPC command/response
 */
-int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, bool have_resp)
+int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, void *ack_msg, bool have_resp)
 {
-	struct light_aon_rpc_msg_hdr *hdr;
-	int ret;
+	struct light_aon_rpc_msg_hdr *hdr = msg;
+	int ret = 0;

 	if (WARN_ON(!aon_ipc || !msg))
 		return -EINVAL;
-
+	if(have_resp && WARN_ON(!ack_msg))
+	    return -EINVAL;
 	mutex_lock(&aon_ipc->lock);
 	reinit_completion(&aon_ipc->done);

-	if (have_resp)
-		aon_ipc->msg = msg;
+	RPC_SET_VER(hdr, LIGHT_AON_RPC_VERSION);
+	/*svc id use 6bit for version 2*/
+    RPC_SET_SVC_ID(hdr, hdr->svc);
+	RPC_SET_SVC_FLAG_MSG_TYPE(hdr, RPC_SVC_MSG_TYPE_DATA);
+
+	if (have_resp){
+        aon_ipc->msg = ack_msg;
+		RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NEED_ACK);
+	} else {
+		RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NO_NEED_ACK);
+	}

 	ret = light_aon_ipc_write(aon_ipc, msg);
 	if (ret < 0) {
@@ -168,9 +191,9 @@ int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, bool have_resp)
 			return -ETIMEDOUT;
 		}

-		/* response status is stored in hdr->func field */
-		hdr = msg;
-		ret = hdr->func;
+		/* response status is stored in msg data[0] field */
+		struct light_aon_rpc_ack_common* ack = ack_msg;
+		ret = ack->err_code;
 	}

 out:
@@ -182,12 +205,41 @@ out:
 }
 EXPORT_SYMBOL(light_aon_call_rpc);

+int  get_aon_log_mem(struct device *dev, phys_addr_t* mem, size_t* mem_size)
+{
+    struct resource r;
+	ssize_t fw_size;
+	void *mem_va;
+	struct device_node *node;
+	int ret;
+
+	*mem = 0;
+	*mem_size = 0;
+
+	node = of_parse_phandle(dev->of_node, "log-memory-region", 0);
+	if (!node) {
+		dev_err(dev, "no memory-region specified\n");
+		return -EINVAL;
+	}
+
+	ret = of_address_to_resource(node, 0, &r);
+	if (ret) {
+	    dev_err(dev, "memory-region get resource faild\n");
+		return -EINVAL;
+	}
+
+	*mem = r.start;
+	*mem_size = resource_size(&r);
+    return 0;
+}
+
 static int light_aon_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct light_aon_ipc *aon_ipc;
 	struct light_aon_chan *aon_chan;
 	struct mbox_client *cl;
+	char dir_name[32] = {0x0};
 	int ret;

 	aon_ipc = devm_kzalloc(dev, sizeof(*aon_ipc), GFP_KERNEL);
@@ -220,7 +272,33 @@ static int light_aon_probe(struct platform_device *pdev)
 	aon_ipc->dev = dev;
 	mutex_init(&aon_ipc->lock);
 	init_completion(&aon_ipc->done);
+    aon_chan->log_ctrl = NULL;

+    ret = get_aon_log_mem(dev, &aon_chan->log_phy, &aon_chan->log_size);
+	if(ret) {
+      return ret;
+	}
+    aon_chan->log_mem = ioremap(aon_chan->log_phy, aon_chan->log_size);
+	if (!IS_ERR(aon_chan->log_mem)) {
+		printk("%s:virtual_log_mem=0x%p, phy base=0x%llx,size:%d\n",
+			__func__, aon_chan->log_mem, aon_chan->log_phy,
+			aon_chan->log_size);
+	} else {
+		aon_chan->log_mem = NULL;
+		dev_err(dev, "%s:get aon log region fail\n",
+				__func__);
+		return -1;
+	}
+
+	sprintf(dir_name, "aon_proc");
+    aon_chan->proc_dir = proc_mkdir(dir_name, NULL);
+    if (NULL != aon_chan->proc_dir) {
+		aon_chan->log_ctrl = light_create_panic_log_proc(aon_chan->log_phy,
+			aon_chan->proc_dir, aon_chan->log_mem, aon_chan->log_size);
+	} else {
+		dev_err(dev, "create %s fail\n", dir_name);
+		return ret;
+	}
 	light_aon_ipc_handle = aon_ipc;

 	return devm_of_platform_populate(dev);
--- a/drivers/firmware/thead/light_aon_misc.c
+++ b/drivers/firmware/thead/light_aon_misc.c
@@ -11,37 +11,37 @@ struct light_aon_msg_req_misc_set_ctrl {
 	u32 val;
 	u16 resource;
 	u16 reserved[7];
-} __packed __aligned(4);
+} __packed __aligned(1);

 struct light_aon_msg_req_misc_get_ctrl {
 	struct light_aon_rpc_msg_hdr hdr;
 	u32 ctrl;
 	u16 resource;
 	u16 reserved[9];
-} __packed __aligned(4);
+} __packed __aligned(1);

 struct light_aon_msg_resp_misc_get_ctrl {
-	struct light_aon_rpc_msg_hdr hdr;
+	struct light_aon_rpc_ack_common ack_hdr;
 	u32 val;
 	u32 reserved[5];
-} __packed __aligned(4);
+} __packed __aligned(1);

 int light_aon_misc_set_control(struct light_aon_ipc *ipc, u16 resource,
 			    u32 ctrl, u32 val)
 {
 	struct light_aon_msg_req_misc_set_ctrl msg;
+	struct light_aon_rpc_ack_common ack_msg;
 	struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;

-	hdr->ver = LIGHT_AON_RPC_VERSION;
 	hdr->svc = (uint8_t)LIGHT_AON_RPC_SVC_MISC;
 	hdr->func = (uint8_t)LIGHT_AON_MISC_FUNC_SET_CONTROL;
 	hdr->size = LIGHT_AON_RPC_MSG_NUM;

-	msg.ctrl = ctrl;
-	msg.val = val;
-	msg.resource = resource;
+	RPC_SET_BE32(&msg.ctrl, 0, ctrl);
+	RPC_SET_BE32(&msg.ctrl, 4, val);
+	RPC_SET_BE16(&msg.ctrl, 8, resource);

-	return light_aon_call_rpc(ipc, &msg, true);
+	return light_aon_call_rpc(ipc, &msg, &ack_msg, true);
 }
 EXPORT_SYMBOL(light_aon_misc_set_control);

@@ -49,25 +49,23 @@ int light_aon_misc_get_control(struct light_aon_ipc *ipc, u16 resource,
 			    u32 ctrl, u32 *val)
 {
 	struct light_aon_msg_req_misc_get_ctrl msg;
-	struct light_aon_msg_resp_misc_get_ctrl *resp;
+	struct light_aon_msg_resp_misc_get_ctrl resp;
 	struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
 	int ret;

-	hdr->ver = LIGHT_AON_RPC_VERSION;
 	hdr->svc = (uint8_t)LIGHT_AON_RPC_SVC_MISC;
 	hdr->func = (uint8_t)LIGHT_AON_MISC_FUNC_GET_CONTROL;
 	hdr->size = LIGHT_AON_RPC_MSG_NUM;

-	msg.ctrl = ctrl;
-	msg.resource = resource;
+	RPC_SET_BE32(&msg.ctrl, 0, ctrl);
+	RPC_SET_BE16(&msg.ctrl, 4, resource);

-	ret = light_aon_call_rpc(ipc, &msg, true);
+	ret = light_aon_call_rpc(ipc, &msg, &resp, true);
 	if (ret)
 		return ret;

-	resp = (struct light_aon_msg_resp_misc_get_ctrl *)&msg;
 	if (val != NULL)
-		*val = resp->val;
+		RPC_GET_BE32(&resp.val, 0, val);

 	return 0;
 }
--- a/drivers/firmware/thead/light_aon_pd.c
+++ b/drivers/firmware/thead/light_aon_pd.c
@@ -23,7 +23,7 @@ struct light_aon_msg_req_set_resource_power_mode {
 	u16 resource;
 	u16 mode;
 	u16 reserved[10];
-} __packed __aligned(4);
+} __packed __aligned(1);

 #define LIGHT_AONU_PD_NAME_SIZE 20
 #define LIGHT_AONU_PD_STATE_NAME_SIZE 10
@@ -79,21 +79,21 @@ static inline struct light_aon_pm_domain *to_light_aon_pd(struct generic_pm_doma
 static int light_aon_pd_power(struct generic_pm_domain *domain, bool power_on)
 {
 	struct light_aon_msg_req_set_resource_power_mode msg;
+	struct light_aon_rpc_ack_common  ack_msg;
 	struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
 	struct light_aon_pm_domain *pd;
 	int ret;

 	pd = to_light_aon_pd(domain);

-	hdr->ver = LIGHT_AON_RPC_VERSION;
 	hdr->svc = LIGHT_AON_RPC_SVC_PM;
 	hdr->func = LIGHT_AON_PM_FUNC_SET_RESOURCE_POWER_MODE;
 	hdr->size = LIGHT_AON_RPC_MSG_NUM;

-	msg.resource = pd->rsrc;
-	msg.mode = power_on ? LIGHT_AON_PM_PW_MODE_ON : LIGHT_AON_PM_PW_MODE_OFF;
+	RPC_SET_BE16(&msg.resource, 0, pd->rsrc);
+	RPC_SET_BE16(&msg.resource, 2, (power_on ? LIGHT_AON_PM_PW_MODE_ON : LIGHT_AON_PM_PW_MODE_OFF));

-	ret = light_aon_call_rpc(pm_ipc_handle, &msg, true);
+	ret = light_aon_call_rpc(pm_ipc_handle, &msg, &ack_msg, true);
 	if (ret)
 		dev_err(&domain->dev, "failed to power %s resource %d ret %d\n",
 			power_on ? "up" : "off", pd->rsrc, ret);
--- a/drivers/firmware/thead/light_aon_test.c
+++ b/drivers/firmware/thead/light_aon_test.c
@@ -25,20 +25,20 @@ struct light_aon_msg_req_misc_set_ctrl {
 	u32 val;
 	u16 resource;
 	u16 reserved[7];
-} __packed __aligned(4);
+} __packed __aligned(1);

 struct light_aon_msg_req_misc_get_ctrl {
 	struct light_aon_rpc_msg_hdr hdr;
 	u32 ctrl;
 	u16 resource;
 	u16 reserved[9];
-} __packed __aligned(4);
+} __packed __aligned(1);

 struct light_aon_msg_resp_misc_get_ctrl {
 	struct light_aon_rpc_msg_hdr hdr;
 	u32 val;
 	u32 reserved[5];
-} __packed __aligned(4);
+} __packed __aligned(1);

 struct light_aon_device {
 	struct device		*dev;
--- a/drivers/firmware/thead/light_proc_debug.c
+++ b/drivers/firmware/thead/light_proc_debug.c
@@ -0,0 +1,171 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * sys log sys for light c906 and e902
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <asm/cacheflush.h>
+
+#define GET_PAGE_NUM(size, offset)                                             \
+	((((size) + ((offset) & ~PAGE_MASK)) + PAGE_SIZE - 1) >> PAGE_SHIFT)
+
+struct light_log_ring_buffer {
+	__u32 read;
+	__u32 write;
+	__u32 size;
+	__u32 reserved[1];
+	__u8 data[0];
+};
+
+struct light_hw_log {
+	__u32 panic;
+	__u32 reserved[2];
+	struct light_log_ring_buffer rb;
+};
+
+struct light_proc_log_ctrl {
+	struct light_hw_log __iomem *log;
+	struct proc_dir_entry *log_proc_file;
+	phys_addr_t log_phy;
+};
+
+static void memset_hw(void __iomem *dst, int c, size_t sz)
+{
+	int i;
+	volatile u32 *d_ptr = dst;
+	for (i = 0; i < sz / 4; i++) {
+		__raw_writel(c, d_ptr++);
+	}
+}
+static void dump_regs(const char *fn, void *hw_arg)
+{
+	struct light_proc_log_ctrl *log_ctrl = hw_arg;
+
+	if (!log_ctrl->log)
+		return;
+
+	pr_debug("%s: panic = 0x%08x\n", fn,
+		 __raw_readl(&log_ctrl->log->panic));
+	pr_debug("%s: read = 0x%08x, write = 0x%08x, size = 0x%08x\n", fn,
+		 __raw_readl(&log_ctrl->log->rb.read),
+		 __raw_readl(&log_ctrl->log->rb.write),
+		 __raw_readl(&log_ctrl->log->rb.size));
+}
+
+static int log_proc_show(struct seq_file *file, void *v)
+{
+	struct light_proc_log_ctrl *log_ctrl = file->private;
+	char *buf;
+	size_t i;
+	/*dcache clean and invalid*/
+	dma_wbinv_range(log_ctrl->log_phy, ((char*)log_ctrl->log_phy + sizeof(struct light_hw_log)));
+
+	uint32_t write = __raw_readl(&log_ctrl->log->rb.write);
+	uint32_t read  = __raw_readl(&log_ctrl->log->rb.read);
+	uint32_t size =  __raw_readl(&log_ctrl->log->rb.size);
+	size_t log_size  = write >= read ? write - read : size +  write - read;
+
+    seq_printf(file,"****************** device log >>>>>>>>>>>>>>>>>\n");
+	dump_regs(__func__, log_ctrl);
+	if(!log_size) {
+		 seq_printf(file,"****************** end device log <<<<<<<<<<<<<<<<<\n");
+		 return 0;
+	}
+																	   
+	int page_num = GET_PAGE_NUM(log_size, 0);
+
+	int log_patch_1 = -1, log_patch_2 = -1;
+    
+	buf = kmalloc(PAGE_SIZE * page_num, GFP_KERNEL);
+	if (buf) {
+		if(read + log_size >= size) {
+			log_patch_2 = read + log_size - size + 1;
+			log_patch_1 = log_size - log_patch_2;
+			 
+		} else {
+			log_patch_1 = log_size;
+		}
+        
+		memcpy_fromio(buf, &log_ctrl->log->rb.data[read], log_patch_1);
+		if(log_patch_2 > 0) {
+            memcpy_fromio(buf, &log_ctrl->log->rb.data[0], log_patch_2);
+		}
+		
+		uint8_t last_fame_size  = log_size % 64;
+
+		for (i = 0; i < log_size - last_fame_size; i += 64) {
+			seq_printf(file, " %*pEp", 64, buf + i);
+	    }
+		if(last_fame_size) {
+            seq_printf(file, " %*pEp", last_fame_size, buf + log_size - last_fame_size);
+		}
+        
+		__raw_writel(write, &log_ctrl->log->rb.read);
+        kfree(buf);
+		/*dcahce clean*/
+		dma_wb_range(log_ctrl->log_phy, ((char*)log_ctrl->log_phy + sizeof(struct light_hw_log)));
+		//seq_printf(file,"\n%d %d %d %d %d\n",log_patch_1, log_patch_2, log_size ,last_fame_size, read);
+		seq_printf(file,"\n****************** end device log <<<<<<<<<<<<<<<<<\n");
+		return 0;
+	} else {
+		pr_debug("Fail to alloc buf\n");
+		return -1;
+	}
+	return 0;
+}
+
+static bool light_panic_init(struct light_hw_log *hw_log, size_t size)
+{
+	if (size < sizeof(struct light_hw_log)) {
+		return false;
+	}
+	hw_log->rb.read = 0;
+	hw_log->rb.size = size - sizeof(struct light_hw_log);
+	return true;
+}
+
+void *light_create_panic_log_proc(phys_addr_t log_phy, void *dir, void *log_info_addr, size_t size)
+{
+	struct light_proc_log_ctrl *log_ctrl =
+		kmalloc(sizeof(struct light_proc_log_ctrl), GFP_KERNEL);
+
+	if (log_ctrl == NULL)
+		return NULL;
+    
+    log_ctrl->log = log_info_addr;
+    
+	light_panic_init(log_ctrl->log, size);
+
+	log_ctrl->log_proc_file = proc_create_single_data(
+		"proc_log", 0644, dir, &log_proc_show, log_ctrl);
+	if (log_ctrl->log_proc_file == NULL) {
+		pr_debug("Error: Could not initialize %s\n", "dsp_log");
+		kfree(log_ctrl);
+		log_ctrl = NULL;
+	} else {
+		pr_debug("%s create Success!\n", "dsp_log");
+	}
+	log_ctrl->log_phy = log_phy;
+	return log_ctrl;
+}
+
+void light_remove_panic_log_proc(void *arg)
+{
+	struct light_proc_log_ctrl *log_ctrl = (struct light_proc_log_ctrl *)arg;
+
+	proc_remove(log_ctrl->log_proc_file);
+	kfree(log_ctrl);
+	pr_debug("light proc log removed\n");
+}
--- a/drivers/gpu-viv/config
+++ b/drivers/gpu-viv/config
@@ -58,7 +58,7 @@ SDK_DIR                           ?= $(AQROOT)/build/sdk
 VIVANTE_ENABLE_3D                 ?= 0
 VIVANTE_ENABLE_2D                 ?= 1
 VIVANTE_ENABLE_VG                 ?= 0
-VIVANTE_ENABLE_DRM                ?= 1
+VIVANTE_ENABLE_DRM                ?= 0
 NO_DMA_COHERENT                   ?= 0
 USE_PLATFORM_DRIVER               ?= 1
 ENABLE_GPU_CLOCK_BY_DRIVER        ?= 1
--- a/drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c
+++ b/drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c
@@ -59,6 +59,10 @@

 #include "gc_feature_database.h"
 #include <gc_hal_kernel_debug.h>
+#include <linux/printk.h>
+
+#define CREATE_TRACE_POINTS
+#include <trace/events/g2d.h>

 #define _GC_OBJ_ZONE    gcvZONE_HARDWARE

@@ -298,7 +302,7 @@ _IdentifyHardwareByDatabase(

    if (database == gcvNULL)
    {
-        gcmkPRINT("[galcore]: Feature database is not found,"
+        pr_err("[galcore]: Feature database is not found,"
                  "chipModel=0x%0x, chipRevision=0x%x, productID=0x%x, ecoID=0x%x, customerID=0x%x",
                  Hardware->identity.chipModel,
                  Hardware->identity.chipRevision,
@@ -309,7 +313,7 @@ _IdentifyHardwareByDatabase(
    }
    else if (database->chipVersion != Hardware->identity.chipRevision)
    {
-        gcmkPRINT("[galcore]: Warning: chipRevision mismatch, database chipRevision=0x%x register read chipRevision=0x%x\n",
+        pr_warn("[galcore]: Warning: chipRevision mismatch, database chipRevision=0x%x register read chipRevision=0x%x\n",
                  database->chipVersion, Hardware->identity.chipRevision);
    }

@@ -1184,7 +1188,7 @@ _IsGPUPresent(
    ||  (Hardware->signature.chipMinorFeatures2 != signature.chipMinorFeatures2)
    )
    {
-        gcmkPRINT("[galcore]: GPU is not present.");
+        pr_err("[galcore]: GPU is not present.");
        gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
    }

@@ -1747,7 +1751,7 @@ _ConfigurePolicyID(
                /* Check whether this bit changes. */
                if (auxBit != ((policyID >> 4) & 0x1))
                {
-                    gcmkPRINT("[galcore]: AUX_BIT changes");
+                    pr_warn("[galcore]: AUX_BIT changes");
                    return;
                }
            }
@@ -1830,7 +1834,7 @@ _QueryNNClusters(
            /* We only support maximum 8 clusters by current. */
            if (enableNN > 0x7)
            {
-                gcmkPRINT("[Galcore warning]: Invalid enableNN value is configured.");
+                pr_warn("[Galcore warning]: Invalid enableNN value is configured.");

                gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
            }
@@ -1843,7 +1847,7 @@ _QueryNNClusters(

    if (value && Hardware->identity.customerID != 0x85)
    {
-        gcmkPRINT("Galcore warning: Don't set enableNN as this chip not support NN cluster power control!\n");
+        pr_warn("Galcore warning: Don't set enableNN as this chip not support NN cluster power control!\n");
    }

    Hardware->options.configNNPowerControl = value;
@@ -1901,7 +1905,7 @@ _SetHardwareOptions(

    if (options->enableMMU == gcvFALSE)
    {
-        gcmkPRINT("Galcore warning: MMU is disabled!\n");
+        pr_err("Galcore warning: MMU is disabled!\n");
    }

    /* Query enabled NN clusters. */
@@ -1935,7 +1939,7 @@ _SetHardwareOptions(
    }
    else if (options->userClusterMask & (~Hardware->identity.clusterAvailMask))
    {
-        gcmkPRINT("%s(%d): user cluster mask(0x%x) must be a subset of available clusters(0x%x),ignored it!",
+        pr_warn("%s(%d): user cluster mask(0x%x) must be a subset of available clusters(0x%x),ignored it!",
                  __FUNCTION__, __LINE__, options->userClusterMask, Hardware->identity.clusterAvailMask);
        options->userClusterMasks[Hardware->core] = options->userClusterMask = Hardware->identity.clusterAvailMask;
    }
@@ -3064,7 +3068,7 @@ gckHARDWARE_InitializeHardware(

        gcmkSAFECASTPHYSADDRT(offset, Hardware->identity.registerAPB);

-        gcmkPRINT("Initailize APB1 registers, APB offset is 0x%x.\n", offset);
+        pr_warn("Initailize APB1 registers, APB offset is 0x%x.\n", offset);

        /* APB FE ctrl. */
        gcmkONERROR(gckOS_WriteRegisterEx(
@@ -4621,7 +4625,7 @@ OnError:
 }


-static void
+void
 _ResumeWaitLinkFE(
    gckHARDWARE Hardware
    )
@@ -4632,14 +4636,18 @@ _ResumeWaitLinkFE(
    gctUINT32 idle;

    /* Make sure FE is idle. */
-    do
-    {
-        gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
+
+    gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
                             Hardware->core,
                             0x00004,
                             &idle));
-    }
-    while (idle != 0x7FFFFFFF);
+
+    gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
+                             Hardware->core,
+                             0x00004,
+                             &idle));
+    if(idle != 0x7FFFFFFF) 
+        return;

    gcmkDUMP(Hardware->os, "@[register.wait 0x%05X 0x%08X 0x%08X]",
             0x00004,
@@ -4712,6 +4720,7 @@ gckHARDWARE_Interrupt(
                                  Hardware->core,
                                  0x00010,
                                  &data);
+    trace_g2d_irq_reg(0x00010,data);

    if (gcmIS_ERROR(status))
    {
@@ -4746,7 +4755,7 @@ gckHARDWARE_Interrupt(
        0x000D4,
        &dataEx
        );
-
+    trace_g2d_irq_reg(0x000D4,dataEx);
    if (gcmIS_ERROR(statusEx))
    {
        /*
@@ -4815,13 +4824,6 @@ gckHARDWARE_Notify(

    gckOS_AtomGet(Hardware->os, Hardware->kernel->eventObj->pending, (gctINT32_PTR)&pending);

-    if (pending & (1 << 29))
-    {
-        /* Event ID 29 is not a normal event, but for invalidating pipe. */
-        _ResumeWaitLinkFE(Hardware);
-        pending &= ~(1 << 29);
-    }
-
    gckOS_AtomSetMask(Hardware->kernel->eventObj->pending, pending);

    /* Handle events. */
@@ -7883,7 +7885,7 @@ gckHARDWARE_PowerControlClusters(
 #if gcdGPU_TIMEOUT
            if (timer >= Hardware->kernel->timeOut)
            {
-                gcmkPRINT("%s %d Galcore timeout...\n", __FUNCTION__, __LINE__);
+                pr_err("%s %d Galcore timeout...\n", __FUNCTION__, __LINE__);

                gcmkONERROR(gcvSTATUS_DEVICE);
            }
@@ -9219,7 +9221,7 @@ gckHARDWARE_SetPowerState(
            status = gckOS_TryAcquireSemaphore(os, Hardware->globalSemaphore);
            if (status != gcvSTATUS_TIMEOUT && Hardware->isLastPowerGlobal)
            {
-                gcmkPRINT("%s: global state error", __FUNCTION__);
+                pr_err("%s: global state error", __FUNCTION__);
            }

            /* Switched to global ON, now release the global semaphore. */
@@ -12621,14 +12623,14 @@ gckHARDWARE_Reset(
        Hardware, state
        ));

-    gcmkPRINT("[galcore]: recovery done");
+    pr_warn("[galcore]: recovery done");

    /* Success. */
    gcmkFOOTER_NO();
    return gcvSTATUS_OK;

 OnError:
-    gcmkPRINT("[galcore]: Hardware not reset successfully, give up");
+    pr_err("[galcore]: Hardware not reset successfully, give up");

    if (globalAcquired)
    {
--- a/drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_func.c
+++ b/drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_func.c
@@ -2436,39 +2436,39 @@ _FuncExecute_FLOPRESET(IN gcsFUNCTION_EXECUTION_PTR Execution)
 #if gcdENABLE_FLOP_RESET_DEBUG
    for (i  = 0; i < Execution->funcCmdCount - minus_flag; i++)
    {
-        gcmkPRINT("outSizeBytes is : %d", Execution->funcCmd[i].outSize);
-        gcmkPRINT("outAddress is %x", Execution->funcCmd[i].data[2].address);
+        pr_warn("outSizeBytes is : %d", Execution->funcCmd[i].outSize);
+        pr_warn("outAddress is %x", Execution->funcCmd[i].data[2].address);
        for(j = 0; j < Execution->funcCmd[i].outSize; j++ )
        {
            if(((gctUINT8_PTR)(Execution->funcCmd[i].golden))[j] != ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[j])
            {
                if(i == 0)
                {
-                    gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-                    gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-                    gcmkPRINT("NN workaround verify failed!");
+                    pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+                    pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+                    pr_warn("NN workaround verify failed!");
                    return status;
                }
                else if(i == 1)
                {
-                    gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-                    gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-                    gcmkPRINT("TP workaround verify failed!");
+                    pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+                    pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+                    pr_warn("TP workaround verify failed!");
                    return status;
                }
            }
        }
        if(i == 0)
        {
-            gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-            gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-            gcmkPRINT("NN workaround verify success!");
+            pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+            pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+            pr_warn("NN workaround verify success!");
        }
        else
        {
-            gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-            gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-            gcmkPRINT("TP workaround verify success!");
+            pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+            pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+            pr_warn("TP workaround verify success!");
        }
    }
 #endif
@@ -2576,7 +2576,7 @@ _ProgramMMUStates(
    case gcvSECURE_IN_TA:
    default:
        gcmkASSERT(gcvFALSE);
-        gcmkPRINT("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
+        pr_err("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
        break;
    }

@@ -3467,7 +3467,7 @@ _ProgramMMUStatesMCFE(
    case gcvSECURE_IN_TA:
    default:
        gcmkASSERT(gcvFALSE);
-        gcmkPRINT("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
+        pr_err("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
        break;
    }

@@ -4792,10 +4792,10 @@ _FuncRelease_PPU(IN gcsFUNCTION_EXECUTION_PTR Execution)
            if (((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i] != 0x02020202)
            {
                pass = gcvFALSE;
-                gcmkPRINT("Incorrect Result:[%d] 0x%08x\n", i, ((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i]);
+                pr_warn("Incorrect Result:[%d] 0x%08x\n", i, ((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i]);
            }
        }
-        gcmkPRINT("PPU %s!\n", pass?"PASS":"FAIL");
+        pr_warn("PPU %s!\n", pass?"PASS":"FAIL");

 #endif

@@ -9831,7 +9831,7 @@ _FuncRelease_USC(IN gcsFUNCTION_EXECUTION_PTR Execution)
                || *((gctUINT32_PTR)(Execution->funcCmd[0].data[3].logical)) == 0x44004400 /*FP16*/
                )
            {
-                gcmkPRINT("USC PASS! ");
+                pr_warn("USC PASS! ");
            }
        }
 #endif
--- a/drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_mc_fe.c
+++ b/drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_mc_fe.c
@@ -176,7 +176,7 @@ _AllocateDescRingBuf(

    if (Channel->physical > 0xffffffffull)
    {
-        gcmkPRINT("%s(%d): MCFE ring buffer physical over 4G: 0x%llx",
+        pr_err("%s(%d): MCFE ring buffer physical over 4G: 0x%llx",
            __FUNCTION__, __LINE__, (unsigned long long)Channel->physical);
    }

@@ -807,7 +807,7 @@ gckMCFE_Execute(

        if (_NextPtr(ringBuf->writePtr) == ringBuf->readPtr)
        {
-            gcmkPRINT("%s: MCFE channel %s-%d ringBuf is full!",
+            pr_warn("%s: MCFE channel %s-%d ringBuf is full!",
                      __FUNCTION__,
                      Priority ? "Pri" : "Std",
                      ChannelId);
--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel.c
@@ -54,6 +54,8 @@


 #include "gc_hal_kernel_precomp.h"
+#include <linux/module.h>
+#include <linux/ktime.h>

 #if gcdDEC_ENABLE_AHB
 #include "viv_dec300_main.h"
@@ -65,9 +67,11 @@

 #define _GC_OBJ_ZONE    gcvZONE_KERNEL

+
 /*******************************************************************************
 ***** Version Signature *******************************************************/
-
+#define MAX_THREADS 10
+#define MAX_TIMESTAMPS 10
 #define _gcmTXT2STR(t) #t
 #define gcmTXT2STR(t) _gcmTXT2STR(t)
 const char * _VERSION = "\n\0$VERSION$"
@@ -80,6 +84,7 @@ const char * _VERSION = "\n\0$VERSION$"
 ******************************* gckKERNEL API Code ******************************
 \******************************************************************************/

+
 #if gcmIS_DEBUG(gcdDEBUG_TRACE)
 #define gcmDEFINE2TEXT(d) #d
 gctCONST_STRING _DispatchText[] =
@@ -1251,7 +1256,7 @@ AllocateMemory:
 #if gcdCAPTURE_ONLY_MODE
                else
                {
-                    gcmkPRINT("Capture only mode: Out of Memory");
+                    pr_err("Capture only mode: Out of Memory");
                }
 #endif

@@ -2337,7 +2342,7 @@ gckKERNEL_CacheOperation(
        if (!printed)
        {
            printed = gcvTRUE;
-            gcmkPRINT("[galcore]: %s: Flush Video Memory", __FUNCTION__);
+            pr_warn("[galcore]: %s: Flush Video Memory", __FUNCTION__);
        }

        gcmkFOOTER_NO();
@@ -2907,6 +2912,8 @@ gckKERNEL_Dispatch(
    gckCONTEXT context = gcvNULL;
    gckKERNEL kernel = Kernel;
    gctUINT32 processID;
+    gcsDATABASE_PTR database;
+    gctUINT i;
 #if !USE_NEW_LINUX_SIGNAL
    gctSIGNAL   signal;
 #endif
@@ -3232,9 +3239,35 @@ gckKERNEL_Dispatch(

        case gcvUSER_SIGNAL_WAIT:
            /* Wait on the signal. */
+            gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
+            for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
+            {
+                for (database = kernel->db->db[i];
+                    database != gcvNULL;
+                    database = database->next)
+                {
+                    database->st = database->st % 10;
+                    database->start_times[database->st] = ktime_get();
+                }
+            }
+            gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
+
            status = gckOS_WaitUserSignal(Kernel->os,
                                          Interface->u.UserSignal.id,
                                          Interface->u.UserSignal.wait);
+            gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
+            for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
+            {
+                for (database = kernel->db->db[i];
+                    database != gcvNULL;
+                    database = database->next)
+                {
+                    database->st = database->st % 9;
+                    database->end_times[database->st++] = ktime_get();
+                }
+            }
+            gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
+
            break;

        case gcvUSER_SIGNAL_MAP:
@@ -3472,7 +3505,7 @@ gckKERNEL_Dispatch(
                Interface->u.ReadRegisterData.data = 0;
                status = gcvSTATUS_CHIP_NOT_READY;

-                gcmkPRINT("[galcore]: Can't dump state if GPU isn't POWER ON.");
+                pr_err("[galcore]: Can't dump state if GPU isn't POWER ON.");
            }
        }
        break;
@@ -4199,7 +4232,7 @@ gckKERNEL_Recovery(

    if (Kernel->stuckDump == gcvSTUCK_DUMP_NONE)
    {
-        gcmkPRINT("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core);
+        pr_err("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core);
    }
    else if (Kernel->stuckDump == gcvSTUCK_DUMP_ALL_CORE)
    {
@@ -4233,7 +4266,7 @@ gckKERNEL_Recovery(

    if (Kernel->recovery == gcvFALSE)
    {
-        gcmkPRINT("[galcore]: Stop driver to keep scene.");
+        pr_err("[galcore]: Stop driver to keep scene.");

        /* Stop monitor timer. */
        Kernel->monitorTimerStop = gcvTRUE;
@@ -6013,7 +6046,7 @@ gckDEVICE_Profiler_Dispatch(
            }
            else
            {
-                gcmkPRINT("unknown profileMode argument");
+                pr_err("unknown profileMode argument");
                gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
            }
        }
--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel.h
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel.h
@@ -62,6 +62,7 @@
 #include "gc_hal_driver.h"
 #include "gc_hal_kernel_mutex.h"
 #include "gc_hal_metadata.h"
+#include <linux/ktime.h>

 #if gcdENABLE_SW_PREEMPTION
 #include "gc_hal_kernel_preemption.h"
@@ -291,6 +292,13 @@ typedef struct _gcsDATABASE
    /* Process ID. */
    gctUINT32                           processID;

+    /* Process time. */
+    ktime_t                             start_times[10];
+    ktime_t                             end_times[10];
+    gctUINT32                           st;
+    ktime_t                             max_hw_time;
+
+
    /* Open-Close ref count */
    gctPOINTER                          refs;

--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel_command.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel_command.c
@@ -4532,7 +4532,7 @@ gckCOMMAND_DumpExecutingBuffer(
        }
        else
        {
-            gcmkPRINT("Can not find command buffer around 0x%08X.\n", gpuAddress);
+            pr_err("Can not find command buffer around 0x%08X.\n", gpuAddress);
        }
    }

@@ -4616,7 +4616,7 @@ gckCOMMAND_DumpExecutingBuffer(
        }
        else
        {
-            gcmkPRINT("Not found");
+            pr_err("Not found");
        }

        /* new line. */
@@ -4662,7 +4662,7 @@ gckCOMMAND_DumpExecutingBuffer(
        }
        else
        {
-            gcmkPRINT("%08X sub command not found", node->address);
+            pr_err("%08X sub command not found", node->address);
        }

        /* new line */
@@ -4842,7 +4842,7 @@ gckCOMMAND_PreemptCommit(
        }
        else
        {
-            gcmkPRINT("Don't enable SW preemption for aysnc FE.\n");
+            pr_err("Don't enable SW preemption for aysnc FE.\n");

            gcmkONERROR(gcvSTATUS_NOT_SUPPORTED);
        }
--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel_db.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel_db.c
@@ -1159,7 +1159,7 @@ gckKERNEL_DestroyProcessDB(
    }

 #if gcdCAPTURE_ONLY_MODE
-    gcmkPRINT("Capture only mode: The max allocation from System Pool is %llu bytes", database->vidMemPool[gcvPOOL_SYSTEM].maxBytes);
+    pr_warn("Capture only mode: The max allocation from System Pool is %llu bytes", database->vidMemPool[gcvPOOL_SYSTEM].maxBytes);
 #endif

    /* Cannot remove the database from the hash list
@@ -1344,7 +1344,7 @@ gckKERNEL_DestroyProcessDB(

                    if (priorityID >= gcdMAX_PRIORITY_QUEUE_NUM)
                    {
-                        gcmkPRINT("Galcore Info: get an error priority.");
+                        pr_err("Galcore Info: get an error priority.");
                        break;
                    }

--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel_event.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel_event.c
@@ -64,6 +64,7 @@
 #define gcdEVENT_ALLOCATION_COUNT       (4096 / gcmSIZEOF(gcsHAL_INTERFACE))
 #define gcdEVENT_MIN_THRESHOLD          4

+extern void _ResumeWaitLinkFE(gckHARDWARE Hardware);
 /******************************************************************************\
 ********************************* Support Code *********************************
 \******************************************************************************/
@@ -1870,6 +1871,12 @@ gckEVENT_Interrupt(
    )
 {
    /* Combine current interrupt status with pending flags. */
+     if (Data & (1 << 29))
+    {
+        /* Event ID 29 is not a normal event, but for invalidating pipe. */
+        _ResumeWaitLinkFE(Event->kernel->hardware);
+        Data &= ~(1 << 29);
+    }
    gckOS_AtomSetMask(Event->pending, Data);

 #if gcdINTERRUPT_STATISTIC
@@ -1978,7 +1985,7 @@ gckEVENT_Notify(

        if (pending & 0x80000000)
        {
-            gcmkPRINT("AXI BUS ERROR");
+            pr_err("AXI BUS ERROR");
            pending &= 0x7FFFFFFF;

            fault |= gcvEVENT_BUS_ERROR_FAULT;
@@ -2484,29 +2491,29 @@ _PrintRecord(
    switch (record->info.command)
    {
    case gcvHAL_WRITE_DATA:
-        gcmkPRINT("      gcvHAL_WRITE_DATA");
+        pr_warn("      gcvHAL_WRITE_DATA");
       break;

    case gcvHAL_UNLOCK_VIDEO_MEMORY:
-        gcmkPRINT("      gcvHAL_UNLOCK_VIDEO_MEMORY");
+        pr_warn("      gcvHAL_UNLOCK_VIDEO_MEMORY");
        break;

    case gcvHAL_SIGNAL:
-        gcmkPRINT("      gcvHAL_SIGNAL process=%lld signal=0x%llx",
+        pr_warn("      gcvHAL_SIGNAL process=%lld signal=0x%llx",
                  record->info.u.Signal.process,
                  record->info.u.Signal.signal);
        break;

    case gcvHAL_TIMESTAMP:
-        gcmkPRINT("      gcvHAL_TIMESTAMP");
+        pr_warn("      gcvHAL_TIMESTAMP");
        break;

    case gcvHAL_COMMIT_DONE:
-        gcmkPRINT("      gcvHAL_COMMIT_DONE");
+        pr_warn("      gcvHAL_COMMIT_DONE");
        break;

    case gcvHAL_DESTROY_MMU:
-        gcmkPRINT("      gcvHAL_DESTORY_MMU mmu=%p",
+        pr_warn("      gcvHAL_DESTORY_MMU mmu=%p",
                  gcmUINT64_TO_PTR(record->info.u.DestroyMmu.mmu));

        break;
@@ -2596,7 +2603,7 @@ gckEVENT_Dump(
                    );
        if (gcmIS_ERROR(status))
        {
-            gcmkPRINT("  READ INTR_ACKNOWLEDGE ERROR!");
+            pr_err("  READ INTR_ACKNOWLEDGE ERROR!");
        }
        else
        {
--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel_heap.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel_heap.c
@@ -868,17 +868,17 @@ gckHEAP_ProfileEnd(
    gcmkVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
    gcmkVERIFY_ARGUMENT(Title != gcvNULL);

-    gcmkPRINT("\n");
-    gcmkPRINT("=====[ HEAP - %s ]=====", Title);
-    gcmkPRINT("Number of allocations           : %12u",   Heap->allocCount);
-    gcmkPRINT("Number of bytes allocated       : %12llu", Heap->allocBytes);
-    gcmkPRINT("Maximum allocation size         : %12llu", Heap->allocBytesMax);
-    gcmkPRINT("Total number of bytes allocated : %12llu", Heap->allocBytesTotal);
-    gcmkPRINT("Number of heaps                 : %12u",   Heap->heapCount);
-    gcmkPRINT("Heap memory in bytes            : %12llu", Heap->heapMemory);
-    gcmkPRINT("Maximum number of heaps         : %12u",   Heap->heapCountMax);
-    gcmkPRINT("Maximum heap memory in bytes    : %12llu", Heap->heapMemoryMax);
-    gcmkPRINT("==============================================");
+    pr_debug("\n");
+    pr_debug("=====[ HEAP - %s ]=====", Title);
+    pr_debug("Number of allocations           : %12u",   Heap->allocCount);
+    pr_debug("Number of bytes allocated       : %12llu", Heap->allocBytes);
+    pr_debug("Maximum allocation size         : %12llu", Heap->allocBytesMax);
+    pr_debug("Total number of bytes allocated : %12llu", Heap->allocBytesTotal);
+    pr_debug("Number of heaps                 : %12u",   Heap->heapCount);
+    pr_debug("Heap memory in bytes            : %12llu", Heap->heapMemory);
+    pr_debug("Maximum number of heaps         : %12u",   Heap->heapCountMax);
+    pr_debug("Maximum heap memory in bytes    : %12llu", Heap->heapMemoryMax);
+    pr_debug("==============================================");

    /* Success. */
    gcmkFOOTER_NO();
--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c
@@ -568,7 +568,7 @@ _CollectFreeSpace(
 #if gcdMMU_TABLE_DUMP
    for (i = 0; i < size; i++)
    {
-        gckOS_Print("%s(%d): [%d]: start=%d, entries=%d.\n",
+        gcmkPRINT("%s(%d): [%d]: start=%d, entries=%d.\n",
                __FUNCTION__, __LINE__,
                i,
                array[i].start,
@@ -775,7 +775,7 @@ gckMMU_FillFlatMappingWithPage16M(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_err("There is a hole in new flat mapping range, which is not correct");
                }
            }

@@ -807,7 +807,7 @@ gckMMU_FillFlatMappingWithPage16M(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_err("There is a hole in new flat mapping range, which is not correct");
                }
            }
        }
@@ -915,12 +915,12 @@ gckMMU_FillFlatMappingWithPage16M(
            _WritePageEntry(Mmu->mtlbLogical + mCursor, mtlbEntry);

 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                mStart,
                _ReadPageEntry(Mmu->mtlbLogical + mCursor));

-            gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
+            pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
                    __FUNCTION__, __LINE__,
                    stlbLogical,
                    stlbPhyBase);
@@ -952,7 +952,7 @@ gckMMU_FillFlatMappingWithPage16M(
                    _WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
                }
 #if gcdMMU_TABLE_DUMP
-                gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
+                pr_warn("%s(%d): insert STLB[%d]: %08x\n",
                    __FUNCTION__, __LINE__,
                    sStart,
                    _ReadPageEntry(stlbLogical + sStart));
@@ -1123,7 +1123,7 @@ gckMMU_FillFlatMappingWithPage1M(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_err("There is a hole in new flat mapping range, which is not correct");
                }
            }

@@ -1144,7 +1144,7 @@ gckMMU_FillFlatMappingWithPage1M(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_err("There is a hole in new flat mapping range, which is not correct");
                }
            }
        }
@@ -1241,12 +1241,12 @@ gckMMU_FillFlatMappingWithPage1M(
            _WritePageEntry(Mmu->mtlbLogical + mStart, mtlbEntry);

 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                mStart,
                _ReadPageEntry(Mmu->mtlbLogical + mStart));

-            gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
+            pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
                    __FUNCTION__, __LINE__,
                    stlbLogical,
                    stlbPhyBase);
@@ -1298,7 +1298,7 @@ gckMMU_FillFlatMappingWithPage1M(
                _WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
            }
 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert STLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                sStart,
                _ReadPageEntry(stlbLogical + sStart));
@@ -1481,7 +1481,7 @@ gckMMU_FillFlatMappingWithPage64K(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_err("There is a hole in new flat mapping range, which is not correct");
                }
            }

@@ -1502,7 +1502,7 @@ gckMMU_FillFlatMappingWithPage64K(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_err("There is a hole in new flat mapping range, which is not correct");
                }
            }
        }
@@ -1599,12 +1599,12 @@ gckMMU_FillFlatMappingWithPage64K(
            _WritePageEntry(Mmu->mtlbLogical + mStart, mtlbEntry);

 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                mStart,
                _ReadPageEntry(Mmu->mtlbLogical + mStart));

-            gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
+            pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
                    __FUNCTION__, __LINE__,
                    stlbLogical,
                    stlbPhyBase);
@@ -1656,7 +1656,7 @@ gckMMU_FillFlatMappingWithPage64K(
                _WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
            }
 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert STLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                sStart,
                _ReadPageEntry(stlbLogical + sStart));
@@ -1839,7 +1839,7 @@ gckMMU_FillFlatMappingWithPage4K(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_err("There is a hole in new flat mapping range, which is not correct");
                }
            }

@@ -1860,7 +1860,7 @@ gckMMU_FillFlatMappingWithPage4K(
                }
                else
                {
-                    gcmkPRINT("There is a hole in new flat mapping range, which is not correct");
+                    pr_warn("There is a hole in new flat mapping range, which is not correct");
                }
            }
        }
@@ -1957,12 +1957,12 @@ gckMMU_FillFlatMappingWithPage4K(
            _WritePageEntry(Mmu->mtlbLogical + mStart, mtlbEntry);

 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                mStart,
                _ReadPageEntry(Mmu->mtlbLogical + mStart));

-            gckOS_Print("%s(%d): STLB: logical:%08x -> physical:%08x\n",
+            pr_warn("%s(%d): STLB: logical:%08x -> physical:%08x\n",
                    __FUNCTION__, __LINE__,
                    stlbLogical,
                    stlbPhyBase);
@@ -2016,7 +2016,7 @@ gckMMU_FillFlatMappingWithPage4K(
                _WritePageEntry(stlbLogical + sStart, _SetPage(start, physBaseExt, gcvTRUE));
            }
 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert STLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert STLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                sStart,
                _ReadPageEntry(stlbLogical + sStart));
@@ -2262,7 +2262,7 @@ _ConstructDynamicStlb(
        _WritePageEntry(Mmu->mtlbLogical + i, mtlbEntry);

 #if gcdMMU_TABLE_DUMP
-        gckOS_Print("%s(%d): insert MTLB[%d]: %08x\n",
+        pr_warn("%s(%d): insert MTLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                i,
                _ReadPageEntry(Mmu->mtlbLogical + i));
@@ -2726,7 +2726,7 @@ _Construct(
                gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
            }

-            gcmkPRINT("Galcore warning: pre-flat mapping base address can't be lower than 0x1000000, adjust it to 0x1000000. ");
+            pr_warn("Galcore warning: pre-flat mapping base address can't be lower than 0x1000000, adjust it to 0x1000000. ");

            physSize = gpuAddress + physSize - gcdMTLB_RESERVED_SIZE;

@@ -3049,7 +3049,7 @@ _Destroy(
            {
                _WritePageEntry(Mmu->mtlbLogical + pre->mtlbIndex + i, 0);
 #if gcdMMU_TABLE_DUMP
-                gckOS_Print("%s(%d): clean MTLB[%d]\n",
+                pr_warn("%s(%d): clean MTLB[%d]\n",
                    __FUNCTION__, __LINE__,
                    pre->mtlbIndex + i);
 #endif
@@ -3697,7 +3697,7 @@ gckMMU_AllocatePagesEx(
    )
 {
 #if gcdDISABLE_GPU_VIRTUAL_ADDRESS
-    gcmkPRINT("GPU virtual address is disabled.");
+    pr_warn("GPU virtual address is disabled.");
    return gcvSTATUS_NOT_SUPPORTED;
 #else
    return _AllocatePages(Mmu, PageCount, Type, PageType, Secure, PageTable, Address);
@@ -3883,7 +3883,7 @@ gckMMU_DumpPageTableEntry(
              * stlbEntryNum
              + stlb;

-        gcmkPRINT("    Page table entry = 0x%08X", _ReadPageEntry(pageTable + index));
+        pr_warn("    Page table entry = 0x%08X", _ReadPageEntry(pageTable + index));
    }
    else
    {
@@ -3905,7 +3905,7 @@ gckMMU_DumpPageTableEntry(
                    (gctUINT32_PTR)((gctUINT8_PTR)stlbChunkObj->logical + (i * gcdMMU_STLB_1M_SIZE));
                if (entry == stlbPhysBase)
                {
-                    gcmkPRINT("    Page table entry = 0x%08X", stlbLogical[stlb]);
+                    pr_warn("    Page table entry = 0x%08X", stlbLogical[stlb]);
                    found = gcvTRUE;
                    break;
                }
@@ -3941,7 +3941,7 @@ gckMMU_CheckSaftPage(
    {
        if (safeLogical[offsets[i]] != 0)
        {
-            gcmkPRINT("%s(%d) safe page is over written [%d] = %x",
+            pr_warn("%s(%d) safe page is over written [%d] = %x",
                      __FUNCTION__, __LINE__, i, safeLogical[offsets[i]]);
        }
    }
@@ -3992,7 +3992,7 @@ gckMMU_DumpAddressSpace(

        if (!used)
        {
-            gcmkPRINT("Available Range [%d - %d)", i, i + numPages);
+            pr_warn("Available Range [%d - %d)", i, i + numPages);
        }
    }

@@ -4012,13 +4012,13 @@ gckMMU_DumpRecentFreedAddress(

    if (queue->count)
    {
-        gcmkPRINT("    Recent %d freed GPU address ranges:", queue->count);
+        pr_warn("    Recent %d freed GPU address ranges:", queue->count);

        for (i = 0; i < queue->count; i++)
        {
            gckQUEUE_GetData(queue, i, &data);

-            gcmkPRINT("      [%08X - %08X]", data->addressData.start, data->addressData.end);
+            pr_warn("      [%08X - %08X]", data->addressData.start, data->addressData.end);
        }
    }
 }
@@ -4190,7 +4190,7 @@ gckMMU_FillFlatMapping(
            /* Flat mapping in page table. */
            _WritePageEntry(stlbEntry, _SetPage(physBase + i * gcdMMU_PAGE_4K_SIZE, 0, gcvTRUE));
 #if gcdMMU_TABLE_DUMP
-            gckOS_Print("%s(%d): insert MTLB[%d] STLB[%d]: %08x\n",
+            pr_warn("%s(%d): insert MTLB[%d] STLB[%d]: %08x\n",
                __FUNCTION__, __LINE__,
                (physBase & gcdMMU_MTLB_MASK) >> gcdMMU_MTLB_SHIFT,
                ((physBase & gcdMMU_STLB_4K_MASK) >> gcdMMU_STLB_4K_SHIFT) + i,
@@ -4407,7 +4407,7 @@ gckMMU_SetupSRAM(
                {
                    if (Device->showSRAMMapInfo)
                    {
-                        gcmkPRINT("Galcore Info: MMU mapped core%d SRAM base=0x%llx size=0x%x",
+                        pr_warn("Galcore Info: MMU mapped core%d SRAM base=0x%llx size=0x%x",
                            i,
                            reservedBase,
                            reservedSize
@@ -4547,7 +4547,7 @@ gckMMU_SetupSRAM(

            if (Device->showSRAMMapInfo)
            {
-                gcmkPRINT("Galcore Info: MMU mapped core %d SRAM[%d] hardware virtual address=0x%x size=0x%x",
+                pr_warn("Galcore Info: MMU mapped core %d SRAM[%d] hardware virtual address=0x%x size=0x%x",
                    Hardware->core,
                    i,
                    kernel->sRAMBaseAddresses[i],
@@ -4577,7 +4577,7 @@ gckMMU_SetupSRAM(

            if (Device->showSRAMMapInfo)
            {
-                gcmkPRINT("Galcore Info: MMU mapped external shared SRAM[%d] CPU view base=0x%llx GPU view base=0x%llx GPU virtual address=0x%x size=0x%x",
+                pr_warn("Galcore Info: MMU mapped external shared SRAM[%d] CPU view base=0x%llx GPU view base=0x%llx GPU virtual address=0x%x size=0x%x",
                    i,
                    Device->extSRAMBases[i],
                    Device->extSRAMGPUBases[i],
--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel_power.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel_power.c
@@ -189,10 +189,10 @@ _Policy(

    if (Dvfs->totalConfig % 100 == 0)
    {
-        gcmkPRINT("=======================================================");
-        gcmkPRINT("GPU Load:       %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
+        pr_warn("=======================================================");
+        pr_warn("GPU Load:       %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
                                   8, 16, 24, 32, 40, 48, 56, 64);
-        gcmkPRINT("                %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
+        pr_warn("                %-8d %-8d %-8d %-8d %-8d %-8d %-8d %-8d",
                  _GetLoadHistory(Dvfs,2, 0),
                  _GetLoadHistory(Dvfs,2, 1),
                  _GetLoadHistory(Dvfs,2, 2),
@@ -203,9 +203,9 @@ _Policy(
                  _GetLoadHistory(Dvfs,2, 7)
                  );

-        gcmkPRINT("Frequency(MHz)  %-8d %-8d %-8d %-8d %-8d",
+        pr_warn("Frequency(MHz)  %-8d %-8d %-8d %-8d %-8d",
                  58, 120, 240, 360, 480);
-        gcmkPRINT("                %-8d %-8d %-8d %-8d %-8d",
+        pr_warn("                %-8d %-8d %-8d %-8d %-8d",
                  _GetFrequencyHistory(Dvfs, 58),
                  _GetFrequencyHistory(Dvfs,120),
                  _GetFrequencyHistory(Dvfs,240),
--- a/drivers/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
+++ b/drivers/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
@@ -4552,7 +4552,7 @@ gckVIDMEM_NODE_WrapUserMemory(

            if (IS_ERR(gcmUINT64_TO_PTR(Desc->dmabuf)))
            {
-                gcmkPRINT("Wrap memory: invalid dmabuf from kernel.\n");
+                pr_err("Wrap memory: invalid dmabuf from kernel.\n");

                gcmkFOOTER();
                return gcvSTATUS_INVALID_ARGUMENT;
@@ -4562,7 +4562,7 @@ gckVIDMEM_NODE_WrapUserMemory(
        }
        else
        {
-            gcmkPRINT("Wrap memory: invalid dmabuf fd.\n");
+            pr_err("Wrap memory: invalid dmabuf fd.\n");

            gcmkFOOTER();
            return gcvSTATUS_INVALID_ARGUMENT;
--- a/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dma.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dma.c
@@ -197,12 +197,12 @@ _DmaAlloc(
 #if gcdENABLE_BUFFERABLE_VIDEO_MEMORY
    if (set_memory_wc((unsigned long)(mdlPriv->kvaddr), NumPages) != 0)
    {
-        printk("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
+        pr_debug("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
    }
 #else
    if (set_memory_uc((unsigned long)(mdlPriv->kvaddr), NumPages) != 0)
    {
-        printk("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
+        pr_debug("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
    }
 #endif
 #endif
--- a/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_gfp.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_gfp.c
@@ -591,12 +591,12 @@ _GFPAlloc(
 #if gcdENABLE_BUFFERABLE_VIDEO_MEMORY
            if (set_memory_wc((unsigned long)page_address(mdlPriv->contiguousPages), NumPages) != 0)
            {
-                printk("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
+                pr_debug("%s(%d): failed to set_memory_wc\n", __func__, __LINE__);
            }
 #else
            if (set_memory_uc((unsigned long)page_address(mdlPriv->contiguousPages), NumPages) != 0)
            {
-                printk("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
+                pr_debug("%s(%d): failed to set_memory_uc\n", __func__, __LINE__);
            }
 #endif
        }
@@ -665,12 +665,12 @@ _GFPAlloc(
 #if gcdENABLE_BUFFERABLE_VIDEO_MEMORY
        if (set_pages_array_wc(mdlPriv->nonContiguousPages, NumPages))
        {
-            printk("%s(%d): failed to set_pages_array_wc\n", __func__, __LINE__);
+            pr_debug("%s(%d): failed to set_pages_array_wc\n", __func__, __LINE__);
        }
 #else
        if (set_pages_array_uc(mdlPriv->nonContiguousPages, NumPages))
        {
-            printk("%s(%d): failed to set_pages_array_uc\n", __func__, __LINE__);
+            pr_debug("%s(%d): failed to set_pages_array_uc\n", __func__, __LINE__);
        }
 #endif
 #endif
--- a/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_reserved_mem.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_reserved_mem.c
@@ -195,7 +195,7 @@ reserved_mem_attach(

            if (!region)
            {
-                printk("request mem %s(0x%lx - 0x%lx) failed\n",
+                pr_debug("request mem %s(0x%lx - 0x%lx) failed\n",
                    res->name, res->start, res->start + res->size - 1);

                kfree(res);
@@ -314,13 +314,13 @@ reserved_mem_unmap_user(
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,0)
    if (vm_munmap((unsigned long)MdlMap->vmaAddr - res->offset_in_page, res->size) < 0)
    {
-        printk("%s: vm_munmap failed\n", __func__);
+        pr_debug("%s: vm_munmap failed\n", __func__);
    }
 #else
    down_write(&current_mm_mmap_sem);
    if (do_munmap(current->mm, (unsigned long)MdlMap->vmaAddr - res->offset_in_page, res->size) < 0)
    {
-        printk("%s: do_munmap failed\n", __func__);
+        pr_debug("%s: do_munmap failed\n", __func__);
    }
    up_write(&current_mm_mmap_sem);
 #endif
--- a/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_user_memory.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_user_memory.c
@@ -225,14 +225,14 @@ static int import_page_map(gckOS Os, struct um_desc *um,
 #endif
    if (unlikely(result < 0))
    {
-        printk("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
+        pr_debug("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
        goto error;
    }

    result = dma_map_sg(galcore_device, um->sgt.sgl, um->sgt.nents, DMA_TO_DEVICE);
    if (unlikely(result != um->sgt.nents))
    {
-        printk("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
+        pr_debug("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
        goto error;
    }

@@ -393,7 +393,7 @@ static int import_pfn_map(gckOS Os, struct um_desc *um,
 #endif
        if (unlikely(result < 0))
        {
-            printk("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
+            pr_debug("[galcore]: %s: sg_alloc_table_from_pages failed\n", __FUNCTION__);
            goto err;
        }

@@ -406,7 +406,7 @@ static int import_pfn_map(gckOS Os, struct um_desc *um,
 #else
            kfree(um->sgt.sgl);
 #endif
-            printk("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
+            pr_debug("[galcore]: %s: dma_map_sg failed\n", __FUNCTION__);
            goto err;
        }

--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_allocator.c
@@ -148,7 +148,7 @@ gckOS_ImportAllocators(

            if (gcmIS_ERROR(status))
            {
-                gcmkPRINT("["DEVICE_NAME"]: Can't construct allocator(%s)",
+                pr_err("["DEVICE_NAME"]: Can't construct allocator(%s)",
                          allocatorArray[i].name);

                continue;
--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debug.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_debug.c
@@ -1288,7 +1288,7 @@ gckOS_DumpBuffer(
    /* memory dump below. */
    if (Type >= gcvDUMP_BUFFER_TYPE_COUNT)
    {
-        gcmkPRINT("#[ERROR: invalid buffer type]\n");
+        pr_err("#[ERROR: invalid buffer type]\n");
        return;
    }

--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c
@@ -72,13 +72,24 @@
 #include <linux/export.h>
 #include <linux/of.h>
 #include <linux/regulator/consumer.h>
+#include <linux/utsname.h>
+#include <linux/timer.h>
+#include <linux/jiffies.h>

 #define _GC_OBJ_ZONE    gcvZONE_DEVICE

+#define MAX_TIMESTAMPS 10
+#define MAX_HW_PROCESS_TIME 90000000
+
+static struct timer_list my_timer;
+static struct workqueue_struct *my_workqueue;
+static struct work_struct my_work;
+
 static gckGALDEVICE galDevice;

 extern gcTA globalTA[gcdMAX_GPU_COUNT];

+
 #ifdef CONFIG_DEBUG_FS
 #if defined(CONFIG_CPU_CSKYV2) && LINUX_VERSION_CODE <= KERNEL_VERSION(3,0,8)
 static void
@@ -323,9 +334,9 @@ int gc_load_show(void* m, void* data)
 {
    int len = 0;
    gctUINT32 i = 0;
-    
+
    gckGALDEVICE device = galDevice;
-    
+
 #ifdef CONFIG_DEBUG_FS
    void* ptr = m;
 #else
@@ -335,8 +346,8 @@ int gc_load_show(void* m, void* data)
    if (!device) {
        return -ENXIO;
    }
-        
-    
+
+

        for (i = 0; i <= gcvCORE_2D_MAX; i++)
        {
@@ -1251,7 +1262,7 @@ static int set_clk(const char* buf)
        }
        else
        {
-            printk("Error: command format must be this: echo \"0 32 32\" > /sys/kernel/debug/gc/clk\n");
+            pr_err("Error: command format must be this: echo \"0 32 32\" > /sys/kernel/debug/gc/clk\n");
            return 0;
        }

@@ -1264,10 +1275,10 @@ static int set_clk(const char* buf)
    }

    if (3 == sscanf(data, "%d %d %d", &dumpCore, &clkScale[0], &clkScale[1])) {
-        printk("Change core:%d MC scale:%d SH scale:%d\n",
+        pr_err("Change core:%d MC scale:%d SH scale:%d\n",
                dumpCore, clkScale[0], clkScale[1]);
    } else {
-        printk("usage: echo \"0 32 32\" > clk\n");
+        pr_err("usage: echo \"0 32 32\" > clk\n");
        return 0;
    }

@@ -1279,7 +1290,7 @@ static int set_clk(const char* buf)
    }
    else
    {
-        printk("Error: invalid core\n");
+        pr_err("Error: invalid core\n");
    }

    return 0;
@@ -1354,7 +1365,7 @@ static int debugfs_copy_from_user(char *k_buf, const char __user *buf, size_t co
    ret = copy_from_user(k_buf, buf, count);
    if (ret != 0)
    {
-        printk("Error: lost data: %d\n", (int)ret);
+        pr_err("Error: lost data: %d\n", (int)ret);
        return -1;
    }

@@ -1844,7 +1855,7 @@ _SetupContiguousVidMem(

    if (Args->showArgs)
    {
-        gcmkPRINT("Galcore Info: ContiguousBase=0x%llx ContiguousSize=0x%zx\n", device->contiguousBase, device->contiguousSize);
+        pr_warn("Galcore Info: ContiguousBase=0x%llx ContiguousSize=0x%zx\n", device->contiguousBase, device->contiguousSize);
    }

 OnError:
@@ -2068,7 +2079,7 @@ _SetupIsr(
                gcmkONERROR(gcvSTATUS_GENERIC_IO);
            }

-            gcmkPRINT("galcore: polling core%d int state\n", Core);
+            pr_err("galcore: polling core%d int state\n", Core);

            Device->isrThread[Core] = task;
            Device->isrInitializeds[Core] = gcvTRUE;
@@ -2332,7 +2343,7 @@ _StopPreemptThread(
 /******************************************************************************\
 ******************************* G2D Devfreq support START***********************
 \******************************************************************************/
-
+#ifdef CONFIG_PM_DEVFREQ
 static int gc_df_target(struct device * dev, unsigned long *freq, u32 flags) {

    int i = 0;
@@ -2369,7 +2380,7 @@ static int gc_df_target(struct device * dev, unsigned long *freq, u32 flags) {
    for(i = 0; i < gcvCORE_2D_MAX; i++) {
        if(device->kernels[i]) {
            hardware = device->kernels[i]->hardware;
-            if(hardware->clockState) {
+            if(hardware->os->clockStates[i]) {
                gckHARDWARE_SetClock(hardware, i, _freq, _freq);
                device->kernels[i]->cur_freq = *freq;
            }
@@ -2425,7 +2436,7 @@ static int gc_df_get_cur_freq(struct device *dev, unsigned long *freq) {
 struct devfreq_simple_ondemand_data galcore_gov_data;

 static struct devfreq_dev_profile gc_df_profile = {
-    .polling_ms = 500,
+    .polling_ms = 50,
    .target = gc_df_target,
    .get_dev_status = gc_df_status,
    .get_cur_freq = gc_df_get_cur_freq,
@@ -2441,7 +2452,7 @@ g2d_EnableDevfreq(void) {

    ret = dev_pm_opp_of_add_table(galcore_device);
    if(ret) {
-        gcmkPRINT("add table failed \n");
+        pr_err("add table failed \n");
    }

    new_clk = devm_clk_get(galcore_device, "cclk");
@@ -2465,17 +2476,255 @@ g2d_EnableDevfreq(void) {
    galDevice->g2d_devfreq = devm_devfreq_add_device(galcore_device, &gc_df_profile, DEVFREQ_GOV_SIMPLE_ONDEMAND, &galcore_gov_data);

    if(IS_ERR(galDevice->g2d_devfreq)) {
-        gcmkPRINT("Errot: init devgreq %lx\n", (unsigned long)galcore_device);
+        pr_err("Errot: init devgreq %lx\n", (unsigned long)galcore_device);
        status = gcvSTATUS_NOT_SUPPORTED;
    }

    return status;
 }
+#endif

 /******************************************************************************\
-******************************* G2D Devfreq support END ************************
+******************************* Driver status query ****************************
 \******************************************************************************/

+gctUINT64 cur_on = 0, cur_idle = 0, cur_suspend = 0, cur_off = 0,
+          busy_time = 0, total_time = 0, freq = 396000000;
+gctUINT64 on = 0;
+gctUINT64 off = 0;
+gctUINT64 idle = 0;
+gctUINT64 suspend = 0;
+int dev_loading_percent;
+int dev_loading_max_percent;
+int updatePeriod_ms = 50;
+
+static ssize_t log_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
+{
+    ssize_t len = 0;
+    gctINT i, j,ct, pid, id = 0;
+    gctINT devIncenum = 0;
+    char name[24];
+    gceSTATUS status;
+    gckVIDMEM memory;
+    gctUINT32 free = 0, used = 0, total = 0, minFree = 0, maxUsed = 0;
+    gckGALDEVICE device = galDevice;
+    gcsDATABASE_PTR database;
+    gcsDATABASE_COUNTERS virtualCounter = {0, 0, 0};
+    gckKERNEL kernel = _GetValidKernel(device);
+    ktime_t result;
+
+    status = gckKERNEL_GetVideoMemoryPool(kernel, gcvPOOL_SYSTEM, &memory);
+
+    if (gcmIS_SUCCESS(status))
+    {
+        gcmkVERIFY_OK(
+            gckOS_AcquireMutex(memory->os, memory->mutex, gcvINFINITE));
+
+        free    = memory->freeBytes;
+        minFree = memory->minFreeBytes;
+        used    = memory->bytes - memory->freeBytes;
+        maxUsed = memory->bytes - memory->minFreeBytes;
+        total   = memory->bytes;
+
+        gcmkVERIFY_OK(gckOS_ReleaseMutex(memory->os, memory->mutex));
+    }
+    len += scnprintf(buf + len, PAGE_SIZE - len,
+        "[G2D] Version: %s\n"
+        "Build Time【%s,%s,%s,%s】\n"
+        "-------------------------------------------MODULE PARAM----------------------------------\n"
+        "updatePeriod_ms\n"
+        "       %d\n",
+        gcvVERSION_STRING, utsname()->sysname, utsname()->release, utsname()->version, utsname()->machine,
+        updatePeriod_ms
+        );
+    len += scnprintf(buf + len, PAGE_SIZE - len,
+        "-------------------------------------------INSTANCE INFO---------------------------------\n");
+
+    if (!kernel)
+    return -ENXIO;
+
+    gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
+    if (kernel->db->idleTime)
+    {
+        /* Record idle time if DB upated. */
+        kernel->db->idleTime = 0;
+    }
+
+    for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
+    {
+        for (database = kernel->db->db[i];
+            database != gcvNULL;
+            database = database->next)
+        {
+            static const char * otherCounterNames[] = {
+                "AllocContiguous",
+                "MapMemory",
+            };
+            gcsDATABASE_COUNTERS * otherCounters[] = {
+                &database->contiguous,
+                &database->mapMemory,
+            };
+            gcsDATABASE_COUNTERS * counter;
+            pid = database->processID;
+
+
+            for(j = 0; j < MAX_TIMESTAMPS; j++) {
+                if(database->start_times[j] == 0) continue;
+                if(database->end_times[j] - database->start_times[j] > result &&
+                database->end_times[j] - database->start_times[j] < MAX_HW_PROCESS_TIME) {
+                    result = database->end_times[j] - database->start_times[j];
+                    if(result > database->max_hw_time) {
+                        database->max_hw_time = result;
+                    }
+                }
+            }
+
+            gcmkVERIFY_OK(gckOS_GetProcessNameByPid(pid, gcmSIZEOF(name), name));
+
+            len += scnprintf(buf + len, PAGE_SIZE - len,
+            "ID: %d            ProId: %-8d              NAME: %s\n"
+            "\n",
+            id, pid, name
+            );
+            id++;
+            devIncenum++;
+
+
+            len += scnprintf(buf + len, PAGE_SIZE - len,
+            "                             Current               Maximum              Total\n");
+            for (ct = 0; ct < gcmCOUNTOF(otherCounterNames); ct++)
+            {
+                len += scnprintf(buf + len, PAGE_SIZE - len,
+                "%-16s     %16lld      %16lld      %16lld\n",
+                otherCounterNames[ct],
+                otherCounters[ct]->bytes,
+                otherCounters[ct]->maxBytes,
+                otherCounters[ct]->totalBytes);
+
+            }
+            counter = &database->vidMemPool[gcvPOOL_VIRTUAL];
+            virtualCounter.bytes += counter->bytes;
+            virtualCounter.maxBytes += counter->maxBytes;
+
+            len += scnprintf(buf + len, PAGE_SIZE - len,
+            "HwProcNs                    %lld                %lld \n",
+                result,database->max_hw_time);
+            result = 0;
+            len += scnprintf(buf + len, PAGE_SIZE - len,
+            "\n");
+
+            memset(database->start_times, 0, sizeof(database->start_times));
+            memset(database->end_times, 0, sizeof(database->end_times));
+            database->st = 0;
+
+        }
+    }
+    gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
+
+    len += scnprintf(buf + len, PAGE_SIZE - len,
+    "-------------------------------------------MODULE STATUS---------------------------------\n"
+    "DevInstanceNum          DevLoading_%%          DevLoadingMax_%%\n"
+    "%d                          %d                      %d\n",
+    devIncenum, dev_loading_percent, dev_loading_max_percent
+    );
+
+    len += scnprintf(buf + len, PAGE_SIZE - len,
+    "-----------------------------------------VIDEO MEMORY INFO-------------------------------\n"
+    "   POOL SYSTEM:\n"
+    "      Free             Minfree              Used                   MaxUsed             Total\n"
+    "%10u B        %10u B        %10u B         %10u B         %10u B\n"
+    "\n"
+    "   POOL VIRTUAL:\n"
+    "      Used              MaxUsed\n"
+    "%10llu B       %10llu B\n",
+    free, minFree, used, maxUsed,total,
+    virtualCounter.bytes, virtualCounter.maxBytes);
+
+    gckHARDWARE_QueryStateTimer(kernel->hardware, &on, &off, &idle, &suspend);
+    len += scnprintf(buf + len, PAGE_SIZE - len,
+    "--------------------------------------------IDLE INFO------------------------------------\n"
+    " On                     Off                   Suspend\n"
+    "%lld ns       %lld ns          %lld ns",
+    on, off, suspend);
+    len += scnprintf(buf + len, PAGE_SIZE - len,
+    "\n\n");
+
+    return len;
+}
+
+static ssize_t log_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
+{
+    dev_loading_max_percent = 0;
+    return count;
+}
+
+static ssize_t updatePeriod_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
+{
+    return sprintf(buf,"%u\n",updatePeriod_ms);
+}
+
+static void timer_callback(struct timer_list *t) {
+    queue_work(my_workqueue, &my_work);
+    mod_timer(t, jiffies + msecs_to_jiffies(updatePeriod_ms));
+}
+
+static void my_work_func(struct work_struct *work)
+{
+    gckGALDEVICE device = galDevice;
+    gckKERNEL kernel = _GetValidKernel(device);
+    int i;
+
+    gckHARDWARE_QueryStateTimer(kernel->hardware, &on, &off, &idle, &suspend);
+
+    for(i = 0; i < gcvCORE_2D_MAX; i++) {
+        if(device->kernels[i]) {
+            freq = device->kernels[i]->cur_freq;
+        }
+    }
+
+    busy_time = on - cur_on;
+    total_time = on - cur_on + idle - cur_idle + suspend - cur_suspend + off - cur_off;
+    dev_loading_percent = busy_time * 100 / total_time / (396000000 / freq);
+    if(dev_loading_max_percent < dev_loading_percent) {
+        dev_loading_max_percent = dev_loading_percent;
+    }
+    cur_on = on;
+    cur_idle = idle;
+    cur_suspend = suspend;
+    cur_off = off;
+}
+
+static ssize_t updatePeriod_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
+{
+      char *start = (char *)buf;
+      updatePeriod_ms = simple_strtoul(start, &start, 0);
+      if(updatePeriod_ms <= 0) {
+        del_timer(&my_timer);
+        if (my_workqueue)
+        destroy_workqueue(my_workqueue);
+      } else {
+        my_workqueue = create_workqueue("my_workqueue");
+        INIT_WORK(&my_work, my_work_func);
+        timer_setup(&my_timer, timer_callback, 0);
+        mod_timer(&my_timer, jiffies + msecs_to_jiffies(updatePeriod_ms));
+      }
+      return count;
+}
+
+static struct kobj_attribute log_attr = __ATTR(log, 0664, log_show, log_store);
+
+static struct kobj_attribute updatePeriod_attr = __ATTR(updatePeriod_ms, 0664, updatePeriod_show, updatePeriod_store);
+
+static struct attribute *attrs[] = {
+    &log_attr.attr,
+    &updatePeriod_attr.attr,
+    NULL,
+};
+
+static struct attribute_group xrp_dev_attr_group = {
+    .name = "info",
+    .attrs = attrs,
+};

 /*******************************************************************************
 **
@@ -2502,7 +2751,7 @@ gckGALDEVICE_Construct(
    gckGALDEVICE device;
    gceSTATUS status = gcvSTATUS_OK;
    gctUINT64 isrPolling = -1;
-    gctINT32 i;
+    gctINT32 i, ret;

    gcmkHEADER_ARG("Platform=%p Args=%p", Platform, Args);

@@ -2553,7 +2802,7 @@ gckGALDEVICE_Construct(
            else
            {
 #if USE_LINUX_PCIE
-                gcmkPRINT("register should be mapped in platform layer");
+                pr_warn("register should be mapped in platform layer");
 #endif
                if (!request_mem_region(physical,
                        device->requestedRegisterMemSizes[i],
@@ -2846,8 +3095,21 @@ gckGALDEVICE_Construct(

    /* Return pointer to the device. */
    *Device = galDevice = device;
+#ifdef CONFIG_PM_DEVFREQ
    g2d_EnableDevfreq();
    devfreq_suspend_device(galDevice->g2d_devfreq);
+#endif
+    ret = sysfs_create_group(&galcore_device->kobj, &xrp_dev_attr_group);
+	if (ret) {
+		dev_err(galcore_device, "Failed to create xrp dev  sysfs.\n");
+		goto OnError;
+	}
+    my_workqueue = create_workqueue("my_workqueue");
+
+    INIT_WORK(&my_work, my_work_func);
+    timer_setup(&my_timer, timer_callback, 0);
+
+    mod_timer(&my_timer, jiffies + msecs_to_jiffies(100));

 OnError:
    if (gcmIS_ERROR(status))
@@ -2886,7 +3148,12 @@ gckGALDEVICE_Destroy(
    gckKERNEL kernel = gcvNULL;

    gcmkHEADER_ARG("Device=%p", Device);
-
+    
+    sysfs_remove_group(&galcore_device->kobj, &xrp_dev_attr_group);
+    del_timer(&my_timer);
+    if (my_workqueue) {
+        destroy_workqueue(my_workqueue);
+    }
    if (Device != gcvNULL)
    {
        /* Grab the first available kernel */
--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h
@@ -150,11 +150,12 @@ typedef struct _gckGALDEVICE
    /* gctsOs object for trust application. */
    gctaOS              taos;

-    /*Number of devices opened*/           
+    /*Number of devices opened*/
    atomic_t             openNum;
    /*object of devfreq add device*/
+#ifdef CONFIG_PM_DEVFREQ
    struct devfreq *g2d_devfreq;
-
+#endif
 #if gcdENABLE_DRM
    void *              drm;
 #endif
--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
@@ -70,7 +70,6 @@
 MODULE_DESCRIPTION("Vivante Graphics Driver");
 MODULE_LICENSE("Dual MIT/GPL");
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)
-MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);
 #endif

 static struct class* gpuClass = NULL;
@@ -645,7 +644,7 @@ gckOS_DumpParam(
 {
    gctINT i;

-    printk("Galcore options:\n");
+    gcmkPRINT("Galcore options:\n");

 #if USE_LINUX_PCIE
    if (bar != -1)
@@ -822,8 +821,10 @@ static int drv_open(
    filp->private_data = data;

    /* Success. */
+#ifdef CONFIG_PM_DEVFREQ
    atomic_inc_return(&galDevice->openNum);
    devfreq_resume_device(galDevice->g2d_devfreq);
+#endif
    gcmkFOOTER_NO();
    return 0;
 }
@@ -889,10 +890,12 @@ static int drv_release(

    kfree(data);
    filp->private_data = NULL;
-
+#ifdef CONFIG_PM_DEVFREQ
    if(atomic_dec_return(&galDevice->openNum) == 0) {
        devfreq_suspend_device(galDevice->g2d_devfreq);
    }
+#endif
+
    /* Success. */
    ret = 0;

@@ -1160,7 +1163,7 @@ static int drv_init(void)

    gcmkHEADER();

-    printk(KERN_INFO "Galcore version %s\n", gcvVERSION_STRING);
+    pr_info("Galcore version %s\n", gcvVERSION_STRING);

    if (showArgs)
    {
@@ -1385,11 +1388,11 @@ static int __devinit gpu_probe(struct platform_device *pdev)
    contiguousBaseCap = platform->params.contiguousBase;
    contiguousSizeCap = platform->params.contiguousSize;

-    gcmkPRINT("Capture only mode is enabled in Hal Kernel.");
+    pr_warn("Capture only mode is enabled in Hal Kernel.");

    if ((contiguousBaseCap + contiguousSizeCap) > 0x80000000)
    {
-        gcmkPRINT("Capture only mode: contiguousBase + contiguousSize > 2G, there is error in CModel and old MMU version RTL simulation.");
+        pr_err("Capture only mode: contiguousBase + contiguousSize > 2G, there is error in CModel and old MMU version RTL simulation.");
    }

    for (i = 0; i < gcvCORE_COUNT; i++)
@@ -1438,7 +1441,7 @@ static int __devinit gpu_probe(struct platform_device *pdev)

    if (powerManagement == 0)
    {
-        gcmkPRINT("[galcore warning]: power saveing is disabled.");
+        pr_err("[galcore warning]: power saveing is disabled.");
    }

    ret = drv_init();
@@ -1462,14 +1465,14 @@ static int __devinit gpu_probe(struct platform_device *pdev)
            }
        }

-        gcmkFOOTER_ARG(KERN_INFO "Failed to register gpu driver: %d\n", ret);
+        pr_info("Failed to register gpu driver: %d\n", ret);
    }
    else
    {
        gcmkFOOTER_NO();
    }

-    gcmkFOOTER_ARG(KERN_INFO "Success ret=%d", ret);
+    pr_info("Success ret=%d", ret);
    return ret;
 }

@@ -1650,7 +1653,7 @@ static int __init gpu_init(void)

    if (ret || !platform)
    {
-        printk(KERN_ERR "galcore: Soc platform init failed.\n");
+        pr_err("galcore: Soc platform init failed.\n");
        return -ENODEV;
    }

@@ -1658,7 +1661,7 @@ static int __init gpu_init(void)

    if (ret)
    {
-        printk(KERN_ERR "galcore: gpu_init() failed to register driver!\n");
+        pr_err("galcore: gpu_init() failed to register driver!\n");
        gckPLATFORM_Terminate(platform);
        platform = NULL;
        return -ENODEV;
--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_drm.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_drm.c
@@ -905,7 +905,7 @@ OnError:
        {
            drm_dev_unref(drm);
        }
-        printk(KERN_ERR "galcore: Failed to setup drm device.\n");
+        pr_err("galcore: Failed to setup drm device.\n");
    }
    return ret;
 }
--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_iommu.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_iommu.c
@@ -158,7 +158,7 @@ gckIOMMU_Construct(

    *Iommu = iommu;

-    gcmkPRINT("[galcore]: Enable IOMMU\n");
+    pr_debug("[galcore]: Enable IOMMU\n");
 OnError:
    if (gcmIS_ERROR(status))
    {
--- a/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
@@ -1664,7 +1664,7 @@ gckOS_RequestReservedMemory(
    allocator = _FindAllocator(Os, gcvALLOC_FLAG_LINUX_RESERVED_MEM);
    if (!allocator)
    {
-        gcmkPRINT("reserved-mem allocator not integrated!");
+        pr_err("reserved-mem allocator not integrated!");
        gcmkONERROR(gcvSTATUS_GENERIC_IO);
    }

@@ -1913,7 +1913,7 @@ gckOS_ReadRegisterEx(
             * 2. In non-irq context, register access should not be called,
             *    otherwise it's driver bug.
             */
-            printk(KERN_ERR "[galcore]: %s(%d) GPU[%d] external clock off",
+            pr_err("[galcore]: %s(%d) GPU[%d] external clock off",
                   __func__, __LINE__, Core);
            gcmkBUG_ON(1);
            return gcvSTATUS_GENERIC_IO;
@@ -1924,7 +1924,7 @@ gckOS_ReadRegisterEx(

 #if gcdDUMP_AHB_ACCESS
        /* Dangerous to print in interrupt context, skip. */
-        gcmkPRINT("@[RD %d] %08x %08x", Core, Address, *Data);
+        pr_warn("@[RD %d] %08x %08x", Core, Address, *Data);
 #endif
    }

@@ -1954,7 +1954,7 @@ _WriteRegisterEx(
        {
            spin_unlock(&Os->registerAccessLock);

-            printk(KERN_ERR "[galcore]: %s(%d) GPU[%d] external clock off",
+            pr_err("[galcore]: %s(%d) GPU[%d] external clock off",
                   __func__, __LINE__, Core);

            /* Driver bug: register write when clock off. */
@@ -1980,7 +1980,7 @@ _WriteRegisterEx(
        {
            spin_unlock_irqrestore(&Os->registerAccessLock, flags);

-            printk(KERN_ERR "[galcore]: %s(%d) GPU[%d] external clock off",
+            pr_err("[galcore]: %s(%d) GPU[%d] external clock off",
                      __func__, __LINE__, Core);

            /* Driver bug: register write when clock off. */
@@ -1993,7 +1993,7 @@ _WriteRegisterEx(

 #if gcdDUMP_AHB_ACCESS
        /* Dangerous to print in interrupt context, skip. */
-        gcmkPRINT("@[WR %d] %08x %08x", Core, Address, Data);
+        pr_warn("@[WR %d] %08x %08x", Core, Address, Data);
 #endif
    }

@@ -4462,7 +4462,7 @@ _CacheOperation(

    if (!mdl || !mdl->allocator)
    {
-        gcmkPRINT("[galcore]: %s: Logical=%p no mdl", __FUNCTION__, Logical);
+        pr_err("[galcore]: %s: Logical=%p no mdl", __FUNCTION__, Logical);
        return gcvSTATUS_INVALID_ARGUMENT;
    }

@@ -7600,7 +7600,7 @@ gckOS_WrapMemory(
        {
            /* Won't enter here currently, the caller confirms the dmabuf is valid. */

-            gcmkPRINT("Wrap memory: invalid dmabuf.\n");
+            pr_err("Wrap memory: invalid dmabuf.\n");
            gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
        }

--- a/drivers/gpu-viv/hal/os/linux/kernel/platform/default/gc_hal_kernel_platform_default.c
+++ b/drivers/gpu-viv/hal/os/linux/kernel/platform/default/gc_hal_kernel_platform_default.c
@@ -584,7 +584,7 @@ _QueryBarInfo(
        return;
    }

-    gcmkPRINT("Bar%d addr=0x%x size=0x%x", BarNum, addr, size);
+    pr_warn("Bar%d addr=0x%x size=0x%x", BarNum, addr, size);

    *BarAddr = addr;
    *BarSize = size;
@@ -613,31 +613,31 @@ static int gpu_sub_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
    static u64 dma_mask = DMA_40BIT_MASK;
 #endif

-    gcmkPRINT("PCIE DRIVER PROBED");
+    pr_debug("PCIE DRIVER PROBED");
    if (pci_enable_device(pdev)) {
-        printk(KERN_ERR "galcore: pci_enable_device() failed.\n");
+        pr_err("galcore: pci_enable_device() failed.\n");
    }

    if (pci_set_dma_mask(pdev, dma_mask)) {
-        printk(KERN_ERR "galcore: Failed to set DMA mask.\n");
+        pr_err("galcore: Failed to set DMA mask.\n");
    }

    pci_set_master(pdev);

    if (pci_request_regions(pdev, "galcore")) {
-        printk(KERN_ERR "galcore: Failed to get ownership of BAR region.\n");
+        pr_err("galcore: Failed to get ownership of BAR region.\n");
    }

 #if USE_MSI
    if (pci_enable_msi(pdev)) {
-        printk(KERN_ERR "galcore: Failed to enable MSI.\n");
+        pr_err("galcore: Failed to enable MSI.\n");
    }
 #endif

 #if defined(CONFIG_PPC)
    /* On PPC platform, enable bus master, enable irq. */
    if (pci_write_config_word(pdev, 0x4, 0x0006) < 0) {
-        printk(KERN_ERR "galcore: Failed to enable bus master on PPC.\n");
+        pr_err("galcore: Failed to enable bus master on PPC.\n");
    }
 #endif

@@ -824,14 +824,14 @@ int gckPLATFORM_Init(struct platform_driver *pdrv,
    struct platform_device *default_dev = platform_device_alloc(pdrv->driver.name, -1);

    if (!default_dev) {
-        printk(KERN_ERR "galcore: platform_device_alloc failed.\n");
+        pr_err("galcore: platform_device_alloc failed.\n");
        return -ENOMEM;
    }

    /* Add device */
    ret = platform_device_add(default_dev);
    if (ret) {
-        printk(KERN_ERR "galcore: platform_device_add failed.\n");
+        pr_err("galcore: platform_device_add failed.\n");
        platform_device_put(default_dev);
        return ret;
    }
@@ -848,7 +848,7 @@ int gckPLATFORM_Init(struct platform_driver *pdrv,
    pdrv->driver.of_match_table = gpu_dt_ids;
    ret = gpu_power_domain_init();
    if (ret) {
-        printk(KERN_ERR "galcore: gpu_gpc_init failed.\n");
+        pr_err("galcore: gpu_gpc_init failed.\n");
    }
 #endif

--- a/drivers/gpu-viv/hal/security_v1/gc_hal_ta_hardware.c
+++ b/drivers/gpu-viv/hal/security_v1/gc_hal_ta_hardware.c
@@ -60,6 +60,7 @@
 #include "gc_hal_ta_hardware.h"
 #include "gc_hal.h"
 #include "gc_feature_database.h"
+#include <linux/printk.h>


 #define _GC_OBJ_ZONE     1
@@ -187,7 +188,7 @@ _IdentifyHardwareByDatabase(

    if (database == gcvNULL)
    {
-        gcmkPRINT("[galcore]: Feature database is not found,"
+        pr_warn("[galcore]: Feature database is not found,"
                  "chipModel=0x%0x, chipRevision=0x%x, productID=0x%x, ecoID=0x%x, customerID=0x%x",
                  Hardware->chipModel,
                  Hardware->chipRevision,
--- a/drivers/gpu-viv/hal/security_v1/gc_hal_ta_mmu.c
+++ b/drivers/gpu-viv/hal/security_v1/gc_hal_ta_mmu.c
@@ -58,6 +58,7 @@
 #include "gc_hal_security_interface.h"
 #include "gc_hal_ta.h"
 #include "gc_hal.h"
+#include <linux/printk.h>

 #define _GC_OBJ_ZONE 2
 /*******************************************************************************
@@ -560,11 +561,11 @@ gctaMMU_DumpPagetableEntry(

    stlb = stlbs[mtlb];

-    gcmkPRINT("    MTLB entry = %d\n", mtlb);
+    pr_warn("    MTLB entry = %d\n", mtlb);

-    gcmkPRINT("    STLB entry = %d\n", stlbOffset);
+    pr_warn("    STLB entry = %d\n", stlbOffset);

-    gcmkPRINT("    Offset = 0x%08X (%d)\n", offsetInPage, offsetInPage);
+    pr_warn("    Offset = 0x%08X (%d)\n", offsetInPage, offsetInPage);


    if (stlb == gcvNULL)
@@ -572,13 +573,13 @@ gctaMMU_DumpPagetableEntry(
        /* Dmp mtlb entry. */
        entry = mtlbLogical[mtlb];

-        gcmkPRINT("   mtlb entry [%d] = %x", mtlb, entry);
+        pr_warn("   mtlb entry [%d] = %x", mtlb, entry);
    }
    else
    {
        stlbLogical = stlb->logical;

-        gcmkPRINT("    stlb entry = 0x%08X", stlbLogical[stlbOffset]);
+        pr_warn("    stlb entry = 0x%08X", stlbLogical[stlbOffset]);
    }
 }

--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -2059,6 +2059,12 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 			drm_scdc_set_scrambling(hdmi->ddc, 0);
 		}
 	}
+	else{
+		hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
+		hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
+				HDMI_MC_SWRSTZ);
+		drm_scdc_set_scrambling(hdmi->ddc, 0);
+	}

 	/* Set up horizontal active pixel width */
 	hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1);
--- a/drivers/gpu/drm/img-rogue/gpu_trace_point.h
+++ b/drivers/gpu/drm/img-rogue/gpu_trace_point.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM gpu_trace_point
+
+#if !defined(_TRACE_GPU_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_GPU_H
+
+#include <linux/sched/numa_balancing.h>
+#include <linux/tracepoint.h>
+#include <linux/binfmts.h>
+
+TRACE_EVENT(gpu_interrupt,
+
+       TP_PROTO(unsigned int IRQStatusReg, unsigned int IRQStatus),
+
+       TP_ARGS(IRQStatusReg, IRQStatus),
+
+       TP_STRUCT__entry(
+               __field(        unsigned int,   IRQStatusReg)
+               __field(        unsigned int,   IRQStatus)
+       ),
+
+       TP_fast_assign(
+               __entry->IRQStatusReg = IRQStatusReg;
+               __entry->IRQStatus = IRQStatus;
+       ),
+
+       TP_printk("IRQStatusReg=%d IRQStatus=%d", __entry->IRQStatusReg, __entry->IRQStatus)
+);
+
+#endif /* _TRACE_GPU_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
--- a/drivers/gpu/drm/img-rogue/module_common.c
+++ b/drivers/gpu/drm/img-rogue/module_common.c
@@ -550,6 +550,14 @@ out:
 	return iErr;
 }

+static void wrap_pvr_sync_close(void *connection_data)
+{
+	CONNECTION_DATA *psConnection = (CONNECTION_DATA *)connection_data;
+	pvr_sync_close(connection_data);
+	OSConnectionPrivateDataDeInit(psConnection->hOsPrivateData);
+	kfree(psConnection);
+}
+
 /**************************************************************************/ /*!
@Function     PVRSRVDeviceSyncOpen
@Description  Sync device open.
@@ -633,7 +641,7 @@ static int PVRSRVDeviceSyncOpen(PVRSRV_DEVICE_NODE *psDeviceNode,

 #if defined(SUPPORT_NATIVE_FENCE_SYNC) && !defined(USE_PVRSYNC_DEVNODE)
 #if (PVRSRV_DEVICE_INIT_MODE == PVRSRV_LINUX_DEV_INIT_ON_CONNECT)
-	psConnectionPriv->pfDeviceRelease = pvr_sync_close;
+	psConnectionPriv->pfDeviceRelease = wrap_pvr_sync_close;
 #endif
 #endif
 	psDRMFile->driver_priv = psConnectionPriv;
--- a/drivers/gpu/drm/img-rogue/osfunc.c
+++ b/drivers/gpu/drm/img-rogue/osfunc.c
@@ -1843,6 +1843,34 @@ void OSDumpVersionInfo(DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf,
 					utsname()->version,
 					utsname()->machine);
 }
+
+void OSWriteHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value)
+{
+	writel((IMG_UINT32)(ui32Value), (IMG_BYTE __iomem *)(pvLinRegBaseAddr) + (ui32Offset));
+}
+
+void OSWriteHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT64 ui64Value)
+{
+	volatile void *_addr = pvLinRegBaseAddr;
+	IMG_UINT32 _off = ui32Offset;
+	IMG_UINT64 _val = ui64Value;
+	writel((IMG_UINT32)((_val) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off));
+	writel((IMG_UINT32)(((IMG_UINT64)(_val) >> 32) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off) + 4);
+}
+
+IMG_UINT32 OSReadHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset)
+{
+	return ((IMG_UINT32)readl((IMG_BYTE __iomem *)(pvLinRegBaseAddr) + (ui32Offset)));
+}
+
+IMG_UINT64 OSReadHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset)
+{
+	volatile void *_addr = pvLinRegBaseAddr;
+	IMG_UINT32 _off = ui32Offset;
+	return (IMG_UINT64)(( (IMG_UINT64)(readl((IMG_BYTE __iomem *)(_addr) + (_off) + 4)) << 32) \
+		| readl((IMG_BYTE __iomem *)(_addr) + (_off)));
+}
+
 #if defined(SUPPORT_DMA_TRANSFER)

 typedef struct _OS_CLEANUP_DATA_
--- a/drivers/gpu/drm/img-rogue/osfunc.h
+++ b/drivers/gpu/drm/img-rogue/osfunc.h
@@ -1022,34 +1022,24 @@ void OSWriteMemoryBarrier(volatile void *hReadback);
 	} while (0)

 #if defined(__linux__) && defined(__KERNEL__) && !defined(NO_HARDWARE)
+
+    void OSWriteHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value);
+    void OSWriteHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset, IMG_UINT64 ui64Value);
+    IMG_UINT32 OSReadHWRegl(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset);
+    IMG_UINT64 OSReadHWRegll(volatile void *pvLinRegBaseAddr, IMG_UINT32 ui32Offset);
+
 	#define OSReadHWReg8(addr, off)  ((IMG_UINT8)readb((IMG_BYTE __iomem *)(addr) + (off)))
 	#define OSReadHWReg16(addr, off) ((IMG_UINT16)readw((IMG_BYTE __iomem *)(addr) + (off)))
-	#define OSReadHWReg32(addr, off) ((IMG_UINT32)readl((IMG_BYTE __iomem *)(addr) + (off)))
+	#define OSReadHWReg32(addr, off) OSReadHWRegl(addr, off)

 	/* Little endian support only */
-	#define OSReadHWReg64(addr, off) \
-			({ \
-				__typeof__(addr) _addr = addr; \
-				__typeof__(off) _off = off; \
-				(IMG_UINT64) \
-				( \
-					( (IMG_UINT64)(readl((IMG_BYTE __iomem *)(_addr) + (_off) + 4)) << 32) \
-					| readl((IMG_BYTE __iomem *)(_addr) + (_off)) \
-				); \
-			})
+	#define OSReadHWReg64(addr, off) OSReadHWRegll(addr, off)

 	#define OSWriteHWReg8(addr, off, val)  writeb((IMG_UINT8)(val), (IMG_BYTE __iomem *)(addr) + (off))
 	#define OSWriteHWReg16(addr, off, val) writew((IMG_UINT16)(val), (IMG_BYTE __iomem *)(addr) + (off))
-	#define OSWriteHWReg32(addr, off, val) writel((IMG_UINT32)(val), (IMG_BYTE __iomem *)(addr) + (off))
+	#define OSWriteHWReg32(addr, off, val) OSWriteHWRegl(addr, off, val)
 	/* Little endian support only */
-	#define OSWriteHWReg64(addr, off, val) do \
-			{ \
-				__typeof__(addr) _addr = addr; \
-				__typeof__(off) _off = off; \
-				__typeof__(val) _val = val; \
-				writel((IMG_UINT32)((_val) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off)); \
-				writel((IMG_UINT32)(((IMG_UINT64)(_val) >> 32) & 0xffffffff), (IMG_BYTE __iomem *)(_addr) + (_off) + 4); \
-			} while (0)
+	#define OSWriteHWReg64(addr, off, val) OSWriteHWRegll(addr, off, val)


 #elif defined(NO_HARDWARE)
--- a/drivers/gpu/drm/img-rogue/rgxinit.c
+++ b/drivers/gpu/drm/img-rogue/rgxinit.c
@@ -127,6 +127,10 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "pdump_physmem.h"
 #endif

+#undef linux
+#define CREATE_TRACE_POINTS
+#include "gpu_trace_point.h"
+
 static PVRSRV_ERROR RGXDevInitCompatCheck(PVRSRV_DEVICE_NODE *psDeviceNode);
 static PVRSRV_ERROR RGXDevVersionString(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_CHAR **ppszVersionString);
 static PVRSRV_ERROR RGXDevClockSpeed(PVRSRV_DEVICE_NODE *psDeviceNode, IMG_PUINT32 pui32RGXClockSpeed);
@@ -402,6 +406,7 @@ static inline IMG_BOOL RGXAckHwIrq(PVRSRV_RGXDEV_INFO *psDevInfo,
 {
 	IMG_UINT32 ui32IRQStatus = OSReadHWReg32(psDevInfo->pvRegsBaseKM, ui32IRQStatusReg);

+	trace_gpu_interrupt(ui32IRQStatusReg, ui32IRQStatus);
 	if (ui32IRQStatus & ui32IRQStatusEventMsk)
 	{
 		/* acknowledge and clear the interrupt */
@@ -511,6 +516,9 @@ static IMG_BOOL RGX_LISRHandler(void *pvData)
 		{
 			UPDATE_LISR_DBG_STATUS(RGX_LISR_DEVICE_NOT_POWERED);
 		}
+		/* When handling interrupts, there may be a situation where the GPU is powered off,
+		 * return IMG_TRUE to avoid the OS considering that this interrupt is nobody cared */
+		bIrqAcknowledged = IMG_TRUE;
 	}

 	return bIrqAcknowledged;
--- a/drivers/gpu/drm/img-rogue/server_srvcore_bridge.c
+++ b/drivers/gpu/drm/img-rogue/server_srvcore_bridge.c
@@ -373,7 +373,7 @@ PVRSRVBridgeEventObjectClose(IMG_UINT32 ui32DispatchTableEntry,
 		     (psEventObjectCloseOUT->eError != PVRSRV_ERROR_KERNEL_CCB_FULL) &&
 		     (psEventObjectCloseOUT->eError != PVRSRV_ERROR_RETRY)))
 	{
-		PVR_DPF((PVR_DBG_ERROR,
+		PVR_DPF((PVR_DBG_WARNING,
 			 "%s: %s", __func__, PVRSRVGetErrorString(psEventObjectCloseOUT->eError)));
 		UnlockHandle(psConnection->psHandleBase);
 		goto EventObjectClose_exit;
--- a/drivers/gpu/drm/img-rogue/sysconfig.c
+++ b/drivers/gpu/drm/img-rogue/sysconfig.c
@@ -307,6 +307,8 @@ PVRSRV_ERROR SysDevInit(void *pvOSDevice, PVRSRV_DEVICE_CONFIG **ppsDevConfig)
 	dma_set_mask(pvOSDevice, DMA_BIT_MASK(40));
 #endif

+	thead_sysfs_init(pvOSDevice);
+
   mfg = dt_hw_init(pvOSDevice);
   if (IS_ERR(mfg)) {
       if (PTR_ERR(mfg) == -EPROBE_DEFER)
@@ -419,6 +421,7 @@ void SysDevDeInit(PVRSRV_DEVICE_CONFIG *psDevConfig)
 #endif

 	PhysHeapsDestroy(psDevConfig->pasPhysHeaps);
+	thead_sysfs_uninit(psDevConfig->pvOSDevice);
 	OSFreeMem(psDevConfig);
 }

--- a/drivers/gpu/drm/img-rogue/thead_sys.c
+++ b/drivers/gpu/drm/img-rogue/thead_sys.c
@@ -54,9 +54,340 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <linux/thermal.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <linux/sysfs.h>
+#include <linux/utsname.h>
+#include <linux/timer.h>
+#include <linux/jiffies.h>
+#include <linux/workqueue.h>
+#include <drm/drm_device.h>

+#include "pvrsrv.h"
+#include "pvr_drv.h"
+#include "proc_stats.h"
+#include "pvrversion.h"
+#include "rgxhwperf.h"
+#include "rgxinit.h"
+#include "process_stats.h"
 #include "thead_sys.h"

+#ifdef SUPPORT_RGX
+static IMG_HANDLE ghGpuUtilSysFS;
+#endif
+static int thead_gpu_period_ms = -1;
+static int thead_gpu_loading_max_percent = -1;
+static int thead_gpu_last_server_error = 0;
+static int thead_gpu_last_rgx_error = 0;
+
+struct gpu_sysfs_private_data {
+	struct device *dev;
+	struct timer_list timer;
+	struct workqueue_struct *workqueue;
+	struct work_struct work;
+};
+static struct gpu_sysfs_private_data thead_gpu_sysfs_private_data;
+
+/******************定义log的读写属性*************************************/
+static ssize_t thead_gpu_log_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
+{
+	ssize_t len = 0;
+	PDLLIST_NODE pNext, pNode;
+	struct device *dev = kobj_to_dev(kobj);
+	struct drm_device *drm_dev = dev_get_drvdata(dev);
+	struct pvr_drm_private *priv = drm_dev->dev_private;
+	PVRSRV_DEVICE_NODE *psDevNode = priv->dev_node;
+	PVRSRV_DEVICE_HEALTH_STATUS eHealthStatus = OSAtomicRead(&psDevNode->eHealthStatus);
+	PVRSRV_DATA *psPVRSRVData = PVRSRVGetPVRSRVData();
+
+	// 驱动信息
+	int dev_id = (int)psDevNode->sDevId.ui32InternalID;
+	int dev_connection_num = 0;
+	int dev_loading_percent = -1;
+
+	// 内存信息
+	IMG_UINT32 dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_COUNT];
+
+	// 实例/会话/通道信息
+	int instance_id = 0;
+
+	// 异常信息
+	char* server_state[3] = {"UNDEFINED", "OK", "BAD"};
+	char* rgx_state[5] = {"UNDEFINED", "OK", "NOT RESPONDING", "DEAD", "FAULT"};
+	int rgx_err = 0;
+
+	if (psDevNode->pvDevice != NULL)
+	{
+		PVRSRV_RGXDEV_INFO *psDevInfo = psDevNode->pvDevice;
+#ifdef SUPPORT_RGX
+		if (!PVRSRV_VZ_MODE_IS(GUEST) &&
+			psDevInfo->pfnGetGpuUtilStats &&
+			eHealthStatus == PVRSRV_DEVICE_HEALTH_STATUS_OK)
+		{
+			RGXFWIF_GPU_UTIL_STATS sGpuUtilStats;
+			PVRSRV_ERROR eError = PVRSRV_OK;
+
+			eError = psDevInfo->pfnGetGpuUtilStats(psDevNode,
+													ghGpuUtilSysFS,
+													&sGpuUtilStats);
+
+			if ((eError == PVRSRV_OK) &&
+				((IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative))
+			{
+				IMG_UINT64 util;
+				IMG_UINT32 rem;
+
+				util = 100 * sGpuUtilStats.ui64GpuStatActive;
+				util = OSDivide64(util, (IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative, &rem);
+
+				dev_loading_percent = (int)util;
+			}
+		}
+#endif
+		rgx_err = psDevInfo->sErrorCounts.ui32WGPErrorCount + psDevInfo->sErrorCounts.ui32TRPErrorCount;
+	}
+
+	if (dev_loading_percent > thead_gpu_loading_max_percent)
+		thead_gpu_loading_max_percent = dev_loading_percent;
+
+	PVRSRVFindProcessMemStats(0, PVRSRV_DRIVER_STAT_TYPE_COUNT, IMG_TRUE, dev_mem_state);
+
+	if (!psDevNode->hConnectionsLock)
+	{
+		len += scnprintf(buf + len, PAGE_SIZE - len,
+			"[GPU] Version: %s\n"
+			"Build Info: %s %s %s %s\n"
+			"----------------------------------------MODULE PARAM-----------------------------------------\n"
+			"updatePeriod_ms\n"
+			"%d\n"
+			"----------------------------------------MODULE STATUS----------------------------------------\n"
+			"DevId     DevInstanceNum      DevLoading_%%   DevLoadingMax_%%\n"
+			"%-10d%-20d%-15d%-15d\n"
+			"----------------------------------------MEM INFO(KB)-----------------------------------------\n"
+			"KMalloc           VMalloc           PTMemoryUMA       VMapPTUMA\n"
+			"%-18d%-18d%-18d%-18d\n"
+			"PTMemoryLMA       IORemapPTLMA      GPUMemLMA         GPUMemUMA\n"
+			"%-18d%-18d%-18d%-18d\n"
+			"GPUMemUMAPool     MappedGPUMemUMA/LMA                 DmaBufImport\n"
+			"%-18d%-36d%-18d\n"
+			"----------------------------------------INSTANCE INFO----------------------------------------\n"
+			"Id   ProName             ProId     ThdId\n"
+			"---------------------------------------EXCEPTION INFO----------------------------------------\n"
+			"Server_State      Server_Error      RGX_State         RGX_Error\n"
+			"%-18s%-18d%-18s%-18d\n",
+			PVRVERSION_STRING, utsname()->sysname, utsname()->release, utsname()->version, utsname()->machine, thead_gpu_period_ms,
+			dev_id, 0, dev_loading_percent, thead_gpu_loading_max_percent,
+			dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_KMALLOC] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMALLOC],
+			dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_UMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMAP_PT_UMA] >> 10,
+			dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_IOREMAP_PT_LMA] >> 10,
+			dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA] >> 10,
+			dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA_POOL] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_MAPPED_GPUMEM_UMA_LMA] >> 10,
+			dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_DMA_BUF_IMPORT] >> 10,
+			server_state[psPVRSRVData->eServicesState], PVRSRV_KM_ERRORS - thead_gpu_last_server_error,
+			rgx_state[eHealthStatus], rgx_err - thead_gpu_last_rgx_error);
+		return len;
+	}
+
+	OSLockAcquire(psDevNode->hConnectionsLock);
+	dllist_foreach_node(&psDevNode->sConnections, pNode, pNext)
+	{
+		dev_connection_num++;
+	}
+
+	// 格式化输出
+	len += scnprintf(buf + len, PAGE_SIZE - len,
+		"[GPU] Version: %s\n"
+		"Build Info: %s %s %s %s\n"
+		"----------------------------------------MODULE PARAM-----------------------------------------\n"
+		"updatePeriod_ms\n"
+		"%d\n"
+		"----------------------------------------MODULE STATUS----------------------------------------\n"
+		"DevId     DevInstanceNum      DevLoading_%%   DevLoadingMax_%%\n"
+		"%-10d%-20d%-15d%-15d\n"
+		"----------------------------------------MEM INFO(KB)-----------------------------------------\n"
+		"KMalloc           VMalloc           PTMemoryUMA       VMapPTUMA\n"
+		"%-18d%-18d%-18d%-18d\n"
+		"PTMemoryLMA       IORemapPTLMA      GPUMemLMA         GPUMemUMA\n"
+		"%-18d%-18d%-18d%-18d\n"
+		"GPUMemUMAPool     MappedGPUMemUMA/LMA                 DmaBufImport\n"
+		"%-18d%-36d%-18d\n"
+		"----------------------------------------INSTANCE INFO----------------------------------------\n"
+		"Id   ProName             ProId     ThdId\n",
+		PVRVERSION_STRING, utsname()->sysname, utsname()->release, utsname()->version, utsname()->machine, thead_gpu_period_ms,
+		dev_id, dev_connection_num, dev_loading_percent, thead_gpu_loading_max_percent,
+		dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_KMALLOC] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMALLOC],
+		dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_UMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_VMAP_PT_UMA] >> 10,
+		dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_PT_MEMORY_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_IOREMAP_PT_LMA] >> 10,
+		dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_LMA] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA] >> 10,
+		dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_ALLOC_GPUMEM_UMA_POOL] >> 10, dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_MAPPED_GPUMEM_UMA_LMA] >> 10,
+		dev_mem_state[PVRSRV_DRIVER_STAT_TYPE_DMA_BUF_IMPORT] >> 10);
+
+	dllist_foreach_node(&psDevNode->sConnections, pNode, pNext)
+	{
+		CONNECTION_DATA *sData = IMG_CONTAINER_OF(pNode, CONNECTION_DATA, sConnectionListNode);
+		len += scnprintf(buf + len, PAGE_SIZE - len,
+			"%-5d%-20s%-10d%-10d\n",
+			instance_id, sData->pszProcName, sData->pid, sData->tid);
+		instance_id++;
+	}
+
+	len += scnprintf(buf + len, PAGE_SIZE - len,
+		"---------------------------------------EXCEPTION INFO----------------------------------------\n"
+		"Server_State      Server_Error      RGX_State         RGX_Error\n"
+		"%-18s%-18d%-18s%-18d\n",
+		server_state[psPVRSRVData->eServicesState], PVRSRV_KM_ERRORS - thead_gpu_last_server_error,
+		rgx_state[eHealthStatus], rgx_err - thead_gpu_last_rgx_error);
+
+	OSLockRelease(psDevNode->hConnectionsLock);
+	return len;
+}
+
+static ssize_t thead_gpu_log_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
+{
+	struct device *dev = kobj_to_dev(kobj);
+	struct drm_device *drm_dev = dev_get_drvdata(dev);
+	struct pvr_drm_private *priv = drm_dev->dev_private;
+	PVRSRV_DEVICE_NODE *psDevNode = priv->dev_node;
+
+	thead_gpu_loading_max_percent = -1;
+	thead_gpu_last_server_error = PVRSRV_KM_ERRORS;
+	if (psDevNode->pvDevice != NULL)
+	{
+		PVRSRV_RGXDEV_INFO *psDevInfo = psDevNode->pvDevice;
+		thead_gpu_last_rgx_error = psDevInfo->sErrorCounts.ui32WGPErrorCount + psDevInfo->sErrorCounts.ui32TRPErrorCount;
+	}
+	return count;
+}
+
+static struct kobj_attribute sthead_gpu_log_attr = __ATTR(log, 0664, thead_gpu_log_show, thead_gpu_log_store);
+
+/******************定义updatePeriod的读写属性*************************************/
+static ssize_t thead_gpu_updatePeriod_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%d\n(set 50~10000 to enable update period, set other value to disable)\n",
+					thead_gpu_period_ms);
+}
+
+static ssize_t thead_gpu_updatePeriod_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count)
+{
+	char *start = (char *)buf;
+	int temp_period_ms = simple_strtoul(start, &start, 0);
+	if (temp_period_ms >= 50 && temp_period_ms <= 10000) {
+		thead_gpu_period_ms = temp_period_ms;
+		mod_timer(&thead_gpu_sysfs_private_data.timer, jiffies + msecs_to_jiffies(thead_gpu_period_ms));
+	} else {
+		thead_gpu_period_ms = -1;
+		del_timer(&thead_gpu_sysfs_private_data.timer);
+	}
+	return count;
+}
+
+static struct kobj_attribute sthead_gpu_updateperiod_attr = __ATTR(updatePeriod_ms, 0664, thead_gpu_updatePeriod_show, thead_gpu_updatePeriod_store);
+
+/******************定义sysfs属性info group*************************************/
+static struct attribute *pthead_gpu_attrs[] = {
+	&sthead_gpu_log_attr.attr,
+	&sthead_gpu_updateperiod_attr.attr,
+	NULL,   // must be NULL
+};
+
+static struct attribute_group sthead_gpu_attr_group = {
+	.name = "info", // device下目录指定
+	.attrs = pthead_gpu_attrs,
+};
+
+static void thead_gpu_work_func(struct work_struct *w)
+{
+	struct gpu_sysfs_private_data *data = container_of(w, struct gpu_sysfs_private_data, work);
+	struct device *dev = data->dev;
+	struct drm_device *drm_dev = dev_get_drvdata(dev);
+	struct pvr_drm_private *priv = drm_dev->dev_private;
+	PVRSRV_DEVICE_NODE *psDevNode = priv->dev_node;
+	PVRSRV_DEVICE_HEALTH_STATUS eHealthStatus = OSAtomicRead(&psDevNode->eHealthStatus);
+	int current_loading_percent = -1;
+	if (psDevNode->pvDevice != NULL)
+	{
+		PVRSRV_RGXDEV_INFO *psDevInfo = psDevNode->pvDevice;
+#ifdef SUPPORT_RGX
+		if (!PVRSRV_VZ_MODE_IS(GUEST) &&
+			psDevInfo->pfnGetGpuUtilStats &&
+			eHealthStatus == PVRSRV_DEVICE_HEALTH_STATUS_OK)
+		{
+			RGXFWIF_GPU_UTIL_STATS sGpuUtilStats;
+			PVRSRV_ERROR eError = PVRSRV_OK;
+
+			eError = psDevInfo->pfnGetGpuUtilStats(psDevNode,
+													ghGpuUtilSysFS,
+													&sGpuUtilStats);
+
+			if ((eError == PVRSRV_OK) &&
+				((IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative))
+			{
+				IMG_UINT64 util;
+				IMG_UINT32 rem;
+
+				util = 100 * sGpuUtilStats.ui64GpuStatActive;
+				util = OSDivide64(util, (IMG_UINT32)sGpuUtilStats.ui64GpuStatCumulative, &rem);
+
+				current_loading_percent = (int)util;
+			}
+		}
+#endif
+	}
+	if (current_loading_percent > thead_gpu_loading_max_percent)
+		thead_gpu_loading_max_percent = current_loading_percent;
+	mod_timer(&data->timer, jiffies + msecs_to_jiffies(thead_gpu_period_ms));
+}
+
+void thead_gpu_timer_callback(struct timer_list *t)
+{
+	struct gpu_sysfs_private_data *data = container_of(t, struct gpu_sysfs_private_data, timer);
+	queue_work(data->workqueue, &data->work);
+}
+
+int thead_sysfs_init(struct device *dev)
+{
+	int ret;
+	ret = sysfs_create_group(&dev->kobj, &sthead_gpu_attr_group);
+	if (ret) {
+		dev_err(dev, "Failed to create gpu dev sysfs.\n");
+		return ret;
+	}
+
+#if defined(SUPPORT_RGX) && !defined(NO_HARDWARE)
+	if (SORgxGpuUtilStatsRegister(&ghGpuUtilSysFS) != PVRSRV_OK)
+	{
+		dev_err(dev, "Failed to register GpuUtil for sysfs.\n");
+		return -ENOMEM;
+	}
+#endif
+
+	thead_gpu_sysfs_private_data.workqueue = create_workqueue("gpu_sysfs_workqueue");
+	if (!thead_gpu_sysfs_private_data.workqueue)
+		return -ENOMEM;
+	INIT_WORK(&thead_gpu_sysfs_private_data.work, thead_gpu_work_func);
+
+	thead_gpu_sysfs_private_data.dev = dev;
+	timer_setup(&thead_gpu_sysfs_private_data.timer, thead_gpu_timer_callback, 0);
+	return ret;
+}
+
+void thead_sysfs_uninit(struct device *dev)
+{
+	if (thead_gpu_sysfs_private_data.dev == dev)
+		del_timer(&thead_gpu_sysfs_private_data.timer);
+
+	if (thead_gpu_sysfs_private_data.workqueue)
+		destroy_workqueue(thead_gpu_sysfs_private_data.workqueue);
+
+#if defined(SUPPORT_RGX) && !defined(NO_HARDWARE)
+	if (SORgxGpuUtilStatsUnregister(ghGpuUtilSysFS) != PVRSRV_OK)
+	{
+		dev_err(dev, "Failed to unregister GpuUtil for sysfs.\n");
+	}
+#endif
+
+	sysfs_remove_group(&dev->kobj, &sthead_gpu_attr_group);
+}
+
 int thead_mfg_enable(struct gpu_plat_if *mfg)
 {
    int ret;
--- a/drivers/gpu/drm/img-rogue/thead_sys.h
+++ b/drivers/gpu/drm/img-rogue/thead_sys.h
@@ -63,6 +63,9 @@ struct gpu_plat_if {
    struct regmap *vosys_regmap;
 };

+int thead_sysfs_init(struct device *dev);
+void thead_sysfs_uninit(struct device *dev);
+
 struct gpu_plat_if *dt_hw_init(struct device *dev);
 void dt_hw_uninit(struct gpu_plat_if *mfg);

--- a/drivers/gpu/drm/panel/panel-hx8279.c
+++ b/drivers/gpu/drm/panel/panel-hx8279.c
@@ -135,17 +135,17 @@ static int hx8279_panel_enable(struct drm_panel *panel)
 	if (pinfo->enabled)
 		return 0;

-	ret = mipi_dsi_dcs_exit_sleep_mode(pinfo->link);
+	ret = mipi_dsi_dcs_set_display_on(pinfo->link);
 	if (ret < 0) {
-		dev_err(panel->dev, "failed to exit sleep mode: %d\n", ret);
+		dev_err(panel->dev, "failed to set display on: %d\n", ret);
 		return ret;
 	}

 	msleep(120);

-	ret = mipi_dsi_dcs_set_display_on(pinfo->link);
+	ret = mipi_dsi_dcs_exit_sleep_mode(pinfo->link);
 	if (ret < 0) {
-		dev_err(panel->dev, "failed to set display on: %d\n", ret);
+		dev_err(panel->dev, "failed to exit sleep mode: %d\n", ret);
 		return ret;
 	}

--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
LevitatingBusinessMan (Rein Fernhout)	b9cf70c75d	use register satp instead of sptbr the register was renamed	2025-02-03 09:40:30 +08:00
清欢	f6b3a51dab	remove regulator_enable from dwc3 suspend & resume for rvbook	2024-07-21 00:17:45 +08:00
hlb194802	2a1c09c089	usb driver: dwc3-thead: fix wrong regulator disable in dwc3_thead_pm_suspend regulater mismatch in dwc3_thead_pm_suspend with hub1v2 vs hubswitch Change-Id: I33243a3cae63751f6b2c985a85d50916e85afdcd	2024-07-21 00:17:45 +08:00
huaming.jiang	745c35085c	driver:dw_i2c:detect rx fifo over and do retry 1. dw_i2c for hw not enable IC_EMPTYFIFO_HOLD_MASTER_EN,RX FIFO may over if SW not read RX FIFO day timely.So enabel RX OVER INT,when receive RX OVER ,i2c_dw_xfer return -EAGAIN,to trigger retry. 2. for large i2c read, set DW_IC_RX_TL to rx_fifo_depth / 2, to make more efficient irq process. 3.skip isr once rx over by disable INT 4. merge fix from upstream commit 301c8f5c32c8fb79c67539bc23972dc3ef48024c Author: Jarkko Nikula <jarkko.nikula@linux.intel.com> Date: Tue Sep 27 16:56:44 2022 +0300 i2c: designware: Fix handling of real but unexpected device interrupts Commit c7b79a752871 ("mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI IDs") caused a regression on certain Gigabyte motherboards for Intel Alder Lake-S where system crashes to NULL pointer dereference in i2c_dw_xfer_msg() when system resumes from S3 sleep state ("deep"). I was able to debug the issue on Gigabyte Z690 AORUS ELITE and made following notes: - Issue happens when resuming from S3 but not when resuming from "s2idle" - PCI device 00:15.0 == i2c_designware.0 is already in D0 state when system enters into pci_pm_resume_noirq() while all other i2c_designware PCI devices are in D3. Devices were runtime suspended and in D3 prior entering into suspend - Interrupt comes after pci_pm_resume_noirq() when device interrupts are re-enabled - According to register dump the interrupt really comes from the i2c_designware.0. Controller is enabled, I2C target address register points to a one detectable I2C device address 0x60 and the DW_IC_RAW_INTR_STAT register START_DET, STOP_DET, ACTIVITY and TX_EMPTY bits are set indicating completed I2C transaction. My guess is that the firmware uses this controller to communicate with an on-board I2C device during resume but does not disable the controller before giving control to an operating system. I was told the UEFI update fixes this but never the less it revealed the driver is not ready to handle TX_EMPTY (or RX_FULL) interrupt when device is supposed to be idle and state variables are not set (especially the dev->msgs pointer which may point to NULL or stale old data). Introduce a new software status flag STATUS_ACTIVE indicating when the controller is active in driver point of view. Now treat all interrupts that occur when is not set as unexpected and mask all interrupts from the controller. Change-Id: If81c92a03b9be8699742184b46c03df34f922a28	2024-07-21 00:17:45 +08:00
Han Gao	39a7c4f518	config: enable CONFIG_SCHED_MC Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-07-21 00:17:45 +08:00
o_bianhq	99a0ff503d	enable CONFIG_SCHED_MC Change-Id: I46b9d8ba6e327106f130f8ea40fa1af1a55b9ca5	2024-07-21 00:17:45 +08:00
Song Shuai	483521ff86	riscv: Kconfig: enable SCHED_MC kconfig RISC-V now builds the sched domain based on the simple possible map. Enable SCHED_MC to make the building based on cpu_coregroup_mask() which also takes care of the NUMA and cores with LLC. Signed-off-by: Song Shuai <suagrfillet@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230310110336.970985-1-suagrfillet@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Raul Xiong <huanyi.xj@alibaba-inc.com> Change-Id: I9729fcd884478e369957d9b96421598cdafe3a51 (cherry picked from commit dc55601c64f5635c75cb3cdf9cd40cb43593e966)	2024-07-21 00:17:45 +08:00
yjd01941629	9ffddd4172	For AIC8800 (WIFI/BT chip): The AIC8800 driver must be unloaded before entering STR (Suspend to RAM); otherwise, upon waking from STR, initialization will fail. 1.broken-cd: The default non-removable attribute fails to recognize the AIC8800, thus it is set to rely on a software card detection signal instead of hardware, always treating the card slot as if a card is present. 2.keep-power-in-suspend: The SDIO of TH1520 does not support keeping power when entering STR, and the driver of AIC8800 does not support SDIO with this function. Therefore, this node is added here to meet the driver requirements of AIC8800. 3.support_power_ctrl:The newly added device node is used to control the WL-REG-ON signal (which controls the power of AIC8800) after waking up from STR. Change-Id: Ia33309da9f3e6bdf291f408d26909f11afd24842	2024-07-21 00:17:45 +08:00
Han Gao	a8a3aef9b9	Revert "temp fix: disable poweron pin for aic8800 to make it work" This reverts commit `6f712a1d7f`.	2024-07-21 00:17:45 +08:00
hlb194802	3bff12eab2	virtio_vdmabuf: dma skip cpu sync if buf flag has VIRTIO_VDAMBUF_NONCACHED optimize cpu usage for nonecached dma buf used in g2d gpu vpu etc. Change-Id: I191ebe6ad748dc9cb8f1946d1e51f6d606bde182 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-07-21 00:17:45 +08:00
Han Gao	8e7282e217	vidmem:kernel: fixup unsafe release of allocater and dmabuf This commit fixup unsafe release of allocater and dmabuf. have merged vidmem:kernel: update dmabuf release not free by allocate release. Prev commit add release of dmabuf may caused mem node list removed racing.Here have moved the exported node to global list. Signed-off-by: xianbing Zhu <xianbing.zhu@linux.alibaba.com> Change-Id: I8c2a83b60f7d6ff26771550cc691db6b27b73609 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-07-21 00:17:45 +08:00
Han Gao	d2247b2403	vidmem: implement dma_buf_ops release to free buffers This commit implement dma_buf_ops release to free buffer in function _dmabuf_release(struct dma_buf *dmabuf). Default use pr_debug for dynamic debug in macro DEBUG_PRINT. Signed-off-by: xianbing Zhu <xianbing.zhu@linux.alibaba.com> Change-Id: Id0a5841ccf8459c469034866dd2878e8698a57a4 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-07-21 00:17:45 +08:00
Han Gao	3ef68d010b	sync: SDK 1.5.4 video_memory Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-07-21 00:17:45 +08:00
Han Gao	930b7d92fd	vc8000e-kernel: fixup vcmdbuf release leak issue This issue is reported in TLV-299. This commit fixed allocate_cmdbuf may infinite loop and leak of release the cmdbuf only reserved but not link_and_run. If cmdbuf not run done when release,do not firstly abort, instead wait done event reduce abort failed. Add cmdbuf id and line info for error log. Fixed busy count record idle twice in read module all regs issue. Signed-off-by: xianbing Zhu <xianbing.zhu@linux.alibaba.com> Change-Id: Ia006f8123e38022400959bed838ef76f7aef14a0 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-07-21 00:17:45 +08:00
Han Gao	9ee78c8b51	vc8000d-kernel: fixup vcmdbuf release leak issue This issue is reported in TLV-299. This commit fixed allocate_cmdbuf may infinite loop and leak of release the cmdbuf only reserved but not link_and_run. If cmdbuf not run done when release,do not firstly abort, instead wait done event reduce abort failed. Add cmdbuf id and line info for error log. Fixed busy count record idle twice in read module all regs issue. Signed-off-by: xianbing Zhu <xianbing.zhu@linux.alibaba.com> Change-Id: Ieb0b751d18a1ed65fe198e3d75a6953dabf15ef8 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-07-21 00:17:45 +08:00
Haaland Chen	719387f851	arch: riscv: thead: milkv-meles: increase HDMI pin drive strength Fixed the issue where HDMI maximum resolution is 1024x768. With this commit added, the maximum HDMI resolution is 4K. Signed-off-by: Haaland Chen <haaland@milkv.io>	2024-07-06 19:24:41 +08:00
Carlos Giraldo	93090f65c3	config: enable required flags for k3s check-config.sh script of k3s kubernetes light distribution flags the following configs as missing: CONFIG_NETFILTER_XT_MATCH_COMMENT CONFIG_NETFILTER_XT_MATCH_MULTIPORT CONFIG_IP_SET CONFIG_INET_XFRM_MODE_TRANSPORT	2024-07-06 19:16:38 +08:00
Haaland Chen	32bd505b1d	riscv: dts: thead: add DDR-16GB meles Signed-off-by: Haaland Chen <haaland@milkv.io>	2024-07-06 19:16:10 +08:00
0x754C	e3d0728cb3	Update th1520-lpi4a-plastic.dts update screen timing	2024-07-06 19:15:14 +08:00
Lu	9cc3fa38f8	lpi4a: add pocket4a & plastic4a initial support	2024-07-06 19:15:14 +08:00
Haaland Chen	2dec144313	riscv: dts: thead: update milkv meles for sdk v1.5.4 Signed-off-by: Haaland Chen <haaland@milkv.io>	2024-06-01 00:25:15 +08:00
Han Gao	72467de009	dts: meles: sync sdk 1.5.4 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	76b3ac7dce	trace_point: fix: move header file to events Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	0bc9468e57	img: gpu: sync sdk 1.5.4 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	15d74b941d	vdec: 8000d: sync sdk 1.5.4 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	a7fac880e0	venc: 8000e: sync sdk 1.5.4 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	7053584b25	ddr-pmu: sync sdk 1.5.4 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	b77432028f	fix: remove trace include path for nna Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	e0da9d9718	nna: sync SDK 1.5.4 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	f06f585cf1	fix: remove th1520-b-dsi Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
Han Gao	a1bca3a513	sync: sync 7210&8156 code Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-05-30 01:07:11 +08:00
thead_admin	7563179071	Linux_SDK_V1.5.4 Signed-off-by: thead_admin <occ_thead@service.alibaba.com>	2024-05-30 01:07:11 +08:00
Icenowy Zheng	89d6663712	add orientation of lichee console 4a panel Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2024-04-13 07:42:21 -05:00
Han Gao	7f7fc491ac	feat: trans EXPORT_SYMBOL_NS{_GPL}(, ANDROID_GKI_VFS_EXPORT_ONLY) to EXPORT_SYMBOL{_GPL}() Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-04-03 12:27:32 -05:00
Han Gao	9e89f40c76	feat: remove ANDROID_GKI_VFS_EXPORT_ONLY for all Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-04-03 12:27:32 -05:00
Han Gao	58b9ba8b4d	feat: remove VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver for all Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2024-04-03 12:27:32 -05:00