mirror of
https://github.com/revyos/th1520-vendor-uboot.git
synced 2026-06-21 09:02:25 +02:00
Haaland Chen
committed by
Han Gao/Revy/Rabenda
Han Gao/Revy/Rabenda
parent
918a8c89e0
commit
985e884b0b
@@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_ICE_C910) += ice-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb
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dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb light-milkv-meles.dtb
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targets += $(dtb-y)
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284
arch/riscv/dts/light-milkv-meles.dts
Normal file
284
arch/riscv/dts/light-milkv-meles.dts
Normal file
@@ -0,0 +1,284 @@
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/dts-v1/;
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/ {
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model = "Milk-V Meles";
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compatible = "milkv,meles", "thead,c910_light";
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#address-cells = <2>;
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#size-cells = <2>;
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xc0000000 0x0 0x40000000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <3000000>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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device_type = "cpu";
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reg = <0>;
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status = "okay";
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compatible = "riscv";
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riscv,isa = "rv64imafdcvsu";
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mmu-type = "riscv,sv39";
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u-boot,dm-pre-reloc;
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};
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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u-boot,dm-pre-reloc;
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intc: interrupt-controller@ffd8000000 {
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compatible = "riscv,plic0";
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reg = <0xff 0xd8000000 0x0 0x04000000>;
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status = "disabled";
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};
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dummy_apb: apb-clock {
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compatible = "fixed-clock";
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clock-frequency = <62500000>;
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clock-output-names = "dummy_apb";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_ahb: ahb-clock {
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compatible = "fixed-clock";
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clock-frequency = <250000000>;
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clock-output-names = "core";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_spi: spi-clock {
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compatible = "fixed-clock";
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clock-frequency = <396000000>;
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clock-output-names = "dummy_spi";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_qspi0: qspi0-clock {
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compatible = "fixed-clock";
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clock-frequency = <792000000>;
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clock-output-names = "dummy_qspi0";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_uart_sclk: uart-sclk-clock {
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "dummy_uart_sclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_i2c_icclk: i2c-icclk-clock {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "dummy_i2c_icclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dpu_pixclk: dpu-pix-clock {
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compatible = "fixed-clock";
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clock-frequency = <74250000>;
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clock-output-names = "dummy_dpu_pixclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dphy_refclk: dphy-ref-clock {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "dummy_dpu_refclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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serial@ffe7014000 {
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compatible = "snps,dw-apb-uart";
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reg = <0xff 0xe7014000 0x0 0x400>;
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clocks = <&dummy_uart_sclk>;
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clock-frequency = <100000000>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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u-boot,dm-pre-reloc;
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};
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gmac0: ethernet@ffe7070000 {
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compatible = "snps,dwmac";
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reg = <0xff 0xe7070000 0x0 0x2000>;
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clocks = <&dummy_apb>;
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clock-names = "stmmaceth";
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snps,pbl = <32>;
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snps,fixed-burst;
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phy-mode = "rgmii-id";
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phy-handle = <&phy_88E1111_a>;
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status = "okay";
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy_88E1111_a: ethernet-phy@1 {
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reg = <0x1>;
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};
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};
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};
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emmc: sdhci@ffe7080000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7080000 0x0 0x10000>;
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index = <0x0>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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clock-names = "core";
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max-frequency = <198000000>;
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sdhci-caps-mask = <0x0 0x1000000>;
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mmc-hs400-1_8v;
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non-removable;
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no-sdio;
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no-sd;
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bus-width = <8>;
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voltage= "1.8v";
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pull_up;
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io_fixed_1v8;
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fifo-mode;
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u-boot,dm-pre-reloc;
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};
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sdhci0: sd@ffe7090000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7090000 0x0 0x10000>;
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index = <0x1>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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max-frequency = <198000000>;
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sd-uhs-sdr104;
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pull_up;
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clock-names = "core";
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bus-width = <4>;
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voltage= "3.3v";
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};
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gpio2: gpio@ffe7f34000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0xff 0xe7f34000 0x0 0x1000>;
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clocks = <&dummy_apb>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio2_porta: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
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reg = <0>;
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};
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};
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gpio0: gpio@ffec005000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0xff 0xec005000 0x0 0x1000>;
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clocks = <&dummy_apb>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio0_porta: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
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reg = <0>;
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};
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};
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gpio1: gpio@ffec006000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0xff 0xec006000 0x0 0x1000>;
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clocks = <&dummy_apb>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio1_porta: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <32>;
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reg = <0>;
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};
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};
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axiscr {
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compatible = "thead,axiscr";
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reg = <0xff 0xff004000 0x0 0x1000>;
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lock-read = "okay";
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lock-write = "okay";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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axiscr0: axisrc@0 {
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device_type = "axiscr";
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region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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axiscr1: axisrc@1 {
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device_type = "axiscr";
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region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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axiscr2: axisrc@2 {
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device_type = "axiscr";
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region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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};
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axiparity {
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compatible = "thead,axiparity";
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reg = <0xff 0xff00c000 0x0 0x1000>;
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lock = "okay";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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axiparity0: axiparity@0 {
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device_type = "axiparity";
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region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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axiparity1: axiparity@1 {
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device_type = "axiparity";
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region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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};
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};
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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stdout-path = "/soc/serial@ffe7014000:115200";
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};
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};
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@@ -126,6 +126,10 @@ config TARGET_LIGHT_FM_C910_B_POWER
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bool "light fullmask for light-b-power board "
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default n
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config TARGET_LIGHT_FM_C910_MILKV_MELES
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bool "light fullmask for Milk-V Meles board "
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default n
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config SYS_TEXT_BASE
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default 0xc0000000 if RISCV_MMODE
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default 0x00200000 if RISCV_SMODE
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@@ -1146,7 +1146,7 @@ void ap_mipi_dsi1_clk_endisable(bool en)
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writel(cfg1, (void __iomem *)AP_DPU1_PLL_CFG1);
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}
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#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
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#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
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static void ap_multimedia_div_num_set(enum multimedia_div_type type, unsigned int div_num)
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{
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unsigned long div_reg;
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@@ -1304,7 +1304,7 @@ int clk_config(void)
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/* The boards other than the LightA board perform the bus down-speed operation */
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#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
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#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
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ap_multimedia_div_num_set(VI_MIPI_CSI0_DIV, 12); /* Input frquency: 2376MHZ */
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ap_multimedia_div_num_set(VI_ISP0_CORE_DIV, 15); /* Input frquency: 2376MHZ */
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ap_multimedia_div_num_set(VI_ISP1_CORE_DIV, 12); /* Input frquency: 2376MHZ */
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@@ -2048,6 +2048,205 @@ static void light_iopin_init(void)
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}
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#elif defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
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static void light_iopin_init(void)
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{
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/* aon-padmux config */
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light_pin_cfg(I2C_AON_SCL,PIN_SPEED_NORMAL,PIN_PN,8);
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light_pin_cfg(I2C_AON_SDA,PIN_SPEED_NORMAL,PIN_PN,8);
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light_pin_cfg(AOGPIO_7,PIN_SPEED_NORMAL,PIN_PN,2); ///NC
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light_pin_cfg(AOGPIO_8,PIN_SPEED_NORMAL,PIN_PN,2); ///NC
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light_pin_cfg(AOGPIO_9,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_cfg(AOGPIO_10,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_cfg(AOGPIO_11,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_cfg(AOGPIO_14,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_cfg(AOGPIO_15,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_mux(AOGPIO_7,3);
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light_pin_mux(AOGPIO_8,3);
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light_pin_mux(AOGPIO_9,3);
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light_pin_mux(AOGPIO_10,3);
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light_pin_mux(AOGPIO_11,0);
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light_pin_mux(AOGPIO_12,1);
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light_pin_mux(AOGPIO_13,1);
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light_pin_mux(AOGPIO_14,0);
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light_pin_mux(AOGPIO_15,0);
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light_pin_mux(AUDIO_PA9,3); ///AUDIO-PA-RESET
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light_pin_cfg(AUDIO_PA9,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_mux(AUDIO_PA10,3); /// AUD-3V3-EN
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light_pin_cfg(AUDIO_PA10,PIN_SPEED_NORMAL,PIN_PU,2);
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light_pin_mux(AUDIO_PA12,3); /// AUD-1V8-EN
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light_pin_cfg(AUDIO_PA12,PIN_SPEED_NORMAL,PIN_PU,2);
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light_pin_mux(AUDIO_PA13,0);
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/*ap-padmux on left/top */
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light_pin_mux(QSPI1_CSN0,3);
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light_pin_mux(QSPI1_D2_WP,1);
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light_pin_cfg(QSPI1_CSN0,PIN_SPEED_NORMAL,PIN_PN,8); ///se-spi
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light_pin_cfg(QSPI1_SCLK,PIN_SPEED_NORMAL,PIN_PN,8); ///se-spi
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light_pin_cfg(QSPI1_D0_MOSI,PIN_SPEED_NORMAL,PIN_PU,8); ///se-spi
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light_pin_cfg(QSPI1_D1_MISO,PIN_SPEED_NORMAL,PIN_PU,8); ///se-spi
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light_pin_cfg(QSPI1_D2_WP,PIN_SPEED_NORMAL,PIN_PN,0xF); ///PWM5
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light_pin_cfg(QSPI1_D3_HOLD,PIN_SPEED_NORMAL,PIN_PN,8); ///NC
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light_pin_mux(I2C0_SCL,3);
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light_pin_mux(I2C0_SDA,3);
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light_pin_cfg(I2C0_SCL,PIN_SPEED_NORMAL,PIN_PU,4);
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light_pin_cfg(I2C0_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
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light_pin_cfg(I2C1_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
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light_pin_cfg(I2C1_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
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light_pin_mux(UART3_TXD,1);
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light_pin_mux(UART3_RXD,1);
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light_pin_cfg(UART3_TXD,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_cfg(UART3_RXD,PIN_SPEED_NORMAL,PIN_PN,2);
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light_pin_mux(GPIO0_18,1);
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light_pin_mux(GPIO0_19,1);
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light_pin_cfg(GPIO0_18,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
light_pin_cfg(GPIO0_19,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
|
||||
light_pin_mux(GPIO0_20,0);
|
||||
light_pin_mux(GPIO0_21,0);
|
||||
light_pin_mux(GPIO0_22,1);
|
||||
light_pin_mux(GPIO0_23,1);
|
||||
light_pin_mux(GPIO0_24,1);
|
||||
light_pin_mux(GPIO0_25,1);
|
||||
light_pin_mux(GPIO0_26,1);
|
||||
light_pin_mux(GPIO0_27,0);
|
||||
light_pin_mux(GPIO0_28,0);
|
||||
light_pin_mux(GPIO0_29,0);
|
||||
light_pin_mux(GPIO0_30,0);
|
||||
light_pin_cfg(GPIO0_20,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO0_21,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO0_27,PIN_SPEED_NORMAL,PIN_PN,2); ///< NC(not used)
|
||||
light_pin_cfg(GPIO0_28,PIN_SPEED_NORMAL,PIN_PN,2); ///< AVDD25_IR_EN
|
||||
light_pin_cfg(GPIO0_29,PIN_SPEED_NORMAL,PIN_PN,2); ///< DVDD12_IR_EN
|
||||
light_pin_cfg(GPIO0_30,PIN_SPEED_NORMAL,PIN_PU,2); ///< gmac,uart,led
|
||||
|
||||
light_pin_mux(GPIO1_0,1);
|
||||
light_pin_mux(GPIO1_1,1);
|
||||
light_pin_mux(GPIO1_2,1);
|
||||
light_pin_mux(GPIO1_3,1);
|
||||
light_pin_mux(GPIO1_4,1);
|
||||
light_pin_mux(GPIO1_9,0);
|
||||
light_pin_mux(GPIO1_10,0);
|
||||
light_pin_mux(GPIO1_11,0);
|
||||
light_pin_mux(GPIO1_12,0);
|
||||
light_pin_mux(GPIO1_13,0);
|
||||
light_pin_mux(GPIO1_14,0);
|
||||
light_pin_mux(GPIO1_15,0);
|
||||
light_pin_mux(GPIO1_16,0);
|
||||
light_pin_mux(GPIO1_21,3);
|
||||
light_pin_mux(GPIO1_22,3);
|
||||
light_pin_mux(GPIO1_23,3);
|
||||
light_pin_mux(GPIO1_24,3);
|
||||
light_pin_mux(GPIO1_25,3);
|
||||
light_pin_cfg(GPIO1_0,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_1,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_2,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_3,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_4,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_9,PIN_SPEED_NORMAL,PIN_PN,2); ///<VDD18_LCD0_EN
|
||||
light_pin_cfg(GPIO1_10,PIN_SPEED_NORMAL,PIN_PN,2); ///<LCD0_BIAS_EN
|
||||
light_pin_cfg(GPIO1_11,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_12,PIN_SPEED_NORMAL,PIN_PN,2); ///<TOUCH-PANNEL VDD28_TP0_EN
|
||||
light_pin_cfg(GPIO1_13,PIN_SPEED_NORMAL,PIN_PN,2); ///<DOVDD18_RGB_EN
|
||||
light_pin_cfg(GPIO1_14,PIN_SPEED_NORMAL,PIN_PN,2); ///<DVDD12_RGB_EN
|
||||
light_pin_cfg(GPIO1_15,PIN_SPEED_NORMAL,PIN_PN,2); ///<AVDD28_RGB_EN
|
||||
light_pin_cfg(GPIO1_16,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_21,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_22,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_23,PIN_SPEED_NORMAL,PIN_PN,2); ///<LED_PDN
|
||||
light_pin_cfg(GPIO1_24,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_25,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_26,PIN_SPEED_NORMAL,PIN_PN,2); ///<DBB2LEDDRIVER_EN
|
||||
|
||||
light_pin_mux(CLK_OUT_0,1);
|
||||
light_pin_mux(CLK_OUT_1,1);
|
||||
light_pin_mux(CLK_OUT_3,1);
|
||||
light_pin_mux(CLK_OUT_2,3);
|
||||
light_pin_cfg(CLK_OUT_2,PIN_SPEED_NORMAL,PIN_PU,2); ///volume key "-"
|
||||
|
||||
/*ap-pdmux on righ/top*/
|
||||
light_pin_mux(QSPI0_SCLK,3); ///NC
|
||||
light_pin_mux(QSPI0_CSN0,3); ///NC
|
||||
light_pin_mux(QSPI0_CSN1,3); ///NC
|
||||
light_pin_mux(QSPI0_D0_MOSI,3); ///NC
|
||||
light_pin_mux(QSPI0_D1_MISO,3); ///NC
|
||||
light_pin_mux(QSPI0_D2_WP,3); ///NC
|
||||
light_pin_mux(QSPI0_D3_HOLD,3); ///NC
|
||||
|
||||
light_pin_cfg(I2C2_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
light_pin_cfg(I2C2_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
light_pin_cfg(I2C3_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
light_pin_cfg(I2C3_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
|
||||
light_pin_mux(SPI_CSN,3); /// W_DISABLE_CATE1
|
||||
light_pin_mux(SPI_MOSI,3); /// NC
|
||||
light_pin_mux(SPI_MISO,3); /// RERST1_N_CAT1
|
||||
light_pin_mux(SPI_SCLK,3);
|
||||
light_pin_cfg(SPI_SCLK,PIN_SPEED_NORMAL,PIN_PN,2); /// NC
|
||||
|
||||
light_pin_mux(GPIO2_18,0);
|
||||
light_pin_mux(GPIO2_19,0);
|
||||
light_pin_mux(GPIO2_20,0);
|
||||
light_pin_mux(GPIO2_21,0);
|
||||
light_pin_mux(GPIO2_22,0);
|
||||
light_pin_mux(GPIO2_23,0);
|
||||
light_pin_mux(GPIO2_24,0);
|
||||
light_pin_mux(GPIO2_25,0);
|
||||
|
||||
light_pin_cfg(GPIO2_18,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO2_19,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO2_20,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO2_21,PIN_SPEED_NORMAL,PIN_PN,2); ///<NC
|
||||
light_pin_cfg(GPIO2_22,PIN_SPEED_NORMAL,PIN_PN,2); ///<WIFI_BT_GPIO2
|
||||
light_pin_cfg(GPIO2_23,PIN_SPEED_NORMAL,PIN_PN,2); ///<WIFI_BT_GPIO3
|
||||
light_pin_cfg(GPIO2_24,PIN_SPEED_NORMAL,PIN_PN,2); ///<WIFI_BT_RST_N
|
||||
light_pin_cfg(GPIO2_25,PIN_SPEED_NORMAL,PIN_PU,2); ///KEY1
|
||||
|
||||
light_pin_mux(SDIO0_WPRTN,3);
|
||||
light_pin_cfg(SDIO0_WPRTN,PIN_SPEED_NORMAL,PIN_PN,2); ///< NC
|
||||
light_pin_mux(SDIO1_WPRTN,3);
|
||||
light_pin_cfg(SDIO1_WPRTN,PIN_SPEED_NORMAL,PIN_PU,2); ///VBUS_EN
|
||||
light_pin_mux(SDIO1_DETN,3);
|
||||
light_pin_cfg(SDIO1_DETN,PIN_SPEED_NORMAL,PIN_PN,2); ///WCN_33_EN
|
||||
|
||||
light_pin_mux(GPIO2_30,0);
|
||||
light_pin_mux(GPIO2_31,0);
|
||||
light_pin_mux(GPIO3_0,0);
|
||||
light_pin_mux(GPIO3_1,0);
|
||||
light_pin_mux(GPIO3_2,1);
|
||||
light_pin_mux(GPIO3_3,0);
|
||||
light_pin_cfg(GPIO2_30, PIN_SPEED_NORMAL, PIN_PN, 0x2); ///NC
|
||||
light_pin_cfg(GPIO2_31, PIN_SPEED_NORMAL, PIN_PN, 0x2); ///NC
|
||||
light_pin_cfg(GPIO3_0, PIN_SPEED_NORMAL, PIN_PN, 0x2); ///NC
|
||||
light_pin_cfg(GPIO3_1, PIN_SPEED_NORMAL, PIN_PN, 0x2);
|
||||
light_pin_cfg(GPIO3_2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GPIO3_3, PIN_SPEED_NORMAL, PIN_PN, 0x2);
|
||||
|
||||
light_pin_mux(GMAC0_COL,3);
|
||||
light_pin_mux(GMAC0_CRS,3);
|
||||
light_pin_cfg(GMAC0_COL,PIN_SPEED_NORMAL,PIN_PU,2);
|
||||
light_pin_cfg(GMAC0_CRS,PIN_SPEED_NORMAL,PIN_PU,2);
|
||||
|
||||
/* GMAC0 pad drive strength configurate to 0xF */
|
||||
light_pin_cfg(GMAC0_TX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXEN, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXDV, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
}
|
||||
|
||||
#else
|
||||
static void light_iopin_init(void)
|
||||
{
|
||||
|
||||
@@ -136,7 +136,7 @@ static const struct regulator_t g_apcpu_regu_id_list[] = {
|
||||
REGU_ID_DEF(IIC_IDX_AONIIC,APCPU_REGU_VDDM,0x31,0x39,0,1,800000,600000,3500000,12500,1),
|
||||
},
|
||||
};
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
|
||||
/**
|
||||
* board for ant-ref
|
||||
*
|
||||
@@ -955,7 +955,7 @@ int pmic_reset_apcpu_voltage(void)
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
|
||||
int pmic_reset_apcpu_voltage(void)
|
||||
{
|
||||
int ret = -1;
|
||||
|
||||
89
configs/light_milkv_meles_defconfig
Normal file
89
configs/light_milkv_meles_defconfig
Normal file
@@ -0,0 +1,89 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0xe0000
|
||||
CONFIG_NR_DRAM_BANKS=8
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_TARGET_LIGHT_C910=y
|
||||
CONFIG_PMIC_VOL_INIT=y
|
||||
CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
|
||||
CONFIG_DDR_LP4X_3733_SINGLERANK=y
|
||||
CONFIG_DDR_BOARD_CONFIG=y
|
||||
CONFIG_ARCH_RV64I=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
|
||||
CONFIG_DEFAULT_FDT_FILE="thead/light-milkv-meles.dtb"
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_DISPLAY_CPUINFO=y
|
||||
CONFIG_DISPLAY_BOARDINFO=y
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_RAM_SUPPORT=y
|
||||
CONFIG_SPL_RAM_DEVICE=y
|
||||
CONFIG_SYS_PROMPT="Milk-V Meles# "
|
||||
CONFIG_CMD_BOOT_SLAVE=y
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_DDR_SCAN=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
# CONFIG_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_PARTITION_TYPE_GUID=y
|
||||
CONFIG_OF_EMBED=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_UDP_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DWAPB_GPIO=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_DW=y
|
||||
# CONFIG_MMC_SPI is not set
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_MMC_HS400_SUPPORT=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_SNPS=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_SNPS=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
|
||||
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
|
||||
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
|
||||
CONFIG_ETH_DESIGNWARE=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DESIGNWARE_SPI=y
|
||||
CONFIG_DESIGNWARE_QSPI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
|
||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
# CONFIG_SPL_USE_TINY_PRINTF is not set
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
Reference in New Issue
Block a user