mirror of
https://github.com/revyos/th1520-vendor-uboot.git
synced 2026-06-21 09:02:25 +02:00
Han Gao
@@ -7,6 +7,7 @@ dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb light-milkv-meles.dtb
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dtb-$(CONFIG_TARGET_LIGHT_C910) += light-lpi4a-laptop.dtb
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dtb-$(CONFIG_TARGET_LIGHT_C910) += light-huiwei.dtb
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targets += $(dtb-y)
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868
arch/riscv/dts/light-huiwei.dts
Normal file
868
arch/riscv/dts/light-huiwei.dts
Normal file
@@ -0,0 +1,868 @@
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/dts-v1/;
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#include <dt-bindings/pmic/light_pmic.h>
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/ {
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model = "T-HEAD c910 light";
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compatible = "thead,c910_light";
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#address-cells = <2>;
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#size-cells = <2>;
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xc0000000 0x0 0x40000000>;
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};
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aliases {
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spi0 = &spi0;
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spi1 = &qspi0;
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spi2 = &qspi1;
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};
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||||
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||||
cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <3000000>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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device_type = "cpu";
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reg = <0>;
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status = "okay";
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compatible = "riscv";
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riscv,isa = "rv64imafdcvsu";
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mmu-type = "riscv,sv39";
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u-boot,dm-pre-reloc;
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};
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};
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||||
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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u-boot,dm-pre-reloc;
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intc: interrupt-controller@ffd8000000 {
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compatible = "riscv,plic0";
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reg = <0xff 0xd8000000 0x0 0x04000000>;
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status = "disabled";
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};
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dummy_apb: apb-clock {
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compatible = "fixed-clock";
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clock-frequency = <62500000>;
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clock-output-names = "dummy_apb";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_ahb: ahb-clock {
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compatible = "fixed-clock";
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clock-frequency = <250000000>;
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clock-output-names = "core";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_spi: spi-clock {
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compatible = "fixed-clock";
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clock-frequency = <396000000>;
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clock-output-names = "dummy_spi";
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||||
#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_qspi0: qspi0-clock {
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compatible = "fixed-clock";
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clock-frequency = <792000000>;
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clock-output-names = "dummy_qspi0";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_uart_sclk: uart-sclk-clock {
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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||||
clock-output-names = "dummy_uart_sclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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||||
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||||
dummy_i2c_icclk: i2c-icclk-clock {
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||||
compatible = "fixed-clock";
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||||
clock-frequency = <50000000>;
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clock-output-names = "dummy_i2c_icclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dpu_pixclk: dpu-pix-clock {
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||||
compatible = "fixed-clock";
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clock-frequency = <74250000>;
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clock-output-names = "dummy_dpu_pixclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dphy_refclk: dphy-ref-clock {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "dummy_dpu_refclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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||||
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i2c0: i2c@ffe7f20000 {
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compatible = "snps,designware-i2c";
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||||
reg = <0xff 0xe7f20000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c1: i2c@ffe7f24000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f24000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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||||
};
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||||
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i2c2: i2c@ffec00c000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xec00c000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c3: i2c@ffec014000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xec014000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6408ahk_d: gpio@20 {
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compatible = "nxp,pca9557";
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reg = <0x18>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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i2c4: i2c@ffe7f28000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f28000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c5: i2c@fff7f2c000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xf7f2c000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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||||
clock-frequency = <100000>;
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||||
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#address-cells = <1>;
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#size-cells = <0>;
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||||
};
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serial@ffe7014000 {
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||||
compatible = "snps,dw-apb-uart";
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reg = <0xff 0xe7014000 0x0 0x400>;
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||||
clocks = <&dummy_uart_sclk>;
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clock-frequency = <100000000>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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u-boot,dm-pre-reloc;
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};
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gmac0: ethernet@ffe7070000 {
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compatible = "snps,dwmac";
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reg = <0xff 0xe7070000 0x0 0x2000>;
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clocks = <&dummy_apb>;
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clock-names = "stmmaceth";
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snps,pbl = <32>;
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snps,fixed-burst;
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phy-mode = "rgmii-id";
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phy-handle = <&phy_88E1111_a>;
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status = "okay";
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy_88E1111_a: ethernet-phy@1 {
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reg = <0x1>;
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};
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phy_88E1111_b: ethernet-phy@2 {
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reg = <0x2>;
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};
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};
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};
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gmac1: ethernet@ffe7060000 {
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compatible = "snps,dwmac";
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reg = <0xff 0xe7060000 0x0 0x2000>;
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clocks = <&dummy_apb>;
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clock-names = "stmmaceth";
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snps,pbl = <32>;
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snps,fixed-burst;
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phy-mode = "rgmii-id";
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phy-handle = <&phy_88E1111_b>;
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status = "okay";
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};
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emmc: sdhci@ffe7080000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7080000 0x0 0x10000>;
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index = <0x0>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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clock-names = "core";
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max-frequency = <198000000>;
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sdhci-caps-mask = <0x0 0x1000000>;
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mmc-hs400-1_8v;
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non-removable;
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no-sdio;
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no-sd;
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bus-width = <8>;
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voltage= "1.8v";
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pull_up;
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io_fixed_1v8;
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fifo-mode;
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u-boot,dm-pre-reloc;
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};
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sdhci0: sd@ffe7090000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7090000 0x0 0x10000>;
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index = <0x1>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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max-frequency = <198000000>;
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sd-uhs-sdr104;
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pull_up;
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clock-names = "core";
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bus-width = <4>;
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voltage= "3.3v";
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};
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qspi0: spi@ffea000000 {
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compatible = "snps,dw-apb-ssi-quad";
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reg = <0xff 0xea000000 0x0 0x1000>;
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clocks = <&dummy_qspi0>;
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num-cs = <1>;
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cs-gpio = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
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spi-max-frequency = <100000000>;
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||||
#address-cells = <1>;
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||||
#size-cells =<0>;
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spi-flash@0 {
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||||
#address-cells = <1>;
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||||
#size-cells = <1>;
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compatible = "spi-nand";
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||||
spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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reg = <0>;
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};
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};
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qspi1: spi@fff8000000 {
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compatible = "snps,dw-apb-ssi-quad";
|
||||
reg = <0xff 0xf8000000 0x0 0x1000>;
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||||
clocks = <&dummy_spi>;
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num-cs = <1>;
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||||
cs-gpio = <&gpio0_porta 1 0>; // GPIO_ACTIVE_HIGH: 0
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||||
spi-max-frequency = <66000000>;
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||||
#address-cells = <1>;
|
||||
#size-cells =<0>;
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@ffe700c000 {
|
||||
compatible = "snps,dw-apb-ssi";
|
||||
reg = <0xff 0xe700c000 0x0 0x1000>;
|
||||
clocks = <&dummy_spi>;
|
||||
cs-gpio = <&gpio2_porta 15 0>;
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||||
spi-max-frequency = <100000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio2: gpio@ffe7f34000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xff 0xe7f34000 0x0 0x1000>;
|
||||
clocks = <&dummy_apb>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio2_porta: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@ffec005000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xff 0xec005000 0x0 0x1000>;
|
||||
clocks = <&dummy_apb>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio0_porta: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio1: gpio@ffec006000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xff 0xec006000 0x0 0x1000>;
|
||||
clocks = <&dummy_apb>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio1_porta: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm: pwm@ffec01c000 {
|
||||
compatible = "thead,pwm-light";
|
||||
reg = <0xff 0xec01c000 0x0 0x4000>;
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
dsi_regs: dsi-controller@ffef500000 {
|
||||
compatible = "thead,light-dsi-regs", "syscon";
|
||||
reg = <0xff 0xef500000 0x0 0x10000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
vosys_regs: vosys@ffef528000 {
|
||||
compatible = "thead,light-vo-subsys", "syscon";
|
||||
reg = <0xff 0xef528000 0x0 0x1000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dpu: dc8200@ffef600000 {
|
||||
compatible = "verisilicon,dc8200";
|
||||
reg = <0xff 0xef600000 0x0 0x100>;
|
||||
};
|
||||
|
||||
usb: usb@ffe7040000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0xff 0xe7040000 0x0 0x10000>;
|
||||
interrupts = <68>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "host";
|
||||
dma-mask = <0xf 0xffffffff>;
|
||||
snps,usb3_lpm_capable;
|
||||
snps,usb_sofitpsync;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
axiscr {
|
||||
compatible = "thead,axiscr";
|
||||
reg = <0xff 0xff004000 0x0 0x1000>;
|
||||
lock-read = "okay";
|
||||
lock-write = "okay";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
axiscr0: axisrc@0 {
|
||||
device_type = "axiscr";
|
||||
region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
axiscr1: axisrc@1 {
|
||||
device_type = "axiscr";
|
||||
region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
axiscr2: axisrc@2 {
|
||||
device_type = "axiscr";
|
||||
region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
axiparity {
|
||||
compatible = "thead,axiparity";
|
||||
reg = <0xff 0xff00c000 0x0 0x1000>;
|
||||
lock = "okay";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
axiparity0: axiparity@0 {
|
||||
device_type = "axiparity";
|
||||
region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
axiparity1: axiparity@1 {
|
||||
device_type = "axiparity";
|
||||
region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
dsi_bridge: dsi-bridge {
|
||||
compatible = "thead,light-dsi-bridge";
|
||||
clocks = <&dummy_dpu_pixclk>;
|
||||
clock-names = "pix-clk";
|
||||
phys = <&dsi_dphy>;
|
||||
phy-names = "dphy";
|
||||
};
|
||||
|
||||
dsi_host: dsi-host {
|
||||
compatible = "synopsys,dw-mipi-dsi";
|
||||
regmap = <&dsi_regs>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dsi_dphy: dsi-dphy {
|
||||
compatible = "synopsys,dw-dphy";
|
||||
regmap = <&dsi_regs>;
|
||||
vosys-regmap = <&vosys_regs>;
|
||||
clocks = <&dummy_dpu_pixclk>, <&dummy_dphy_refclk>;
|
||||
clock-names = "pix-clk", "ref-clk";
|
||||
#phy-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
lcd_backlight: pwm-backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
};
|
||||
|
||||
panel0: dsi_panel0 {
|
||||
compatible = "jadard,jd9365da-h3";
|
||||
backlight = <&lcd_backlight>;
|
||||
reset-gpio = <&pcal6408ahk_d 7 0>;
|
||||
hsvcc-gpio = <&pcal6408ahk_d 6 1>;
|
||||
vspn3v3-gpio = <&pcal6408ahk_d 5 1>;
|
||||
};
|
||||
|
||||
aon {
|
||||
compatible = "thead,light-aon";
|
||||
status = "okay";
|
||||
|
||||
wakeup-by-gpio-on;
|
||||
wakeup-by-rtc-on;
|
||||
|
||||
pd: light-aon-pd {
|
||||
compatible = "thead,light-aon-pd";
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
light-regu-reg {
|
||||
compatible = "thead,light-dialog-pmic";
|
||||
status = "okay";
|
||||
|
||||
|
||||
|
||||
soc_dvdd18_aon_reg: soc_dvdd18_aon {
|
||||
regulator-name = "soc_dvdd18_aon";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd33_usb3_reg: soc_avdd33_usb3 {
|
||||
regulator-name = "soc_avdd33_usb3";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_aon_reg: soc_dvdd08_aon {
|
||||
regulator-name = "soc_dvdd08_aon";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_apcpu_dvdd_dvddm_reg: soc_apcpu_dvdd_dvddm {
|
||||
regulator-name = "soc_apcpu_dvdd_dvddm";
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1570000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
|
||||
regulator-name = "soc_dvdd08_ddr";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
|
||||
regulator-name = "soc_vdd_ddr_1v8";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
|
||||
regulator-name = "soc_vdd_ddr_1v1";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
|
||||
regulator-name = "soc_vdd_ddr_0v6";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd18_ap_reg: soc_dvdd18_ap {
|
||||
regulator-name = "soc_dvdd18_ap";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd08_ap_reg: soc_dvdd08_ap {
|
||||
regulator-name = "soc_dvdd08_ap";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
|
||||
regulator-name = "soc_avdd08_mipi_hdmi";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
|
||||
regulator-name = "soc_avdd18_mipi_hdmi";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
|
||||
regulator-name = "soc_dvdd33_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
|
||||
regulator-name = "soc_vdd18_emmc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
soc_dovdd18_scan_reg: soc_dovdd18_scan {
|
||||
regulator-name = "soc_dovdd18_scan";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
};
|
||||
soc_vext_2v8_reg: soc_vext_2v8 {
|
||||
regulator-name = "soc_vext_2v8";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "disabled";
|
||||
};
|
||||
soc_dvdd12_scan_reg: soc_dvdd12_scan {
|
||||
regulator-name = "soc_dvdd12_scan";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
};
|
||||
soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
|
||||
regulator-name = "soc_avdd28_scan_en";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
soc_avdd28_rgb_reg: soc_avdd28_rgb {
|
||||
regulator-name = "soc_avdd28_rgb";
|
||||
regulator-min-microvolt = <2200000>;
|
||||
regulator-max-microvolt = <3475000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "disabled";
|
||||
};
|
||||
soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
|
||||
regulator-name = "soc_dovdd18_rgb";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "disabled";
|
||||
};
|
||||
soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
|
||||
regulator-name = "soc_dvdd12_rgb";
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1675000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "disabled";
|
||||
};
|
||||
soc_avdd25_ir_reg: soc_avdd25_ir {
|
||||
regulator-name = "soc_avdd25_ir";
|
||||
regulator-min-microvolt = <2200000>;
|
||||
regulator-max-microvolt = <3475000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "disabled";
|
||||
};
|
||||
soc_dovdd18_ir_reg: soc_dovdd18_ir {
|
||||
regulator-name = "soc_dovdd18_ir";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3600000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "disabled";
|
||||
};
|
||||
soc_dvdd12_ir_reg: soc_dvdd12_ir {
|
||||
regulator-name = "soc_dvdd12_ir";
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1675000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
aon_pmic_config {
|
||||
compatible = "thead,light-pmic-conf";
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
iic-config = <0 0 2>;
|
||||
pmic_dev_0: pmic-dev@0 {
|
||||
pmic-name = "dialog,da9063,v1";
|
||||
pmic-addr = <0x5a 0x5b>;
|
||||
pmic_wdt_on;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pmic_dev_1: pmic-dev@1 {
|
||||
pmic-name = "dialog,da9121,v1";
|
||||
pmic-addr = <0x68>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
regu_config_0 {
|
||||
reg_info = <&soc_dvdd18_aon_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO3>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_1 {
|
||||
reg_info = <&soc_avdd33_usb3_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO9>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_2 {
|
||||
reg_info = <&soc_dvdd08_aon_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO2>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_3 {
|
||||
reg_info = <&soc_apcpu_dvdd_dvddm_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE1>;
|
||||
auto_on_info = <0 0 800000>;
|
||||
};
|
||||
|
||||
regu_id@1 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE2>;
|
||||
auto_on_info = <1 0 800000>;
|
||||
};
|
||||
|
||||
regu_id@2 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKIO>;
|
||||
auto_on_info = <2 0 800000>;
|
||||
};
|
||||
|
||||
coupling_info@0 {
|
||||
negative-min;
|
||||
info = <0 2 5 30>;
|
||||
};
|
||||
|
||||
coupling_info@1 {
|
||||
negative-min;
|
||||
info = <1 2 5 30>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_4 {
|
||||
reg_info = <&soc_dvdd08_ddr_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPERI>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_5 {
|
||||
reg_info = <&soc_vdd_ddr_1v8_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO4>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_6 {
|
||||
reg_info = <&soc_vdd_ddr_1v1_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKMEM>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_7 {
|
||||
reg_info = <&soc_vdd_ddr_0v6_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPRO>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_8 {
|
||||
reg_info = <&soc_dvdd18_ap_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO11>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_9 {
|
||||
reg_info = <&soc_avdd08_mipi_hdmi_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO1>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_10 {
|
||||
reg_info = <&soc_avdd18_mipi_hdmi_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO5>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_11 {
|
||||
reg_info = <&soc_dvdd33_emmc_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO10>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_12 {
|
||||
reg_info = <&soc_dovdd18_scan_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO6>;
|
||||
auto_on_info = <3 1 1800000>;
|
||||
auto_off_info = <1 1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
regu_config_13 {
|
||||
reg_info = <&soc_dvdd12_scan_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO8>;
|
||||
auto_on_info = <4 1 1200000>;
|
||||
auto_off_info = <2 1>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_14 {
|
||||
reg_info = <&soc_avdd28_scan_en_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO7>;
|
||||
auto_on_info = <5 1 2800000>;
|
||||
auto_off_info = <0 1>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_15 {
|
||||
reg_info = <&soc_dvdd08_ap_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_1 DA9121_ID_BUCK1>;
|
||||
parent_pmic_dev = <&pmic_dev_0 2 0>;
|
||||
};
|
||||
};
|
||||
|
||||
regu_config_16 {
|
||||
reg_info = <&soc_dvdd18_emmc_reg>;
|
||||
status = "okay";
|
||||
regu_id@0 {
|
||||
pmic_dev = <&pmic_dev_0 DA9063_ID_GPIO7>;
|
||||
parent_pmic_dev = <&pmic_dev_0 7 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
stdout-path = "/soc/serial@ffe7014000:115200";
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user