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https://github.com/revyos/th1520-vendor-uboot.git
synced 2026-06-21 17:12:31 +02:00
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6 Commits
| Author | SHA1 | Date | |
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ce1890d0dc | ||
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9893f1a2c0 | ||
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f80c918aa2 | ||
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69d7d3cda0 | ||
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4529d8d50f | ||
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74eca2553e |
@@ -104,6 +104,16 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
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{
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register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
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for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
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asm volatile(".long 0x02b5000b"); /* dcache.cipa a0 */
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sync_is();
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}
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void invalid_dcache_range(unsigned long start, unsigned long end)
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{
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register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
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for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
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asm volatile(".long 0x02a5000b"); /* dcache.ipa a0 */
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@@ -73,6 +73,7 @@ extern ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
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#endif
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extern void flush_dcache_range(unsigned long start, unsigned long end);
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extern void invalidate_dcache_range(unsigned long start, unsigned long end);
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extern void invalid_dcache_range(unsigned long start, unsigned long end);
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#ifdef CONFIG_CMD_MEMTEST
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int test_stuck_address(ulv *bufa, ulong count);
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@@ -50,6 +50,7 @@ u64 t_end;
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extern void flush_dcache_range(unsigned long start, unsigned long end);
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extern void invalidate_dcache_range(unsigned long start, unsigned long end);
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extern void invalid_dcache_range(unsigned long start, unsigned long end);
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extern unsigned long get_ddr_density(void);
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extern int riscv_get_time(u64 *time);
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@@ -304,7 +305,7 @@ int prbs_test(struct PRBS_ELE *prbs, unsigned int *buf, int pos, bool random_dq,
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// compare result
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// invalid cache before read
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mdelay(100);
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invalidate_dcache_range((ulong)buf, (ulong)buf+(bit_len*4*2*2));
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invalid_dcache_range((ulong)buf, (ulong)buf+(bit_len*4*2*2));
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p1 = buf;
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bit_cnt = 0;
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for (i = 0; i < bit_len; i++) {
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@@ -13,7 +13,7 @@ CONFIG_DDR_BOARD_CONFIG=y
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CONFIG_ARCH_RV64I=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
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CONFIG_DEFAULT_FDT_FILE="thead/light-milkv-meles.dtb"
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CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles.dtb"
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_DISPLAY_CPUINFO=y
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CONFIG_DISPLAY_BOARDINFO=y
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@@ -13,7 +13,7 @@ CONFIG_DDR_BOARD_CONFIG=y
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CONFIG_ARCH_RV64I=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
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CONFIG_DEFAULT_FDT_FILE="thead/light-milkv-meles.dtb"
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CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles.dtb"
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_DISPLAY_CPUINFO=y
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CONFIG_DISPLAY_BOARDINFO=y
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@@ -13,7 +13,7 @@ CONFIG_DDR_BOARD_CONFIG=y
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CONFIG_ARCH_RV64I=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
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CONFIG_DEFAULT_FDT_FILE="thead/light-milkv-meles-4g.dtb"
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CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles-4g.dtb"
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_DISPLAY_CPUINFO=y
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CONFIG_DISPLAY_BOARDINFO=y
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@@ -247,9 +247,10 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data)
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}
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} while (!(stat & SDHCI_INT_DATA_END));
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#ifdef CONFIG_TARGET_LIGHT_C910
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extern void invalid_dcache_range(unsigned long start, unsigned long end);
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/*After read ,invalid dcache range again to avoid cache filled during read tranfer*/
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if(data->flags == MMC_DATA_READ){
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invalidate_dcache_range(host->start_addr,host->start_addr+ROUND(data->blocks*data->blocksize, ARCH_DMA_MINALIGN));
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invalid_dcache_range(host->start_addr,host->start_addr+ROUND(data->blocks*data->blocksize, ARCH_DMA_MINALIGN));
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}
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#endif
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return 0;
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@@ -906,7 +906,8 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
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dep->resource_index = 0;
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dwc->setup_packet_pending = false;
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#ifdef CONFIG_TARGET_LIGHT_C910
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invalidate_dcache_range((unsigned long)dwc->ctrl_req, (dmaaddr_t)dwc->ctrl_req + ROUND(sizeof(*dwc->ctrl_req), CACHELINE_SIZE));
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extern void invalid_dcache_range(unsigned long start, unsigned long end);
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invalid_dcache_range((unsigned long)dwc->ctrl_req, (dmaaddr_t)dwc->ctrl_req + ROUND(sizeof(*dwc->ctrl_req), CACHELINE_SIZE));
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#endif
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switch (dwc->ep0state) {
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@@ -151,16 +151,19 @@
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ENV_STR_BOARD \
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"kernel_addr_r=0x00200000\0" \
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"kdump_buf=180M\0" \
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"mmcdev=0\0" \
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"mmcbootpart=2\0" \
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"default_mmcdev=1\0" \
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"mmc_select=if test -e mmc ${default_mmcdev}:${mmcbootpart} ${boot_conf_file}; then mmcdev=1; else mmcdev=0; fi;\0" \
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"boot_conf_file=/extlinux/extlinux.conf\0" \
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"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
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"partitions=name=table,size=2031KB;name=boot,size=500MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfsA}\0" \
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"uuid_swap=5ebcaaf0-e098-43b9-beef-1f8deedd135e\0" \
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"partitions=name=table,size=2031KB;name=boot,size=500MiB,type=boot;name=swap,size=4096MiB,type=swap,uuid=${uuid_swap};name=root,size=-,type=linux,uuid=${uuid_rootfsA}\0" \
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"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
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"load_aon=load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0" \
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"load_c906_audio=load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0" \
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"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
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"bootcmd_load=run findpart;run load_aon;run load_c906_audio; load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin\0" \
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"load_str=load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0" \
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"load_opensbi=load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin\0" \
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"bootcmd_load=run mmc_select; run load_aon; run load_c906_audio; run load_str; run load_opensbi\0" \
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"bootcmd=run bootcmd_load; bootslave; sysboot mmc ${mmcdev}:${mmcbootpart} any $boot_conf_addr_r $boot_conf_file;\0" \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"\0"
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