mirror of
https://github.com/thead-yocto-mirror/vpu-vc8000e-kernel
synced 2026-06-21 09:02:38 +02:00
332 lines
13 KiB
C
332 lines
13 KiB
C
/****************************************************************************
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2014 - 2021 VERISILICON
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*****************************************************************************
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*
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* The GPL License (GPL)
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*
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* Copyright (C) 2014 - 2021 VERISILICON
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*****************************************************************************
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*
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* Note: This software is released under dual MIT and GPL licenses. A
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* recipient may use this file under the terms of either the MIT license or
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* GPL License. If you wish to use only one license not the other, you can
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* indicate your decision by deleting one of the above license notices in your
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* version of this file.
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*
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*****************************************************************************/
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#ifndef _VC8000_VCMD_DRIVER_H_
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#define _VC8000_VCMD_DRIVER_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __FREERTOS__
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/* needed for the _IOW etc stuff used later */
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#include "base_type.h"
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#include "osal.h"
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#include "dev_common_freertos.h"
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#elif defined(__linux__)
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#include <linux/ioctl.h> /* needed for the _IOW etc stuff used later */
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#else //For other os
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//TODO...
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#endif
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#ifdef HANTROMMU_SUPPORT
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#include "hantrommu.h"
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#endif
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#ifdef HANTROAXIFE_SUPPORT
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#include "vc8000_axife.h"
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#endif
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#ifdef __FREERTOS__
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//ptr_t has been defined in base_type.h //Now the FreeRTOS mem need to support 64bit env
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#elif defined(__linux__)
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#undef ptr_t
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#define ptr_t PTR_T_KERNEL
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typedef size_t ptr_t;
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#endif
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/*
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* Macros to help debugging
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*/
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#undef PDEBUG /* undef it, just in case */
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#ifdef HANTRO_DRIVER_DEBUG
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# ifdef __KERNEL__
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/* This one if debugging is on, and kernel space */
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# define PDEBUG(fmt, args...) printk( KERN_INFO "vc8000: " fmt, ## args)
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# else
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/* This one for user space */
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# define PDEBUG(fmt, args...) printf(__FILE__ ":%d: " fmt, __LINE__ , ## args)
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# endif
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#else
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# define PDEBUG(fmt, args...) /* not debugging: nothing */
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#endif
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#define ENC_HW_ID1 0x48320100
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#define ENC_HW_ID2 0x80006000
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#define CORE_INFO_MODE_OFFSET 31
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#define CORE_INFO_AMOUNT_OFFSET 28
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/* Use 'k' as magic number */
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#define HANTRO_IOC_MAGIC 'k'
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/*
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* S means "Set" through a ptr,
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* T means "Tell" directly with the argument value
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* G means "Get": reply by setting through a pointer
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* Q means "Query": response is on the return value
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* X means "eXchange": G and S atomically
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* H means "sHift": T and Q atomically
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*/
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#define HANTRO_IOCG_HWOFFSET _IOR(HANTRO_IOC_MAGIC, 3, unsigned long *)
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#define HANTRO_IOCG_HWIOSIZE _IOR(HANTRO_IOC_MAGIC, 4, unsigned int *)
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#define HANTRO_IOC_CLI _IO(HANTRO_IOC_MAGIC, 5)
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#define HANTRO_IOC_STI _IO(HANTRO_IOC_MAGIC, 6)
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#define HANTRO_IOCX_VIRT2BUS _IOWR(HANTRO_IOC_MAGIC, 7, unsigned long *)
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#define HANTRO_IOCH_ARDRESET _IO(HANTRO_IOC_MAGIC, 8) /* debugging tool */
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#define HANTRO_IOCG_SRAMOFFSET _IOR(HANTRO_IOC_MAGIC, 9, unsigned long *)
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#define HANTRO_IOCG_SRAMEIOSIZE _IOR(HANTRO_IOC_MAGIC, 10, unsigned int *)
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#define HANTRO_IOCH_ENC_RESERVE _IOR(HANTRO_IOC_MAGIC, 11,unsigned int *)
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#define HANTRO_IOCH_ENC_RELEASE _IOR(HANTRO_IOC_MAGIC, 12,unsigned int *)
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#define HANTRO_IOCG_CORE_NUM _IOR(HANTRO_IOC_MAGIC, 13,unsigned int *)
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#define HANTRO_IOCG_CORE_INFO _IOR(HANTRO_IOC_MAGIC, 14,SUBSYS_CORE_INFO *)
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#define HANTRO_IOCG_CORE_WAIT _IOR(HANTRO_IOC_MAGIC, 15, unsigned int *)
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#define HANTRO_IOCG_ANYCORE_WAIT _IOR(HANTRO_IOC_MAGIC, 16, CORE_WAIT_OUT *)
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#define HANTRO_IOCH_GET_CMDBUF_PARAMETER _IOWR(HANTRO_IOC_MAGIC, 25,struct cmdbuf_mem_parameter *)
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#define HANTRO_IOCH_GET_CMDBUF_POOL_SIZE _IOWR(HANTRO_IOC_MAGIC, 26,unsigned long)
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#define HANTRO_IOCH_SET_CMDBUF_POOL_BASE _IOWR(HANTRO_IOC_MAGIC, 27,unsigned long)
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#define HANTRO_IOCH_GET_VCMD_PARAMETER _IOWR(HANTRO_IOC_MAGIC, 28, struct config_parameter *)
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#define HANTRO_IOCH_RESERVE_CMDBUF _IOWR(HANTRO_IOC_MAGIC, 29,struct exchange_parameter *)
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#define HANTRO_IOCH_LINK_RUN_CMDBUF _IOR(HANTRO_IOC_MAGIC, 30,u16 *)
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#define HANTRO_IOCH_WAIT_CMDBUF _IOR(HANTRO_IOC_MAGIC, 31,u16 *)
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#define HANTRO_IOCH_RELEASE_CMDBUF _IOR(HANTRO_IOC_MAGIC, 32,u16 *)
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#define HANTRO_IOCH_POLLING_CMDBUF _IOR(HANTRO_IOC_MAGIC, 33,u16 *)
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#define HANTRO_IOCH_GET_VCMD_ENABLE _IOWR(HANTRO_IOC_MAGIC, 50,unsigned long)
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#define GET_ENCODER_IDX(type_info) (CORE_VC8000E);
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#define CORETYPE(core) (1 << core)
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#define HANTRO_IOC_MAXNR 60
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/*priority support*/
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#define MAX_CMDBUF_PRIORITY_TYPE 2 //0:normal priority,1:high priority
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#define CMDBUF_PRIORITY_NORMAL 0
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#define CMDBUF_PRIORITY_HIGH 1
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#define OPCODE_WREG (0x01<<27)
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#define OPCODE_END (0x02<<27)
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#define OPCODE_NOP (0x03<<27)
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#define OPCODE_RREG (0x16<<27)
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#define OPCODE_INT (0x18<<27)
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#define OPCODE_JMP (0x19<<27)
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#define OPCODE_STALL (0x09<<27)
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#define OPCODE_CLRINT (0x1a<<27)
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#define OPCODE_JMP_RDY0 (0x19<<27)
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#define OPCODE_JMP_RDY1 ((0x19<<27)|(1<<26))
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#define JMP_IE_1 (1<<25)
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#define JMP_RDY_1 (1<<26)
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#define CLRINT_OPTYPE_READ_WRITE_1_CLEAR 0
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#define CLRINT_OPTYPE_READ_WRITE_0_CLEAR 1
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#define CLRINT_OPTYPE_READ_CLEAR 2
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#define VC8000E_FRAME_RDY_INT_MASK 0x0001
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#define VC8000E_CUTREE_RDY_INT_MASK 0x0002
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#define VC8000E_DEC400_INT_MASK 0x0004
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#define VC8000E_L2CACHE_INT_MASK 0x0008
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#define VC8000E_MMU_INT_MASK 0x0010
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#define CUTREE_MMU_INT_MASK 0x0020
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#define VC8000D_FRAME_RDY_INT_MASK 0x0100
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#define VC8000D_DEC400_INT_MASK 0x0400
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#define VC8000D_L2CACHE_INT_MASK 0x0800
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#define VC8000D_MMU_INT_MASK 0x1000
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#define VC8000D_DEC400_INT_MASK_1_1_1 0x0200
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#define VC8000D_L2CACHE_INT_MASK_1_1_1 0x0400
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#define VC8000D_MMU_INT_MASK_1_1_1 0x0800
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#define HW_ID_1_0_C 0x43421001
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#define HW_ID_1_1_2 0x43421102
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#define ASIC_STATUS_SEGMENT_READY 0x1000
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#define ASIC_STATUS_FUSE_ERROR 0x200
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#define ASIC_STATUS_SLICE_READY 0x100
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#define ASIC_STATUS_LINE_BUFFER_DONE 0x080 /* low latency */
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#define ASIC_STATUS_HW_TIMEOUT 0x040
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#define ASIC_STATUS_BUFF_FULL 0x020
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#define ASIC_STATUS_HW_RESET 0x010
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#define ASIC_STATUS_ERROR 0x008
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#define ASIC_STATUS_FRAME_READY 0x004
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#define ASIC_IRQ_LINE 0x001
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#define ASIC_STATUS_ALL (ASIC_STATUS_SEGMENT_READY |\
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ASIC_STATUS_FUSE_ERROR |\
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ASIC_STATUS_SLICE_READY |\
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ASIC_STATUS_LINE_BUFFER_DONE |\
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ASIC_STATUS_HW_TIMEOUT |\
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ASIC_STATUS_BUFF_FULL |\
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ASIC_STATUS_HW_RESET |\
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ASIC_STATUS_ERROR |\
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ASIC_STATUS_FRAME_READY)
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enum
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{
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CORE_VC8000E = 0,
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CORE_VC8000EJ = 1,
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CORE_CUTREE = 2,
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CORE_DEC400 = 3,
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CORE_MMU = 4,
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CORE_L2CACHE = 5,
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CORE_AXIFE = 6,
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CORE_APBFT = 7,
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CORE_MMU_1 = 8,
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CORE_AXIFE_1 = 9,
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CORE_MAX
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};
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//#define CORE_MAX (CORE_MMU)
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/*module_type support*/
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enum vcmd_module_type{
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VCMD_TYPE_ENCODER = 0,
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VCMD_TYPE_CUTREE,
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VCMD_TYPE_DECODER,
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VCMD_TYPE_JPEG_ENCODER,
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VCMD_TYPE_JPEG_DECODER,
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MAX_VCMD_TYPE
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};
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struct cmdbuf_mem_parameter
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{
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u32 *virt_cmdbuf_addr;
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ptr_t phy_cmdbuf_addr; //cmdbuf pool base physical address
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u32 mmu_phy_cmdbuf_addr; //cmdbuf pool base mmu mapping address
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u32 cmdbuf_total_size; //cmdbuf pool total size in bytes.
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u16 cmdbuf_unit_size; //one cmdbuf size in bytes. all cmdbuf have same size.
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u32 *virt_status_cmdbuf_addr;
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ptr_t phy_status_cmdbuf_addr; //status cmdbuf pool base physical address
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u32 mmu_phy_status_cmdbuf_addr; //status cmdbuf pool base mmu mapping address
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u32 status_cmdbuf_total_size; //status cmdbuf pool total size in bytes.
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u16 status_cmdbuf_unit_size; //one status cmdbuf size in bytes. all status cmdbuf have same size.
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ptr_t base_ddr_addr; //for pcie interface, hw can only access phy_cmdbuf_addr-pcie_base_ddr_addr.
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//for other interface, this value should be 0?
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};
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struct config_parameter
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{
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u16 module_type; //input vc8000e=0,cutree=1,vc8000d=2,jpege=3, jpegd=4
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u16 vcmd_core_num; //output, how many vcmd cores are there with corresponding module_type.
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u16 submodule_main_addr; //output,if submodule addr == 0xffff, this submodule does not exist.
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u16 submodule_dec400_addr; //output ,if submodule addr == 0xffff, this submodule does not exist.
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u16 submodule_L2Cache_addr; //output,if submodule addr == 0xffff, this submodule does not exist.
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u16 submodule_MMU_addr[2]; //output,if submodule addr == 0xffff, this submodule does not exist.
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u16 submodule_axife_addr[2]; //output,if submodule addr == 0xffff, this submodule does not exist.
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u16 config_status_cmdbuf_id; // output , this status comdbuf save the all register values read in driver init.//used for analyse configuration in cwl.
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u32 vcmd_hw_version_id;
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};
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/*need to consider how many memory should be allocated for status.*/
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struct exchange_parameter
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{
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u32 executing_time; //input ;executing_time=encoded_image_size*(rdoLevel+1)*(rdoq+1);
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u16 module_type; //input input vc8000e=0,IM=1,vc8000d=2,jpege=3, jpegd=4
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u16 cmdbuf_size; //input, reserve is not used; link and run is input.
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u16 priority; //input,normal=0, high/live=1
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u16 cmdbuf_id; //output ,it is unique in driver.
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u16 core_id; //just used for polling.
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};
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typedef struct CoreWaitOut
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{
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u32 job_id[4];
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u32 irq_status[4];
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u32 irq_num;
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} CORE_WAIT_OUT;
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typedef struct
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{
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u32 subsys_idx;
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u32 core_type;
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unsigned long offset;
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u32 reg_size;
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int irq;
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}CORE_CONFIG;
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typedef struct
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{
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unsigned long base_addr;
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u32 iosize;
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u32 resouce_shared; //indicate the core share resources with other cores or not.If 1, means cores can not work at the same time.
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}SUBSYS_CONFIG;
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typedef struct
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{
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u32 type_info; //indicate which IP is contained in this subsystem and each uses one bit of this variable
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unsigned long offset[CORE_MAX];
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unsigned long regSize[CORE_MAX];
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int irq[CORE_MAX];
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}SUBSYS_CORE_INFO;
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typedef struct
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{
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SUBSYS_CONFIG cfg;
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SUBSYS_CORE_INFO core_info;
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}SUBSYS_DATA;
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#ifdef __cplusplus
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}
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#endif
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#endif /* !_VC8000_VCMD_DRIVER_H_ */
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