5 Commits

Author SHA1 Message Date
Godzil
61937a1391 Merge branch 'master' into debugger 2021-04-04 22:13:59 +01:00
Godzil
e28317d29e Disable the IO Dump by default. 2021-04-04 21:17:34 +01:00
Godzil
f32928b0c3 Remove -Werror by default and add a cmake option to enable them. 2021-04-04 21:14:53 +01:00
Godzil
e4cf98bfe1 Add a debug function to log all access to IO regs. 2021-04-04 21:05:48 +01:00
Godzil
778c624664 Early changes to add a x86 debugger. 2020-02-07 17:39:46 +00:00
6 changed files with 83 additions and 38 deletions

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@@ -17,8 +17,15 @@ find_package(OpenGL REQUIRED)
include_directories(${OPENGL_INCLUDE_DIR})
set(CMAKE_C_FLAGS "-Wall -Wextra -Wno-unused-parameter -Wno-unused-result -Wno-write-strings -Werror")
set(CMAKE_CXX_FLAGS "-Wall -Wextra -Wno-unused-parameter -Wno-unused-result -Wno-write-strings -Werror")
option(WARN_AS_ERROR "Enable warning as error" OFF)
set(COMP_FLAGS "-march=native -Wall -Wextra -Wno-unused-parameter -Wno-unused-result -Wno-write-strings")
if (WARN_AS_ERROR)
set(COMP_FLAGS "${COMP_FLAGS} -Werror")
endif()
set(CMAKE_C_FLAGS ${COMP_FLAGS})
set(CMAKE_CXX_FLAGS ${COMP_FLAGS})
message("-- Building version ${VERSION}")

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@@ -29,10 +29,13 @@
#include "audio.h"
#include "memory.h"
//#define IO_DUMP
extern uint8_t *externalEeprom;
extern uint32_t romAddressMask;
extern uint16_t *internalEeprom;
extern nec_Regs I;
extern uint64_t nec_monotonicCycles;
enum
{
@@ -86,6 +89,8 @@ uint8_t ws_key_flipped;
int rtcDataRegisterReadCount=0;
FILE *ioLogFp = NULL;
////////////////////////////////////////////////////////////////////////////////
//
////////////////////////////////////////////////////////////////////////////////
@@ -139,6 +144,10 @@ void ws_io_init(void)
ws_io_reset();
ws_key_flipped=0;
#ifdef IO_DUMP
ioLogFp = fopen("iodump.csv", "wt");
#endif
}
////////////////////////////////////////////////////////////////////////////////
//
@@ -172,6 +181,10 @@ void ws_io_done(void)
{
free(ws_ioRam);
}
#ifdef IO_DUMP
fclose(ioLogFp);
#endif
}
/* Serial port */
@@ -582,6 +595,10 @@ uint8_t cpu_readport(uint8_t port)
exit:
if (ioLogFp)
{
fprintf(ioLogFp, "%ld, R, %02X, %02X\n", nec_monotonicCycles, port, retVal);
}
return retVal;
}
////////////////////////////////////////////////////////////////////////////////
@@ -600,6 +617,11 @@ void cpu_writeport(uint32_t port,uint8_t value)
int unknown_io_port=0;
if (ioLogFp)
{
fprintf(ioLogFp, "%ld, W, %02X, %02X\n", nec_monotonicCycles, port, value);
}
if (port > 0x100)
{
port &= 0xFF;

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@@ -38,6 +38,7 @@
/* cpu state */
/***************************************************************************/
uint64_t nec_monotonicCycles;
int nec_ICount;
nec_Regs I;
@@ -65,6 +66,7 @@ void nec_reset (void *param)
unsigned int i,j,c;
BREGS reg_name[8]= { AL, CL, DL, BL, AH, CH, DH, BH };
nec_monotonicCycles = 0;
memset( &I, 0, sizeof(I) );
@@ -3912,7 +3914,7 @@ const char *instructionsName[256] =
int nec_execute(int cycles)
{
int done;
nec_ICount=cycles;
// cpu_type=V30;
@@ -3920,14 +3922,28 @@ int nec_execute(int cycles)
while(nec_ICount>0)
{
#if 0
uint8_t op = cpu_readmem20((I.sregs[CS]<<4) + I.ip);
printf("[%04x:%04xh] %02xh '%s' - I=%d\n", I.sregs[CS], I.ip,
op, instructionsName[op], I.IF);
#define MK_LP(_seg, _off) (((_seg) << 4) + (_off))
if ( MK_LP(I.sregs[CS], I.ip) == 0x5E820 )
{
uint8_t op = cpu_readmem20((I.sregs[CS]<<4) + I.ip);
printf("AX = %04Xh - [%04X:%04Xh] = %04Xh\n", I.regs.w[AW], I.sregs[DS], 0x127f, cpu_readmem20(MK_LP(I.sregs[DS], 0x127f)));
printf("CS: %04Xh - DS: %04Xh - ES: %04Xh - SS: %04Xh\n", I.sregs[CS], I.sregs[DS], I.sregs[ES], I.sregs[SS]);
printf("[%04x:%04xh] %02xh '%s' - I=%d\n", I.sregs[CS], I.ip,
op, instructionsName[op], I.IF);
}
#endif
nec_instruction[FETCHOP]();
// nec_ICount++;
}
return cycles - nec_ICount;
done = cycles - nec_ICount;
nec_monotonicCycles += done;
return done;
}

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@@ -4,37 +4,6 @@
#include "necintrf.h"
typedef enum { ES, CS, SS, DS } SREGS;
typedef enum { AW, CW, DW, BW, SP, BP, IX, IY } WREGS;
typedef enum { AL,AH,CL,CH,DL,DH,BL,BH,SPL,SPH,BPL,BPH,IXL,IXH,IYL,IYH } BREGS;
#pragma pack(1)
typedef union
{
/* eight general registers */
uint16_t w[8]; /* viewed as 16 bits registers */
uint8_t b[16]; /* or as 8 bit registers */
} necbasicregs;
typedef struct
{
necbasicregs regs;
uint16_t sregs[4];
uint16_t ip;
int32_t SignVal;
int32_t AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
uint32_t TF, IF, DF, MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
uint32_t int_vector;
uint32_t pending_irq;
uint32_t nmi_state;
uint32_t irq_state;
int (*irq_callback)(int irqline);
} nec_Regs;
#pragma pack()
#define NEC_NMI_INT_VECTOR 2
/* Cpu types, steps of 8 to help the cycle count calculation */

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@@ -2,7 +2,36 @@
#ifndef __NECITRF_H_
#define __NECITRF_H_
typedef enum { ES, CS, SS, DS } SREGS;
typedef enum { AW, CW, DW, BW, SP, BP, IX, IY } WREGS;
typedef enum { AL,AH,CL,CH,DL,DH,BL,BH,SPL,SPH,BPL,BPH,IXL,IXH,IYL,IYH } BREGS;
#pragma pack(1)
typedef union
{
/* eight general registers */
uint16_t w[8]; /* viewed as 16 bits registers */
uint8_t b[16]; /* or as 8 bit registers */
} necbasicregs;
typedef struct
{
necbasicregs regs;
uint16_t sregs[4];
uint16_t ip;
int32_t SignVal;
int32_t AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
uint32_t TF, IF, DF, MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
uint32_t int_vector;
uint32_t pending_irq;
uint32_t nmi_state;
uint32_t irq_state;
int (*irq_callback)(int irqline);
} nec_Regs;
#pragma pack()
enum
{

2
source/nec/v30debug.cpp Normal file
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@@ -0,0 +1,2 @@
/* v30 debugger */