SuperCIC: LED polarity switch
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ikari
parent
c3e1651600
commit
94e01fd454
@ -83,9 +83,9 @@ isr
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bcf GPIO, 0
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bcf GPIO, 1
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bsf GPIO, 4 ; LED on
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nop
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nop
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nop
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clrf 0x5e ; clear pair mode detect
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clrf 0x5f ; clear pair mode detect
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bsf 0x5f, 1 ;
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nop
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nop
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nop
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@ -453,9 +453,9 @@ mangle_key_withskip
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movwf 0x20
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bcf GPIO, 0
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movf GPIO, w
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movwf 0x5e
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btfss GPIO, 3
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bsf GPIO, 0
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movwf 0x5e
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movf GPIO, w
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movwf 0x5f
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bcf GPIO, 0
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@ -646,7 +646,7 @@ scic_pair_skip3
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nop
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nop
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nop
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btfss 0x30, 4 ; skip if half-byte carry
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goto mangle_return
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nop
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@ -715,6 +715,7 @@ supercic_pairmode
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bsf TRISIO, 0
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bsf TRISIO, 1
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banksel GPIO
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bcf INTCON, GIE
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supercic_pairmode_loop
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bsf GPIO, 4
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nop
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@ -24,16 +24,16 @@ processor p16f630
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; ---------------------------------------------------------------------
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;
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; pin configuration: (cartridge slot pin) [original 18-pin SMD lock CIC pin]
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;
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; {alternative pin function in pair mode}
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;
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; ,-----_-----.
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; +5V (27,58) [18] |1 14| GND (5,36) [9]
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; CIC clk in (56) [7] |2 A5 A0 13| CIC lock reset in [8]
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; D4 out |3 A4 A1 12| 50/60Hz out
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; REG_TIMEOUT in |4 A3 A2 11| host reset out [10]
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; LED out (grn) |5 C5 C0 10| CIC data i/o 0 (55) [1]
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; LED out (red) |6 C4 C1 9| CIC data i/o 1 (24) [2]
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; |7 C3 C2 8| CIC slave reset out (25) [11]
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; LED out (grn) |5 C5 C0 10| CIC data i/o 0 (55) [1] / {50/60Hz in}
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; LED out (red) |6 C4 C1 9| CIC data i/o 1 (24) [2] / {D4 in}
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; LED_TYPE in |7 C3 C2 8| CIC slave reset out (25) [11]
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; `-----------'
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;
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; pin 8 connected to key CIC pin 7 (or clone CIC pin 5)
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@ -43,6 +43,10 @@ processor p16f630
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; pin 12 connected to PPU1 pin 24 & PPU2 pin 30 (both isolated from mainboard)
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; pin 13 connected to reset button
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;
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; LED_TYPE sets the output mode for the LED pins (must be tied to either level):
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; low = common cathode
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; high = common anode (output inverted)
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;
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; D4 out is always switched to the autodetected region and is not user
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; overridable except in SuperCIC pair mode or when no key CIC is detected.
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; It can be used, by adding an address decoder and a latch, to override
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@ -195,10 +199,11 @@ rst_loop
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banksel PORTA
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movwf 0x55 ; store saved mode in mode var
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movwf 0x56 ; and temp LED
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movwf 0x58
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movwf 0x50 ; and final LED
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movlw 0x3 ; mask
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andwf 0x50, f ;
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movwf 0x58 ; and forced region
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andlw 0x03 ; mask
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btfsc PORTC, 3 ; invert LEDs?
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xorlw 0x03 ; then make it so
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movwf 0x50 ; and store
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swapf 0x50, f ; and nibbleswap for actual output
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btfss PORTA, 3 ; if D4 mode is disabled:
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@ -369,15 +374,15 @@ loop0
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addlw 0x20 ; lock stream
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movwf FSR ; store in index reg
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loop1
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nop
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movf INDF, w ; load seed value
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andlw 0x01 ; mask LSB
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movwf 0x20
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bcf 0x20, 1 ; clear bit 1
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btfsc 0x20, 0 ; copy from bit 0
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bsf 0x20, 1 ; (if set)
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movf 0x50, w ; get LED state
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iorwf 0x20, f ; combine with data i/o
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movf 0x20, w
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andlw 0x33 ; mask out anything unwanted
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movwf PORTC
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nop
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movf PORTC, w ; read input
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@ -930,10 +935,8 @@ checkrst_1_1 ; 24
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nop
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nop
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nop
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nop
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nop
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btfss PIR1, 0
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goto checkrst_end_plus15
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goto checkrst_end_plus17
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bcf T1CON, 0 ; stop the timer
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clrf PIR1 ; reset overflow bit
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clrf TMR1L ; reset counter
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@ -945,6 +948,8 @@ checkrst_1_1 ; 24
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xorwf 0x56, f ; change back to 1
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movf 0x56, w
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andlw 0x03 ; mask
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btfsc PORTC, 3 ; invert LEDs?
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xorlw 0x03 ; then make it so
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movwf 0x50
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swapf 0x50, f ; adjust for GPIO pins
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bsf 0x52, 0 ; set modechange flag
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@ -999,9 +1004,9 @@ checkrst_end ; 2
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checkrst_end_plus18
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nop
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checkrst_end_plus17
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nop
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nop
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checkrst_end_plus15
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nop
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nop
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checkrst_end_plus13
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@ -1044,12 +1049,16 @@ supercic_pairmode_loop
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btfss PORTC, 0
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goto supercic_pairmode_led_60
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supercic_pairmode_led_50
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bcf PORTC, 4
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bsf PORTC, 5
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movlw 0x20
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btfsc PORTC, 3
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xorlw 0x30
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movwf PORTC
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goto supercic_pairmode_loop
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supercic_pairmode_led_60
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bsf PORTC, 4
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bcf PORTC, 5
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movlw 0x10
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btfsc PORTC, 3
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xorlw 0x30
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movwf PORTC
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goto supercic_pairmode_loop
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; -----------------------------------------------------------------------
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