ikari 150384fba3 fix timing again

2009-09-17 12:34:45 +02:00

pcb

cleanup schematic, edge triggered cycle start detection, debug output cleanup

2009-09-11 11:03:00 +02:00

src

fix timing again

2009-09-17 12:34:45 +02:00

verilog/sd2snes

fix timing again

2009-09-17 12:34:45 +02:00

Description

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10 MiB

Languages

C 73.7%

Verilog 18.3%

Assembly 5.4%

Makefile 2.3%

Perl 0.1%

Other 0.1%