godzil/sd2snes
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443f7b138cdc7c8015fc97135821485e95aacbeb
sd2snes/verilog/sd2snes_test/main.ucf
Maximilian Rehkopf 7109f9e030 FPGA: add SD clock pullup to test configuration
2012-05-02 10:46:27 +02:00

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