Maximilian Rehkopf 60d7a08117 FPGA: Adjust Cx4 timing to new master clock rate

2012-07-09 02:13:44 +02:00

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sd2snes

FPGA: rework shared memory access FSM

2012-07-09 02:12:59 +02:00

sd2snes_cx4

FPGA: Adjust Cx4 timing to new master clock rate

2012-07-09 02:13:44 +02:00

sd2snes_test

FPGA: add SD clock pullup to test configuration

2012-05-02 10:46:27 +02:00

sd2sneslite

FPGA: rework shared memory access FSM

2012-07-09 02:12:59 +02:00