Maximilian Rehkopf 60d7a08117 FPGA: Adjust Cx4 timing to new master clock rate

2012-07-09 02:13:44 +02:00

bin

Firmware: add basic BS download page file

2012-05-02 12:12:50 +02:00

cic

SuperCIC/key: fix unreliable pair mode entry (sync with lock)

2011-12-18 18:41:00 +01:00

gfx

dedicated mapper for menu, new logo gfx, TODO: fix avr mem access again

2009-12-28 04:50:17 +01:00

lbr

eagle libs

2009-12-05 01:52:31 +01:00

misc/igr

IGR: describe SuperCIC long reset in comments

2011-08-17 00:03:10 +02:00

mk1-src

archive MK1 AVR source

2010-09-06 23:51:48 +02:00

pcb

PCB: add logo to Rev.E2

2012-05-02 10:24:15 +02:00

snes

menu: comments

2012-07-03 20:44:17 +02:00

src

Firmware: adjust to SPI changes

2012-07-09 01:19:44 +02:00

utils

utils: update graphics conversion tools

2012-02-29 22:13:50 +01:00

verilog

FPGA: Adjust Cx4 timing to new master clock rate

2012-07-09 02:13:44 +02:00

CHANGELOG

Update changelog for version 0.1.4

2012-07-09 01:16:39 +02:00

Description

No description provided

10 MiB

Languages

C 73.7%

Verilog 18.3%

Assembly 5.4%

Makefile 2.3%

Perl 0.1%

Other 0.1%