Linux_SDK_V1.4.2

Signed-off-by: thead_admin <occ_thead@service.alibaba.com>

.github/workflows/kernel.yml

@@ -1,97 +0,0 @@
-name: revyos-kernel-build
-
-on:
-  push:
-  pull_request:
-  workflow_dispatch:
-  schedule:
-    - cron: "0 2 * * *"
-
-env:
-  xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395627867
-  toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1-20240115.tar.gz
-  mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2024.03.01
-  mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2024.03.01-nightly.tar.gz
-  wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
-  ARCH: riscv
-  board: th1520
-  KBUILD_BUILD_USER: builder
-  KBUILD_BUILD_HOST: revyos-riscv-builder
-  KDEB_COMPRESS: none
-  KDEB_CHANGELOG_DIST: unstable
-
-jobs:
-  kernel:
-    strategy:
-      fail-fast: false
-      matrix:
-        include:
-          - name: gcc-13
-            cross: riscv64-unknown-linux-gnu-
-            machine: ubuntu-22.04
-            run_image: ghcr.io/revyos/revyos-kernel-builder:amd64-2024.04.02
-          - name: thead-gcc
-            cross: riscv64-unknown-linux-gnu-
-            machine: ubuntu-22.04
-            run_image: ghcr.io/revyos/revyos-kernel-builder:amd64-2024.04.02
-          - name: native
-            cross: riscv64-linux-gnu-
-            machine: [ self-hosted, Linux, riscv64 ]
-            run_image: ghcr.io/revyos/revyos-kernel-builder:riscv64-2024.04.02
-
-    runs-on: ${{ matrix.machine }}
-    container:
-      image: ${{ matrix.run_image }}
-    env:
-      CROSS_COMPILE: ${{ matrix.cross }}
-
-    steps:
-      - name: Checkout kernel
-        uses: actions/checkout@v4
-        with:
-            path: 'kernel'
-
-      - name: Compile Kernel && Install
-        run: |
-              mkdir -p rootfs
-              if [[ ${{ matrix.name }} = "thead-gcc" ]]; then
-                ${wget_alias} ${xuantie_toolchain}/${toolchain_file_name}
-                tar -xvf ${toolchain_file_name} -C /opt
-                export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1/bin:$PATH"
-              elif [[ ${{ matrix.name }} = "gcc-13" ]]; then
-                ${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
-                tar -xvf ${mainline_toolchain_file_name} -C /opt
-                export PATH="/opt/riscv/bin:$PATH"
-              else
-                echo "No download toolchain."
-              fi
-              ${CROSS_COMPILE}gcc -v
-
-              pushd kernel
-                make revyos_defconfig
-                export KDEB_PKGVERSION="$(make kernelversion)-$(date "+%Y.%m.%d.%H.%M")+$(git rev-parse --short HEAD)"
-                sed -i '/CONFIG_LOCALVERSION_AUTO/d' .config && echo "CONFIG_LOCALVERSION_AUTO=n" >> .config
-                cat .config | grep "CONFIG_THEAD_ISA"
-                if [ `uname -m` = "riscv64" ]; then
-                  # FIXME: force use 32 thread
-                  make -j32 bindeb-pkg LOCALVERSION="-${board}"
-                else
-                  make -j$(nproc) bindeb-pkg LOCALVERSION="-${board}"
-                fi
-                
-                # Copy deb
-                dcmd cp -v ../*.changes ${GITHUB_WORKSPACE}/rootfs/
-
-                # record commit-id
-                git rev-parse HEAD > kernel-commitid
-                cp -v kernel-commitid ${GITHUB_WORKSPACE}/rootfs/
-
-                ls -al ${GITHUB_WORKSPACE}/rootfs/
-              popd
-
-      - name: 'Upload Artifact'
-        uses: actions/upload-artifact@v4
-        with:
-          name: thead-kernel-${{ matrix.name }}
-          path: rootfs/*
-          retention-days: 30

.gitignore

@@ -18,7 +18,6 @@
 *.c.[012]*.*
 *.dt.yaml
 *.dtb
-*.dtbo
 *.dtb.S
 *.dwo
 *.elf

Makefile

@@ -480,8 +480,6 @@ LZ4		= lz4
 XZ		= xz
 ZSTD		= zstd
 
-PAHOLE_FLAGS	= $(shell PAHOLE=$(PAHOLE) $(srctree)/scripts/pahole-flags.sh)
-
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
 		  -Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
 NOSTDINC_FLAGS :=
@@ -536,7 +534,6 @@ export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE
 export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE
 export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE
 export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
-export PAHOLE_FLAGS
 
 # Files to ignore in find ... statements
 

arch/riscv/Kconfig

@@ -18,7 +18,6 @@ config RISCV
 	select ARCH_HAS_DEBUG_VM_PGTABLE
 	select ARCH_HAS_DEBUG_VIRTUAL if MMU
 	select ARCH_HAS_DEBUG_WX
-	select ARCH_HAS_FAST_MULTIPLIER
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_GIGANTIC_PAGE
 	select ARCH_HAS_KCOV
@@ -35,7 +34,6 @@ config RISCV
 	select ARCH_KEEP_MEMBLOCK
 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
-	select ARCH_USE_CMPXCHG_LOCKREF
 	select ARCH_USE_QUEUED_SPINLOCKS
 	select ARCH_USE_QUEUED_RWLOCKS
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
@@ -385,28 +383,6 @@ config RISCV_BASE_PMU
 
 endmenu
 
-config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
-	def_bool y
-	# https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc
-	depends on AS_IS_GNU && AS_VERSION >= 23800
-	help
-	  Newer binutils versions default to ISA spec version 20191213 which
-	  moves some instructions from the I extension to the Zicsr and Zifencei
-	  extensions.
-
-config TOOLCHAIN_NEEDS_OLD_ISA_SPEC
-	def_bool y
-	depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
-	# https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16
-	depends on CC_IS_CLANG && CLANG_VERSION < 170000
-	help
-	  Certain versions of clang do not support zicsr and zifencei via -march
-	  but newer versions of binutils require it for the reasons noted in the
-	  help text of CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. This
-	  option causes an older ISA spec compatible with these older versions
-	  of clang to be passed to GAS, which has the same result as passing zicsr
-	  and zifencei to -march.
-
 config FPU
 	bool "FPU support"
 	default y
@@ -417,19 +393,45 @@ config FPU
 	  If you don't know what to do here, say Y.
 
 config VECTOR
+	bool "VECTOR support"
+	default n
+
+choice VECTOR_VERSION
+	prompt "Vector Version"
+	depends on VECTOR
+	default VECTOR_1_0
+
+config VECTOR_1_0
+	bool "VECTOR 1.0 support"
+	help
+	  Say N here if you want to disable all vector 1.0 related procedure
+	  in the kernel.
+
+	  If you don't know what to do here, say Y.
+
+config VECTOR_0_7
 	bool "VECTOR 0.7 support"
-	default y
 	help
 	  Say N here if you want to disable all vector 0.7 related procedure
 	  in the kernel.
 
 	  If you don't know what to do here, say Y.
 
+endchoice
+
+config VLEN_256
+	bool "VECTOR VLEN 256"
+	depends on VECTOR
+	default n
+
+config VECTOR_EMU
+	bool "VECTOR e64 emulate for c906 v1"
+	depends on VECTOR
+	default n
+
 config THEAD_ISA
 	bool "T-HEAD extension ISA in AFLAGS with -march=_xtheadc"
-	default y
-	help
-	  Say N here if you want to disable xtheadc in the kernel.
+	default n
 
 endmenu
 

arch/riscv/Makefile

@@ -48,27 +48,25 @@ endif
 endif
 
 # ISA string setting
-riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
-riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
-riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
-riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
+# Newer binutils versions default to ISA spec version 20191213 which moves some
+# instructions from the I extension to the Zicsr and Zifencei extensions.
+toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
+riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
 
-# Fix mainline build
-toolchain-have-v0p7 := $(call cc-option-yn, -march=$(riscv-march-y)v0p7)
-riscv-march-$(toolchain-have-v0p7) := $(riscv-march-y)v0p7
+riscv-march-cflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
+riscv-march-cflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
+riscv-march-cflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-cflags-y)c
 
-toolchain-have-xtheadc := $(call cc-option-yn, -march=$(riscv-march-y)_xtheadc)
-riscv-march-$(toolchain-have-xtheadc) := $(riscv-march-y)_xtheadc
+riscv-march-aflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
+riscv-march-aflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
+riscv-march-aflags-$(CONFIG_FPU)		:= $(riscv-march-aflags-y)fd
+riscv-march-aflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-aflags-y)c
+riscv-march-aflags-$(CONFIG_VECTOR_1_0)		:= $(riscv-march-aflags-y)v
+riscv-march-aflags-$(CONFIG_VECTOR_0_7)		:= $(riscv-march-aflags-y)v0p7
+riscv-march-aflags-$(CONFIG_THEAD_ISA)		:= $(riscv-march-aflags-y)_xtheadc
 
-ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC
-KBUILD_CFLAGS += -Wa,-misa-spec=2.2
-KBUILD_AFLAGS += -Wa,-misa-spec=2.2
-else
-riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei
-endif
-
-KBUILD_CFLAGS += -march=$(subst _xtheadc,,$(subst v0p7,,$(subst fd,,$(riscv-march-y))))
-KBUILD_AFLAGS += -march=$(riscv-march-y)
+KBUILD_CFLAGS += -march=$(riscv-march-cflags-y) -Wa,-march=$(riscv-march-aflags-y)
+KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
 
 KBUILD_CFLAGS += -mno-save-restore
 KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
@@ -126,7 +124,7 @@ endif
 ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_KENDRYTE),yy)
 KBUILD_IMAGE := $(boot)/loader.bin
 else
-KBUILD_IMAGE := $(boot)/Image
+KBUILD_IMAGE := $(boot)/Image.gz
 endif
 BOOT_TARGETS := Image Image.gz loader loader.bin
 

arch/riscv/boot/dts/Makefile

@@ -1,9 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
-
-ifeq ($(CONFIG_OF_OVERLAY),y)
-DTC_FLAGS += -@
-endif
-
 subdir-y += sifive
 subdir-y += kendryte
 subdir-y += thead

arch/riscv/boot/dts/thead/Makefile

@@ -1,9 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
-
-ifeq ($(CONFIG_OF_OVERLAY),y)
-DTC_FLAGS += -@
-endif
-
 dtb-$(CONFIG_SOC_THEAD_ICE) += ice.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_MPW) += th1520_mpw.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu.dtb
@@ -54,26 +49,3 @@ dtb-$(CONFIG_SOC_THEAD_TH1520_ANDROID) += th1520-a-val-android.dtb
 dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu.dtb fire-emu-crash.dtb
 dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb
 dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu-soc-base-sec.dtb
-
-dtb-$(CONFIG_SOC_THEAD) += th1520-beagle.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-16gb.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-laptop.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-console.dtb th1520-lpi4a-console-16g.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-cluster.dtb th1520-lpi4a-cluster-16gb.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-z14inch-m0.dtb th1520-lpi4a-z14inch-m0-16g.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-milkv-meles.dtb th1520-milkv-meles-4g.dtb th1520-milkv-meles-dsi0.dtb
-
-# compat old name
-dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-16gb.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-console.dtb light-lpi4a-console-16g.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb
-
-# compat mainline name
-dtb-$(CONFIG_SOC_THEAD) += th1520-lichee-pi-4a.dtb th1520-lichee-pi-4a-16g.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lichee-cluster-4a.dtb th1520-lichee-cluster-4a-16g.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-beaglev-ahead.dtb
-
-targets += dtbs dtbs_install
-targets += $(dtb-y)
-
-subdir-y	:= overlays

arch/riscv/boot/dts/thead/light-beagle.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-beagle.dts"

arch/riscv/boot/dts/thead/light-lpi4a-16gb.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-16gb.dts"

arch/riscv/boot/dts/thead/light-lpi4a-console-16g.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-console-16g.dts"

arch/riscv/boot/dts/thead/light-lpi4a-console.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-console.dts"

arch/riscv/boot/dts/thead/light-lpi4a.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-product.dts"

arch/riscv/boot/dts/thead/overlays/BBORG_LOAD-00A2.dts

@@ -1,71 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
- * See Cape Interface Spec page for more info on Bone Buses
- * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
- *
- */
-
-/dts-v1/;
-/plugin/;
-
-/*
- * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
- */
-&{/chosen} {
-	overlays {
-		BBORG_LOAD-00A2 = __TIMESTAMP__;
-	};
-};
-
-/*
- * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver 
- */
-
-&bone_led_P9_42 {
-    status = "okay";
-    label = "load-sink1";
-    default-state = "keep";
-};
-
-&bone_led_P9_41 {
-    status = "okay";
-    label = "load-sink2";
-    default-state = "keep";
-};
-
-&bone_led_P9_30 {
-    status = "okay";
-    label = "load-sink3";
-    default-state = "keep";
-};
-
-&bone_led_P9_27 {
-    status = "okay";
-    label = "load-sink4";
-    default-state = "keep";
-};
-
-&bone_led_P8_12 {
-    status = "okay";
-    label = "load-sink5";
-    default-state = "keep";
-};
-
-&bone_led_P8_11 {
-    status = "okay";
-    label = "load-sink6";
-    default-state = "keep";
-};
-
-&bone_led_P8_15 {
-    status = "okay";
-    label = "load-sink7";
-    default-state = "keep";
-};
-
-&bone_led_P8_17 {
-    status = "okay";
-    label = "load-sink8";
-    default-state = "keep";
-};

arch/riscv/boot/dts/thead/overlays/BBORG_RELAY-00A2.dts

@@ -1,58 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
- * Copyright (C) 2019 Amilcar Lucas <amilcar.lucas@iav.de>
- * Copyright (C) 2020 - 2023 Deepak Khatri <lorforlinux@beagleboard.org>
- *
- * See Cape Interface Spec page for more info on Bone Buses
- * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
- *
- */
-
-/dts-v1/;
-/plugin/;
-
-/*
- * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
- */
-&{/chosen} {
-	overlays {
-		BBORG_RELAY-00A2.kernel = __TIMESTAMP__;
-	};
-};
-
-/*
- * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver
- */
-
-// relay1
-&bone_led_P9_41 {
-	status = "okay";
-	// access: sys/class/leds/relay1
-	label = "relay1";
-	default-state = "keep";
-};
-
-// relay2
-&bone_led_P9_42 {
-	status = "okay";
-	// access: sys/class/leds/relay2
-	label = "relay2";
-	default-state = "keep";
-};
-
-// realy3
-&bone_led_P9_30 {
-	status = "okay";
-	// access: sys/class/leds/relay3
-	label = "relay3";
-	default-state = "keep";
-};
-
-// realy4
-&bone_led_P9_27 {
-	status = "okay";
-	// access: sys/class/leds/relay4
-	label = "relay4";
-	default-state = "keep";
-};

arch/riscv/boot/dts/thead/overlays/BONE-LED_P8_03.dts

@@ -1,32 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
- *
- * See Cape Interface Spec page for more info on Bone Buses
- * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
- *
- * Virtual cape for LED on P8_03 
- * Supports BBB, BBBWL, BBAI, and BBAI-64
- *
- */
- 
-/dts-v1/;
-/plugin/;
- 
-&{/chosen} {
-	overlays {
-		BONE-LED_P8_03 = __TIMESTAMP__;
-	};
-};
-
-/*
- * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
- */
-
-&bone_led_P8_03 {
-    status = "okay";
-    // access: sys/class/leds/led_P8_03
-    label = "led_P8_03";
-    linux,default-trigger = "heartbeat";
-    default-state = "on";
-};

arch/riscv/boot/dts/thead/overlays/BONE-LED_P9_11.dts

@@ -1,32 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
- *
- * See Cape Interface Spec page for more info on Bone Buses
- * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
- *
- * Virtual cape for LED on P9_11 
- * Supports BBB, BBBWL, BBAI, and BBAI-64
- *
- */
- 
-/dts-v1/;
-/plugin/;
- 
-&{/chosen} {
-	overlays {
-		BONE-LED_P9_11 = __TIMESTAMP__;
-	};
-};
-
-/*
- * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
- */
-
-&bone_led_P9_11 {
-    status = "okay";
-    // access: sys/class/leds/led_P9_11
-    label = "led_P9_11";
-    linux,default-trigger = "heartbeat";
-    default-state = "on";
-};

arch/riscv/boot/dts/thead/overlays/BVA-MIKROBUS-0.dts

@@ -1,30 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2023 BeagleBoard.org - https://beagleboard.org/
- * Copyright (C) 2023 Deepak Khatri <lorforlinux@beagleboard.org>
- *
- * See Cape Interface Spec page for more info on Bone Buses
- * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html
- *
- */
-
-/dts-v1/;
-/plugin/;
-
- /*
- * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
- */
- 
-&{/chosen} {
-	overlays {
-		BBORG_LOAD-00A2 = __TIMESTAMP__;
-	};
-};
-
-/*
- * Enable mikroBus port
- */
-
-&bone_mikrobus0 {
-    status = "okay";
-};

arch/riscv/boot/dts/thead/overlays/Makefile

@@ -1,15 +0,0 @@
-# Overlays for the CONFIG_SOC_THEAD platform
-
-dtbo-$(CONFIG_SOC_THEAD) += \
-	BBORG_LOAD-00A2.dtbo	\
-	BBORG_RELAY-00A2.dtbo	\
-	BONE-LED_P8_03.dtbo	\
-	BONE-LED_P9_11.dtbo	\
-	BVA-MIKROBUS-0.dtbo \
-	meles-wifibt-external-antenna.dtbo
-
-targets += dtbs dtbs_install
-targets += $(dtbo-y)
-
-always-y	:= $(dtbo-y)
-clean-files	:= *.dtbo

arch/riscv/boot/dts/thead/overlays/meles-wifibt-external-antenna.dts

@@ -1,28 +0,0 @@
-/dts-v1/;
-/plugin/;
-
-/ {
-	fragment@0 {
-		target-path = "/";
-
-		__overlay__ {
-			ext_antenna: ext-antenna {
-				status = "okay";
-				compatible = "regulator-fixed";
-				enable-active-low;
-				gpio = <&gpio1_porta 24 1>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-name = "ext_antenna";
-			};
-		};
-	};
-
-	fragment@1 {
-		target = <&board_antenna>;
-
-		__overlay__ {
-			status = "disabled";
-		};
-	};
-};

arch/riscv/boot/dts/thead/th1520-beagle.dts

@@ -1,728 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2021 Alibaba Group Holding Limited.
- */
-
-/dts-v1/;
-
-#include "th1520-beagle.dtsi"
-
-/ {
-	bcmdhd_wlan {
-		compatible = "android,bcmdhd_wlan";
-
-		gpio_wl_reg_on =   <&gpio2_porta 31 1>;
-		gpio_wl_host_wake = <&gpio2_porta 25 1>;
-	};
-};
-
-&pwm {
-	status = "disabled";
-};
-
-&qspi0 {
-	status = "disabled";
-};
-
-&qspi1 {
-	status = "disabled";
-};
-
-&vvcam_sensor4 { // beagle board J5 CSI0 connector
-	sensor_name = "IMX219";
-	sensor_pdn = <&gpio2_porta 23 0>; //powerdown pin / shutdown pin 
-	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
-	i2c_addr = /bits/ 8 <0x10>;
-	i2c_bus = /bits/ 8 <1>;
-	i2c_reg_width = /bits/ 8 <2>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "okay";
-};
-
-&vvcam_sensor5 { // beagle board J4 CSI1 connector
-	sensor_name = "IMX219";
-	sensor_pdn = <&gpio2_porta 24 0>; //powerdown pin / shutdown pin 
-	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
-	i2c_addr = /bits/ 8 <0x10>;
-	i2c_bus = /bits/ 8 <3>;
-	i2c_reg_width = /bits/ 8 <2>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "okay";
-};
-
-/*
-sensor imx219 mounted on beagle board J4 CSI1 (=light CSI2X2_A+CSI2X2_B   /   CSI2X2_A only)
-video0: sensor-vipre-isp0
-video1: sensor-vipre-isp0-dw
-video7: sensor-vipre-isp0-dsp1-ry-dw
-video10: tuningtool
-
-sensor imx219 mounted on beagle board J5 CSI0 (=light CSI2)
-video2: sensor-vipre-isp1   
-video3: sensor-vipre-isp1-dw   
-video4: sensor-vipre-isp1-dsp0-ry
-video5: sensor-vipre-isp1-dsp0-ry-dw
-video12: tuningtool
-*/
-
-&video0{
-    vi_mem_pool_region = <0xFFFFFFFF>;	// vi_mem: framebuffer, region[2]
-    channel0 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <5>; // imx219
-			csi_idx = <2>; //<2>=CSI2X2_A
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-        dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI2_ISP0";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <0>;
-			path_type = "ISP_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <16>;
-				frame_count = <3>;
-			};
-		};
-	};
-	channel1 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <5>; // imx219
-			csi_idx = <2>; //<2>=CSI2X2_A
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-        dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI2_ISP0";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <0>;
-			path_type = "ISP_MI_PATH_SP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <16>;
-				frame_count = <3>;
-			};
-		};
-	};
-	channel2 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <5>; // imx219
-			csi_idx = <2>; //<2>=CSI2X2_A
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-        dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI2_ISP0";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <0>;
-			path_type = "ISP_MI_PATH_SP2_BP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <16>;
-				frame_count = <3>;
-			};
-		};
-	};
-};
-
-&video2 {
-    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
-	status = "okay";
-	channel0 {
-		channel_id = <0>;
-		status = "okay";
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <16>;
-				frame_count = <3>;
-			};
-		};
-	};
-	channel1 {
-		channel_id = <1>;
-		status = "okay";
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_SP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <16>;
-				frame_count = <3>;
-			};
-		};
-	};
-	channel2 {
-		channel_id = <2>;
-		status = "okay";
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_SP2_BP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <16>;
-				frame_count = <3>;
-			};
-		};
-	};
-};
-
-&video3{
-    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
-	channel0 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dw {
-			subdev_name = "dw";
-			idx = <0>;
-			path_type = "DW_DWE_VSE0";
-			dw_dst_depth = <2>;
-		};
-	};
-	channel1 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dw {
-			subdev_name = "dw";
-			idx = <0>;
-			path_type = "DW_DWE_VSE1";
-			dw_dst_depth = <2>;
-		};
-	};
-	channel2 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dw {
-			subdev_name = "dw";
-			idx = <0>;
-			path_type = "DW_DWE_VSE2";
-			dw_dst_depth = <2>;
-		};
-	};
-};
-
-&video4{
-    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
-	channel0 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_PP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dsp {
-			subdev_name = "dsp";
-			idx = <0>;
-			path_type = "DSP_PATH_ISP_RY";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		ry {
-			subdev_name = "ry";
-			idx = <0>;
-			path_type = "ISP_RY_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-	};
-	channel1 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_PP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dsp {
-			subdev_name = "dsp";
-			idx = <0>;
-			path_type = "DSP_PATH_ISP_RY";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		ry {
-			subdev_name = "ry";
-			idx = <0>;
-			path_type = "ISP_RY_MI_PATH_SP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-	};
-	channel2 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_PP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dsp {
-			subdev_name = "dsp";
-			idx = <0>;
-			path_type = "DSP_PATH_ISP_RY";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		ry {
-			subdev_name = "ry";
-			idx = <0>;
-			path_type = "ISP_RY_MI_PATH_SP2_BP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-	};
-};
-
-&video5{
-	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
-	channel0 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_PP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dsp {
-			subdev_name = "dsp";
-			idx = <0>;
-			path_type = "DSP_PATH_ISP_RY";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		ry {
-			subdev_name = "ry";
-			idx = <0>;
-			path_type = "ISP_RY_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dw {
-			subdev_name = "dw";
-			idx = <0>;
-			path_type = "DW_DWE_VSE0";
-			dw_dst_depth = <2>;
-		};
-	};
-	channel1 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_PP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dsp {
-			subdev_name = "dsp";
-			idx = <0>;
-			path_type = "DSP_PATH_ISP_RY";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		ry {
-			subdev_name = "ry";
-			idx = <0>;
-			path_type = "ISP_RY_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dw {
-			subdev_name = "dw";
-			idx = <0>;
-			path_type = "DW_DWE_VSE1";
-			dw_dst_depth = <2>;
-		};
-	};
-	channel2 {
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <4>; // imx219
-			csi_idx = <0>; //<0>=CSI2
-			mode_idx = <0>;
-			path_type = "SENSOR_1080P_RAW10_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <0xff>; // invalid
-			csi_idx = <0xff>;
-			path_type = "SENSOR_VGA_RAW10_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_ISP1";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_PP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dsp {
-			subdev_name = "dsp";
-			idx = <0>;
-			path_type = "DSP_PATH_ISP_RY";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		ry {
-			subdev_name = "ry";
-			idx = <0>;
-			path_type = "ISP_RY_MI_PATH_MP";
-			output {
-				max_width = <1920>;
-				max_height = <1088>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-		dw {
-			subdev_name = "dw";
-			idx = <0>;
-			path_type = "DW_DWE_VSE2";
-			dw_dst_depth = <2>;
-		};
-	};
-};
-
-#include "th1520-beagle-bone-buses.dtsi"

arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-beagle.dts"

arch/riscv/boot/dts/thead/th1520-lichee-cluster-4a-16g.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-cluster-16gb.dts"

arch/riscv/boot/dts/thead/th1520-lichee-cluster-4a.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-cluster.dts"

arch/riscv/boot/dts/thead/th1520-lichee-pi-4a-16g.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-16gb.dts"

arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts

@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2024 ISCAS.
- */
-
-#include "th1520-lpi4a-product.dts"

arch/riscv/boot/dts/thead/th1520-lpi4a-16gb.dts

@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022 Alibaba Group Holding Limited.
- */
-
-#include "th1520-lpi4a-product.dts"
-
-/ {
-	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board";
-	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x3 0xffe00000>;
-	};
-};
-
-&cmamem {
-	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-cluster-16gb.dts

@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2023 Sipeed.
- */
-
-#include "th1520-lpi4a-16gb.dts"
-
-/ {
-	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board on Cluster";
-};
-
-&audio_i2c0 {
-	status = "disabled";
-};
-
-&audio_i2c1 {
-	status = "disabled";
-};
-
-&lightsound {
-	status = "disabled";
-};
-
-&reg_usb_hub_vdd1v2 {
-	/delete-property/ gpio;
-};
-
-&reg_usb_hub_vcc5v {
-	/delete-property/ gpio;
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-cluster.dts

@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2023 Sipeed.
- */
-
-#include "th1520-lpi4a-product.dts"
-
-/ {
-	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board on Cluster";
-};
-
-&audio_i2c0 {
-	status = "disabled";
-};
-
-&audio_i2c1 {
-	status = "disabled";
-};
-
-&lightsound {
-	status = "disabled";
-};
-
-&reg_usb_hub_vdd1v2 {
-	/delete-property/ gpio;
-};
-
-&reg_usb_hub_vcc5v {
-	/delete-property/ gpio;
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-console-16g.dts

@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022 Alibaba Group Holding Limited.
- */
-
-#include "th1520-lpi4a-console.dts"
-
-/ {
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x3 0xffe00000>;
-	};
-};
-
-&cmamem {
-	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-console.dts

@@ -1,53 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2023 Sipeed.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include "th1520-lpi4a-laptop.dts"
-
-/ {
-        model = "T-HEAD Light Lichee Pi 4A configuration for LicheeConsole4A";
-	compatible = "thead,light", "sipeed,th1520-laptop", "sipeed,console4a";
-};
-
-&dsi0_panel0 {
-	compatible = "mingjun,mj070bi30ia2";
-};
-
-&i2c2 {
-	/* thank ice */
-	trackpoint: trackpad@15 {
-		compatible = "hid-over-i2c";
-		reg = <0x15>;
-		hid-descr-addr = <0x0020>;
-		interrupt-parent = <&gpio1_porta>;
-		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-	};
-};
-
-&cw2015 {
-	cellwise,battery-profile = /bits/ 8 <
-		0x17 0x67 0x72 0x68 0x66 0x63 0x62 0x5A
-		0x64 0x61 0x4D 0x57 0x5A 0x51 0x43 0x38
-		0x31 0x2A 0x24 0x22 0x29 0x31 0x3E 0x4C
-		0x29 0x4D 0x0B 0x85 0x1C 0x38 0x47 0x57
-		0x5D 0x5E 0x5F 0x60 0x3F 0x1A 0x6F 0x41
-		0x0A 0x43 0x12 0x38 0x7B 0x95 0x9A 0x18
-		0x4B 0x6F 0x9E 0xD5 0x80 0x57 0x87 0xCB
-		0x2F 0x00 0x64 0xA5 0xB5 0x13 0x54 0xB9
-	>;
-};
-
-&lcd0_backlight {
-        default-brightness-level = <50>;
-};
-
-&sdhci0 {
-        max-frequency = <35000000>;
-        status = "okay";
-};
-
-&fan {
-        cooling-levels = <255 255 255 255>;
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-dsi0-hdmi.dts

@@ -1,131 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022 Alibaba Group Holding Limited.
- */
-
-#include "th1520-lpi4a.dtsi"
-
-/ {
-	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
-	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x00000000 0x2 0x00000000>;
-	};
-};
-
-&cmamem {
-	alloc-ranges = <0x1 0xe4000000 0 0x14000000>; // [0x1E400_0000 ~ 0x1F800_0000]
-};
-
-&pwm {
-	status = "okay";
-};
-
-&qspi0 {
-	status = "okay";
-};
-
-&qspi1 {
-	status = "okay";
-};
-
-&i2c3 {
-	touch@14 {
-		#gpio-cells = <2>;
-		compatible = "goodix,gt9271";
-		reg = <0x14>;
-		interrupt-parent = <&ao_gpio_porta>;
-		interrupts = <3 0>; 
-		irq-gpios = <&ao_gpio_porta 3 0>; 
-		reset-gpios = <&pcal6408ahk_d 0 0>; 
-		AVDD28-supply = <&reg_tp_pwr_en>;
-		touchscreen-size-x = <800>;
-		touchscreen-size-y = <1280>;
-		tp-size = <9271>;
-		status = "okay";
-	};
-};
-
-&dpu_enc0 {
-       status = "okay";
-
-       ports {
-               /* output */
-               port@1 {
-                       reg = <1>;
-
-                       enc0_out: endpoint {
-                               remote-endpoint = <&dsi0_in>;
-                       };
-               };
-       };
-};
-
-&dpu_enc1 {
-        ports {
-                /delete-node/ port@0;
-        };
-};
-
-&dpu {
-        status = "okay";
-};
-
-&dsi0 {
-        status = "okay";
-};
-
-&dhost_0 {
-       ports {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               port@0 {
-                       reg = <0>;
-
-                       dsi0_in: endpoint {
-                               remote-endpoint = <&enc0_out>;
-                       };
-               };
-
-               port@1 {
-                       reg = <1>;
-
-                       dsi0_out: endpoint {
-                               remote-endpoint = <&panel0_in>;
-                       };
-               };
-       };
-
-       dsi0_panel0: panel0@0 {
-		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
-		reg = <0>;
-		backlight = <&lcd0_backlight>;
-		reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
-		hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;  
-		vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
-
-               port {
-                       panel0_in: endpoint {
-                               remote-endpoint = <&dsi0_out>;
-                       };
-               };
-       };
-};
-
-&disp1_out {
-	remote-endpoint = <&hdmi_tx_in>;
-};
-
-&hdmi_tx {
-	status = "okay";
-
-	port@0 {
-		/* input */
-		hdmi_tx_in: endpoint {
-			remote-endpoint = <&disp1_out>;
-		};
-	};
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-laptop.dts

@@ -1,330 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2023 Sipeed.
- */
-
-#include "th1520-lpi4a-dsi0-hdmi.dts"
-
-/ {
-	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board use on laptop";
-	compatible = "thead,light", "sipeed,th1520-laptop";
-
-	reg_sys_vcc_5v: regulator-sys-vcc-5v-en {
-		status = "okay";
-		compatible = "regulator-fixed";
-		regulator-name = "regulator-sys-vcc-5v-en";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&pcal6408ahk_c 0 1>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-
-		// suspend for lichee laptop is not ready so dont turn it off
-		/*
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-		regulator-state-standby {
-			regulator-off-in-suspend;
-		};
-		*/
-	};
-
-	reg_sys_vcc_3v3: regulator-sys-vcc-3v3-en {
-		status = "okay";
-		compatible = "regulator-fixed";
-		regulator-name = "regulator-sys-vcc-3v3-en";
-		vin-supply = <&reg_sys_vcc_5v>;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	reg_sys_vcc_1v8: regulator-sys-vcc-1v8-en {
-		status = "okay";
-		compatible = "regulator-fixed";
-		regulator-name = "regulator-sys-vcc-1v8-en";
-		vin-supply = <&reg_sys_vcc_5v>;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	reg_usb_vcc_5v: regulator-usb-vcc-5v-en {
-		status = "okay";
-		compatible = "regulator-fixed";
-		regulator-name = "regulator-usb-vcc-5v-en";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&reg_sys_vcc_5v>;
-		gpio = <&pcal6408ahk_d 3 1>;
-		enable-active-high;
-		regulator-always-on;
-        };
-
-	reg_sata_vcc_5v: regulator-sata-vcc-5v-en {
-		status = "okay";
-		compatible = "regulator-fixed";
-		regulator-name = "regulator-sata-vcc-5v-en";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&reg_sys_vcc_5v>;
-		gpio = <&pcal6408ahk_c 1 1>;
-		enable-active-high;
-		regulator-always-on;
-	};
-
-	audio_amp: regulator-audio-amp-en {
-                status = "okay";
-                compatible = "regulator-fixed";
-                regulator-name = "regulator-audio-amp-en";
-                vin-supply = <&reg_sys_vcc_5v>;
-		gpio = <&pcal6408ahk_c 3 1>;
-		enable-active-high;
-		regulator-always-on;
-	};
-
-	aon: aon {
-		soc_dvdd12_rgb {
-			/delete-property/ gpio;
-		};
-		soc_avdd25_ir {
-			/delete-property/ gpio;
-		};
-		soc_dovdd18_ir {
-			/delete-property/ gpio;
-		};
-		soc_dvdd12_ir {
-			/delete-property/ gpio;
-		};
-		soc_cam2_avdd25_ir {
-			/delete-property/ gpio;
-		};
-		soc_cam2_dovdd18_ir {
-			/delete-property/ gpio;
-		};
-		soc_avdd28_rgb {
-			/delete-property/ gpio;
-		};
-		soc_dovdd18_rgb {
-			/delete-property/ gpio;
-		};
-	};
-
-	charger: dc-charger {
-		compatible = "gpio-charger";
-		charger-type = "mains";
-		gpios = <&gpio0_porta 16 GPIO_ACTIVE_HIGH>;
-	};
-};
-
-&es8156_audio_codec {
-	AVDD-supply = <&reg_sys_vcc_3v3>;
-	DVDD-supply = <&reg_sys_vcc_1v8>;
-	PVDD-supply = <&reg_sys_vcc_1v8>;
-};
-
-&es7210_audio_codec {
-	MVDD-supply = <&reg_sys_vcc_3v3>;
-	AVDD-supply = <&reg_sys_vcc_3v3>;
-	DVDD-supply = <&reg_sys_vcc_1v8>;
-	PVDD-supply = <&reg_sys_vcc_1v8>;
-};
-
-&wcn_wifi {
-	// WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
-	/delete-property/ WIFI,poweren_gpio;
-};
-
-
-&wcn_bt {
-	// BT,power_gpio = <&pcal6408ahk_c 5 0>;
-	/delete-property/ BT,power_gpio;
-};
-
-&usb_1 {
-        /delete-property/ vbus-supply;
-        /delete-property/ hub1v2-supply;
-        hub5v-supply = <&reg_usb_vcc_5v>;
-};
-
-&reg_usb_hub_vcc5v {
-	/delete-property/ gpio;
-};
-
-&soc_cam2_dvdd12_ir_reg {
-	/delete-property/ gpio;
-};
-
-&vvcam_sensor0 {
-	/delete-property/ sensor_rst;
-};
-
-&vvcam_sensor1 {
-	/delete-property/ sensor_rst;
-};
-
-&vvcam_sensor2 {
-	/delete-property/ sensor_rst;
-};
-
-&vvcam_sensor3 {
-	/delete-property/ sensor_rst;
-};
-
-&reg_tp_pwr_en {
-	/delete-property/ gpio;
-};
-
-&i2c0 {
-	/delete-node/ gpio@18;
-
-	cw2015: cw2015@62 {
-		compatible = "cellwise,cw2015";
-		reg = <0x62>;
-		cellwise,monitor-interval-ms = <5000>;
-		power-supplies = <&charger>;
-	};
-};
-
-&i2c3 {
-	touch@14 {
-		#gpio-cells = <2>;
-		compatible = "goodix,gt9271";
-		reg = <0x14>;
-		interrupt-parent = <&ao_gpio_porta>;
-		interrupts = <3 0>;
-		irq-gpios = <&ao_gpio_porta 3 0>;
-		reset-gpios = <&pcal6408ahk_d 0 0>;
-		// read xmax & ymax from touch screen chip, thank ice
-		//touchscreen-size-x = <1024>;
-		//touchscreen-size-y = <600>;
-		//tp-size = <9271>;
-		/delete-property/ touchscreen-size-x;
-		/delete-property/ touchscreen-size-y;
-		/delete-property/ tp-size;
-		status = "okay";
-	};
-
-	lt8911: lt8911@29 {
-		compatible = "lontium,lt8911exb";
-		reg = <0x29>;
-		lontium,pclk = <136000000>;
-		lontium,hact = <2160>;
-		lontium,vact = <1440>;
-		lontium,hbp = <80>;
-		lontium,hfp = <48>;
-		lontium,vbp = <14>;
-		lontium,vfp = <3>;
-		lontium,hs = <32>;
-		lontium,vs = <10>;
-		lontium,mipi_lane = <2>;
-		lontium,lane_cnt = <2>;
-		lontium,color = <1>; //Color Depth 0:6bit 1:8bit
-		lontium,test = <0>;
-	};
-};
-
-&uart3 {
-	clock-frequency = <100000000>;
-	pinctrl-0 = <&pinctrl_uart3_tx_is_gpio>;
-	status = "okay";
-};
-
-&spi0 {
-	status = "disabled";
-};
-
-&qspi0 {
-	status = "disabled";
-};
-
-&qspi1 {
-	status = "disabled";
-};
-
-&dsi0_panel0 {
-	backlight = <&lcd0_backlight>;
-	reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
-	hsvcc-supply = <&reg_sys_vcc_1v8>;
-	vspn3v3-supply = <&reg_sys_vcc_3v3>;
-};
-
-&lcd0_backlight {
-	pwms = <&pwm 0 50000>;
-	brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
-        36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
-        76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
-	default-brightness-level = <100>;
-};
-
-&fan {
-	pwms = <&pwm 1 10000000 0>;
-	cooling-levels = <0 64 192 255>;
-};
-
-&cpus {
-        c910_0: cpu@0 {
-                operating-points = <
-                        /* kHz    uV */
-                        300000  500000
-                        800000  700000
-                        1500000 800000
-                >;
-                light,dvddm-operating-points = <
-                        /* kHz   uV */
-                        300000  800000
-                        800000  800000
-                        1500000 800000
-                >;
-        };
-        c910_1: cpu@1 {
-                operating-points = <
-                        /* kHz    uV */
-                        300000  500000
-                        800000  700000
-                        1500000 800000
-                >;
-                light,dvddm-operating-points = <
-                        /* kHz   uV */
-                        300000  800000
-                        800000  800000
-                        1500000 800000
-                >;
-        };
-        c910_2: cpu@2 {
-
-                operating-points = <
-                        /* kHz    uV */
-                        300000  500000
-                        800000  700000
-                        1500000 800000
-                >;
-                light,dvddm-operating-points = <
-                        /* kHz   uV */
-                        300000  800000
-                        800000  800000
-                        1500000 800000
-                >;
-        };
-        c910_3: cpu@3 {
-
-                operating-points = <
-                        /* kHz    uV */
-                        300000  500000
-                        800000  700000
-                        1500000 800000
-                >;
-                light,dvddm-operating-points = <
-                        /* kHz   uV */
-                        300000  800000
-                        800000  800000
-                        1500000 800000
-                >;
-        };
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-z14inch-m0-16g.dts

@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022 Alibaba Group Holding Limited.
- */
-
-#include "th1520-lpi4a-z14inch-m0.dts"
-
-/ {
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x3 0xffe00000>;
-	};
-};
-
-&cmamem {
-	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
-};

arch/riscv/boot/dts/thead/th1520-lpi4a-z14inch-m0.dts

@@ -1,66 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2023 Sipeed.
- */
-
-#include "th1520-lpi4a-laptop.dts"
-
-/ {
-        model = "T-HEAD Light Lichee Pi 4A configuration for Z14INCH-M0";
-};
-
-&dsi0_panel0 {
-	compatible = "custom,z14inch_2160x1440_40Hz";
-	/* display-timings in devicetree is it not working, but I haven't time to fix it, so move it into simple-panel.c */
-	/*
-	display-timings {
-		clock-frequency = <136000000>;
-		hactive = <2160>;
-		vactive = <1440>;
-		hfront-porch = <48>;
-		hback-porch = <80>;
-		hsync-len = <32>;
-		vback-porch = <14>;
-		vfront-porch = <3>;
-		vsync-len = <10>;
-	};
-	*/
-};
-
-&cw2015 {
-	cellwise,battery-profile = /bits/ 8 <
-		0x17 0x67 0x72 0x68 0x66 0x63 0x62 0x5A
-		0x64 0x61 0x4D 0x57 0x5A 0x51 0x43 0x38
-		0x31 0x2A 0x24 0x22 0x29 0x31 0x3E 0x4C
-		0x29 0x4D 0x0B 0x85 0x1C 0x38 0x47 0x57
-		0x5D 0x5E 0x5F 0x60 0x3F 0x1A 0x6F 0x41
-		0x0A 0x43 0x12 0x38 0x7B 0x95 0x9A 0x18
-		0x4B 0x6F 0x9E 0xD5 0x80 0x57 0x87 0xCB
-		0x2F 0x00 0x64 0xA5 0xB5 0x13 0x54 0xB9
-	>;
-};
-
-&lt8911 {
-	lontium,pclk = <136000000>;
-	lontium,hact = <2160>;
-	lontium,vact = <1440>;
-	lontium,hbp = <80>;
-	lontium,hfp = <48>;
-	lontium,vbp = <14>;
-	lontium,vfp = <3>;
-	lontium,hs = <32>;
-	lontium,vs = <10>;
-	lontium,mipi_lane = <2>;
-	lontium,lane_cnt = <2>;
-	lontium,color = <1>; //Color Depth 0:6bit 1:8bit
-	lontium,test = <0>;
-};
-
-&fan {
-        pwms = <&pwm 1 10000000 0>;
-        cooling-levels = <0 192 220 255>;
-};
-
-&lcd0_backlight {
-        default-brightness-level = <40>;
-};

arch/riscv/boot/dts/thead/th1520-lpi4a.dtsi

@@ -247,7 +247,7 @@
 		regulator-max-microvolt = <1200000>;
 		gpio = <&pcal6408ahk_d 2 1>;
 		enable-active-high;
-
+		regulator-always-on;
 	};
 
 	reg_usb_hub_vcc5v: regulator-hub-vcc5v-en {
@@ -257,7 +257,7 @@
 		regulator-max-microvolt = <5000000>;
 		gpio = <&pcal6408ahk_d 3 1>;
 		enable-active-high;
-
+		regulator-always-on;
 	};
 
 	wcn_wifi: wireless-wlan {
@@ -268,7 +268,7 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_wifi_wake>;
 		wifi_chip_type = "rtl8723ds";
-		// WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
+		WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
 		status = "okay";
 	};
 
@@ -276,13 +276,13 @@
 		compatible = "bluetooth-platdata";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_bt_wake>;
-		// BT,power_gpio    = <&pcal6408ahk_c 5 0>;
+		BT,power_gpio    = <&pcal6408ahk_c 5 0>;
 		status = "okay";
 	};
 
 	gpio-keys {
 		compatible = "gpio-keys";
-		pinctrl-0 = <&pinctrl_volume &pinctrl_sleep>;
+		pinctrl-0 = <&pinctrl_volume>;
 		pinctrl-names = "default";
 		key-volumedown {
 			label = "Volume Down Key";
@@ -296,13 +296,6 @@
 			debounce-interval = <1>;
 			gpios = <&gpio2_porta 25 0x1>;
 		};
-		key-wake {
-			label = "Wake Key";
-			wakeup-source;
-			linux,code = <KEY_WAKEUP>;
-			debounce-interval = <1>;
-			gpios = <&ao_gpio_porta 2 0x1>;
-		};
 	};
 
 	aon: aon {
@@ -389,7 +382,7 @@
 			regulator-max-microvolt = <3300000>;
 			gpio = <&gpio1_porta 22 1>;
 			enable-active-high;
-		
+			regulator-always-on;
 		};
 
 
@@ -908,7 +901,7 @@
 };
 
 &sdhci0 {
-	max-frequency = <100000000>;
+	max-frequency = <198000000>;
 	bus-width = <4>;
 	pull_up;
 	wprtn_ignore;
@@ -1105,16 +1098,6 @@
 				>;
 			};
 
-
-			pinctrl_uart3_tx_is_gpio: uart3txisgpiogrp {
-				thead,pins = <
-					FM_UART3_TXD	0x3	0x202
-					FM_UART3_RXD	0x1	0x202
-				>;
-			};
-
-
-
 			pinctrl_wifi_wake: wifi_grp {
 				thead,pins = <
 					FM_GPIO0_27	0x0	0x202
@@ -1199,11 +1182,6 @@
 			pinctrl_audiopa30: audiopa30 {
 				thead,pins = < FM_AUDIO_PA30 LIGHT_PIN_FUNC_0 0x000 >;
 			};
-            pinctrl_sleep: sleep_grp {
-				thead,pins = <
-                    FM_CPU_JTG_TCLK 0x3   0x238
-				>;
-			};
 
 	};
 };
@@ -1255,7 +1233,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c0>;
 
-	pcal6408ahk_b: gpio@18 {
+	pcal6408ahk_b: gpio@20 {
 		compatible = "nxp,pca9557";
 		reg = <0x18>;
 		gpio-controller;
@@ -1269,7 +1247,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c1>;
 
-	pcal6408ahk_c: gpio@18 {
+	pcal6408ahk_c: gpio@20 {
 		compatible = "nxp,pca9557";
 		reg = <0x18>;
 		gpio-controller;
@@ -1290,7 +1268,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c3>;
 
-	pcal6408ahk_d: gpio@18 {
+	pcal6408ahk_d: gpio@20 {
 		compatible = "nxp,pca9557";
 		reg = <0x18>;
 		gpio-controller;

arch/riscv/boot/dts/thead/th1520-milkv-meles-4g.dts

@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022 Alibaba Group Holding Limited.
- */
-
-#include "th1520-milkv-meles.dts"
-
-/ {
-	model = "Milk-V Meles 4G";
-	compatible = "milkv,meles", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x0 0xffe00000>;
-	};
-};

arch/riscv/boot/dts/thead/th1520-milkv-meles-dsi0.dts

@@ -1,133 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
- */
-
-/dts-v1/;
-
-#include "th1520-milkv-meles.dts"
-
-/ {
-	model = "Milk-V Meles";
-	compatible = "milkv,meles", "thead,light";
-
-	lcd0_backlight: pwm-backlight@0 {
-		status = "okay";
-		compatible = "pwm-backlight";
-		pwms = <&pwm 5 25000>;
-		brightness-levels = <0 4 8 16 32 64 128 255>;
-		default-brightness-level = <7>;
-	};
-
-	vcc_lcd_mipi0: vcc-lcd-mipi0 {
-		status = "okay";
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_lcd_mipi0";
-		gpio = <&gpio1_porta 25 0>;
-		enable-active-high;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-};
-
-&i2c0 {
-	clock-frequency = <100000>;
-	status = "okay";
-
-	touch@14 {
-		#gpio-cells = <2>;
-		compatible = "goodix,gt9271";
-		reg = <0x14>;
-		interrupt-parent = <&gpio2_porta>;
-		interrupts = <20 0>;
-		irq-gpios = <&gpio2_porta 20 0>;
-		reset-gpios = <&gpio2_porta 18 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_touch_gpios>;
-	};
-};
-
-&padctrl0_apsys {
-	light-evb-padctrl0 {
-		pinctrl_dsi0_panel_gpio: dsi0-panel-gpio-group {
-			thead,pins = <
-				FM_GPIO2_21	0x0	0x238
-			>;
-		};
-
-		pinctrl_touch_gpios: touch-gpios-group {
-			thead,pins = <
-				FM_GPIO2_18	0x0	0x238
-				FM_GPIO2_20	0x0	0x208
-			>;
-		};
-	};
-};
-
-&pwm {
-	status = "okay";
-};
-
-&dpu_enc0 {
-	status = "okay";
-
-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc0_out: endpoint {
-				remote-endpoint = <&dsi0_in>;
-			};
-		};
-	};
-};
-
-/delete-node/ &disp1_out;
-
-/delete-node/ &hdmi_tx;
-
-&dsi0 {
-        status = "okay";
-};
-
-&dhost_0 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi0_in: endpoint {
-				remote-endpoint = <&enc0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi0_out: endpoint {
-				remote-endpoint = <&panel_in>;
-			};
-		};
-	};
-
-	panel@0 {
-		compatible = "radxa,display-10fhd-ad003";
-		reg = <0>;
-		backlight = <&lcd0_backlight>;
-		vdd-supply = <&vcc_lcd_mipi0>;
-		vccio-supply = <&vdd_1v8>;
-		reset-gpios = <&gpio2_porta 21 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_dsi0_panel_gpio>;
-
-		port {
-			panel_in: endpoint {
-				remote-endpoint = <&dsi0_out>;
-			};
-		};
-	};
-};

arch/riscv/boot/dts/thead/th1520-milkv-meles.dts

@@ -1,906 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
- */
-
-/dts-v1/;
-
-#include "th1520.dtsi"
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
-	model = "Milk-V Meles";
-	compatible = "milkv,meles", "thead,light";
-
-	aliases {
-		mmc0 = &emmc;
-		mmc1 = &sdhci0;
-		mmc2 = &sdhci1;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
-		stdout-path = "serial0:115200n8";
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x1 0xffe00000>;
-	};
-
-	display_subsystem: display-subsystem {
-		status = "okay";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led0 {
-			label = "SYS_STATUS";
-			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
-			default-state = "off";
-		};
-
-		led1 {
-			label = "USER_LED";
-			gpios = <&gpio1_porta 16 0>;	/* GPIO_ACTIVE_HIGH: 0 */
-			linux,default-trigger = "heartbeat";
-			default-state = "on";
-		};
-	};
-
-	light_iopmp: iopmp {
-		compatible = "thead,light-iopmp";
-
-		/* config#1: multiple valid regions */
-		iopmp_emmc: IOPMP_EMMC {
-			regions = <0x000000 0x100000>,
-				  <0x100000 0x200000>;
-			attr = <0xFFFFFFFF>;
-			dummy_slave= <0x800000>;
-		};
-
-		/* config#2: iopmp bypass */
-		iopmp_sdio0: IOPMP_SDIO0 {
-			bypass_en;
-		};
-
-		/* config#3: iopmp default region set */
-		iopmp_sdio1: IOPMP_SDIO1 {
-			attr = <0xFFFFFFFF>;
-			is_default_region;
-		};
-
-		iopmp_usb0: IOPMP_USB0 {
-			attr = <0xFFFFFFFF>;
-			is_default_region;
-		};
-
-		iopmp_ao: IOPMP_AO {
-			is_default_region;
-		};
-
-		iopmp_aud: IOPMP_AUD {
-			is_default_region;
-		};
-
-		iopmp_chip_dbg: IOPMP_CHIP_DBG {
-			is_default_region;
-		};
-
-		iopmp_eip120i: IOPMP_EIP120I {
-			is_default_region;
-		};
-
-		iopmp_eip120ii: IOPMP_EIP120II {
-			is_default_region;
-		};
-
-		iopmp_eip120iii: IOPMP_EIP120III {
-			is_default_region;
-		};
-
-		iopmp_isp0: IOPMP_ISP0 {
-			is_default_region;
-		};
-
-		iopmp_isp1: IOPMP_ISP1 {
-			is_default_region;
-		};
-
-		iopmp_dw200: IOPMP_DW200 {
-			is_default_region;
-		};
-
-		iopmp_vipre: IOPMP_VIPRE {
-			is_default_region;
-		};
-
-		iopmp_venc: IOPMP_VENC {
-			is_default_region;
-		};
-
-		iopmp_vdec: IOPMP_VDEC {
-			is_default_region;
-		};
-
-		iopmp_g2d: IOPMP_G2D {
-			is_default_region;
-		};
-
-		iopmp_fce: IOPMP_FCE {
-			is_default_region;
-		};
-
-		iopmp_npu: IOPMP_NPU {
-			is_default_region;
-		};
-
-		iopmp0_dpu: IOPMP0_DPU {
-			bypass_en;
-		};
-
-		iopmp1_dpu: IOPMP1_DPU {
-			bypass_en;
-		};
-
-		iopmp_gpu: IOPMP_GPU {
-			is_default_region;
-		};
-
-		iopmp_gmac1: IOPMP_GMAC1 {
-			is_default_region;
-		};
-
-		iopmp_gmac2: IOPMP_GMAC2 {
-			is_default_region;
-		};
-
-		iopmp_dmac: IOPMP_DMAC {
-			is_default_region;
-		};
-
-		iopmp_tee_dmac: IOPMP_TEE_DMAC {
-			is_default_region;
-		};
-
-		iopmp_dsp0: IOPMP_DSP0 {
-			is_default_region;
-		};
-
-		iopmp_dsp1: IOPMP_DSP1 {
-			is_default_region;
-		};
-	};
-
-	mbox_910t_client1: mbox_910t_client1 {
-		compatible = "thead,light-mbox-client";
-		mbox-names = "902";
-		mboxes = <&mbox_910t 1 0>;
-		status = "disabled";
-	};
-
-	mbox_910t_client2: mbox_910t_client2 {
-		compatible = "thead,light-mbox-client";
-		mbox-names = "906";
-		mboxes = <&mbox_910t 2 0>;
-		status = "disabled";
-	};
-
-	lightsound: lightsound@1 {
-		status = "okay";
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "Light-Sound-Card";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		/* I2S - AUDIO SYS CODEC 8156*/
-		simple-audio-card,dai-link@0 {
-			reg = <0>;
-			format = "i2s";
-			cpu {
-				sound-dai = <&i2s1 0>;
-			};
-			codec {
-				sound-dai = <&es8156_audio_codec>;
-			};
-		};
-
-		/* I2S - HDMI */
-		simple-audio-card,dai-link@1 {
-			reg = <1>;
-			format = "i2s";
-			cpu {
-				sound-dai = <&light_i2s 1>;
-			};
-			codec {
-				sound-dai = <&dummy_codec>;
-			};
-		};
-	};
-
-	wifi_pwrseq: wifi-pwrseq {
-		status = "okay";
-		compatible = "mmc-pwrseq-simple";
-		reset-gpios = <&gpio0_porta 20 1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_wireless_power>;
-	};
-
-	dummy_codec: dummy_codec {
-		#sound-dai-cells = <0>;
-		compatible = "thead,light-dummy-pcm";
-		status = "okay";
-		sound-name-prefix = "DUMMY";
-	};
-
-	vdd_5v: regulator-vdd-5v {
-		compatible = "regulator-fixed";
-		regulator-name = "vdd_5v";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-boot-on;
-		regulator-always-on;
-		status = "okay";
-	};
-
-	vdd_1v8: regulator-vdd-1v8 {
-		compatible = "regulator-fixed";
-		regulator-name = "vdd_1v8";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		regulator-boot-on;
-		regulator-always-on;
-		vin-supply = <&vdd_5v>;
-		status = "okay";
-	};
-
-	reg_vref_1v8: regulator-adc-verf {
-		compatible = "regulator-fixed";
-		regulator-name = "vref-1v8";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		status = "okay";
-	};
-
-	usb_vbus_en: regulator-usb-vbus-en {
-		compatible = "regulator-fixed";
-		regulator-name = "usb_vbus_en";
-		gpio = <&gpio0_porta 27 0>;	/* GPIO_ACTIVE_HIGH: 0 */
-		enable-active-high;
-		regulator-boot-on;
-		regulator-always-on;
-		status = "okay";
-	};
-
-	/* Select USB3.0 Type-A port */
-	usb_select: regulator-usb-select {
-		compatible = "regulator-fixed";
-		regulator-name = "usb_select";
-		gpio = <&gpio2_porta 30 1>;	/* GPIO_ACTIVE_LOW: 1 */
-		regulator-boot-on;
-		regulator-always-on;
-		status = "okay";
-	};
-
-	board_antenna: board-antenna {
-		status = "okay";
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio1_porta 24 0>;
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-name = "board_antenna";
-	};
-
-	aon {
-		compatible = "thead,light-aon";
-		mbox-names = "aon";
-		mboxes = <&mbox_910t 1 0>;
-		status = "okay";
-
-		pd: light-aon-pd {
-			compatible = "thead,light-aon-pd";
-			#power-domain-cells = <1>;
-		};
-
-		aon_reg_dialog: light-dialog-reg {
-			compatible = "thead,light-dialog-pmic-ant";
-			status = "okay";
-
-			dvdd_cpu_reg: appcpu_dvdd {
-				regulator-name = "appcpu_dvdd";
-				regulator-min-microvolt = <300000>;
-				regulator-max-microvolt = <1570000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			dvddm_cpu_reg: appcpu_dvddm {
-				regulator-name = "appcpu_dvddm";
-				regulator-min-microvolt = <300000>;
-				regulator-max-microvolt = <1570000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_dvdd18_aon_reg: soc_dvdd18_aon {
-				regulator-name = "soc_dvdd18_aon";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
-				regulator-name = "soc_avdd33_usb3";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_dvdd08_aon_reg: soc_dvdd08_aon {
-				regulator-name = "soc_dvdd08_aon";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
-				regulator-name = "soc_dvdd08_ddr";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
-				regulator-name = "soc_vdd_ddr_1v8";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
-				regulator-name = "soc_vdd_ddr_1v1";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
-				regulator-name = "soc_vdd_ddr_0v6";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_dvdd18_ap_reg: soc_dvdd18_ap {
-				regulator-name = "soc_dvdd18_ap";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
-				regulator-name = "soc_avdd08_mipi_hdmi";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
-				regulator-name = "soc_avdd18_mipi_hdmi";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_vdd33_emmc_reg: soc_vdd33_emmc {
-				regulator-name = "soc_vdd33_emmc";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_vdd18_emmc_reg: soc_vdd18_emmc {
-				regulator-name = "soc_vdd18_emmc";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_dovdd18_scan_reg: soc_dovdd18_scan {
-				regulator-name = "soc_dovdd18_scan";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			soc_dvdd12_scan_reg: soc_dvdd12_scan {
-				regulator-name = "soc_dvdd12_scan";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <3600000>;
-			};
-
-			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
-				regulator-name = "soc_avdd28_scan_en";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <3600000>;
-			};
-		};
-
-		c910_cpufreq {
-			compatible = "thead,light-mpw-cpufreq";
-			status = "okay";
-		};
-
-		test: light-aon-test {
-			compatible = "thead,light-aon-test";
-		};
-	};
-};
-
-&cmamem {
-	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
-};
-
-&resmem {
-	#address-cells = <2>;
-	#size-cells = <2>;
-	ranges;
-
-	tee_mem: memory@1a000000 {
-		reg = <0x0 0x1a000000 0 0x4000000>;
-		no-map;
-	};
-	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
-		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
-		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
-		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
-		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
-		no-map;
-	};
-	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
-		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
-		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
-		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
-		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
-		no-map;
-	};
-	vi_mem: framebuffer@0f800000 {
-		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
-		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
-		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
-		no-map;
-	};
-	facelib_mem: memory@22000000 {
-		reg = <0x0 0x22000000 0x0 0x10000000>;
-		no-map;
-	};
-};
-
-&adc {
-	vref-supply = <&reg_vref_1v8>;
-	status = "okay";
-};
-
-&i2c0 {
-	clock-frequency = <400000>;
-	status = "disabled";
-};
-
-&i2c1 {
-	clock-frequency = <400000>;
-	status = "disabled";
-};
-
-&audio_i2c0 {
-	clock-frequency = <100000>;
-	status = "okay";
-
-	es8156_audio_codec: es8156@9 {
-		#sound-dai-cells = <0>;
-		compatible = "everest,es8156";
-		reg = <0x09>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_audio_i2s1_mclk>;
-	};
-};
-
-&uart0 {
-	clock-frequency = <100000000>;
-};
-
-&gmac0 {
-	phy-mode = "rgmii-id";
-	rx-clk-delay = <0x00>; /* for RGMII */
-	tx-clk-delay = <0x00>; /* for RGMII */
-	phy-handle = <&phy_88E1111_0>;
-	status = "okay";
-
-	mdio0 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "snps,dwmac-mdio";
-
-		phy_88E1111_0: ethernet-phy@0 {
-			reg = <0x1>;
-		};
-	};
-};
-
-&gmac1 {
-	status = "disabled";
-};
-
-&emmc {
-	max-frequency = <198000000>;
-	non-removable;
-	mmc-hs400-1_8v;
-	io_fixed_1v8;
-	is_emmc;
-	no-sdio;
-	no-sd;
-	pull_up;
-	bus-width = <8>;
-	status = "okay";
-};
-
-&sdhci0 {
-	max-frequency = <198000000>;
-	bus-width = <4>;
-	pull_up;
-	wprtn_ignore;
-	status = "okay";
-};
-
-&sdhci1 {
-	status = "okay";
-	max-frequency = <198000000>;
-	bus-width = <4>;
-	pull_up;
-	no-sd;
-	no-mmc;
-	non-removable;
-	io_fixed_1v8;
-	post-power-on-delay-ms = <50>;
-	wprtn_ignore;
-	cap-sd-highspeed;
-	keep-power-in-suspend;
-	mmc-pwrseq = <&wifi_pwrseq>;
-	#address-cells = <1>;
-	#size-cells = <0>;
-
-	brcmf: wifi@1 {
-		compatible = "brcm,bcm4329-fmac";
-		reg = <1>;
-	};
-};
-
-&padctrl0_apsys { /* right-pinctrl */
-	light-evb-padctrl0 {
-		/*
-		 * Pin Configuration Node:
-		 * Format: <pin_id mux_node config>
-		 */
-		pinctrl_uart0: uart0grp {
-			thead,pins = <
-				FM_UART0_TXD	0x0	0x72
-				FM_UART0_RXD	0x0	0x72
-			>;
-		};
-
-		pinctrl_spi0: spi0grp {
-			thead,pins = <
-				FM_SPI_CSN	0x3	0x20a
-				FM_SPI_SCLK	0x0	0x20a
-				FM_SPI_MISO	0x0	0x23a
-				FM_SPI_MOSI	0x0	0x23a
-			>;
-		};
-
-		pinctrl_qspi0: qspi0grp {
-			thead,pins = <
-				FM_QSPI0_SCLK	0x0	0x20f
-				FM_QSPI0_CSN0	0x3	0x20f
-				FM_QSPI0_D0_MOSI	0x0	0x23f
-				FM_QSPI0_D1_MISO	0x0	0x23f
-			>;
-		};
-
-		pinctrl_pwm: pwmgrp {
-			thead,pins = <
-				FM_QSPI0_D2_WP  0x1     0x208   /* pwm5 */
-				FM_QSPI0_CSN1   0x1     0x208   /* pwm2 */
-			>;
-		};
-	};
-};
-
-&padctrl1_apsys { /* left-pinctrl */
-	light-evb-padctrl1 {
-		/*
-		 * Pin Configuration Node:
-		 * Format: <pin_id mux_node config>
-		 */
-		pinctrl_uart3: uart3grp {
-			thead,pins = <
-				FM_UART3_TXD	0x0	0x72
-				FM_UART3_RXD	0x0	0x72
-			>;
-		};
-
-		pinctrl_uart4: uart4grp {
-			thead,pins = <
-				FM_UART4_TXD	0x0	0x72
-				FM_UART4_RXD	0x0	0x72
-				FM_UART4_CTSN	0x0	0x72
-				FM_UART4_RTSN	0x0	0x72
-			>;
-		};
-
-		pinctrl_qspi1: qspi1grp {
-			thead,pins = <
-				FM_QSPI1_SCLK	0x0	0x20a
-				FM_QSPI1_CSN0	0x3	0x20a
-				FM_QSPI1_D0_MOSI	0x0	0x23a
-				FM_QSPI1_D1_MISO	0x0	0x23a
-				FM_QSPI1_D2_WP	0x0	0x23a
-				FM_QSPI1_D3_HOLD	0x0	0x23a
-			>;
-		};
-
-		pinctrl_iso7816: iso7816grp {
-			thead,pins = <
-				FM_QSPI1_SCLK	0x1	0x208
-				FM_QSPI1_D0_MOSI	0x1	0x238
-				FM_QSPI1_D1_MISO	0x1	0x238
-				FM_QSPI1_D2_WP	0x1	0x238
-				FM_QSPI1_D3_HOLD	0x1	0x238
-			>;
-		};
-
-		pinctrl_wireless_power: wireless-power-group {
-			thead,pins = <
-				FM_GPIO0_20	0x0	0x23a
-			>;
-		};
-
-		pinctrl_wireless_host_wake: wireless-host-wake-group {
-			thead,pins = <
-				FM_GPIO0_21	0x0	0x21a
-			>;
-		};
-	};
-};
-
-&padctrl_aosys {
-	light-aon-padctrl {
-		/*
-		 * Pin Configuration Node:
-		 * Format: <pin_id mux_node config>
-		 */
-
-		pinctrl_audiopa1: audiopa1_grp {
-			thead,pins = <
-				FM_AUDIO_PA1	0x3	0x72
-			>;
-		};
-
-		pinctrl_audiopa2: audiopa2_grp {
-			thead,pins = <
-				FM_AUDIO_PA2	0x0	0x72
-			>;
-		};
-
-		pinctrl_volume: volume_grp {
-			thead,pins = <
-				FM_CPU_JTG_TDI	0x3	0x208
-				FM_CPU_JTG_TDO	0x3	0x208
-			>;
-		};
-	};
-};
-
-&padctrl_audiosys {
-	status = "okay";
-
-	light-audio-padctrl {
-		/*
-		 * Pin Configuration Node:
-		 * Format: <pin_id mux_node config>
-		 */
-
-		pinctrl_audio_i2s1_mclk: audio_i2s1_mclk_grp {
-			thead,pins = <
-				FM_AUDIO_IO_PA13	0x0	0x20a
-			>;
-		};
-	};
-};
-
-&xtensa_dsp {
-	status = "okay";
-};
-
-&xtensa_dsp0 {
-	status = "okay";
-	memory-region = <&dsp0_mem>;
-};
-
-&xtensa_dsp1{
-	status = "okay";
-	memory-region = <&dsp1_mem>;
-};
-
-&trng {
-	status = "disabled";
-};
-
-&eip_28 {
-	status = "okay";
-};
-
-&vdec {
-	status = "okay";
-};
-
-&venc {
-	status = "okay";
-};
-
-&isp_venc_shake {
-	status = "okay";
-};
-
-&vidmem {
-	status = "okay";
-	memory-region = <&vi_mem>;
-};
-
-&gpu {
-	status = "okay";
-};
-
-&npu {
-	vha_clk_rate = <1000000000>;
-	status = "okay";
-};
-
-&fce {
-	memory-region = <&facelib_mem>;
-	status = "okay";
-};
-
-&cpus {
-	c910_0: cpu@0 {
-		operating-points = <
-			/* kHz    uV */
-			300000	650000
-			800000	700000
-			1500000	800000
-			1848000	1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000	1000000
-		>;
-	};
-
-	c910_1: cpu@1 {
-		operating-points = <
-			/* kHz    uV */
-			300000	650000
-			800000	700000
-			1500000	800000
-			1848000	1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000	1000000
-		>;
-	};
-
-	c910_2: cpu@2 {
-		operating-points = <
-			/* kHz    uV */
-			300000	650000
-			800000	700000
-			1500000	800000
-			1848000	1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000	1000000
-		>;
-	};
-
-	c910_3: cpu@3 {
-		operating-points = <
-			/* kHz    uV */
-			300000	650000
-			800000	700000
-			1500000	800000
-			1848000	1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000	1000000
-		>;
-	};
-};
-
-&dpu {
-	status = "okay";
-};
-
-/* DP1 --- HDMI0 */
-&dpu_enc1 {
-	status = "disabled";
-	ports {
-		/delete-node/ port@0;
-	};
-};
-
-&disp1_out {
-	remote-endpoint = <&hdmi_tx_in>;
-};
-
-&hdmi_tx {
-	status = "okay";
-
-	port@0 {
-		/* input */
-		hdmi_tx_in: endpoint {
-			remote-endpoint = <&disp1_out>;
-		};
-	};
-};
-
-&light_i2s {
-	status = "okay";
-	/delete-property/ pinctrl-names;
-	/delete-property/ pinctrl-0;
-};
-
-&i2s0 {
-	status = "okay";
-};
-
-&i2s1 {
-	status = "okay";
-};
-
-&qspi0 {
-	status = "okay";
-	num-cs = <1>;
-	cs-gpios = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
-
-	spi_flash: spi-flash@0 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "jedec,spi-nor";
-		reg = <0x0>;
-		spi-max-frequency = <50000000>;
-		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <1>;
-		status = "okay";
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			loader@0 {
-				label = "loader";
-				reg = <0x0 0x800000>;
-			};
-		};
-	};
-};
-
-&qspi1 {
-	status = "disabled";
-};

arch/riscv/boot/dts/thead/th1520.dtsi

@@ -8,7 +8,6 @@
 #include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-audio-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-pinctrl-def.h>
-#include <dt-bindings/pinctrl/light.h>
 #include <dt-bindings/clock/light-fm-ap-clock.h>
 #include <dt-bindings/clock/light-vpsys.h>
 #include <dt-bindings/clock/light-vosys.h>
@@ -480,7 +479,7 @@
 		};
 	};
 
-	soc: soc {
+	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -1195,7 +1194,7 @@
     		};
 		};
 
-/*		g2d: gc620@ffecc80000 {
+		g2d: gc620@ffecc80000 {
 			compatible = "thead,c910-gc620";
 			reg = <0xff 0xecc80000 0x0 0x40000>;
 			interrupt-parent = <&intc>;
@@ -1207,20 +1206,6 @@
 			clock-names = "pclk", "aclk", "cclk";
 			operating-points-v2 = <&g2d_opp_table>;
 			status = "okay";
-		};*/
-
-		g2d: gpu@13040000 {
-			compatible = "vivante,gc";
-			reg = <0xff 0xecc80000 0x0 0x40000>;
-
-			clocks = <&vpsys_clk_gate LIGHT_VPSYS_G2D_PCLK>,
-				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_ACLK>,
-				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
-			clock-names = "bus", "core", "shader";
-
-			interrupt-parent = <&intc>;
-			interrupts = <101>;
-			operating-points-v2 = <&g2d_opp_table>;
 		};
 
 		dsi0: dw-mipi-dsi0@ffef500000 {

arch/riscv/configs/light_defconfig

@@ -3,6 +3,10 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
@@ -337,6 +341,7 @@ CONFIG_OVERLAY_FS=y
 CONFIG_LOCKUP_DETECTOR=y
 CONFIG_SOFTLOCKUP_DETECTOR=y
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_INFO=y
 CONFIG_PM=y
 # CONFIG_SUSPEND is not set
 # CONFIG_PM_SLEEP is not set

arch/riscv/configs/revyos_defconfig

@@ -1,519 +0,0 @@
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_IKHEADERS=y
-CONFIG_CGROUPS=y
-CONFIG_MEMCG=y
-CONFIG_BLK_CGROUP=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_CFS_BANDWIDTH=y
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_CGROUP_PIDS=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_HUGETLB=y
-CONFIG_CPUSETS=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_CGROUP_PERF=y
-CONFIG_CGROUP_BPF=y
-CONFIG_NAMESPACES=y
-CONFIG_USER_NS=y
-CONFIG_CHECKPOINT_RESTORE=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_BUG is not set
-CONFIG_KALLSYMS_ALL=y
-CONFIG_BPF_SYSCALL=y
-CONFIG_PERF_EVENTS=y
-CONFIG_FORCE_MAX_ZONEORDER=15
-CONFIG_SOC_SIFIVE=y
-CONFIG_SOC_THEAD=y
-CONFIG_SMP=y
-CONFIG_VECTOR=y
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_GOV_LADDER=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
-CONFIG_HIBERNATION=y
-CONFIG_PM_WAKELOCKS=y
-CONFIG_PM_DEBUG=y
-CONFIG_ENERGY_MODEL=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_KVM=y
-CONFIG_LIGHT_AON_PD=y
-CONFIG_KPROBES=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_BLK_DEV_THROTTLING=y
-CONFIG_BINFMT_MISC=m
-CONFIG_CMA=y
-CONFIG_CMA_DEBUGFS=y
-CONFIG_CMA_AREAS=16
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPVTI=y
-CONFIG_INET_ESP=y
-CONFIG_TCP_CONG_ADVANCED=y
-CONFIG_TCP_CONG_BBR=m
-CONFIG_NETFILTER=y
-CONFIG_BRIDGE_NETFILTER=y
-CONFIG_NF_CONNTRACK=y
-CONFIG_NF_CONNTRACK_FTP=y
-CONFIG_NF_CONNTRACK_TFTP=y
-CONFIG_NF_NAT=y
-CONFIG_NETFILTER_XT_CONNMARK=y
-CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
-CONFIG_NETFILTER_XT_NAT=y
-CONFIG_NETFILTER_XT_TARGET_REDIRECT=y
-CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y
-CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
-CONFIG_NETFILTER_XT_MATCH_IPVS=y
-CONFIG_NETFILTER_XT_MATCH_MARK=y
-CONFIG_IP_VS=y
-CONFIG_IP_VS_PROTO_TCP=y
-CONFIG_IP_VS_PROTO_UDP=y
-CONFIG_IP_VS_RR=y
-CONFIG_IP_VS_NFCT=y
-CONFIG_NF_LOG_ARP=m
-CONFIG_NF_LOG_IPV4=m
-CONFIG_IP_NF_IPTABLES=y
-CONFIG_IP_NF_FILTER=y
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_NAT=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_NF_LOG_IPV6=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_NAT=m
-CONFIG_BPFILTER=y
-CONFIG_BRIDGE=y
-CONFIG_BRIDGE_VLAN_FILTERING=y
-CONFIG_VLAN_8021Q=y
-CONFIG_NET_SCHED=y
-CONFIG_NET_CLS_CGROUP=y
-CONFIG_VSOCKETS=y
-# CONFIG_VSOCKETS_LOOPBACK is not set
-CONFIG_VIRTIO_VSOCKETS=y
-CONFIG_NETLINK_DIAG=y
-CONFIG_CGROUP_NET_PRIO=y
-CONFIG_BT=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_HIDP=y
-CONFIG_BT_HCIUART=y
-CONFIG_BT_HCIUART_H4=y
-CONFIG_BT_HCIUART_RTL3WIRE=y
-CONFIG_CFG80211=y
-CONFIG_RFKILL=y
-CONFIG_NET_9P=y
-CONFIG_NET_9P_VIRTIO=y
-CONFIG_PCI=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_TESTS=m
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_SLRAM=m
-CONFIG_MTD_PHRAM=m
-CONFIG_MTD_SPI_NAND=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_VIRTIO_BLK=y
-CONFIG_LIGHT_DSMART_CARD=y
-CONFIG_EEPROM_AT24=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_DM_THIN_PROVISIONING=y
-CONFIG_NETDEVICES=y
-CONFIG_BONDING=m
-CONFIG_DUMMY=y
-CONFIG_WIREGUARD=m
-CONFIG_NET_TEAM=m
-CONFIG_MACVLAN=y
-CONFIG_IPVLAN=y
-CONFIG_VXLAN=y
-CONFIG_TUN=y
-CONFIG_VETH=y
-CONFIG_VIRTIO_NET=y
-CONFIG_MACB=y
-CONFIG_STMMAC_ETH=y
-CONFIG_STMMAC_RX_ZERO_COPY=y
-CONFIG_DWMAC_LIGHT=y
-CONFIG_MICROSEMI_PHY=y
-CONFIG_REALTEK_PHY=y
-CONFIG_USB_USBNET=m
-# CONFIG_USB_NET_AX8817X is not set
-# CONFIG_USB_NET_AX88179_178A is not set
-# CONFIG_USB_NET_NET1080 is not set
-CONFIG_BRCMFMAC=m
-CONFIG_RTL8723DS=y
-CONFIG_AIC_WLAN_SUPPORT=y
-CONFIG_AIC_FW_PATH="/lib/firmware/aic8800"
-CONFIG_AIC8800_WLAN_SUPPORT=m
-CONFIG_AIC8800_BTLPM_SUPPORT=m
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_JOYDEV=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_KEYBOARD_GPIO=y
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_GOODIX=y
-CONFIG_TOUCHSCREEN_GT9XX=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=6
-CONFIG_SERIAL_8250_RUNTIME_UARTS=6
-CONFIG_SERIAL_8250_DW=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
-CONFIG_VIRTIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_VIRTIO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_SPI=y
-CONFIG_SPI_DW_QUAD=y
-CONFIG_SPI_DESIGNWARE=y
-CONFIG_SPI_DW_MMIO=y
-CONFIG_SPI_SPIDEV=y
-# CONFIG_PTP_1588_CLOCK is not set
-CONFIG_PINCTRL=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_GPIO_DWAPB=y
-CONFIG_GPIO_PCA953X=y
-CONFIG_GPIO_PCA953X_IRQ=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_BATTERY_CW2015=m
-CONFIG_CHARGER_GPIO=m
-CONFIG_SENSORS_MR75203=y
-CONFIG_SENSORS_PWM_FAN=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
-CONFIG_CPU_THERMAL=y
-CONFIG_THERMAL_EMULATION=y
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_OPEN_TIMEOUT=32
-CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
-CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
-CONFIG_DW_WATCHDOG=y
-CONFIG_LIGHT_PMIC_WATCHDOG=y
-CONFIG_ABX500_CORE=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_MEDIA_SUPPORT=y
-# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
-# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
-CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_VIDEO_ASPEED=y
-CONFIG_V4L_MEM2MEM_DRIVERS=y
-# CONFIG_MEDIA_TUNER_SIMPLE is not set
-# CONFIG_MEDIA_TUNER_TDA18250 is not set
-# CONFIG_MEDIA_TUNER_TDA8290 is not set
-# CONFIG_MEDIA_TUNER_TDA827X is not set
-# CONFIG_MEDIA_TUNER_TDA18271 is not set
-# CONFIG_MEDIA_TUNER_TDA9887 is not set
-# CONFIG_MEDIA_TUNER_TEA5761 is not set
-# CONFIG_MEDIA_TUNER_TEA5767 is not set
-# CONFIG_MEDIA_TUNER_MSI001 is not set
-# CONFIG_MEDIA_TUNER_MT20XX is not set
-# CONFIG_MEDIA_TUNER_MT2060 is not set
-# CONFIG_MEDIA_TUNER_MT2063 is not set
-# CONFIG_MEDIA_TUNER_MT2266 is not set
-# CONFIG_MEDIA_TUNER_MT2131 is not set
-# CONFIG_MEDIA_TUNER_QT1010 is not set
-# CONFIG_MEDIA_TUNER_XC2028 is not set
-# CONFIG_MEDIA_TUNER_XC5000 is not set
-# CONFIG_MEDIA_TUNER_XC4000 is not set
-# CONFIG_MEDIA_TUNER_MXL5005S is not set
-# CONFIG_MEDIA_TUNER_MXL5007T is not set
-# CONFIG_MEDIA_TUNER_MC44S803 is not set
-# CONFIG_MEDIA_TUNER_MAX2165 is not set
-# CONFIG_MEDIA_TUNER_TDA18218 is not set
-# CONFIG_MEDIA_TUNER_FC0011 is not set
-# CONFIG_MEDIA_TUNER_FC0012 is not set
-# CONFIG_MEDIA_TUNER_FC0013 is not set
-# CONFIG_MEDIA_TUNER_TDA18212 is not set
-# CONFIG_MEDIA_TUNER_E4000 is not set
-# CONFIG_MEDIA_TUNER_FC2580 is not set
-# CONFIG_MEDIA_TUNER_M88RS6000T is not set
-# CONFIG_MEDIA_TUNER_TUA9001 is not set
-# CONFIG_MEDIA_TUNER_SI2157 is not set
-# CONFIG_MEDIA_TUNER_IT913X is not set
-# CONFIG_MEDIA_TUNER_R820T is not set
-# CONFIG_MEDIA_TUNER_MXL301RF is not set
-# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
-# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
-CONFIG_DRM=y
-CONFIG_DRM_PANEL_SIMPLE=y
-CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
-CONFIG_DRM_PANEL_ORISETECH_OTA7290B=y
-CONFIG_DRM_PANEL_ILI9881D=y
-CONFIG_DRM_PANEL_HX8394=y
-CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y
-CONFIG_DRM_PANEL_MINGJUN_070BI30IA2=y
-CONFIG_DRM_PANEL_HX8279=y
-CONFIG_DRM_LONTIUM_LT8911EXB=m
-CONFIG_DRM_ETNAVIV=m
-CONFIG_DRM_VERISILICON=y
-CONFIG_DRM_POWERVR_ROGUE=m
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_LOGO=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_USB_AUDIO=m
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_THEAD_LIGHT=y
-CONFIG_SND_SOC_AW87519=y
-CONFIG_SND_SOC_BT_SCO=y
-CONFIG_SND_SOC_ES7210=y
-CONFIG_SND_SOC_ES8156=y
-CONFIG_SND_SOC_WM8960=y
-CONFIG_SND_SIMPLE_CARD=y
-CONFIG_SND_AUDIO_GRAPH_CARD=y
-CONFIG_UHID=y
-CONFIG_HID_PID=y
-CONFIG_USB_HIDDEV=y
-CONFIG_I2C_HID=m
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_PLATFORM=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_DWC3=m
-CONFIG_USB_DWC3_HOST=y
-# CONFIG_USB_DWC3_OF_SIMPLE is not set
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_SIMPLE=m
-CONFIG_USB_SERIAL_AIRCABLE=m
-CONFIG_USB_SERIAL_ARK3116=m
-CONFIG_USB_SERIAL_BELKIN=m
-CONFIG_USB_SERIAL_CH341=m
-CONFIG_USB_SERIAL_WHITEHEAT=m
-CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
-CONFIG_USB_SERIAL_CP210X=m
-CONFIG_USB_SERIAL_CYPRESS_M8=m
-CONFIG_USB_SERIAL_EMPEG=m
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_VISOR=m
-CONFIG_USB_SERIAL_IPAQ=m
-CONFIG_USB_SERIAL_IR=m
-CONFIG_USB_SERIAL_EDGEPORT=m
-CONFIG_USB_SERIAL_EDGEPORT_TI=m
-CONFIG_USB_SERIAL_F81232=m
-CONFIG_USB_SERIAL_F8153X=m
-CONFIG_USB_SERIAL_GARMIN=m
-CONFIG_USB_SERIAL_IPW=m
-CONFIG_USB_SERIAL_IUU=m
-CONFIG_USB_SERIAL_KEYSPAN_PDA=m
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_KLSI=m
-CONFIG_USB_SERIAL_KOBIL_SCT=m
-CONFIG_USB_SERIAL_MCT_U232=m
-CONFIG_USB_SERIAL_METRO=m
-CONFIG_USB_SERIAL_MOS7720=m
-CONFIG_USB_SERIAL_MOS7840=m
-CONFIG_USB_SERIAL_MXUPORT=m
-CONFIG_USB_SERIAL_NAVMAN=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_SERIAL_OTI6858=m
-CONFIG_USB_SERIAL_QCAUX=m
-CONFIG_USB_SERIAL_QUALCOMM=m
-CONFIG_USB_SERIAL_SPCP8X5=m
-CONFIG_USB_SERIAL_SIERRAWIRELESS=m
-CONFIG_USB_SERIAL_SYMBOL=m
-CONFIG_USB_SERIAL_TI=m
-CONFIG_USB_SERIAL_CYBERJACK=m
-CONFIG_USB_SERIAL_XIRCOM=m
-CONFIG_USB_SERIAL_OPTION=m
-CONFIG_USB_SERIAL_OMNINET=m
-CONFIG_USB_SERIAL_OPTICON=m
-CONFIG_USB_SERIAL_XSENS_MT=m
-CONFIG_USB_SERIAL_WISHBONE=m
-CONFIG_USB_SERIAL_SSU100=m
-CONFIG_USB_SERIAL_QT2=m
-CONFIG_USB_SERIAL_UPD78F0730=m
-CONFIG_USB_SERIAL_DEBUG=m
-CONFIG_USB_GADGET=y
-CONFIG_USB_CONFIGFS=y
-CONFIG_USB_CONFIGFS_F_FS=y
-CONFIG_USB_CONFIGFS_F_ACC=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_EEM=y
-CONFIG_USB_G_NCM=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-CONFIG_USB_ROLE_SWITCH=m
-CONFIG_MMC=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_DWCMSHC=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_MTD=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_BACKLIGHT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_ACTIVITY=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_LEDS_TRIGGER_TRANSIENT=y
-CONFIG_LEDS_TRIGGER_CAMERA=y
-CONFIG_LEDS_TRIGGER_PANIC=y
-CONFIG_LEDS_TRIGGER_NETDEV=y
-CONFIG_LEDS_TRIGGER_PATTERN=y
-CONFIG_LEDS_TRIGGER_AUDIO=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_XGENE=y
-CONFIG_DMADEVICES=y
-CONFIG_DW_AXI_DMAC=y
-CONFIG_DMATEST=y
-CONFIG_SW_SYNC=y
-CONFIG_UDMABUF=y
-CONFIG_DMABUF_SELFTESTS=m
-CONFIG_VIRTIO_MMIO=y
-CONFIG_VIRTIO_KHV_MMIO=y
-CONFIG_VHOST_NET=y
-CONFIG_VHOST_VSOCK=y
-CONFIG_STAGING=y
-CONFIG_STAGING_MEDIA=y
-CONFIG_CLK_LIGHT_FM=y
-CONFIG_HWSPINLOCK=y
-CONFIG_HWSPINLOCK_LIGHT=y
-CONFIG_HWSPINLOCK_LIGHT_TEST=m
-CONFIG_MAILBOX=y
-CONFIG_RPMSG=y
-CONFIG_RPMSG_CHAR=y
-CONFIG_RPMSG_THEAD_LIGHT=y
-CONFIG_RPMSG_VIRTIO=y
-CONFIG_LIGHT_SUSPEND=y
-CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
-CONFIG_DEVFREQ_GOV_PERFORMANCE=y
-CONFIG_DEVFREQ_GOV_POWERSAVE=y
-CONFIG_DEVFREQ_GOV_USERSPACE=y
-CONFIG_DEVFREQ_GOV_PASSIVE=y
-CONFIG_PM_DEVFREQ=y
-CONFIG_PM_DEVFREQ_EVENT=y
-CONFIG_EXTCON=y
-CONFIG_IIO=y
-CONFIG_IIO_SW_DEVICE=y
-CONFIG_PWM=y
-CONFIG_PWM_LIGHT=y
-CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
-CONFIG_TEE=m
-CONFIG_OPTEE=m
-CONFIG_OPTEE_BENCHMARK=y
-# CONFIG_LIGHT_NET is not set
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_BTRFS_FS=y
-CONFIG_BTRFS_FS_POSIX_ACL=y
-CONFIG_AUTOFS4_FS=y
-CONFIG_FUSE_FS=y
-CONFIG_OVERLAY_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_EXFAT_FS=m
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_HUGETLBFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_NFS_V4_2=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V4=y
-CONFIG_9P_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_SECURITY=y
-CONFIG_SECURITY_SELINUX=y
-CONFIG_SECURITY_APPARMOR=y
-CONFIG_DEFAULT_SECURITY_DAC=y
-CONFIG_CRYPTO_USER=y
-CONFIG_CRYPTO_DH=y
-CONFIG_CRYPTO_CURVE25519=y
-CONFIG_CRYPTO_CHACHA20POLY1305=y
-CONFIG_CRYPTO_OFB=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_SHA3=y
-CONFIG_CRYPTO_SM3=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_SM4=y
-CONFIG_CRYPTO_USER_API_HASH=y
-CONFIG_CRYPTO_USER_API_SKCIPHER=y
-CONFIG_CRYPTO_USER_API_RNG=y
-CONFIG_CRYPTO_USER_API_AEAD=y
-CONFIG_DMA_CMA=y
-CONFIG_DMA_PERNUMA_CMA=y
-CONFIG_CMA_SIZE_MBYTES=32
-CONFIG_PRINTK_TIME=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_INFO_BTF=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_MAGIC_SYSRQ_SERIAL is not set
-CONFIG_DEBUG_FS=y
-CONFIG_SOFTLOCKUP_DETECTOR=y
-CONFIG_DEBUG_ATOMIC_SLEEP=y
-# CONFIG_RCU_TRACE is not set
-CONFIG_FUNCTION_TRACER=y

arch/riscv/include/asm/cmpxchg.h

@@ -396,22 +396,4 @@ static inline ulong __xchg16_relaxed(ulong new, void *ptr)
 	cmpxchg_relaxed((ptr), (o), (n));				\
 })
 
-#define cmpxchg64_relaxed(ptr, o, n)				\
-({									\
-	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
-	cmpxchg_relaxed((ptr), (o), (n));				\
-})
-
-#define cmpxchg64_acquire(ptr, o, n)				\
-({									\
-	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
-	cmpxchg_acquire((ptr), (o), (n));				\
-})
-
-#define cmpxchg64_release(ptr, o, n)				\
-({									\
-	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
-	cmpxchg_release((ptr), (o), (n));				\
-})
-
 #endif /* _ASM_RISCV_CMPXCHG_H */

arch/riscv/include/asm/csr.h

@@ -26,11 +26,19 @@
 
 #define SR_VS_OFF	_AC(0x00000000, UL)
 
+#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
+#define SR_VS		_AC(0x00000600, UL) /* Vector Status */
+#define SR_VS_INITIAL	_AC(0x00000200, UL)
+#define SR_VS_CLEAN	_AC(0x00000400, UL)
+#define SR_VS_DIRTY	_AC(0x00000600, UL)
+#else
 #define SR_VS		_AC(0x01800000, UL) /* Vector Status */
 #define SR_VS_INITIAL	_AC(0x00800000, UL)
 #define SR_VS_CLEAN	_AC(0x01000000, UL)
 #define SR_VS_DIRTY	_AC(0x01800000, UL)
 
+#endif
+
 #define SR_XS		_AC(0x00018000, UL) /* Extension Status */
 #define SR_XS_OFF	_AC(0x00000000, UL)
 #define SR_XS_INITIAL	_AC(0x00008000, UL)

arch/riscv/kernel/vector.S

@@ -20,6 +20,14 @@
 #include <asm/csr.h>
 #include <asm/asm-offsets.h>
 
+#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
+#define V_ST	vse8.v
+#define V_LD	vle8.v
+#else
+#define V_ST	vsb.v
+#define V_LD	vlb.v
+#endif
+
 ENTRY(__vstate_save)
 	li	a2,  TASK_THREAD_V0
 	add	a0,  a0, a2
@@ -38,14 +46,81 @@ ENTRY(__vstate_save)
 	csrr	t0,  CSR_VTYPE
 	sd	t0,  TASK_THREAD_VTYPE_V0(a0)
 
-	.word 0x003072d7 	/* vsetvli	t0, x0, e8,m8 	*/
-	.word 0x02050027 	/* vsb.v	v0,  (a0)	*/
+#ifdef CONFIG_VLEN_256
+	vsetvli	t0, x0, e8,m1
+	V_ST	v0,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v1,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v2,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v3,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v4,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v5,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v6,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v7,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v8,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v9,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v10, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v11, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v12, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v13, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v14, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v15, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v16, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v17, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v18, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v19, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v20, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v21, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v22, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v23, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v24, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v25, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v26, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v27, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v28, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v29, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v30, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_ST	v31, (a0)
+#else
+	vsetvli	t0, x0, e8,m8
+	V_ST	v0,  (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	.word 0x02050427 	/* vsb.v	v8,  (a0) 	*/
+	V_ST	v8,  (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	.word 0x02050827 	/* vsb.v	v16, (a0) 	*/
+	V_ST	v16, (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	.word 0x02050c27 	/* vsb.v	v24, (a0) 	*/
+	V_ST	v24, (a0)
+#endif
 
 	csrc	sstatus, t1
 	ret
@@ -59,23 +134,99 @@ ENTRY(__vstate_restore)
 	li	t1, (SR_VS | SR_FS)
 	csrs	sstatus, t1
 
-	.word 0x003072d7	/* vsetvli	t0, x0, e8,m8 	*/
-	.word 0x12050007	/* vlb.v	v0,  (a0) 	*/
+#ifdef CONFIG_VLEN_256
+	vsetvli	t0, x0, e8,m1
+	V_LD	v0,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v1,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v2,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v3,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v4,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v5,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v6,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v7,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v8,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v9,  (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v10, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v11, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v12, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v13, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v14, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v15, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v16, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v17, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v18, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v19, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v20, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v21, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v22, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v23, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v24, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v25, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v26, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v27, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v28, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v29, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v30, (a0)
+	addi	a0, a0, RISCV_VECTOR_VLENB
+	V_LD	v31, (a0)
+#else
+	vsetvli	t0, x0, e8,m8
+	V_LD	v0,  (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	.word 0x12050407	/* vlb.v	v8,  (a0)	*/
+	V_LD	v8,  (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	.word 0x12050807 	/* vlb.v	v16, (a0)	*/
+	V_LD	v16, (a0)
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	.word 0x12050c07	/* vlb.v	v24, (a0)	*/
+	V_LD	v24, (a0)
+#endif
 
 	mv	a0,  t2
+	ld	t0,  TASK_THREAD_VXSAT_V0(a0)
+	csrw	CSR_VXSAT, t0
 	ld	t0,  TASK_THREAD_VXRM_V0(a0)
 	csrw	CSR_VXRM, t0
 	ld	t0,  TASK_THREAD_VL_V0(a0)
 	ld	t2,  TASK_THREAD_VTYPE_V0(a0)
-
-	.word 0x8072fe57 	/* vsetvl	t3, t0, t2	*/
-
+#ifdef CONFIG_VECTOR_EMU
+	srli	t3, t2, 63
+	bne	t3,zero,1f
+#endif
+	vsetvl	t3, t0, t2
+#ifdef CONFIG_VECTOR_EMU
+	j	2f
+1:	vsetvli zero,zero,e64,m2,d1
+2:
+#endif
 	/* vsetvl & vsetvli would reset vstart to zero */
 	ld	t0,  TASK_THREAD_VSTART_V0(a0)
 	csrw	CSR_VSTART, t0

drivers/Kconfig

@@ -8,7 +8,6 @@ source "drivers/eisa/Kconfig"
 source "drivers/pci/Kconfig"
 source "drivers/pcmcia/Kconfig"
 source "drivers/rapidio/Kconfig"
-source "drivers/nna/Kconfig"
 
 
 source "drivers/base/Kconfig"

drivers/Makefile

@@ -45,9 +45,6 @@ obj-$(CONFIG_VIRTIO)		+= virtio/
 obj-$(CONFIG_VDPA)		+= vdpa/
 obj-$(CONFIG_XEN)		+= xen/
 
-# npu-ax3386-gpl driver
-obj-y				+= nna/
-
 # regulators early, since some subsystems rely on them to initialize
 obj-$(CONFIG_REGULATOR)		+= regulator/
 

drivers/cpufreq/light-mpw-cpufreq.c

@@ -34,7 +34,7 @@ enum LIGHT_MPW_CPUFREQ_CLKS {
 };
 
 #define LIGHT_MPW_CPUFREQ_CLK_NUM	4
-#define LIGHT_CPUFREQ_THRE		2000000
+#define LIGHT_CPUFREQ_THRE		1500000
 #define LIGHT_C910_BUS_CLK_SYNC		BIT(11)
 #define LIGHT_C910_BUS_CLK_RATIO_MASK	0x700
 #define LIGHT_C910_BUS_CLK_DIV_RATIO_2	0x100

drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c

@@ -1947,7 +1947,6 @@ _SetHardwareOptions(
         gcmkASSERT(gcvSTATUS_TRUE == gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_SECURITY_AHB));
 
         options->secureMode = gcvSECURE_IN_NORMAL;
-	pr_err("gcvSECURE_IN_NORMAL because of SECURITY\n");
 
         status = gckOS_QueryOption(Hardware->os, "TA", &data);
 
@@ -1959,7 +1958,6 @@ _SetHardwareOptions(
     else if (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_SECURITY_AHB))
     {
         options->secureMode = gcvSECURE_IN_NORMAL;
-	pr_err("gcvSECURE_IN_NORMAL because of SECURITY_AHB\n");
     }
 
     options->hasShader = database->NumShaderCores;

drivers/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c

@@ -70,6 +70,7 @@
 MODULE_DESCRIPTION("Vivante Graphics Driver");
 MODULE_LICENSE("Dual MIT/GPL");
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)
+MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);
 #endif
 
 static struct class* gpuClass = NULL;

drivers/gpu-viv/hal/os/linux/kernel/platform/thead/gc_hal_kernel_platform_c910.c

@@ -25,7 +25,7 @@ struct c910_priv {
 static gcsPLATFORM c910_platform;
 
 static const struct of_device_id c910_gc620_dt_ids[] = {
-	{ .compatible = "vivante,gc", },
+	{ .compatible = "thead,c910-gc620", },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, c910_gc620_dt_ids);
@@ -37,7 +37,7 @@ static gceSTATUS c910_adjustParam(IN gcsPLATFORM * Platform,
 	struct resource *res;
 	struct platform_device *pdev = Platform->device;
 
-	irq = platform_get_irq(pdev, 0);
+	irq = platform_get_irq_byname(pdev, "irq_2d");
 	if (irq < 0)
 		return gcvSTATUS_NOT_FOUND;
 
@@ -58,15 +58,15 @@ static gceSTATUS c910_getPower(IN gcsPLATFORM * Platform)
 	struct c910_priv *c910 = Platform->priv;
 	struct platform_device *pdev = c910_platform.device;
 
-	c910->pclk = devm_clk_get(&pdev->dev, "bus");
+	c910->pclk = devm_clk_get(&pdev->dev, "pclk");
 	if (IS_ERR(c910->pclk))
 		return gcvSTATUS_NOT_FOUND;
 
-	c910->aclk = devm_clk_get(&pdev->dev, "core");
+	c910->aclk = devm_clk_get(&pdev->dev, "aclk");
 	if (IS_ERR(c910->aclk))
 		return gcvSTATUS_NOT_FOUND;
 
-	c910->cclk = devm_clk_get(&pdev->dev, "shader");
+	c910->cclk = devm_clk_get(&pdev->dev, "cclk");
 	if (IS_ERR(c910->cclk))
 		return gcvSTATUS_NOT_FOUND;
 
@@ -118,7 +118,7 @@ int gckPLATFORM_Init(struct platform_driver *pdrv, gcsPLATFORM **platform)
 	struct platform_device *pdev;
 	struct c910_priv *c910;
 
-	np = of_find_compatible_node(NULL, NULL, "vivante,gc");
+	np = of_find_compatible_node(NULL, NULL, "thead,c910-gc620");
 	if (!np)
 		return -ENODEV;
 	of_node_put(np);

drivers/gpu/drm/Kconfig

@@ -394,8 +394,6 @@ source "drivers/gpu/drm/xlnx/Kconfig"
 
 source "drivers/gpu/drm/verisilicon/Kconfig"
 
-source "drivers/gpu/drm/img-rogue/Kconfig"
-
 # Keep legacy drivers last
 
 menuconfig DRM_LEGACY

drivers/gpu/drm/Makefile

@@ -57,8 +57,6 @@ drm_kms_helper-$(CONFIG_DRM_DP_CEC) += drm_dp_cec.o
 obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
 obj-$(CONFIG_DRM_DEBUG_SELFTEST) += selftests/
 
-obj-$(CONFIG_DRM_POWERVR_ROGUE) += img-rogue/
-
 obj-$(CONFIG_DRM)	+= drm.o
 obj-$(CONFIG_DRM_MIPI_DBI) += drm_mipi_dbi.o
 obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o

drivers/gpu/drm/bridge/Kconfig

@@ -62,12 +62,6 @@ config DRM_LONTIUM_LT9611
 	  HDMI signals
 	  Please say Y if you have such hardware.
 
-config DRM_LONTIUM_LT8911EXB
-	tristate "Lontium LT8911EXB mipi2edp chip"
-	depends on OF
-	help
-	  Driver for Lontium LT8911EXB DSI to eDP bridge
-
 config DRM_LVDS_CODEC
 	tristate "Transparent LVDS encoders and decoders support"
 	depends on OF

drivers/gpu/drm/bridge/Makefile

@@ -3,7 +3,6 @@ obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o
 obj-$(CONFIG_DRM_CHRONTEL_CH7033) += chrontel-ch7033.o
 obj-$(CONFIG_DRM_DISPLAY_CONNECTOR) += display-connector.o
 obj-$(CONFIG_DRM_LONTIUM_LT9611) += lontium-lt9611.o
-obj-$(CONFIG_DRM_LONTIUM_LT8911EXB) += lontium-lt8911exb.o
 obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o
 obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v3-fw.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o

drivers/gpu/drm/bridge/lontium-lt8911exb.h

@@ -1,79 +0,0 @@
-/*
-    Lontium LT8911EXB MIPI to EDP driver
-
-    Copyright  (C)  2016 - 2017 Topband. Ltd.
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be a reference
-    to you, when you are integrating the Lontium's LT8911EXB IC into your system,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-    General Public License for more details.
-
-    Author: shenhaibo
-    Version: 1.1.0
-    Release Date: 2019/3/6
-*/
-
-#ifndef _LONTIUM_LT8911EXB_H_
-#define _LONTIUM_LT8911EXB_H_
-
-#include <linux/kernel.h>
-#include <linux/hrtimer.h>
-#include <linux/i2c.h>
-#include <linux/input.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/i2c.h>
-#include <linux/proc_fs.h>
-#include <linux/string.h>
-#include <linux/uaccess.h>
-#include <linux/vmalloc.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-#include <linux/regulator/consumer.h>
-#include <linux/major.h>
-#include <linux/kdev_t.h>
-#include <linux/of_gpio.h>
-#ifdef CONFIG_HAS_EARLYSUSPEND
-#include <linux/earlysuspend.h>
-#endif
-#include <linux/usb.h>
-#include <linux/power_supply.h>
-
-#define LT8911EXB_I2C_NAME      "lt8911exb"
-#define LT8911EXB_DRIVER_VERSION  "1.0.0"
-
-#define LT8911EXB_ADDR_LENGTH      1
-#define I2C_MAX_TRANSFER_SIZE   255
-#define RETRY_MAX_TIMES         3
-
-struct lt8911exb_data {
-	struct i2c_client *client;
-	int pwr_gpio;
-	int rst_gpio;
-
-	int hact;
-	int vact;
-	int hbp;
-	int hfp;
-	int hs;
-	int vbp;
-	int vfp;
-	int vs;
-	int pclk;
-	int htotal;
-	int vtotal;
-
-	int lane_cnt;
-	int mipi_lane;
-	int color;		//Color Depth 0:6bit 1:8bit
-	int test;
-};
-
-#endif /*_LONTIUM_LT8911EXB_H_*/

drivers/gpu/drm/etnaviv/common.xml.h

@@ -65,7 +65,6 @@ DEALINGS IN THE SOFTWARE.
 #define chipModel_GC520						0x00000520
 #define chipModel_GC530						0x00000530
 #define chipModel_GC600						0x00000600
-#define chipModel_GC620						0x00000620
 #define chipModel_GC700						0x00000700
 #define chipModel_GC800						0x00000800
 #define chipModel_GC860						0x00000860

drivers/gpu/drm/etnaviv/etnaviv_buffer.c

@@ -53,12 +53,11 @@ static inline void CMD_END(struct etnaviv_cmdbuf *buffer)
 	OUT(buffer, VIV_FE_END_HEADER_OP_END);
 }
 
-static inline void CMD_WAIT(struct etnaviv_cmdbuf *buffer,
-			    unsigned int waitcycles)
+static inline void CMD_WAIT(struct etnaviv_cmdbuf *buffer)
 {
 	buffer->user_size = ALIGN(buffer->user_size, 8);
 
-	OUT(buffer, VIV_FE_WAIT_HEADER_OP_WAIT | waitcycles);
+	OUT(buffer, VIV_FE_WAIT_HEADER_OP_WAIT | 200);
 }
 
 static inline void CMD_LINK(struct etnaviv_cmdbuf *buffer,
@@ -169,7 +168,7 @@ u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu)
 	/* initialize buffer */
 	buffer->user_size = 0;
 
-	CMD_WAIT(buffer, gpu->fe_waitcycles);
+	CMD_WAIT(buffer);
 	CMD_LINK(buffer, 2,
 		 etnaviv_cmdbuf_get_va(buffer, &gpu->mmu_context->cmdbuf_mapping)
 		 + buffer->user_size - 4);
@@ -321,7 +320,7 @@ void etnaviv_sync_point_queue(struct etnaviv_gpu *gpu, unsigned int event)
 	CMD_END(buffer);
 
 	/* Append waitlink */
-	CMD_WAIT(buffer, gpu->fe_waitcycles);
+	CMD_WAIT(buffer);
 	CMD_LINK(buffer, 2,
 		 etnaviv_cmdbuf_get_va(buffer, &gpu->mmu_context->cmdbuf_mapping)
 		 + buffer->user_size - 4);
@@ -417,11 +416,8 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state,
 
 				if (switch_mmu_context &&
 				    gpu->sec_mode == ETNA_SEC_KERNEL) {
-					unsigned short id;
-
-					etnaviv_iommuv2_update_pta_entry(gpu->mmu_context);
-
-					id = etnaviv_iommuv2_get_pta_id(gpu->mmu_context);
+					unsigned short id =
+						etnaviv_iommuv2_get_pta_id(gpu->mmu_context);
 					CMD_LOAD_STATE(buffer,
 						VIVS_MMUv2_PTA_CONFIG,
 						VIVS_MMUv2_PTA_CONFIG_INDEX(id));
@@ -507,7 +503,7 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state,
 
 	CMD_LOAD_STATE(buffer, VIVS_GL_EVENT, VIVS_GL_EVENT_EVENT_ID(event) |
 		       VIVS_GL_EVENT_FROM_PE);
-	CMD_WAIT(buffer, gpu->fe_waitcycles);
+	CMD_WAIT(buffer);
 	CMD_LINK(buffer, 2,
 		 etnaviv_cmdbuf_get_va(buffer, &gpu->mmu_context->cmdbuf_mapping)
 		 + buffer->user_size - 4);

drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.c

@@ -121,9 +121,6 @@ void etnaviv_cmdbuf_free(struct etnaviv_cmdbuf *cmdbuf)
 	int order = order_base_2(ALIGN(cmdbuf->size, SUBALLOC_GRANULE) /
 				 SUBALLOC_GRANULE);
 
-	if (!suballoc)
-		return;
-
 	mutex_lock(&suballoc->lock);
 	bitmap_release_region(suballoc->granule_map,
 			      cmdbuf->suballoc_offset / SUBALLOC_GRANULE,

drivers/gpu/drm/etnaviv/etnaviv_drv.c

@@ -468,6 +468,12 @@ static const struct drm_ioctl_desc etnaviv_ioctls[] = {
 	ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_RENDER_ALLOW),
 };
 
+static const struct vm_operations_struct vm_ops = {
+	.fault = etnaviv_gem_fault,
+	.open = drm_gem_vm_open,
+	.close = drm_gem_vm_close,
+};
+
 static const struct file_operations fops = {
 	.owner              = THIS_MODULE,
 	.open               = drm_open,
@@ -484,9 +490,16 @@ static struct drm_driver etnaviv_drm_driver = {
 	.driver_features    = DRIVER_GEM | DRIVER_RENDER,
 	.open               = etnaviv_open,
 	.postclose           = etnaviv_postclose,
+	.gem_free_object_unlocked = etnaviv_gem_free_object,
+	.gem_vm_ops         = &vm_ops,
 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
+	.gem_prime_pin      = etnaviv_gem_prime_pin,
+	.gem_prime_unpin    = etnaviv_gem_prime_unpin,
+	.gem_prime_get_sg_table = etnaviv_gem_prime_get_sg_table,
 	.gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table,
+	.gem_prime_vmap     = etnaviv_gem_prime_vmap,
+	.gem_prime_vunmap   = etnaviv_gem_prime_vunmap,
 	.gem_prime_mmap     = etnaviv_gem_prime_mmap,
 #ifdef CONFIG_DEBUG_FS
 	.debugfs_init       = etnaviv_debugfs_init,
@@ -672,24 +685,8 @@ static int __init etnaviv_init(void)
 			of_node_put(np);
 			goto unregister_platform_driver;
 		}
-
-		/*
-		 * PTA and MTLB can have 40 bit base addresses, but
-		 * unfortunately, an entry in the MTLB can only point to a
-		 * 32 bit base address of a STLB. Moreover, to initialize the
-		 * MMU we need a command buffer with a 32 bit address because
-		 * without an MMU there is only an indentity mapping between
-		 * the internal 32 bit addresses and the bus addresses.
-		 *
-		 * To make things easy, we set the dma_coherent_mask to 32
-		 * bit to make sure we are allocating the command buffers and
-		 * TLBs in the lower 4 GiB address space.
-		 */
-		if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)) ||
-		    dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
-			dev_dbg(&pdev->dev, "No suitable DMA available\n");
-			return -ENODEV;
-		}
+		pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
+		pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
 
 		/*
 		 * Apply the same DMA configuration to the virtual etnaviv

drivers/gpu/drm/etnaviv/etnaviv_drv.h

@@ -49,6 +49,7 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data,
 		struct drm_file *file);
 
 int etnaviv_gem_mmap(struct file *filp, struct vm_area_struct *vma);
+vm_fault_t etnaviv_gem_fault(struct vm_fault *vmf);
 int etnaviv_gem_mmap_offset(struct drm_gem_object *obj, u64 *offset);
 struct sg_table *etnaviv_gem_prime_get_sg_table(struct drm_gem_object *obj);
 void *etnaviv_gem_prime_vmap(struct drm_gem_object *obj);

drivers/gpu/drm/etnaviv/etnaviv_dump.c

@@ -125,9 +125,9 @@ void etnaviv_core_dump(struct etnaviv_gem_submit *submit)
 		return;
 	etnaviv_dump_core = false;
 
-	mutex_lock(&submit->mmu_context->lock);
+	mutex_lock(&gpu->mmu_context->lock);
 
-	mmu_size = etnaviv_iommu_dump_size(submit->mmu_context);
+	mmu_size = etnaviv_iommu_dump_size(gpu->mmu_context);
 
 	/* We always dump registers, mmu, ring, hanging cmdbuf and end marker */
 	n_obj = 5;
@@ -157,7 +157,7 @@ void etnaviv_core_dump(struct etnaviv_gem_submit *submit)
 	iter.start = __vmalloc(file_size, GFP_KERNEL | __GFP_NOWARN |
 			__GFP_NORETRY);
 	if (!iter.start) {
-		mutex_unlock(&submit->mmu_context->lock);
+		mutex_unlock(&gpu->mmu_context->lock);
 		dev_warn(gpu->dev, "failed to allocate devcoredump file\n");
 		return;
 	}
@@ -169,18 +169,18 @@ void etnaviv_core_dump(struct etnaviv_gem_submit *submit)
 	memset(iter.hdr, 0, iter.data - iter.start);
 
 	etnaviv_core_dump_registers(&iter, gpu);
-	etnaviv_core_dump_mmu(&iter, submit->mmu_context, mmu_size);
+	etnaviv_core_dump_mmu(&iter, gpu->mmu_context, mmu_size);
 	etnaviv_core_dump_mem(&iter, ETDUMP_BUF_RING, gpu->buffer.vaddr,
 			      gpu->buffer.size,
 			      etnaviv_cmdbuf_get_va(&gpu->buffer,
-					&submit->mmu_context->cmdbuf_mapping));
+					&gpu->mmu_context->cmdbuf_mapping));
 
 	etnaviv_core_dump_mem(&iter, ETDUMP_BUF_CMD,
 			      submit->cmdbuf.vaddr, submit->cmdbuf.size,
 			      etnaviv_cmdbuf_get_va(&submit->cmdbuf,
-					&submit->mmu_context->cmdbuf_mapping));
+					&gpu->mmu_context->cmdbuf_mapping));
 
-	mutex_unlock(&submit->mmu_context->lock);
+	mutex_unlock(&gpu->mmu_context->lock);
 
 	/* Reserve space for the bomap */
 	if (n_bomap_pages) {

drivers/gpu/drm/etnaviv/etnaviv_gem.c

@@ -130,7 +130,8 @@ static int etnaviv_gem_mmap_obj(struct etnaviv_gem_object *etnaviv_obj,
 {
 	pgprot_t vm_page_prot;
 
-	vma->vm_flags |= VM_PFNMAP;
+	vma->vm_flags &= ~VM_PFNMAP;
+	vma->vm_flags |= VM_MIXEDMAP;
 
 	vm_page_prot = vm_get_page_prot(vma->vm_flags);
 
@@ -170,13 +171,12 @@ int etnaviv_gem_mmap(struct file *filp, struct vm_area_struct *vma)
 	return obj->ops->mmap(obj, vma);
 }
 
-static vm_fault_t etnaviv_gem_fault(struct vm_fault *vmf)
+vm_fault_t etnaviv_gem_fault(struct vm_fault *vmf)
 {
 	struct vm_area_struct *vma = vmf->vma;
 	struct drm_gem_object *obj = vma->vm_private_data;
 	struct etnaviv_gem_object *etnaviv_obj = to_etnaviv_bo(obj);
-	struct page **pages;
-	unsigned long pfn;
+	struct page **pages, *page;
 	pgoff_t pgoff;
 	int err;
 
@@ -200,12 +200,12 @@ static vm_fault_t etnaviv_gem_fault(struct vm_fault *vmf)
 	/* We don't use vmf->pgoff since that has the fake offset: */
 	pgoff = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
 
-	pfn = page_to_pfn(pages[pgoff]);
+	page = pages[pgoff];
 
 	VERB("Inserting %p pfn %lx, pa %lx", (void *)vmf->address,
-	     pfn, pfn << PAGE_SHIFT);
+	     page_to_pfn(page), page_to_pfn(page) << PAGE_SHIFT);
 
-	return vmf_insert_pfn(vma, vmf->address, pfn);
+	return vmf_insert_page(vma, vmf->address, page);
 }
 
 int etnaviv_gem_mmap_offset(struct drm_gem_object *obj, u64 *offset)
@@ -269,12 +269,7 @@ struct etnaviv_vram_mapping *etnaviv_gem_mapping_get(
 		if (mapping->use == 0) {
 			mutex_lock(&mmu_context->lock);
 			if (mapping->context == mmu_context)
-				if (va && mapping->iova != va) {
-					etnaviv_iommu_reap_mapping(mapping);
-					mapping = NULL;
-				} else {
-					mapping->use += 1;
-				}
+				mapping->use += 1;
 			else
 				mapping = NULL;
 			mutex_unlock(&mmu_context->lock);
@@ -310,15 +305,18 @@ struct etnaviv_vram_mapping *etnaviv_gem_mapping_get(
 		list_del(&mapping->obj_node);
 	}
 
+	mapping->context = etnaviv_iommu_context_get(mmu_context);
 	mapping->use = 1;
 
 	ret = etnaviv_iommu_map_gem(mmu_context, etnaviv_obj,
 				    mmu_context->global->memory_base,
 				    mapping, va);
-	if (ret < 0)
+	if (ret < 0) {
+		etnaviv_iommu_context_put(mmu_context);
 		kfree(mapping);
-	else
+	} else {
 		list_add_tail(&mapping->obj_node, &etnaviv_obj->vram_list);
+	}
 
 out:
 	mutex_unlock(&etnaviv_obj->lock);
@@ -534,8 +532,10 @@ void etnaviv_gem_free_object(struct drm_gem_object *obj)
 
 		WARN_ON(mapping->use);
 
-		if (context)
+		if (context) {
 			etnaviv_iommu_unmap_gem(context, mapping);
+			etnaviv_iommu_context_put(context);
+		}
 
 		list_del(&mapping->obj_node);
 		kfree(mapping);
@@ -558,22 +558,6 @@ void etnaviv_gem_obj_add(struct drm_device *dev, struct drm_gem_object *obj)
 	mutex_unlock(&priv->gem_lock);
 }
 
-static const struct vm_operations_struct vm_ops = {
-	.fault = etnaviv_gem_fault,
-	.open = drm_gem_vm_open,
-	.close = drm_gem_vm_close,
-};
-
-static const struct drm_gem_object_funcs etnaviv_gem_object_funcs = {
-	.free = etnaviv_gem_free_object,
-	.pin = etnaviv_gem_prime_pin,
-	.unpin = etnaviv_gem_prime_unpin,
-	.get_sg_table = etnaviv_gem_prime_get_sg_table,
-	.vmap = etnaviv_gem_prime_vmap,
-	.vunmap = etnaviv_gem_prime_vunmap,
-	.vm_ops = &vm_ops,
-};
-
 static int etnaviv_gem_new_impl(struct drm_device *dev, u32 size, u32 flags,
 	const struct etnaviv_gem_ops *ops, struct drm_gem_object **obj)
 {
@@ -608,7 +592,6 @@ static int etnaviv_gem_new_impl(struct drm_device *dev, u32 size, u32 flags,
 	INIT_LIST_HEAD(&etnaviv_obj->vram_list);
 
 	*obj = &etnaviv_obj->base;
-	(*obj)->funcs = &etnaviv_gem_object_funcs;
 
 	return 0;
 }

drivers/gpu/drm/etnaviv/etnaviv_gem.h

@@ -99,7 +99,6 @@ struct etnaviv_gem_submit {
 	int out_fence_id;
 	struct list_head node; /* GPU active submit list */
 	struct etnaviv_cmdbuf cmdbuf;
-	struct pid *pid;       /* submitting process */
 	bool runtime_resumed;
 	u32 exec_state;
 	u32 flags;

drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c

@@ -93,15 +93,7 @@ static void *etnaviv_gem_prime_vmap_impl(struct etnaviv_gem_object *etnaviv_obj)
 static int etnaviv_gem_prime_mmap_obj(struct etnaviv_gem_object *etnaviv_obj,
 		struct vm_area_struct *vma)
 {
-	int ret;
-
-	ret = dma_buf_mmap(etnaviv_obj->base.dma_buf, vma, 0);
-	if (!ret) {
-		/* Drop the reference acquired by drm_gem_mmap_obj(). */
-		drm_gem_object_put(&etnaviv_obj->base);
-	}
-
-	return ret;
+	return dma_buf_mmap(etnaviv_obj->base.dma_buf, vma, 0);
 }
 
 static const struct etnaviv_gem_ops etnaviv_gem_prime_ops = {

drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c

@@ -407,14 +407,11 @@ static void submit_cleanup(struct kref *kref)
 		dma_fence_put(submit->in_fence);
 	if (submit->out_fence) {
 		/* first remove from IDR, so fence can not be found anymore */
-		mutex_lock(&submit->gpu->idr_lock);
+		mutex_lock(&submit->gpu->fence_lock);
 		idr_remove(&submit->gpu->fence_idr, submit->out_fence_id);
-		mutex_unlock(&submit->gpu->idr_lock);
+		mutex_unlock(&submit->gpu->fence_lock);
 		dma_fence_put(submit->out_fence);
 	}
-
-	put_pid(submit->pid);
-
 	kfree(submit->pmrs);
 	kfree(submit);
 }
@@ -438,7 +435,6 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data,
 	struct sync_file *sync_file = NULL;
 	struct ww_acquire_ctx ticket;
 	int out_fence_fd = -1;
-	struct pid *pid = get_pid(task_pid(current));
 	void *stream;
 	int ret;
 
@@ -536,8 +532,6 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data,
 		goto err_submit_ww_acquire;
 	}
 
-	submit->pid = pid;
-
 	ret = etnaviv_cmdbuf_init(priv->cmdbuf_suballoc, &submit->cmdbuf,
 				  ALIGN(args->stream_size, 8) + 8);
 	if (ret)

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

@@ -13,7 +13,6 @@
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/regulator/consumer.h>
-#include <linux/string_helpers.h>
 #include <linux/thermal.h>
 
 #include "etnaviv_cmdbuf.h"
@@ -28,6 +27,10 @@
 #include "state_hi.xml.h"
 #include "cmdstream.xml.h"
 
+#ifndef PHYS_OFFSET
+#define PHYS_OFFSET 0
+#endif
+
 static const struct platform_device_id gpu_ids[] = {
 	{ .name = "etnaviv-gpu,2d" },
 	{ },
@@ -153,18 +156,6 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)
 			*value = ~0ULL;
 		break;
 
-	case ETNAVIV_PARAM_GPU_PRODUCT_ID:
-		*value = gpu->identity.product_id;
-		break;
-
-	case ETNAVIV_PARAM_GPU_CUSTOMER_ID:
-		*value = gpu->identity.customer_id;
-		break;
-
-	case ETNAVIV_PARAM_GPU_ECO_ID:
-		*value = gpu->identity.eco_id;
-		break;
-
 	default:
 		DBG("%s: invalid param: %u", dev_name(gpu->dev), param);
 		return -EINVAL;
@@ -417,12 +408,6 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu)
 	if (gpu->identity.model == chipModel_GC700)
 		gpu->identity.features &= ~chipFeatures_FAST_CLEAR;
 
-	/* These models/revisions don't have the 2D pipe bit */
-	if ((gpu->identity.model == chipModel_GC500 &&
-	     gpu->identity.revision <= 2) ||
-	    gpu->identity.model == chipModel_GC300)
-		gpu->identity.features |= chipFeatures_PIPE_2D;
-
 	if ((gpu->identity.model == chipModel_GC500 &&
 	     gpu->identity.revision < 2) ||
 	    (gpu->identity.model == chipModel_GC300 &&
@@ -456,9 +441,8 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu)
 				gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_5);
 	}
 
-	/* GC600/300 idle register reports zero bits where modules aren't present */
-	if (gpu->identity.model == chipModel_GC600 ||
-	    gpu->identity.model == chipModel_GC300)
+	/* GC600 idle register reports zero bits where modules aren't present */
+	if (gpu->identity.model == chipModel_GC600)
 		gpu->idle_mask = VIVS_HI_IDLE_STATE_TX |
 				 VIVS_HI_IDLE_STATE_RA |
 				 VIVS_HI_IDLE_STATE_SE |
@@ -494,14 +478,6 @@ static void etnaviv_gpu_update_clock(struct etnaviv_gpu *gpu)
 		clock |= VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(fscale);
 		etnaviv_gpu_load_clock(gpu, clock);
 	}
-
-	/*
-	 * Choose number of wait cycles to target a ~30us (1/32768) max latency
-	 * until new work is picked up by the FE when it polls in the idle loop.
-	 * If the GPU base frequency is unknown use 200 wait cycles.
-	 */
-	gpu->fe_waitcycles = clamp(gpu->base_rate_core >> (15 - gpu->freq_scale),
-				   200UL, 0xffffUL);
 }
 
 static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
@@ -523,11 +499,7 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
 		control |= VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU;
 		gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control);
 
-		if (etnaviv_is_model_rev(gpu, GC620, 0x5552)) {
-			gpu_write(gpu, 0x00800, 0x10);
-		}
-
-		if (gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) {
+		if (gpu->sec_mode == ETNA_SEC_KERNEL) {
 			gpu_write(gpu, VIVS_MMUv2_AHB_CONTROL,
 			          VIVS_MMUv2_AHB_CONTROL_RESET);
 		} else {
@@ -589,7 +561,7 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu)
 	/* We rely on the GPU running, so program the clock */
 	etnaviv_gpu_update_clock(gpu);
 
-	gpu->state = ETNA_GPU_STATE_RESET;
+	gpu->fe_running = false;
 	gpu->exec_state = -1;
 	if (gpu->mmu_context)
 		etnaviv_iommu_context_put(gpu->mmu_context);
@@ -657,6 +629,8 @@ void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch)
 			  VIVS_MMUv2_SEC_COMMAND_CONTROL_ENABLE |
 			  VIVS_MMUv2_SEC_COMMAND_CONTROL_PREFETCH(prefetch));
 	}
+
+	gpu->fe_running = true;
 }
 
 static void etnaviv_gpu_start_fe_idleloop(struct etnaviv_gpu *gpu,
@@ -665,8 +639,6 @@ static void etnaviv_gpu_start_fe_idleloop(struct etnaviv_gpu *gpu,
 	u16 prefetch;
 	u32 address;
 
-	WARN_ON(gpu->state != ETNA_GPU_STATE_INITIALIZED);
-
 	/* setup the MMU */
 	etnaviv_iommu_restore(gpu, context);
 
@@ -676,8 +648,6 @@ static void etnaviv_gpu_start_fe_idleloop(struct etnaviv_gpu *gpu,
 					&gpu->mmu_context->cmdbuf_mapping);
 
 	etnaviv_gpu_start_fe(gpu, address, prefetch);
-
-	gpu->state = ETNA_GPU_STATE_RUNNING;
 }
 
 static void etnaviv_gpu_setup_pulse_eater(struct etnaviv_gpu *gpu)
@@ -713,9 +683,6 @@ static void etnaviv_gpu_setup_pulse_eater(struct etnaviv_gpu *gpu)
 
 static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
 {
-	WARN_ON(!(gpu->state == ETNA_GPU_STATE_IDENTIFIED ||
-		  gpu->state == ETNA_GPU_STATE_RESET));
-
 	if ((etnaviv_is_model_rev(gpu, GC320, 0x5007) ||
 	     etnaviv_is_model_rev(gpu, GC320, 0x5220)) &&
 	    gpu_read(gpu, VIVS_HI_CHIP_TIME) != 0x2062400) {
@@ -752,13 +719,7 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
 		gpu_write(gpu, VIVS_MC_BUS_CONFIG, bus_config);
 	}
 
-	/* FIXME: use feature bit 5 of minor features 12, G2D_DEC400EX */
-	if (etnaviv_is_model_rev(gpu, GC620, 0x5552)) {
-		gpu_write(gpu, 0x800, 0x2010188);
-		gpu_write(gpu, 0x808, 0x3fc104);
-	}
-
-	if (gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) {
+	if (gpu->sec_mode == ETNA_SEC_KERNEL) {
 		u32 val = gpu_read(gpu, VIVS_MMUv2_AHB_CONTROL);
 		val |= VIVS_MMUv2_AHB_CONTROL_NONSEC_ACCESS;
 		gpu_write(gpu, VIVS_MMUv2_AHB_CONTROL, val);
@@ -768,14 +729,11 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu)
 	etnaviv_gpu_setup_pulse_eater(gpu);
 
 	gpu_write(gpu, VIVS_HI_INTR_ENBL, ~0U);
-
-	gpu->state = ETNA_GPU_STATE_INITIALIZED;
 }
 
 int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
 {
 	struct etnaviv_drm_private *priv = gpu->drm->dev_private;
-	dma_addr_t cmdbuf_paddr;
 	int ret, i;
 
 	ret = pm_runtime_get_sync(gpu->dev);
@@ -804,12 +762,10 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
 	 * On cores with security features supported, we claim control over the
 	 * security states.
 	 */
-	if ((gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) ||
+	if ((gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) &&
 	    (gpu->identity.minor_features10 & chipMinorFeatures10_SECURITY_AHB))
 		gpu->sec_mode = ETNA_SEC_KERNEL;
 
-	gpu->state = ETNA_GPU_STATE_IDENTIFIED;
-
 	ret = etnaviv_hw_reset(gpu);
 	if (ret) {
 		dev_err(gpu->dev, "GPU reset failed\n");
@@ -820,6 +776,28 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
 	if (ret)
 		goto fail;
 
+	/*
+	 * Set the GPU linear window to be at the end of the DMA window, where
+	 * the CMA area is likely to reside. This ensures that we are able to
+	 * map the command buffers while having the linear window overlap as
+	 * much RAM as possible, so we can optimize mappings for other buffers.
+	 *
+	 * For 3D cores only do this if MC2.0 is present, as with MC1.0 it leads
+	 * to different views of the memory on the individual engines.
+	 */
+	if (!(gpu->identity.features & chipFeatures_PIPE_3D) ||
+	    (gpu->identity.minor_features0 & chipMinorFeatures0_MC20)) {
+		u32 dma_mask = (u32)dma_get_required_mask(gpu->dev);
+		if (dma_mask < PHYS_OFFSET + SZ_2G)
+			priv->mmu_global->memory_base = PHYS_OFFSET;
+		else
+			priv->mmu_global->memory_base = dma_mask - SZ_2G + 1;
+	} else if (PHYS_OFFSET >= SZ_2G) {
+		dev_info(gpu->dev, "Need to move linear window on MC1.0, disabling TS\n");
+		priv->mmu_global->memory_base = PHYS_OFFSET;
+		gpu->identity.features &= ~chipFeatures_FAST_CLEAR;
+	}
+
 	/*
 	 * If the GPU is part of a system with DMA addressing limitations,
 	 * request pages for our SHM backend buffers from the DMA32 zone to
@@ -836,31 +814,6 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
 		goto fail;
 	}
 
-	/*
-	 * Set the GPU linear window to cover the cmdbuf region, as the GPU
-	 * won't be able to start execution otherwise. The alignment to 128M is
-	 * chosen arbitrarily but helps in debugging, as the MMU offset
-	 * calculations are much more straight forward this way.
-	 *
-	 * On MC1.0 cores the linear window offset is ignored by the TS engine,
-	 * leading to inconsistent memory views. Avoid using the offset on those
-	 * cores if possible, otherwise disable the TS feature.
-	 */
-	cmdbuf_paddr = ALIGN_DOWN(etnaviv_cmdbuf_get_pa(&gpu->buffer), SZ_128M);
-
-	if (!(gpu->identity.features & chipFeatures_PIPE_3D) ||
-	    (gpu->identity.minor_features0 & chipMinorFeatures0_MC20)) {
-		if (cmdbuf_paddr >= SZ_2G)
-			priv->mmu_global->memory_base = SZ_2G;
-		else
-			priv->mmu_global->memory_base = cmdbuf_paddr;
-	} else if (cmdbuf_paddr + SZ_128M >= SZ_2G) {
-		dev_info(gpu->dev,
-			 "Need to move linear window on MC1.0, disabling TS\n");
-		gpu->identity.features &= ~chipFeatures_FAST_CLEAR;
-		priv->mmu_global->memory_base = SZ_2G;
-	}
-
 	/* Setup event management */
 	spin_lock_init(&gpu->event_spinlock);
 	init_completion(&gpu->event_free);
@@ -876,6 +829,8 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
 	pm_runtime_mark_last_busy(gpu->dev);
 	pm_runtime_put_autosuspend(gpu->dev);
 
+	gpu->initialized = true;
+
 	return 0;
 
 fail:
@@ -1072,28 +1027,12 @@ pm_put:
 }
 #endif
 
-void etnaviv_gpu_recover_hang(struct etnaviv_gem_submit *submit)
+void etnaviv_gpu_recover_hang(struct etnaviv_gpu *gpu)
 {
-	struct etnaviv_gpu *gpu = submit->gpu;
-	char *comm = NULL, *cmd = NULL;
-	struct task_struct *task;
 	unsigned int i = 0;
 
 	dev_err(gpu->dev, "recover hung GPU!\n");
 
-	task = get_pid_task(submit->pid, PIDTYPE_PID);
-	if (task) {
-		comm = kstrdup(task->comm, GFP_KERNEL);
-		cmd = kstrdup_quotable_cmdline(task, GFP_KERNEL);
-		put_task_struct(task);
-	}
-
-	if (comm && cmd)
-		dev_err(gpu->dev, "offending task: %s (%s)\n", comm, cmd);
-
-	kfree(cmd);
-	kfree(comm);
-
 	if (pm_runtime_get_sync(gpu->dev) < 0)
 		goto pm_put;
 
@@ -1420,7 +1359,7 @@ struct dma_fence *etnaviv_gpu_submit(struct etnaviv_gem_submit *submit)
 		goto out_unlock;
 	}
 
-	if (gpu->state == ETNA_GPU_STATE_INITIALIZED)
+	if (!gpu->fe_running)
 		etnaviv_gpu_start_fe_idleloop(gpu, submit->mmu_context);
 
 	if (submit->prev_mmu_context)
@@ -1469,15 +1408,6 @@ static void sync_point_worker(struct work_struct *work)
 
 static void dump_mmu_fault(struct etnaviv_gpu *gpu)
 {
-	static const char *fault_reasons[] = {
-		"slave not present",
-		"page not present",
-		"write violation",
-		"out of bounds",
-		"read security violation",
-		"write security violation",
-	};
-
 	u32 status_reg, status;
 	int i;
 
@@ -1490,25 +1420,18 @@ static void dump_mmu_fault(struct etnaviv_gpu *gpu)
 	dev_err_ratelimited(gpu->dev, "MMU fault status 0x%08x\n", status);
 
 	for (i = 0; i < 4; i++) {
-		const char *reason = "unknown";
 		u32 address_reg;
-		u32 mmu_status;
 
-		mmu_status = (status >> (i * 4)) & VIVS_MMUv2_STATUS_EXCEPTION0__MASK;
-		if (!mmu_status)
+		if (!(status & (VIVS_MMUv2_STATUS_EXCEPTION0__MASK << (i * 4))))
 			continue;
 
-		if ((mmu_status - 1) < ARRAY_SIZE(fault_reasons))
-			reason = fault_reasons[mmu_status - 1];
-
 		if (gpu->sec_mode == ETNA_SEC_NONE)
 			address_reg = VIVS_MMUv2_EXCEPTION_ADDR(i);
 		else
 			address_reg = VIVS_MMUv2_SEC_EXCEPTION_ADDR;
 
-		dev_err_ratelimited(gpu->dev,
-				    "MMU %d fault (%s) addr 0x%08x\n",
-				    i, reason, gpu_read(gpu, address_reg));
+		dev_err_ratelimited(gpu->dev, "MMU %d fault addr 0x%08x\n", i,
+				    gpu_read(gpu, address_reg));
 	}
 }
 
@@ -1533,8 +1456,6 @@ static irqreturn_t irq_handler(int irq, void *data)
 
 		if (intr & VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION) {
 			dump_mmu_fault(gpu);
-			gpu->state = ETNA_GPU_STATE_FAULT;
-			drm_sched_fault(&gpu->sched);
 			intr &= ~VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION;
 		}
 
@@ -1645,7 +1566,7 @@ int etnaviv_gpu_wait_idle(struct etnaviv_gpu *gpu, unsigned int timeout_ms)
 
 static int etnaviv_gpu_hw_suspend(struct etnaviv_gpu *gpu)
 {
-	if (gpu->state == ETNA_GPU_STATE_RUNNING) {
+	if (gpu->initialized && gpu->fe_running) {
 		/* Replace the last WAIT with END */
 		mutex_lock(&gpu->lock);
 		etnaviv_buffer_end(gpu);
@@ -1658,13 +1579,11 @@ static int etnaviv_gpu_hw_suspend(struct etnaviv_gpu *gpu)
 		 */
 		etnaviv_gpu_wait_idle(gpu, 100);
 
-		gpu->state = ETNA_GPU_STATE_INITIALIZED;
+		gpu->fe_running = false;
 	}
 
 	gpu->exec_state = -1;
 
-	gpu->state = ETNA_GPU_STATE_IDENTIFIED;
-
 	return etnaviv_gpu_clk_disable(gpu);
 }
 
@@ -1752,11 +1671,13 @@ static int etnaviv_gpu_bind(struct device *dev, struct device *master,
 	if (ret)
 		goto out_workqueue;
 
-#ifndef CONFIG_PM
+#ifdef CONFIG_PM
+	ret = pm_runtime_get_sync(gpu->dev);
+#else
 	ret = etnaviv_gpu_clk_enable(gpu);
+#endif
 	if (ret < 0)
 		goto out_sched;
-#endif
 
 
 	gpu->drm = drm;
@@ -1769,6 +1690,9 @@ static int etnaviv_gpu_bind(struct device *dev, struct device *master,
 
 	priv->gpu[priv->num_gpus++] = gpu;
 
+	pm_runtime_mark_last_busy(gpu->dev);
+	pm_runtime_put_autosuspend(gpu->dev);
+
 	return 0;
 
 out_sched:
@@ -1806,8 +1730,11 @@ static void etnaviv_gpu_unbind(struct device *dev, struct device *master,
 	if (gpu->mmu_context)
 		etnaviv_iommu_context_put(gpu->mmu_context);
 
-	etnaviv_cmdbuf_free(&gpu->buffer);
-	etnaviv_iommu_global_fini(gpu);
+	if (gpu->initialized) {
+		etnaviv_cmdbuf_free(&gpu->buffer);
+		etnaviv_iommu_global_fini(gpu);
+		gpu->initialized = false;
+	}
 
 	gpu->drm = NULL;
 	idr_destroy(&gpu->fence_idr);
@@ -1842,8 +1769,7 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev)
 
 	gpu->dev = &pdev->dev;
 	mutex_init(&gpu->lock);
-	mutex_init(&gpu->sched_lock);
-	mutex_init(&gpu->idr_lock);
+	mutex_init(&gpu->fence_lock);
 
 	/* Map registers: */
 	gpu->mmio = devm_platform_ioremap_resource(pdev, 0);
@@ -1948,7 +1874,7 @@ static int etnaviv_gpu_rpm_resume(struct device *dev)
 		return ret;
 
 	/* Re-initialise the basic hardware state */
-	if (gpu->state == ETNA_GPU_STATE_IDENTIFIED) {
+	if (gpu->drm && gpu->initialized) {
 		ret = etnaviv_gpu_hw_resume(gpu);
 		if (ret) {
 			etnaviv_gpu_clk_disable(gpu);

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

@@ -91,15 +91,6 @@ struct clk;
 
 #define ETNA_NR_EVENTS 30
 
-enum etnaviv_gpu_state {
-	ETNA_GPU_STATE_UNKNOWN = 0,
-	ETNA_GPU_STATE_IDENTIFIED,
-	ETNA_GPU_STATE_RESET,
-	ETNA_GPU_STATE_INITIALIZED,
-	ETNA_GPU_STATE_RUNNING,
-	ETNA_GPU_STATE_FAULT,
-};
-
 struct etnaviv_gpu {
 	struct drm_device *drm;
 	struct thermal_cooling_device *cooling;
@@ -108,9 +99,9 @@ struct etnaviv_gpu {
 	struct etnaviv_chip_identity identity;
 	enum etnaviv_sec_mode sec_mode;
 	struct workqueue_struct *wq;
-	struct mutex sched_lock;
 	struct drm_gpu_scheduler sched;
-	enum etnaviv_gpu_state state;
+	bool initialized;
+	bool fe_running;
 
 	/* 'ring'-buffer: */
 	struct etnaviv_cmdbuf buffer;
@@ -125,7 +116,7 @@ struct etnaviv_gpu {
 	u32 idle_mask;
 
 	/* Fencing support */
-	struct mutex idr_lock;
+	struct mutex fence_lock;
 	struct idr fence_idr;
 	u32 next_fence;
 	u32 completed_fence;
@@ -154,7 +145,6 @@ struct etnaviv_gpu {
 	struct clk *clk_shader;
 
 	unsigned int freq_scale;
-	unsigned int fe_waitcycles;
 	unsigned long base_rate_core;
 	unsigned long base_rate_shader;
 };
@@ -178,7 +168,7 @@ bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu);
 int etnaviv_gpu_debugfs(struct etnaviv_gpu *gpu, struct seq_file *m);
 #endif
 
-void etnaviv_gpu_recover_hang(struct etnaviv_gem_submit *submit);
+void etnaviv_gpu_recover_hang(struct etnaviv_gpu *gpu);
 void etnaviv_gpu_retire(struct etnaviv_gpu *gpu);
 int etnaviv_gpu_wait_fence_interruptible(struct etnaviv_gpu *gpu,
 	u32 fence, struct drm_etnaviv_timespec *timeout);

drivers/gpu/drm/etnaviv/etnaviv_hwdb.c

@@ -37,37 +37,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
 		.minor_features10 = 0x0,
 		.minor_features11 = 0x0,
 	},
-	{
-		.model = 0x620,
-		.revision = 0x5552,
-		.product_id = 0x6200,
-		.customer_id = 0x20b,
-		.eco_id = 0,
-		.stream_count = 1,
-		.register_max = 64,
-		.thread_count = 256,
-		.shader_core_count = 1,
-		.vertex_cache_size = 8,
-		.vertex_output_buffer_size = 512,
-		.pixel_pipes = 1,
-		.instruction_count = 256,
-		.num_constants = 168,
-		.buffer_size = 0,
-		.varyings_count = 8,
-		.features = 0x001b4a40,
-		.minor_features0 = 0xa0600080,
-		.minor_features1 = 0x18050000,
-		.minor_features2 = 0x04f30000,
-		.minor_features3 = 0x00060005,
-		.minor_features4 = 0x20629000,
-		.minor_features5 = 0x0003380c,
-		.minor_features6 = 0x00000000,
-		.minor_features7 = 0x00001000,
-		.minor_features8 = 0x00000000,
-		.minor_features9 = 0x00000180,
-		.minor_features10 = 0x00004000,
-		.minor_features11 = 0x00000000,
-	},
 	{
 		.model = 0x7000,
 		.revision = 0x6214,

drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c

@@ -186,14 +186,6 @@ static void etnaviv_iommuv2_restore_nonsec(struct etnaviv_gpu *gpu,
 	gpu_write(gpu, VIVS_MMUv2_CONTROL, VIVS_MMUv2_CONTROL_ENABLE);
 }
 
-void etnaviv_iommuv2_update_pta_entry(struct etnaviv_iommu_context *context)
-{
-	struct etnaviv_iommuv2_context *v2_context = to_v2_context(context);
-
-	context->global->v2.pta_cpu[v2_context->id] = v2_context->mtlb_dma |
-					VIVS_MMUv2_CONFIGURATION_MODE_MODE4_K;
-}
-
 static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu,
 	struct etnaviv_iommu_context *context)
 {
@@ -224,7 +216,8 @@ static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu,
 		  VIVS_MMUv2_SAFE_ADDRESS_CONFIG_SEC_SAFE_ADDR_HIGH(
 		  upper_32_bits(context->global->bad_page_dma)));
 
-	etnaviv_iommuv2_update_pta_entry(context);
+	context->global->v2.pta_cpu[v2_context->id] = v2_context->mtlb_dma |
+				 	 VIVS_MMUv2_CONFIGURATION_MODE_MODE4_K;
 
 	/* trigger a PTA load through the FE */
 	prefetch = etnaviv_buffer_config_pta(gpu, v2_context->id);
@@ -248,7 +241,6 @@ unsigned short etnaviv_iommuv2_get_pta_id(struct etnaviv_iommu_context *context)
 
 	return v2_context->id;
 }
-
 static void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu,
 				    struct etnaviv_iommu_context *context)
 {
@@ -284,8 +276,6 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global)
 	if (!v2_context)
 		return NULL;
 
-	v2_context->id = 0;
-#if 0
 	mutex_lock(&global->lock);
 	v2_context->id = find_first_zero_bit(global->v2.pta_alloc,
 					     ETNAVIV_PTA_ENTRIES);
@@ -296,7 +286,6 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global)
 		goto out_free;
 	}
 	mutex_unlock(&global->lock);
-#endif
 
 	v2_context->mtlb_cpu = dma_alloc_wc(global->dev, SZ_4K,
 					    &v2_context->mtlb_dma, GFP_KERNEL);

drivers/gpu/drm/etnaviv/etnaviv_mmu.c

@@ -80,10 +80,10 @@ static int etnaviv_iommu_map(struct etnaviv_iommu_context *context, u32 iova,
 		return -EINVAL;
 
 	for_each_sgtable_dma_sg(sgt, sg, i) {
-		phys_addr_t pa = sg_dma_address(sg) - sg->offset;
+		u32 pa = sg_dma_address(sg) - sg->offset;
 		size_t bytes = sg_dma_len(sg) + sg->offset;
 
-		VERB("map[%d]: %08x %pap(%zx)", i, iova, &pa, bytes);
+		VERB("map[%d]: %08x %08x(%zx)", i, iova, pa, bytes);
 
 		ret = etnaviv_context_map(context, da, pa, bytes, prot);
 		if (ret)
@@ -92,8 +92,6 @@ static int etnaviv_iommu_map(struct etnaviv_iommu_context *context, u32 iova,
 		da += bytes;
 	}
 
-	context->flush_seq++;
-
 	return 0;
 
 fail:
@@ -119,8 +117,6 @@ static void etnaviv_iommu_unmap(struct etnaviv_iommu_context *context, u32 iova,
 
 		da += bytes;
 	}
-
-	context->flush_seq++;
 }
 
 static void etnaviv_iommu_remove_mapping(struct etnaviv_iommu_context *context,
@@ -128,26 +124,11 @@ static void etnaviv_iommu_remove_mapping(struct etnaviv_iommu_context *context,
 {
 	struct etnaviv_gem_object *etnaviv_obj = mapping->object;
 
-	lockdep_assert_held(&context->lock);
-
 	etnaviv_iommu_unmap(context, mapping->vram_node.start,
 			    etnaviv_obj->sgt, etnaviv_obj->base.size);
 	drm_mm_remove_node(&mapping->vram_node);
 }
 
-void etnaviv_iommu_reap_mapping(struct etnaviv_vram_mapping *mapping)
-{
-	struct etnaviv_iommu_context *context = mapping->context;
-
-	lockdep_assert_held(&context->lock);
-	WARN_ON(mapping->use);
-
-	etnaviv_iommu_remove_mapping(context, mapping);
-	etnaviv_iommu_context_put(mapping->context);
-	mapping->context = NULL;
-	list_del_init(&mapping->mmu_node);
-}
-
 static int etnaviv_iommu_find_iova(struct etnaviv_iommu_context *context,
 				   struct drm_mm_node *node, size_t size)
 {
@@ -215,7 +196,10 @@ static int etnaviv_iommu_find_iova(struct etnaviv_iommu_context *context,
 		 * this mapping.
 		 */
 		list_for_each_entry_safe(m, n, &list, scan_node) {
-			etnaviv_iommu_reap_mapping(m);
+			etnaviv_iommu_remove_mapping(context, m);
+			etnaviv_iommu_context_put(m->context);
+			m->context = NULL;
+			list_del_init(&m->mmu_node);
 			list_del_init(&m->scan_node);
 		}
 
@@ -233,44 +217,6 @@ static int etnaviv_iommu_find_iova(struct etnaviv_iommu_context *context,
 static int etnaviv_iommu_insert_exact(struct etnaviv_iommu_context *context,
 		   struct drm_mm_node *node, size_t size, u64 va)
 {
-	struct etnaviv_vram_mapping *m, *n;
-	struct drm_mm_node *scan_node;
-	LIST_HEAD(scan_list);
-	int ret;
-
-	lockdep_assert_held(&context->lock);
-
-	ret = drm_mm_insert_node_in_range(&context->mm, node, size, 0, 0, va,
-					  va + size, DRM_MM_INSERT_LOWEST);
-	if (ret != -ENOSPC)
-		return ret;
-
-	/*
-	 * When we can't insert the node, due to a existing mapping blocking
-	 * the address space, there are two possible reasons:
-	 * 1. Userspace genuinely messed up and tried to reuse address space
-	 * before the last job using this VMA has finished executing.
-	 * 2. The existing buffer mappings are idle, but the buffers are not
-	 * destroyed yet (likely due to being referenced by another context) in
-	 * which case the mappings will not be cleaned up and we must reap them
-	 * here to make space for the new mapping.
-	 */
-
-	drm_mm_for_each_node_in_range(scan_node, &context->mm, va, va + size) {
-		m = container_of(scan_node, struct etnaviv_vram_mapping,
-				 vram_node);
-
-		if (m->use)
-			return -ENOSPC;
-
-		list_add(&m->scan_node, &scan_list);
-	}
-
-	list_for_each_entry_safe(m, n, &scan_list, scan_node) {
-		etnaviv_iommu_reap_mapping(m);
-		list_del_init(&m->scan_node);
-	}
-
 	return drm_mm_insert_node_in_range(&context->mm, node, size, 0, 0, va,
 					   va + size, DRM_MM_INSERT_LOWEST);
 }
@@ -295,7 +241,6 @@ int etnaviv_iommu_map_gem(struct etnaviv_iommu_context *context,
 		iova = sg_dma_address(sgt->sgl) - memory_base;
 		if (iova < 0x80000000 - sg_dma_len(sgt->sgl)) {
 			mapping->iova = iova;
-			mapping->context = etnaviv_iommu_context_get(context);
 			list_add_tail(&mapping->mmu_node, &context->mappings);
 			ret = 0;
 			goto unlock;
@@ -322,8 +267,8 @@ int etnaviv_iommu_map_gem(struct etnaviv_iommu_context *context,
 		goto unlock;
 	}
 
-	mapping->context = etnaviv_iommu_context_get(context);
 	list_add_tail(&mapping->mmu_node, &context->mappings);
+	context->flush_seq++;
 unlock:
 	mutex_unlock(&context->lock);
 
@@ -337,19 +282,13 @@ void etnaviv_iommu_unmap_gem(struct etnaviv_iommu_context *context,
 
 	mutex_lock(&context->lock);
 
-	/* Bail if the mapping has been reaped by another thread */
-	if (!mapping->context) {
-		mutex_unlock(&context->lock);
-		return;
-	}
-
 	/* If the vram node is on the mm, unmap and remove the node */
 	if (mapping->vram_node.mm == &context->mm)
 		etnaviv_iommu_remove_mapping(context, mapping);
 
 	list_del(&mapping->mmu_node);
+	context->flush_seq++;
 	mutex_unlock(&context->lock);
-	etnaviv_iommu_context_put(context);
 }
 
 static void etnaviv_iommu_context_free(struct kref *kref)
@@ -553,9 +492,6 @@ void etnaviv_iommu_global_fini(struct etnaviv_gpu *gpu)
 	struct etnaviv_drm_private *priv = gpu->drm->dev_private;
 	struct etnaviv_iommu_global *global = priv->mmu_global;
 
-	if (!global)
-		return;
-
 	if (--global->use > 0)
 		return;
 

drivers/gpu/drm/etnaviv/etnaviv_mmu.h

@@ -91,7 +91,6 @@ int etnaviv_iommu_map_gem(struct etnaviv_iommu_context *context,
 	struct etnaviv_vram_mapping *mapping, u64 va);
 void etnaviv_iommu_unmap_gem(struct etnaviv_iommu_context *context,
 	struct etnaviv_vram_mapping *mapping);
-void etnaviv_iommu_reap_mapping(struct etnaviv_vram_mapping *mapping);
 
 int etnaviv_iommu_get_suballoc_va(struct etnaviv_iommu_context *ctx,
 				  struct etnaviv_vram_mapping *mapping,
@@ -124,6 +123,4 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global);
 u32 etnaviv_iommuv2_get_mtlb_addr(struct etnaviv_iommu_context *context);
 unsigned short etnaviv_iommuv2_get_pta_id(struct etnaviv_iommu_context *context);
 
-void etnaviv_iommuv2_update_pta_entry(struct etnaviv_iommu_context *context);
-
 #endif /* __ETNAVIV_MMU_H__ */

drivers/gpu/drm/etnaviv/etnaviv_sched.c

@@ -106,9 +106,8 @@ static void etnaviv_sched_timedout_job(struct drm_sched_job *sched_job)
 	 */
 	dma_addr = gpu_read(gpu, VIVS_FE_DMA_ADDRESS);
 	change = dma_addr - gpu->hangcheck_dma_addr;
-	if (gpu->state == ETNA_GPU_STATE_RUNNING &&
-	    (gpu->completed_fence != gpu->hangcheck_fence ||
-	     change < 0 || change > 16)) {
+	if (gpu->completed_fence != gpu->hangcheck_fence ||
+	    change < 0 || change > 16) {
 		gpu->hangcheck_dma_addr = dma_addr;
 		gpu->hangcheck_fence = gpu->completed_fence;
 		goto out_no_timeout;
@@ -119,7 +118,7 @@ static void etnaviv_sched_timedout_job(struct drm_sched_job *sched_job)
 
 	/* get the GPU back into the init state */
 	etnaviv_core_dump(submit);
-	etnaviv_gpu_recover_hang(submit);
+	etnaviv_gpu_recover_hang(gpu);
 
 	drm_sched_resubmit_jobs(&gpu->sched);
 
@@ -147,16 +146,14 @@ static const struct drm_sched_backend_ops etnaviv_sched_ops = {
 int etnaviv_sched_push_job(struct drm_sched_entity *sched_entity,
 			   struct etnaviv_gem_submit *submit)
 {
-	struct etnaviv_gpu *gpu = submit->gpu;
 	int ret = 0;
 
 	/*
 	 * Hold the fence lock across the whole operation to avoid jobs being
-	 * Hold the sched lock across the whole operation to avoid jobs being
 	 * pushed out of order with regard to their sched fence seqnos as
 	 * allocated in drm_sched_job_init.
 	 */
-	mutex_lock(&gpu->sched_lock);
+	mutex_lock(&submit->gpu->fence_lock);
 
 	ret = drm_sched_job_init(&submit->sched_job, sched_entity,
 				 submit->ctx);
@@ -164,11 +161,9 @@ int etnaviv_sched_push_job(struct drm_sched_entity *sched_entity,
 		goto out_unlock;
 
 	submit->out_fence = dma_fence_get(&submit->sched_job.s_fence->finished);
-	mutex_lock(&gpu->idr_lock);
-	submit->out_fence_id = idr_alloc_cyclic(&gpu->fence_idr,
+	submit->out_fence_id = idr_alloc_cyclic(&submit->gpu->fence_idr,
 						submit->out_fence, 0,
 						INT_MAX, GFP_KERNEL);
-	mutex_unlock(&gpu->idr_lock);
 	if (submit->out_fence_id < 0) {
 		drm_sched_job_cleanup(&submit->sched_job);
 		ret = -ENOMEM;
@@ -181,7 +176,7 @@ int etnaviv_sched_push_job(struct drm_sched_entity *sched_entity,
 	drm_sched_entity_push_job(&submit->sched_job, sched_entity);
 
 out_unlock:
-	mutex_unlock(&gpu->sched_lock);
+	mutex_unlock(&submit->gpu->fence_lock);
 
 	return ret;
 }

drivers/gpu/drm/img-rogue/Kconfig

@@ -1,24 +0,0 @@
-config DRM_POWERVR_ROGUE
-	tristate "PowerVR Rogue"
-	depends on HAS_IOMEM
-	depends on DRM
-	select DRM_KMS_HELPER
-	select PM_DEVFREQ
-	select DEVFREQ_GOV_SIMPLE_ONDEMAND
-	select PM_OPP
-	select DEVFREQ_THERMAL
-	select SYNC_FILE
-	help
-	  Driver for PowerVR Rogue graphics hardware.
-
-	  Say Y here if your SoC contains a PowerVR Rogue GPU. For more
-	  information, see <http://www.imgtec.com/powervr/>.
-
-config DRM_POWERVR_ROGUE_DEBUG
-	bool "Enable PowerVR Rogue debug features"
-	depends on DRM_POWERVR_ROGUE
-	default n
-	help
-	  Add additional debug features to the PowerVR Rogue driver.
-	  To build a matching userspace, enable the following build options:
-	  BUILD=debug SUPPORT_PAGE_FAULT_DEBUG=1 PVRSRV_ENABLE_GPU_MEMORY_INFO=1

drivers/gpu/drm/img-rogue/Makefile

@@ -1,19 +0,0 @@
-img_basedir := $(srctree)/$(src)
-include $(img_basedir)/config_kernel.mk
-
-obj-$(CONFIG_DRM_POWERVR_ROGUE) += pvrsrvkm.o
-
-ccflags-y += \
- -include config_kernel.h \
- -I$(img_basedir)/include/drm \
- -I$(img_basedir) \
- -I$(img_basedir)/include \
- -I$(img_basedir)/km \
- -I$(img_basedir)/system \
- -D__linux__
-
-include $(img_basedir)/pvrsrvkm.mk
-
-obj-$(CONFIG_DRM_POWERVR_ROGUE)	+= drm_nulldisp.o
-
-drm_nulldisp-y	+= drm_nulldisp_drv.o drm_nulldisp_netlink.o drm_netlink_gem.o drm_nulldisp_gem.o

drivers/gpu/drm/img-rogue/allocmem.c

@@ -1,422 +0,0 @@
-/*************************************************************************/ /*!
-@File
-@Title          Host memory management implementation for Linux
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/ /**************************************************************************/
-
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-
-#include "img_defs.h"
-#include "allocmem.h"
-#include "pvr_debug.h"
-#include "process_stats.h"
-#if defined(DEBUG) && defined(SUPPORT_VALIDATION)
-#include "pvrsrv.h"
-#endif
-#include "osfunc.h"
-
-
-/*
- * When memory statistics are disabled, memory records are used instead.
- * In order for these to work, the PID of the process that requested the
- * allocation needs to be stored at the end of the kmalloc'd memory, making
- * sure 4 extra bytes are allocated to fit the PID.
- *
- * There is no need for this extra allocation when memory statistics are
- * enabled, since all allocations are tracked in DebugFS mem_area files.
- */
-#if defined(PVRSRV_ENABLE_PROCESS_STATS) && !defined(PVRSRV_ENABLE_MEMORY_STATS)
-#define ALLOCMEM_MEMSTATS_PADDING sizeof(IMG_UINT32)
-#else
-#define ALLOCMEM_MEMSTATS_PADDING 0UL
-#endif
-
-/* How many times kmalloc can fail before the allocation threshold is reduced */
-static const IMG_UINT32 g_ui32kmallocFailLimit = 10;
-/* How many kmalloc failures happened since the last allocation threshold change */
-static IMG_UINT32 g_ui32kmallocFailCount = 0;
-/* Current kmalloc threshold value in bytes */
-static IMG_UINT32 g_ui32kmallocThreshold = PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD;
-/* Spinlock used so that the global variables above may not be modified by more than 1 thread at a time */
-static DEFINE_SPINLOCK(kmalloc_lock);
-
-#if defined(DEBUG) && defined(SUPPORT_VALIDATION)
-static DEFINE_SPINLOCK(kmalloc_leak_lock);
-static IMG_UINT32 g_ui32kmallocLeakCounter = 0;
-#endif
-
-static inline void OSTryDecreaseKmallocThreshold(void)
-{
-	unsigned long flags;
-	spin_lock_irqsave(&kmalloc_lock, flags);
-
-	g_ui32kmallocFailCount++;
-
-	if (g_ui32kmallocFailCount >= g_ui32kmallocFailLimit)
-	{
-		g_ui32kmallocFailCount = 0;
-		if (g_ui32kmallocThreshold > PAGE_SIZE)
-		{
-			g_ui32kmallocThreshold >>= 1;
-			printk(KERN_INFO "Threshold is now set to %d\n", g_ui32kmallocThreshold);
-		}
-	}
-
-	spin_unlock_irqrestore(&kmalloc_lock, flags);
-}
-
-static inline void OSResetKmallocFailCount(void)
-{
-	unsigned long flags;
-	spin_lock_irqsave(&kmalloc_lock, flags);
-
-	g_ui32kmallocFailCount = 0;
-
-	spin_unlock_irqrestore(&kmalloc_lock, flags);
-}
-
-static inline void _pvr_vfree(const void* pvAddr)
-{
-#if defined(DEBUG)
-	/* Size harder to come by for vmalloc and since vmalloc allocates
-	 * a whole number of pages, poison the minimum size known to have
-	 * been allocated.
-	 */
-	OSCachedMemSet((void*)pvAddr, PVRSRV_POISON_ON_ALLOC_VALUE,
-	               PAGE_SIZE);
-#endif
-	vfree(pvAddr);
-}
-
-static inline void _pvr_kfree(const void* pvAddr)
-{
-#if defined(DEBUG)
-	/* Poison whole memory block */
-	OSCachedMemSet((void*)pvAddr, PVRSRV_POISON_ON_ALLOC_VALUE,
-	               ksize(pvAddr));
-#endif
-	kfree(pvAddr);
-}
-
-static inline void _pvr_alloc_stats_add(void *pvAddr, IMG_UINT32 ui32Size DEBUG_MEMSTATS_PARAMS)
-{
-#if !defined(PVRSRV_ENABLE_PROCESS_STATS)
-	PVR_UNREFERENCED_PARAMETER(pvAddr);
-#else
-	if (!is_vmalloc_addr(pvAddr))
-	{
-#if defined(PVRSRV_ENABLE_MEMORY_STATS)
-		IMG_CPU_PHYADDR sCpuPAddr;
-		sCpuPAddr.uiAddr = 0;
-
-		PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
-									  pvAddr,
-									  sCpuPAddr,
-									  ksize(pvAddr),
-									  NULL,
-									  OSGetCurrentClientProcessIDKM()
-									  DEBUG_MEMSTATS_ARGS);
-#else
-		{
-			/* Store the PID in the final additional 4 bytes allocated */
-			IMG_UINT32 *puiTemp = IMG_OFFSET_ADDR(pvAddr, ksize(pvAddr) - ALLOCMEM_MEMSTATS_PADDING);
-			*puiTemp = OSGetCurrentClientProcessIDKM();
-		}
-		PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, ksize(pvAddr), OSGetCurrentClientProcessIDKM());
-#endif /* defined(PVRSRV_ENABLE_MEMORY_STATS) */
-	}
-	else
-	{
-#if defined(PVRSRV_ENABLE_MEMORY_STATS)
-		IMG_CPU_PHYADDR sCpuPAddr;
-		sCpuPAddr.uiAddr = 0;
-
-		PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
-									  pvAddr,
-									  sCpuPAddr,
-									  ((ui32Size + PAGE_SIZE-1) & ~(PAGE_SIZE-1)),
-									  NULL,
-									  OSGetCurrentClientProcessIDKM()
-									  DEBUG_MEMSTATS_ARGS);
-#else
-		PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
-		                                    ((ui32Size + PAGE_SIZE-1) & ~(PAGE_SIZE-1)),
-		                                    (IMG_UINT64)(uintptr_t) pvAddr,
-		                                    OSGetCurrentClientProcessIDKM());
-#endif /* defined(PVRSRV_ENABLE_MEMORY_STATS) */
-	}
-#endif /* !defined(PVRSRV_ENABLE_PROCESS_STATS) */
-}
-
-static inline void _pvr_alloc_stats_remove(void *pvAddr)
-{
-#if !defined(PVRSRV_ENABLE_PROCESS_STATS)
-	PVR_UNREFERENCED_PARAMETER(pvAddr);
-#else
-	if (!is_vmalloc_addr(pvAddr))
-	{
-#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
-		{
-			IMG_UINT32 *puiTemp = IMG_OFFSET_ADDR(pvAddr, ksize(pvAddr) - ALLOCMEM_MEMSTATS_PADDING);
-			PVRSRVStatsDecrMemKAllocStat(ksize(pvAddr), *puiTemp);
-		}
-#else
-		PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
-		                                (IMG_UINT64)(uintptr_t) pvAddr,
-		                                OSGetCurrentClientProcessIDKM());
-#endif
-	}
-	else
-	{
-#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
-		PVRSRVStatsDecrMemAllocStatAndUntrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
-		                                      (IMG_UINT64)(uintptr_t) pvAddr);
-#else
-		PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
-		                                (IMG_UINT64)(uintptr_t) pvAddr,
-		                                OSGetCurrentClientProcessIDKM());
-#endif
-	}
-#endif /* !defined(PVRSRV_ENABLE_PROCESS_STATS) */
-}
-
-void *(OSAllocMem)(IMG_UINT32 ui32Size DEBUG_MEMSTATS_PARAMS)
-{
-	void *pvRet = NULL;
-
-	if ((ui32Size + ALLOCMEM_MEMSTATS_PADDING) <= g_ui32kmallocThreshold)
-	{
-		pvRet = kmalloc(ui32Size + ALLOCMEM_MEMSTATS_PADDING, GFP_KERNEL);
-		if (pvRet == NULL)
-		{
-			OSTryDecreaseKmallocThreshold();
-		}
-		else
-		{
-			OSResetKmallocFailCount();
-		}
-	}
-
-	if (pvRet == NULL)
-	{
-		pvRet = vmalloc(ui32Size);
-	}
-
-	if (pvRet != NULL)
-	{
-		_pvr_alloc_stats_add(pvRet, ui32Size DEBUG_MEMSTATS_ARGS);
-	}
-
-	return pvRet;
-}
-
-void *(OSAllocZMem)(IMG_UINT32 ui32Size DEBUG_MEMSTATS_PARAMS)
-{
-	void *pvRet = NULL;
-
-	if ((ui32Size + ALLOCMEM_MEMSTATS_PADDING) <= g_ui32kmallocThreshold)
-	{
-		pvRet = kzalloc(ui32Size + ALLOCMEM_MEMSTATS_PADDING, GFP_KERNEL);
-		if (pvRet == NULL)
-		{
-			OSTryDecreaseKmallocThreshold();
-		}
-		else
-		{
-			OSResetKmallocFailCount();
-		}
-	}
-
-	if (pvRet == NULL)
-	{
-		pvRet = vzalloc(ui32Size);
-	}
-
-	if (pvRet != NULL)
-	{
-		_pvr_alloc_stats_add(pvRet, ui32Size DEBUG_MEMSTATS_ARGS);
-	}
-
-	return pvRet;
-}
-
-/*
- * The parentheses around OSFreeMem prevent the macro in allocmem.h from
- * applying, as it would break the function's definition.
- */
-void (OSFreeMem)(void *pvMem)
-{
-#if defined(DEBUG) && defined(SUPPORT_VALIDATION)
-	unsigned long flags;
-	PVRSRV_DATA *psPVRSRVData = PVRSRVGetPVRSRVData();
-
-	if (psPVRSRVData)
-	{
-		IMG_UINT32 ui32kmallocLeakMax = psPVRSRVData->sMemLeakIntervals.ui32OSAlloc;
-
-		spin_lock_irqsave(&kmalloc_leak_lock, flags);
-
-		g_ui32kmallocLeakCounter++;
-		if (ui32kmallocLeakMax && (g_ui32kmallocLeakCounter >= ui32kmallocLeakMax))
-		{
-			g_ui32kmallocLeakCounter = 0;
-			spin_unlock_irqrestore(&kmalloc_leak_lock, flags);
-
-			PVR_DPF((PVR_DBG_WARNING,
-			         "%s: Skipped freeing of pointer 0x%p to trigger memory leak.",
-			         __func__,
-			         pvMem));
-			return;
-		}
-
-		spin_unlock_irqrestore(&kmalloc_leak_lock, flags);
-	}
-#endif
-	if (pvMem != NULL)
-	{
-		_pvr_alloc_stats_remove(pvMem);
-
-		if (!is_vmalloc_addr(pvMem))
-		{
-			_pvr_kfree(pvMem);
-		}
-		else
-		{
-			_pvr_vfree(pvMem);
-		}
-	}
-}
-
-void *OSAllocMemNoStats(IMG_UINT32 ui32Size)
-{
-	void *pvRet = NULL;
-
-	if (ui32Size <= g_ui32kmallocThreshold)
-	{
-		pvRet = kmalloc(ui32Size, GFP_KERNEL);
-		if (pvRet == NULL)
-		{
-			OSTryDecreaseKmallocThreshold();
-		}
-		else
-		{
-			OSResetKmallocFailCount();
-		}
-	}
-
-	if (pvRet == NULL)
-	{
-		pvRet = vmalloc(ui32Size);
-	}
-
-	return pvRet;
-}
-
-void *OSAllocZMemNoStats(IMG_UINT32 ui32Size)
-{
-	void *pvRet = NULL;
-
-	if (ui32Size <= g_ui32kmallocThreshold)
-	{
-		pvRet = kzalloc(ui32Size, GFP_KERNEL);
-		if (pvRet == NULL)
-		{
-			OSTryDecreaseKmallocThreshold();
-		}
-		else
-		{
-			OSResetKmallocFailCount();
-		}
-	}
-
-	if (pvRet == NULL)
-	{
-		pvRet = vzalloc(ui32Size);
-	}
-
-	return pvRet;
-}
-
-/*
- * The parentheses around OSFreeMemNoStats prevent the macro in allocmem.h from
- * applying, as it would break the function's definition.
- */
-void (OSFreeMemNoStats)(void *pvMem)
-{
-#if defined(DEBUG) && defined(SUPPORT_VALIDATION)
-	unsigned long flags;
-	PVRSRV_DATA *psPVRSRVData = PVRSRVGetPVRSRVData();
-
-	if (psPVRSRVData)
-	{
-		IMG_UINT32 ui32kmallocLeakMax = psPVRSRVData->sMemLeakIntervals.ui32OSAlloc;
-
-		spin_lock_irqsave(&kmalloc_leak_lock, flags);
-
-		g_ui32kmallocLeakCounter++;
-		if (ui32kmallocLeakMax && (g_ui32kmallocLeakCounter >= ui32kmallocLeakMax))
-		{
-			g_ui32kmallocLeakCounter = 0;
-			spin_unlock_irqrestore(&kmalloc_leak_lock, flags);
-
-			PVR_DPF((PVR_DBG_WARNING,
-			         "%s: Skipped freeing of pointer 0x%p to trigger memory leak.",
-			         __func__,
-			         pvMem));
-			return;
-		}
-
-		spin_unlock_irqrestore(&kmalloc_leak_lock, flags);
-	}
-#endif
-	if (pvMem != NULL)
-	{
-		if (!is_vmalloc_addr(pvMem))
-		{
-			_pvr_kfree(pvMem);
-		}
-		else
-		{
-			_pvr_vfree(pvMem);
-		}
-	}
-}

drivers/gpu/drm/img-rogue/allocmem.h

@@ -1,224 +0,0 @@
-/*************************************************************************/ /*!
-@File           allocmem.h
-@Title          memory allocation header
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Memory-Allocation API definitions
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/ /**************************************************************************/
-
-#ifndef ALLOCMEM_H
-#define ALLOCMEM_H
-
-#include "img_types.h"
-#include "pvr_debug.h"
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*
- * PVRSRV_ENABLE_PROCESS_STATS enables process statistics regarding events,
- *     resources and memory across all processes
- * PVRSRV_ENABLE_MEMORY_STATS enables recording of Linux kernel memory
- *     allocations, provided that PVRSRV_ENABLE_PROCESS_STATS is enabled
- *   - Output can be found in:
- *     /(sys/kernel/debug|proc)/pvr/proc_stats/[live|retired]_pids_stats/mem_area
- * PVRSRV_DEBUG_LINUX_MEMORY_STATS provides more details about memory
- *     statistics in conjunction with PVRSRV_ENABLE_MEMORY_STATS
- * PVRSRV_DEBUG_LINUX_MEMORY_STATS_ON is defined to encompass both memory
- *     allocation statistics functionalities described above in a single macro
- */
-#if defined(PVRSRV_ENABLE_PROCESS_STATS) && defined(PVRSRV_ENABLE_MEMORY_STATS) && defined(PVRSRV_DEBUG_LINUX_MEMORY_STATS) && defined(DEBUG)
-#define PVRSRV_DEBUG_LINUX_MEMORY_STATS_ON
-#endif
-
-/*
- * When using detailed memory allocation statistics, the line number and
- * file name where the allocation happened are also provided.
- * When this feature is not used, these parameters are not needed.
- */
-#if defined(PVRSRV_DEBUG_LINUX_MEMORY_STATS_ON)
-#define DEBUG_MEMSTATS_PARAMS ,void *pvAllocFromFile, IMG_UINT32 ui32AllocFromLine
-#define DEBUG_MEMSTATS_ARGS   ,pvAllocFromFile, ui32AllocFromLine
-#define DEBUG_MEMSTATS_UNREF  (void)pvAllocFromFile; (void)ui32AllocFromLine;
-#define DEBUG_MEMSTATS_VALUES ,__FILE__, __LINE__
-#else
-#define DEBUG_MEMSTATS_PARAMS /*!<
-                                 * Used for PVRSRV_DEBUG_LINUX_MEMORY_STATS_ON
-                                 * build option. */
-#define DEBUG_MEMSTATS_ARGS   /*!<
-                                 * Used for PVRSRV_DEBUG_LINUX_MEMORY_STATS_ON
-                                 * build option. */
-#define DEBUG_MEMSTATS_UNREF  /*!<
-                                 * Used for PVRSRV_DEBUG_LINUX_MEMORY_STATS_ON
-                                 * build option. */
-#define DEBUG_MEMSTATS_VALUES  /*!<
-                                 * Used for PVRSRV_DEBUG_LINUX_MEMORY_STATS_ON
-                                 * build option. */
-#endif
-
-
-/**************************************************************************/ /*!
-@Function       OSAllocMem
-@Description    Allocates CPU memory. Contents are uninitialized.
-                If passed a size of zero, function should not assert,
-                but just return a NULL pointer.
-@Input          ui32Size        Size of required allocation (in bytes)
-@Return         Pointer to allocated memory on success.
-                Otherwise NULL.
- */ /**************************************************************************/
-#if defined(DOXYGEN)
-void *OSAllocMem(IMG_UINT32 ui32Size);
-#else
-void *OSAllocMem(IMG_UINT32 ui32Size DEBUG_MEMSTATS_PARAMS);
-#define OSAllocMem(_size)	(OSAllocMem)((_size) DEBUG_MEMSTATS_VALUES)
-#endif
-
-/**************************************************************************/ /*!
-@Function       OSAllocZMem
-@Description    Allocates CPU memory and initializes the contents to zero.
-                If passed a size of zero, function should not assert,
-                but just return a NULL pointer.
-@Input          ui32Size        Size of required allocation (in bytes)
-@Return         Pointer to allocated memory on success.
-                Otherwise NULL.
- */ /**************************************************************************/
-#if defined(DOXYGEN)
-void *OSAllocZMem(IMG_UINT32 ui32Size);
-#else
-void *OSAllocZMem(IMG_UINT32 ui32Size DEBUG_MEMSTATS_PARAMS);
-#define OSAllocZMem(_size)	(OSAllocZMem)((_size) DEBUG_MEMSTATS_VALUES)
-#endif
-
-
-/**************************************************************************/ /*!
-@Function       OSAllocMemNoStats
-@Description    Allocates CPU memory. Contents are uninitialized.
-                 If passed a size of zero, function should not assert,
-                 but just return a NULL pointer.
-                 The allocated memory is not accounted for by process stats.
-                 Process stats are an optional feature (enabled only when
-                 PVRSRV_ENABLE_PROCESS_STATS is defined) which track the amount
-                 of memory allocated to help in debugging. Where this is not
-                 required, OSAllocMem() and OSAllocMemNoStats() equate to
-                 the same operation.
-@Input          ui32Size        Size of required allocation (in bytes)
-@Return         Pointer to allocated memory on success.
-                Otherwise NULL.
- */ /**************************************************************************/
-void *OSAllocMemNoStats(IMG_UINT32 ui32Size);
-
-/**************************************************************************/ /*!
-@Function       OSAllocZMemNoStats
-@Description    Allocates CPU memory and initializes the contents to zero.
-                 If passed a size of zero, function should not assert,
-                 but just return a NULL pointer.
-                 The allocated memory is not accounted for by process stats.
-                 Process stats are an optional feature (enabled only when
-                 PVRSRV_ENABLE_PROCESS_STATS is defined) which track the amount
-                 of memory allocated to help in debugging. Where this is not
-                 required, OSAllocZMem() and OSAllocZMemNoStats() equate to
-                 the same operation.
-@Input          ui32Size        Size of required allocation (in bytes)
-@Return         Pointer to allocated memory on success.
-                Otherwise NULL.
- */ /**************************************************************************/
-void *OSAllocZMemNoStats(IMG_UINT32 ui32Size);
-
-/**************************************************************************/ /*!
-@Function       OSFreeMem
-@Description    Frees previously allocated CPU memory.
-@Input          pvCpuVAddr       Pointer to the memory to be freed.
-@Return         None.
- */ /**************************************************************************/
-void OSFreeMem(void *pvCpuVAddr);
-
-/**************************************************************************/ /*!
-@Function       OSFreeMemNoStats
-@Description    Frees previously allocated CPU memory.
-                 The freed memory does not update the figures in process stats.
-                 Process stats are an optional feature (enabled only when
-                 PVRSRV_ENABLE_PROCESS_STATS is defined) which track the amount
-                 of memory allocated to help in debugging. Where this is not
-                 required, OSFreeMem() and OSFreeMemNoStats() equate to the
-                 same operation.
-@Input          pvCpuVAddr       Pointer to the memory to be freed.
-@Return         None.
- */ /**************************************************************************/
-void OSFreeMemNoStats(void *pvCpuVAddr);
-
-/*
- * These macros allow us to catch double-free bugs on DEBUG builds and
- * prevent crashes on RELEASE builds.
- */
-
-/*! @cond Doxygen_Suppress */
-#if defined(DEBUG)
-#define double_free_sentinel ((void *)&OSFreeMem)
-#define ALLOCMEM_ASSERT(exp) PVR_ASSERT(exp)
-#else
-#define double_free_sentinel NULL
-#define ALLOCMEM_ASSERT(exp) do {} while (0)
-#endif
-/*! @endcond */
-
-/*! Frees memory allocated by OSAllocMem(). */
-#define OSFreeMem(_ptr) do { \
-		ALLOCMEM_ASSERT((_ptr) != double_free_sentinel); \
-		(OSFreeMem)(_ptr); \
-		(_ptr) = double_free_sentinel; \
-		MSC_SUPPRESS_4127 \
-	} while (0)
-
-/*! Frees memory allocated by OSAllocMemNoStats(). */
-#define OSFreeMemNoStats(_ptr) do { \
-		ALLOCMEM_ASSERT((_ptr) != double_free_sentinel); \
-		(OSFreeMemNoStats)(_ptr); \
-		(_ptr) = double_free_sentinel; \
-		MSC_SUPPRESS_4127 \
-	} while (0)
-
-#if defined(__cplusplus)
-}
-#endif
-
-#endif /* ALLOCMEM_H */
-
-/******************************************************************************
- End of file (allocmem.h)
-******************************************************************************/

drivers/gpu/drm/img-rogue/cache_km.h

@@ -1,151 +0,0 @@
-/*************************************************************************/ /*!
-@File           cache_km.h
-@Title          CPU cache management header
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/ /**************************************************************************/
-
-#ifndef CACHE_KM_H
-#define CACHE_KM_H
-
-#if defined(__linux__)
-#include <linux/version.h>
-#else
-#define KERNEL_VERSION
-#endif
-
-#include "pvrsrv_error.h"
-#include "os_cpu_cache.h"
-#include "img_types.h"
-#include "cache_ops.h"
-#include "device.h"
-#include "pmr.h"
-
-typedef IMG_UINT32 PVRSRV_CACHE_OP_ADDR_TYPE;	/*!< Represents CPU address type required for CPU d-cache maintenance */
-#define PVRSRV_CACHE_OP_ADDR_TYPE_VIRTUAL	0x1	/*!< Operation requires CPU virtual address only */
-#define PVRSRV_CACHE_OP_ADDR_TYPE_PHYSICAL	0x2	/*!< Operation requires CPU physical address only */
-#define PVRSRV_CACHE_OP_ADDR_TYPE_BOTH		0x3	/*!< Operation requires both CPU virtual & physical addresses */
-
-#include "connection_server.h"
-
-/*
- * CacheOpInit() & CacheOpDeInit()
- *
- * This must be called to initialise the KM cache maintenance framework.
- * This is called early during the driver/module (un)loading phase.
- */
-PVRSRV_ERROR CacheOpInit(void);
-void CacheOpDeInit(void);
-
-/*
- * CacheOpInit2() & CacheOpDeInit2()
- *
- * This must be called to initialise the UM cache maintenance framework.
- * This is called when the driver is loaded/unloaded from the kernel.
- */
-PVRSRV_ERROR CacheOpInit2(void);
-void CacheOpDeInit2(void);
-
-/*
- * CacheOpExec()
- *
- * This is the primary CPU data-cache maintenance interface and it is
- * always guaranteed to be synchronous; the arguments supplied must be
- * pre-validated for performance reasons else the d-cache maintenance
- * operation might cause the underlying OS kernel to fault.
- */
-PVRSRV_ERROR CacheOpExec(PPVRSRV_DEVICE_NODE psDevNode,
-						void *pvVirtStart,
-						void *pvVirtEnd,
-						IMG_CPU_PHYADDR sCPUPhysStart,
-						IMG_CPU_PHYADDR sCPUPhysEnd,
-						PVRSRV_CACHE_OP uiCacheOp);
-
-/*
- * CacheOpValExec()
- *
- * Same as CacheOpExec(), except arguments are _Validated_ before being
- * presented to the underlying OS kernel for CPU data-cache maintenance.
- * The uiAddress is the start CPU virtual address for the to-be d-cache
- * maintained PMR, it can be NULL in which case a remap will be performed
- * internally, if required for cache maintenance. This is primarily used
- * as the services client bridge call handler for synchronous user-mode
- * cache maintenance requests.
- */
-PVRSRV_ERROR CacheOpValExec(PMR *psPMR,
-							IMG_UINT64 uiAddress,
-							IMG_DEVMEM_OFFSET_T uiOffset,
-							IMG_DEVMEM_SIZE_T uiSize,
-							PVRSRV_CACHE_OP uiCacheOp);
-
-/*
- * CacheOpQueue()
- *
- * This is the secondary cache maintenance interface and it is not
- * guaranteed to be synchronous in that requests could be deferred
- * and executed asynchronously. This interface is primarily meant
- * as services client bridge call handler. Both uiInfoPgGFSeqNum
- * and ui32[Current,Next]FenceSeqNum implements an internal client
- * server queueing protocol so making use of this interface outside
- * of services client is not recommended and should not be done.
- */
-PVRSRV_ERROR CacheOpQueue(CONNECTION_DATA *psConnection,
-						PPVRSRV_DEVICE_NODE psDevNode,
-						IMG_UINT32 ui32OpCount,
-						PMR **ppsPMR,
-						IMG_UINT64 *puiAddress,
-						IMG_DEVMEM_OFFSET_T *puiOffset,
-						IMG_DEVMEM_SIZE_T *puiSize,
-						PVRSRV_CACHE_OP *puiCacheOp,
-						IMG_UINT32 ui32OpTimeline);
-
-/*
- * CacheOpLog()
- *
- * This is used for logging client cache maintenance operations that
- * was executed in user-space.
- */
-PVRSRV_ERROR CacheOpLog(PMR *psPMR,
-						IMG_UINT64 uiAddress,
-						IMG_DEVMEM_OFFSET_T uiOffset,
-						IMG_DEVMEM_SIZE_T uiSize,
-						IMG_UINT64 ui64StartTime,
-						IMG_UINT64 ui64EndTime,
-						PVRSRV_CACHE_OP uiCacheOp);
-
-#endif	/* CACHE_KM_H */

drivers/gpu/drm/img-rogue/cache_ops.h

@@ -1,61 +0,0 @@
-/*************************************************************************/ /*!
-@File
-@Title          Services cache management header
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Defines for cache management which are visible internally
-                and externally
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/ /**************************************************************************/
-
-#ifndef CACHE_OPS_H
-#define CACHE_OPS_H
-#include "img_types.h"
-/*!
-* @Defgroup CPUCacheAPIs
-* @{
-*/
-#define CACHE_BATCH_MAX (8U)
-#define MAX_DMA_OPS (34)
-typedef IMG_UINT32 PVRSRV_CACHE_OP;				/*!< Type represents cache maintenance operation */
-#define PVRSRV_CACHE_OP_NONE				0x0U	/*!< No operation */
-#define PVRSRV_CACHE_OP_CLEAN				0x1U	/*!< Flush w/o invalidate */
-#define PVRSRV_CACHE_OP_INVALIDATE			0x2U	/*!< Invalidate w/o flush */
-#define PVRSRV_CACHE_OP_FLUSH				0x3U	/*!< Flush w/ invalidate */
-/*! @} End of Defgroup CPUCacheAPIs */
-
-#endif	/* CACHE_OPS_H */

drivers/gpu/drm/img-rogue/client_cache_bridge.h

@@ -1,80 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for cache
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for cache
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_CACHE_BRIDGE_H
-#define CLIENT_CACHE_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_cache_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeCacheOpQueue(IMG_HANDLE hBridge,
-					     IMG_UINT32 ui32NumCacheOps,
-					     IMG_HANDLE * phPMR,
-					     IMG_UINT64 * pui64Address,
-					     IMG_DEVMEM_OFFSET_T * puiOffset,
-					     IMG_DEVMEM_SIZE_T * puiSize,
-					     PVRSRV_CACHE_OP * piuCacheOp,
-					     IMG_UINT32 ui32OpTimeline);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeCacheOpExec(IMG_HANDLE hBridge,
-					    IMG_HANDLE hPMR,
-					    IMG_UINT64 ui64Address,
-					    IMG_DEVMEM_OFFSET_T uiOffset,
-					    IMG_DEVMEM_SIZE_T uiSize, PVRSRV_CACHE_OP iuCacheOp);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeCacheOpLog(IMG_HANDLE hBridge,
-					   IMG_HANDLE hPMR,
-					   IMG_UINT64 ui64Address,
-					   IMG_DEVMEM_OFFSET_T uiOffset,
-					   IMG_DEVMEM_SIZE_T uiSize,
-					   IMG_INT64 i64StartTime,
-					   IMG_INT64 i64EndTime, PVRSRV_CACHE_OP iuCacheOp);
-
-#endif /* CLIENT_CACHE_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_cache_direct_bridge.c

@@ -1,112 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for cache
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for cache
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_cache_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-#include "cache_ops.h"
-
-#include "cache_km.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeCacheOpQueue(IMG_HANDLE hBridge,
-					     IMG_UINT32 ui32NumCacheOps,
-					     IMG_HANDLE * phPMR,
-					     IMG_UINT64 * pui64Address,
-					     IMG_DEVMEM_OFFSET_T * puiOffset,
-					     IMG_DEVMEM_SIZE_T * puiSize,
-					     PVRSRV_CACHE_OP * piuCacheOp,
-					     IMG_UINT32 ui32OpTimeline)
-{
-	PVRSRV_ERROR eError;
-	PMR **psPMRInt;
-
-	psPMRInt = (PMR **) phPMR;
-
-	eError =
-	    CacheOpQueue(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-			 ui32NumCacheOps,
-			 psPMRInt, pui64Address, puiOffset, puiSize, piuCacheOp, ui32OpTimeline);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeCacheOpExec(IMG_HANDLE hBridge,
-					    IMG_HANDLE hPMR,
-					    IMG_UINT64 ui64Address,
-					    IMG_DEVMEM_OFFSET_T uiOffset,
-					    IMG_DEVMEM_SIZE_T uiSize, PVRSRV_CACHE_OP iuCacheOp)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError = CacheOpValExec(psPMRInt, ui64Address, uiOffset, uiSize, iuCacheOp);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeCacheOpLog(IMG_HANDLE hBridge,
-					   IMG_HANDLE hPMR,
-					   IMG_UINT64 ui64Address,
-					   IMG_DEVMEM_OFFSET_T uiOffset,
-					   IMG_DEVMEM_SIZE_T uiSize,
-					   IMG_INT64 i64StartTime,
-					   IMG_INT64 i64EndTime, PVRSRV_CACHE_OP iuCacheOp)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError =
-	    CacheOpLog(psPMRInt,
-		       ui64Address, uiOffset, uiSize, i64StartTime, i64EndTime, iuCacheOp);
-
-	return eError;
-}

drivers/gpu/drm/img-rogue/client_devicememhistory_bridge.h

@@ -1,111 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for devicememhistory
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for devicememhistory
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_DEVICEMEMHISTORY_BRIDGE_H
-#define CLIENT_DEVICEMEMHISTORY_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_devicememhistory_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryMap(IMG_HANDLE hBridge,
-						    IMG_HANDLE hPMR,
-						    IMG_DEVMEM_SIZE_T uiOffset,
-						    IMG_DEV_VIRTADDR sDevVAddr,
-						    IMG_DEVMEM_SIZE_T uiSize,
-						    const IMG_CHAR * puiText,
-						    IMG_UINT32 ui32Log2PageSize,
-						    IMG_UINT32 ui32AllocationIndex,
-						    IMG_UINT32 * pui32AllocationIndexOut);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryUnmap(IMG_HANDLE hBridge,
-						      IMG_HANDLE hPMR,
-						      IMG_DEVMEM_SIZE_T uiOffset,
-						      IMG_DEV_VIRTADDR sDevVAddr,
-						      IMG_DEVMEM_SIZE_T uiSize,
-						      const IMG_CHAR * puiText,
-						      IMG_UINT32 ui32Log2PageSize,
-						      IMG_UINT32 ui32AllocationIndex,
-						      IMG_UINT32 * pui32AllocationIndexOut);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryMapVRange(IMG_HANDLE hBridge,
-							  IMG_DEV_VIRTADDR sBaseDevVAddr,
-							  IMG_UINT32 ui32ui32StartPage,
-							  IMG_UINT32 ui32NumPages,
-							  IMG_DEVMEM_SIZE_T uiAllocSize,
-							  const IMG_CHAR * puiText,
-							  IMG_UINT32 ui32Log2PageSize,
-							  IMG_UINT32 ui32AllocationIndex,
-							  IMG_UINT32 * pui32AllocationIndexOut);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryUnmapVRange(IMG_HANDLE hBridge,
-							    IMG_DEV_VIRTADDR sBaseDevVAddr,
-							    IMG_UINT32 ui32ui32StartPage,
-							    IMG_UINT32 ui32NumPages,
-							    IMG_DEVMEM_SIZE_T uiAllocSize,
-							    const IMG_CHAR * puiText,
-							    IMG_UINT32 ui32Log2PageSize,
-							    IMG_UINT32 ui32AllocationIndex,
-							    IMG_UINT32 * pui32AllocationIndexOut);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistorySparseChange(IMG_HANDLE hBridge,
-							     IMG_HANDLE hPMR,
-							     IMG_DEVMEM_SIZE_T uiOffset,
-							     IMG_DEV_VIRTADDR sDevVAddr,
-							     IMG_DEVMEM_SIZE_T uiSize,
-							     const IMG_CHAR * puiText,
-							     IMG_UINT32 ui32Log2PageSize,
-							     IMG_UINT32 ui32AllocPageCount,
-							     IMG_UINT32 * pui32AllocPageIndices,
-							     IMG_UINT32 ui32FreePageCount,
-							     IMG_UINT32 * pui32FreePageIndices,
-							     IMG_UINT32 ui32AllocationIndex,
-							     IMG_UINT32 * pui32AllocationIndexOut);
-
-#endif /* CLIENT_DEVICEMEMHISTORY_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_devicememhistory_direct_bridge.c

@@ -1,194 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for devicememhistory
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for devicememhistory
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_devicememhistory_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-#include "img_types.h"
-#include "img_defs.h"
-#include "devicemem_typedefs.h"
-
-#include "devicemem_history_server.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryMap(IMG_HANDLE hBridge,
-						    IMG_HANDLE hPMR,
-						    IMG_DEVMEM_SIZE_T uiOffset,
-						    IMG_DEV_VIRTADDR sDevVAddr,
-						    IMG_DEVMEM_SIZE_T uiSize,
-						    const IMG_CHAR * puiText,
-						    IMG_UINT32 ui32Log2PageSize,
-						    IMG_UINT32 ui32AllocationIndex,
-						    IMG_UINT32 * pui32AllocationIndexOut)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError =
-	    DevicememHistoryMapKM(psPMRInt,
-				  uiOffset,
-				  sDevVAddr,
-				  uiSize,
-				  puiText,
-				  ui32Log2PageSize, ui32AllocationIndex, pui32AllocationIndexOut);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryUnmap(IMG_HANDLE hBridge,
-						      IMG_HANDLE hPMR,
-						      IMG_DEVMEM_SIZE_T uiOffset,
-						      IMG_DEV_VIRTADDR sDevVAddr,
-						      IMG_DEVMEM_SIZE_T uiSize,
-						      const IMG_CHAR * puiText,
-						      IMG_UINT32 ui32Log2PageSize,
-						      IMG_UINT32 ui32AllocationIndex,
-						      IMG_UINT32 * pui32AllocationIndexOut)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError =
-	    DevicememHistoryUnmapKM(psPMRInt,
-				    uiOffset,
-				    sDevVAddr,
-				    uiSize,
-				    puiText,
-				    ui32Log2PageSize, ui32AllocationIndex, pui32AllocationIndexOut);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryMapVRange(IMG_HANDLE hBridge,
-							  IMG_DEV_VIRTADDR sBaseDevVAddr,
-							  IMG_UINT32 ui32ui32StartPage,
-							  IMG_UINT32 ui32NumPages,
-							  IMG_DEVMEM_SIZE_T uiAllocSize,
-							  const IMG_CHAR * puiText,
-							  IMG_UINT32 ui32Log2PageSize,
-							  IMG_UINT32 ui32AllocationIndex,
-							  IMG_UINT32 * pui32AllocationIndexOut)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    DevicememHistoryMapVRangeKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					sBaseDevVAddr,
-					ui32ui32StartPage,
-					ui32NumPages,
-					uiAllocSize,
-					puiText,
-					ui32Log2PageSize,
-					ui32AllocationIndex, pui32AllocationIndexOut);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistoryUnmapVRange(IMG_HANDLE hBridge,
-							    IMG_DEV_VIRTADDR sBaseDevVAddr,
-							    IMG_UINT32 ui32ui32StartPage,
-							    IMG_UINT32 ui32NumPages,
-							    IMG_DEVMEM_SIZE_T uiAllocSize,
-							    const IMG_CHAR * puiText,
-							    IMG_UINT32 ui32Log2PageSize,
-							    IMG_UINT32 ui32AllocationIndex,
-							    IMG_UINT32 * pui32AllocationIndexOut)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    DevicememHistoryUnmapVRangeKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					  sBaseDevVAddr,
-					  ui32ui32StartPage,
-					  ui32NumPages,
-					  uiAllocSize,
-					  puiText,
-					  ui32Log2PageSize,
-					  ui32AllocationIndex, pui32AllocationIndexOut);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevicememHistorySparseChange(IMG_HANDLE hBridge,
-							     IMG_HANDLE hPMR,
-							     IMG_DEVMEM_SIZE_T uiOffset,
-							     IMG_DEV_VIRTADDR sDevVAddr,
-							     IMG_DEVMEM_SIZE_T uiSize,
-							     const IMG_CHAR * puiText,
-							     IMG_UINT32 ui32Log2PageSize,
-							     IMG_UINT32 ui32AllocPageCount,
-							     IMG_UINT32 * pui32AllocPageIndices,
-							     IMG_UINT32 ui32FreePageCount,
-							     IMG_UINT32 * pui32FreePageIndices,
-							     IMG_UINT32 ui32AllocationIndex,
-							     IMG_UINT32 * pui32AllocationIndexOut)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError =
-	    DevicememHistorySparseChangeKM(psPMRInt,
-					   uiOffset,
-					   sDevVAddr,
-					   uiSize,
-					   puiText,
-					   ui32Log2PageSize,
-					   ui32AllocPageCount,
-					   pui32AllocPageIndices,
-					   ui32FreePageCount,
-					   pui32FreePageIndices,
-					   ui32AllocationIndex, pui32AllocationIndexOut);
-
-	return eError;
-}

drivers/gpu/drm/img-rogue/client_htbuffer_bridge.h

@@ -1,71 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for htbuffer
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for htbuffer
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_HTBUFFER_BRIDGE_H
-#define CLIENT_HTBUFFER_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_htbuffer_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHTBControl(IMG_HANDLE hBridge,
-					   IMG_UINT32 ui32NumGroups,
-					   IMG_UINT32 * pui32GroupEnable,
-					   IMG_UINT32 ui32LogLevel,
-					   IMG_UINT32 ui32EnablePID,
-					   IMG_UINT32 ui32LogMode, IMG_UINT32 ui32OpMode);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHTBLog(IMG_HANDLE hBridge,
-				       IMG_UINT32 ui32PID,
-				       IMG_UINT32 ui32TID,
-				       IMG_UINT64 ui64TimeStamp,
-				       IMG_UINT32 ui32SF,
-				       IMG_UINT32 ui32NumArgs, IMG_UINT32 * pui32Args);
-
-#endif /* CLIENT_HTBUFFER_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_htbuffer_direct_bridge.c

@@ -1,85 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for htbuffer
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for htbuffer
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_htbuffer_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-#include "devicemem_typedefs.h"
-#include "htbuffer_types.h"
-
-#include "htbserver.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHTBControl(IMG_HANDLE hBridge,
-					   IMG_UINT32 ui32NumGroups,
-					   IMG_UINT32 * pui32GroupEnable,
-					   IMG_UINT32 ui32LogLevel,
-					   IMG_UINT32 ui32EnablePID,
-					   IMG_UINT32 ui32LogMode, IMG_UINT32 ui32OpMode)
-{
-	PVRSRV_ERROR eError;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError =
-	    HTBControlKM(ui32NumGroups,
-			 pui32GroupEnable, ui32LogLevel, ui32EnablePID, ui32LogMode, ui32OpMode);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHTBLog(IMG_HANDLE hBridge,
-				       IMG_UINT32 ui32PID,
-				       IMG_UINT32 ui32TID,
-				       IMG_UINT64 ui64TimeStamp,
-				       IMG_UINT32 ui32SF,
-				       IMG_UINT32 ui32NumArgs, IMG_UINT32 * pui32Args)
-{
-	PVRSRV_ERROR eError;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError = HTBLogKM(ui32PID, ui32TID, ui64TimeStamp, ui32SF, ui32NumArgs, pui32Args);
-
-	return eError;
-}

drivers/gpu/drm/img-rogue/client_mm_bridge.h

@@ -1,265 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for mm
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for mm
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_MM_BRIDGE_H
-#define CLIENT_MM_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_mm_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRExportPMR(IMG_HANDLE hBridge,
-					     IMG_HANDLE hPMR,
-					     IMG_HANDLE * phPMRExport,
-					     IMG_UINT64 * pui64Size,
-					     IMG_UINT32 * pui32Log2Contig,
-					     IMG_UINT64 * pui64Password);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnexportPMR(IMG_HANDLE hBridge, IMG_HANDLE hPMRExport);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRGetUID(IMG_HANDLE hBridge,
-					  IMG_HANDLE hPMR, IMG_UINT64 * pui64UID);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRMakeLocalImportHandle(IMG_HANDLE hBridge,
-							 IMG_HANDLE hBuffer, IMG_HANDLE * phExtMem);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnmakeLocalImportHandle(IMG_HANDLE hBridge, IMG_HANDLE hExtMem);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRImportPMR(IMG_HANDLE hBridge,
-					     IMG_HANDLE hPMRExport,
-					     IMG_UINT64 ui64uiPassword,
-					     IMG_UINT64 ui64uiSize,
-					     IMG_UINT32 ui32uiLog2Contig, IMG_HANDLE * phPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRLocalImportPMR(IMG_HANDLE hBridge,
-						  IMG_HANDLE hExtHandle,
-						  IMG_HANDLE * phPMR,
-						  IMG_DEVMEM_SIZE_T * puiSize,
-						  IMG_DEVMEM_ALIGN_T * puiAlign);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnrefPMR(IMG_HANDLE hBridge, IMG_HANDLE hPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnrefUnlockPMR(IMG_HANDLE hBridge, IMG_HANDLE hPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysmemNewRamBackedPMR(IMG_HANDLE hBridge,
-						       IMG_DEVMEM_SIZE_T uiSize,
-						       IMG_DEVMEM_SIZE_T uiChunkSize,
-						       IMG_UINT32 ui32NumPhysChunks,
-						       IMG_UINT32 ui32NumVirtChunks,
-						       IMG_UINT32 * pui32MappingTable,
-						       IMG_UINT32 ui32Log2PageSize,
-						       PVRSRV_MEMALLOCFLAGS_T uiFlags,
-						       IMG_UINT32 ui32AnnotationLength,
-						       const IMG_CHAR * puiAnnotation,
-						       IMG_PID ui32PID,
-						       IMG_HANDLE * phPMRPtr,
-						       IMG_UINT32 ui32PDumpFlags,
-						       PVRSRV_MEMALLOCFLAGS_T * puiOutFlags);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysmemNewRamBackedLockedPMR(IMG_HANDLE hBridge,
-							     IMG_DEVMEM_SIZE_T uiSize,
-							     IMG_DEVMEM_SIZE_T uiChunkSize,
-							     IMG_UINT32 ui32NumPhysChunks,
-							     IMG_UINT32 ui32NumVirtChunks,
-							     IMG_UINT32 * pui32MappingTable,
-							     IMG_UINT32 ui32Log2PageSize,
-							     PVRSRV_MEMALLOCFLAGS_T uiFlags,
-							     IMG_UINT32 ui32AnnotationLength,
-							     const IMG_CHAR * puiAnnotation,
-							     IMG_PID ui32PID,
-							     IMG_HANDLE * phPMRPtr,
-							     IMG_UINT32 ui32PDumpFlags,
-							     PVRSRV_MEMALLOCFLAGS_T * puiOutFlags);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntPin(IMG_HANDLE hBridge, IMG_HANDLE hPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnpin(IMG_HANDLE hBridge, IMG_HANDLE hPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntPinValidate(IMG_HANDLE hBridge,
-						     IMG_HANDLE hMapping, IMG_HANDLE hPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnpinInvalidate(IMG_HANDLE hBridge,
-							 IMG_HANDLE hMapping, IMG_HANDLE hPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntCtxCreate(IMG_HANDLE hBridge,
-						   IMG_BOOL bbKernelMemoryCtx,
-						   IMG_HANDLE * phDevMemServerContext,
-						   IMG_HANDLE * phPrivData,
-						   IMG_UINT32 * pui32CPUCacheLineSize);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntCtxDestroy(IMG_HANDLE hBridge,
-						    IMG_HANDLE hDevmemServerContext);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntHeapCreate(IMG_HANDLE hBridge,
-						    IMG_HANDLE hDevmemCtx,
-						    IMG_DEV_VIRTADDR sHeapBaseAddr,
-						    IMG_DEVMEM_SIZE_T uiHeapLength,
-						    IMG_UINT32 ui32Log2DataPageSize,
-						    IMG_HANDLE * phDevmemHeapPtr);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntHeapDestroy(IMG_HANDLE hBridge, IMG_HANDLE hDevmemHeap);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntMapPMR(IMG_HANDLE hBridge,
-						IMG_HANDLE hDevmemServerHeap,
-						IMG_HANDLE hReservation,
-						IMG_HANDLE hPMR,
-						PVRSRV_MEMALLOCFLAGS_T uiMapFlags,
-						IMG_HANDLE * phMapping);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnmapPMR(IMG_HANDLE hBridge, IMG_HANDLE hMapping);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntReserveRange(IMG_HANDLE hBridge,
-						      IMG_HANDLE hDevmemServerHeap,
-						      IMG_DEV_VIRTADDR sAddress,
-						      IMG_DEVMEM_SIZE_T uiLength,
-						      IMG_HANDLE * phReservation);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnreserveRange(IMG_HANDLE hBridge,
-							IMG_HANDLE hReservation);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeChangeSparseMem(IMG_HANDLE hBridge,
-						IMG_HANDLE hSrvDevMemHeap,
-						IMG_HANDLE hPMR,
-						IMG_UINT32 ui32AllocPageCount,
-						IMG_UINT32 * pui32AllocPageIndices,
-						IMG_UINT32 ui32FreePageCount,
-						IMG_UINT32 * pui32FreePageIndices,
-						IMG_UINT32 ui32SparseFlags,
-						PVRSRV_MEMALLOCFLAGS_T uiFlags,
-						IMG_DEV_VIRTADDR sDevVAddr,
-						IMG_UINT64 ui64CPUVAddr);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntMapPages(IMG_HANDLE hBridge,
-						  IMG_HANDLE hReservation,
-						  IMG_HANDLE hPMR,
-						  IMG_UINT32 ui32PageCount,
-						  IMG_UINT32 ui32PhysicalPgOffset,
-						  PVRSRV_MEMALLOCFLAGS_T uiFlags,
-						  IMG_DEV_VIRTADDR sDevVAddr);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnmapPages(IMG_HANDLE hBridge,
-						    IMG_HANDLE hReservation,
-						    IMG_DEV_VIRTADDR sDevVAddr,
-						    IMG_UINT32 ui32PageCount);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIsVDevAddrValid(IMG_HANDLE hBridge,
-						      IMG_HANDLE hDevmemCtx,
-						      IMG_DEV_VIRTADDR sAddress);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemFlushDevSLCRange(IMG_HANDLE hBridge,
-						       IMG_HANDLE hDevmemCtx,
-						       IMG_DEV_VIRTADDR sAddress,
-						       IMG_DEVMEM_SIZE_T uiSize,
-						       IMG_BOOL bInvalidate);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemInvalidateFBSCTable(IMG_HANDLE hBridge,
-							  IMG_HANDLE hDevmemCtx,
-							  IMG_UINT64 ui64FBSCEntries);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapConfigCount(IMG_HANDLE hBridge,
-						       IMG_UINT32 * pui32NumHeapConfigs);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapCount(IMG_HANDLE hBridge,
-						 IMG_UINT32 ui32HeapConfigIndex,
-						 IMG_UINT32 * pui32NumHeaps);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapConfigName(IMG_HANDLE hBridge,
-						      IMG_UINT32 ui32HeapConfigIndex,
-						      IMG_UINT32 ui32HeapConfigNameBufSz,
-						      IMG_CHAR * puiHeapConfigName);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapDetails(IMG_HANDLE hBridge,
-						   IMG_UINT32 ui32HeapConfigIndex,
-						   IMG_UINT32 ui32HeapIndex,
-						   IMG_UINT32 ui32HeapNameBufSz,
-						   IMG_CHAR * puiHeapNameOut,
-						   IMG_DEV_VIRTADDR * psDevVAddrBase,
-						   IMG_DEVMEM_SIZE_T * puiHeapLength,
-						   IMG_DEVMEM_SIZE_T * puiReservedRegionLength,
-						   IMG_UINT32 * pui32Log2DataPageSizeOut,
-						   IMG_UINT32 * pui32Log2ImportAlignmentOut);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntRegisterPFNotifyKM(IMG_HANDLE hBridge,
-							    IMG_HANDLE hDevm,
-							    IMG_UINT32 ui32PID, IMG_BOOL bRegister);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetMaxPhysHeapCount(IMG_HANDLE hBridge,
-						    IMG_UINT32 * pui32PhysHeapCount);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysHeapGetMemInfo(IMG_HANDLE hBridge,
-						   IMG_UINT32 ui32PhysHeapCount,
-						   PVRSRV_PHYS_HEAP * peaPhysHeapID,
-						   PHYS_HEAP_MEM_STATS * pasapPhysHeapMemStats);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetDefaultPhysicalHeap(IMG_HANDLE hBridge,
-						       PVRSRV_PHYS_HEAP * peHeap);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetHeapPhysMemUsage(IMG_HANDLE hBridge,
-						    IMG_UINT32 ui32PhysHeapCount,
-						    PHYS_HEAP_MEM_STATS * pasapPhysHeapMemStats);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemGetFaultAddress(IMG_HANDLE hBridge,
-						      IMG_HANDLE hDevmemCtx,
-						      IMG_DEV_VIRTADDR * psFaultAddress);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePVRSRVUpdateOOMStats(IMG_HANDLE hBridge,
-						     IMG_UINT32 ui32ui32StatType, IMG_PID ui32pid);
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysHeapGetMemInfoPkd(IMG_HANDLE hBridge,
-						      IMG_UINT32 ui32PhysHeapCount,
-						      PVRSRV_PHYS_HEAP * peaPhysHeapID,
-						      PHYS_HEAP_MEM_STATS_PKD *
-						      psapPhysHeapMemStats);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetHeapPhysMemUsagePkd(IMG_HANDLE hBridge,
-						       IMG_UINT32 ui32PhysHeapCount,
-						       PHYS_HEAP_MEM_STATS_PKD *
-						       psapPhysHeapMemStats);
-
-#endif /* CLIENT_MM_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_mm_direct_bridge.c

@@ -1,804 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for mm
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for mm
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_mm_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-#include "pvrsrv_memallocflags.h"
-#include "pvrsrv_memalloc_physheap.h"
-#include "devicemem_typedefs.h"
-
-#include "pvrsrv_memalloc_physheap.h"
-#include "devicemem.h"
-#include "devicemem_server.h"
-#include "pmr.h"
-#include "devicemem_heapcfg.h"
-#include "physmem.h"
-#include "devicemem_utils.h"
-#include "process_stats.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRExportPMR(IMG_HANDLE hBridge,
-					     IMG_HANDLE hPMR,
-					     IMG_HANDLE * phPMRExport,
-					     IMG_UINT64 * pui64Size,
-					     IMG_UINT32 * pui32Log2Contig,
-					     IMG_UINT64 * pui64Password)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PMR_EXPORT *psPMRExportInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError = PMRExportPMR(psPMRInt, &psPMRExportInt, pui64Size, pui32Log2Contig, pui64Password);
-
-	*phPMRExport = psPMRExportInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnexportPMR(IMG_HANDLE hBridge, IMG_HANDLE hPMRExport)
-{
-	PVRSRV_ERROR eError;
-	PMR_EXPORT *psPMRExportInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRExportInt = (PMR_EXPORT *) hPMRExport;
-
-	eError = PMRUnexportPMR(psPMRExportInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRGetUID(IMG_HANDLE hBridge,
-					  IMG_HANDLE hPMR, IMG_UINT64 * pui64UID)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError = PMRGetUID(psPMRInt, pui64UID);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRMakeLocalImportHandle(IMG_HANDLE hBridge,
-							 IMG_HANDLE hBuffer, IMG_HANDLE * phExtMem)
-{
-	PVRSRV_ERROR eError;
-	PMR *psBufferInt;
-	PMR *psExtMemInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psBufferInt = (PMR *) hBuffer;
-
-	eError = PMRMakeLocalImportHandle(psBufferInt, &psExtMemInt);
-
-	*phExtMem = psExtMemInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnmakeLocalImportHandle(IMG_HANDLE hBridge, IMG_HANDLE hExtMem)
-{
-	PVRSRV_ERROR eError;
-	PMR *psExtMemInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psExtMemInt = (PMR *) hExtMem;
-
-	eError = PMRUnmakeLocalImportHandle(psExtMemInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRImportPMR(IMG_HANDLE hBridge,
-					     IMG_HANDLE hPMRExport,
-					     IMG_UINT64 ui64uiPassword,
-					     IMG_UINT64 ui64uiSize,
-					     IMG_UINT32 ui32uiLog2Contig, IMG_HANDLE * phPMR)
-{
-	PVRSRV_ERROR eError;
-	PMR_EXPORT *psPMRExportInt;
-	PMR *psPMRInt = NULL;
-
-	psPMRExportInt = (PMR_EXPORT *) hPMRExport;
-
-	eError =
-	    PhysmemImportPMR(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-			     psPMRExportInt,
-			     ui64uiPassword, ui64uiSize, ui32uiLog2Contig, &psPMRInt);
-
-	*phPMR = psPMRInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRLocalImportPMR(IMG_HANDLE hBridge,
-						  IMG_HANDLE hExtHandle,
-						  IMG_HANDLE * phPMR,
-						  IMG_DEVMEM_SIZE_T * puiSize,
-						  IMG_DEVMEM_ALIGN_T * puiAlign)
-{
-	PVRSRV_ERROR eError;
-	PMR *psExtHandleInt;
-	PMR *psPMRInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psExtHandleInt = (PMR *) hExtHandle;
-
-	eError = PMRLocalImportPMR(psExtHandleInt, &psPMRInt, puiSize, puiAlign);
-
-	*phPMR = psPMRInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnrefPMR(IMG_HANDLE hBridge, IMG_HANDLE hPMR)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError = PMRUnrefPMR(psPMRInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePMRUnrefUnlockPMR(IMG_HANDLE hBridge, IMG_HANDLE hPMR)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError = PMRUnrefUnlockPMR(psPMRInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysmemNewRamBackedPMR(IMG_HANDLE hBridge,
-						       IMG_DEVMEM_SIZE_T uiSize,
-						       IMG_DEVMEM_SIZE_T uiChunkSize,
-						       IMG_UINT32 ui32NumPhysChunks,
-						       IMG_UINT32 ui32NumVirtChunks,
-						       IMG_UINT32 * pui32MappingTable,
-						       IMG_UINT32 ui32Log2PageSize,
-						       PVRSRV_MEMALLOCFLAGS_T uiFlags,
-						       IMG_UINT32 ui32AnnotationLength,
-						       const IMG_CHAR * puiAnnotation,
-						       IMG_PID ui32PID,
-						       IMG_HANDLE * phPMRPtr,
-						       IMG_UINT32 ui32PDumpFlags,
-						       PVRSRV_MEMALLOCFLAGS_T * puiOutFlags)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRPtrInt = NULL;
-
-	eError =
-	    PhysmemNewRamBackedPMR_direct(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					  uiSize,
-					  uiChunkSize,
-					  ui32NumPhysChunks,
-					  ui32NumVirtChunks,
-					  pui32MappingTable,
-					  ui32Log2PageSize,
-					  uiFlags,
-					  ui32AnnotationLength,
-					  puiAnnotation,
-					  ui32PID, &psPMRPtrInt, ui32PDumpFlags, puiOutFlags);
-
-	*phPMRPtr = psPMRPtrInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysmemNewRamBackedLockedPMR(IMG_HANDLE hBridge,
-							     IMG_DEVMEM_SIZE_T uiSize,
-							     IMG_DEVMEM_SIZE_T uiChunkSize,
-							     IMG_UINT32 ui32NumPhysChunks,
-							     IMG_UINT32 ui32NumVirtChunks,
-							     IMG_UINT32 * pui32MappingTable,
-							     IMG_UINT32 ui32Log2PageSize,
-							     PVRSRV_MEMALLOCFLAGS_T uiFlags,
-							     IMG_UINT32 ui32AnnotationLength,
-							     const IMG_CHAR * puiAnnotation,
-							     IMG_PID ui32PID,
-							     IMG_HANDLE * phPMRPtr,
-							     IMG_UINT32 ui32PDumpFlags,
-							     PVRSRV_MEMALLOCFLAGS_T * puiOutFlags)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRPtrInt = NULL;
-
-	eError =
-	    PhysmemNewRamBackedLockedPMR(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					 uiSize,
-					 uiChunkSize,
-					 ui32NumPhysChunks,
-					 ui32NumVirtChunks,
-					 pui32MappingTable,
-					 ui32Log2PageSize,
-					 uiFlags,
-					 ui32AnnotationLength,
-					 puiAnnotation,
-					 ui32PID, &psPMRPtrInt, ui32PDumpFlags, puiOutFlags);
-
-	*phPMRPtr = psPMRPtrInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntPin(IMG_HANDLE hBridge, IMG_HANDLE hPMR)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError = DevmemIntPin(psPMRInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnpin(IMG_HANDLE hBridge, IMG_HANDLE hPMR)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRInt = (PMR *) hPMR;
-
-	eError = DevmemIntUnpin(psPMRInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntPinValidate(IMG_HANDLE hBridge,
-						     IMG_HANDLE hMapping, IMG_HANDLE hPMR)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_MAPPING *psMappingInt;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psMappingInt = (DEVMEMINT_MAPPING *) hMapping;
-	psPMRInt = (PMR *) hPMR;
-
-	eError = DevmemIntPinValidate(psMappingInt, psPMRInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnpinInvalidate(IMG_HANDLE hBridge,
-							 IMG_HANDLE hMapping, IMG_HANDLE hPMR)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_MAPPING *psMappingInt;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psMappingInt = (DEVMEMINT_MAPPING *) hMapping;
-	psPMRInt = (PMR *) hPMR;
-
-	eError = DevmemIntUnpinInvalidate(psMappingInt, psPMRInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntCtxCreate(IMG_HANDLE hBridge,
-						   IMG_BOOL bbKernelMemoryCtx,
-						   IMG_HANDLE * phDevMemServerContext,
-						   IMG_HANDLE * phPrivData,
-						   IMG_UINT32 * pui32CPUCacheLineSize)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevMemServerContextInt = NULL;
-	IMG_HANDLE hPrivDataInt = NULL;
-
-	eError =
-	    DevmemIntCtxCreate(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-			       bbKernelMemoryCtx,
-			       &psDevMemServerContextInt, &hPrivDataInt, pui32CPUCacheLineSize);
-
-	*phDevMemServerContext = psDevMemServerContextInt;
-	*phPrivData = hPrivDataInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntCtxDestroy(IMG_HANDLE hBridge,
-						    IMG_HANDLE hDevmemServerContext)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevmemServerContextInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmemServerContextInt = (DEVMEMINT_CTX *) hDevmemServerContext;
-
-	eError = DevmemIntCtxDestroy(psDevmemServerContextInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntHeapCreate(IMG_HANDLE hBridge,
-						    IMG_HANDLE hDevmemCtx,
-						    IMG_DEV_VIRTADDR sHeapBaseAddr,
-						    IMG_DEVMEM_SIZE_T uiHeapLength,
-						    IMG_UINT32 ui32Log2DataPageSize,
-						    IMG_HANDLE * phDevmemHeapPtr)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevmemCtxInt;
-	DEVMEMINT_HEAP *psDevmemHeapPtrInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmemCtxInt = (DEVMEMINT_CTX *) hDevmemCtx;
-
-	eError =
-	    DevmemIntHeapCreate(psDevmemCtxInt,
-				sHeapBaseAddr,
-				uiHeapLength, ui32Log2DataPageSize, &psDevmemHeapPtrInt);
-
-	*phDevmemHeapPtr = psDevmemHeapPtrInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntHeapDestroy(IMG_HANDLE hBridge, IMG_HANDLE hDevmemHeap)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_HEAP *psDevmemHeapInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmemHeapInt = (DEVMEMINT_HEAP *) hDevmemHeap;
-
-	eError = DevmemIntHeapDestroy(psDevmemHeapInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntMapPMR(IMG_HANDLE hBridge,
-						IMG_HANDLE hDevmemServerHeap,
-						IMG_HANDLE hReservation,
-						IMG_HANDLE hPMR,
-						PVRSRV_MEMALLOCFLAGS_T uiMapFlags,
-						IMG_HANDLE * phMapping)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_HEAP *psDevmemServerHeapInt;
-	DEVMEMINT_RESERVATION *psReservationInt;
-	PMR *psPMRInt;
-	DEVMEMINT_MAPPING *psMappingInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmemServerHeapInt = (DEVMEMINT_HEAP *) hDevmemServerHeap;
-	psReservationInt = (DEVMEMINT_RESERVATION *) hReservation;
-	psPMRInt = (PMR *) hPMR;
-
-	eError =
-	    DevmemIntMapPMR(psDevmemServerHeapInt,
-			    psReservationInt, psPMRInt, uiMapFlags, &psMappingInt);
-
-	*phMapping = psMappingInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnmapPMR(IMG_HANDLE hBridge, IMG_HANDLE hMapping)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_MAPPING *psMappingInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psMappingInt = (DEVMEMINT_MAPPING *) hMapping;
-
-	eError = DevmemIntUnmapPMR(psMappingInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntReserveRange(IMG_HANDLE hBridge,
-						      IMG_HANDLE hDevmemServerHeap,
-						      IMG_DEV_VIRTADDR sAddress,
-						      IMG_DEVMEM_SIZE_T uiLength,
-						      IMG_HANDLE * phReservation)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_HEAP *psDevmemServerHeapInt;
-	DEVMEMINT_RESERVATION *psReservationInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmemServerHeapInt = (DEVMEMINT_HEAP *) hDevmemServerHeap;
-
-	eError =
-	    DevmemIntReserveRange(psDevmemServerHeapInt, sAddress, uiLength, &psReservationInt);
-
-	*phReservation = psReservationInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnreserveRange(IMG_HANDLE hBridge, IMG_HANDLE hReservation)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_RESERVATION *psReservationInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psReservationInt = (DEVMEMINT_RESERVATION *) hReservation;
-
-	eError = DevmemIntUnreserveRange(psReservationInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeChangeSparseMem(IMG_HANDLE hBridge,
-						IMG_HANDLE hSrvDevMemHeap,
-						IMG_HANDLE hPMR,
-						IMG_UINT32 ui32AllocPageCount,
-						IMG_UINT32 * pui32AllocPageIndices,
-						IMG_UINT32 ui32FreePageCount,
-						IMG_UINT32 * pui32FreePageIndices,
-						IMG_UINT32 ui32SparseFlags,
-						PVRSRV_MEMALLOCFLAGS_T uiFlags,
-						IMG_DEV_VIRTADDR sDevVAddr, IMG_UINT64 ui64CPUVAddr)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_HEAP *psSrvDevMemHeapInt;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSrvDevMemHeapInt = (DEVMEMINT_HEAP *) hSrvDevMemHeap;
-	psPMRInt = (PMR *) hPMR;
-
-	eError =
-	    DevmemIntChangeSparse(psSrvDevMemHeapInt,
-				  psPMRInt,
-				  ui32AllocPageCount,
-				  pui32AllocPageIndices,
-				  ui32FreePageCount,
-				  pui32FreePageIndices,
-				  ui32SparseFlags, uiFlags, sDevVAddr, ui64CPUVAddr);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntMapPages(IMG_HANDLE hBridge,
-						  IMG_HANDLE hReservation,
-						  IMG_HANDLE hPMR,
-						  IMG_UINT32 ui32PageCount,
-						  IMG_UINT32 ui32PhysicalPgOffset,
-						  PVRSRV_MEMALLOCFLAGS_T uiFlags,
-						  IMG_DEV_VIRTADDR sDevVAddr)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_RESERVATION *psReservationInt;
-	PMR *psPMRInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psReservationInt = (DEVMEMINT_RESERVATION *) hReservation;
-	psPMRInt = (PMR *) hPMR;
-
-	eError =
-	    DevmemIntMapPages(psReservationInt,
-			      psPMRInt, ui32PageCount, ui32PhysicalPgOffset, uiFlags, sDevVAddr);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntUnmapPages(IMG_HANDLE hBridge,
-						    IMG_HANDLE hReservation,
-						    IMG_DEV_VIRTADDR sDevVAddr,
-						    IMG_UINT32 ui32PageCount)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_RESERVATION *psReservationInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psReservationInt = (DEVMEMINT_RESERVATION *) hReservation;
-
-	eError = DevmemIntUnmapPages(psReservationInt, sDevVAddr, ui32PageCount);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIsVDevAddrValid(IMG_HANDLE hBridge,
-						      IMG_HANDLE hDevmemCtx,
-						      IMG_DEV_VIRTADDR sAddress)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevmemCtxInt;
-
-	psDevmemCtxInt = (DEVMEMINT_CTX *) hDevmemCtx;
-
-	eError =
-	    DevmemIntIsVDevAddrValid(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-				     psDevmemCtxInt, sAddress);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemFlushDevSLCRange(IMG_HANDLE hBridge,
-						       IMG_HANDLE hDevmemCtx,
-						       IMG_DEV_VIRTADDR sAddress,
-						       IMG_DEVMEM_SIZE_T uiSize,
-						       IMG_BOOL bInvalidate)
-{
-#if defined(RGX_SRV_SLC_RANGEBASED_CFI_SUPPORTED)
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevmemCtxInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmemCtxInt = (DEVMEMINT_CTX *) hDevmemCtx;
-
-	eError = DevmemIntFlushDevSLCRange(psDevmemCtxInt, sAddress, uiSize, bInvalidate);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(hDevmemCtx);
-	PVR_UNREFERENCED_PARAMETER(sAddress);
-	PVR_UNREFERENCED_PARAMETER(uiSize);
-	PVR_UNREFERENCED_PARAMETER(bInvalidate);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemInvalidateFBSCTable(IMG_HANDLE hBridge,
-							  IMG_HANDLE hDevmemCtx,
-							  IMG_UINT64 ui64FBSCEntries)
-{
-#if defined(RGX_FEATURE_FBCDC)
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevmemCtxInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmemCtxInt = (DEVMEMINT_CTX *) hDevmemCtx;
-
-	eError = DevmemIntInvalidateFBSCTable(psDevmemCtxInt, ui64FBSCEntries);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(hDevmemCtx);
-	PVR_UNREFERENCED_PARAMETER(ui64FBSCEntries);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapConfigCount(IMG_HANDLE hBridge,
-						       IMG_UINT32 * pui32NumHeapConfigs)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    HeapCfgHeapConfigCount(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-				   pui32NumHeapConfigs);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapCount(IMG_HANDLE hBridge,
-						 IMG_UINT32 ui32HeapConfigIndex,
-						 IMG_UINT32 * pui32NumHeaps)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    HeapCfgHeapCount(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-			     ui32HeapConfigIndex, pui32NumHeaps);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapConfigName(IMG_HANDLE hBridge,
-						      IMG_UINT32 ui32HeapConfigIndex,
-						      IMG_UINT32 ui32HeapConfigNameBufSz,
-						      IMG_CHAR * puiHeapConfigName)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    HeapCfgHeapConfigName(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-				  ui32HeapConfigIndex, ui32HeapConfigNameBufSz, puiHeapConfigName);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeHeapCfgHeapDetails(IMG_HANDLE hBridge,
-						   IMG_UINT32 ui32HeapConfigIndex,
-						   IMG_UINT32 ui32HeapIndex,
-						   IMG_UINT32 ui32HeapNameBufSz,
-						   IMG_CHAR * puiHeapNameOut,
-						   IMG_DEV_VIRTADDR * psDevVAddrBase,
-						   IMG_DEVMEM_SIZE_T * puiHeapLength,
-						   IMG_DEVMEM_SIZE_T * puiReservedRegionLength,
-						   IMG_UINT32 * pui32Log2DataPageSizeOut,
-						   IMG_UINT32 * pui32Log2ImportAlignmentOut)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    HeapCfgHeapDetails(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-			       ui32HeapConfigIndex,
-			       ui32HeapIndex,
-			       ui32HeapNameBufSz,
-			       puiHeapNameOut,
-			       psDevVAddrBase,
-			       puiHeapLength,
-			       puiReservedRegionLength,
-			       pui32Log2DataPageSizeOut, pui32Log2ImportAlignmentOut);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemIntRegisterPFNotifyKM(IMG_HANDLE hBridge,
-							    IMG_HANDLE hDevm,
-							    IMG_UINT32 ui32PID, IMG_BOOL bRegister)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevmInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psDevmInt = (DEVMEMINT_CTX *) hDevm;
-
-	eError = DevmemIntRegisterPFNotifyKM(psDevmInt, ui32PID, bRegister);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetMaxPhysHeapCount(IMG_HANDLE hBridge,
-						    IMG_UINT32 * pui32PhysHeapCount)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    PVRSRVGetMaxPhysHeapCountKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					pui32PhysHeapCount);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysHeapGetMemInfo(IMG_HANDLE hBridge,
-						   IMG_UINT32 ui32PhysHeapCount,
-						   PVRSRV_PHYS_HEAP * peaPhysHeapID,
-						   PHYS_HEAP_MEM_STATS * pasapPhysHeapMemStats)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    PVRSRVPhysHeapGetMemInfoKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-				       ui32PhysHeapCount, peaPhysHeapID, pasapPhysHeapMemStats);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetDefaultPhysicalHeap(IMG_HANDLE hBridge,
-						       PVRSRV_PHYS_HEAP * peHeap)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    PVRSRVGetDefaultPhysicalHeapKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge), peHeap);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetHeapPhysMemUsage(IMG_HANDLE hBridge,
-						    IMG_UINT32 ui32PhysHeapCount,
-						    PHYS_HEAP_MEM_STATS * pasapPhysHeapMemStats)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    PVRSRVGetHeapPhysMemUsageKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					ui32PhysHeapCount, pasapPhysHeapMemStats);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeDevmemGetFaultAddress(IMG_HANDLE hBridge,
-						      IMG_HANDLE hDevmemCtx,
-						      IMG_DEV_VIRTADDR * psFaultAddress)
-{
-	PVRSRV_ERROR eError;
-	DEVMEMINT_CTX *psDevmemCtxInt;
-
-	psDevmemCtxInt = (DEVMEMINT_CTX *) hDevmemCtx;
-
-	eError =
-	    DevmemIntGetFaultAddress(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-				     psDevmemCtxInt, psFaultAddress);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePVRSRVUpdateOOMStats(IMG_HANDLE hBridge,
-						     IMG_UINT32 ui32ui32StatType, IMG_PID ui32pid)
-{
-#if defined(PVRSRV_ENABLE_PROCESS_STATS)
-	PVRSRV_ERROR eError;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError = PVRSRVServerUpdateOOMStats(ui32ui32StatType, ui32pid);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(ui32ui32StatType);
-	PVR_UNREFERENCED_PARAMETER(ui32pid);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgePhysHeapGetMemInfoPkd(IMG_HANDLE hBridge,
-						      IMG_UINT32 ui32PhysHeapCount,
-						      PVRSRV_PHYS_HEAP * peaPhysHeapID,
-						      PHYS_HEAP_MEM_STATS_PKD *
-						      psapPhysHeapMemStats)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    PVRSRVPhysHeapGetMemInfoPkdKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					  ui32PhysHeapCount, peaPhysHeapID, psapPhysHeapMemStats);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeGetHeapPhysMemUsagePkd(IMG_HANDLE hBridge,
-						       IMG_UINT32 ui32PhysHeapCount,
-						       PHYS_HEAP_MEM_STATS_PKD *
-						       psapPhysHeapMemStats)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    PVRSRVGetHeapPhysMemUsagePkdKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					   ui32PhysHeapCount, psapPhysHeapMemStats);
-
-	return eError;
-}

drivers/gpu/drm/img-rogue/client_pvrtl_bridge.h

@@ -1,93 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for pvrtl
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for pvrtl
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_PVRTL_BRIDGE_H
-#define CLIENT_PVRTL_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_pvrtl_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLOpenStream(IMG_HANDLE hBridge,
-					     const IMG_CHAR * puiName,
-					     IMG_UINT32 ui32Mode,
-					     IMG_HANDLE * phSD, IMG_HANDLE * phTLPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLCloseStream(IMG_HANDLE hBridge, IMG_HANDLE hSD);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLAcquireData(IMG_HANDLE hBridge,
-					      IMG_HANDLE hSD,
-					      IMG_UINT32 * pui32ReadOffset,
-					      IMG_UINT32 * pui32ReadLen);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLReleaseData(IMG_HANDLE hBridge,
-					      IMG_HANDLE hSD,
-					      IMG_UINT32 ui32ReadOffset, IMG_UINT32 ui32ReadLen);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLDiscoverStreams(IMG_HANDLE hBridge,
-						  const IMG_CHAR * puiNamePattern,
-						  IMG_UINT32 ui32Size,
-						  IMG_CHAR * puiStreams,
-						  IMG_UINT32 * pui32NumFound);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLReserveStream(IMG_HANDLE hBridge,
-						IMG_HANDLE hSD,
-						IMG_UINT32 * pui32BufferOffset,
-						IMG_UINT32 ui32Size,
-						IMG_UINT32 ui32SizeMin,
-						IMG_UINT32 * pui32Available);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLCommitStream(IMG_HANDLE hBridge,
-					       IMG_HANDLE hSD, IMG_UINT32 ui32ReqSize);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLWriteData(IMG_HANDLE hBridge,
-					    IMG_HANDLE hSD,
-					    IMG_UINT32 ui32Size, IMG_BYTE * pui8Data);
-
-#endif /* CLIENT_PVRTL_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_pvrtl_direct_bridge.c

@@ -1,175 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for pvrtl
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for pvrtl
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_pvrtl_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-#include "devicemem_typedefs.h"
-#include "pvrsrv_tlcommon.h"
-
-#include "tlserver.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLOpenStream(IMG_HANDLE hBridge,
-					     const IMG_CHAR * puiName,
-					     IMG_UINT32 ui32Mode,
-					     IMG_HANDLE * phSD, IMG_HANDLE * phTLPMR)
-{
-	PVRSRV_ERROR eError;
-	TL_STREAM_DESC *psSDInt = NULL;
-	PMR *psTLPMRInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError = TLServerOpenStreamKM(puiName, ui32Mode, &psSDInt, &psTLPMRInt);
-
-	*phSD = psSDInt;
-	*phTLPMR = psTLPMRInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLCloseStream(IMG_HANDLE hBridge, IMG_HANDLE hSD)
-{
-	PVRSRV_ERROR eError;
-	TL_STREAM_DESC *psSDInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSDInt = (TL_STREAM_DESC *) hSD;
-
-	eError = TLServerCloseStreamKM(psSDInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLAcquireData(IMG_HANDLE hBridge,
-					      IMG_HANDLE hSD,
-					      IMG_UINT32 * pui32ReadOffset,
-					      IMG_UINT32 * pui32ReadLen)
-{
-	PVRSRV_ERROR eError;
-	TL_STREAM_DESC *psSDInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSDInt = (TL_STREAM_DESC *) hSD;
-
-	eError = TLServerAcquireDataKM(psSDInt, pui32ReadOffset, pui32ReadLen);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLReleaseData(IMG_HANDLE hBridge,
-					      IMG_HANDLE hSD,
-					      IMG_UINT32 ui32ReadOffset, IMG_UINT32 ui32ReadLen)
-{
-	PVRSRV_ERROR eError;
-	TL_STREAM_DESC *psSDInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSDInt = (TL_STREAM_DESC *) hSD;
-
-	eError = TLServerReleaseDataKM(psSDInt, ui32ReadOffset, ui32ReadLen);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLDiscoverStreams(IMG_HANDLE hBridge,
-						  const IMG_CHAR * puiNamePattern,
-						  IMG_UINT32 ui32Size,
-						  IMG_CHAR * puiStreams, IMG_UINT32 * pui32NumFound)
-{
-	PVRSRV_ERROR eError;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError = TLServerDiscoverStreamsKM(puiNamePattern, ui32Size, puiStreams, pui32NumFound);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLReserveStream(IMG_HANDLE hBridge,
-						IMG_HANDLE hSD,
-						IMG_UINT32 * pui32BufferOffset,
-						IMG_UINT32 ui32Size,
-						IMG_UINT32 ui32SizeMin, IMG_UINT32 * pui32Available)
-{
-	PVRSRV_ERROR eError;
-	TL_STREAM_DESC *psSDInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSDInt = (TL_STREAM_DESC *) hSD;
-
-	eError =
-	    TLServerReserveStreamKM(psSDInt,
-				    pui32BufferOffset, ui32Size, ui32SizeMin, pui32Available);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLCommitStream(IMG_HANDLE hBridge,
-					       IMG_HANDLE hSD, IMG_UINT32 ui32ReqSize)
-{
-	PVRSRV_ERROR eError;
-	TL_STREAM_DESC *psSDInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSDInt = (TL_STREAM_DESC *) hSD;
-
-	eError = TLServerCommitStreamKM(psSDInt, ui32ReqSize);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeTLWriteData(IMG_HANDLE hBridge,
-					    IMG_HANDLE hSD,
-					    IMG_UINT32 ui32Size, IMG_BYTE * pui8Data)
-{
-	PVRSRV_ERROR eError;
-	TL_STREAM_DESC *psSDInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSDInt = (TL_STREAM_DESC *) hSD;
-
-	eError = TLServerWriteDataKM(psSDInt, ui32Size, pui8Data);
-
-	return eError;
-}

drivers/gpu/drm/img-rogue/client_ri_bridge.h

@@ -1,89 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for ri
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for ri
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_RI_BRIDGE_H
-#define CLIENT_RI_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_ri_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWritePMREntry(IMG_HANDLE hBridge, IMG_HANDLE hPMRHandle);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWriteMEMDESCEntry(IMG_HANDLE hBridge,
-						    IMG_HANDLE hPMRHandle,
-						    IMG_UINT32 ui32TextBSize,
-						    const IMG_CHAR * puiTextB,
-						    IMG_UINT64 ui64Offset,
-						    IMG_UINT64 ui64Size,
-						    IMG_BOOL bIsImport,
-						    IMG_BOOL bIsSuballoc, IMG_HANDLE * phRIHandle);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWriteProcListEntry(IMG_HANDLE hBridge,
-						     IMG_UINT32 ui32TextBSize,
-						     const IMG_CHAR * puiTextB,
-						     IMG_UINT64 ui64Size,
-						     IMG_UINT64 ui64DevVAddr,
-						     IMG_HANDLE * phRIHandle);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIUpdateMEMDESCAddr(IMG_HANDLE hBridge,
-						    IMG_HANDLE hRIHandle, IMG_DEV_VIRTADDR sAddr);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDeleteMEMDESCEntry(IMG_HANDLE hBridge, IMG_HANDLE hRIHandle);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDumpList(IMG_HANDLE hBridge, IMG_HANDLE hPMRHandle);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDumpAll(IMG_HANDLE hBridge);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDumpProcess(IMG_HANDLE hBridge, IMG_PID ui32Pid);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWritePMREntryWithOwner(IMG_HANDLE hBridge,
-							 IMG_HANDLE hPMRHandle, IMG_PID ui32Owner);
-
-#endif /* CLIENT_RI_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_ri_direct_bridge.c

@@ -1,182 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for ri
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for ri
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_ri_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-#include "ri_typedefs.h"
-
-#include "ri_server.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWritePMREntry(IMG_HANDLE hBridge, IMG_HANDLE hPMRHandle)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRHandleInt = (PMR *) hPMRHandle;
-
-	eError = RIWritePMREntryKM(psPMRHandleInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWriteMEMDESCEntry(IMG_HANDLE hBridge,
-						    IMG_HANDLE hPMRHandle,
-						    IMG_UINT32 ui32TextBSize,
-						    const IMG_CHAR * puiTextB,
-						    IMG_UINT64 ui64Offset,
-						    IMG_UINT64 ui64Size,
-						    IMG_BOOL bIsImport,
-						    IMG_BOOL bIsSuballoc, IMG_HANDLE * phRIHandle)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRHandleInt;
-	RI_HANDLE psRIHandleInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRHandleInt = (PMR *) hPMRHandle;
-
-	eError =
-	    RIWriteMEMDESCEntryKM(psPMRHandleInt,
-				  ui32TextBSize,
-				  puiTextB,
-				  ui64Offset, ui64Size, bIsImport, bIsSuballoc, &psRIHandleInt);
-
-	*phRIHandle = psRIHandleInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWriteProcListEntry(IMG_HANDLE hBridge,
-						     IMG_UINT32 ui32TextBSize,
-						     const IMG_CHAR * puiTextB,
-						     IMG_UINT64 ui64Size,
-						     IMG_UINT64 ui64DevVAddr,
-						     IMG_HANDLE * phRIHandle)
-{
-	PVRSRV_ERROR eError;
-	RI_HANDLE psRIHandleInt = NULL;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError =
-	    RIWriteProcListEntryKM(ui32TextBSize, puiTextB, ui64Size, ui64DevVAddr, &psRIHandleInt);
-
-	*phRIHandle = psRIHandleInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIUpdateMEMDESCAddr(IMG_HANDLE hBridge,
-						    IMG_HANDLE hRIHandle, IMG_DEV_VIRTADDR sAddr)
-{
-	PVRSRV_ERROR eError;
-	RI_HANDLE psRIHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psRIHandleInt = (RI_HANDLE) hRIHandle;
-
-	eError = RIUpdateMEMDESCAddrKM(psRIHandleInt, sAddr);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDeleteMEMDESCEntry(IMG_HANDLE hBridge, IMG_HANDLE hRIHandle)
-{
-	PVRSRV_ERROR eError;
-	RI_HANDLE psRIHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psRIHandleInt = (RI_HANDLE) hRIHandle;
-
-	eError = RIDeleteMEMDESCEntryKM(psRIHandleInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDumpList(IMG_HANDLE hBridge, IMG_HANDLE hPMRHandle)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRHandleInt = (PMR *) hPMRHandle;
-
-	eError = RIDumpListKM(psPMRHandleInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDumpAll(IMG_HANDLE hBridge)
-{
-	PVRSRV_ERROR eError;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError = RIDumpAllKM();
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIDumpProcess(IMG_HANDLE hBridge, IMG_PID ui32Pid)
-{
-	PVRSRV_ERROR eError;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError = RIDumpProcessKM(ui32Pid);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeRIWritePMREntryWithOwner(IMG_HANDLE hBridge,
-							 IMG_HANDLE hPMRHandle, IMG_PID ui32Owner)
-{
-	PVRSRV_ERROR eError;
-	PMR *psPMRHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psPMRHandleInt = (PMR *) hPMRHandle;
-
-	eError = RIWritePMREntryWithOwnerKM(psPMRHandleInt, ui32Owner);
-
-	return eError;
-}

drivers/gpu/drm/img-rogue/client_sync_bridge.h

@@ -1,102 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for sync
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for sync
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_SYNC_BRIDGE_H
-#define CLIENT_SYNC_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_sync_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeAllocSyncPrimitiveBlock(IMG_HANDLE hBridge,
-							IMG_HANDLE * phSyncHandle,
-							IMG_UINT32 * pui32SyncPrimVAddr,
-							IMG_UINT32 * pui32SyncPrimBlockSize,
-							IMG_HANDLE * phhSyncPMR);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeFreeSyncPrimitiveBlock(IMG_HANDLE hBridge, IMG_HANDLE hSyncHandle);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimSet(IMG_HANDLE hBridge,
-					    IMG_HANDLE hSyncHandle,
-					    IMG_UINT32 ui32Index, IMG_UINT32 ui32Value);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDump(IMG_HANDLE hBridge,
-					      IMG_HANDLE hSyncHandle, IMG_UINT32 ui32Offset);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDumpValue(IMG_HANDLE hBridge,
-						   IMG_HANDLE hSyncHandle,
-						   IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDumpPol(IMG_HANDLE hBridge,
-						 IMG_HANDLE hSyncHandle,
-						 IMG_UINT32 ui32Offset,
-						 IMG_UINT32 ui32Value,
-						 IMG_UINT32 ui32Mask,
-						 PDUMP_POLL_OPERATOR eOperator,
-						 PDUMP_FLAGS_T uiPDumpFlags);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDumpCBP(IMG_HANDLE hBridge,
-						 IMG_HANDLE hSyncHandle,
-						 IMG_UINT32 ui32Offset,
-						 IMG_DEVMEM_OFFSET_T uiWriteOffset,
-						 IMG_DEVMEM_SIZE_T uiPacketSize,
-						 IMG_DEVMEM_SIZE_T uiBufferSize);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncAllocEvent(IMG_HANDLE hBridge,
-					       IMG_BOOL bServerSync,
-					       IMG_UINT32 ui32FWAddr,
-					       IMG_UINT32 ui32ClassNameSize,
-					       const IMG_CHAR * puiClassName);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncFreeEvent(IMG_HANDLE hBridge, IMG_UINT32 ui32FWAddr);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncCheckpointSignalledPDumpPol(IMG_HANDLE hBridge,
-								PVRSRV_FENCE hFence);
-
-#endif /* CLIENT_SYNC_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_sync_direct_bridge.c

@@ -1,262 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for sync
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for sync
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_sync_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-#include "pdump.h"
-#include "pdumpdefs.h"
-#include "devicemem_typedefs.h"
-#include "pvrsrv_sync_km.h"
-#include <powervr/pvrsrv_sync_ext.h>
-
-#include "sync.h"
-#include "sync_server.h"
-#include "pdump.h"
-#include "pvrsrv_sync_km.h"
-#include "sync_fallback_server.h"
-#include "sync_checkpoint.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeAllocSyncPrimitiveBlock(IMG_HANDLE hBridge,
-							IMG_HANDLE * phSyncHandle,
-							IMG_UINT32 * pui32SyncPrimVAddr,
-							IMG_UINT32 * pui32SyncPrimBlockSize,
-							IMG_HANDLE * phhSyncPMR)
-{
-	PVRSRV_ERROR eError;
-	SYNC_PRIMITIVE_BLOCK *psSyncHandleInt = NULL;
-	PMR *pshSyncPMRInt = NULL;
-
-	eError =
-	    PVRSRVAllocSyncPrimitiveBlockKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-					    &psSyncHandleInt,
-					    pui32SyncPrimVAddr,
-					    pui32SyncPrimBlockSize, &pshSyncPMRInt);
-
-	*phSyncHandle = psSyncHandleInt;
-	*phhSyncPMR = pshSyncPMRInt;
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeFreeSyncPrimitiveBlock(IMG_HANDLE hBridge, IMG_HANDLE hSyncHandle)
-{
-	PVRSRV_ERROR eError;
-	SYNC_PRIMITIVE_BLOCK *psSyncHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSyncHandleInt = (SYNC_PRIMITIVE_BLOCK *) hSyncHandle;
-
-	eError = PVRSRVFreeSyncPrimitiveBlockKM(psSyncHandleInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimSet(IMG_HANDLE hBridge,
-					    IMG_HANDLE hSyncHandle,
-					    IMG_UINT32 ui32Index, IMG_UINT32 ui32Value)
-{
-	PVRSRV_ERROR eError;
-	SYNC_PRIMITIVE_BLOCK *psSyncHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSyncHandleInt = (SYNC_PRIMITIVE_BLOCK *) hSyncHandle;
-
-	eError = PVRSRVSyncPrimSetKM(psSyncHandleInt, ui32Index, ui32Value);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDump(IMG_HANDLE hBridge,
-					      IMG_HANDLE hSyncHandle, IMG_UINT32 ui32Offset)
-{
-#if defined(PDUMP)
-	PVRSRV_ERROR eError;
-	SYNC_PRIMITIVE_BLOCK *psSyncHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSyncHandleInt = (SYNC_PRIMITIVE_BLOCK *) hSyncHandle;
-
-	eError = PVRSRVSyncPrimPDumpKM(psSyncHandleInt, ui32Offset);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(hSyncHandle);
-	PVR_UNREFERENCED_PARAMETER(ui32Offset);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDumpValue(IMG_HANDLE hBridge,
-						   IMG_HANDLE hSyncHandle,
-						   IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value)
-{
-#if defined(PDUMP)
-	PVRSRV_ERROR eError;
-	SYNC_PRIMITIVE_BLOCK *psSyncHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSyncHandleInt = (SYNC_PRIMITIVE_BLOCK *) hSyncHandle;
-
-	eError = PVRSRVSyncPrimPDumpValueKM(psSyncHandleInt, ui32Offset, ui32Value);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(hSyncHandle);
-	PVR_UNREFERENCED_PARAMETER(ui32Offset);
-	PVR_UNREFERENCED_PARAMETER(ui32Value);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDumpPol(IMG_HANDLE hBridge,
-						 IMG_HANDLE hSyncHandle,
-						 IMG_UINT32 ui32Offset,
-						 IMG_UINT32 ui32Value,
-						 IMG_UINT32 ui32Mask,
-						 PDUMP_POLL_OPERATOR eOperator,
-						 PDUMP_FLAGS_T uiPDumpFlags)
-{
-#if defined(PDUMP)
-	PVRSRV_ERROR eError;
-	SYNC_PRIMITIVE_BLOCK *psSyncHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSyncHandleInt = (SYNC_PRIMITIVE_BLOCK *) hSyncHandle;
-
-	eError =
-	    PVRSRVSyncPrimPDumpPolKM(psSyncHandleInt,
-				     ui32Offset, ui32Value, ui32Mask, eOperator, uiPDumpFlags);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(hSyncHandle);
-	PVR_UNREFERENCED_PARAMETER(ui32Offset);
-	PVR_UNREFERENCED_PARAMETER(ui32Value);
-	PVR_UNREFERENCED_PARAMETER(ui32Mask);
-	PVR_UNREFERENCED_PARAMETER(eOperator);
-	PVR_UNREFERENCED_PARAMETER(uiPDumpFlags);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncPrimPDumpCBP(IMG_HANDLE hBridge,
-						 IMG_HANDLE hSyncHandle,
-						 IMG_UINT32 ui32Offset,
-						 IMG_DEVMEM_OFFSET_T uiWriteOffset,
-						 IMG_DEVMEM_SIZE_T uiPacketSize,
-						 IMG_DEVMEM_SIZE_T uiBufferSize)
-{
-#if defined(PDUMP)
-	PVRSRV_ERROR eError;
-	SYNC_PRIMITIVE_BLOCK *psSyncHandleInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	psSyncHandleInt = (SYNC_PRIMITIVE_BLOCK *) hSyncHandle;
-
-	eError =
-	    PVRSRVSyncPrimPDumpCBPKM(psSyncHandleInt,
-				     ui32Offset, uiWriteOffset, uiPacketSize, uiBufferSize);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(hSyncHandle);
-	PVR_UNREFERENCED_PARAMETER(ui32Offset);
-	PVR_UNREFERENCED_PARAMETER(uiWriteOffset);
-	PVR_UNREFERENCED_PARAMETER(uiPacketSize);
-	PVR_UNREFERENCED_PARAMETER(uiBufferSize);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncAllocEvent(IMG_HANDLE hBridge,
-					       IMG_BOOL bServerSync,
-					       IMG_UINT32 ui32FWAddr,
-					       IMG_UINT32 ui32ClassNameSize,
-					       const IMG_CHAR * puiClassName)
-{
-	PVRSRV_ERROR eError;
-
-	eError =
-	    PVRSRVSyncAllocEventKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-				   bServerSync, ui32FWAddr, ui32ClassNameSize, puiClassName);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncFreeEvent(IMG_HANDLE hBridge, IMG_UINT32 ui32FWAddr)
-{
-	PVRSRV_ERROR eError;
-
-	eError = PVRSRVSyncFreeEventKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge), ui32FWAddr);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncCheckpointSignalledPDumpPol(IMG_HANDLE hBridge,
-								PVRSRV_FENCE hFence)
-{
-#if defined(PDUMP)
-	PVRSRV_ERROR eError;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	eError = PVRSRVSyncCheckpointSignalledPDumpPolKM(hFence);
-
-	return eError;
-#else
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-	PVR_UNREFERENCED_PARAMETER(hFence);
-
-	return PVRSRV_ERROR_NOT_IMPLEMENTED;
-#endif
-}

drivers/gpu/drm/img-rogue/client_synctracking_bridge.h

@@ -1,68 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Client bridge header for synctracking
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Exports the client bridge functions for synctracking
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#ifndef CLIENT_SYNCTRACKING_BRIDGE_H
-#define CLIENT_SYNCTRACKING_BRIDGE_H
-
-#include "img_defs.h"
-#include "pvrsrv_error.h"
-
-#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
-#include "pvr_bridge_client.h"
-#include "pvr_bridge.h"
-#endif
-
-#include "common_synctracking_bridge.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncRecordRemoveByHandle(IMG_HANDLE hBridge, IMG_HANDLE hhRecord);
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncRecordAdd(IMG_HANDLE hBridge,
-					      IMG_HANDLE * phhRecord,
-					      IMG_HANDLE hhServerSyncPrimBlock,
-					      IMG_UINT32 ui32ui32FwBlockAddr,
-					      IMG_UINT32 ui32ui32SyncOffset,
-					      IMG_BOOL bbServerSync,
-					      IMG_UINT32 ui32ClassNameSize,
-					      const IMG_CHAR * puiClassName);
-
-#endif /* CLIENT_SYNCTRACKING_BRIDGE_H */

drivers/gpu/drm/img-rogue/client_synctracking_direct_bridge.c

@@ -1,92 +0,0 @@
-/*******************************************************************************
-@File
-@Title          Direct client bridge for synctracking
-@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
-@Description    Implements the client side of the bridge for synctracking
-                which is used in calls from Server context.
-@License        Dual MIT/GPLv2
-
-The contents of this file are subject to the MIT license as set out below.
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-Alternatively, the contents of this file may be used under the terms of
-the GNU General Public License Version 2 ("GPL") in which case the provisions
-of GPL are applicable instead of those above.
-
-If you wish to allow use of your version of this file only under the terms of
-GPL, and not to allow others to use your version of this file under the terms
-of the MIT license, indicate your decision by deleting the provisions above
-and replace them with the notice and other provisions required by GPL as set
-out in the file called "GPL-COPYING" included in this distribution. If you do
-not delete the provisions above, a recipient may use your version of this file
-under the terms of either the MIT license or GPL.
-
-This License is also included in this distribution in the file called
-"MIT-COPYING".
-
-EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
-PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
-PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
-COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*******************************************************************************/
-
-#include "client_synctracking_bridge.h"
-#include "img_defs.h"
-#include "pvr_debug.h"
-
-/* Module specific includes */
-
-#include "sync.h"
-#include "sync_server.h"
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncRecordRemoveByHandle(IMG_HANDLE hBridge, IMG_HANDLE hhRecord)
-{
-	PVRSRV_ERROR eError;
-	SYNC_RECORD_HANDLE pshRecordInt;
-	PVR_UNREFERENCED_PARAMETER(hBridge);
-
-	pshRecordInt = (SYNC_RECORD_HANDLE) hhRecord;
-
-	eError = PVRSRVSyncRecordRemoveByHandleKM(pshRecordInt);
-
-	return eError;
-}
-
-IMG_INTERNAL PVRSRV_ERROR BridgeSyncRecordAdd(IMG_HANDLE hBridge,
-					      IMG_HANDLE * phhRecord,
-					      IMG_HANDLE hhServerSyncPrimBlock,
-					      IMG_UINT32 ui32ui32FwBlockAddr,
-					      IMG_UINT32 ui32ui32SyncOffset,
-					      IMG_BOOL bbServerSync,
-					      IMG_UINT32 ui32ClassNameSize,
-					      const IMG_CHAR * puiClassName)
-{
-	PVRSRV_ERROR eError;
-	SYNC_RECORD_HANDLE pshRecordInt = NULL;
-	SYNC_PRIMITIVE_BLOCK *pshServerSyncPrimBlockInt;
-
-	pshServerSyncPrimBlockInt = (SYNC_PRIMITIVE_BLOCK *) hhServerSyncPrimBlock;
-
-	eError =
-	    PVRSRVSyncRecordAddKM(NULL, (PVRSRV_DEVICE_NODE *) ((void *)hBridge),
-				  &pshRecordInt,
-				  pshServerSyncPrimBlockInt,
-				  ui32ui32FwBlockAddr,
-				  ui32ui32SyncOffset,
-				  bbServerSync, ui32ClassNameSize, puiClassName);
-
-	*phhRecord = pshRecordInt;
-	return eError;
-}