Linux_SDK_V1.3.3

Signed-off-by: thead_admin <occ_thead@service.alibaba.com>

Kconfig

@@ -302,7 +302,7 @@ menu "Boot images"
 
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
-	default y if FASTBOOT
+	default n if FASTBOOT
 	help
 	  This enables support for booting images which use the Android
 	  image format header.

Makefile

@@ -219,7 +219,7 @@ endif
 
 ifeq ($(KBUILD_SRC),)
         # building in the source tree
-        srctree := .
+        srctree := $(shell pwd)
 else
         ifeq ($(KBUILD_SRC)/,$(dir $(CURDIR)))
                 # building in a subdirectory of the source tree
@@ -726,6 +726,7 @@ UBOOTINCLUDE    := \
 			$(if $(CONFIG_HAS_THUMB2),, \
 				-I$(srctree)/arch/$(ARCH)/thumb1/include),) \
 		-I$(srctree)/arch/$(ARCH)/include \
+		$(if $(CONFIG_TARGET_LIGHT_C910), -I$(srctree)/lib/sec_library/include) \
 		-include $(srctree)/include/linux/kconfig.h
 
 NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
@@ -811,7 +812,7 @@ PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`
 endif
 PLATFORM_LIBS += $(PLATFORM_LIBGCC)
 ifeq ($(CONFIG_TARGET_LIGHT_C910),y)
-PLATFORM_LIBS += -L $(shell pwd)/lib/sec_library -lsec_library
+PLATFORM_LIBS += -L $(srctree)/lib/sec_library -lsec_library
 endif
 
 ifdef CONFIG_CC_COVERAGE

arch/riscv/cpu/c9xx/cpu.c

@@ -141,8 +141,9 @@ void dcache_enable(void)
 #ifdef CONFIG_SPL_RISCV_MMODE
 #ifdef CONFIG_TARGET_LIGHT_C910
 	asm volatile (
-        "li x29, 0x11ff\n\t"
-        "csrw mhcr, x29\n\t"
+		"csrr x29, mhcr\n\t"
+        "ori x28, x29, 0x2\n\t"
+        "csrw mhcr, x28\n\t"
     );
 #endif
 #endif

arch/riscv/cpu/start.S

@@ -41,6 +41,12 @@ secondary_harts_relocation_error:
 _start:
 
 #if (defined CONFIG_SPL_BUILD) && (defined CONFIG_TARGET_LIGHT_C910)
+	/* Disable indirect branch prediction once entering into uboot world */
+	li t0, 0x117f
+	csrw 0x7c1, t0
+	/* Disable fence broadcase and HW TLB */
+	li t0, 0x66e30c
+	csrw 0x7c5, t0
 	/* Enable cache ASAP as LIGHT's requirement */
 	jal	icache_enable
 	jal	dcache_enable

arch/riscv/dts/Makefile

@@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_ICE_C910) += ice-c910.dtb
 dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
 dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
-dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb
+dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb
 
 targets += $(dtb-y)
 

arch/riscv/dts/light-lpi4a.dts

@@ -0,0 +1,488 @@
+/dts-v1/;
+/ {
+	model = "T-HEAD c910 light";
+	compatible = "thead,c910_light";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0xc0000000 0x0 0x40000000>;
+	};
+
+	aliases {
+		spi0 = &spi0;
+		spi1 = &qspi0;
+		spi2 = &qspi1;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <3000000>;
+		u-boot,dm-pre-reloc;
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu";
+			mmu-type = "riscv,sv39";
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		ranges;
+		u-boot,dm-pre-reloc;
+
+		intc: interrupt-controller@ffd8000000 {
+			compatible = "riscv,plic0";
+			reg = <0xff 0xd8000000 0x0 0x04000000>;
+			status = "disabled";
+		};
+
+		dummy_apb: apb-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <62500000>;
+			clock-output-names = "dummy_apb";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_ahb: ahb-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <250000000>;
+			clock-output-names = "core";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_spi: spi-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <396000000>;
+			clock-output-names = "dummy_spi";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_qspi0: qspi0-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <792000000>;
+			clock-output-names = "dummy_qspi0";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_uart_sclk: uart-sclk-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <100000000>;
+			clock-output-names = "dummy_uart_sclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_i2c_icclk: i2c-icclk-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+			clock-output-names = "dummy_i2c_icclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_dpu_pixclk: dpu-pix-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <74250000>;
+			clock-output-names = "dummy_dpu_pixclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_dphy_refclk: dphy-ref-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <24000000>;
+			clock-output-names = "dummy_dpu_refclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		i2c0: i2c@ffe7f20000 {
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xe7f20000 0x0 0x4000>;
+			clocks = <&dummy_i2c_icclk>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c1: i2c@ffe7f24000{
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xe7f24000 0x0 0x4000>;
+			clocks = <&dummy_i2c_icclk>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c2: i2c@ffec00c000{
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xec00c000 0x0 0x4000>;
+			clocks = <&dummy_i2c_icclk>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c3: i2c@ffec014000{
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xec014000 0x0 0x4000>;
+			clocks = <&dummy_i2c_icclk>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c4: i2c@ffe7f28000{
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xe7f28000 0x0 0x4000>;
+			clocks = <&dummy_i2c_icclk>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			pcal6408ahk_a: gpio@20 {
+				compatible = "nxp,pca9554";
+				reg = <0x20>;
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+		};
+
+		i2c5: i2c@fff7f2c000{
+			compatible = "snps,designware-i2c";
+			reg = <0xff 0xf7f2c000 0x0 0x4000>;
+			clocks = <&dummy_i2c_icclk>;
+			clock-frequency = <100000>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		serial@ffe7014000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xe7014000 0x0 0x400>;
+			clocks = <&dummy_uart_sclk>;
+			clock-frequency = <100000000>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			u-boot,dm-pre-reloc;
+		};
+
+		gmac0: ethernet@ffe7070000 {
+			compatible = "snps,dwmac";
+			reg = <0xff 0xe7070000 0x0 0x2000>;
+			clocks = <&dummy_apb>;
+			clock-names = "stmmaceth";
+			snps,pbl = <32>;
+			snps,fixed-burst;
+
+			phy-mode = "rgmii-id";
+			phy-handle = <&phy_88E1111_a>;
+			status = "okay";
+			mdio0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				phy_88E1111_a: ethernet-phy@1 {
+					reg = <0x1>;
+				};
+
+				phy_88E1111_b: ethernet-phy@2 {
+					reg = <0x2>;
+				};
+			};
+		};
+
+		gmac1: ethernet@ffe7060000 {
+			compatible = "snps,dwmac";
+			reg = <0xff 0xe7060000 0x0 0x2000>;
+			clocks = <&dummy_apb>;
+			clock-names = "stmmaceth";
+			snps,pbl = <32>;
+			snps,fixed-burst;
+			phy-mode = "rgmii-id";
+			phy-handle = <&phy_88E1111_b>;
+			status = "okay";
+		};
+
+		emmc: sdhci@ffe7080000 {
+			compatible = "snps,dwcmshc-sdhci";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			index = <0x0>;
+			clocks = <&dummy_ahb>;
+			clock-frequency = <198000000>;
+			clock-names = "core";
+			max-frequency = <198000000>;
+			sdhci-caps-mask = <0x0 0x1000000>;
+			mmc-hs400-1_8v;
+			non-removable;
+			no-sdio;
+			no-sd;
+			bus-width = <8>;
+			voltage= "1.8v";
+			pull_up;
+			io_fixed_1v8;
+			fifo-mode;
+			u-boot,dm-pre-reloc;
+		};
+
+		sdhci0: sd@ffe7090000 {
+			compatible = "snps,dwcmshc-sdhci";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			index = <0x1>;
+			clocks = <&dummy_ahb>;
+			clock-frequency = <198000000>;
+			max-frequency = <198000000>;
+			sd-uhs-sdr104;
+			pull_up;
+			clock-names = "core";
+			bus-width = <4>;
+			voltage= "3.3v";
+		};
+
+		qspi0: spi@ffea000000 {
+			compatible = "snps,dw-apb-ssi-quad";
+			reg = <0xff 0xea000000 0x0 0x1000>;
+			clocks = <&dummy_qspi0>;
+			num-cs = <1>;
+			cs-gpio = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
+			spi-max-frequency = <100000000>;
+			#address-cells = <1>;
+			#size-cells =<0>;
+			spi-flash@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "spi-nand";
+				spi-tx-bus-width = <4>;
+				spi-rx-bus-width = <4>;
+				reg = <0>;
+			};
+		};
+
+		qspi1: spi@fff8000000 {
+			compatible = "snps,dw-apb-ssi-quad";
+			reg = <0xff 0xf8000000 0x0 0x1000>;
+			clocks = <&dummy_spi>;
+			num-cs = <1>;
+			cs-gpio = <&gpio0_porta 1 0>; // GPIO_ACTIVE_HIGH: 0
+			spi-max-frequency = <66000000>;
+			#address-cells = <1>;
+			#size-cells =<0>;
+			spi-flash@0 {
+				#address-cells = <1>;
+				#size-cells = <1>;
+				compatible = "spi-nand";
+				spi-tx-bus-width = <4>;
+				spi-rx-bus-width = <4>;
+				reg = <0>;
+			};
+		};
+
+		spi0: spi@ffe700c000 {
+			compatible = "snps,dw-apb-ssi";
+			reg = <0xff 0xe700c000 0x0 0x1000>;
+			clocks = <&dummy_spi>;
+			cs-gpio = <&gpio2_porta 15 0>;
+			spi-max-frequency = <100000000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			flash@0 {
+				compatible = "jedec,spi-nor";
+				reg = <0>;
+				spi-max-frequency = <40000000>;
+			};
+		};
+
+		gpio2: gpio@ffe7f34000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xe7f34000 0x0 0x1000>;
+			clocks = <&dummy_apb>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			gpio2_porta: gpio-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+			};
+		};
+
+		gpio0: gpio@ffec005000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xec005000 0x0 0x1000>;
+			clocks = <&dummy_apb>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			gpio0_porta: gpio-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+			};
+		};
+
+		gpio1: gpio@ffec006000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xec006000 0x0 0x1000>;
+			clocks = <&dummy_apb>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			gpio1_porta: gpio-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+			};
+		};
+
+		pwm: pwm@ffec01c000 {
+			compatible = "thead,pwm-light";
+			reg = <0xff 0xec01c000 0x0 0x4000>;
+			#pwm-cells = <2>;
+		};
+
+		dsi_regs: dsi-controller@ffef500000 {
+			compatible = "thead,light-dsi-regs", "syscon";
+			reg = <0xff 0xef500000 0x0 0x10000>;
+			status = "okay";
+		};
+
+		vosys_regs: vosys@ffef528000 {
+			compatible = "thead,light-vo-subsys", "syscon";
+			reg = <0xff 0xef528000 0x0 0x1000>;
+			status = "okay";
+		};
+
+		dpu: dc8200@ffef600000 {
+			compatible = "verisilicon,dc8200";
+			reg = <0xff 0xef600000 0x0 0x100>;
+		};
+
+		axiscr {
+			compatible = "thead,axiscr";
+			reg = <0xff 0xff004000 0x0 0x1000>;
+			lock-read = "okay";
+			lock-write = "okay";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			u-boot,dm-pre-reloc;
+			axiscr0: axisrc@0 {
+				device_type = "axiscr";
+				region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+			axiscr1: axisrc@1 {
+				device_type = "axiscr";
+				region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+			axiscr2: axisrc@2 {
+				device_type = "axiscr";
+				region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+		};
+
+		axiparity {
+			compatible = "thead,axiparity";
+			reg = <0xff 0xff00c000 0x0 0x1000>;
+			lock = "okay";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			u-boot,dm-pre-reloc;
+			axiparity0: axiparity@0 {
+				device_type = "axiparity";
+				region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+			axiparity1: axiparity@1 {
+				device_type = "axiparity";
+				region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+		};
+
+		dsi_bridge: dsi-bridge {
+			compatible = "thead,light-dsi-bridge";
+			clocks = <&dummy_dpu_pixclk>;
+			clock-names = "pix-clk";
+			phys = <&dsi_dphy>;
+			phy-names = "dphy";
+		};
+
+		dsi_host: dsi-host {
+			compatible = "synopsys,dw-mipi-dsi";
+			regmap = <&dsi_regs>;
+			status = "okay";
+		};
+
+		dsi_dphy: dsi-dphy {
+			compatible = "synopsys,dw-dphy";
+			regmap = <&dsi_regs>;
+			vosys-regmap = <&vosys_regs>;
+			clocks = <&dummy_dpu_pixclk>, <&dummy_dphy_refclk>;
+			clock-names = "pix-clk", "ref-clk";
+			#phy-cells = <0>;
+			status = "okay";
+		};
+
+		lcd_backlight: pwm-backlight {
+			compatible = "pwm-backlight";
+			pwms = <&pwm 0 5000000>;
+			brightness-levels = <0 4 8 16 32 64 128 255>;
+			default-brightness-level = <7>;
+		};
+
+		ili9881c_panel {
+			compatible      = "ilitek,ili9881c";
+			backlight       = <&lcd_backlight>;
+			reset-gpios     = <&gpio1_porta 5 1>;   /* active low  */
+			lcd-en-gpios    = <&pcal6408ahk_a 2 0>; /* active high */
+			lcd-bias-en-gpios = <&pcal6408ahk_a 4 0>;/* active high */
+		};
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+		stdout-path = "/soc/serial@ffe7014000:115200";
+	};
+};

arch/riscv/include/asm/dma-mapping.h

@@ -10,6 +10,7 @@
 #define __ASM_RISCV_DMA_MAPPING_H
 
 #include <linux/dma-direction.h>
+#include "common.h"
 
 #define dma_mapping_error(x, y)	0
 

arch/riscv/lib/reset.c

@@ -5,9 +5,21 @@
 
 #include <common.h>
 #include <command.h>
+#include <asm/io.h>
+
+#define AONSYS_RSTGEN_BASE			((void __iomem *)0xFFFFF44000UL)
+#define REG_RST_REQ_EN_0			(AONSYS_RSTGEN_BASE + 0x140)
+#define WDT0_SYS_RST_REQ			(1 << 8)
 
 static __attribute__((naked))void sys_wdt_reset(void)
 {
+    uint32_t data;
+
+	/* wdt0 reset enable */
+    data = readl(REG_RST_REQ_EN_0);
+	data |= WDT0_SYS_RST_REQ;
+	writel(data, REG_RST_REQ_EN_0);
+
     asm volatile (
     "1: \n\r"
         "li      a0, 0xFFEFC30000 \n\r"
@@ -21,7 +33,7 @@ static __attribute__((naked))void sys_wdt_reset(void)
 
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	printf("resetting ...\n");
+    printf("resetting ...\n");
 
 	sys_wdt_reset();
 	hang();

board/thead/light-c910/Kconfig

@@ -34,19 +34,53 @@ config SYS_BOARD
 config SYS_CONFIG_NAME
     default "light-c910"
 
+config LIGHT_BOOT_FORCE_SEQ
+	bool "light boot force sequence"
+	default n
+
 config LIGHT_SEC_UPGRADE
     bool "light secure upgrade"
     default n
 
+config LIGHT_ANDROID_BOOT_IMAGE_VAL_A
+    bool "light board-a android image"
+    default n
+
+config AVB_USE_OEM_KEY
+    bool "AVB signature with OEM key"
+    default n
+
+config AVB_ROLLBACK_ENABLE
+    bool "AVB rollback index in RPMB"
+    default n
+
+config AVB_HW_ENGINE_ENABLE
+    bool "AVB Hardware cryptographic engine enable"
+    default n
+
+config LIGHT_ANDROID_BOOT_IMAGE_VAL_B
+    bool "light board-b android image"
+    default n
+
+config LIGHT_ANDROID_BOOT_IMAGE_VAL_LPI4A
+    bool "light board-lpi4a android image"
+    default n
+
 config LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A
     bool "light board-a security boot with verification"
     default n
 
 config LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B
-	bool "light board-b security boot with verification"
+    bool "light board-b security boot with verification"
+    default n
 
 config LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF
-	bool "light ant ref security boot with verification"
+    bool "light ant ref security boot with verification"
+    default n
+
+config LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A
+    bool "light lpi4a security boot with verification"
+    default n
 
 config TARGET_LIGHT_FPGA_FM_C910
     bool "light fullmask FPGA board"
@@ -84,6 +118,10 @@ config TARGET_LIGHT_FM_C910_BEAGLE
     bool "light fullmask for beagle board "
     default n
 
+config TARGET_LIGHT_FM_C910_LPI4A
+    bool "light fullmask for Lichee Pi 4A board "
+    default n
+
 config TARGET_LIGHT_FM_C910_B_POWER
     bool "light fullmask for light-b-power board "
     default n
@@ -94,8 +132,8 @@ config SYS_TEXT_BASE
 
 config SPL_TEXT_BASE
     hex
-    default 0xffe0000800 if LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A || LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B || LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF
-    default 0xffe0000000 if !(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A || LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B || LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF)
+    default 0xffe0000800 if LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A || LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B || LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF || LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A
+    default 0xffe0000000 if !(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A || LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B || LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF || LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
 
 config SPL_MAX_SIZE
     hex

board/thead/light-c910/Makefile

@@ -60,6 +60,7 @@ obj-$(CONFIG_THEAD_LIGHT_DIGITAL_SENSOR) += digital_sensor.o digital_sensor_test
 obj-y += clock_config.o
 obj-y += sec_check.o
 obj-y += boot.o
+obj-y += sbmeta/sbmeta.o
 ifndef CONFIG_TARGET_LIGHT_FPGA_FM_C910
 obj-$(CONFIG_LPDDR) += $(DDR_SRC_PATH)/ddr_common_func.o
 obj-$(CONFIG_LPDDR) += $(DDR_SRC_PATH)/common_lib.o
@@ -68,4 +69,5 @@ endif
 obj-y += light-sv/pll_io_test.o
 obj-y += light-sv/adc_test.o
 obj-y += version_rollback.o
+obj-$(CONFIG_AVB_VERIFY) += secimg_load.o
 endif

board/thead/light-c910/board.c

@@ -50,9 +50,9 @@ int g_dnl_board_usb_cable_connected(void)
 
 #define C906_RST_ADDR_L		0xfffff48048
 #define C906_RST_ADDR_H		0xfffff4804C
-#define C906_START_ADDRESS_L	0xc0000000
-#define C906_START_ADDRESS_H	0xff
-#define C910_C906_START_ADDRESS	0xffc0000000
+#define C906_START_ADDRESS_L	0x32000000
+#define C906_START_ADDRESS_H	0x00
+#define C910_C906_START_ADDRESS	0x0032000000
 #define C906_CPR_IPCG_ADDRESS   0xFFCB000010
 #define C906_IOCTL_GPIO_SEL_ADDRESS     0xFFCB01D000
 #define C906_IOCTL_AF_SELH_ADDRESS      0xFFCB01D008

board/thead/light-c910/boot.c

@@ -42,6 +42,7 @@ static unsigned int upgrade_image_version = 0;
 #define RPMB_EMMC_CID_SIZE 16
 #define RPMB_CID_PRV_OFFSET             9
 #define RPMB_CID_CRC_OFFSET             15
+#ifdef LIGHT_KDF_RPMB_KEY
 static int tee_rpmb_key_gen(uint8_t* key, uint32_t * length)
 {
 	uint32_t data[RPMB_EMMC_CID_SIZE / 4];
@@ -107,17 +108,17 @@ func_exit:
 	return ret;
 
 }
+#endif
 
 int csi_rpmb_write_access_key(void) 
 {
+#ifdef LIGHT_KDF_RPMB_KEY
     unsigned long *temp_rpmb_key_addr = NULL;
     char runcmd[64] = {0};
     uint8_t blkdata[256] = {0};
     __attribute__((__aligned__(8))) uint8_t kdf_rpmb_key[32];
-	uint32_t kdf_rpmb_key_length = 0;
+    uint32_t kdf_rpmb_key_length = 0;
 	int ret = 0;
-
-#ifdef LIGHT_KDF_RPMB_KEY
     /* Step1: retrive RPMB key from KDF function */
 	ret = tee_rpmb_key_gen(kdf_rpmb_key, &kdf_rpmb_key_length);
 	if (ret != 0) {
@@ -153,13 +154,16 @@ int csi_tf_get_image_version(unsigned int *ver)
 {
 	char runcmd[64] = {0};
 	unsigned char blkdata[256];
+	int ret = 0;
 
 	/* tf version reside in RPMB block#0, offset#16*/
 	sprintf(runcmd, "mmc rpmb read 0x%lx 0 1", (unsigned long)blkdata);
-	run_command(runcmd, 0);
-	*ver = (blkdata[16] << 8) + blkdata[17];
-
-	return 0;
+	ret = run_command(runcmd, 0);
+	if (ret == 0) {
+		*ver = (blkdata[16] << 8) + blkdata[17];
+	}
+	
+	return ret;
 }
 
 int csi_tf_set_image_version(unsigned int ver)
@@ -203,13 +207,16 @@ int csi_tee_get_image_version(unsigned int *ver)
 {
 	char runcmd[64] = {0};
 	unsigned char blkdata[256];
+	int ret = 0;
 
 	/* tf version reside in RPMB block#0, offset#0*/
 	sprintf(runcmd, "mmc rpmb read 0x%lx 0 1", (unsigned long)blkdata);
-	run_command(runcmd, 0);
-	*ver = (blkdata[0] << 8) + blkdata[1];
+	ret = run_command(runcmd, 0);
+	if (ret == 0) {
+		*ver = (blkdata[0] << 8) + blkdata[1];
+	}
 
-	return 0;
+	return ret;
 }
 
 int csi_kernel_get_image_version(unsigned int *ver)
@@ -288,7 +295,7 @@ int csi_uboot_get_image_version(unsigned int *ver)
 	unsigned int ver_x = 0;
 	int ret = 0;
 
-	ret = csi_efuse_api_int();
+	ret = csi_efuse_api_init();
 	if (ret) {
 		printf("efuse api init fail \n");
 		return -1;
@@ -314,7 +321,6 @@ int csi_uboot_set_image_version(unsigned int ver)
 	//TODO
 	unsigned long long uboot_ver = 0;
 	unsigned char ver_x = (ver & 0xff00) >> 8;
-    char ver_str[32] = {0};
 
 	uboot_ver = env_get_hex("uboot_version", 0xffffffffffffffff);
 
@@ -337,7 +343,7 @@ int csi_uboot_set_image_version(unsigned int ver)
 		return 0;
 	}
 
-	ret = csi_efuse_api_int();
+	ret = csi_efuse_api_init();
 	if (ret) {
 		printf("efuse api init fail \n");
 		return -1;
@@ -405,6 +411,9 @@ int check_image_version_rule(unsigned int new_ver, unsigned int cur_ver)
 	cur_ver_x = (cur_ver & 0xFF00) >> 8;
 	cur_ver_y = cur_ver & 0xFF;
 
+    (void)new_ver_y;
+    (void)cur_ver_y;
+
 	/* Ensure image version must be less than expected version */
 	if (new_ver_x < cur_ver_x) {
 		return -1;
@@ -582,10 +591,8 @@ int light_secboot(int argc, char * const argv[])
 	int ret = 0;
 	unsigned long tf_addr = LIGHT_TF_FW_ADDR;
 	unsigned long tee_addr = LIGHT_TEE_FW_ADDR;
-    unsigned long kernel_addr = LIGHT_KERNEL_ADDR;
 	unsigned int tf_image_size = 0;
 	unsigned int tee_image_size = 0;
-	unsigned int kernel_image_size = 0;
 
 	printf("\n\n");
 	printf("Now, we start to verify all trust firmware before boot kernel !\n");
@@ -691,10 +698,24 @@ void sec_firmware_version_dump(void)
 	unsigned int tf_ver = 0;
 	unsigned int tee_ver = 0;
 	unsigned int uboot_ver = 0;
+	unsigned int tf_ver_env = 0;
+	unsigned int tee_ver_env = 0;
 
 	csi_uboot_get_image_version(&uboot_ver);
 	csi_tf_get_image_version(&tf_ver);
 	csi_tee_get_image_version(&tee_ver);
+	/* Keep sync with version in RPMB, the Following version could be leveraged by OTA client */
+	tee_ver_env = env_get_hex("tee_version", 0);
+	tf_ver_env = env_get_hex("tf_version", 0);
+	if ((tee_ver_env != tee_ver) && (tee_ver != 0)) {
+		env_set_hex("tee_version", tee_ver);
+		run_command("saveenv", 0);
+	}
+
+	if ((tf_ver_env != tf_ver) && (tf_ver != 0)) {
+		env_set_hex("tf_version", tf_ver);
+		run_command("saveenv", 0);
+	}
 
 	printf("\n\n");
 	printf("Secure Firmware image version info: \n");
@@ -708,6 +729,8 @@ void sec_upgrade_thread(void)
 {
 	const unsigned long temp_addr=0x200000;
 	char runcmd[80];
+    uint8_t * image_buffer = NULL;
+    uint8_t * image_malloc_buffer = NULL;
 	int ret = 0;
 	unsigned int sec_upgrade_flag = 0;
 	unsigned int upgrade_file_size = 0;
@@ -732,6 +755,15 @@ void sec_upgrade_thread(void)
 		upgrade_file_size = env_get_hex("filesize", 0);
 		printf("upgrade file size: %d\n", upgrade_file_size);
 
+        /*store image to temp buffer as temp_addr may be decrypted*/
+        image_malloc_buffer = malloc(upgrade_file_size);
+        if ( image_malloc_buffer == NULL ) {
+			image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
+		} else {
+            image_buffer = image_malloc_buffer;
+        }
+        memcpy(image_buffer, (void*)temp_addr, upgrade_file_size);
+
 		/* STEP 2: verify its authentiticy here */
 		sprintf(runcmd, "vimage 0x%p tf", (void *)temp_addr);
 		printf("runcmd:%s\n", runcmd);
@@ -743,7 +775,7 @@ void sec_upgrade_thread(void)
 
 		/* STEP 3: update tf partition */
 		printf("read upgrade image (trust_firmware.bin) into tf partition \n");
-		sprintf(runcmd, "ext4write mmc 0:3 0x%p /trust_firmware.bin 0x%x", (void *)temp_addr, upgrade_file_size);
+		sprintf(runcmd, "ext4write mmc 0:3 0x%p /trust_firmware.bin 0x%x", (void *)image_buffer, upgrade_file_size);
 		printf("runcmd:%s\n", runcmd);
 		ret = run_command(runcmd, 0);
 		if (ret != 0) {
@@ -765,6 +797,10 @@ _upgrade_tf_exit:
 		run_command("saveenv", 0);
 		run_command("reset", 0);
 
+        if ( image_malloc_buffer != NULL ) {
+            free(image_malloc_buffer);
+            image_malloc_buffer = NULL;
+        }
 	} else if (sec_upgrade_flag == TEE_SEC_UPGRADE_FLAG) {
 
  		/* STEP 1: read upgrade image (tee.bin) from stash partition */
@@ -779,6 +815,15 @@ _upgrade_tf_exit:
 		/* Fetch the total file size after read out operation end */
 		upgrade_file_size = env_get_hex("filesize", 0);
 		printf("TEE upgrade file size: %d\n", upgrade_file_size);
+        
+        /*store image to temp buffer as temp_addr may be decrypted*/
+        image_malloc_buffer = malloc(upgrade_file_size);
+        if ( image_malloc_buffer == NULL ) {
+			image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
+		} else {
+            image_buffer = image_malloc_buffer;
+        }
+        memcpy(image_buffer, (void*)temp_addr, upgrade_file_size);
 
 		/* STEP 2: verify its authentiticy here */
 		sprintf(runcmd, "vimage 0x%p tee", (void *)temp_addr);
@@ -791,7 +836,7 @@ _upgrade_tf_exit:
 
 		/* STEP 3: update tee partition */
 		printf("read upgrade image (tee.bin) into tf partition \n");
-		sprintf(runcmd, "ext4write mmc 0:4 0x%p /tee.bin 0x%x", (void *)temp_addr, upgrade_file_size);
+		sprintf(runcmd, "ext4write mmc 0:4 0x%p /tee.bin 0x%x", (void *)image_buffer, upgrade_file_size);
 		printf("runcmd:%s\n", runcmd);
 		ret = run_command(runcmd, 0);
 		if (ret != 0) {
@@ -812,7 +857,11 @@ _upgrade_tee_exit:
 		run_command("env set sec_upgrade_mode 0", 0);
 		run_command("saveenv", 0);
 		run_command("reset", 0);
-
+        
+        if ( image_malloc_buffer != NULL ) {
+            free(image_malloc_buffer);
+            image_malloc_buffer = NULL;
+        }
 	} else if (sec_upgrade_flag == UBOOT_SEC_UPGRADE_FLAG) { 
 		unsigned int block_cnt;
 		struct blk_desc *dev_desc;

board/thead/light-c910/clock_config.c

@@ -1146,6 +1146,7 @@ void ap_mipi_dsi1_clk_endisable(bool en)
 	writel(cfg1, (void __iomem *)AP_DPU1_PLL_CFG1);
 }
 
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
 static void ap_multimedia_div_num_set(enum multimedia_div_type type, unsigned int div_num)
 {
 	unsigned long div_reg;
@@ -1209,6 +1210,7 @@ static void ap_multimedia_div_num_set(enum multimedia_div_type type, unsigned in
 	div_cfg |= div_en;
 	writel(div_cfg, (void __iomem *)div_reg);
 }
+#endif
 
 int clk_config(void)
 {
@@ -1302,9 +1304,9 @@ int clk_config(void)
 
 	/* The boards other than the LightA board perform the bus down-speed operation */
 
-#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
 	ap_multimedia_div_num_set(VI_MIPI_CSI0_DIV, 12); /* Input frquency: 2376MHZ */
-	ap_multimedia_div_num_set(VI_ISP0_CORE_DIV, 15); /* Input frquency: 2376MHZ */
+	ap_multimedia_div_num_set(VI_ISP0_CORE_DIV, 12); /* Input frquency: 2376MHZ */
 	ap_multimedia_div_num_set(VI_ISP1_CORE_DIV, 12); /* Input frquency: 2376MHZ */
 	ap_multimedia_div_num_set(VI_ISP_RY_CORE_DIV, 12); /* Input frquency: 2376MHZ */
 	ap_multimedia_div_num_set(VO_DPU_CORE_DIV, 4);	/* Input frquency: 2376MHZ */

board/thead/light-c910/light.c

@@ -31,6 +31,7 @@
 #define GMAC0_APB3S_BADDR	0xffec003000
 #define GMAC1_APB3S_BADDR	0xffec004000
 static uint64_t apb3s_baddr;
+extern int check_image_board_id(uint8_t *image_data);
 
 typedef enum {
 	UART0_TXD = PAD_GRP_BASE_SET(SOC_PIN_AP_RIGHT_TOP),
@@ -555,12 +556,14 @@ static void gmac_phy_rst(void)
 	       (void *)LIGHT_GPIO3_BADDR);
 	writel(readl((void *)LIGHT_GPIO1_BADDR) & ~LIGHT_GPIO1_13,
 	       (void *)LIGHT_GPIO1_BADDR);
+	wmb();
 	/* At least 10ms */
-	mdelay(12);
+	mdelay(50);
 	writel(readl((void *)LIGHT_GPIO3_BADDR) | LIGHT_GPIO3_21,
 	       (void *)LIGHT_GPIO3_BADDR);
 	writel(readl((void *)LIGHT_GPIO1_BADDR) | LIGHT_GPIO1_13,
 	       (void *)LIGHT_GPIO1_BADDR);
+	wmb();
 }
 
 static void gmac_glue_init(uint64_t apb3s_baddr)
@@ -910,14 +913,14 @@ static void light_iopin_init(void)
 	light_pin_cfg(GPIO1_2,PIN_SPEED_NORMAL,PIN_PN,2);
 	light_pin_cfg(GPIO1_3,PIN_SPEED_NORMAL,PIN_PN,2);
 	light_pin_cfg(GPIO1_4,PIN_SPEED_NORMAL,PIN_PN,2);
-#ifndef defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER)
+#if ! defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER)
 	light_pin_cfg(GPIO1_9,PIN_SPEED_NORMAL,PIN_PN,2); //soc_vdd18_lcd0_en_reg --backup regulator
 #else
 	light_pin_cfg(GPIO1_9,PIN_SPEED_NORMAL,PIN_PU,2); //soc_vdd18_lcd0_en_reg
 #endif
 	light_pin_cfg(GPIO1_10,PIN_SPEED_NORMAL,PIN_PN,2);//soc_lcd0_bias_en_reg
 	light_pin_cfg(GPIO1_11,PIN_SPEED_NORMAL,PIN_PN,2);
-#ifndef defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER)
+#if ! defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER)
 	light_pin_cfg(GPIO1_12,PIN_SPEED_NORMAL,PIN_PN,2);//reg_tp_pwr_en --touch pannel
 #else
 	light_pin_cfg(GPIO1_12,PIN_SPEED_NORMAL,PIN_PU,2);//reg_tp_pwr_en --touch pannel
@@ -1406,6 +1409,280 @@ static void light_iopin_init(void)
 	light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
 	light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
 }
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+static void light_iopin_init(void)
+{
+	/* aon-padmux config */
+	light_pin_cfg(I2C_AON_SCL, PIN_SPEED_NORMAL, PIN_PN, 8);
+	light_pin_cfg(I2C_AON_SDA, PIN_SPEED_NORMAL, PIN_PN, 8);
+
+	light_pin_mux(CPU_JTG_TCLK, 3);
+	light_pin_cfg(CPU_JTG_TCLK, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(CPU_JTG_TMS, 3);
+	light_pin_cfg(CPU_JTG_TMS, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(CPU_JTG_TDI, 3);
+	light_pin_cfg(CPU_JTG_TDI, PIN_SPEED_NORMAL, PIN_PN, 2);
+
+	light_pin_mux(AOGPIO_7, 1);
+	light_pin_mux(AOGPIO_8, 1);
+	// light_pin_mux(AOGPIO_9, 0);
+	light_pin_mux(AOGPIO_10, 1);
+	light_pin_mux(AOGPIO_11, 1);
+	light_pin_mux(AOGPIO_12, 1);
+	light_pin_mux(AOGPIO_13, 1);
+	light_pin_mux(AOGPIO_14, 0);
+	// light_pin_mux(AOGPIO_15,0);
+	light_pin_cfg(AOGPIO_7, PIN_SPEED_NORMAL, PIN_PN, 2);     ///NC
+	light_pin_cfg(AOGPIO_8, PIN_SPEED_NORMAL, PIN_PN, 2);     ///NC
+	// light_pin_cfg(AOGPIO_9,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_10, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(AOGPIO_11, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(AOGPIO_12, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(AOGPIO_13, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(AOGPIO_14, PIN_SPEED_NORMAL, PIN_PN, 2);
+	// light_pin_cfg(AOGPIO_15,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	light_pin_mux(AUDIO_PA0, 0);
+	light_pin_cfg(AUDIO_PA0, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA1, 0);
+	light_pin_cfg(AUDIO_PA1, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA3, 0);
+	light_pin_cfg(AUDIO_PA3, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA4, 0);
+	light_pin_cfg(AUDIO_PA4, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA5, 0);
+	light_pin_cfg(AUDIO_PA5, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA6, 0);
+	light_pin_cfg(AUDIO_PA6, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA7, 0);
+	light_pin_cfg(AUDIO_PA7, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA14, 0);
+	light_pin_cfg(AUDIO_PA14, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA15, 0);
+	light_pin_cfg(AUDIO_PA15, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA16, 0);
+	light_pin_cfg(AUDIO_PA16, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA17, 0);
+	light_pin_cfg(AUDIO_PA17, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA29, 0);
+	light_pin_cfg(AUDIO_PA29, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(AUDIO_PA30, 0);
+	light_pin_cfg(AUDIO_PA30, PIN_SPEED_NORMAL, PIN_PN, 2);
+
+	// light_pin_mux(AUDIO_PA9,3);                         ///AUDIO-PA-RESET
+	// light_pin_cfg(AUDIO_PA9,PIN_SPEED_NORMAL,PIN_PN,2);
+	// light_pin_mux(AUDIO_PA10,3);                        /// AUD-3V3-EN
+	// light_pin_cfg(AUDIO_PA10,PIN_SPEED_NORMAL,PIN_PU,2);
+	// light_pin_mux(AUDIO_PA12,3);                        /// AUD-1V8-EN
+	// light_pin_cfg(AUDIO_PA12,PIN_SPEED_NORMAL,PIN_PU,2);
+	// light_pin_mux(AUDIO_PA13,0);
+
+	/*ap-padmux on left/top */
+	light_pin_mux(QSPI1_SCLK, 4);
+	light_pin_cfg(QSPI1_SCLK, PIN_SPEED_NORMAL,PIN_PN, 8);  ///se-spi
+	light_pin_mux(QSPI1_CSN0, 4);
+	light_pin_cfg(QSPI1_CSN0, PIN_SPEED_NORMAL, PIN_PN, 8);  ///se-spi
+	light_pin_mux(QSPI1_D0_MOSI, 4);
+	light_pin_cfg(QSPI1_D0_MOSI, PIN_SPEED_NORMAL, PIN_PU, 8);  ///se-spi
+	light_pin_mux(QSPI1_D1_MISO, 4);
+	light_pin_cfg(QSPI1_D1_MISO, PIN_SPEED_NORMAL, PIN_PU, 8);  ///se-spi
+	light_pin_mux(QSPI1_D2_WP, 4);
+	light_pin_cfg(QSPI1_D2_WP, PIN_SPEED_NORMAL, PIN_PN, 8);    ///NC
+	// light_pin_mux(QSPI1_D3_HOLD, 4);
+	// light_pin_cfg(QSPI1_D3_HOLD, PIN_SPEED_NORMAL, PIN_PN, 8);  ///NC
+
+	light_pin_cfg(I2C0_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
+	light_pin_cfg(I2C0_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
+	light_pin_cfg(I2C1_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
+	light_pin_cfg(I2C1_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
+
+	light_pin_cfg(UART1_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART1_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART4_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART4_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART4_CTSN, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART4_RTSN, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(UART3_TXD, 1);
+	light_pin_cfg(UART3_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_mux(UART3_RXD, 1);
+	light_pin_cfg(UART3_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+
+	// light_pin_mux(GPIO0_18,1);
+	// light_pin_mux(GPIO0_19,1);
+	// light_pin_cfg(GPIO0_18,PIN_SPEED_NORMAL,PIN_PN,4);
+	// light_pin_cfg(GPIO0_19,PIN_SPEED_NORMAL,PIN_PN,4);
+
+	// light_pin_mux(GPIO0_20,0);
+	// light_pin_mux(GPIO0_21,0);
+	// light_pin_mux(GPIO0_22,1);
+	// light_pin_mux(GPIO0_23,1);
+	// light_pin_mux(GPIO0_24,1);
+	// light_pin_mux(GPIO0_25,1);
+	// light_pin_mux(GPIO0_26,1);
+	// light_pin_mux(GPIO0_27,0);
+	// light_pin_mux(GPIO0_28,0);
+	// light_pin_mux(GPIO0_29,0);
+	// light_pin_mux(GPIO0_30,0);
+	// light_pin_cfg(GPIO0_20,PIN_SPEED_NORMAL,PIN_PN,2);
+	// light_pin_cfg(GPIO0_21,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO0_24, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO0_25, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO0_27, PIN_SPEED_NORMAL, PIN_PN, 2);                          ///< NC(not used)
+	light_pin_cfg(GPIO0_28, PIN_SPEED_NORMAL, PIN_PN, 2);                          ///< AVDD25_IR_EN
+	// light_pin_cfg(GPIO0_29,PIN_SPEED_NORMAL,PIN_PN,2);                          ///< DVDD12_IR_EN
+	light_pin_cfg(GPIO0_30, PIN_SPEED_NORMAL, PIN_PU, 2);                          ///< gmac,uart,led
+	light_pin_cfg(GPIO0_31, PIN_SPEED_NORMAL, PIN_PN, 2);
+
+	light_pin_mux(GPIO1_0, 0);
+	// light_pin_mux(GPIO1_1,1);
+	// light_pin_mux(GPIO1_2,1);
+	light_pin_mux(GPIO1_3, 0);
+	light_pin_mux(GPIO1_4, 0);
+	light_pin_mux(GPIO1_5, 0);
+	light_pin_mux(GPIO1_6, 0);
+	light_pin_mux(GPIO1_9, 0);
+	light_pin_mux(GPIO1_10, 0);
+	// light_pin_mux(GPIO1_11,0);
+	// light_pin_mux(GPIO1_12,0);
+	light_pin_mux(GPIO1_13, 0);
+	light_pin_mux(GPIO1_14, 0);
+	// light_pin_mux(GPIO1_15,0);
+	// light_pin_mux(GPIO1_16,0);
+	light_pin_cfg(GPIO1_0, PIN_SPEED_NORMAL, PIN_PN, 2);
+	// light_pin_cfg(GPIO1_1,PIN_SPEED_NORMAL,PIN_PN,2);
+	// light_pin_cfg(GPIO1_2,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_3, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO1_4, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO1_5, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO1_6, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO1_9, PIN_SPEED_NORMAL, PIN_PN, 2);                          ///<VDD18_LCD0_EN
+	light_pin_cfg(GPIO1_10, PIN_SPEED_NORMAL, PIN_PN, 2);                         ///<LCD0_BIAS_EN
+	// light_pin_cfg(GPIO1_11,PIN_SPEED_NORMAL,PIN_PN,2);
+	// light_pin_cfg(GPIO1_12,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<TOUCH-PANNEL VDD28_TP0_EN
+	light_pin_cfg(GPIO1_13, PIN_SPEED_NORMAL, PIN_PN, 2);                         ///<DOVDD18_RGB_EN
+	light_pin_cfg(GPIO1_14, PIN_SPEED_NORMAL, PIN_PN, 2);                         ///<DVDD12_RGB_EN
+	// light_pin_cfg(GPIO1_15,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<AVDD28_RGB_EN
+	// light_pin_cfg(GPIO1_16,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	light_pin_mux(CLK_OUT_0, 1);
+	light_pin_cfg(CLK_OUT_0, PIN_SPEED_NORMAL, PIN_PU, 2);
+	light_pin_mux(CLK_OUT_1, 1);
+	light_pin_cfg(CLK_OUT_1, PIN_SPEED_NORMAL, PIN_PU, 2);
+	light_pin_mux(CLK_OUT_2, 0);
+	light_pin_cfg(CLK_OUT_2, PIN_SPEED_NORMAL, PIN_PU, 2);
+	light_pin_mux(CLK_OUT_3, 0);
+	light_pin_cfg(CLK_OUT_3, PIN_SPEED_NORMAL, PIN_PU, 2);    
+
+	// light_pin_mux(GPIO1_21,3);
+	light_pin_mux(GPIO1_22, 3);
+	// light_pin_mux(GPIO1_23,3);
+	light_pin_mux(GPIO1_24, 3);
+	// light_pin_mux(GPIO1_25,3);
+	// light_pin_mux(GPIO1_26,3);
+	// light_pin_mux(GPIO1_27,3);
+	light_pin_mux(GPIO1_28, 0);
+	// light_pin_mux(GPIO1_29,3);
+	light_pin_mux(GPIO1_30, 0);
+	// light_pin_cfg(GPIO1_21,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_22, PIN_SPEED_NORMAL, PIN_PN,2);
+	// light_pin_cfg(GPIO1_23,PIN_SPEED_NORMAL,PIN_PN,2);                         ///<LED_PDN
+	light_pin_cfg(GPIO1_24, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO1_28, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO1_30, PIN_SPEED_NORMAL, PIN_PN, 2);                         ///<DBB2LEDDRIVER_EN
+
+	light_pin_cfg(UART0_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART0_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);            
+
+	/*ap-pdmux on righ/top*/
+	// light_pin_mux(QSPI0_SCLK,3);            ///NC
+	// light_pin_mux(QSPI0_CSN0,3);            ///NC
+	// light_pin_mux(QSPI0_CSN1,3);            ///NC
+	// light_pin_mux(QSPI0_D0_MOSI,3);         ///NC
+	// light_pin_mux(QSPI0_D1_MISO,3);         ///NC
+	// light_pin_mux(QSPI0_D2_WP,3);           ///NC
+	// light_pin_mux(QSPI0_D3_HOLD,3);         ///NC
+
+	light_pin_cfg(I2C2_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
+	light_pin_cfg(I2C2_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
+	light_pin_cfg(I2C3_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
+	light_pin_cfg(I2C3_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
+
+	// light_pin_mux(SPI_CSN,3);                                                /// W_DISABLE_CATE1
+	// light_pin_mux(SPI_MOSI,3);                                               /// NC
+	// light_pin_mux(SPI_MISO,3);                                               /// RERST1_N_CAT1
+	// light_pin_mux(SPI_SCLK,3);
+	light_pin_cfg(SPI_CSN, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(SPI_MOSI, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(SPI_MISO, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(SPI_SCLK, PIN_SPEED_NORMAL, PIN_PN, 2);
+
+	light_pin_mux(GPIO2_13, 0);
+	light_pin_mux(GPIO2_18, 1);
+	light_pin_mux(GPIO2_19, 1);
+	light_pin_mux(GPIO2_20, 1);
+	light_pin_mux(GPIO2_21, 1);
+	light_pin_mux(GPIO2_22, 1);
+	light_pin_mux(GPIO2_23, 1);
+	light_pin_mux(GPIO2_24, 1);
+	light_pin_mux(GPIO2_25, 1);
+
+	light_pin_cfg(GPIO2_13, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(GPIO2_18, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GPIO2_19, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GPIO2_20, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GPIO2_21, PIN_SPEED_NORMAL, PIN_PN, 0xF);                        ///<NC
+	light_pin_cfg(GPIO2_22, PIN_SPEED_NORMAL, PIN_PN, 0xF);                        ///<WIFI_BT_GPIO2
+	light_pin_cfg(GPIO2_23, PIN_SPEED_NORMAL, PIN_PN, 0xF);                        ///<WIFI_BT_GPIO3
+	light_pin_cfg(GPIO2_24, PIN_SPEED_NORMAL, PIN_PN, 0xF);                        ///<WIFI_BT_RST_N
+	light_pin_cfg(GPIO2_25, PIN_SPEED_NORMAL, PIN_PU, 0xF);                        ///KEY1
+
+	light_pin_mux(SDIO0_DETN, 0);
+	light_pin_cfg(SDIO0_DETN, PIN_SPEED_NORMAL, PIN_PN, 2);
+	// light_pin_mux(SDIO0_WPRTN,3);
+	// light_pin_cfg(SDIO0_WPRTN,PIN_SPEED_NORMAL,PIN_PN,2);                    ///< NC
+	// light_pin_mux(SDIO1_WPRTN,3);
+	// light_pin_cfg(SDIO1_WPRTN,PIN_SPEED_NORMAL,PIN_PU,2);                   ///VBUS_EN
+	// light_pin_mux(SDIO1_DETN,3);
+	// light_pin_cfg(SDIO1_DETN,PIN_SPEED_NORMAL,PIN_PN,2);                    ///WCN_33_EN
+
+	light_pin_mux(GPIO2_30, 1);
+	light_pin_mux(GPIO2_31, 1);
+	light_pin_mux(GPIO3_0, 1);
+	light_pin_mux(GPIO3_1, 1);
+	light_pin_mux(GPIO3_2, 1);
+	light_pin_mux(GPIO3_3, 1);
+	light_pin_cfg(GPIO2_30, PIN_SPEED_NORMAL, PIN_PN, 0xF);                 ///NC
+	light_pin_cfg(GPIO2_31, PIN_SPEED_NORMAL, PIN_PN, 0xF);                 ///NC
+	light_pin_cfg(GPIO3_0, PIN_SPEED_NORMAL, PIN_PN, 0xF);                  ///NC
+	light_pin_cfg(GPIO3_1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GPIO3_2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GPIO3_3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+
+	light_pin_cfg(HDMI_SCL, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+	light_pin_cfg(HDMI_SDA, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+	light_pin_cfg(HDMI_CEC, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+
+	/* GMAC0 pad drive strength configurate to 0xF */
+	light_pin_cfg(GMAC0_TX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXEN, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXDV, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	// light_pin_cfg(GMAC0_MDC, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	// light_pin_cfg(GMAC0_MDIO, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+
+	light_pin_mux(GMAC0_COL, 3);
+	light_pin_mux(GMAC0_CRS, 3);
+	light_pin_cfg(GMAC0_COL, PIN_SPEED_NORMAL, PIN_PU, 2);
+	light_pin_cfg(GMAC0_CRS, PIN_SPEED_NORMAL, PIN_PU, 2);
+}
 #else
 static void light_iopin_init(void)
 {
@@ -1586,10 +1863,18 @@ static void light_usb_boot_check(void)
 	uchar env_enetaddr[6]={0};
 	uchar env_enet1addr[6]={0};
 	int env_ethaddr_flag,env_eth1addr_flag;
+    int ret = 0;
+
 	boot_mode = readl((void *)SOC_OM_ADDRBASE) & 0x7;
 	if (boot_mode & BIT(2))
 		return;
 
+    /*check board id of uboot image*/
+	ret = check_image_board_id((uint8_t*)SRAM_BASE_ADDR);
+	if (ret != 0) {
+	    while(1);
+	}
+
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	env_set("usb_fastboot", "yes");
 #endif

board/thead/light-c910/lpddr-regu/ddr_regu.c

@@ -136,7 +136,7 @@ static const struct regulator_t g_apcpu_regu_id_list[] = {
 		REGU_ID_DEF(IIC_IDX_AONIIC,APCPU_REGU_VDDM,0x31,0x39,0,1,800000,600000,3500000,12500,1),
 	},
 };
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
 /**
  * board for ant-ref
  *
@@ -165,6 +165,7 @@ static const struct regulator_t g_apcpu_regu_id_list[] = {
 	}
 };
 #else
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
 /**
  * board for EB064A10/EB064A11
  *
@@ -183,6 +184,7 @@ static const struct regulator_t g_regu_id_list[] = {
 		REGU_ID_DEF(IIC_IDX_AONIIC,DDR_VDD_REGU_1V1,0x5A,0xA7,0,1,CONFIG_DDR_REGU_1V1,800000,1500000,20000,0),
 	}
 };
+#endif
 
 static const struct regulator_t g_apcpu_regu_id_list[] = {
 	{
@@ -236,7 +238,7 @@ static int wait_iic_receive(dw_iic_regs_t *iic_base, uint32_t wait_data_num, uin
 }
 
 
-unsigned long soc_get_iic_freq(uint32_t idx)
+static unsigned long soc_get_iic_freq(uint32_t idx)
 {
 	if (idx == IIC_IDX_AONIIC){
 		return 49152000U;
@@ -651,6 +653,7 @@ int32_t csi_iic_mem_receive_sr(csi_iic_t *iic, uint32_t devaddr, uint16_t memadd
     return read_count;
 }
 
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_A) ||defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
 static int pmic_read_reg_sr(csi_iic_t *iic_handle,uint16_t dev_addr,uint32_t offset, uint32_t *val)
 {
 	int32_t num;
@@ -662,6 +665,7 @@ static int pmic_read_reg_sr(csi_iic_t *iic_handle,uint16_t dev_addr,uint32_t off
 	*val = temp[0];
 	return 0;
 }
+#endif
 
 static int pmic_write_reg(csi_iic_t *iic_handle,uint16_t dev_addr,uint32_t offset, uint32_t val)
 {
@@ -688,6 +692,7 @@ static int pmic_write_reg(csi_iic_t *iic_handle,uint16_t dev_addr,uint32_t offse
 	return 0;
 }
 
+#if !defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_A) && !defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
 static int pmic_read_reg(csi_iic_t *iic_handle,uint16_t dev_addr,uint32_t offset, uint32_t *val)
 {
 	int32_t num;
@@ -716,6 +721,7 @@ static int pmic_read_reg(csi_iic_t *iic_handle,uint16_t dev_addr,uint32_t offset
 	*val = temp[0];
 	return 0;
 }
+#endif 
 
 static int _pmic_ddr_regu_init(uint32_t idx)
 {
@@ -818,13 +824,14 @@ int pmic_ddr_regu_init(void)
 int pmic_ddr_set_voltage(void)
 {
 	int ret = 0;
+
+#if 0 //currently,no need to modify ddr regulator voltage
 	uint32_t val = 0;
 	uint32_t regu_num = ARRAY_SIZE(g_regu_id_list);
 	uint32_t i;
 	struct regulator_t *pregu;
 	csi_iic_t          *dev_handle;
 
-#if 0 //currently,no need to modify ddr regulator voltage
 	pregu = (struct regulator_t*)g_regu_id_list;
 	for (i = 0; i < regu_num; i++, pregu++) {
 		if (pregu->regu_vol_target < pregu->regu_vol_min || pregu->regu_vol_target > pregu->regu_vol_max)
@@ -838,6 +845,10 @@ int pmic_ddr_set_voltage(void)
 #endif
 
 #if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
+	uint32_t val = 0;
+	struct regulator_t *pregu;
+	csi_iic_t          *dev_handle;
+
 	/*enable lcd0_en ldo*/
 	pregu = (struct regulator_t*)&g_regu_id_list[LCD0_EN];
 	dev_handle = pmic_get_iic_handle(pregu->iic_id);
@@ -944,7 +955,7 @@ int pmic_reset_apcpu_voltage(void)
 		return ret;
 	return 0;
 }
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
 int pmic_reset_apcpu_voltage(void)
 {
 	int                ret = -1;

board/thead/light-c910/lpddr4/include/ddr_common_func.h

@@ -48,5 +48,5 @@ void ctrl_init(int rank_num, int speed);
 void addrmap(int rank_num, enum DDR_BITWIDTH bits);
 void ctrl_en(enum DDR_BITWIDTH bits);
 void enable_auto_refresh(void);
-
+void lpddr4_auto_selref(void);
 #endif // DDR_COMMON_FUNCE_H

board/thead/light-c910/lpddr4/src/ddr_common_func.c

@@ -1121,7 +1121,7 @@ void ddr_soc_pll_disable () {
   printf("DDR SOC PLL PowerDown \n");
 #endif
 }
-void lpddr4_auto_selref()
+void lpddr4_auto_selref(void)
 {
   ddr_sysreg_wr(DDR_CFG1,0xa0000);   //remove core clock after xx
   wr(SWCTL,0);

board/thead/light-c910/sbmeta/sbmeta.c

@@ -0,0 +1,296 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited
+ */
+
+#include "sbmeta.h"
+
+#define NO_DEBUG 0
+#if NO_DEBUG
+#define print_info(fmt, args...)
+#else
+#define print_info(fmt, args...)    printf(fmt, ##args)
+#endif
+
+#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
+#if CONFIG_IS_ENABLED(LIGHT_SEC_UPGRADE)
+/* digest_size corresponding to digest_scheme specified in sbmeta_info_t */
+static const int digest_size[] = {0, 20, 16, 28, 32, 48, 64, 32, 64};
+static const char* image_name_s[] = {
+    "dtb", "kernel", "tf", "aon", "rootfs", "tee", "uboot", "user"
+};
+
+static const uint32_t image_addrs[] = {
+    LIGHT_DTB_ADDR,
+    LIGHT_KERNEL_ADDR,
+    LIGHT_TF_FW_TMP_ADDR,
+    LIGHT_AON_FW_ADDR,
+    LIGHT_ROOTFS_ADDR,
+    LIGHT_TEE_FW_ADDR,
+    CONFIG_SYS_TEXT_BASE,
+};
+
+static int is_sbmeta_info(uint32_t entry_src_addr)
+{
+    uint32_t *buffer = (uint32_t *)entry_src_addr;
+
+    /* sbmeta_info_t entry should start with magic code 'S''B''M''T' */
+    if (*buffer != SBMETA_MAGIC) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dump_sbmeta_info(sbmeta_info_t *sbmeta_info)
+{
+    if (sbmeta_info == NULL) {
+        return CMD_RET_FAILURE;
+    }
+
+    /* only support emmc now */
+    if (sbmeta_info->medium_type != 0) {
+        print_info("Error: medium type %s is not supported now\r\n");
+        return CMD_RET_FAILURE;
+    }
+
+    /* only support dtb, krlimg/tf, sbi, aon, rootfs, tee, uboot and user-defined type */
+    if (sbmeta_info->image_type > IMAGE_TYPE_NUM || sbmeta_info->image_type < 0) {
+        print_info("Error: image type is out of range\r\n");
+        return CMD_RET_FAILURE;
+    }
+
+    /* only support none, sha1, md5, sha224, sha256, sha384, sha512, sm3 and reserved scheme */
+    if (sbmeta_info->digest_scheme > DIGEST_TYPE_NUM || sbmeta_info->digest_scheme < 0) {
+        print_info("Error: digest type is out of range\r\n");
+        return CMD_RET_FAILURE;
+    }
+
+    /* only support none, rsa1024, rsa2048, ecc256, ecc160, sm2 and reserved scheme */
+    if (sbmeta_info->sign_scheme > SIGN_TYPE_NUM || sbmeta_info->sign_scheme < 0) {
+        print_info("Error: signature type is out of range\r\n");
+        return CMD_RET_FAILURE;
+    }
+
+    /* DTB, TF, TEE, Kernel will be loaded from default partitions specified in env */
+    if (sbmeta_info->image_type != T_ROOTFS && sbmeta_info->image_type != T_USER) {
+        print_info("Image has been loaded\r\n");
+    }
+
+    /* dump sbmeta_info_t */
+    print_info("image medium type: %d\n", sbmeta_info->medium_type);
+    print_info("image load part: mmc %d:%d\n", sbmeta_info->dev, sbmeta_info->part);
+    print_info("image type: %d \n", sbmeta_info->image_type);
+    print_info("image digest scheme: %d\n", sbmeta_info->digest_scheme);
+    print_info("image sign scheme: %d\n", sbmeta_info->sign_scheme);
+    print_info("image enable encryption: %s\n", sbmeta_info->isencrypted ? "en" : "dis");
+    print_info("image file name: %s\n", sbmeta_info->filename);
+    print_info("image digest:");
+    for (int i = 0; i < digest_size[sbmeta_info->digest_scheme]; i++) {
+        print_info("%02X", sbmeta_info->digest[i]);
+    }
+    print_info("\r\n");
+    
+    return 0;
+}
+
+
+/* Verify image specified in sbmeta_info_t. The image has been loaded to memory before */
+static int sbmeta_verify_image(uint32_t image_load_addr, uint8_t image_type)
+{
+    uint32_t image_size = 0;
+    char *image_name = NULL;
+    
+    /* check image_type to avoid array index out of bounds */
+    if (image_type > IMAGE_TYPE_NUM || image_type < 0) {
+        print_info("Error: image type is out of range\r\n");
+        return CMD_RET_FAILURE;
+    }
+    image_name = image_name_s[image_type];
+
+    /* if image has secure header, do verification. otherwise */
+    if (image_have_head(image_load_addr) == 1) {
+        /* check tee/tf version if needed */
+#ifdef LIGHT_IMG_VERSION_CHECK_IN_BOOT
+        if (image_type == T_TF) {
+            print_info("check TF version in boot \n");
+            if (check_tf_version_in_boot(LIGHT_TF_FW_TMP_ADDR) != 0) {
+                return CMD_RET_FAILURE;
+            }
+        }
+
+        if (image_type == T_TEE) {
+            print_info("check TEE version in boot \n");
+            if (check_tee_version_in_boot(LIGHT_TEE_FW_ADDR) != 0) {
+                return CMD_RET_FAILURE;
+            }
+        }
+#endif
+
+        /* start verifying images */
+        print_info("Process %s image verification ...\n", image_name);
+        dump_image_header_info(image_load_addr);
+        if (image_type == T_UBOOT) {
+            if (csi_sec_uboot_image_verify(image_load_addr, image_load_addr - PUBKEY_HEADER_SIZE) != 0) {
+                print_info("Image(%s) is verified fail, Please go to check!\n\n", image_name);
+                return CMD_RET_FAILURE;
+            }
+        } else {
+            if (csi_sec_custom_image_verify(image_load_addr, UBOOT_STAGE_ADDR) != 0) {
+                print_info("Image(%s) is verified fail, Please go to check!\n\n", image_name);
+                return CMD_RET_FAILURE;
+            }
+        }
+        
+        image_size = get_image_size(image_load_addr);
+        print_info("%s image size: %d\n", image_name, image_size);
+        if (image_size < 0) {
+            print_info("GET %s image size error\n", image_name);
+            return CMD_RET_FAILURE;
+        }
+        
+        /* move image headers always */
+        if (image_type == T_TF) {
+            memmove((void *)LIGHT_TF_FW_ADDR, (const void *)(image_load_addr + HEADER_SIZE), image_size);
+        } else {
+            memmove((void *)image_load_addr, (const void *)(image_load_addr + HEADER_SIZE), image_size);
+        }
+    } else {
+        /* TF should be moved to LIGHT_TF_FW_ADDR all the cases*/
+        if (image_type == T_TF) {
+            /* while image_size is unknown, reload the image */
+            run_command("ext4load mmc 0:3 0x0 trust_firmware.bin", 0);
+        }
+    }
+
+    return 0;
+}
+
+static int light_sbmetaboot(int argc, char *const argv[])
+{
+    int count = 0;
+    uint32_t sbmeta_size = 0;
+    uint32_t info_addr = 0;
+    uint32_t image_load_addr = 0;
+    char cmd[64] = {0};
+    char *image_name = NULL;
+    sbmeta_info_t *sbmeta_info = NULL;
+
+    /* Load sbmeta image to memory */
+    snprintf(cmd, sizeof(cmd), "ext4load mmc %x:%x 0x%p %s", SBMETA_DEV, SBMETA_PART, LIGHT_SBMETA_ADDR, SBMETA_FILENAME);
+    if (run_command(cmd, 0) != 0) {
+        /* if sbmeta doesn't exist, do secboot by default */
+        print_info("SBMETA doesn't exist, go to verify tf/tee\r\n");
+
+        /*
+        * Verify tf and tee by command secboot.
+        * Note that tf and tee has been loaded in "run bootcmd_load"
+        */
+        if (run_command("secboot", 0) != 0) {
+            return CMD_RET_FAILURE;
+        }
+
+        return 0;
+    }
+
+    /* initialize crypto algorithm interfaces */
+    if (csi_sec_init() != 0) {
+        return CMD_RET_FAILURE;
+    }
+
+    /* Check and verify sbmeta image */
+    if (image_have_head(LIGHT_SBMETA_ADDR) == 1) {
+        print_info("Process SBMETA image verification...\r\n");
+        dump_image_header_info(LIGHT_SBMETA_ADDR);
+        if (csi_sec_custom_image_verify(LIGHT_SBMETA_ADDR, UBOOT_STAGE_ADDR) != 0) {
+            print_info("SBMETA is verified fail, Please go to check!\r\n");
+            return CMD_RET_FAILURE;
+        }
+
+        sbmeta_size = get_image_size(LIGHT_SBMETA_ADDR);
+        print_info("sbmeta_size:%d\r\n", sbmeta_size);
+        if (sbmeta_size != SBMETA_SIZE) {
+            print_info("Error: SBMETA header is wrong! Size must equal to %d bytes!\r\n", SBMETA_SIZE);
+            return CMD_RET_FAILURE;
+        }
+        /* move image headers always */
+        memmove((void *)LIGHT_SBMETA_ADDR, (const void *)(LIGHT_SBMETA_ADDR + HEADER_SIZE), sbmeta_size);
+    } else {
+        /* if sbmeta image is not secure, reset */
+        print_info("Error: SBMETA image must be with signature\r\n");
+        return CMD_RET_FAILURE;
+    }
+
+    /* Parse sbmeta_info_t in image sbmeta, then load and verify specified images */
+    info_addr = LIGHT_SBMETA_ADDR;
+    for (count = 0; count < MAX_ENTRY_NUM; count++) {
+        if (is_sbmeta_info(info_addr) == 0) {
+            /* Dump and check sbmeta info */
+            sbmeta_info = (sbmeta_info_t*)info_addr;
+            if (dump_sbmeta_info(sbmeta_info) != 0) {
+                return CMD_RET_FAILURE;
+            }
+
+            image_name = image_name_s[sbmeta_info->image_type];
+            info_addr += ENTRY_SIZE;
+
+            /*
+             * If image_type != T_USER, load to address specified in light-c910.h;
+             * otherwise, load to user-specified address.
+            */
+            if (sbmeta_info->image_type != T_USER) {
+                image_load_addr = image_addrs[sbmeta_info->image_type];
+            } else {
+                image_load_addr = sbmeta_info->relocated_addr;
+            }
+
+            /*
+            * Load image specified in sbmeta info
+            * Note: only load images don't exist in env "bootcmd_load"
+            */
+            if (sbmeta_info->image_type == T_ROOTFS || sbmeta_info->image_type == T_USER) {
+                snprintf(cmd, sizeof(cmd), "ext4load mmc %x:%x %p %s", sbmeta_info->dev,
+                         sbmeta_info->part, \
+                         image_load_addr, sbmeta_info->filename);
+                if (run_command(cmd, 0) != 0) {
+                    return CMD_RET_FAILURE;
+                }
+            }
+
+            /* Check and verify user-specified image */
+            if (sbmeta_verify_image(image_load_addr, sbmeta_info->image_type) != 0) {
+                return CMD_RET_FAILURE;
+            }
+        } else {
+            break;
+        }
+    }
+
+    /* if sbmeta didn't specify images, reset */
+    if (count == 0) {
+        print_info("Error: SBMETA doesn't specify any images!\r\n");
+        return CMD_RET_FAILURE;
+    }
+
+    /* Clear sbmeta buffer in memory */
+    memset((void *)LIGHT_SBMETA_ADDR, 0, PLAIN_SBMETA_TEXT);
+    return 0;
+}
+
+static int do_sbmetaboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+    if (light_sbmetaboot(argc, argv) != 0) {
+        run_command("reset", 0);
+        return -1;
+    }
+
+    return 0;
+}
+
+U_BOOT_CMD(
+    sbmetaboot, CONFIG_SYS_MAXARGS, 1, do_sbmetaboot,
+    "load and verify image sbmeta, then verify image files specified in sbmeta",
+    ""
+);
+#endif
+#endif

board/thead/light-c910/sbmeta/sbmeta.h

@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited
+ */
+
+#ifndef _LIGHT_SBMETA_H
+#define _LIGHT_SBMETA_H
+
+#include "common.h"
+#include "command.h"
+#include <asm/arch-thead/boot_mode.h>
+
+#define MAX_NAME_SIZE       32
+#define MAX_DIGEST_SIZE     64
+#define SBMETA_MAGIC        0x544D4253  /* = {'S', 'B', 'M', 'T'} */
+
+#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
+#define LIGHT_SBMETA_ADDR   0x10000000
+#endif
+#define SBMETA_DEV          0
+#define SBMETA_PART         6
+#define ENTRY_SIZE          128
+#define PLAIN_SBMETA_TEXT   4096
+#define SBMETA_SIZE         4736  /* 4K SMBETA image + 640 footer */
+#define MAX_ENTRY_NUM       PLAIN_SBMETA_TEXT / ENTRY_SIZE  /* 4K/128=32 */
+#define IMAGE_TYPE_NUM      7
+#define DIGEST_TYPE_NUM     8
+#define SIGN_TYPE_NUM       6
+#define T_USER              7
+#define SBMETA_FILENAME     "sbmeta.bin"
+
+typedef struct {
+    int         magiccode;
+    uint8_t     dev;
+    uint8_t     part;
+    uint8_t     image_type;
+    uint8_t     digest_scheme;
+    uint8_t     sign_scheme;
+    uint8_t     isencrypted;
+    uint8_t     medium_type;
+    uint8_t     reserve0;
+    char        filename[MAX_NAME_SIZE];
+    uint8_t     digest[MAX_DIGEST_SIZE];
+    uint32_t    relocated_addr;
+    uint32_t    reserved[4];
+} sbmeta_info_t;
+
+#endif

board/thead/light-c910/sec_check.c

@@ -12,7 +12,7 @@
 #include <asm/arch-thead/boot_mode.h>
 #include "../../../lib/sec_library/include/csi_sec_img_verify.h"
 
-extern int csi_efuse_api_int(void);
+extern int csi_efuse_api_init(void);
 extern int csi_efuse_api_unint(void);
 extern int csi_efuse_read_raw(uint32_t addr, void *data, uint32_t cnt);
 extern int csi_efuse_write_raw(uint32_t addr, const void *data, uint32_t cnt);
@@ -35,7 +35,7 @@ int csi_sec_init(void)
 	char *version;
 
 	/* Initialize eFuse module */
-	ret = csi_efuse_api_int();
+	ret = csi_efuse_api_init();
 	if (ret) {
 		printf("efuse init faild[%d]\n", ret);
 		 goto exit;
@@ -62,7 +62,7 @@ void designware_get_mac_from_fuse(unsigned char *mac)
 	int ret;
 
 	/* Initialize eFuse module */
-	ret = csi_efuse_api_int();
+	ret = csi_efuse_api_init();
 	if (ret) {
 		printf("efuse init faild[%d]\n", ret);
 		return;
@@ -75,6 +75,87 @@ void designware_get_mac_from_fuse(unsigned char *mac)
 	}
 }
 
+#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
+/* Secure function for image verificaiton here */
+int get_image_version(unsigned long img_src_addr)
+{
+	img_header_t *img = (img_header_t *)img_src_addr;
+	uint8_t magiccode[4] = {0};
+	
+	magiccode[3] = img->magic_num & 0xff;
+	magiccode[2] = (img->magic_num & 0xff00) >> 8;
+	magiccode[1] = (img->magic_num & 0xff0000) >> 16;
+	magiccode[0] = (img->magic_num & 0xff000000) >> 24;
+	if (memcmp(header_magic, magiccode, 4) == 0) {
+		return -1;
+	}
+	
+	return img->image_version;
+}
+
+int get_image_size(unsigned long img_src_addr)
+{
+	img_header_t *img = (img_header_t *)img_src_addr;
+	uint8_t magiccode[4] = {0};
+	
+	magiccode[3] = img->magic_num & 0xff;
+	magiccode[2] = (img->magic_num & 0xff00) >> 8;
+	magiccode[1] = (img->magic_num & 0xff0000) >> 16;
+	magiccode[0] = (img->magic_num & 0xff000000) >> 24;
+	if (memcmp(header_magic, magiccode, 4) == 0) {
+		return -1;
+	}
+	
+	return img->image_size;
+}
+
+void dump_image_header_info(long addr)
+{
+	img_header_t *phead = (img_header_t *)addr;
+
+	printf("\n---------------------------------------------\n");
+	printf("entry point: 0x%x\n", phead->entry_point);
+	printf("image size: %d Bytes\n", phead->image_size);
+	printf("head version: 0x%x\n", phead->head_version);
+	printf("image version: 0x%x\n", phead->image_version);
+	printf("image checksum: 0x%x\n", phead->image_checksum);
+	printf("image run addr: 0x%llx\n", phead->image_run_addr);
+	printf("image offset: 0x%x\n", phead->image_offset);
+	printf("image digest scheme: %d\n", phead->digest_scheme);
+	printf("image sign scheme: %d\n", phead->signature_scheme);
+	printf("image encrypt type: %d\n", phead->encrypt_type);
+	printf("\n---------------------------------------------\n");
+}
+
+int verify_customer_image(img_type_t type, long addr)
+{
+	int ret;
+    
+	/* Double check image number */
+	if (image_have_head(addr) == 0)
+		return -1;
+
+	/* Dump image header information here */
+	dump_image_header_info(addr);
+
+	/* Call customer image verification function */
+	if ((type == T_TF) || (type == T_TEE) || (type == T_KRLIMG)) {
+		ret = csi_sec_custom_image_verify(addr, UBOOT_STAGE_ADDR);
+		if (ret) {
+			printf("Image(%d) is verified fail, Please go to check!\n\n", type);
+			return ret;
+		}
+	} else if (type == T_UBOOT) {
+		ret = csi_sec_uboot_image_verify(addr, addr - PUBKEY_HEADER_SIZE);
+		if (ret) {
+			printf("Image(%s) is verified fail, Please go to check!\n\n", "uboot");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+#else
 static int strtou32(const char *str, unsigned int base, u32 *result)
 {
 	char *ep;
@@ -110,7 +191,7 @@ static int do_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	int ret, i;
 
 	/* Initialize eFuse module */
-	ret = csi_efuse_api_int();
+	ret = csi_efuse_api_init();
 	if (ret) {
 		printf("efuse init faild[%d]\n", ret);
 		goto err;
@@ -180,88 +261,6 @@ err:
 	return CMD_RET_FAILURE;
 }
 
-#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF)
-/* Secure function for image verificaiton here */
-int get_image_version(unsigned long img_src_addr)
-{
-	img_header_t *img = (img_header_t *)img_src_addr;
-	uint8_t magiccode[4] = {0};
-	
-	magiccode[3] = img->magic_num & 0xff;
-	magiccode[2] = (img->magic_num & 0xff00) >> 8;
-	magiccode[1] = (img->magic_num & 0xff0000) >> 16;
-	magiccode[0] = (img->magic_num & 0xff000000) >> 24;
-	if (memcmp(header_magic, magiccode, 4) == 0) {
-		return -1;
-	}
-	
-	return img->image_version;
-}
-
-int get_image_size(unsigned long img_src_addr)
-{
-	img_header_t *img = (img_header_t *)img_src_addr;
-	uint8_t magiccode[4] = {0};
-	
-	magiccode[3] = img->magic_num & 0xff;
-	magiccode[2] = (img->magic_num & 0xff00) >> 8;
-	magiccode[1] = (img->magic_num & 0xff0000) >> 16;
-	magiccode[0] = (img->magic_num & 0xff000000) >> 24;
-	if (memcmp(header_magic, magiccode, 4) == 0) {
-		return -1;
-	}
-	
-	return img->image_size;
-}
-
-void dump_image_header_info(long addr)
-{
-	img_header_t *phead = (img_header_t *)addr;
-
-	printf("\n---------------------------------------------\n");
-	printf("entry point: 0x%x\n", phead->entry_point);
-	printf("image size: %d Bytes\n", phead->image_size);
-	printf("head version: 0x%x\n", phead->head_version);
-	printf("image version: 0x%x\n", phead->image_version);
-	printf("image checksum: 0x%x\n", phead->image_checksum);
-	printf("image run addr: 0x%llx\n", phead->image_run_addr);
-	printf("image offset: 0x%x\n", phead->image_offset);
-	printf("image digest scheme: %d\n", phead->digest_scheme);
-	printf("image sign scheme: %d\n", phead->signature_scheme);
-	printf("image encrypt type: %d\n", phead->encrypt_type);
-	printf("\n---------------------------------------------\n");
-}
-
-int verify_customer_image(img_type_t type, long addr)
-{
-	int ret;
-    const char *image_name = "";
-    
-	/* Double check image number */
-	if (image_have_head(addr) == 0)
-		return -1;
-
-	/* Dump image header information here */
-	dump_image_header_info(addr);
-
-	/* Call customer image verification function */
-	if ((type == T_TF) || (type == T_TEE) || (type == T_KRLIMG)) {
-		ret = csi_sec_custom_image_verify(addr, UBOOT_STAGE_ADDR);
-		if (ret) {
-			printf("Image(%d) is verified fail, Please go to check!\n\n", type);
-			return ret;
-		}
-	} else if (type == T_UBOOT) {
-		ret = csi_sec_uboot_image_verify(addr, addr - PUBKEY_HEADER_SIZE);
-		if (ret) {
-			printf("Image(%s) is verified fail, Please go to check!\n\n", "uboot");
-			return ret;
-		}
-	}
-
-	return 0;
-}
-#else
 U_BOOT_CMD(
 	efuse, CONFIG_SYS_MAXARGS, 0, do_fuse,
 	"eFuse sub-system",

board/thead/light-c910/secimg_load.c

@@ -0,0 +1,212 @@
+/*
+ * (C) Copyright 2018, Linaro Limited
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <command.h>
+#include <env.h>
+#include <configs/light-c910.h>
+#include <asm/arch-thead/boot_mode.h>
+#include "sec_library.h"
+
+#define ENV_SECIMG_LOAD     "sec_m_load"
+#define VAL_SECIMG_LOAD     "ext4load mmc 0:7 $tf_addr trust_firmware.bin; ext4load mmc 0:7 $tee_addr tee.bin"
+
+#define RPMB_BLOCK_SIZE 256
+#define RPMB_ROLLBACK_BLOCK_START 1
+
+#ifndef LIGHT_KDF_RPMB_KEY
+static const unsigned char emmc_rpmb_key_sample[32] = {0x33, 0x22, 0x11, 0x00, 0x77, 0x66, 0x55, 0x44, \
+												0xbb, 0xaa, 0x99, 0x88, 0xff, 0xee, 0xdd, 0xcc, \
+												0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, \
+												0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+#endif
+
+extern int sprintf(char *buf, const char *fmt, ...);
+
+static int get_rpmb_key(uint8_t key[32])
+{
+#ifndef LIGHT_KDF_RPMB_KEY 
+    memcpy(key, emmc_rpmb_key_sample, sizeof(emmc_rpmb_key_sample));
+
+    return 0;
+#else 
+	uint32_t kdf_rpmb_key_length = 0;
+	int ret = 0;
+	ret = csi_kdf_gen_hmac_key(key, &kdf_rpmb_key_length);
+	if (ret != 0) {
+		return -1;
+	}
+
+    return 0;
+#endif
+}
+
+static int get_image_file_size(unsigned long img_src_addr)
+{
+	img_header_t *img = (img_header_t *)img_src_addr;
+	uint8_t magiccode[4] = {0};
+	
+	magiccode[3] = img->magic_num & 0xff;
+	magiccode[2] = (img->magic_num & 0xff00) >> 8;
+	magiccode[1] = (img->magic_num & 0xff0000) >> 16;
+	magiccode[0] = (img->magic_num & 0xff000000) >> 24;
+	if (memcmp(header_magic, magiccode, 4) == 0) {
+		return -1;
+	}
+	
+	return img->image_size;
+}
+
+static int verify_and_load_image(unsigned long image_addr_src, unsigned long image_addr_dst)
+{
+    int ret = 0;
+	unsigned int image_size = 0;
+
+	if (image_have_head(image_addr_src) == 1) {
+        ret = csi_sec_init();
+        if (ret != 0) {
+			return -1;
+		}
+        
+        ret = csi_sec_custom_image_verify(image_addr_src, UBOOT_STAGE_ADDR);
+        if (ret != 0) {
+            printf("image verify error\r\n");
+            return -2;
+        }
+		
+		image_size = get_image_file_size(image_addr_src);
+		if (image_size  < 0) {
+            printf("image get size error\r\n");
+			return -3;
+		}
+
+		memmove((void *)image_addr_dst, (const void *)(image_addr_src + HEADER_SIZE), image_size);
+	} else {
+        printf("in secure mode but image has no header\r\n");
+		return -4;
+	}
+
+    return 0;
+}
+
+int verify_and_load_tee_tf_image(void)
+{
+    int ret = 0;
+
+    ret = verify_and_load_image(LIGHT_TF_FW_TMP_ADDR, LIGHT_TF_FW_ADDR);
+    if (ret != 0) {
+        printf("verify tf image failed\r\n");
+        return ret;
+    }
+    printf("verify trust firmware image success\r\n");
+
+    ret = verify_and_load_image(LIGHT_TEE_FW_ADDR, LIGHT_TEE_FW_ADDR);
+    if (ret != 0) {
+        printf("verify tee image failed\r\n");
+        return ret;
+    }
+    printf("verify tee image success\r\n");
+
+    return 0;
+}
+
+/* In order to use common bootloader for both secure boot and non-secure boot,
+   we only know the boot type through reading the sec_boot field in efuse. Due to 
+   the efuse is only accessed in lifecycle(DEV/OEM/PRO/RMP), we ensure it must be 
+   non-secure boot in lifecycle(INIT) */
+bool get_system_boot_type(void)
+{
+	bool btype = false; /* false: non-secure boot | true: secure boot */
+	int lc = 0;
+	sboot_st_t sb_flag = SECURE_BOOT_DIS;
+	int ret = 0;
+# if 0
+	ret = csi_efuse_get_lc(&lc);
+	/* 0: LC_INIT, 1: LC_DEV, 2: LC_OEM, 3: LC_PRO */
+	if ((ret == 0) && (lc != 0)) {
+		csi_efuse_api_init();
+
+		/* Check platform secure boot enable ? */
+		ret = csi_efuse_get_secure_boot_st(&sb_flag);
+		if ((ret == 0) && (sb_flag == SECURE_BOOT_EN))
+			btype = true;
+
+		csi_efuse_api_uninit();
+	}
+#endif
+	return btype;
+}
+
+int sec_read_rollback_index(size_t rollback_index_slot, uint64_t *out_rollback_index)
+{
+	char runcmd[64] = {0};
+	unsigned char blkdata[RPMB_BLOCK_SIZE];
+    size_t rpmb_block = (rollback_index_slot * sizeof(uint64_t)) / RPMB_BLOCK_SIZE + RPMB_ROLLBACK_BLOCK_START;
+    size_t rpmb_offset = (rollback_index_slot * sizeof(uint64_t)) % RPMB_BLOCK_SIZE;
+
+    sprintf(runcmd, "mmc rpmb read 0x%lx %ld 1", (unsigned long)blkdata, rpmb_block);
+	if(run_command(runcmd, 0)) {
+        printf("read_rollback_index failed, mmc read error\r\n");
+        return -1;
+    }
+
+    *out_rollback_index = *(uint64_t*)(blkdata + rpmb_offset);
+	return 0;
+}
+
+int sec_write_rollback_index(size_t rollback_index_slot, uint64_t rollback_index)
+{
+    char runcmd[64] = {0};
+	unsigned char blkdata[RPMB_BLOCK_SIZE];
+    size_t rpmb_block = (rollback_index_slot * sizeof(uint64_t)) / RPMB_BLOCK_SIZE + RPMB_ROLLBACK_BLOCK_START;
+    size_t rpmb_offset = (rollback_index_slot * sizeof(uint64_t)) % RPMB_BLOCK_SIZE;
+    uint8_t rpmb_key[32];
+
+    sprintf(runcmd, "mmc rpmb read 0x%lx %ld 1", (unsigned long)blkdata, rpmb_block);
+	if(run_command(runcmd, 0)) {
+        printf("read_rollback_index failed, mmc read error\r\n");
+        return -1;
+    }
+
+    *(uint64_t*)(blkdata + rpmb_offset) = rollback_index;
+    
+    if (get_rpmb_key(rpmb_key) != 0) {
+        return -2;
+    }
+
+	sprintf(runcmd, "mmc rpmb write 0x%lx %ld 1 0x%lx", (unsigned long)blkdata, rpmb_block, (unsigned long)rpmb_key);
+    if(run_command(runcmd, 0)) {
+        printf("read_rollback_index failed, mmc write error\r\n");
+        return -3;
+    }
+
+    return 0;
+}
+
+static int do_secimg_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+    bool sb_enable = false;
+    const char *secimgs_load_str = VAL_SECIMG_LOAD;
+    int ret = -1;
+    sb_enable = get_system_boot_type();
+    if (sb_enable) {
+        /* By default, the value for ENV-SEC-M-LOAD is always to load opensbi image.
+         * if secure boot is enable, we force to change the value to load tee image.
+         * but Never to save it in volatile-RAM
+         */
+        ret = env_set(ENV_SECIMG_LOAD, secimgs_load_str);
+        if (ret != 0) {
+            printf("Rewrite ENV (%s) fails\n", ENV_SECIMG_LOAD);
+            return CMD_RET_FAILURE;
+        }
+    }
+    
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+	secimg_load, 1, 1,	do_secimg_load,
+	"Runtime-load secure image if secure system is enable",
+	NULL
+);

board/thead/light-c910/spl.c

@@ -48,6 +48,7 @@ static struct light_reset_list light_post_reset_lists[] = {
 	{0x00000002, 0xFFEF528000}, /* VO sys_reg: GPU rst */
 	{0x00000003, 0xFFEF528000}, /* VO sys_reg: GPU rst */
 	{0x00000007, 0xFFFF529004}, /* VO sys_reg: DPU rst */
+	{0x07FFFF18, 0xFFCB000014}, /* Audio sys_reg: DMA rst */
 };
 
 static void light_pre_reset_config(void)
@@ -399,9 +400,20 @@ void board_init_f(ulong dummy)
 	light_board_init_r(NULL, 0);
 }
 
+static uint32_t get_custom_boot_seq(void)
+{
+	/* boot media definition */
+	/* BOOT_DEVICE_MMC1 - boot from eMMC or SD card */
+	/* BOOT_DEVICE_NAND - boot from nand flash */
+	/* BOOT_DEVICE_SPI - boot from spi flash */
+	/* TODO: user can decide the boot media according their own configuration */
+	return BOOT_DEVICE_MMC1;
+}
+
 void board_boot_order(u32 *spl_boot_list)
 {
 #define SOC_OM_ADDRBASE        0xffef018010
+#if CONFIG_IS_ENABLED(LIGHT_BOOT_FORCE_SEQ)
 	switch (readl((void *)SOC_OM_ADDRBASE) & 0x7) {
 	case 0:
 	case 1:
@@ -428,6 +440,8 @@ void board_boot_order(u32 *spl_boot_list)
 	default:
 		spl_boot_list[0] = BOOT_DEVICE_NONE;
 	}
-
+#else
+	spl_boot_list[0] = get_custom_boot_seq();
+#endif
 	cpu_performance_enable();
 }

board/thead/light-c910/sys_clk.c

@@ -43,9 +43,9 @@ void cpu_clk_config(uint32_t cpu_freq)
 	udelay(11);
 
 	/* config bus: cpu clk ratio to 1:1 */
-	writel((readl(LIGHT_APCLK_ADDRBASE + 0x100) & (~(0x7<<8))) | (0x0<<8), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // ratio=0
-	writel(readl(LIGHT_APCLK_ADDRBASE + 0x100) & (~(0x1<<11)), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=0
-	writel(readl(LIGHT_APCLK_ADDRBASE + 0x100) | (0x1<<11), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=1
+	writel((readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) & (~(0x7<<8))) | (0x0<<8), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // ratio=0
+	writel(readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) & (~(0x1<<11)), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=0
+	writel(readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) | (0x1<<11), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=1
 
 	/* switch c910_cclk to cpu_pll1_foutpostdiv */
 	tmp = readl((void *)LIGHT_APCLK_ADDRBASE + 0x100);
@@ -290,7 +290,7 @@ void sys_clk_config(void)
 
 	/* The boards other than the LightA board perform the bus down-speed operation */
 
-#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
 	/* axi_sram_clk: 812.8512MHz -> 688.128MHz */
 	tmp = readl((void *)LIGHT_AONCLK_ADDRBASE + 0x104);
 	tmp |= 0x2000;

cmd/Kconfig

@@ -263,6 +263,12 @@ config CMD_BOOTI
 	help
 	  Boot an AArch64 Linux Kernel image from memory.
 
+config CMD_BOOTANDROID
+	bool "bootandroid"
+	default n
+	help
+	Boot an android image from mmc.
+
 config BOOTM_LINUX
 	bool "Support booting Linux OS images"
 	depends on CMD_BOOTM || CMD_BOOTZ || CMD_BOOTI

cmd/Makefile

@@ -175,6 +175,7 @@ obj-$(CONFIG_CMD_REGULATOR) += regulator.o
 obj-$(CONFIG_CMD_BLOB) += blob.o
 
 # Android Verified Boot 2.0
+obj-$(CONFIG_CMD_BOOTANDROID) += bootandroid.o
 obj-$(CONFIG_CMD_AVB) += avb.o
 
 obj-$(CONFIG_DDR_SCAN) += ddrscan.o

cmd/avb.c

@@ -312,6 +312,10 @@ int do_avb_verify_part(cmd_tbl_t *cmdtp, int flag,
 		printf("Unknown error occurred\n");
 	}
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	if (out_data)
+		avb_slot_verify_data_free(out_data);
+#endif
 	return res;
 }
 

cmd/bootandroid.c

@@ -0,0 +1,505 @@
+
+/*
+ * (C) Copyright 2018, Linaro Limited
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <avb_verify.h>
+#include <command.h>
+#include <env.h>
+#include <image.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <android_image.h>
+#include <android_bootloader_message.h>
+#include <xbc.h>
+
+#define ENV_KERNEL_ADDR  "kernel_addr"
+#define ENV_RAMDISK_ADDR "ramdisk_addr"
+#define ENV_DTB_ADDR     "dtb_addr"
+#define DEFAULT_KERNEL_ADDR  0x00200800
+#define DEFAULT_RAMDISK_ADDR LIGHT_ROOTFS_ADDR
+#define DEFAULT_DTB_ADDR     LIGHT_DTB_ADDR
+#define ENV_RAMDISK_SIZE "ramdisk_size"
+#define MISC_PARTITION "misc"
+#define RECOVERY_PARTITION "recovery"
+#define BOOT_PARTITION "boot"
+#define VENDOR_BOOT_PARTITION "vendor_boot"
+
+#define BOOTDEV_DEFAULT		0
+#define BCB_BOOTONCE	"bootonce-bootloader"
+#define BCB_BOOTRECOVERY	"boot-recovery"
+
+
+/*
+ * Knowing secure boot is enable or disable dependents on 
+ * special data field in efuse and efuse control register.
+ */
+extern bool get_system_boot_type(void);
+/*
+ * The suffix for partition name is from the value of ENV_BOOTAB
+ */
+static const char *slot_name_suffix = NULL;;
+
+/*
+ * BOOT IMAGE HEADER V3/V4 PAGESIZE
+ * Source code:system/tools/mkbootimg/unpack_bootimg.py
+ */
+#define BOOT_IMAGE_HEADER_V3_PAGESIZE 4096
+
+static struct AvbOps *avb_ops = NULL;
+static struct bootloader_message_ab *s_bcb = NULL;
+static struct bootloader_control *boot_ctl = NULL;
+
+static char *get_boot_partition_name_suffix(void)
+{
+#ifdef CONFIG_ANDROID_AB
+    if (boot_ctl != NULL) {
+		/* index 0 is _a, index 1 is _b*/
+		if(boot_ctl->slot_info[0].priority < boot_ctl->slot_info[1].priority) {
+			strcpy(boot_ctl->slot_suffix, "_b");
+		} else {
+			strcpy(boot_ctl->slot_suffix, "_a");
+		}
+	} else {
+		printf("get_slot_suffix boot_ctl is null return _a");
+		return "_a";
+	}
+	printf("get_slot_suffix boot_ctl->slot_suffix %s\r\n", boot_ctl->slot_suffix);
+	return boot_ctl->slot_suffix;
+#else
+	return "";
+#endif
+}
+
+static void get_partition_name(const char *partion, char *partion_name)
+{
+	strcpy(partion_name, partion);
+	strcat(partion_name, get_boot_partition_name_suffix());
+}
+
+/*
+ *format 4 chars/bytes to a int number
+ */
+static int byteToInt(uint8_t* data,int offset)
+{
+	return data[offset+0] + (data[offset+1] << 8) + (data[offset+2] << 16) + (data[offset+3] << 24);
+}
+
+static int get_number_of_pages(int image_size, int page_size)
+{
+    return (image_size + page_size - 1) / page_size;
+}
+
+/**
+ * header_version >=3,get dtb data from vendor_boot.img ,else boot.img.
+ *
+ * header_version = 4,get bootconfig data from vendor_boot.img ,
+ * and append bootconfig to the end of ramdisk(initrd)
+ * doc:https://www.kernel.org/doc/html/next/translations/zh_CN/admin-guide/bootconfig.html#initrd
+ */
+static int prepare_data_from_vendor_boot(struct andr_img_hdr *hdr, int dtb_start, uint8_t** buf_bootconfig, int* vendor_bootconfig_size)
+{
+	int ret;
+	disk_partition_t part_info;
+	uint8_t* vendor_boot_data = NULL;
+	struct blk_desc *dev_desc  = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+	char vb_part_name[32] = {0};
+
+	if (hdr == NULL) {
+		printf("invalid hdr\n");
+		return -1;
+	}
+
+	/* if the vendor boot partition name is beyond 32B, arise error */
+	if ((32 - strlen(VENDOR_BOOT_PARTITION)) < 2)
+		return -1;
+	
+    get_partition_name(VENDOR_BOOT_PARTITION, vb_part_name);
+
+	printf("blk_get_dev %s\n", vb_part_name);
+	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+		printf("MMC err: invalid mmc device\n");
+		return -1;
+	}
+	/* Get boot partition info */
+	ret = part_get_info_by_name(dev_desc, vb_part_name, &part_info);
+	if (ret < 0) {
+		printf("MMC err: cannot find %s partition\n", vb_part_name);
+		return -1;
+	}
+
+    if (part_info.size * part_info.blksz > CONFIG_FASTBOOT_BUF_SIZE) {
+        return -1;
+    }
+    vendor_boot_data = (uint8_t*)CONFIG_FASTBOOT_BUF_ADDR;
+
+	ret = blk_dread(dev_desc, part_info.start, part_info.size, vendor_boot_data);
+	// vendor_boot.img
+	//* +------------------------+
+	//* | vendor boot header     | o pages
+	//* +------------------------+
+	//* | vendor ramdisk section | p pages
+	//* +------------------------+
+	//* | dtb                    | q pages
+	//* +------------------------+
+	//* | vendor ramdisk table   | r pages
+	//* +------------------------+
+	//* | bootconfig             | s pages
+	//* +------------------------+
+	//* o = (2124 + page_size - 1) / page_size
+	//* p = (vendor_ramdisk_size + page_size - 1) / page_size
+	//* q = (dtb_size + page_size - 1) / page_size
+	//* r = (vendor_ramdisk_table_size + page_size - 1) / page_size
+	//* s = (vendor_bootconfig_size + page_size - 1) / page_size
+
+	// see system/tools/mkbootimg/unpack_bootimg.py
+	// info.boot_magic = unpack('8s', args.boot_img.read(8))[0].decode()
+	// info.header_version = unpack('I', args.boot_img.read(4))[0]
+	// info.page_size = unpack('I', args.boot_img.read(4))[0]
+	// info.kernel_load_address = unpack('I', args.boot_img.read(4))[0]
+	// info.ramdisk_load_address = unpack('I', args.boot_img.read(4))[0]
+	// info.vendor_ramdisk_size = unpack('I', args.boot_img.read(4))[0]
+	// info.cmdline = cstr(unpack('2048s', args.boot_img.read(2048))[0].decode())
+	// info.tags_load_address = unpack('I', args.boot_img.read(4))[0]
+	// info.product_name = cstr(unpack('16s', args.boot_img.read(16))[0].decode())
+	// info.header_size = unpack('I', args.boot_img.read(4))[0]
+	// info.dtb_size = unpack('I', args.boot_img.read(4))[0]
+	// info.dtb_load_address = unpack('Q', args.boot_img.read(8))[0]
+	// info.vendor_ramdisk_table_size = unpack('I', args.boot_img.read(4))[0]
+	// vendor_ramdisk_table_entry_num = unpack('I', args.boot_img.read(4))[0]
+	// vendor_ramdisk_table_entry_size = unpack('I', args.boot_img.read(4))[0]
+	// info.vendor_bootconfig_size = unpack('I', args.boot_img.read(4))[0]
+	// num_vendor_ramdisk_table_pages = get_number_of_pages(
+	// 	info.vendor_ramdisk_table_size, page_size)
+	// vendor_ramdisk_table_offset = page_size * (
+	// 	num_boot_header_pages + num_boot_ramdisk_pages + num_boot_dtb_pages)
+	// bootconfig_offset = page_size * (num_boot_header_pages
+	// 	+ num_boot_ramdisk_pages + num_boot_dtb_pages
+	// 	+ num_vendor_ramdisk_table_pages)
+
+	int vendor_boot_pagesize = byteToInt(vendor_boot_data,12);//offset 12
+	int vendor_ramdisk_size = byteToInt(vendor_boot_data,24);//offset 24
+	int dtb_size = byteToInt(vendor_boot_data,2100);//offset 2100
+	int o = (2124 + vendor_boot_pagesize - 1) / vendor_boot_pagesize;
+	int p = (vendor_ramdisk_size + vendor_boot_pagesize - 1) / vendor_boot_pagesize;
+	int dtb_offset = vendor_boot_pagesize * (o + p);
+
+	hdr->dtb_size=  dtb_size;
+	memcpy((void *)(uint64_t)dtb_start, vendor_boot_data + dtb_offset, hdr->dtb_size);
+
+	int q=(hdr->dtb_size + vendor_boot_pagesize - 1) / vendor_boot_pagesize;
+	int vendor_ramdisk_table_size=byteToInt(vendor_boot_data,2112);//offset 2112
+	
+	int r=(vendor_ramdisk_table_size + vendor_boot_pagesize - 1) / vendor_boot_pagesize;
+	*vendor_bootconfig_size=byteToInt(vendor_boot_data,2124);//offset 2124
+	
+	*buf_bootconfig = avb_malloc(*vendor_bootconfig_size);
+	if (*buf_bootconfig == NULL) {
+		printf("vendor bootconfig malloc fail\n");
+		return -1;
+	}
+	int bootconfig_offset=vendor_boot_pagesize * (o + p + q + r);
+	memcpy(*buf_bootconfig, vendor_boot_data + bootconfig_offset, *vendor_bootconfig_size);
+
+#ifdef CONFIG_ANDROID_AB
+	char *find_str = NULL;
+	char *slot_suffix = get_boot_partition_name_suffix();
+    char *slot_suffx_pre = "androidboot.slot_suffix=";
+	printf("prepare_data_from_vendor_boot slot_suffix:%s\n", slot_suffix);
+    printf("prepare_data_from_vendor_boot slot_suffx_pre:%s\n", slot_suffx_pre);
+
+	find_str = strstr((char *)*buf_bootconfig, slot_suffx_pre);
+    if (find_str != NULL) {
+		memcpy(find_str + strlen(slot_suffx_pre), slot_suffix, strlen(slot_suffix));
+	}
+#endif
+
+	return 0;
+}
+
+static void prepare_loaded_parttion_data(const uint8_t* data)
+{
+	struct andr_img_hdr *hdr = (struct andr_img_hdr *)map_sysmem((phys_addr_t)data, 0);
+
+	if (IMAGE_FORMAT_ANDROID == genimg_get_format(hdr)) {
+		int dtb_start = env_get_hex(ENV_DTB_ADDR, DEFAULT_DTB_ADDR);
+		uint8_t* buf_bootconfig = NULL;
+		int size_bootconfig=0;
+
+		printf("Boot image header_version:%d\n", hdr->header_version);
+		if (hdr->header_version >= 3) {
+			// see system/tools/mkbootimg/unpack_bootimg.py
+			hdr->kernel_size = byteToInt((uint8_t *)data, 8);
+			hdr->ramdisk_size = byteToInt((uint8_t *)data, 12);
+			hdr->page_size = BOOT_IMAGE_HEADER_V3_PAGESIZE;
+			prepare_data_from_vendor_boot(hdr,dtb_start,&buf_bootconfig,&size_bootconfig);
+		}
+
+		int kernel_start = env_get_hex(ENV_KERNEL_ADDR, DEFAULT_KERNEL_ADDR);
+		int ramdisk_start = env_get_hex(ENV_RAMDISK_ADDR, DEFAULT_RAMDISK_ADDR);
+		// see system/tools/mkbootimg/unpack_bootimg.py
+ 		int page_size = hdr->page_size;
+		int num_header_pages = 1;
+		int num_kernel_pages = get_number_of_pages(hdr->kernel_size, page_size);
+		int num_ramdisk_pages = get_number_of_pages(hdr->ramdisk_size, page_size);
+		int kernel_offset = page_size * num_header_pages;
+		int ramdisk_offset = page_size * (num_header_pages + num_kernel_pages);
+		int dtb_offset = page_size * (num_header_pages + num_kernel_pages + num_ramdisk_pages);
+
+		printf("Boot image kernel_start:%x, kernel_offset:%x, kernel_size:%d\n", kernel_start, kernel_offset, hdr->kernel_size);
+		printf("Boot image ramdisk_start:%x, ramdisk_offset:%x, ramdisk_size:%d\n", ramdisk_start, ramdisk_offset, hdr->ramdisk_size);
+		printf("Boot image page_size:%d\n", hdr->page_size);
+		printf("dtb_offset:%x, dtb_size:%d\n", dtb_offset, hdr->dtb_size);
+
+ 		if (kernel_start + hdr->kernel_size > ramdisk_start || kernel_start + hdr->kernel_size > dtb_start) {
+			printf("boot.img kernel space and ramdis space are overlaped !!!\n");
+		} else {
+			memcpy((void *)(uint64_t)kernel_start, data + kernel_offset, hdr->kernel_size);
+			memcpy((void *)(uint64_t)ramdisk_start, data + ramdisk_offset, hdr->ramdisk_size);
+			if( hdr->header_version < 3) {
+				//set ramdisk size for bootm
+				env_set_hex(ENV_RAMDISK_SIZE, hdr->ramdisk_size);
+				memcpy((void *)(uint64_t)dtb_start, data + dtb_offset, hdr->dtb_size);
+			} else {
+				//get bootconfig form vendor_boot.img and append bootconfig to ramdisk
+				char* bootconfig_params=(char*)buf_bootconfig;
+				int ret = addBootConfigParameters(bootconfig_params, size_bootconfig,
+                            						ramdisk_start + hdr->ramdisk_size , 0);
+				if (ret == -1) {
+					printf("Bootconfig Err: add BootConfig Parameters error!!!\n");
+				} else {
+					printf("ramdisk size is updated to new value is:%d\n",hdr->ramdisk_size + ret);
+					//set ramdisk size for bootm
+					env_set_hex(ENV_RAMDISK_SIZE, hdr->ramdisk_size + ret);
+				}
+			}
+		}
+		if (buf_bootconfig != NULL) {
+			avb_free(buf_bootconfig);
+		}
+	}
+	unmap_sysmem(hdr);
+}
+
+static int prepare_boot_data(const AvbSlotVerifyData *out_data)
+{
+	int res = CMD_RET_FAILURE;
+	int i = 0;
+	int num_loaded_partition = out_data->num_loaded_partitions;
+
+	printf("@@@@ prepare loaded partition (%d) data start\n", num_loaded_partition);
+	for (i = 0; i < num_loaded_partition; i++) {
+		const AvbPartitionData *loaded_partition = &out_data->loaded_partitions[i];
+		
+		if (loaded_partition->partition_name != NULL) {
+			printf("partition_name=%s, data_size=%ld\n", \
+					loaded_partition->partition_name, loaded_partition->data_size);
+			prepare_loaded_parttion_data(loaded_partition->data);
+		}
+	}
+	return res;
+}
+
+static void prepare_partition_data(const char *name)
+{
+	int ret = 0;
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc  = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+	uint8_t *data = NULL;
+
+	printf("prepare_partition_data %s\n", name);
+	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+		printf("MMC err: invalid mmc device\n");
+		return;
+	}
+	/* Get boot partition info */
+	ret = part_get_info_by_name(dev_desc, name, &part_info);
+	if (ret < 0) {
+		printf("MMC err: cannot find %s partition\n", name);
+		return;
+	}
+
+	data = avb_malloc(part_info.size * part_info.blksz);
+	if (data == NULL) {
+		printf("avb malloc(%ldKB) fails\n", part_info.size * part_info.blksz / 1024);
+		return;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, part_info.size, data);
+	prepare_loaded_parttion_data(data);
+	
+	printf("prepare_partition_data %s, read=%d, start:%lx, size:%ld, blksize:%lx\n", \
+			name, ret, part_info.start, part_info.size, part_info.blksz);
+
+	avb_free(data);
+}
+
+static void clear_bcb(void)
+{
+	int ret;
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc  = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+
+	//bcb clear and store
+	memset(s_bcb, 0, sizeof(struct bootloader_message_ab));
+
+	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+		printf("BootAndriod bcb err: invalid mmc device\n");
+		return;
+	}
+	/* Get boot partition info */
+	ret = part_get_info_by_name(dev_desc, MISC_PARTITION, &part_info);
+	if (ret < 0) {
+		printf("BootAndriod bcb err: cannot find misc partition\n");
+		return;
+	}
+
+	ret = blk_dwrite(dev_desc, part_info.start, part_info.size, s_bcb);
+	printf("BootAndriod bcb info :clear_bcb write=%d, %ld,%ld,%ld\n", ret, part_info.start, part_info.size, part_info.blksz);
+}
+
+static int do_andriod_bcb_business(void)
+{
+	AvbIOResult ret = AVB_IO_RESULT_OK;
+	size_t bytes_read = 0;
+	int res = CMD_RET_FAILURE;
+
+    if (avb_ops != NULL) {
+        avb_ops_free(avb_ops);
+        avb_ops = NULL;
+    }
+
+    avb_ops = avb_ops_alloc(BOOTDEV_DEFAULT);
+    if (avb_ops == NULL) {
+        goto _bcb_err;
+    }
+
+    if (s_bcb != NULL) {
+        avb_free(s_bcb);
+        s_bcb = NULL;
+    }
+
+	s_bcb = avb_malloc(sizeof(struct bootloader_message_ab));
+	if (s_bcb == NULL) {
+		goto _bcb_err;
+	}
+
+    if (boot_ctl != NULL) {
+        avb_free(boot_ctl);
+        boot_ctl = NULL;
+    }
+
+    boot_ctl = malloc(sizeof(struct bootloader_control));
+	if (boot_ctl == NULL)
+	{
+        ret = -2;
+		goto _bcb_err;
+	}
+
+	ret = avb_ops->read_from_partition(avb_ops,
+										MISC_PARTITION,
+										0,
+										sizeof(struct bootloader_message_ab),
+										s_bcb,
+										&bytes_read);
+	if (ret != AVB_IO_RESULT_OK) {
+		printf("BootAndriod Err: Bcb read failed\n");
+		goto _bcb_err;
+	}
+
+	/* Enter into fastboot mode if bcb string is bootonce or bootrecovery */
+	if (0 == strncmp(s_bcb->message.command, BCB_BOOTONCE, strlen(BCB_BOOTONCE))|| \
+	    0 == strncmp(s_bcb->message.command, BCB_BOOTRECOVERY, strlen(BCB_BOOTRECOVERY))) {
+		printf("BootAndriod Info: Bcb read %ld bytes, %s\n", bytes_read, s_bcb->message.command);
+		printf("BootAndriod Info: Enter fastboot mode\n");
+		clear_bcb();
+		run_command("fastboot usb 0", 0);
+	}
+
+    memset(boot_ctl, 0, sizeof(struct bootloader_control));
+    memcpy(boot_ctl, (struct bootloader_control*)s_bcb->slot_suffix, sizeof(struct bootloader_control));
+
+	res = CMD_RET_SUCCESS;
+
+_bcb_err:
+	if (res != CMD_RET_SUCCESS) {
+        if (avb_ops != NULL) {
+            avb_ops_free(avb_ops);
+            avb_ops = NULL;
+        }
+
+		if (boot_ctl != NULL) {
+            avb_free(boot_ctl);
+            boot_ctl = NULL;
+        }
+
+        if (s_bcb != NULL) {
+            avb_free(s_bcb);
+            s_bcb = NULL;
+        }
+    }
+
+	return res;
+}
+
+static int do_bootandroid(struct cmd_tbl_s *cmdtp, int flag, int argc,
+						char * const argv[]) {
+	
+	const char * const requested_partitions[] = {"vbmeta", "boot", "vbmeta_system", NULL};
+	AvbSlotVerifyResult slot_result = AVB_SLOT_VERIFY_RESULT_OK;
+	AvbSlotVerifyData *slot_data = NULL;
+	AvbIOResult ret = AVB_IO_RESULT_OK;
+	AvbSlotVerifyFlags slotflags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	AvbHashtreeErrorMode htflags = AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE;
+	int res = CMD_RET_FAILURE;
+    char bp_name[32] = {0};
+
+    res = do_andriod_bcb_business();
+    if (res != CMD_RET_SUCCESS) {
+        goto exit;
+    }
+
+	/* Retieve boot partition 's name suffix */
+	slot_name_suffix = get_boot_partition_name_suffix();
+
+	/* Start with slot verification in secure boot */
+	if (get_system_boot_type()) {
+		/* Verify boot partition requested in vbmeta.img */
+		slot_result = avb_slot_verify(avb_ops,
+									  requested_partitions,
+									  slot_name_suffix,
+									  slotflags,
+									  htflags,
+									&slot_data);
+
+		if (slot_result == AVB_SLOT_VERIFY_RESULT_OK) {
+			printf("BootAndriod Info: Request Partition are verified successfully\n");
+			printf("BootAndriod cmdline: slot_data.cmdline:%s\n", slot_data->cmdline);
+			prepare_boot_data(slot_data);
+			if (ret == 0) {
+				if (slot_data != NULL)
+					avb_slot_verify_data_free(slot_data);
+			}
+		} else {
+			/* In case of avb slot verification failure, Force system reset */
+			run_command("reset", 0);
+		}
+	} else {
+	/* Go to load BOOT partition directly in non-secure boot */		
+        get_partition_name(BOOT_PARTITION, bp_name);
+		prepare_partition_data(bp_name);
+	}
+    
+exit:
+	return res;
+}
+
+U_BOOT_CMD(
+	bootandroid, 2,	1, do_bootandroid,
+	"bootandroid   - boot android bootimg from device\n",
+	"mmc0 | mmc1 | mmc2 | mmcX]\n    "
+	"- boot application image stored in storage device like mmc\n"
+);
+

cmd/booti.c

@@ -119,15 +119,18 @@ U_BOOT_CMD(
 
 #endif
 
-#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF)
+#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
+#if CONFIG_IS_ENABLED(LIGHT_SEC_UPGRADE)
 extern int light_secboot(int argc, char * const argv[]);
+#endif
 int do_secboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
+#if CONFIG_IS_ENABLED(LIGHT_SEC_UPGRADE)
     if (light_secboot(argc, argv) != 0) {
         run_command("reset", 0);
         return -1;
     }
-
+#endif
 	return 0;
 }
 U_BOOT_CMD(

cmd/mmc.c

@@ -574,6 +574,7 @@ static int do_mmc_rescan(cmd_tbl_t *cmdtp, int flag,
 }
 
 extern volatile uint32_t DELAY_LANE;
+extern volatile int manual_set_delay ;
 static int do_mmc_set_delay_lane(cmd_tbl_t *cmdtp, int flag,
 	       int argc, char * const argv[])
 {
@@ -587,17 +588,22 @@ static int do_mmc_set_delay_lane(cmd_tbl_t *cmdtp, int flag,
 	mmc = find_mmc_device(curr_device);
 	if (!mmc) {
 		printf("no mmc device at slot %x\n", curr_device);
-		return CMD_RET_FAILURE;
+		goto RET_FAILURE;
 	}
-
+	manual_set_delay = 1;
 	if (0 != snps_mmc_init(mmc))
-		return CMD_RET_FAILURE;
+		goto RET_FAILURE;
 
 	mmc = init_mmc_device(curr_device, true);
 	if (!mmc)
-		return CMD_RET_FAILURE;
-
+		goto RET_FAILURE;
+	
+	manual_set_delay = 0;
 	return CMD_RET_SUCCESS;
+
+RET_FAILURE:
+	manual_set_delay = 0;
+	return CMD_RET_FAILURE;
 }
 
 static int do_mmc_turning(cmd_tbl_t *cmdtp, int flag,
@@ -605,6 +611,10 @@ static int do_mmc_turning(cmd_tbl_t *cmdtp, int flag,
 {
 	struct mmc *mmc;
 	int i = 0, n;
+	int stop_on_ok = 1;
+	if(argc > 1 && (!strncmp(argv[1],"cont",4))){
+		stop_on_ok = 0;
+	}
 	for(i = 0; i <= 128; i++) {
 		DELAY_LANE = i;
 		printf("set DELAY_LANE = %d\n", DELAY_LANE);
@@ -616,8 +626,10 @@ static int do_mmc_turning(cmd_tbl_t *cmdtp, int flag,
 			return CMD_RET_FAILURE;
 		}
 
+		manual_set_delay = 1;
 		if (0 != snps_mmc_init(mmc)) {
 			printf("Error: mmc init error!\n");
+			manual_set_delay = 0;
 			return CMD_RET_FAILURE;
 		}
 
@@ -628,18 +640,21 @@ static int do_mmc_turning(cmd_tbl_t *cmdtp, int flag,
 
 		if (mmc_getwp(mmc) == 1) {
 			printf("Error: card is write protected!\n");
+			manual_set_delay = 0;
 			return CMD_RET_FAILURE;
 		}
 
 		n = blk_dwrite(mmc_get_blk_desc(mmc), 0, 1, 0);
 		if (n == 1) {
 			printf("blocks written: %s\n", "OK" );
-			return CMD_RET_SUCCESS;
+			manual_set_delay = 0;
+			if(stop_on_ok)
+				return CMD_RET_SUCCESS;
 		} else {
 			printf("written: %s\n", "error");
 		}
 	}
-
+	manual_set_delay = 0;
 	if (i > 128) {
 		return CMD_RET_FAILURE;
 	}
@@ -1239,9 +1254,10 @@ U_BOOT_CMD(
 #endif
 	"mmc erase blk# cnt\n"
 	"mmc rescan\n"
-	"mmc set_delay # val\n"
-	"mmc turning\n"
-	"mmc memset addr # lenght\n"
+	"mmc set_delay # val - set clk out delay mannaul,reinit host and rescan dev\n"
+	"mmc turning [continue] - loop test for clk delay form 0 to 128, reinit host and rescan dev\n"
+	"             - without arg [continue] exit once init and write ok\n"
+	"mmc memset addr # length - set mem addr 0xff with length  '# length' \n"
 	"mmc part - lists available partition on current mmc device\n"
 	"mmc dev [dev] [part] - show or set current mmc device [partition]\n"
 	"mmc list - lists available devices\n"

common/avb_verify.c

@@ -14,6 +14,48 @@
 #include <tee.h>
 #include <tee/optee_ta_avb.h>
 
+#ifdef CONFIG_AVB_ROLLBACK_ENABLE
+extern int sec_write_rollback_index(size_t rollback_index_slot, uint64_t rollback_index);
+extern int sec_read_rollback_index(size_t rollback_index_slot, uint64_t *out_rollback_index);
+#endif
+
+#if defined (CONFIG_AVB_USE_OEM_KEY)
+static const unsigned char avb_root_oem_pub[520] = {
+	0x00,0x00,0x08,0x00,0x11,0x70,0xEA,0xC9,0xC2,0xAD,0x66,0x2A,0x57,0x2A,0x89,0x68,
+	0x8B,0x40,0x33,0xF2,0xEA,0x22,0xD7,0x3E,0x31,0x5F,0x9D,0xB8,0xD1,0x16,0x5C,0x22,
+	0xC3,0xFE,0xE6,0x35,0x3F,0x96,0x6D,0xD8,0x1A,0x11,0xE9,0x53,0x90,0x88,0xA9,0xCE,
+	0xA7,0x33,0xB2,0x16,0x60,0x18,0xBE,0x23,0xCC,0x5C,0xAB,0x29,0x0E,0x7B,0x35,0x16,
+	0xB0,0x59,0x3A,0x2F,0x62,0xF1,0x9B,0x39,0x0A,0x21,0x00,0xFE,0x75,0xEB,0x00,0xDF,
+	0x17,0xAF,0x44,0x11,0x42,0x4E,0x4C,0x7C,0xA6,0xDC,0xC5,0xAD,0xB3,0x7C,0xC3,0xB1,
+	0x52,0xAD,0x0C,0xEF,0x73,0x69,0x7E,0xFC,0xF9,0x12,0xA7,0x5C,0x60,0x47,0xEF,0x8F,
+	0xC7,0x9D,0xD9,0x62,0xF5,0x0E,0x62,0xBB,0x3E,0x80,0x23,0xFA,0x19,0x4C,0x0A,0xD6,
+	0xE0,0xA7,0x0E,0x65,0xEA,0xD5,0xB8,0xA9,0xF2,0xA3,0xDA,0x18,0xBE,0x5D,0x4B,0x37,
+	0x91,0xBA,0xDB,0x0D,0x50,0x7E,0xEE,0x52,0xDF,0x90,0xE6,0xFC,0x8F,0xB8,0x24,0x2A,
+	0x2B,0xBE,0xA6,0xC9,0x5B,0x89,0x3E,0xE8,0x24,0xBD,0x6A,0x03,0x31,0x6C,0xFC,0x4A,
+	0xBA,0x6B,0xEE,0x08,0xAE,0x33,0x6E,0xC0,0x64,0x87,0xC1,0x35,0x65,0x42,0x34,0xE5,
+	0xF8,0x3B,0x82,0x36,0xE9,0xFA,0x23,0xD7,0x12,0xC5,0x7B,0x27,0x16,0xB0,0xC7,0x40,
+	0x5A,0xA4,0x8A,0x56,0xA4,0x54,0x0F,0xD9,0xA7,0x25,0x25,0xE3,0x7F,0x72,0x6E,0x4B,
+	0x63,0x1B,0x05,0xFE,0x4E,0x1F,0x1D,0x05,0xDD,0x91,0xA7,0xBF,0xA4,0x90,0xDA,0x7D,
+	0x0F,0xB6,0xFC,0x5D,0x8E,0xFB,0xE2,0xF7,0x5F,0x76,0xFA,0xD5,0x12,0xEC,0x87,0xD6,
+	0x07,0xA0,0xAC,0xB6,0xE6,0xBA,0xB0,0x87,0xBA,0x51,0xD7,0x6C,0x19,0xC0,0x2C,0xA5,
+	0x2C,0x08,0x52,0x2A,0x63,0x18,0x10,0x94,0xEA,0x5C,0x13,0xBF,0x42,0x8E,0x12,0xB6,
+	0x7D,0x34,0xD9,0x1C,0x42,0xBC,0xCE,0x44,0x8A,0x13,0x5B,0x93,0x6F,0x34,0x41,0xA1,
+	0xA3,0xD3,0x2E,0xF4,0xD3,0x28,0xAD,0x8F,0x8B,0x89,0x9D,0x42,0x43,0xD6,0xBF,0xDE,
+	0x9F,0xBD,0x32,0x06,0xE3,0x67,0xD3,0x14,0x2F,0x4C,0xE7,0x6B,0x9A,0xD9,0x04,0xFA,
+	0x4B,0x46,0x88,0xE7,0x04,0xAA,0x56,0xFF,0xBF,0x89,0x1D,0xFD,0x32,0xDF,0x47,0xC0,
+	0x34,0x0D,0x25,0x8C,0xF6,0xE1,0x5E,0xA9,0x3C,0x30,0x3A,0x53,0x0C,0xDB,0xAD,0x8E,
+	0x01,0xCB,0x46,0xE0,0xF5,0x97,0x2D,0xB8,0xF8,0x29,0xC3,0x19,0x4C,0x05,0x8B,0x74,
+	0xE0,0xA6,0x3B,0x3C,0x96,0x4F,0x91,0x74,0x62,0xAA,0x50,0x0F,0x11,0x30,0x59,0xAE,
+	0x7A,0x80,0xD3,0xAC,0xB3,0xDB,0x24,0x3A,0x79,0xD4,0xDB,0x79,0x10,0x63,0x27,0xD0,
+	0x6B,0xF9,0xA3,0xF4,0x27,0x24,0x89,0x0C,0xAC,0x31,0x15,0x08,0x10,0x59,0x08,0x2D,
+	0x00,0x3D,0xD8,0xD6,0x3B,0x91,0xC8,0x55,0xCF,0x28,0x3A,0xFB,0xD7,0xF7,0xF7,0x9D,
+	0x41,0xBD,0x3E,0xD1,0x77,0xA3,0xF6,0xFA,0x33,0x05,0x5A,0x36,0xCE,0xB9,0x02,0x12,
+	0x10,0xEB,0xCA,0xA7,0x3C,0xC8,0x5D,0xCD,0x33,0xD9,0xFA,0x16,0xD4,0x52,0x12,0xB6,
+	0x35,0xD5,0x84,0x53,0xC4,0x21,0xDC,0x72,0x2F,0xF9,0x1E,0x59,0x0A,0xCD,0x7D,0x89,
+	0xD4,0xCF,0x8E,0x2E,0x09,0x36,0xF5,0x12,0x35,0x43,0x64,0x6C,0xD1,0x70,0xBF,0x67,
+	0x3A,0x54,0x72,0x84,0xF3,0xF1,0x4A,0x6A
+};
+#else
 static const unsigned char avb_root_pub[1032] = {
 	0x0, 0x0, 0x10, 0x0, 0x55, 0xd9, 0x4, 0xad, 0xd8, 0x4,
 	0xaf, 0xe3, 0xd3, 0x84, 0x6c, 0x7e, 0xd, 0x89, 0x3d, 0xc2,
@@ -120,7 +162,7 @@ static const unsigned char avb_root_pub[1032] = {
 	0xe1, 0x74, 0xa1, 0xa3, 0x99, 0xa0, 0x85, 0x9e, 0xf1, 0xac,
 	0xd8, 0x7e,
 };
-
+#endif
 /**
  * ============================================================================
  * Boot states support (GREEN, YELLOW, ORANGE, RED) and dm_verity
@@ -590,6 +632,19 @@ static AvbIOResult validate_vbmeta_public_key(AvbOps *ops,
 					      public_key_metadata_length,
 					      bool *out_key_is_trusted)
 {
+#if defined (CONFIG_AVB_USE_OEM_KEY)
+	if (!public_key_length || !public_key_data || !out_key_is_trusted)
+		return AVB_IO_RESULT_ERROR_IO;
+
+	*out_key_is_trusted = false;
+	if (public_key_length != sizeof(avb_root_oem_pub))
+		return AVB_IO_RESULT_ERROR_IO;
+
+	if (memcmp(avb_root_oem_pub, public_key_data, public_key_length) == 0)
+		*out_key_is_trusted = true;
+	
+	return AVB_IO_RESULT_OK;
+#else
 	if (!public_key_length || !public_key_data || !out_key_is_trusted)
 		return AVB_IO_RESULT_ERROR_IO;
 
@@ -601,6 +656,7 @@ static AvbIOResult validate_vbmeta_public_key(AvbOps *ops,
 		*out_key_is_trusted = true;
 
 	return AVB_IO_RESULT_OK;
+#endif
 }
 
 #ifdef CONFIG_OPTEE_TA_AVB
@@ -681,8 +737,15 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
 				       size_t rollback_index_slot,
 				       u64 *out_rollback_index)
 {
+#ifdef CONFIG_AVB_ROLLBACK_ENABLE
+    if (sec_read_rollback_index(rollback_index_slot, out_rollback_index) != 0) {
+        return AVB_IO_RESULT_ERROR_IO;
+    }
+
+	return AVB_IO_RESULT_OK;
+#else
 #ifndef CONFIG_OPTEE_TA_AVB
-	/* For now we always return 0 as the stored rollback index. */
+    /* For now we always return 0 as the stored rollback index. */
 	printf("%s not supported yet\n", __func__);
 
 	if (out_rollback_index)
@@ -708,8 +771,10 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
 
 	*out_rollback_index = (u64)param[1].u.value.a << 32 |
 			      (u32)param[1].u.value.b;
+
 	return AVB_IO_RESULT_OK;
 #endif
+#endif
 }
 
 /**
@@ -727,6 +792,13 @@ static AvbIOResult write_rollback_index(AvbOps *ops,
 					size_t rollback_index_slot,
 					u64 rollback_index)
 {
+#ifdef CONFIG_AVB_ROLLBACK_ENABLE
+    if (sec_write_rollback_index(rollback_index_slot, rollback_index) != 0) {
+        return AVB_IO_RESULT_ERROR_IO;
+    }
+    
+	return AVB_IO_RESULT_OK;
+#else
 #ifndef CONFIG_OPTEE_TA_AVB
 	/* For now this is a no-op. */
 	printf("%s not supported yet\n", __func__);
@@ -748,6 +820,7 @@ static AvbIOResult write_rollback_index(AvbOps *ops,
 	return invoke_func(ops->user_data, TA_AVB_CMD_WRITE_ROLLBACK_INDEX,
 			   ARRAY_SIZE(param), param);
 #endif
+#endif
 }
 
 /**

common/splash.c

@@ -71,7 +71,7 @@ static int splash_video_logo_load(void)
 		return -EFAULT;
 	}
 
-	memcpy((void *)bmp_load_addr, bmp_logo_bitmap,
+	memcpy((void *)(u64)bmp_load_addr, bmp_logo_bitmap,
 	       ARRAY_SIZE(bmp_logo_bitmap));
 
 	return 0;

configs/light_a_val_android_defconfig

@@ -0,0 +1,116 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_DDR_LP4X_3733_SINGLERANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-a-val"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A=y
+# CONFIG_LIGHT_SEC_UPGRADE=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_SPL_TEXT_BASE=0xffe0000800
+CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_A=y
+# CONFIG_AVB_USE_OEM_KEY is not set
+# CONFIG_AVB_ROLLBACK_ENABLE is not set
+# CONFIG_AVB_HW_ENGINE_ENABLE is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_LIBAVB=y
+CONFIG_AVB_VERIFY=y
+CONFIG_CMD_AVB=y
+CONFIG_CMD_BOOTANDROID=y
+CONFIG_ANDROID_AB=y
+CONFIG_CMD_AB_SELECT=y
+CONFIG_XBC=y

configs/light_a_val_defconfig

@@ -83,7 +83,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x1234
 CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 # CONFIG_EFI_LOADER is not set
-# CONFIG_LIGHT_SEC_BOOT is not set
+# CONFIG_LIGHT_BOOT_FORCE_SEQ is not set
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_VIDEO=y

configs/light_a_val_sec_defconfig

@@ -82,6 +82,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
 # CONFIG_EFI_LOADER is not set
 CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A=y
 CONFIG_LIGHT_SEC_UPGRADE=y
+# CONFIG_LIGHT_BOOT_FORCE_SEQ is not set
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_VIDEO=y

configs/light_ant_ref_defconfig

@@ -82,7 +82,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x1234
 CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 # CONFIG_EFI_LOADER is not set
-# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF=y
+CONFIG_LIGHT_SEC_UPGRADE=y
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_VIDEO=y

configs/light_b_product_android_defconfig

@@ -0,0 +1,120 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_VAL_B=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_DDR_LP4X_3200_SINGLERANK=y
+CONFIG_DDR_H32_MODE=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_TIME=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-b-product"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A=y
+# CONFIG_LIGHT_SEC_UPGRADE=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_SYS_TEXT_BASE=0x7b000000
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_SPL_TEXT_BASE=0xffe0000800
+CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_B=y
+# CONFIG_AVB_USE_OEM_KEY is not set
+# CONFIG_AVB_ROLLBACK_ENABLE is not set
+# CONFIG_AVB_HW_ENGINE_ENABLE is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_LIBAVB=y
+CONFIG_AVB_VERIFY=y
+CONFIG_CMD_AVB=y
+CONFIG_CMD_BOOTANDROID=y
+CONFIG_ANDROID_AB=y
+CONFIG_CMD_AB_SELECT=y
+CONFIG_XBC=y

configs/light_beagle_android_defconfig

@@ -0,0 +1,111 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_BEAGLE=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_DDR_LP4X_3733_SINGLERANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-a-val"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_LIBAVB=y
+CONFIG_AVB_VERIFY=y
+CONFIG_CMD_AVB=y
+CONFIG_CMD_BOOTANDROID=y
+CONFIG_ANDROID_AB=y
+CONFIG_CMD_AB_SELECT=y
+CONFIG_XBC=y

configs/light_lpi4a_android_defconfig

@@ -0,0 +1,116 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_SPL_TEXT_BASE=0xffe0000800
+CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_B=y
+# CONFIG_AVB_USE_OEM_KEY is not set
+# CONFIG_AVB_ROLLBACK_ENABLE is not set
+# CONFIG_AVB_HW_ENGINE_ENABLE is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_LIBAVB=y
+CONFIG_AVB_VERIFY=y
+CONFIG_CMD_AVB=y
+CONFIG_CMD_BOOTANDROID=y
+CONFIG_ANDROID_AB=y
+CONFIG_CMD_AB_SELECT=y
+CONFIG_XBC=y

configs/light_lpi4a_defconfig

@@ -0,0 +1,107 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000

configs/light_lpi4a_sec_defconfig

@@ -0,0 +1,108 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A=y
+CONFIG_LIGHT_SEC_UPGRADE=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000

configs/light_lpi4a_singlerank_defconfig

@@ -0,0 +1,106 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_DDR_LP4X_3733_SINGLERANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000

drivers/fastboot/Kconfig

@@ -2,7 +2,7 @@ menu "Fastboot support"
 
 config FASTBOOT
 	bool
-	imply ANDROID_BOOT_IMAGE
+	# imply ANDROID_BOOT_IMAGE
 	imply CMD_FASTBOOT
 
 config USB_FUNCTION_FASTBOOT

drivers/fastboot/fb_command.c

@@ -14,6 +14,7 @@
 #include <stdlib.h>
 
 #define BLOCK_SIZE 512
+#define BOARD_ID_OFFSET 0x26
 
 /**
  * image_size - final fastboot image size
@@ -42,6 +43,7 @@ static void reboot_bootloader(char *, char *);
 static void oem_format(char *, char *);
 #endif
 static void oem_command(char *, char *);
+int image_have_head(unsigned long img_src_addr);
 
 static const struct {
 	const char *command;
@@ -263,6 +265,41 @@ void fastboot_data_complete(char *response)
 	fastboot_bytes_received = 0;
 }
 
+/**
+ * check_image_board_id() - check if board id in image matched with board id in env 
+ *
+ * @image_data: Image data
+ *
+ * 0 if success otherwise failed
+ */
+int check_image_board_id(uint8_t *image_data)
+{
+	char *env_board_id = NULL;
+    char board_id[3] = {0};
+
+	env_board_id = env_get("board#");
+
+	/*if current board id is null or image has no header,skip check*/
+	if (env_board_id == NULL || env_board_id[0] == 0 || image_have_head((unsigned long)image_data) == 0) {
+		return 0;
+	}
+
+	memcpy(board_id, image_data + BOARD_ID_OFFSET,sizeof(uint16_t));
+
+    /*if image board id is null,skip check*/
+    if (*(uint16_t*)board_id == 0) {
+        return 0;
+	}
+
+    /*check if current board id match with board id in image*/
+	if (strncmp(env_board_id, board_id, sizeof(board_id)) != 0) {
+	    printf("U-BOOT image download via fastboot is interrupted due to the U-BOOT for board %s does not work in the board %s\r\n",board_id,env_board_id);
+		return -1;
+	}
+
+	return 0;
+}
+
 #if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
 /**
  * flash() - write the downloaded image to the indicated partition.
@@ -279,8 +316,15 @@ static void flash(char *cmd_parameter, char *response)
 	char cmdbuf[32];
 	u32 block_cnt;
 	struct blk_desc *dev_desc;
+    int ret = 0;
 
 	if (strcmp(cmd_parameter, "uboot") == 0) {
+        ret = check_image_board_id(fastboot_buf_addr);
+		if (ret != 0) {
+            fastboot_fail("U-BOOT image does not match the type of BOARD", response);
+			return;
+		}
+
 		dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 		if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 			fastboot_fail("invalid mmc device", response);
@@ -298,7 +342,6 @@ static void flash(char *cmd_parameter, char *response)
 
 		run_command(cmdbuf, 0);
 		run_command("mmc partconf 0 1 0 0", 0);
-
 	} else if ((strcmp(cmd_parameter, "fw") == 0)) {
 		memcpy((void *)LIGHT_FW_ADDR, fastboot_buf_addr, image_size);
 	} else if ((strcmp(cmd_parameter, "uImage") == 0)) {

drivers/fastboot/fb_common.c

@@ -118,7 +118,11 @@ void fastboot_boot(void)
 #ifdef THEAD_LIGHT_FASTBOOT
 	char cmdbuf[32];
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	sprintf(cmdbuf, "run bootcmd");
+#else
 	sprintf(cmdbuf, "bootslave; run set_bootargs; booti %s - %s", LIGHT_KERNEL_ADDR_CMD, LIGHT_DTB_ADDR_CMD);
+#endif
 	printf("fastboot bootcmd %s\n", cmdbuf);
 	run_command(cmdbuf, 0);
 

drivers/fastboot/fb_getvar.c

@@ -13,6 +13,7 @@
 #include <version.h>
 
 static void getvar_version(char *var_parameter, char *response);
+static void getvar_dynamic_partition(char *var_parameter, char *response);
 static void getvar_version_bootloader(char *var_parameter, char *response);
 static void getvar_downloadsize(char *var_parameter, char *response);
 static void getvar_serialno(char *var_parameter, char *response);
@@ -41,6 +42,9 @@ static const struct {
 	}, {
 		.variable = "version-bootloader",
 		.dispatch = getvar_version_bootloader
+	}, {
+		.variable = "dynamic-partition",
+		.dispatch = getvar_dynamic_partition
 	}, {
 		.variable = "downloadsize",
 		.dispatch = getvar_downloadsize
@@ -134,6 +138,17 @@ static void getvar_version_bootloader(char *var_parameter, char *response)
 	fastboot_okay(U_BOOT_VERSION, response);
 }
 
+static void getvar_dynamic_partition(char *var_parameter, char *response)
+{
+	char *part_name="super";
+
+	int r = getvar_get_part_info(part_name, response, NULL);
+	if (r >= 0)
+		fastboot_okay("true", response); /* part exists */
+	else
+		fastboot_okay("false", response);
+}
+
 static void getvar_downloadsize(char *var_parameter, char *response)
 {
 	fastboot_response("OKAY", response, "0x%08x", fastboot_buf_size);
@@ -247,7 +262,11 @@ static void getvar_partition_size(char *part_name, char *response)
 
 static void getvar_is_userspace(char *var_parameter, char *response)
 {
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	fastboot_okay("yes", response);
+#else
 	fastboot_okay("no", response);
+#endif
 }
 
 /**

drivers/mmc/sdhci.c

@@ -136,9 +136,9 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,
 	unsigned char ctrl;
 
 	if (data->flags == MMC_DATA_READ)
-		host->start_addr = (dma_addr_t)data->dest;
+		host->start_addr = (dma_addr_t)(u64)data->dest;
 	else
-		host->start_addr = (dma_addr_t)data->src;
+		host->start_addr = (dma_addr_t)(u64)data->src;
 
 	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 	ctrl &= ~SDHCI_CTRL_DMA_MASK;

drivers/mmc/snps_sdhci.c

@@ -13,6 +13,7 @@
 #define HS400_DELAY_LANE	24
 
 volatile int DELAY_LANE = 50;
+volatile int manual_set_delay = 0;  //flag for cmd manual setted DELAY_LANE,non-zero is setted. auto clear in cmd
 
 static void sdhci_phy_1_8v_init_no_pull(struct sdhci_host *host)
 {
@@ -154,10 +155,14 @@ void snps_set_uhs_timing(struct sdhci_host *host)
 {
 	struct mmc *mmc = (struct mmc *)host->mmc;
 	u32 reg;
-
+	int restore_delay;
 	reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
 	reg &= ~SDHCI_CTRL_UHS_MASK;
-
+    
+	if(manual_set_delay){
+		DELAY_LANE = DELAY_LANE & 0x7f; /*limit bit[0:6]*/
+		printf("%s: manual set delay (%d) active \n",host->name,DELAY_LANE);
+	}
 	switch (mmc->selected_mode) {
 	case UHS_SDR50:
 	case MMC_HS_52:
@@ -175,9 +180,13 @@ void snps_set_uhs_timing(struct sdhci_host *host)
 		reg |= SDHCI_CTRL_UHS_SDR104;
 		break;
 	case MMC_HS_400:
-		DELAY_LANE = HS400_DELAY_LANE;
+		restore_delay = DELAY_LANE;
+		if(!manual_set_delay){  /*default not set manual in cmd,when set in cmd,use DELAY_LANE set in cmd*/
+			 DELAY_LANE = HS400_DELAY_LANE;
+		}
 		sdhci_phy_1_8v_init(host);
 		reg |= SNPS_SDHCI_CTRL_HS400;
+		DELAY_LANE = restore_delay; /*restore for other modes*/
 		break;
 	default:
 		sdhci_phy_3_3v_init(host);
@@ -345,7 +354,10 @@ static int snps_sdhci_probe(struct udevice *dev)
 		ret = max_clk;
 		goto err;
 	}
-
+	//get Maximum Base Clock frequency from dts clock-frequency
+	if(0 == dev_read_u32(dev, "clock-frequency", &max_clk)){
+		host->max_clk = max_clk;
+	}
 	host->mmc = &plat->mmc;
 	host->mmc->dev = dev;
 	host->mmc->priv = host;

drivers/net/designware.c

@@ -508,7 +508,7 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
 {
 	struct phy_device *phydev;
 	int phy_addr = -1, ret;
-
+	
 #ifdef CONFIG_PHY_ADDR
 	phy_addr = CONFIG_PHY_ADDR;
 #endif
@@ -801,13 +801,16 @@ int designware_eth_probe(struct udevice *dev)
 		err = ret;
 		goto mdio_err;
 	}
-
+#ifdef GMAC_USE_FIRST_MII_BUS
 	if (!g_mii_bus) {
 		priv->bus = miiphy_get_dev_by_name(dev->name);
 		g_mii_bus = priv->bus;
 	} else {
 		priv->bus = g_mii_bus;
 	}
+#else
+	priv->bus = miiphy_get_dev_by_name(dev->name);
+#endif
 	ret = dw_phy_init(priv, dev);
 	debug("%s, ret=%d\n", __func__, ret);
 	if (!ret)
@@ -815,8 +818,18 @@ int designware_eth_probe(struct udevice *dev)
 
 	/* continue here for cleanup if no PHY found */
 	err = ret;
+#ifdef GMAC_USE_FIRST_MII_BUS
+	struct mii_dev *t_mii = NULL;
+	t_mii = miiphy_get_dev_by_name(dev->name);
+	if((g_mii_bus != t_mii) && (t_mii != NULL) ){
+		printf("free mdio bus %s\n",t_mii->name);
+		mdio_unregister(t_mii);
+		mdio_free(t_mii);
+	}
+#else
 	mdio_unregister(priv->bus);
 	mdio_free(priv->bus);
+#endif
 mdio_err:
 
 #ifdef CONFIG_CLK

drivers/usb/dwc3/ep0.c

@@ -905,7 +905,10 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
 	dep->flags &= ~DWC3_EP_BUSY;
 	dep->resource_index = 0;
 	dwc->setup_packet_pending = false;
-	invalid_dcache_range(dwc->ctrl_req, (dmaaddr_t)dwc->ctrl_req + ROUND(sizeof(*dwc->ctrl_req), CACHELINE_SIZE));
+#ifdef CONFIG_TARGET_LIGHT_C910
+	extern void invalid_dcache_range(unsigned long start, unsigned long end);
+	invalid_dcache_range((unsigned long)dwc->ctrl_req, (dmaaddr_t)dwc->ctrl_req + ROUND(sizeof(*dwc->ctrl_req), CACHELINE_SIZE));
+#endif
 
 	switch (dwc->ep0state) {
 	case EP0_SETUP_PHASE:

drivers/video/Kconfig

@@ -351,6 +351,11 @@ config VIDEO_LCD_ILITEK_ILI9881C
 	Say Y here if you want to enable support for ILITEK ILI9881C
 	800x1280 DSI video mode panel.
 
+config VIDEO_LCD_CUSTOM_LOGO
+	bool "LCD CUSTOM logo support"
+	help
+	Say Y here if you want to enable support for custom logo.
+
 config VIDEO_LCD_SSD2828
 	bool "SSD2828 bridge chip"
 	default n

include/asm/arch

@@ -0,0 +1 @@
+/home/cxx194832/ssd/u-boot/arch/riscv/include/asm/arch-c9xx

include/configs/light-c910.h

@@ -22,7 +22,11 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR     (CONFIG_SYS_TEXT_BASE + SZ_1M)
 #define CONFIG_SYS_LOAD_ADDR        (CONFIG_SYS_TEXT_BASE + SZ_1M)
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+#define CONFIG_SYS_MALLOC_LEN       (64*SZ_1M)
+#else
 #define CONFIG_SYS_MALLOC_LEN       SZ_1M
+#endif
 #define CONFIG_SYS_BOOTM_LEN        SZ_64M
 #define CONFIG_SYS_CACHELINE_SIZE   64
 
@@ -35,6 +39,7 @@
 #define CONFIG_RGMII            1
 #define CONFIG_PHY_MARVELL      1
 #define CONFIG_NET_RETRY_COUNT  20
+#define GMAC_USE_FIRST_MII_BUS
 
 #define CONFIG_SYS_FLASH_BASE       0x0
 #define CONFIG_SYS_MAX_FLASH_BANKS  1
@@ -57,14 +62,14 @@
 #define THEAD_LIGHT_FASTBOOT	1
 #define LIGHT_FW_ADDR		0x0
 #define LIGHT_KERNEL_ADDR	0x200000
-#define LIGHT_DTB_ADDR		0x1f00000
+#define LIGHT_DTB_ADDR		0x3800000
 #define LIGHT_ROOTFS_ADDR	0x2000000
 #define LIGHT_AON_FW_ADDR	0xffffef8000
 #define LIGHT_TEE_FW_ADDR	0x1c000000
 #define LIGHT_TF_FW_ADDR	LIGHT_FW_ADDR
 #define LIGHT_TF_FW_TMP_ADDR	0x100000
 #define LIGHT_KERNEL_ADDR_CMD	"0x200000"
-#define LIGHT_DTB_ADDR_CMD	"0x1f00000"
+#define LIGHT_DTB_ADDR_CMD	"0x3800000"
 
 
 /* trust image name string */
@@ -91,6 +96,14 @@
 #define TEE_SEC_UPGRADE_FLAG 0x5a5aa5a5
 #define UBOOT_SEC_UPGRADE_FLAG	0xa5a5aa55
 
+/* Define secure debug log level */
+#define LOG_LEVEL	1
+#if defined (LOG_LEVEL)
+#define SECLOG_PRINT	printf
+#else
+#define SECLOG_PRINT
+#endif
+
 #define UBOOT_MAX_VER		64
 #define CONFIG_SYS_CBSIZE 	512
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
@@ -100,95 +113,214 @@
 /* List of different env in debug/release version  */
 #if defined (U_BUILD_DEBUG)
 #define ENV_KERNEL_LOGLEVEL "kernel_loglevel=7\0"
-#define ENV_STR_BOOT_DELAY  
+#define ENV_STR_BOOT_DELAY
+#define CONFIG_ENV_OVERWRITE
 #else
 #define ENV_KERNEL_LOGLEVEL "kernel_loglevel=4\0"
 #define ENV_STR_BOOT_DELAY	"bootdelay=0\0"
 #endif
 
+/* Define board ID in ENV for firmware download protection */
+#if defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_A) || \
+    defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || \
+    defined(CONFIG_TARGET_LIGHT_FM_C910_VAL_A)
+#define ENV_STR_BOARD "board#=LA\0"
+#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_B) || \
+      defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || \
+      defined(CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
+#define ENV_STR_BOARD "board#=LB\0"
+#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_LPI4A) || \
+      defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A) || \
+      defined(CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#define ENV_STR_BOARD "board#=LP\0"
+#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_BEAGLE) || \
+      defined(CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
+#define ENV_STR_BOARD "board#=LG\0"
+#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_ANT_REF) || \
+      defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || \
+      defined(CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF)
+#define ENV_STR_BOARD "board#=LD\0"
+#endif
+
+
 #if defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A)
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	"splashimage=0x30000000\0" \
+	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
+    ENV_STR_BOARD \
 	"tf_addr=0x100000\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
+	"str_ram_addr=0xffe0000000\0" \
 	"fwaddr=0x10000000\0"\
 	"tee_addr=0x1c000000\0" \
 	"sec_upgrade_mode=0\0"\
 	"mmcdev=0\0" \
-	"mmcpart=6\0" \
-	"kdump_buf=1M\0" \
+	"mmcpart=7\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"uboot_version=0x0000000000000000\0"\
+	"tee_version=0x00000000\0"\
+	"tf_version=0x00000000\0"\
 	"fdt_file=light-a-val-sec.dtb\0" \
 	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfs};name=data,size=-,type=linux\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=sbmeta,size=8MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
-	"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
+	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
+	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
+	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
+	"bootcmd_load=run load_aon;run load_c906_audio;run load_str;ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; sbmetaboot; booti $kernel_addr - $dtb_addr;\0" \
         "\0"
 
 #elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B)
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	"splashimage=0x30000000\0" \
+	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
+    ENV_STR_BOARD \
 	"tf_addr=0x100000\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
+	"str_ram_addr=0xffe0000000\0" \
 	"fwaddr=0x10000000\0"\
 	"tee_addr=0x1c000000\0" \
 	"sec_upgrade_mode=0\0"\
 	"mmcdev=0\0" \
-	"mmcpart=6\0" \
-	"kdump_buf=1M\0" \
+	"mmcpart=7\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"uboot_version=0x0000000000000000\0"\
+	"tee_version=0x00000000\0"\
+	"tf_version=0x00000000\0"\
 	"fdt_file=light-b-product-sec.dtb\0" \
 	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfs};name=data,size=-,type=linux\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=sbmeta,size=8MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
-	"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
+	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
+	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
+	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
+	"bootcmd_load=run load_aon;run load_c906_audio;run load_str; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; sbmetaboot; booti $kernel_addr - $dtb_addr;\0" \
         "\0"
 
 #elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF)
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	"splashimage=0x30000000\0" \
+	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
+    ENV_STR_BOARD \
 	"tf_addr=0x100000\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
+	"str_ram_addr=0xffe0000000\0" \
 	"fwaddr=0x10000000\0"\
 	"tee_addr=0x1c000000\0" \
 	"sec_upgrade_mode=0\0"\
 	"mmcdev=0\0" \
 	"mmcpart=6\0" \
-	"kdump_buf=1M\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"uboot_version=0x0000000000000000\0"\
+	"tee_version=0x00000000\0"\
+	"tf_version=0x00000000\0"\
 	"fdt_file=light-ant-ref-sec.dtb\0" \
 	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfs};name=data,size=-,type=linux\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
+	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
+	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
+	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
+	"bootcmd_load=run load_aon;run load_c906_audio;run load_str; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
+        "\0"
+
+#elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"splashimage=0x30000000\0" \
+	"splashpos=m,m\0" \
+	"fdt_high=0xffffffffffffffff\0" \
+    ENV_STR_BOARD \
+	"tf_addr=0x100000\0" \
+	"dtb_addr=0x03800000\0" \
+	"kernel_addr=0x00200000\0" \
+	"aon_ram_addr=0xffffef8000\0" \
+	"audio_ram_addr=0x32000000\0" \
+	"str_ram_addr=0xffe0000000\0" \
+	"fwaddr=0x10000000\0"\
+	"tee_addr=0x1c000000\0" \
+	"sec_upgrade_mode=0\0"\
+	"mmcdev=0\0" \
+	"mmcpart=7\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
+	"uboot_version=0x0000000000000000\0"\
+	"tee_version=0x00000000\0"\
+	"tf_version=0x00000000\0"\
+	"fdt_file=light-lpi4a-sec.dtb\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=sbmeta,size=8MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
+	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
+	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
+	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
+	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
+	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
+	"bootcmd_load=run load_aon;run load_c906_audio;run load_str; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; sbmetaboot; booti $kernel_addr - $dtb_addr;\0" \
+        "\0"
+
+#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_A) || defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_B)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"splashimage=0x30000000\0" \
+	"splashpos=m,m\0" \
+	"fdt_high=0xffffffffffffffff\0" \
+	"serial#=1234567890\0" \
+	"tf_addr=0x100000\0" \
+	"tee_addr=0x1c000000\0" \
+	"opensbi_addr=0x0\0" \
+	"dtb_addr=0x01f00000\0" \
+	"kernel_addr=0x00200000\0" \
+	"ramdisk_addr=0x02000000\0" \
+	"aon_ram_addr=0xffffef8000\0" \
+	"audio_ram_addr=0x32000000\0" \
+	"fwaddr=0x10000000\0"\
+	"boot_ab=_a\0"\
+	"mmcdev=0\0" \
+	"mmcpart=3\0" \
+	"fdt_file=light-val.dtb\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=sparse,size=2031kb;name=bootpart,size=8MiB;name=boot_a,size=32MiB;name=boot_b,size=32MiB;name=vendor_boot_a,size=32MiB;name=vendor_boot_b,size=32MiB;name=tee_a,size=32MiB;name=tee_b,size=32MiB;name=dtbo_a,size=8MiB;name=dtbo_b,size=8MiB;name=super,size=4096MiB;name=vbmeta_a,size=1MiB;name=vbmeta_b,size=1MiB;name=vbmeta_system_a,size=1MiB;name=vbmeta_system_b,size=1MiB;name=recovery,size=16MiB;name=misc,size=2MiB;name=metadata,size=16MiB;name=userdata,size=-\0" \
+	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
+	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 earlycon clk_ignore_unused loop.max_part=7 loglevel=7 init=/init bootconfig video=HDMI-A-1:800x600-32@60 firmware_class.path=/vendor/firmware\0" \
 	"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
-        "\0"
+	"sec_m_load=ext4load mmc 0:2 $opensbi_addr fw_dynamic.bin\0"\
+	"bootcmd_load=run load_aon;run load_c906_audio;secimg_load;run sec_m_load;bootandroid\0" \
+	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; bootm $kernel_addr $ramdisk_addr:$ramdisk_size $dtb_addr;\0" \
+         "\0"
 
 #else
 #if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_A)
@@ -197,25 +329,28 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
+    ENV_STR_BOARD \
 	"mmcdev=0\0" \
 	"mmcpart=3\0" \
-	"kdump_buf=1M\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"fdt_file=light-a-product.dtb\0" \
 	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfs};name=data,size=-,type=linux\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
 	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:2 $opensbi_addr fw_dynamic.bin; ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
 	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
         "\0"
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -223,30 +358,27 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
 	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=1M\0" \
+	"kdump_buf=180M\0" \
 	ENV_STR_BOOT_DELAY \
-	"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
-	"fdt_file=light-b-product.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"fdt_file=light-b-audio-hdmi.dtb\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file};ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image;\0" \
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file};ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image;\0" \
 	"bootcmd=run bootcmd_load; bootslave ; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
         "\0"
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -254,25 +386,26 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
-	"findpart=if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"fdt_file=light-b-ref.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file};ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image;\0" \
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file};ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image;\0" \
 	"bootcmd=run bootcmd_load; bootslave ; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
         "\0"
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER)
@@ -281,28 +414,27 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
-	"kdump_buf=1M\0" \
-	"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"fdt_file=light-b-power.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
 	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
         "\0"
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF)
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -310,28 +442,27 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
-	"kdump_buf=1M\0" \
-	"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"fdt_file=light-ant-ref.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
 	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
         "\0"
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE)
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -339,28 +470,27 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
-	"kdump_buf=1M\0" \
-	"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"fdt_file=light-ant-discrete.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
 	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
         "\0"
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -368,28 +498,55 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
-	"kdump_buf=500M\0" \
-	"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"fdt_file=light-beagle.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
+        "\0"
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"splashimage=0x30000000\0" \
+	"splashpos=m,m\0" \
+	"fdt_high=0xffffffffffffffff\0" \
+	"opensbi_addr=0x0\0" \
+	"dtb_addr=0x03800000\0" \
+	"kernel_addr=0x00200000\0" \
+	"aon_ram_addr=0xffffef8000\0" \
+	"audio_ram_addr=0x32000000\0" \
+	"fwaddr=0x10000000\0"\
+	"mmcdev=0\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
+	"fdt_file=light-lpi4a-hdmi.dtb\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
+	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
+	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
+	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
+	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
 	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
         "\0"
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF)
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -397,25 +554,26 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
-	"findpart=if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
 	"fdt_file=light-a-ref.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
 	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
         "\0"
 #else
@@ -424,28 +582,29 @@
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
 	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x01f00000\0" \
+	"dtb_addr=0x03800000\0" \
 	"kernel_addr=0x00200000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0xffc0000000\0" \
+	"audio_ram_addr=0x32000000\0" \
+	"str_ram_addr=0xffe0000000\0" \
 	"fwaddr=0x10000000\0"\
 	"mmcdev=0\0" \
-	"boot_partition=bootA\0" \
-	"root_partition=rootfsA\0" \
-	"kdump_buf=500M\0" \
-	"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
-	"fdt_file=light-a-val.dtb\0" \
-	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
-	"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
+	"mmcpart=3\0" \
+	"mmcbootpart=2\0" \
+	ENV_KERNEL_LOGLEVEL \
+	"kdump_buf=180M\0" \
+	ENV_STR_BOOT_DELAY \
+	"fdt_file=light-a-val-audio-hdmi.dtb\0" \
+	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
 	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
 	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
+	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
 	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
 	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
+	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
+	"bootcmd_load=run load_aon;run load_c906_audio; run load_str;ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
 	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-	"factory_reset=yes\0"\
         "\0"
 #endif
 #endif

include/env_flags.h

@@ -70,11 +70,18 @@ enum env_flags_varaccess {
 #define SERIAL_FLAGS ""
 #endif
 
+#ifndef CONFIG_ENV_OVERWRITE
+#define BOARD_FLAGS "board#:so,"
+#else
+#define BOARD_FLAGS ""
+#endif
+
 #define ENV_FLAGS_LIST_STATIC \
 	ETHADDR_FLAGS \
 	NET_FLAGS \
 	SERIAL_FLAGS \
-	CONFIG_ENV_FLAGS_LIST_STATIC
+	CONFIG_ENV_FLAGS_LIST_STATIC \
+    BOARD_FLAGS
 
 #ifdef CONFIG_CMD_ENV_FLAGS
 /*

include/xbc.h

@@ -0,0 +1 @@
+#include <../lib/libxbc/libxbc.h>

lib/Kconfig

@@ -316,6 +316,20 @@ config LIBAVB
 
 endmenu
 
+menu "Boot Configuration"
+
+config XBC
+	bool "Boot Configuration support"
+	depends on ANDROID_BOOT_IMAGE
+	default n
+	help
+	  This enables support of Boot Configuration which can be used
+	  to pass boot configuration parameters to user space. These
+	  parameters will show up in /proc/bootconfig similar to the kernel
+	  parameters that show up in /proc/cmdline
+
+endmenu
+
 menu "Hashing Support"
 
 config SHA1

lib/Makefile

@@ -68,6 +68,8 @@ obj-$(CONFIG_$(SPL_)LZ4) += lz4_wrapper.o
 
 obj-$(CONFIG_LIBAVB) += libavb/
 
+obj-$(CONFIG_XBC) += libxbc/
+
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/
 ifneq ($(CONFIG_$(SPL_TPL_)BUILD)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
 obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += fdtdec_common.o

lib/image-sparse.c

@@ -52,10 +52,10 @@ int write_sparse_image(struct sparse_storage *info,
 	lbaint_t blk;
 	lbaint_t blkcnt;
 	lbaint_t blks;
-	uint32_t bytes_written = 0;
+	uint64_t bytes_written = 0;
 	unsigned int chunk;
 	unsigned int offset;
-	unsigned int chunk_data_sz;
+	uint64_t chunk_data_sz;
 	uint32_t *fill_buf = NULL;
 	uint32_t fill_val;
 	sparse_header_t *sparse_header;
@@ -129,8 +129,8 @@ int write_sparse_image(struct sparse_storage *info,
 				 sizeof(chunk_header_t));
 		}
 
-		chunk_data_sz = sparse_header->blk_sz * chunk_header->chunk_sz;
-		blkcnt = chunk_data_sz / info->blksz;
+		chunk_data_sz = ((u64)sparse_header->blk_sz) * chunk_header->chunk_sz;
+		blkcnt = DIV_ROUND_UP_ULL(chunk_data_sz, info->blksz);
 		switch (chunk_header->chunk_type) {
 		case CHUNK_TYPE_RAW:
 			if (chunk_header->total_sz !=
@@ -159,7 +159,7 @@ int write_sparse_image(struct sparse_storage *info,
 				return -1;
 			}
 			blk += blks;
-			bytes_written += blkcnt * info->blksz;
+			bytes_written += ((u64)blkcnt) * info->blksz;
 			total_blocks += chunk_header->chunk_sz;
 			data += chunk_data_sz;
 			break;
@@ -219,8 +219,9 @@ int write_sparse_image(struct sparse_storage *info,
 				blk += blks;
 				i += j;
 			}
-			bytes_written += blkcnt * info->blksz;
-			total_blocks += chunk_data_sz / sparse_header->blk_sz;
+			bytes_written += ((u64)blkcnt) * info->blksz;
+			total_blocks += DIV_ROUND_UP_ULL(chunk_data_sz,
+							 sparse_header->blk_sz);
 			free(fill_buf);
 			break;
 
@@ -250,7 +251,7 @@ int write_sparse_image(struct sparse_storage *info,
 
 	debug("Wrote %d blocks, expected to write %d blocks\n",
 	      total_blocks, sparse_header->total_blks);
-	printf("........ wrote %u bytes to '%s'\n", bytes_written, part_name);
+	printf("........ wrote %llu bytes to '%s'\n", bytes_written, part_name);
 
 	if (total_blocks != sparse_header->total_blks) {
 		info->mssg("sparse image write failure", response);

lib/libavb/avb_rsa.c

@@ -13,6 +13,10 @@
 #include "avb_util.h"
 #include "avb_vbmeta_image.h"
 
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+#include "sec_library.h"
+#endif
+
 typedef struct IAvbKey {
   unsigned int len; /* Length of n[] in number of uint32_t */
   uint32_t n0inv;   /* -1 / n[0] mod 2^32 */
@@ -82,7 +86,19 @@ fail:
 static void iavb_free_parsed_key(IAvbKey* key) {
   avb_free(key);
 }
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
 
+static void hw_crypto_accel_init(void)
+{
+	static bool init = false;
+
+	if (!init) {
+		rambus_crypto_init();
+		init = true;
+	}
+}
+
+#else
 /* a[] -= mod */
 static void subM(const IAvbKey* key, uint32_t* a) {
   int64_t A = 0;
@@ -200,7 +216,7 @@ out:
     avb_free(aaR);
   }
 }
-
+#endif
 /* Verify a RSA PKCS1.5 signature against an expected hash.
  * Returns false on failure, true on success.
  */
@@ -212,6 +228,83 @@ bool avb_rsa_verify(const uint8_t* key,
                     size_t hash_num_bytes,
                     const uint8_t* padding,
                     size_t padding_num_bytes) {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  IAvbKey* parsed_key = NULL;
+  uint8_t *nk = NULL;
+  uint8_t *n = NULL;
+  uint8_t *e = NULL;
+  int i;
+  bool success = false;
+  uint32_t key_bytes = 0;
+  sc_rsa_t  rsa;
+  sc_rsa_context_t rsa_ctx;
+
+  if (key == NULL || sig == NULL || hash == NULL || padding == NULL) {
+    avb_error("Invalid input.\n");
+    goto out;
+  }
+
+  parsed_key = iavb_parse_key_data(key, key_num_bytes);
+  if (parsed_key == NULL) {
+    avb_error("Error parsing key.\n");
+    goto out;
+  }
+  
+  if (padding_num_bytes != sig_num_bytes - hash_num_bytes) {
+    avb_error("Padding length does not match hash and signature lengths.\n");
+    goto out;
+  }
+
+  key_bytes = parsed_key->len * sizeof(uint32_t);
+  /* Currently, we only support RSA key 2048bits and SHA256 */
+  if ((key_bytes * 8 != 2048) || (hash_num_bytes * 8 != 256)) {
+    avb_error("Error unsupported keybits length.\n");
+    goto out;
+  }
+
+  nk = (uint8_t *)parsed_key->n;
+  n = avb_malloc(key_bytes);
+  if (n == NULL) {
+    avb_error("Error malloc n.\n");
+    goto out;
+  }
+  /* Reverse modular little endian */
+  for (i = 0; i < key_bytes; i++) {
+    n[i] = nk[key_bytes - i - 1];
+  }
+
+  e = avb_malloc(key_bytes);
+  if (e == NULL) {
+    avb_error("Error malloc e.\n");
+    goto out;
+  }
+  memset(e, 0, key_bytes);
+  /* public exponentiation. (65537} */
+  e[key_bytes-1] = 0x01; e[key_bytes-2] = 0x00; e[key_bytes-3] = 0x01; e[key_bytes-4] = 0x00;
+
+  hw_crypto_accel_init();
+  sc_rsa_init(&rsa, 0, SC_RSA_KEY_BITS_2048);
+
+  rsa_ctx.padding_type = SC_RSA_PADDING_MODE_PKCS1;
+  rsa_ctx.n = n;
+  rsa_ctx.e = e;
+  rsa_ctx.hash_type = SC_RSA_HASH_TYPE_SHA256;
+  rsa_ctx.is_crt = SC_RSA_CRT_DISABLE;
+  rsa_ctx.is_hash = SC_RSA_HASH_DISABLE;
+
+  success = sc_rsa_verify(&rsa, &rsa_ctx, (void *)hash, hash_num_bytes, (void *)sig, sig_num_bytes, SC_RSA_HASH_TYPE_SHA256);
+  sc_rsa_uninit(&rsa);
+
+out:
+  if (parsed_key != NULL) {
+    iavb_free_parsed_key(parsed_key);
+  }
+  if (e != NULL) {
+    avb_free(e);
+  }
+
+  return success;
+#else
   uint8_t* buf = NULL;
   IAvbKey* parsed_key = NULL;
   bool success = false;
@@ -272,4 +365,5 @@ out:
     avb_free(buf);
   }
   return success;
+#endif
 }

lib/libavb/avb_sha.h

@@ -20,6 +20,9 @@ extern "C" {
 
 #include "avb_crypto.h"
 #include "avb_sysdeps.h"
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+#include "sec_library.h"
+#endif
 
 /* Block size in bytes of a SHA-256 digest. */
 #define AVB_SHA256_BLOCK_SIZE 64
@@ -30,19 +33,29 @@ extern "C" {
 
 /* Data structure used for SHA-256. */
 typedef struct {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  sc_sha_t sha_t;
+  sc_sha_context_t sha_context;
+#else
   uint32_t h[8];
   uint64_t tot_len;
   size_t len;
   uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
+#endif
   uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
 } AvbSHA256Ctx;
 
 /* Data structure used for SHA-512. */
 typedef struct {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  sc_sha_t sha_t;
+  sc_sha_context_t sha_context;
+#else
   uint64_t h[8];
   uint64_t tot_len;
   size_t len;
   uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
+#endif
   uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
 } AvbSHA512Ctx;
 

lib/libavb/avb_sha256.c

@@ -10,6 +10,7 @@
 
 #include "avb_sha.h"
 
+#if !defined(CONFIG_AVB_HW_ENGINE_ENABLE)
 #define SHFR(x, n) (x >> n)
 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
@@ -83,9 +84,19 @@ static const uint32_t sha256_k[64] = {
     0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
     0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
     0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
+#endif
 
 /* SHA-256 implementation */
 void avb_sha256_init(AvbSHA256Ctx* ctx) {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  if (ctx == NULL) {
+    return;
+  }
+
+  sc_sha_init(&ctx->sha_t, 0);
+  sc_sha_start(&ctx->sha_t, &ctx->sha_context, SC_SHA_MODE_256);
+  sc_sha_trans_config(&ctx->sha_t, &ctx->sha_context, 1);
+#else
 #ifndef UNROLL_LOOPS
   int i;
   for (i = 0; i < 8; i++) {
@@ -104,8 +115,10 @@ void avb_sha256_init(AvbSHA256Ctx* ctx) {
 
   ctx->len = 0;
   ctx->tot_len = 0;
+#endif
 }
 
+#if !defined(CONFIG_AVB_HW_ENGINE_ENABLE)
 static void SHA256_transform(AvbSHA256Ctx* ctx,
                              const uint8_t* message,
                              size_t block_nb) {
@@ -304,8 +317,16 @@ static void SHA256_transform(AvbSHA256Ctx* ctx,
 #endif /* !UNROLL_LOOPS */
   }
 }
+#endif
 
 void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, size_t len) {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  if (ctx == NULL || data == NULL) {
+    return;
+  }
+
+  sc_sha_update(&ctx->sha_t, &ctx->sha_context, data, len);
+#else
   size_t block_nb;
   size_t new_len, rem_len, tmp_len;
   const uint8_t* shifted_data;
@@ -334,9 +355,25 @@ void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, size_t len) {
 
   ctx->len = rem_len;
   ctx->tot_len += (block_nb + 1) << 6;
+#endif
 }
 
 uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  uint32_t len = 0;
+  uint32_t ret = 0;
+  
+  if (ctx == NULL) {
+    return NULL;
+  }
+
+  ret = sc_sha_finish(&ctx->sha_t, &ctx->sha_context, ctx->buf, &len);
+  if (ret != 0) {
+    return NULL;
+  }
+
+  return ctx->buf;
+#else
   size_t block_nb;
   size_t pm_len;
   uint64_t len_b;
@@ -372,4 +409,5 @@ uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
 #endif /* !UNROLL_LOOPS */
 
   return ctx->buf;
+#endif
 }

lib/libavb/avb_sha512.c

@@ -10,6 +10,7 @@
 
 #include "avb_sha.h"
 
+#if !defined(CONFIG_AVB_HW_ENGINE_ENABLE)
 #define SHFR(x, n) (x >> n)
 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
@@ -101,10 +102,20 @@ static const uint64_t sha512_k[80] = {
     0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
     0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
     0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
+#endif
 
 /* SHA-512 implementation */
 
 void avb_sha512_init(AvbSHA512Ctx* ctx) {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  if (ctx == NULL) {
+    return;
+  }
+
+  sc_sha_init(&ctx->sha_t, 0);
+  sc_sha_start(&ctx->sha_t, &ctx->sha_context, SC_SHA_MODE_512);
+  sc_sha_trans_config(&ctx->sha_t, &ctx->sha_context, 1);
+#else
 #ifdef UNROLL_LOOPS_SHA512
   ctx->h[0] = sha512_h0[0];
   ctx->h[1] = sha512_h0[1];
@@ -123,8 +134,10 @@ void avb_sha512_init(AvbSHA512Ctx* ctx) {
 
   ctx->len = 0;
   ctx->tot_len = 0;
+#endif
 }
 
+#if !defined(CONFIG_AVB_HW_ENGINE_ENABLE)
 static void SHA512_transform(AvbSHA512Ctx* ctx,
                              const uint8_t* message,
                              size_t block_nb) {
@@ -290,8 +303,16 @@ static void SHA512_transform(AvbSHA512Ctx* ctx,
 #endif /* UNROLL_LOOPS_SHA512 */
   }
 }
+#endif
 
 void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, size_t len) {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  if (ctx == NULL || data == NULL) {
+    return;
+  }
+
+  sc_sha_update(&ctx->sha_t, &ctx->sha_context, data, len);
+#else
   size_t block_nb;
   size_t new_len, rem_len, tmp_len;
   const uint8_t* shifted_data;
@@ -320,9 +341,25 @@ void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, size_t len) {
 
   ctx->len = rem_len;
   ctx->tot_len += (block_nb + 1) << 7;
+#endif
 }
 
 uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
+#if defined(CONFIG_AVB_HW_ENGINE_ENABLE)
+  uint32_t len = 0;
+  uint32_t ret = 0;
+  
+  if (ctx == NULL) {
+    return NULL;
+  }
+
+  ret = sc_sha_finish(&ctx->sha_t, &ctx->sha_context, ctx->buf, &len);
+  if (ret != 0) {
+    return NULL;
+  }
+
+  return ctx->buf;
+#else
   size_t block_nb;
   size_t pm_len;
   uint64_t len_b;
@@ -358,4 +395,5 @@ uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
 #endif /* UNROLL_LOOPS_SHA512 */
 
   return ctx->buf;
+#endif
 }

lib/libxbc/COPYING

@@ -0,0 +1,170 @@
+
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+   1. Definitions.
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+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+   See the License for the specific language governing permissions and
+   limitations under the License.

lib/libxbc/Makefile

@@ -0,0 +1,14 @@
+ # Copyright (C) 2021 The Android Open Source Project
+ #
+ # Licensed under the Apache License, Version 2.0 (the "License");
+ # you may not use this file except in compliance with the License.
+ # You may obtain a copy of the License at
+ #
+ #      http://www.apache.org/licenses/LICENSE-2.0
+ #
+ # Unless required by applicable law or agreed to in writing, software
+ # distributed under the License is distributed on an "AS IS" BASIS,
+ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ # See the License for the specific language governing permissions and
+ # limitations under the License.
+obj-$(CONFIG_XBC) += libxbc.o

lib/libxbc/libxbc.c

@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "libxbc.h"
+#define BOOTCONFIG_MAGIC "#BOOTCONFIG\n"
+#define BOOTCONFIG_MAGIC_SIZE 12
+#define BOOTCONFIG_SIZE_SIZE 4
+#define BOOTCONFIG_CHECKSUM_SIZE 4
+#define BOOTCONFIG_TRAILER_SIZE BOOTCONFIG_MAGIC_SIZE + \
+                                BOOTCONFIG_SIZE_SIZE + \
+                                BOOTCONFIG_CHECKSUM_SIZE
+/*
+ * Simple checksum for a buffer.
+ *
+ * @param addr pointer to the start of the buffer.
+ * @param size size of the buffer in bytes.
+ * @return check sum result.
+ */
+static uint32_t checksum(const unsigned char* const buffer, uint32_t size) {
+    uint32_t sum = 0;
+    for (uint32_t i = 0; i < size; i++) {
+        sum += buffer[i];
+    }
+    return sum;
+}
+/*
+ * Check if the bootconfig trailer is present within the bootconfig section.
+ *
+ * @param bootconfig_end_addr address of the end of the bootconfig section. If
+ *        the trailer is present, it will be directly preceding this address.
+ * @return true if the trailer is present, false if not.
+ */
+static bool isTrailerPresent(uint64_t bootconfig_end_addr) {
+    return !strncmp((char*)(bootconfig_end_addr - BOOTCONFIG_MAGIC_SIZE),
+                    BOOTCONFIG_MAGIC, BOOTCONFIG_MAGIC_SIZE);
+}
+/*
+ * Add a string of boot config parameters to memory appended by the trailer.
+ */
+int32_t addBootConfigParameters(char* params, uint32_t params_size,
+    uint64_t bootconfig_start_addr, uint32_t bootconfig_size) {
+    if (!params || !bootconfig_start_addr) {
+        return -1;
+    }
+    if (params_size == 0) {
+        return 0;
+    }
+    int32_t applied_bytes = 0;
+    int32_t new_size = 0;
+    uint64_t end = bootconfig_start_addr + bootconfig_size;
+    if (isTrailerPresent(end)) {
+      end -= BOOTCONFIG_TRAILER_SIZE;
+      applied_bytes -= BOOTCONFIG_TRAILER_SIZE;
+      memcpy(&new_size, (void *)end, BOOTCONFIG_SIZE_SIZE);
+    } else {
+      new_size = bootconfig_size;
+    }
+    // params
+    memcpy((void*)end, params, params_size);
+    applied_bytes += params_size;
+    applied_bytes += addBootConfigTrailer(bootconfig_start_addr,
+        bootconfig_size + applied_bytes);
+    return applied_bytes;
+}
+/*
+ * Add boot config trailer.
+ */
+int32_t addBootConfigTrailer(uint64_t bootconfig_start_addr,
+                            uint32_t bootconfig_size) {
+    if (!bootconfig_start_addr) {
+        return -1;
+    }
+    if (bootconfig_size == 0) {
+        return 0;
+    }
+    uint64_t end = bootconfig_start_addr + bootconfig_size;
+    if (isTrailerPresent(end)) {
+        // no need to overwrite the current trailers
+        return 0;
+    }
+    // size
+    memcpy((void *)(end), &bootconfig_size, BOOTCONFIG_SIZE_SIZE);
+    // checksum
+    uint32_t sum =
+        checksum((unsigned char*)bootconfig_start_addr, bootconfig_size);
+    memcpy((void *)(end + BOOTCONFIG_SIZE_SIZE), &sum,
+        BOOTCONFIG_CHECKSUM_SIZE);
+    // magic
+    memcpy((void *)(end + BOOTCONFIG_SIZE_SIZE + BOOTCONFIG_CHECKSUM_SIZE),
+           BOOTCONFIG_MAGIC, BOOTCONFIG_MAGIC_SIZE);
+    return BOOTCONFIG_TRAILER_SIZE;
+}

lib/libxbc/libxbc.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef LIBXBC_H_
+#define LIBXBC_H_
+// memcpy and strncmp
+#include <common.h>
+/*
+ * Add a string of boot config parameters to memory appended by the trailer.
+ * This memory needs to be immediately following the end of the ramdisks.
+ * The new boot config trailer will be written to the end of the entire
+ * parameter section(previous + new). The trailer contains a 4 byte size of the
+ * parameters, followed by a 4 byte checksum of the parameters, followed by a 12
+ * byte magic string.
+ *
+ * @param params pointer to string of boot config parameters
+ * @param params_size size of params string in bytes
+ * @param bootconfig_start_addr address that the boot config section is starting
+ *        at in memory.
+ * @param bootconfig_size size of the current bootconfig section in bytes.
+ * @return number of bytes added to the boot config section. -1 for error.
+ */
+int addBootConfigParameters(char *params, uint32_t params_size,
+                            uint64_t bootconfig_start_addr,
+                            uint32_t bootconfig_size);
+/*
+ * Add the boot config trailer to the end of the boot config parameter section.
+ * This can be used after the vendor bootconfig section has been placed into
+ * memory if there are no additional parameters that need to be added.
+ * The new boot config trailer will be written to the end of the entire
+ * parameter section at (bootconfig_start_addr + bootconfig_size).
+ * The trailer contains a 4 byte size of the parameters, followed by a 4 byte
+ * checksum of the parameters, followed by a 12 byte magic string.
+ *
+ * @param bootconfig_start_addr address that the boot config section is starting
+ *        at in memory.
+ * @param bootconfig_size size of the current bootconfig section in bytes.
+ * @return number of bytes added to the boot config section. -1 for error.
+ */
+int addBootConfigTrailer(uint64_t bootconfig_start_addr,
+                         uint32_t bootconfig_size);
+#endif /* LIBXBC_H_ */

lib/sec_library/include/aes.h

@@ -21,12 +21,44 @@ extern "C" {
 #endif
 
 /*----- Encrypt & Decrypt: Config key length -----*/
+#define AES_KEY_LEN_BYTES_32  (32)
+#define AES_KEY_LEN_BYTES_24  (24)
+#define AES_KEY_LEN_BYTES_16  (16)
+
+#define AES_BLOCK_IV_SIZE     (16)
+#define AES_BLOCK_TAG_SIZE    (16)
+#define AES_BLOCK_CRYPTO_SIZE (16)
+
+#define AES_DIR_ENCRYPT       (1)
+#define AES_DIR_DECRYPT       (0)
+
+#define KEY_128_BITS          (0x08)
+#define KEY_192_BITS          (0x10)
+#define KEY_256_BITS          (0x18)
+
+#define AES_DMA_ENABLE        (1)
+#define AES_DMA_DISABLE       (0)
+
+/**
+\brief AES data transfer mode config
+*/
 typedef enum {
-    AES_KEY_LEN_BITS_128        = 0,       ///< 128 Data bits
-    AES_KEY_LEN_BITS_192,                  ///< 192 Data bits
-    AES_KEY_LEN_BITS_256                   ///< 256 Data bits
+    AES_SLAVE_MODE = 0U,         /*slave mode*/
+    AES_DMA_MODE,                /*dma mode*/
+} csi_aes_trans_mode_t;
+
+/**
+\brief AES Keylen type
+*/
+typedef enum {
+    AES_KEY_LEN_BITS_128        = 0,       /*128 Data bits*/
+    AES_KEY_LEN_BITS_192,                  /*192 Data bits*/
+    AES_KEY_LEN_BITS_256                   /*256 Data bits*/
 } csi_aes_key_bits_t;
 
+/**
+\brief AES mode config
+*/
 typedef enum{
     AES_MODE_ECB = 0,
     AES_MODE_CBC = 0x20000020,
@@ -35,51 +67,22 @@ typedef enum{
     AES_MODE_GCM = 0x20030040,
     AES_MODE_CCM = 0x21D40040,
     AES_MODE_OFB = 0x24000000,
-} aes_mode_t;
-
-#define AES_KEY_LEN_BYTES_32 32
-#define AES_KEY_LEN_BYTES_24 24
-#define AES_KEY_LEN_BYTES_16 16
-
-#define AES_CRYPTO_CTRL_CBC_256 0x20000038
-#define AES_CRYPTO_CTRL_CBC_192 0x20000030
-#define AES_CRYPTO_CTRL_CBC_128 0x20000028
-#define AES_CRYPTO_CTRL_ECB_256 0x00000018
-#define AES_CRYPTO_CTRL_ECB_192 0x00000010
-#define AES_CRYPTO_CTRL_ECB_128 0x00000008
-
-#define AES_BLOCK_IV_SIZE  16
-#define AES_BLOCK_TAG_SIZE  16
-#define AES_BLOCK_CRYPTO_SIZE  16
-
-#define AES_DIR_ENCRYPT    1
-#define AES_DIR_DECRYPT    0
-
-#define KEY_128_BITS 0x8
-#define KEY_192_BITS 0x10
-#define KEY_256_BITS 0x18
-
-#define AES_DMA_ENABLE  1
-#define AES_DMA_DISABLE 0
-
-
-typedef enum{
-    AES_CRYPTO_ECB_256_MODE = 0,
-    AES_CRYPTO_ECB_192_MODE,
-    AES_CRYPTO_ECB_128_MODE,
-    AES_CRYPTO_CBC_256_MODE,
-    AES_CRYPTO_CBC_192_MODE,
-    AES_CRYPTO_CBC_128_MODE,
 } csi_aes_mode_t;
 
+/**
+\brief AES state
+*/
 typedef struct {
-    uint32_t busy             : 1;        ///< Calculate busy flag
-    uint32_t error            : 1;        ///< Calculate error flag
+    uint32_t busy             : 1;        /*Calculate busy flag*/
+    uint32_t error            : 1;        /*Calculate error flag*/
 } csi_aes_state_t;
 
+/**
+\brief AES Context
+*/
 typedef struct {
     uint32_t            key_len_byte;
-    uint8_t             key[32];          ///< Data block being processed
+    uint8_t             key[32];          /*Data block being processed*/
     uint32_t            sca;
     uint32_t            is_kdf;
     uint32_t            is_dma;
@@ -343,11 +346,11 @@ csi_error_t csi_aes_enable_pm(csi_aes_t *aes);
 void csi_aes_disable_pm(csi_aes_t *aes);
 
 /**
-  \brief       Config AES mode dma or slave
-  \param[in]   dam_en    zero disable dma, not zero enable dma 
+  \brief       Config AES data transfer mode
+  \param[in]   mode    \ref csi_des_trans_mode_t 
   \return      None
 */
-void csi_aes_dma_enable(csi_aes_t *aes, uint8_t dma_en);
+csi_error_t csi_aes_trans_config(csi_aes_t *aes, csi_aes_trans_mode_t mode);
 
 #ifdef __cplusplus
 }

lib/sec_library/include/common.h

@@ -68,11 +68,13 @@ extern "C" {
     } while (0);
 
 typedef enum {
-    CSI_OK          =  0,
-    CSI_ERROR       = -1,
-    CSI_BUSY        = -2,
-    CSI_TIMEOUT     = -3,
-    CSI_UNSUPPORTED = -4
+    CSI_OK            =  0,
+    CSI_ERROR         = -1,
+    CSI_BUSY          = -2,
+    CSI_TIMEOUT       = -3,
+    CSI_UNSUPPORTED   = -4,
+    CSI_INVALID_PARAM = -5,
+    CSI_CRYPT_FAIL    = -6,
 } csi_error_t;
 
 typedef struct {
@@ -132,9 +134,9 @@ typedef struct {
 
 csi_error_t target_get(csi_dev_tag_t dev_tag, uint32_t idx, csi_dev_t *dev);
 csi_error_t target_get_optimal_dma_channel(void *dma_list, uint32_t ctrl_num, csi_dev_t *parent_dev, void *ch_info);
-//void mdelay(uint32_t ms);
-//void udelay(uint32_t us);
-//void msleep(uint32_t ms);
+// void mdelay(uint32_t ms);
+// void udelay(uint32_t us);
+void msleep(uint32_t ms);
 
 #ifdef __cplusplus
 }

lib/sec_library/include/csi_efuse_api.h

@@ -21,7 +21,7 @@ typedef enum {
 	IMAGE_ENCRYPT_EN = ~(IMAGE_ENCRYPT_DIS),
 } img_encrypt_st_t;
 
-int csi_efuse_api_int(void);
+int csi_efuse_api_init(void);
 void csi_efuse_api_uninit(void);
 
 int csi_efuse_get_secure_boot_st(sboot_st_t *sboot_st);
@@ -48,8 +48,10 @@ int csi_efuse_read_raw(uint32_t addr, void *data, uint32_t cnt);
 
 int csi_efuse_write_raw(uint32_t addr, const void *data, uint32_t cnt);
 
+int csi_efuse_get_lc(int *lc);
+
 #ifdef __cplusplus
 }
 #endif
 
-#endif	/* __CSI_EFUSE_API_H__ */
+#endif	/* __CSI_EFUSE_API_H__ */

lib/sec_library/include/csi_sec_img_verify.h

@@ -24,6 +24,8 @@ int csi_sec_set_boot_stage(boot_stage_t boot_stage);
 
 int csi_sec_get_lib_version(char ** p_version);
 
+int csi_sec_library_init(void);
+
 #ifdef __cplusplus
 }
 #endif

lib/sec_library/include/curve25519.h

@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2017-2022 Alibaba Group Holding Limited
+ */
+
+/******************************************************************************
+ * @file       drv/curve25519.h
+ * @brief      Header File for CURVE25519 Driver
+ * @version    V3.3
+ * @date       10.June 2022
+ * @model      ECC
+ ******************************************************************************/
+
+#ifndef _DRV_CURVE25519_H_
+#define _DRV_CURVE25519_H_
+
+#include <stdint.h>
+#include "common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    csi_dev_t       dev;
+} csi_curve25519_t;
+
+/**
+  \brief       Initialize CURVE25519.
+  \param[in]   idx  device id
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_curve25519_init(void *ctx, uint32_t idx);
+
+/**
+  \brief       De-initialize CURVE25519 Interface. stops operation and releases the software resources used by the interface
+  \param[in]   curve25519  ecc handle to operate.
+  \return      none
+*/
+void csi_curve25519_uninit(void *ctx);
+
+/**
+  \brief       curve25519 gen public key
+  \param[in]   ctx ctx handle to operate.
+  \param[in]   privkey Pointer to the A(or B) private key.
+  \param[out]  pubkey  Pointer to the A(or B) public key.
+  \return      Error code \ref csi_error_t.
+*/
+csi_error_t csi_curve25519_gen_pubkey(void *ctx, const uint8_t privkey[32], uint8_t pubkey[32]);
+
+/**
+  \brief       curve25519 gen key pair
+  \param[in]   ctx ctx handle to operate.
+  \param[out]  privkey Pointer to the A(or B) private key.
+  \param[out]  pubkey  Pointer to the A(or B) public key.
+  \return      Error code \ref csi_error_t.
+*/
+csi_error_t csi_curve25519_gen_keypair(void *ctx, uint8_t privkey[32], uint8_t pubkey[32]);
+
+/**
+  \brief       curve25519 check key pair
+  \param[in]   ctx ctx handle to operate.
+  \param[in]   privkey Pointer to the B(or A) private key.
+  \param[in]   pubkey  Pointer to the A(or B) public key.
+  \param[out]  sk      Pointer to the share key.
+  \param[out]  sk_len  Pointer to the share key length byte.
+  \return      Error code \ref csi_error_t.
+*/
+csi_error_t csi_curve25519_check_keypair(void *ctx, const uint8_t privkey[32], const uint8_t pubkey[32]);
+
+/**
+  \brief       curve25519 check key pair
+  \param[in]   ctx ctx handle to operate.
+  \param[in]   privkey Pointer to the B(or A) private key.
+  \param[in]   pubkey  Pointer to the A(or B) public key.
+  \param[out]  sk      Pointer to the share key.
+  \param[out]  sk_len  Pointer to the share key length byte.
+  \return      Error code \ref csi_error_t.
+*/
+csi_error_t csi_curve25519_calc_secret(void *ctx, const uint8_t privkey[32], const uint8_t pubkey[32], uint8_t sk[32], uint32_t *sk_len);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

lib/sec_library/include/des.h

@@ -0,0 +1,221 @@
+/*
+ * Copyright (C) 2017-2020 Alibaba Group Holding Limited
+ */
+
+/******************************************************************************
+ * @file       drv/des.h
+ * @brief      Header File for DES Driver
+ * @version    V1.0
+ * @date       24. Oct 2022
+ * @model      des
+ ******************************************************************************/
+
+#ifndef _DRV_DES_H_
+#define _DRV_DES_H_
+
+#include <stdint.h>
+#include "common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*----- Encrypt & Decrypt: Config key length -----*/
+/**
+\brief DES data transfer mode config
+*/
+typedef enum {
+    DES_SLAVE_MODE = 0U,         /*slave mode*/
+    DES_DMA_MODE,                /*dma mode*/
+} csi_des_trans_mode_t;
+
+/**
+\brief DES key-len-bits type
+*/
+typedef enum {
+    DES_KEY_LEN_BITS_64        = 0,        /*64 Data bits*/
+    DES_KEY_LEN_BITS_128,                  /*128 Data bits*/
+    DES_KEY_LEN_BITS_192,                  /*192 Data bits*/
+} csi_des_key_bits_t;
+
+typedef enum{
+    DES_MODE_ECB    = 0x00000000,
+    DES_MODE_CBC    = 0x20000020,
+    TDES_MODE_ECB   = 0x00000008,
+    TDES_MODE_CBC   = 0x20000028,
+} des_mode_t;
+
+
+#define DES_KEY_LEN_BYTES_32    (32)
+#define DES_KEY_LEN_BYTES_16    (16)
+#define DES_KEY_LEN_BYTES_24    (24)
+#define DES_KEY_LEN_BYTES_8     (8)
+
+#define DES_BLOCK_IV_SIZE       (8)
+#define DES_BLOCK_CRYPTO_SIZE   (8)
+#define TDES_BLOCK_CRYPTO_SIZE  (16)
+
+#define DES_DIR_ENCRYPT         (1)
+#define DES_DIR_DECRYPT         (0)
+
+#define DES_KEY_128_BITS        (0x8)
+#define DES_KEY_192_BITS        (0x10)
+
+/**
+\brief DES State
+*/
+typedef struct {
+    uint32_t busy             : 1;        /*Calculate busy flag*/
+    uint32_t error            : 1;        /*Calculate error flag*/
+} csi_des_state_t;
+
+/**
+\brief DES Context
+*/
+typedef struct {
+    uint32_t            key_len_byte;
+    uint8_t             key[32];          /*Data block being processed*/
+    uint32_t            sca;
+    uint32_t            is_kdf;
+    uint32_t            is_dma;
+} csi_des_context_t;
+
+/**
+\brief DES Ctrl Block
+*/
+typedef struct {
+    csi_des_state_t         state;
+    csi_des_context_t       context;
+    csi_dev_t               dev;
+    void                    *priv;
+} csi_des_t;
+
+/**
+  \brief       Initialize DES interface. Initializes the resources needed for the DES interface
+  \param[in]   des    Handle to operate
+  \param[in]   idx    Device id
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_des_init(csi_des_t *des, uint32_t idx);
+
+/**
+  \brief       De-initialize DES interface. Stops operation and releases the software resources used by the interface
+  \param[in]   des    Dandle to operate
+  \return      None
+*/
+void csi_des_uninit(csi_des_t *des);
+
+/**
+  \brief       Set encrypt key
+  \param[in]   des        Handle to operate
+  \param[in]   key        Pointer to the key buf
+  \param[in]   key_len    Pointer to \ref csi_des_key_bits_t
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_des_set_encrypt_key(csi_des_t *des, void *key, csi_des_key_bits_t key_len);
+
+/**
+  \brief       Set decrypt key
+  \param[in]   des        Handle to operate
+  \param[in]   key        Pointer to the key buf
+  \param[in]   key_len    Pointer to \ref csi_des_key_bits_t
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_des_set_decrypt_key(csi_des_t *des, void *key, csi_des_key_bits_t key_len);
+
+/**
+  \brief       DES ecb encrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_des_ecb_encrypt(csi_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       DES ecb decrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_des_ecb_decrypt(csi_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       DES cbc encrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \param[in]   iv      Init vector
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_des_cbc_encrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv) ;
+
+/**
+  \brief       DES cbc decrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \param[in]   iv      Init vector
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_des_cbc_decrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv);
+
+/**
+  \brief       TDES ecb encrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_tdes_ecb_encrypt(csi_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       TDES ecb decrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_tdes_ecb_decrypt(csi_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       TDES cbc encrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \param[in]   iv      Init vector
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_tdes_cbc_encrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv) ;
+
+/**
+  \brief       TDES cbc decrypt
+  \param[in]   des     Handle to operate
+  \param[in]   in      Pointer to the source data
+  \param[out]  out     Pointer to the result data
+  \param[in]   size    The source data size
+  \param[in]   iv      Init vector
+  \return      Error code \ref Csi_error_t
+*/
+csi_error_t csi_tdes_cbc_decrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv);
+
+/**
+  \brief       Config DES mode dma or slave
+  \param[in]   mode    \ref csi_des_trans_mode_t 
+  \return      None
+*/
+csi_error_t csi_des_trans_config(csi_des_t *des, csi_des_trans_mode_t mode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_AES_H_ */

lib/sec_library/include/dsa.h

@@ -0,0 +1,178 @@
+/*
+ * Copyright (C) 2017-2022 Alibaba Group Holding Limited
+ */
+
+/******************************************************************************
+ * @file       drv/ecc.h
+ * @brief      Header File for ECC Driver
+ * @version    V3.3
+ * @date       30. May 2022
+ * @model      ECC
+ ******************************************************************************/
+
+#ifndef _DRV_DSA_H_
+#define _DRV_DSA_H_
+
+#include <stdint.h>
+#include "common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define CSI_DSA_SHA1_PUBKEY_LEN        (128)
+#define CSI_DSA_SHA1_PRIVKEY_LEN       (20)
+#define CSI_DSA_SHA1_RK_LEN            (20) /*random*/
+#define CSI_DSA_SHA1_SIGNATURE_LEN     (40)
+#define CSI_DSA_SHA1_DIGEST_LEN        (20)
+
+#define CSI_DSA_SHA256_PUBKEY_LEN      (256)
+#define CSI_DSA_SHA256_PRIVKEY_LEN     (32)
+#define CSI_DSA_SHA256_RK_LEN          (32) /*random*/
+#define CSI_DSA_SHA256_SIGNATURE_LEN   (64)
+#define CSI_DSA_SHA256_DIGEST_LEN      (32)
+
+#define CSI_DSA_SHA224_PUBKEY_LEN      (256)
+#define CSI_DSA_SHA224_PRIVKEY_LEN     (28)
+#define CSI_DSA_SHA224_RK_LEN          (28) /*random*/
+#define CSI_DSA_SHA224_SIGNATURE_LEN   (56)
+#define CSI_DSA_SHA224_DIGEST_LEN      (28)
+
+#define CSI_DSA_SHA1_SHIFT_BYTES          (1*4)
+#define CSI_DSA_SHA224_SHIFT_BYTES        (1*4)
+
+#define DSA_SHA1_GROUP_P_G_BYTES          (128)
+#define DSA_SHA1_GROUP_PARAM_WORDS        (76)
+#define DSA_SHA1_GROUP_N_BYTES            (20)
+#define DSA_SHA1_A_LEN_WORDS              (0x20)
+#define DSA_SHA1_B_LEN_WORDS              (0x05)
+
+#define DSA_SHA256_GROUP_P_G_BYTES        (256)
+#define DSA_SHA256_GROUP_PARAM_WORDS      (140)
+#define DSA_SHA256_GROUP_N_BYTES          (32)
+#define DSA_SHA256_A_LEN_WORDS            (0x40)
+#define DSA_SHA256_B_LEN_WORDS            (0x08)
+
+#define DSA_SHA224_GROUP_P_G_BYTES        (256)
+#define DSA_SHA224_GROUP_PARAM_WORDS      (140)
+#define DSA_SHA224_GROUP_N_BYTES          (28)
+#define DSA_SHA224_A_LEN_WORDS            (0x40)
+#define DSA_SHA224_B_LEN_WORDS            (0x07)
+
+
+/**
+\brief DSA sha type
+*/
+typedef enum {
+    DSA_SHA1   = 0,
+    DSA_SHA224,
+    DSA_SHA256,
+    DSA_SHA_TYPE_MAX,
+} dsa_sha_type;
+
+/**
+\brief DSA group param
+*/
+typedef struct {
+    dsa_sha_type  type;
+    uint32_t      *group;
+    uint32_t      words;
+    uint32_t      offset;
+} csi_dsa_group_t;
+
+/**
+\brief DSA g param
+*/
+typedef struct {
+    dsa_sha_type  type;
+    uint8_t       *p;
+    uint8_t       *g;
+    uint8_t       *n;
+} csi_dsa_gpn_t;
+
+typedef enum{
+    CSI_DSA_SHA1_SIGN = 0,
+    CSI_DSA_SHA1_VERIFY,
+    CSI_DSA_SHA224_SIGN,
+    CSI_DSA_SHA224_VERIFY,
+    CSI_DSA_SHA256_SIGN,
+    CSI_DSA_SHA256_VERIFY,
+    CSI_DSA_FUN_MAX,
+}dsa_fun_type;
+
+typedef struct {
+  dsa_fun_type    type;
+  uint32_t        dsa_pka_a_offset;
+  uint32_t        dsa_pka_b_offset;
+  uint32_t        dsa_pka_c_offset;
+  uint32_t        dsa_pka_d_offset;
+  uint32_t        dsa_pka_r_offset;
+  uint32_t        dsa_pka_s_offset;
+  uint32_t        dsa_pka_function;
+  uint32_t        dsa_pka_A_len;
+  uint32_t        dsa_pka_B_len;
+} csi_dsa_pka_offset_t;
+
+/**
+\brief ECC handle
+*/
+typedef struct {
+    csi_dev_t       dev;
+    dsa_sha_type    sha_type;
+} csi_dsa_t;
+
+/**
+  \brief       Initialize ECC.
+  \param[in]   idx  device id
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_dsa_init(csi_dsa_t *dsa, uint32_t idx);
+
+/**
+  \brief       De-initialize ECC Interface. stops operation and releases the software resources used by the interface
+  \param[in]   ecc  ecc handle to operate.
+  \return      none
+*/
+void csi_dsa_uninit(csi_dsa_t *dsa);
+
+/**
+  \brief       config dsa sha type
+  \param[in]   ecc  ECC handle to operate.
+  \param[in]   type  \ref dsa_sha_type.
+*/
+csi_error_t csi_dsa_config(csi_dsa_t *dsa, dsa_sha_type type);
+/**
+  \brief       dsa gen key pairs
+  \param[in]   ecc      dsa handle to operate.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  pubkey   Pointer to the public key
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_dsa_gen_keypairs(csi_dsa_t *dsa, uint8_t *prikey, uint8_t *pubkey);
+
+/**
+  \brief       dsa sign
+  \param[in]   ecc      dsa handle to operate.
+  \param[in]   d        Pointer to the digest.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  s        Pointer to the signature
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_dsa_sign(csi_dsa_t *dsa, uint8_t *d, uint8_t *prikey, uint8_t *s);
+
+/**
+  \brief       dsa verify
+  \param[in]   ecc      ecc handle to operate.
+  \param[in]   d        Pointer to the digest.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  s        Pointer to the signature
+  \return      verify result 
+*/
+bool csi_dsa_verify(csi_dsa_t *dsa, uint8_t *d, uint8_t *pubkey, uint8_t *s);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

lib/sec_library/include/ecc.h

@@ -20,11 +20,18 @@
 extern "C" {
 #endif
 
-#define ECC_PRIME_CURVE_G_BYTES 64
-#define ECC_PRIME_CURVE_P_BYTES 70
+#define CSI_ECC_PUBKEY_LEN      (65-1)
+#define CSI_ECC_PRIVKEY_LEN     (32)
+#define CSI_ECC_PUBKEYTMP_LEN   (65)
+#define CSI_ECC_RK_LEN          (32) /*random*/
+#define CSI_ECC_SIGNATURE_LEN   (64)
+#define CSI_ECC_DIGEST_LEN      (32)
+
+#define ECC_PRIME_CURVE_G_BYTES (64)
+#define ECC_PRIME_CURVE_P_BYTES (70)
 
 typedef struct {
-    uint32_t ecc_curve : 1; ///< supports 256bits curve
+    uint32_t ecc_curve : 1; /*supports 256bits curve*/
 } ecc_capabilities_t;
 
 /**
@@ -35,11 +42,17 @@ typedef enum {
     ECC_C1C2C3,
 } ecc_cipher_order_e;
 
+/**
+\brief ECC endian mode
+*/
 typedef enum {
-    ECC_ENDIAN_LITTLE = 0, ///< Little Endian
-    ECC_ENDIAN_BIG         ///< Big Endian
+    ECC_ENDIAN_LITTLE = 0, /*Little Endian*/
+    ECC_ENDIAN_BIG         /*Big Endian*/
 } ecc_endian_mode_e;
 
+/**
+\brief ECC prime curve type
+*/
 typedef enum {
     ECC_PRIME256V1 = 0,
 } ecc_prime_curve_type;
@@ -51,19 +64,25 @@ typedef enum { ECC_Role_Sponsor = 0, ECC_Role_Responsor } ecc_exchange_role_e;
 
 /****** ECC Event *****/
 typedef enum {
-    ECC_EVENT_MAKE_KEY_COMPLETE = 0, ///< Make key completed
-    ECC_EVENT_ENCRYPT_COMPLETE,      ///< Encrypt completed
-    ECC_EVENT_DECRYPT_COMPLETE,      ///< Decrypt completed
-    ECC_EVENT_SIGN_COMPLETE,         ///< Sign completed
-    ECC_EVENT_VERIFY_COMPLETE,       ///< Verify completed
-    ECC_EVENT_EXCHANGE_KEY_COMPLETE, ///< Exchange key completed
+    ECC_EVENT_MAKE_KEY_COMPLETE = 0, /*Make key completed*/
+    ECC_EVENT_ENCRYPT_COMPLETE,      /*Encrypt completed*/
+    ECC_EVENT_DECRYPT_COMPLETE,      /*Decrypt completed*/
+    ECC_EVENT_SIGN_COMPLETE,         /*Sign completed*/
+    ECC_EVENT_VERIFY_COMPLETE,       /*Verify completed*/
+    ECC_EVENT_EXCHANGE_KEY_COMPLETE, /*Exchange key completed*/
 } ecc_event_e;
 
+/**
+\brief ECC prime curve param
+*/
 typedef struct {
     ecc_prime_curve_type type;
     uint32_t *p;
 } csi_ecc_prime_curve_t;
 
+/**
+\brief ECC curve type g param
+*/
 typedef struct {
     ecc_prime_curve_type type;
     uint8_t *G;
@@ -74,9 +93,12 @@ typedef struct {
 \brief ECC status
 */
 typedef struct {
-    uint32_t busy : 1; ///< Calculate busy flag
+    uint32_t busy : 1; /*Calculate busy flag*/
 } csi_ecc_state_t;
 
+/**
+\brief ECC handle
+*/
 typedef struct {
     csi_dev_t       dev;
     void *          cb;
@@ -85,14 +107,13 @@ typedef struct {
     ecc_prime_curve_type  type;
 } csi_ecc_t;
 
-///< Pointer to \ref csi_ecc_callback_t : ECC Event call back.
+/*Pointer to \ref csi_ecc_callback_t : ECC Event call back.*/
 typedef void (*csi_ecc_callback_t)(ecc_event_e event);
 
 /**
   \brief       Initialize ECC.
-  \param[in]   ecc  ecc handle to operate.
   \param[in]   idx  device id
-  \return      \ref uint32_t
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_init(csi_ecc_t *ecc, uint32_t idx);
 
@@ -106,111 +127,111 @@ void csi_ecc_uninit(csi_ecc_t *ecc);
 /**
   \brief       ecc get capability.
   \param[in]   ecc  Operate handle.
-  \return      \ref uint32_t
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_ecc_config(csi_ecc_t *ecc, ecc_cipher_order_e co,
-                           ecc_endian_mode_e endian);
+csi_error_t csi_ecc_config(csi_ecc_t *ecc, ecc_cipher_order_e co, ecc_endian_mode_e endian);
 
 /**
   \brief       Attach the callback handler to ECC
   \param[in]   ecc  Operate handle.
   \param[in]   cb    Callback function
   \param[in]   arg   User can define it by himself as callback's param
-  \return      Error code \ref csi_error_t
+  \return      Error code Error code \ref csi_error_t
 */
-csi_error_t csi_ecc_attach_callback(csi_ecc_t *ecc, csi_ecc_callback_t cb,
-                                    void *arg);
+csi_error_t csi_ecc_attach_callback(csi_ecc_t *ecc, csi_ecc_callback_t cb, void *arg);
 
 /**
   \brief       Detach the callback handler
   \param[in]   ecc  Operate handle.
+  \return      Error code Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_detach_callback(csi_ecc_t *ecc);
 
 /**
   \brief       ecc get capability.
   \param[in]   ecc  Operate handle.
-  \param[out]   cap  Pointer of ecc_capabilities_t.
-  \return      \ref uint32_t
+  \param[out]  cap  Pointer of ecc_capabilities_t.
+  \return      Error code Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_get_capabilities(csi_ecc_t *ecc, ecc_capabilities_t *cap);
 
+/**
+  \brief       check whether the public key and private key are a pair.
+  \param[in]   ecc       ecc handle to operate.
+  \param[in]   private   Pointer to the ecc private key, alloc by caller.
+  \param[in]   public    Pointer to the ecc public key, alloc by caller.
+  \return      Error code \ref csi_error_t
+*/
 csi_error_t csi_ecc_check_keypair(csi_ecc_t *ecc, uint8_t pubkey[65], uint8_t prikey[32]);
 
 /**
   \brief       generate ecc key.
   \param[in]   ecc       ecc handle to operate.
   \param[out]  private   Pointer to the ecc private key, alloc by caller.
-  \param[out]  public   Pointer to the ecc public key, alloc by caller.
-  \return      \ref uint32_t
+  \param[out]  public    Pointer to the ecc public key, alloc by caller.
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_ecc_gen_key(csi_ecc_t *ecc, uint8_t pubkey[65],
-                            uint8_t prikey[32]);
+csi_error_t csi_ecc_gen_key(csi_ecc_t *ecc, uint8_t pubkey[65], uint8_t prikey[32]);
 
 /**
-  \brief       generate ecc pubkey by privkey.
+  \brief       generate ecc public key by private key.
   \param[in]   ecc       ecc handle to operate.
-  \param[in]   private   Pointer to the ecc private key, alloc by caller.
-  \param[out]  public   Pointer to the ecc public key, alloc by caller.
-  \return      \ref uint32_t
+  \param[out]  private   Pointer to the ecc private key, alloc by caller.
+  \param[out]  public    Pointer to the ecc public key, alloc by caller.
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_ecc_gen_pubkey(csi_ecc_t *ecc, uint8_t pubkey[65],
-                            uint8_t prikey[32]);
+csi_error_t csi_ecc_gen_pubkey(csi_ecc_t *ecc, uint8_t pubkey[65], uint8_t prikey[32]);
 
 /**
   \brief       ecc sign
-  \param[in]   ecc       ecc handle to operate.
-  \param[in]   d       Pointer to the digest.
-  \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
-  \return      \ref uint32_t
+  \param[in]   ecc      ecc handle to operate.
+  \param[in]   d        Pointer to the digest.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  s        Pointer to the signature
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_ecc_sign(csi_ecc_t *ecc, uint8_t d[32], uint8_t prikey[32],
-                         uint8_t s[64]);
+csi_error_t csi_ecc_sign(csi_ecc_t *ecc, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
 
 /**
-  \brief       ecc sign
-  \param[in]   ecc       ecc handle to operate.
-  \param[in]   d       Pointer to the digest.
-  \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
-  \return      \ref uint32_t
+  \brief       ecc sign asybnc
+  \param[in]   ecc      ecc handle to operate.
+  \param[in]   d        Pointer to the digest.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  s        Pointer to the signature
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_ecc_sign_async(csi_ecc_t *ecc, uint8_t d[32],
-                               uint8_t prikey[32], uint8_t s[64]);
+csi_error_t csi_ecc_sign_async(csi_ecc_t *ecc, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
 
 /* TODO */
 /**
   \brief       ecc verify
-  \param[in]   ecc       ecc handle to operate.
-  \param[in]   d       Pointer to the digest.
-  \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
-  \return      verify result
+  \param[in]   ecc      ecc handle to operate.
+  \param[in]   d        Pointer to the digest.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  s        Pointer to the signature
+  \return      verify result 
 */
-bool csi_ecc_verify(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65],
-                    uint8_t s[64]);
+bool csi_ecc_verify(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
 
 /**
   \brief       ecc verify
-  \param[in]   ecc       ecc handle to operate.
-  \param[in]   d       Pointer to the digest.
-  \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
+  \param[in]   ecc      ecc handle to operate.
+  \param[in]   d        Pointer to the digest.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  s        Pointer to the signature
   \return      verify result
 */
-bool csi_ecc_verify_async(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65],
-                          uint8_t s[64]);
+bool csi_ecc_verify_async(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
 
 /**
   \brief       ecc encrypto
-  \param[in]   ecc       ecc handle to operate.
-  \param[in]   Plain       Pointer to the plaintext.
-  \param[in]  PlainByteLen plaintext len
-  \param[in]  pubKey public key.
-  \param[out]  Cipher Pointer to the chipher
-  \param[out]  CipherByteLen Pointer to the chipher len.
-  \return      uint32_t
+  \param[in]   ecc              ecc handle to operate.
+  \param[in]   Plain            Pointer to the plaintext.
+  \param[in]   PlainByteLen     plaintext len
+  \param[in]   pubKey           public key.
+  \param[out]  Cipher           Pointer to the chipher
+  \param[out]  CipherByteLen    Pointer to the chipher len.
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_encrypt(csi_ecc_t *ecc, uint8_t *Plain,
                             uint32_t PlainByteLen, uint8_t pubKey[65],
@@ -218,13 +239,13 @@ csi_error_t csi_ecc_encrypt(csi_ecc_t *ecc, uint8_t *Plain,
 
 /**
   \brief       ecc encrypto
-  \param[in]   ecc       ecc handle to operate.
-  \param[in]  Cipher Pointer to the chipher
-  \param[in]  CipherByteLen chipher len.
-  \param[in]  prikey private key.
-  \param[out]   Plain       Pointer to the plaintext.
-  \param[out]  PlainByteLen plaintext len
-  \return      uint32_t
+  \param[in]   ecc              ecc handle to operate.
+  \param[in]   Cipher           Pointer to the chipher
+  \param[in]   CipherByteLen    chipher len.
+  \param[in]   prikey           private key.
+  \param[out]  Plain            Pointer to the plaintext.
+  \param[out]  PlainByteLen     plaintext len
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_decrypt(csi_ecc_t *ecc, uint8_t *Cipher,
                             uint32_t CipherByteLen, uint8_t prikey[32],
@@ -233,7 +254,7 @@ csi_error_t csi_ecc_decrypt(csi_ecc_t *ecc, uint8_t *Cipher,
 /**
   \brief       ecc key exchange
   \param[in]   ecc       ecc handle to operate.
-  \return      uint32_t
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_exchangekey(csi_ecc_t *ecc, ecc_exchange_role_e role,
                                 uint8_t *dA, uint8_t *PB, uint8_t *rA,
@@ -244,7 +265,7 @@ csi_error_t csi_ecc_exchangekey(csi_ecc_t *ecc, ecc_exchange_role_e role,
 /**
   \brief       ecc key exchange get Z.
   \param[in]   ecc       ecc handle to operate.
-  \return      uint32_t
+  \return      Error code Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_getZ(csi_ecc_t *ecc, uint8_t *ID, uint32_t byteLenofID,
                          uint8_t pubKey[65], uint8_t Z[32]);
@@ -252,7 +273,7 @@ csi_error_t csi_ecc_getZ(csi_ecc_t *ecc, uint8_t *ID, uint32_t byteLenofID,
 /**
   \brief       ecc key exchange get E
   \param[in]   ecc       ecc handle to operate.
-  \return      uint32_t
+  \return      Error code Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_getE(csi_ecc_t *ecc, uint8_t *M, uint32_t byteLen,
                          uint8_t Z[32], uint8_t E[32]);
@@ -261,14 +282,14 @@ csi_error_t csi_ecc_getE(csi_ecc_t *ecc, uint8_t *M, uint32_t byteLen,
   \brief       Get ECC state.
   \param[in]   ecc      ECC handle to operate.
   \param[out]  state    ECC state \ref csi_ecc_state_t.
-  \return      Error code \ref csi_error_t
+  \return      Error code Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_get_state(csi_ecc_t *ecc, csi_ecc_state_t *state);
 
 /**
   \brief       Enable ecc power manage
   \param[in]   ecc  ECC handle to operate.
-  \return      Error code \ref csi_error_t
+  \return      Error code Error code \ref csi_error_t
 */
 csi_error_t csi_ecc_enable_pm(csi_ecc_t *ecc);
 
@@ -279,7 +300,7 @@ csi_error_t csi_ecc_enable_pm(csi_ecc_t *ecc);
 void csi_ecc_disable_pm(csi_ecc_t *ecc);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif

lib/sec_library/include/ecdh.h

@@ -20,22 +20,24 @@
 extern "C" {
 #endif
 
+#define CSI_ECDH_PUBKEY_LEN   (65-1)
+#define CSI_ECDH_PRIVKEY_LEN  (32)
+#define CSI_ECDH_SHARE_LEN    (64)
+#define CSI_ECDH_SHAREKEY_LEN (32)
 
 /**
   \brief       ecdh cacl share secret
-  \param[in]  ecc ecc handle to operate.
-  \param[in]  pubkey Pointer to the A public key.
-  \param[in]  privkey Pointer to the B private key.
-  \param[out] shareKey Pointer to the share secret.
-  \param[out] len length of the share secret.
-  \return     \ref uint32_t
+  \param[in]  ecc       ecc handle to operate.
+  \param[in]  pubkey    Pointer to the A public key.
+  \param[in]  prikey    Pointer to the B private key.
+  \param[out] shareKey  Pointer to the share secret.
+  \param[out] len       length of the share secret.
+  \return     Error code \ref csi_error_t
 */
-csi_error_t csi_ecdh_calc_secret(csi_ecc_t *ecc, uint8_t privkey[32],
-                            uint8_t pubkey[65], uint8_t shareKey[32], 
-                            uint32_t *len);
+csi_error_t csi_ecdh_calc_secret(csi_ecc_t *ecc, uint8_t privkey[32], uint8_t pubkey[65], uint8_t shareKey[32], uint32_t *len);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif

lib/sec_library/include/list.h

@@ -168,8 +168,10 @@ static inline int dlist_empty(const dlist_t *head)
  \param[in]   member    The name of the variable within the struct
  \return      None
  */
+#ifndef list_entry
 #define list_entry(ptr, type, member) \
     aos_container_of(ptr, type, member)
+#endif
 
 
 /**

lib/sec_library/include/rng.h

@@ -22,16 +22,10 @@ extern "C" {
 /**
   \brief       Get data from the TNG engine
   \param[out]  Data  Pointer to buffer with data get from TNG
-  \param[in]   Num   Number of data items,uinit in uint32
+  \param[in]   Size   Size of data items,uinit in uint32
   \return      Error code \ref csi_error_t
 */
-csi_error_t csi_rng_get_multi_word(uint32_t *data, uint32_t num);
-
-/**
-  \brief       Get data from the TNG engine
-  \return      Error code \ref csi_error_t
-*/
-csi_error_t csi_rng_get_single_word(uint32_t* data);
+csi_error_t csi_rng_get_random_bytes(uint8_t *data, uint32_t size);
 
 #ifdef __cplusplus
 }

lib/sec_library/include/rsa.h

@@ -18,17 +18,17 @@ extern "C" {
 #include <stdint.h>
 #include "common.h"
 
-#define RSA_PRIME_256_BIT_LEN        128
-#define RSA_PRIME_512_BIT_LEN        256
-#define RSA_PRIME_1024_BIT_LEN       512
-#define RSA_PRIME_2048_BIT_LEN       1024
-#define RSA_PRIME_4096_BIT_LEN       2048
+#define RSA_PRIME_256_BIT_LEN   (128)
+#define RSA_PRIME_512_BIT_LEN   (256)
+#define RSA_PRIME_1024_BIT_LEN  (512)
+#define RSA_PRIME_2048_BIT_LEN  (1024)
+#define RSA_PRIME_4096_BIT_LEN  (2048)
 
-#define RSA_256_BYTE_LEN        32
-#define RSA_512_BYTE_LEN        64
-#define RSA_1024_BYTE_LEN       128
-#define RSA_2048_BYTE_LEN       256
-#define RSA_4096_BYTE_LEN       512
+#define RSA_256_BYTE_LEN        (32)
+#define RSA_512_BYTE_LEN        (64)
+#define RSA_1024_BYTE_LEN       (128)
+#define RSA_2048_BYTE_LEN       (256)
+#define RSA_4096_BYTE_LEN       (512)
 #define RSA_EM_BYTE_LEN         RSA_4096_BYTE_LEN
 
 #define SHA256_DIGEST_BYTE_LEN  32
@@ -40,24 +40,52 @@ extern "C" {
 #define RSA_SHA384_OID_LEN      (6 + 9 + 4)
 #define RSA_SHA512_OID_LEN      (6 + 9 + 4)
 
+#define RSA_192_A_LEN_WORDS     (0x03)
+#define RSA_192_B_LEN_WORDS     (0x03)
+#define RSA_192_D_LEN_WORDS     (0x18)
+
+#define RSA_256_A_LEN_WORDS     (0x04)
+#define RSA_256_B_LEN_WORDS     (0x04)
+#define RSA_256_D_LEN_WORDS     (0x20)
+
+#define RSA_512_A_LEN_WORDS     (0x08)
+#define RSA_512_B_LEN_WORDS     (0x08)
+#define RSA_512_D_LEN_WORDS     (0x40)
+
+#define RSA_1024_A_LEN_WORDS    (0x10)
+#define RSA_1024_B_LEN_WORDS    (0x10)
+#define RSA_1024_D_LEN_WORDS    (0x80)
+
+#define RSA_2048_A_LEN_WORDS    (0x20)
+#define RSA_2048_B_LEN_WORDS    (0x20)
+#define RSA_2048_D_LEN_WORDS    (0x100)
+
+#define RSA_3072_A_LEN_WORDS    (0x30)
+#define RSA_3072_B_LEN_WORDS    (0x30)
+#define RSA_3072_D_LEN_WORDS    (0x180)
+
+#define RSA_4096_A_LEN_WORDS    (0x40)
+#define RSA_4096_B_LEN_WORDS    (0x40)
+#define RSA_4096_D_LEN_WORDS    (0x200)
+
 /*----- RSA Control Codes: Mode Parameters: Key Bits -----*/
 typedef enum {
-    RSA_KEY_BITS_192             = 0,  ///< 192 Key bits
-    RSA_KEY_BITS_256,                  ///< 256 Key bits
-    RSA_KEY_BITS_512,                  ///< 512 Key bits
-    RSA_KEY_BITS_1024,                 ///< 1024 Key bits
-    RSA_KEY_BITS_2048,                 ///< 2048 Key bits
-    RSA_KEY_BITS_3072,                 ///< 3072 Key bits
-    RSA_KEY_BITS_4096                  ///< 4096 Key bits
+    RSA_KEY_BITS_192             = 0,  /*192 Key bits*/
+    RSA_KEY_BITS_256,                  /*256 Key bits*/
+    RSA_KEY_BITS_512,                  /*512 Key bits*/
+    RSA_KEY_BITS_1024,                 /*1024 Key bits*/
+    RSA_KEY_BITS_2048,                 /*2048 Key bits*/
+    RSA_KEY_BITS_3072,                 /*3072 Key bits*/
+    RSA_KEY_BITS_4096                  /*4096 Key bits*/
 } csi_rsa_key_bits_t;
 
 typedef enum {
-    RSA_PADDING_MODE_NO           = 0, ///< RSA NO Padding Mode
-    RSA_PADDING_MODE_PKCS1,            ///< RSA PKCS1 Padding Mode
-    RSA_PADDING_MODE_PKCS1_OAEP,       ///< RSA PKCS1 OAEP Padding Mode
-    RSA_PADDING_MODE_SSLV23,           ///< RSA SSLV23 Padding Mode
-    RSA_PADDING_MODE_X931,             ///< RSA X931 Padding Mode
-    RSA_PADDING_MODE_PSS               ///< RSA PSS Padding Mode
+    RSA_PADDING_MODE_NO           = 0, /*RSA NO Padding Mode*/
+    RSA_PADDING_MODE_PKCS1,            /*RSA PKCS1 Padding Mode*/
+    RSA_PADDING_MODE_PKCS1_OAEP,       /*RSA PKCS1 OAEP Padding Mode*/
+    RSA_PADDING_MODE_SSLV23,           /*RSA SSLV23 Padding Mode*/
+    RSA_PADDING_MODE_X931,             /*RSA X931 Padding Mode*/
+    RSA_PADDING_MODE_PSS               /*RSA PSS Padding Mode*/
 } csi_rsa_padding_type_t;
 
 typedef enum {
@@ -69,6 +97,30 @@ typedef enum {
     RSA_HASH_TYPE_SHA512
 } csi_rsa_hash_type_t;
 
+typedef enum {
+    RSA_CRT_DISABLE            = 0,
+    RSA_CRT_ENABLE = 1,
+} csi_rsa_crt_t;
+
+typedef enum {
+    RSA_HASH_DISABLE            = 0,
+    RSA_HASH_ENABLE = 1,
+} csi_rsa_hash_t;
+
+typedef struct {
+    csi_rsa_key_bits_t  type;
+    uint32_t        rsa_pka_dp_offset;
+    uint32_t        rsa_pka_dq_offset;
+    uint32_t        rsa_pka_p_offset;
+    uint32_t        rsa_pka_q_offset;
+    uint32_t        rsa_pka_qinv_offset;
+    uint32_t        rsa_pka_m_offset;
+    uint32_t        rsa_pka_r_offset;
+    uint32_t        rsa_pka_A_len;
+    uint32_t        rsa_pka_B_len;
+    uint32_t        rsa_pka_D_len;
+} csi_rsa_pka_offset_t;
+
 typedef struct {
     csi_rsa_hash_type_t hash_type;
     uint32_t            oid_len;
@@ -76,19 +128,26 @@ typedef struct {
 }RSA_OID;
 
 typedef struct {
-    void *n;                                ///< Pointer to the public modulus
-    void *e;                                ///< Pointer to the public exponent
-    void *d;                                ///< Pointer to the private exponent
-    csi_rsa_key_bits_t     key_bits;        ///< RSA KEY BITS
-    csi_rsa_padding_type_t padding_type;    ///< RSA PADDING TYPE
+    void *n;                                /*Pointer to the public modulus*/
+    void *e;                                /*Pointer to the public exponent*/
+    void *d;                                /*Pointer to the private exponent*/
+    void *p;
+    void *q;
+    void *dp;
+    void *dq;
+    void *qinv;
+    csi_rsa_crt_t          is_crt;
+    csi_rsa_hash_t         is_hash;
+    csi_rsa_key_bits_t     key_bits;        /*RSA KEY BITS*/
+    csi_rsa_padding_type_t padding_type;    /*RSA PADDING TYPE*/
 } csi_rsa_context_t;
 
 /**
 \brief RSA State
 */
 typedef struct {
-    uint8_t busy             : 1;        ///< Calculate busy flag
-    uint8_t error            : 1;        ///< Calculate error flag
+    uint8_t busy             : 1;        /*Calculate busy flag*/
+    uint8_t error            : 1;        /*Calculate error flag*/
 } csi_rsa_state_t;
 
 typedef struct {
@@ -113,13 +172,13 @@ typedef struct {
 
 /****** RSA Event *****/
 typedef enum {
-    RSA_EVENT_COMPLETE    = 0,   ///< rsa event completed
+    RSA_EVENT_COMPLETE    = 0,   /*rsa event completed*/
     RSA_EVENT_VERIFY_SUCCESS,
     RSA_EVENT_VERIFY_FAILED,
-    RSA_EVENT_ERROR,             ///< error event
+    RSA_EVENT_ERROR,             /*error event*/
 } csi_rsa_event_t;
 
-typedef void (*csi_rsa_callback_t)(csi_rsa_t *rsa, csi_rsa_event_t event, void *arg);   ///< Pointer to \ref csi_rsa_callback_t : RSA Event call back.
+typedef void (*csi_rsa_callback_t)(csi_rsa_t *rsa, csi_rsa_event_t event, void *arg);   /*Pointer to \ref csi_rsa_callback_t : RSA Event call back.*/
 
 /**
   \brief       Initialize RSA Interface. 1. Initializes the resources needed for the RSA interface 2.registers event callback function
@@ -301,7 +360,7 @@ csi_error_t csi_rsa_get_publickey(csi_rsa_t *rsa, void *p, uint32_t p_byte_len,
 /**
   \brief       Generation rsa keyparis 
   \param[in]   rsa          rsa handle to operate.
-  \param[in]   context   Pointer to the rsa context
+  \param[in]   context      Pointer to the rsa context
   \param[in]   keybits_len  Pointer to the publickey bits length
   \return      \ref csi_error_t
 */

lib/sec_library/include/sec_crypto_aes.h

@@ -31,10 +31,21 @@
 extern "C" {
 #endif
 
+/**
+\brief AES data transfer mode config
+*/
 typedef enum {
-    SC_AES_KEY_LEN_BITS_128 = 0U, ///< 128 Data bits
-    SC_AES_KEY_LEN_BITS_192,      ///< 192 Data bits
-    SC_AES_KEY_LEN_BITS_256       ///< 256 Data bits
+    SC_AES_SLAVE_MODE = 0U,         /*slave mode*/
+    SC_AES_DMA_MODE,                /*dma mode*/
+} sc_aes_trans_mode_t;
+
+/**
+\brief AES key-len-bits type
+*/
+typedef enum {
+    SC_AES_KEY_LEN_BITS_128 = 0U, /*128 Data bits*/
+    SC_AES_KEY_LEN_BITS_192,      /*192 Data bits*/
+    SC_AES_KEY_LEN_BITS_256       /*256 Data bits*/
 } sc_aes_key_bits_t;
 
 /**
@@ -49,7 +60,6 @@ typedef struct {
 #endif
 #ifdef CONFIG_CSI_V2
     csi_aes_t     csi_aes;
-    //unsigned char sc_ctx[SC_AES_CTX_SIZE];
 #endif
 #endif
 #if defined(CONFIG_TEE_CA)
@@ -59,10 +69,9 @@ typedef struct {
 #if defined(CONFIG_SEC_CRYPTO_AES_SW)
     sc_mbedtls_aes_context aes_ctx;
 #endif
-    //void *ctx;
 } sc_aes_t;
 
-// Function documentation
+/*Function documentation*/
 /**
   \brief       Initialize AES Interface. Initializes the resources needed for the AES interface
   \param[in]   aes    operate handle
@@ -297,7 +306,10 @@ uint32_t sc_aes_ccm_encrypt(sc_aes_t *aes, void *in, void *out,uint32_t size, ui
 */
 uint32_t sc_aes_ccm_decrypt(sc_aes_t *aes, void *in, void *out,uint32_t size, uint32_t add_len, void *iv, uint8_t* tag_out);
 
-void sc_aes_dma_enable(sc_aes_t *aes, uint8_t en);
+/**
+  \brief       Aes data transfer config
+*/
+uint32_t sc_aes_trans_config(sc_aes_t *aes, sc_aes_trans_mode_t mode) ;
 
 #ifdef __cplusplus
 }

lib/sec_library/include/sec_crypto_common.h

@@ -20,7 +20,10 @@
 #include "sec_crypto_sha.h"
 #include "sec_crypto_sm2.h"
 #include "sec_crypto_sm4.h"
-
+#include "sec_crypto_des.h"
+#include "sec_crypto_dsa.h"
+#include "sec_crypto_ecc.h"
+#include "sec_crypto_ecdh.h"
 #define SC_lOG(...)
 
 #endif

lib/sec_library/include/sec_crypto_curve25519.h

@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2017-2022 Alibaba Group Holding Limited
+ */
+/******************************************************************************
+ * @file     sec_crypto_curve25519.h
+ * @brief    Header File for curve25519( a state-of-the-art Diffie-Hellman function)
+ * @version  V3.3
+ * @date     10. June 2022
+ * @model    ecdh
+ ******************************************************************************/
+#ifndef _SC_CURVE25519_H_
+#define _SC_CURVE25519_H_
+#include "sec_include_config.h"
+
+#define CONFIG_SEC_CRYPTO_CURVE25519
+
+#ifdef CONFIG_SEC_CRYPTO_CURVE25519
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef SEC_LIB_VERSION
+#include "drv/curve25519.h"
+#include "sec_crypto_curve25519.h"
+#else
+#include "curve25519.h"
+#include "sec_crypto_curve25519.h"
+#endif
+
+typedef struct {
+#ifdef CONFIG_CSI_V2
+        csi_curve25519_t ctx;
+#endif
+} sc_curve25519_t;
+
+/**
+  \brief       Initialize CURVE25519.
+  \param[in]   idx  device id
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t sc_curve25519_init(void *ctx, uint32_t idx);
+
+/**
+  \brief       De-initialize CURVE25519 Interface. stops operation and releases the software resources used by the interface
+  \param[in]   curve25519  ecc handle to operate.
+  \return      none
+*/
+void sc_curve25519_uninit(void *ctx);
+
+/**
+  \brief       curve25519 gen public key
+  \param[in]   ctx ctx handle to operate.
+  \param[in]   privkey Pointer to the A(or B) private key.
+  \param[out]  pubkey  Pointer to the A(or B) public key.
+  \return      \ref uint32_t.
+*/
+uint32_t sc_curve25519_gen_pubkey(void *ctx, const uint8_t privkey[32], uint8_t pubkey[32]);
+
+/**
+  \brief       curve25519 gen key pair
+  \param[in]   ctx ctx handle to operate.
+  \param[out]  privkey Pointer to the A(or B) private key.
+  \param[out]  pubkey  Pointer to the A(or B) public key.
+  \return      \ref uint32_t.
+*/
+uint32_t sc_curve25519_gen_keypair(void *ctx, uint8_t privkey[32], uint8_t pubkey[32]);
+
+/**
+  \brief       curve25519 check key pair
+  \param[in]   ctx ctx handle to operate.
+  \param[in]   privkey Pointer to the A(or B) private key.
+  \param[in]   pubkey  Pointer to the A(or B) public key.
+  \return      \ref uint32_t.
+*/
+uint32_t sc_curve25519_check_keypair(void *ctx, const uint8_t privkey[32], const uint8_t pubkey[32]);
+
+/**
+  \brief       curve25519 check key pair
+  \param[in]   ctx ctx handle to operate.
+  \param[in]   privkey Pointer to the B(or A) private key.
+  \param[in]   pubkey  Pointer to the A(or B) public key.
+  \param[out]  sk      Pointer to the share key.
+  \param[out]  sk_len  Pointer to the share key length byte.
+  \return      \ref uint32_t.
+*/
+uint32_t sc_curve25519_calc_secret(void *ctx, const uint8_t privkey[32], const uint8_t pubkey[32], uint8_t sk[32], uint32_t *sk_len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif /* _SC_CURVE15519_H_ */

lib/sec_library/include/sec_crypto_des.h

@@ -0,0 +1,203 @@
+/*
+ * Copyright (C) 2017-2022 Alibaba Group Holding Limited
+ */
+/******************************************************************************
+ * @file     sec_crypt0_des.h
+ * @brief    Header File for DES
+ * @version  V1.0
+ * @date     24. Oct 2022
+ * @model    des
+ ******************************************************************************/
+#ifndef _SC_DES_H_
+#define _SC_DES_H_
+
+#include "sec_include_config.h"
+#include <stdint.h>
+#include "sec_crypto_errcode.h"
+
+#ifdef CONFIG_SYSTEM_SECURE
+#ifdef SEC_LIB_VERSION
+#include <drv/des.h>
+#else
+#include "des.h"
+#endif
+#endif
+
+#ifdef CONFIG_SEC_CRYPTO_DES_SW
+#include "crypto_des.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+\brief DES data transfer mode config
+*/
+typedef enum {
+    SC_DES_SLAVE_MODE = 0U,         /*slave mode*/
+    SC_DES_DMA_MODE,                /*dma mode*/
+} sc_des_trans_mode_t;
+
+/**
+\brief DES key-len-bits type
+*/
+typedef enum {
+    SC_DES_KEY_LEN_BITS_64 = 0U,    /*64 Data bits*/
+    SC_TDES_KEY_LEN_BITS_128,       /*128 Data bits*/
+    SC_TDES_KEY_LEN_BITS_192,       /*192 Data bits*/
+} sc_des_key_bits_t;
+
+/**
+\brief DES Ctrl Block
+*/
+typedef struct {
+#ifdef CONFIG_SYSTEM_SECURE
+#ifdef CONFIG_CSI_V1
+    des_handle_t  handle;
+    unsigned char key[32];
+    unsigned int  key_len;
+#endif
+#ifdef CONFIG_CSI_V2
+    csi_des_t     csi_des;
+#endif
+#endif
+#if defined(CONFIG_TEE_CA)
+    unsigned char key[32];
+    unsigned int  key_len;
+#endif
+#if defined(CONFIG_SEC_CRYPTO_DES_SW)
+    sc_mbedtls_des_context des_ctx;
+#endif
+} sc_des_t;
+
+// Function documentation
+/**
+  \brief       Initialize DES Interface. Initializes the resources needed for the DES interface
+  \param[in]   des    operate handle
+  \param[in]   idx    device id
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_des_init(sc_des_t *des, uint32_t idx);
+
+/**
+  \brief       De-initialize DES Interface. stops operation and releases the software resources used by the interface
+  \param[in]   des    handle to operate
+  \return      None
+*/
+void sc_des_uninit(sc_des_t *des);
+
+/**
+  \brief       Set encrypt key
+  \param[in]   des        handle to operate
+  \param[in]   key        Pointer to the key buf
+  \param[in]   key_len    Pointer to \ref sc_des_key_bits_t
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_des_set_encrypt_key(sc_des_t *des, void *key, sc_des_key_bits_t key_len);
+
+/**
+  \brief       Set decrypt key
+  \param[in]   des        handle to operate
+  \param[in]   key        Pointer to the key buf
+  \param[in]   key_len    Pointer to \ref sc_des_key_bits_t
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_des_set_decrypt_key(sc_des_t *des, void *key, sc_des_key_bits_t key_len);
+
+/**
+  \brief       Des ecb encrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_des_ecb_encrypt(sc_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       Des ecb decrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_des_ecb_decrypt(sc_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       Des cbc encrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \param[in]   iv      init vector
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_des_cbc_encrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
+
+/**
+  \brief       Des cbc decrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \param[in]   iv      init vector
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_des_cbc_decrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
+
+/**
+  \brief       TDes ecb encrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_tdes_ecb_encrypt(sc_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       TDes ecb decrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_tdes_ecb_decrypt(sc_des_t *des, void *in, void *out, uint32_t size);
+
+/**
+  \brief       TDes cbc encrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \param[in]   iv      init vector
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_tdes_cbc_encrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
+
+/**
+  \brief       TDes cbc decrypt
+  \param[in]   des     handle to operate
+  \param[in]   in      Pointer to the Source data
+  \param[out]  out     Pointer to the Result data
+  \param[in]   size    the Source data size
+  \param[in]   iv      init vector
+  \return      error code \ref uint32_t
+*/
+uint32_t sc_tdes_cbc_decrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
+
+/**
+  \brief       Config DES mode dma or slave
+  \param[in]   mode    \ref sc_des_trans_mode_t 
+  \return      None
+*/
+uint32_t sc_des_trans_config(sc_des_t *des, sc_des_trans_mode_t mode) ;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SC_DES_H_ */

lib/sec_library/include/sec_crypto_dsa.h

@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2017-2022 Alibaba Group Holding Limited
+ */
+/******************************************************************************
+ * @file     sec_crypt_dsa.h
+ * @brief    Header File for DSA
+ * @version  V3.3
+ * @date     05. Dec 2022
+ * @model    dsa
+ ******************************************************************************/
+#ifndef _SC_DSA_H_
+#define _SC_DSA_H_
+#include "sec_include_config.h"
+
+#define CONFIG_SEC_CRYPTO_DSA
+
+#ifdef CONFIG_SEC_CRYPTO_DSA
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef SEC_LIB_VERSION
+#include "drv/dsa.h"
+#else
+#include "dsa.h"
+#endif
+
+typedef enum{
+    SC_DSA_SHA1 = 0,
+    SC_DSA_SHA224,
+    SC_DSA_SHA256,
+    SC_DSA_SHA_MAX,
+}sc_dsa_sha_type;
+
+/**
+\brief DSA status
+*/
+typedef struct {
+        uint32_t busy : 1; /*Calculate busy flag*/
+} sc_dsa_state_t;
+
+typedef struct {
+#ifdef CONFIG_CSI_V2
+        csi_dsa_t dsa;
+#endif
+} sc_dsa_t;
+
+/**
+  \brief       Initialize DSA.
+  \param[in]   dsa  dsa handle to operate.
+  \param[in]   idx  device id
+  \return      \ref uint32_t
+*/
+uint32_t sc_dsa_init(sc_dsa_t *dsa, uint32_t idx);
+
+/**
+  \brief       De-initialize ECC Interface. stops operation and releases the
+  software resources used by the interface \param[in]   dsa  dsa handle to
+  operate. \return      none
+*/
+void sc_dsa_uninit(sc_dsa_t *dsa);
+
+/**
+  \brief       Initialize DSA.
+  \param[in]   dsa  dsa handle to operate.
+  \param[in]   idx  device id
+  \return      \ref uint32_t
+*/
+uint32_t sc_dsa_config(sc_dsa_t *dsa, sc_dsa_sha_type type);
+
+/**
+  \brief       dsa gen key pairs
+  \param[in]   dsa      dsa handle to operate.
+  \param[out]  privkey  Pointer to the private key
+  \param[out]  pubkey   Pointer to the public key
+  \return      Error code \ref csi_error_t
+*/
+uint32_t sc_dsa_gen_keypairs(sc_dsa_t *dsa, uint8_t *prikey, uint8_t *pubkey);
+
+/**
+  \brief       dsa sign
+  \param[in]   dsa     dsa handle to operate.
+  \param[in]   d       Pointer to the digest.
+  \param[out]  privkey Pointer to the private key
+  \param[out]  s Pointer to the signature
+  \return      \ref uint32_t
+*/
+uint32_t sc_dsa_sign(sc_dsa_t *dsa, uint8_t *d, uint8_t *prikey, uint8_t *s);
+
+/**
+  \brief       dsa verify
+  \param[in]   dsa     dsa handle to operate.
+  \param[in]   d       Pointer to the digest.
+  \param[out]  privkey Pointer to the private key
+  \param[out]  s Pointer to the signature
+  \return      verify result
+*/
+bool sc_dsa_verify(sc_dsa_t *dsa, uint8_t *d, uint8_t *pubkey, uint8_t *s);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif /* _SC_ECC_H_ */
+

lib/sec_library/include/sec_crypto_ecc.h

@@ -39,8 +39,8 @@ typedef enum {
 } sc_ecc_cipher_order_e;
 
 typedef enum {
-        SC_ECC_ENDIAN_LITTLE = 0, ///< Little Endian
-        SC_ECC_ENDIAN_BIG         ///< Big Endian
+        SC_ECC_ENDIAN_LITTLE = 0, /*Little Endian*/
+        SC_ECC_ENDIAN_BIG         /*Big Endian*/
 } sc_ecc_endian_mode_e;
 
 /**
@@ -50,23 +50,23 @@ typedef enum { SC_ECC_Role_Sponsor = 0, SC_ECC_Role_Responsor } sc_ecc_exchange_
 
 /****** ECC Event *****/
 typedef enum {
-        SC_ECC_EVENT_MAKE_KEY_COMPLETE = 0, ///< Make key completed
-        SC_ECC_EVENT_ENCRYPT_COMPLETE,      ///< Encrypt completed
-        SC_ECC_EVENT_DECRYPT_COMPLETE,      ///< Decrypt completed
-        SC_ECC_EVENT_SIGN_COMPLETE,         ///< Sign completed
-        SC_ECC_EVENT_VERIFY_COMPLETE,       ///< Verify completed
-        SC_ECC_EVENT_EXCHANGE_KEY_COMPLETE, ///< Exchange key completed
+        SC_ECC_EVENT_MAKE_KEY_COMPLETE = 0, /*Make key completed*/
+        SC_ECC_EVENT_ENCRYPT_COMPLETE,      /*Encrypt completed*/
+        SC_ECC_EVENT_DECRYPT_COMPLETE,      /*Decrypt completed*/
+        SC_ECC_EVENT_SIGN_COMPLETE,         /*Sign completed*/
+        SC_ECC_EVENT_VERIFY_COMPLETE,       /*Verify completed*/
+        SC_ECC_EVENT_EXCHANGE_KEY_COMPLETE, /*Exchange key completed*/
 } sc_ecc_event_e;
 
 typedef struct {
-        uint32_t ecc_curve : 1; ///< supports 256bits curve
+        uint32_t ecc_curve : 1; /*supports 256bits curve*/
 } sc_ecc_capabilities_t;
 
 /**
 \brief ECC status
 */
 typedef struct {
-        uint32_t busy : 1; ///< Calculate busy flag
+        uint32_t busy : 1; /*Calculate busy flag*/
 } sc_ecc_state_t;
 
 typedef struct {
@@ -75,7 +75,7 @@ typedef struct {
 #endif
 } sc_ecc_t;
 
-///< Pointer to \ref sc_ecc_callback_t : ECC Event call back.
+/*Pointer to \ref sc_ecc_callback_t : ECC Event call back.*/
 typedef void (*sc_ecc_callback_t)(sc_ecc_event_e event);
 
 /**
@@ -256,7 +256,7 @@ uint32_t sc_ecc_getE(sc_ecc_t *ecc, uint8_t *m, uint32_t len, uint8_t z[32],
 uint32_t sc_ecc_get_state(sc_ecc_t *ecc, sc_ecc_state_t *state);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif

lib/sec_library/include/sec_crypto_ecdh.h

@@ -45,7 +45,7 @@ uint32_t sc_ecdh_calc_secret(sc_ecc_t *ecc, uint8_t privkey[32],
                             uint32_t *len, sc_ecc_curve_type type) ;
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif

lib/sec_library/include/sec_crypto_mac.h

@@ -15,15 +15,15 @@
 #include "sec_crypto_errcode.h"
 #include "sec_crypto_sha.h"
 
-#define SC_MAC_KEY_LEN_MAX 64
-#define HMAC_SHA1_BLOCK_SIZE 64
-#define HMAC_SHA224_BLOCK_SIZE 64
-#define HMAC_SM3_BLOCK_SIZE 64
-#define HMAC_SHA256_BLOCK_SIZE 64
-#define HMAC_MD5_BLOCK_SIZE 64
-#define HMAC_SHA384_BLOCK_SIZE 128
-#define HMAC_SHA512_BLOCK_SIZE 128
-#define HMAC_MAX_BLOCK_SIZE 128
+#define SC_MAC_KEY_LEN_MAX      (64)
+#define HMAC_SHA1_BLOCK_SIZE    (64)
+#define HMAC_SHA224_BLOCK_SIZE  (64)
+#define HMAC_SM3_BLOCK_SIZE     (64)
+#define HMAC_SHA256_BLOCK_SIZE  (64)
+#define HMAC_MD5_BLOCK_SIZE     (64)
+#define HMAC_SHA384_BLOCK_SIZE  (128)
+#define HMAC_SHA512_BLOCK_SIZE  (128)
+#define HMAC_MAX_BLOCK_SIZE     (128)
 
 #ifdef __cplusplus
 extern "C" {
@@ -44,7 +44,7 @@ typedef struct {
 /**
   \brief       Initialize MAC Interface. Initializes the resources needed for the MAC interface
   \param[in]   mac  operate handle.
-  \param[in]   idx index of mac
+  \param[in]   idx  index of mac
   \return      error code \ref uint32_t
 */
 uint32_t sc_mac_init(sc_mac_t *mac, uint32_t idx);
@@ -57,23 +57,22 @@ uint32_t sc_mac_init(sc_mac_t *mac, uint32_t idx);
 void sc_mac_uninit(sc_mac_t *mac);
 
 /**
-  \brief       MAC set key function.
-  \param[in]   mac mac handle to operate.
-  \param[in]   key Pointer to the mac key.
-  \param[in]   key_len Length of key.
+  \brief       MAC      set key function.
+  \param[in]   mac      mac handle to operate.
+  \param[in]   key      Pointer to the mac key.
+  \param[in]   key_len  Length of key.
   \return      error code
 */
 uint32_t sc_mac_set_key(sc_mac_t *mac, uint8_t *key, uint32_t key_len);
 
 /**
   \brief       MAC operation function.
-  \param[in]   mac mac handle to operate.
-  \param[in]   mode sc_sha_mode_t.
-  \param[in]   msg Pointer to the mac input message.
-  \param[in]   msg_len Length of msg.
-  \param[out]  out mac buffer, malloc by caller.
-  \param[out]  out_len, out mac length,
-	should 32 bytes if HMAC_SHA256 mode.
+  \param[in]   mac      mac handle to operate.
+  \param[in]   mode     sc_sha_mode_t.
+  \param[in]   msg      Pointer to the mac input message.
+  \param[in]   msg_len  Length of msg.
+  \param[out]  out      mac buffer, malloc by caller.
+  \param[out]  out_len  out mac length, should 32 bytes if HMAC_SHA256 mode.
   \return      error code
 */
 uint32_t sc_mac_calc(sc_mac_t *mac, sc_sha_mode_t mode, uint8_t *msg,
@@ -81,35 +80,32 @@ uint32_t sc_mac_calc(sc_mac_t *mac, sc_sha_mode_t mode, uint8_t *msg,
 
 /**
   \brief       MAC start operation function.
-  \param[in]   mac mac handle to operate.
-  \param[in]   context mac context pointer.
-  \param[in]   mode sc_sha_mode_t.
+  \param[in]   mac 		  mac handle to operate.
+  \param[in]   context 	mac context pointer.
+  \param[in]   mode 	  sc_sha_mode_t.
   \return      error code
 */
-uint32_t sc_mac_start(sc_mac_t *mac, sc_mac_context_t *context,
-		      sc_sha_mode_t mode);
+uint32_t sc_mac_start(sc_mac_t *mac, sc_mac_context_t *context, sc_sha_mode_t mode);
 
 /**
   \brief       MAC start operation function.
-  \param[in]   mac mac handle to operate.
-  \param[in]   context mac context pointer.
-  \param[in]   msg Pointer to the mac input message.
-  \param[in]   msg_len Length of msg.
+  \param[in]   mac      mac handle to operate.
+  \param[in]   context  mac context pointer.
+  \param[in]   msg      Pointer to the mac input message.
+  \param[in]   msg_len  Length of msg.
   \return      error code
 */
-uint32_t sc_mac_update(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *msg,
-		       uint32_t msg_len);
+uint32_t sc_mac_update(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *msg, uint32_t msg_len);
 
 /**
   \brief       MAC start operation function.
-  \param[in]   mac mac handle to operate.
-  \param[in]   context mac context pointer.
-  \param[out]  out mac buffer, malloc by caller.
-  \param[out]  out_len, out mac length,
+  \param[in]   mac 		mac handle to operate.
+  \param[in]   context 	mac context.
+  \param[out]  out 		mac buffer, malloc by caller.
+  \param[out]  out_len  out mac length,
   \return      error code
 */
-uint32_t sc_mac_finish(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *out,
-		       uint32_t *out_len);
+uint32_t sc_mac_finish(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *out, uint32_t *out_len);
 #ifdef __cplusplus
 }
 #endif

lib/sec_library/include/sec_crypto_rng.h

@@ -23,16 +23,10 @@ extern "C" {
 /**
   \brief       Get data from the TRNG engine
   \param[out]  data  Pointer to buffer with data get from TRNG
-  \param[in]   num   Number of data items in bytes
+  \param[in]   size   Size of data items in bytes
   \return      error code
 */
-uint32_t sc_rng_get_multi_byte(uint8_t *data, uint32_t num);
-
-/**
-  \brief       Get data from the TRNG engine
-  \return      error code
-*/
-uint32_t sc_rng_get_single_word(uint32_t *data);
+uint32_t sc_rng_get_random_bytes(uint8_t *data, uint32_t size);
 
 #ifdef __cplusplus
 }

lib/sec_library/include/sec_crypto_rsa.h

@@ -40,26 +40,26 @@ extern "C" {
 #include "sec_crypto_errcode.h"
 
 
-//TODO Del this file after updating to sc2.0
+/*TODO Del this file after updating to sc2.0*/
 
 /*----- RSA Control Codes: Mode Parameters: Key Bits -----*/
 typedef enum {
-    SC_RSA_KEY_BITS_192 = 0, ///< 192 Key bits
-    SC_RSA_KEY_BITS_256,     ///< 256 Key bits
-    SC_RSA_KEY_BITS_512,     ///< 512 Key bits
-    SC_RSA_KEY_BITS_1024,    ///< 1024 Key bits
-    SC_RSA_KEY_BITS_2048,    ///< 2048 Key bits
-    SC_RSA_KEY_BITS_3072,    ///< 3072 Key bits
-    SC_RSA_KEY_BITS_4096     ///< 4096 Key bits
+    SC_RSA_KEY_BITS_192 = 0, /*192 Key bits*/
+    SC_RSA_KEY_BITS_256,     /*256 Key bits*/
+    SC_RSA_KEY_BITS_512,     /*512 Key bits*/
+    SC_RSA_KEY_BITS_1024,    /*1024 Key bits*/
+    SC_RSA_KEY_BITS_2048,    /*2048 Key bits*/
+    SC_RSA_KEY_BITS_3072,    /*3072 Key bits*/
+    SC_RSA_KEY_BITS_4096     /*4096 Key bits*/
 } sc_rsa_key_bits_t;
 
 typedef enum {
-    SC_RSA_PADDING_MODE_NO = 0,     ///< RSA NO Padding Mode
-    SC_RSA_PADDING_MODE_PKCS1,      ///< RSA PKCS1 Padding Mode
-    SC_RSA_PADDING_MODE_PKCS1_OAEP, ///< RSA PKCS1 OAEP Padding Mode
-    SC_RSA_PADDING_MODE_SSLV23,     ///< RSA SSLV23 Padding Mode
-    SC_RSA_PADDING_MODE_X931,       ///< RSA X931 Padding Mode
-    SC_RSA_PADDING_MODE_PSS         ///< RSA PSS Padding Mode
+    SC_RSA_PADDING_MODE_NO = 0,     /*RSA NO Padding Mode*/
+    SC_RSA_PADDING_MODE_PKCS1,      /*RSA PKCS1 Padding Mode*/
+    SC_RSA_PADDING_MODE_PKCS1_OAEP, /*RSA PKCS1 OAEP Padding Mode*/
+    SC_RSA_PADDING_MODE_SSLV23,     /*RSA SSLV23 Padding Mode*/
+    SC_RSA_PADDING_MODE_X931,       /*RSA X931 Padding Mode*/
+    SC_RSA_PADDING_MODE_PSS         /*RSA PSS Padding Mode*/
 } sc_rsa_padding_type_t;
 
 typedef enum {
@@ -71,25 +71,40 @@ typedef enum {
     SC_RSA_HASH_TYPE_SHA512
 } sc_rsa_hash_type_t;
 
+typedef enum {
+    SC_RSA_CRT_DISABLE = 0,
+    SC_RSA_CRT_ENABLE,
+} sc_rsa_crt_t;
+
+typedef enum {
+    SC_RSA_HASH_DISABLE = 0,
+    SC_RSA_HASH_ENABLE,
+} sc_rsa_hash_t;
+
+
+/* the private key is the quintuplet(p, q, qinv, dp, dq) with CRT */
 typedef struct {
-// #if (defined(CONFIG_SYSTEM_SECURE) && defined(CONFIG_CSI_V2))
-//   csi_rsa_context_t rsa_ctx;
-// #else
-    void *                 n;            ///< Pointer to the public modulus
-    void *                 e;            ///< Pointer to the public exponent
-    void *                 d;            ///< Pointer to the private exponent
-    sc_rsa_key_bits_t     key_bits;     ///< RSA KEY BITS
-    sc_rsa_padding_type_t padding_type; ///< RSA PADDING TYPE
-    sc_rsa_hash_type_t hash_type;
-// #endif
+    void *                 n;            /*Pointer to the public modulus*/
+    void *                 e;            /*Pointer to the public exponent*/
+    void *                 d;            /*Pointer to the private exponent*/
+    void *                 p;            /*Pointer to the private key param p with CRT*/ 
+    void *                 q;            /*Pointer to the private key param q with CRT*/
+    void *                 dp;           /*Pointer to the private key param dp with CRT*/
+    void *                 dq;           /*Pointer to the private key param dq with CRT*/
+    void *                 qinv;         /*Pointer to the private key param qinv with CRT*/
+    sc_rsa_crt_t           is_crt;       /*Enable RSA with CRT*/
+    sc_rsa_hash_t          is_hash;      /*Enable RSA with HASH*/
+    sc_rsa_key_bits_t      key_bits;     /*RSA KEY BITS*/
+    sc_rsa_padding_type_t  padding_type; /*RSA PADDING TYPE*/
+    sc_rsa_hash_type_t     hash_type;
 } sc_rsa_context_t;
 
 /**
 \brief RSA State
 */
 typedef struct {
-    uint8_t busy : 1;  ///< Calculate busy flag
-    uint8_t error : 1; ///< Calculate error flag
+    uint8_t busy : 1;  /*Calculate busy flag*/
+    uint8_t error : 1; /*Calculate error flag*/
 } sc_rsa_state_t;
 
 typedef struct {
@@ -109,17 +124,17 @@ typedef struct {
 
 /****** RSA Event *****/
 typedef enum {
-    SC_RSA_EVENT_COMPLETE = 0, ///< rsa event completed
+    SC_RSA_EVENT_COMPLETE = 0, /*rsa event completed*/
     SC_RSA_EVENT_VERIFY_SUCCESS,
     SC_RSA_EVENT_VERIFY_FAILED,
-    SC_RSA_EVENT_ERROR, ///< error event
+    SC_RSA_EVENT_ERROR, /*error event*/
 } sc_rsa_event_t;
 
 typedef void (*sc_rsa_callback_t)(
     sc_rsa_t *rsa, sc_rsa_event_t event,
-    void *arg); ///< Pointer to \ref sc_rsa_callback_t : RSA Event call back.
+    void *arg); /*Pointer to \ref sc_rsa_callback_t : RSA Event call back.*/
 
-// Function documentation
+/*Function documentation*/ 
 
 /**
   \brief       Initialize RSA Interface. 1. Initializes the resources needed for the RSA interface 2.registers event callback function

lib/sec_library/include/sec_crypto_sha.h

@@ -41,16 +41,24 @@
 extern "C" {
 #endif
 
+/**
+\brief SHA data transfer mode config
+*/
+typedef enum {
+    SC_SHA_SLAVE_MODE = 0U,         /*slave mode*/
+    SC_SHA_DMA_MODE,                /*dma mode*/
+} sc_sha_trans_mode_t;
+
 /*----- SHA Control Codes: Mode -----*/
 typedef enum {
-    SC_SHA_MODE_SHA1 = 1U,  ///< SHA_1 mode
-    SC_SHA_MODE_256,     ///< SHA_256 mode
-    SC_SHA_MODE_224,     ///< SHA_224 mode
-    SC_SHA_MODE_512,     ///< SHA_512 mode
-    SC_SHA_MODE_384,     ///< SHA_384 mode
-    SC_SHA_MODE_512_256, ///< SHA_512_256 mode
-    SC_SHA_MODE_512_224, ///< SHA_512_224 mode
-    SC_SHA_MODE_MD5,     ///< MD5 mode
+    SC_SHA_MODE_SHA1 = 1U,  /*SHA_1 mode*/
+    SC_SHA_MODE_256,        /*SHA_256 mode*/
+    SC_SHA_MODE_224,        /*SHA_224 mode*/
+    SC_SHA_MODE_512,        /*SHA_512 mode*/
+    SC_SHA_MODE_384,        /*SHA_384 mode*/
+    SC_SHA_MODE_512_256,    /*SHA_512_256 mode*/
+    SC_SHA_MODE_512_224,    /*SHA_512_224 mode*/
+    SC_SHA_MODE_MD5,        /*MD5 mode*/
     SC_SM3_MODE,
 } sc_sha_mode_t;
 
@@ -58,8 +66,8 @@ typedef enum {
 \brief SHA State
 */
 typedef struct {
-    uint32_t busy : 1;  ///< calculate busy flag
-    uint32_t error : 1; ///< calculate error flag
+    uint32_t busy : 1;  /*calculate busy flag*/
+    uint32_t error : 1; /*calculate error flag*/
 } sc_sha_state_t;
 
 typedef struct {
@@ -81,13 +89,13 @@ uint8_t ctx[SHA_CONTEXT_SIZE];
   sc_mbedtls_sha1_context sha1_ctx;
   sc_mbedtls_sha256_context sha2_ctx;
 #endif
-  sc_sha_mode_t mode;        ///< sha mode
+  sc_sha_mode_t mode;        /*sha mode*/
 } sc_sha_context_t;
 
 /****** SHA Event *****/
 typedef enum {
-    SC_SHA_EVENT_COMPLETE = 0U, ///< calculate completed
-    SC_SHA_EVENT_ERROR          ///< calculate error
+    SC_SHA_EVENT_COMPLETE = 0U, /*calculate completed*/
+    SC_SHA_EVENT_ERROR          /*calculate error*/
 } sc_sha_event_t;
 
 typedef struct sc_sha {
@@ -95,7 +103,7 @@ typedef struct sc_sha {
 #ifdef CONFIG_CSI_V1
   sha_handle_t handle;
   sc_sha_context_t ctx;
-  sc_sha_mode_t mode;        ///< sha mode
+  sc_sha_mode_t mode;        /*sha mode*/
 #endif /* CONFIG_CSI_V1 */
 #ifdef CONFIG_CSI_V2
   csi_sha_t csi_sha;
@@ -125,7 +133,7 @@ void sc_sha_uninit(sc_sha_t *sha);
 
 /**
   \brief       attach the callback handler to SHA
-  \param[in]   sha  operate handle.
+  \param[in]   sha      operate handle.
   \param[in]   callback callback function
   \param[in]   arg      callback's param
   \return      error code
@@ -165,8 +173,7 @@ uint32_t sc_sha_update(sc_sha_t *sha, sc_sha_context_t *context, const void *inp
   \param[in]   size    the data size
   \return      error code \ref uint32_t
 */
-uint32_t sc_sha_update_async(sc_sha_t *sha, sc_sha_context_t *context, const void *input,
-                             uint32_t size);
+uint32_t sc_sha_update_async(sc_sha_t *sha, sc_sha_context_t *context, const void *input, uint32_t size);
 
 /**
   \brief       finish the engine
@@ -200,6 +207,12 @@ uint32_t sc_sha_digest(sc_sha_t *sha, uint32_t idx, sc_sha_context_t *context, s
   \return      error code \ref uint32_t
 */
 uint32_t sc_sha_get_state(sc_sha_t *sha,sc_sha_context_t *context);
+
+/**
+  \brief       Sha data transfer config
+*/
+uint32_t sc_sha_trans_config(sc_sha_t *sha, sc_sha_context_t *context, sc_sha_trans_mode_t mode);
+
 #ifdef __cplusplus
 }
 #endif

lib/sec_library/include/sec_crypto_sm2.h

@@ -26,7 +26,7 @@ extern "C" {
 
 
 typedef struct {
-        uint32_t sm2_curve : 1; ///< supports 256bits curve
+        uint32_t sm2_curve : 1; /*supports 256bits curve*/
 } sc_sm2_capabilities_t;
 
 /**
@@ -38,15 +38,15 @@ typedef enum {
 } sc_sm2_cipher_order_e;
 
 typedef enum {
-        SC_SM2_ENDIAN_LITTLE = 0, ///< Little Endian
-        SC_SM2_ENDIAN_BIG         ///< Big Endian
+        SC_SM2_ENDIAN_LITTLE = 0, /*Little Endian*/
+        SC_SM2_ENDIAN_BIG         /*Big Endian*/
 } sc_sm2_endian_mode_e;
 
 /**
 \brief SM2 status
 */
 typedef struct {
-        uint32_t busy : 1; ///< Calculate busy flag
+        uint32_t busy : 1; /*Calculate busy flag*/
 } sc_sm2_state_t;
 
 /**
@@ -56,12 +56,12 @@ typedef enum { SC_SM2_Role_Sponsor = 0, SC_SM2_Role_Responsor } sc_sm2_exchange_
 
 /****** SM2 Event *****/
 typedef enum {
-        SC_SM2_EVENT_MAKE_KEY_COMPLETE = 0, ///< Make key completed
-        SC_SM2_EVENT_ENCRYPT_COMPLETE,      ///< Encrypt completed
-        SC_SM2_EVENT_DECRYPT_COMPLETE,      ///< Decrypt completed
-        SC_SM2_EVENT_SIGN_COMPLETE,         ///< Sign completed
-        SC_SM2_EVENT_VERIFY_COMPLETE,       ///< Verify completed
-        SC_SM2_EVENT_EXCHANGE_KEY_COMPLETE, ///< Exchange key completed
+        SC_SM2_EVENT_MAKE_KEY_COMPLETE = 0, /*Make key completed*/
+        SC_SM2_EVENT_ENCRYPT_COMPLETE,      /*Encrypt completed*/
+        SC_SM2_EVENT_DECRYPT_COMPLETE,      /*Decrypt completed*/
+        SC_SM2_EVENT_SIGN_COMPLETE,         /*Sign completed*/
+        SC_SM2_EVENT_VERIFY_COMPLETE,       /*Verify completed*/
+        SC_SM2_EVENT_EXCHANGE_KEY_COMPLETE, /*Exchange key completed*/
 } sc_sm2_event_e;
 
 typedef struct {
@@ -70,14 +70,14 @@ typedef struct {
 #endif
 } sc_sm2_t;
 
-///< Pointer to \ref sc_sm2_callback_t : SM2 Event call back.
+/*Pointer to \ref sc_sm2_callback_t : SM2 Event call back.*/
 typedef void (*sc_sm2_callback_t)(sc_sm2_event_e event);
 
 /**
   \brief       Initialize SM2.
   \param[in]   sm2  sm2 handle to operate.
   \param[in]   idx  device id
-  \return      \ref uint32_t
+  \return      Error code \ref uint32_t
 */
 uint32_t sc_sm2_init(sc_sm2_t *sm2, uint32_t idx);
 
@@ -91,14 +91,13 @@ void sc_sm2_uninit(sc_sm2_t *sm2);
 /**
   \brief       sm2 get capability.
   \param[in]   sm2  Operate handle.
-  \return      \ref uint32_t
+  \return      Error code \ref uint32_t
 */
-uint32_t sc_sm2_config(sc_sm2_t *sm2, sc_sm2_cipher_order_e co,
-                       sc_sm2_endian_mode_e endian);
+uint32_t sc_sm2_config(sc_sm2_t *sm2, sc_sm2_cipher_order_e co, sc_sm2_endian_mode_e endian);
 
 /**
   \brief       Attach the callback handler to SM2
-  \param[in]   sm2  Operate handle.
+  \param[in]   sm2   Operate handle.
   \param[in]   cb    Callback function
   \param[in]   arg   User can define it by himself as callback's param
   \return      Error code \ref uint32_t
@@ -114,91 +113,92 @@ void sc_sm2_detach_callback(sc_sm2_t *sm2);
 /**
   \brief       sm2 get capability.
   \param[in]   sm2  Operate handle.
-  \param[out]   cap  Pointer of sc_sm2_capabilities_t.
-  \return      \ref uint32_t
+  \param[out]  cap  Pointer of sc_sm2_capabilities_t.
+  \return      Error code \ref uint32_t
 */
 uint32_t sc_sm2_get_capabilities(sc_sm2_t *sm2, sc_sm2_capabilities_t *cap);
 
-uint32_t sc_sm2_check_keypair(sc_sm2_t *sm2, uint8_t pubkey[65],
-                              uint8_t prikey[32]);
+/**
+  \brief       check whether the public key and private key are a pair.
+  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   private   Pointer to the sm2 private key, alloc by caller.
+  \param[in]   public    Pointer to the sm2 public key, alloc by caller.
+  \return      Error code \ref uint32_t
+*/
+uint32_t sc_sm2_check_keypair(sc_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
 
 /**
   \brief       generate sm2 key.
   \param[in]   sm2       sm2 handle to operate.
   \param[out]  private   Pointer to the sm2 private key, alloc by caller.
-  \param[out]  public   Pointer to the sm2 public key, alloc by caller.
-  \return      \ref uint32_t
+  \param[out]  public    Pointer to the sm2 public key, alloc by caller.
+  \return      Error code \ref uint32_t
 */
 uint32_t sc_sm2_gen_key(sc_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
 
 /**
   \brief       sm2 sign
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
-  \return      \ref uint32_t
+  \param[out]  s       Pointer to the signature
+  \return      Error code \ref uint32_t
 */
-uint32_t sc_sm2_sign(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32],
-                     uint8_t s[64]);
+uint32_t sc_sm2_sign(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
 
 /**
   \brief       sm2 sign
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
-  \return      \ref uint32_t
+  \param[out]  s       Pointer to the signature
+  \return      Error code \ref uint32_t
 */
-uint32_t sc_sm2_sign_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32],
-                           uint8_t s[64]);
+uint32_t sc_sm2_sign_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
 
 /* TODO */
 /**
   \brief       sm2 verify
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
+  \param[out]  s       Pointer to the signature
   \return      verify result
 */
-bool sc_sm2_verify(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
-                   uint8_t s[64]);
+bool sc_sm2_verify(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
 
 /**
   \brief       sm2 verify
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
+  \param[out]  s       Pointer to the signature
   \return      verify result
 */
-bool sc_sm2_verify_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
-                         uint8_t s[64]);
+bool sc_sm2_verify_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
 
 /**
   \brief       sm2 encrypto
-  \param[in]   sm2       sm2 handle to operate.
-  \param[in]   plain       Pointer to the plaintext.
-  \param[in]  PlainByteLen plaintext len
-  \param[in]  pubKey public key.
-  \param[out]  cipher Pointer to the chipher
-  \param[out]  cipher_byte_len Pointer to the chipher len.
-  \return      uint32_t
+  \param[in]   sm2              sm2 handle to operate.
+  \param[in]   plain            Pointer to the plaintext.
+  \param[in]   PlainByteLen     plaintext len
+  \param[in]   pubKey           public key.
+  \param[out]  cipher           Pointer to the chipher
+  \param[out]  cipher_byte_len  Pointer to the chipher len.
+  \return      Error code \ref uint32_t
 */
 uint32_t sc_sm2_encrypt(sc_sm2_t *sm2, uint8_t *plain, uint32_t plain_len,
-                        uint8_t pubKey[65], uint8_t *cipher,
-                        uint32_t *cipher_len);
+                        uint8_t pubKey[65], uint8_t *cipher, uint32_t *cipher_len);
 
 /**
   \brief       sm2 encrypto
-  \param[in]   sm2       sm2 handle to operate.
-  \param[in]  cipher Pointer to the chipher
-  \param[in]  CipherByteLen chipher len.
-  \param[in]  prikey private key.
-  \param[out]   plain       Pointer to the plaintext.
-  \param[out]  PlainByteLen plaintext len
-  \return      uint32_t
+  \param[in]   sm2              sm2 handle to operate.
+  \param[in]   cipher           Pointer to the chipher
+  \param[in]   CipherByteLen    chipher len.
+  \param[in]   prikey           private key.
+  \param[out]  plain            Pointer to the plaintext.
+  \param[out]  PlainByteLen     plaintext len
+  \return      Error code \ref uint32_t
 */
 uint32_t sc_sm2_decrypt(sc_sm2_t *sm2, uint8_t *cipher, uint32_t cipher_len,
                         uint8_t prikey[32], uint8_t *plain,
@@ -207,7 +207,7 @@ uint32_t sc_sm2_decrypt(sc_sm2_t *sm2, uint8_t *cipher, uint32_t cipher_len,
 /**
   \brief       sm2 key exchange
   \param[in]   sm2       sm2 handle to operate.
-  \return      uint32_t
+  \return      Error code \ref uint32_t
 */
 uint32_t sc_sm2_exchangekey(sc_sm2_t *sm2, sc_sm2_exchange_role_e role,
                             uint8_t *da, uint8_t *pb, uint8_t *ra1, uint8_t *ra,
@@ -218,7 +218,7 @@ uint32_t sc_sm2_exchangekey(sc_sm2_t *sm2, sc_sm2_exchange_role_e role,
 /**
   \brief       sm2 key exchange get Z.
   \param[in]   sm2       sm2 handle to operate.
-  \return      uint32_t
+  \return      Error code \ref uint32_t
 */
 uint32_t sc_sm2_getZ(sc_sm2_t *sm2, uint8_t *id, uint32_t id_len,
                      uint8_t pubkey[65], uint8_t z[32]);
@@ -226,10 +226,9 @@ uint32_t sc_sm2_getZ(sc_sm2_t *sm2, uint8_t *id, uint32_t id_len,
 /**
   \brief       sm2 key exchange get E
   \param[in]   sm2       sm2 handle to operate.
-  \return      uint32_t
+  \return      Error code \ref uint32_t
 */
-uint32_t sc_sm2_getE(sc_sm2_t *sm2, uint8_t *m, uint32_t len, uint8_t z[32],
-                     uint8_t e[32]);
+uint32_t sc_sm2_getE(sc_sm2_t *sm2, uint8_t *m, uint32_t len, uint8_t z[32], uint8_t e[32]);
 
 /**
   \brief       Get SM2 state.
@@ -240,7 +239,7 @@ uint32_t sc_sm2_getE(sc_sm2_t *sm2, uint8_t *m, uint32_t len, uint8_t z[32],
 uint32_t sc_sm2_get_state(sc_sm2_t *sm2, sc_sm2_state_t *state);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif

lib/sec_library/include/sec_crypto_sm4.h

@@ -25,6 +25,14 @@
 extern "C" {
 #endif
 
+/**
+\brief SM4 data transfer mode config
+*/
+typedef enum {
+    SC_SM4_SLAVE_MODE = 0U,         /*slave mode*/
+    SC_SM4_DMA_MODE,                /*dma mode*/
+} sc_sm4_trans_mode_t;
+
 /**
 \brief SM4 Ctrl Block
 */
@@ -49,6 +57,11 @@ uint32_t sc_sm4_init(sc_sm4_t *sm4, uint32_t idx);
 */
 void sc_sm4_uninit(sc_sm4_t *sm4);
 
+/**
+  \brief       Sm4 data transfer config
+*/
+uint32_t sc_sm4_trans_config(sc_sm4_t *sm4, sc_sm4_trans_mode_t mode);
+
 /**
   \brief       Set encrypt key
   \param[in]   sm4        handle to operate
@@ -234,7 +247,7 @@ uint32_t sc_sm4_ctr_decrypt(sc_sm4_t *sm4, uint8_t *in, uint8_t *out,
                               uint32_t size, uint8_t nonce_counter[16]);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif /* _SC_SM4_H_ */

lib/sec_library/include/sec_library.h

@@ -23,6 +23,10 @@
 #include "sec_crypto_kdf.h"
 #include "csi_efuse_api.h"
 #include "csi_efuse_api.h"
+#include "sec_crypto_des.h"
+#include "sec_crypto_dsa.h"
+#include "sec_crypto_ecc.h"
+#include "sec_crypto_ecdh.h"
 #include "csi_sec_img_verify.h"
 /* NOTE add more header */
 

lib/sec_library/include/sha.h

@@ -19,58 +19,81 @@
 extern "C" {
 #endif
 
-#define HASH_DATAIN_BLOCK_SIZE   64
+#define HASH_DATAIN_BLOCK_SIZE  (64)
 
-#define SHA1_DIGEST_OUT_SIZE     20
-#define SHA224_DIGEST_OUT_SIZE   28
-#define SHA256_DIGEST_OUT_SIZE   32
-#define SHA384_DIGEST_OUT_SIZE   48
-#define SHA512_DIGEST_OUT_SIZE   64
-#define MD5_DIGEST_OUT_SIZE      16
+#define SHA1_DIGEST_OUT_SIZE    (20)
+#define SHA224_DIGEST_OUT_SIZE  (28)
+#define SHA256_DIGEST_OUT_SIZE  (32)
+#define SHA384_DIGEST_OUT_SIZE  (48)
+#define SHA512_DIGEST_OUT_SIZE  (64)
+#define MD5_DIGEST_OUT_SIZE     (16)
+
+#define CSI_SHA256_MODE         (0x00000008)
+#define CSI_SHA224_MODE         (0x00000010)
+#define CSI_SHA384_MODE         (0x00000040)
+#define CSI_SHA512_MODE         (0x00000020)
+#define CSI_MD5_MODE            (0x00000002)
+#define CSI_SHA1_MODE           (0x00000004)
+
+#define CSI_SHA256_NEW_MODE     (0x00000009)
+#define CSI_SHA224_MEW_MODE     (0x00000011)
+#define CSI_SHA384_NEW_MODE     (0x00000041)
+#define CSI_SHA512_NEW_MODE     (0x00000021)
+#define CSI_MD5_NEW_MODE        (0x00000003)
+#define CSI_SHA1_NEW_MODE       (0x00000005)
+
+/**
+\brief SHA data transfer mode config
+*/
+typedef enum {
+    SHA_SLAVE_MODE = 0U,         /*slave mode*/
+    SHA_DMA_MODE,                /*dma mode*/
+} csi_sha_trans_mode_t;
 
 /****** SHA mode ******/
 typedef enum {
-    SHA_MODE_SHA1                 = 1U,   ///< SHA_1 mode
-    SHA_MODE_256,                         ///< SHA_256 mode
-    SHA_MODE_224,                         ///< SHA_224 mode
-    SHA_MODE_512,                         ///< SHA_512 mode
-    SHA_MODE_384,                         ///< SHA_384 mode
-    SHA_MODE_512_256,                     ///< SHA_512_256 mode
-    SHA_MODE_512_224,                     ///< SHA_512_224 mode
-    SHA_MODE_MD5                          ///< MD5 mode
+    SHA_MODE_SHA1                 = 1U,   /*SHA_1 mode*/
+    SHA_MODE_256,                         /*SHA_256 mode*/
+    SHA_MODE_224,                         /*SHA_224 mode*/
+    SHA_MODE_512,                         /*SHA_512 mode*/
+    SHA_MODE_384,                         /*SHA_384 mode*/
+    SHA_MODE_512_256,                     /*SHA_512_256 mode*/
+    SHA_MODE_512_224,                     /*SHA_512_224 mode*/
+    SHA_MODE_MD5                          /*MD5 mode*/
 } csi_sha_mode_t;
 
 /****** SHA State ******/
 typedef struct {
-    uint32_t busy             : 1;        ///< Calculate busy flag
-    uint32_t error            : 1;        ///< Calculate error flag
+    uint32_t busy             : 1;        /*Calculate busy flag*/
+    uint32_t error            : 1;        /*Calculate error flag*/
 } csi_sha_state_t;
 
 typedef struct {
-    csi_sha_mode_t  mode;                 ///< SHA mode
-    uint32_t        total[2];             ///< Number of bytes processed
-    uint32_t        state[16];            ///< Intermediate digest state
-    uint8_t         buffer[128];          ///< Data block being processed
-    uint8_t         result[64];           ///< Data block has processed
+    csi_sha_mode_t  mode;                 /*SHA mode*/
+    uint32_t        total[2];             /*Number of bytes processed*/
+    uint32_t        state[16];            /*Intermediate digest state*/
+    uint8_t         buffer[128];          /*Data block being processed*/
+    uint8_t         result[64];           /*Data block has processed*/
     uint32_t        process_len;
     uint32_t        digest_len;
+    uint32_t        is_dma;
 } csi_sha_context_t;
 
 /****** SHA Event ******/
 typedef enum {
-    SHA_EVENT_COMPLETE    = 0U,           ///< Calculate completed
+    SHA_EVENT_COMPLETE    = 0U,           /*Calculate completed*/
     SHA_EVENT_UPDATE,
     SHA_EVENT_START,
-    SHA_EVENT_ERROR                       ///< Calculate error
+    SHA_EVENT_ERROR                       /*Calculate error*/
 } csi_sha_event_t;
 
 typedef struct csi_sha csi_sha_t;
 
 struct csi_sha {
-    csi_dev_t               dev;                                          ///< SHA hw-device info
-    void (*callback)(csi_sha_t *sha, csi_sha_event_t event, void *arg);   ///< SHA event callback for user
-    void                    *arg;                                         ///< SHA custom designed param passed to evt_cb
-    csi_sha_state_t         state;                                        ///< SHA state
+    csi_dev_t               dev;                                          /*SHA hw-device info*/
+    void (*callback)(csi_sha_t *sha, csi_sha_event_t event, void *arg);   /*SHA event callback for user*/
+    void                    *arg;                                         /*SHA custom designed param passed to evt_cb*/
+    csi_sha_state_t         state;                                        /*SHA state*/
     void                    *priv;
 };
 
@@ -166,6 +189,13 @@ csi_error_t csi_sha_enable_pm(csi_sha_t *sha);
 */
 void csi_sha_disable_pm(csi_sha_t *sha);
 
+/**
+  \brief       Config SHA data transfer mode
+  \param[in]   mode    \ref csi_des_trans_mode_t 
+  \return      None
+*/
+csi_error_t csi_sha_trans_config(csi_sha_t *sha, csi_sha_context_t *context, csi_sha_trans_mode_t mode);
+
 #ifdef __cplusplus
 }
 #endif

lib/sec_library/include/sm2.h

@@ -20,8 +20,18 @@
 extern "C" {
 #endif
 
+#define CSI_SM2_PUBKEY_LEN      (65-1)
+#define CSI_SM2_PRIVKEY_LEN     (32)
+#define CSI_SM2_PUBKEYTMP_LEN   (65)
+#define CSI_SM2_RK_LEN          (32) /*random*/
+#define CSI_SM2_SIGNATURE_LEN   (64)
+#define CSI_SM2_DIGEST_LEN      (32)
+
+#define SM2_PRIME_CURVE_G_BYTES (64)
+#define SM2_PRIME_CURVE_N_BYTES (32)
+
 typedef struct {
-        uint32_t sm2_curve : 1; ///< supports 256bits curve
+        uint32_t sm2_curve : 1; /*supports 256bits curve*/
 } sm2_capabilities_t;
 
 /**
@@ -33,15 +43,15 @@ typedef enum {
 } sm2_cipher_order_e;
 
 typedef enum {
-        SM2_ENDIAN_LITTLE = 0, ///< Little Endian
-        SM2_ENDIAN_BIG         ///< Big Endian
+        SM2_ENDIAN_LITTLE = 0, /*Little Endian*/
+        SM2_ENDIAN_BIG         /*Big Endian*/
 } sm2_endian_mode_e;
 
 /**
 \brief SM2 status
 */
 typedef struct {
-        uint32_t busy : 1; ///< Calculate busy flag
+        uint32_t busy : 1; /*Calculate busy flag*/
 } csi_sm2_state_t;
 
 /**
@@ -51,12 +61,12 @@ typedef enum { SM2_Role_Sponsor = 0, SM2_Role_Responsor } sm2_exchange_role_e;
 
 /****** SM2 Event *****/
 typedef enum {
-        SM2_EVENT_MAKE_KEY_COMPLETE = 0, ///< Make key completed
-        SM2_EVENT_ENCRYPT_COMPLETE,      ///< Encrypt completed
-        SM2_EVENT_DECRYPT_COMPLETE,      ///< Decrypt completed
-        SM2_EVENT_SIGN_COMPLETE,         ///< Sign completed
-        SM2_EVENT_VERIFY_COMPLETE,       ///< Verify completed
-        SM2_EVENT_EXCHANGE_KEY_COMPLETE, ///< Exchange key completed
+        SM2_EVENT_MAKE_KEY_COMPLETE = 0, /*Make key completed*/
+        SM2_EVENT_ENCRYPT_COMPLETE,      /*Encrypt completed*/
+        SM2_EVENT_DECRYPT_COMPLETE,      /*Decrypt completed*/
+        SM2_EVENT_SIGN_COMPLETE,         /*Sign completed*/
+        SM2_EVENT_VERIFY_COMPLETE,       /*Verify completed*/
+        SM2_EVENT_EXCHANGE_KEY_COMPLETE, /*Exchange key completed*/
 } sm2_event_e;
 
 typedef struct {
@@ -67,7 +77,7 @@ typedef struct {
         void *          prim;
 } csi_sm2_t;
 
-///< Pointer to \ref csi_sm2_callback_t : SM2 Event call back.
+/*Pointer to \ref csi_sm2_callback_t : SM2 Event call back.*/
 typedef void (*csi_sm2_callback_t)(sm2_event_e event);
 
 /**
@@ -95,95 +105,96 @@ csi_error_t csi_sm2_config(csi_sm2_t *sm2, sm2_cipher_order_e co,
 
 /**
   \brief       Attach the callback handler to SM2
-  \param[in]   sm2  Operate handle.
+  \param[in]   sm2   Operate handle.
   \param[in]   cb    Callback function
   \param[in]   arg   User can define it by himself as callback's param
   \return      Error code \ref csi_error_t
 */
-csi_error_t csi_sm2_attach_callback(csi_sm2_t *sm2, csi_sm2_callback_t cb,
-                                    void *arg);
+csi_error_t csi_sm2_attach_callback(csi_sm2_t *sm2, csi_sm2_callback_t cb, void *arg);
 
 /**
   \brief       Detach the callback handler
   \param[in]   sm2  Operate handle.
+  \return      none
 */
 void csi_sm2_detach_callback(csi_sm2_t *sm2);
 
 /**
   \brief       sm2 get capability.
   \param[in]   sm2  Operate handle.
-  \param[out]   cap  Pointer of sm2_capabilities_t.
-  \return      \ref uint32_t
+  \param[out]  cap  Pointer of sm2_capabilities_t.
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_sm2_get_capabilities(csi_sm2_t *sm2, sm2_capabilities_t *cap);
 
-csi_error_t csi_sm2_check_keypair(csi_sm2_t *sm2, uint8_t pubkey[65],
-                                  uint8_t prikey[32]);
+/**
+  \brief       check whether the public key and private key are a pair.
+  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   private   Pointer to the sm2 private key, alloc by caller.
+  \param[in]   public    Pointer to the sm2 public key, alloc by caller.
+  \return      Error code \ref csi_error_t
+*/
+csi_error_t csi_sm2_check_keypair(csi_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
 
 /**
   \brief       generate sm2 key.
   \param[in]   sm2       sm2 handle to operate.
   \param[out]  private   Pointer to the sm2 private key, alloc by caller.
-  \param[out]  public   Pointer to the sm2 public key, alloc by caller.
-  \return      \ref uint32_t
+  \param[out]  public    Pointer to the sm2 public key, alloc by caller.
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_sm2_gen_key(csi_sm2_t *sm2, uint8_t pubkey[65],
-                            uint8_t prikey[32]);
+csi_error_t csi_sm2_gen_key(csi_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
 
 /**
   \brief       sm2 sign
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
-  \return      \ref uint32_t
+  \param[out]  s       Pointer to the signature
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_sm2_sign(csi_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32],
-                         uint8_t s[64]);
+csi_error_t csi_sm2_sign(csi_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
 
 /**
   \brief       sm2 sign
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
-  \return      \ref uint32_t
+  \param[out]  s       Pointer to the signature
+  \return      Error code \ref csi_error_t
 */
-csi_error_t csi_sm2_sign_async(csi_sm2_t *sm2, uint8_t d[32],
-                               uint8_t prikey[32], uint8_t s[64]);
+csi_error_t csi_sm2_sign_async(csi_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
 
 /* TODO */
 /**
   \brief       sm2 verify
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
+  \param[out]  s       Pointer to the signature
   \return      verify result
 */
-bool csi_sm2_verify(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
-                    uint8_t s[64]);
+bool csi_sm2_verify(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
 
 /**
   \brief       sm2 verify
-  \param[in]   sm2       sm2 handle to operate.
+  \param[in]   sm2     sm2 handle to operate.
   \param[in]   d       Pointer to the digest.
   \param[out]  privkey Pointer to the private key
-  \param[out]  s Pointer to the signature
+  \param[out]  s       Pointer to the signature
   \return      verify result
 */
-bool csi_sm2_verify_async(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
-                          uint8_t s[64]);
+bool csi_sm2_verify_async(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
 
 /**
   \brief       sm2 encrypto
-  \param[in]   sm2       sm2 handle to operate.
-  \param[in]   Plain       Pointer to the plaintext.
-  \param[in]  PlainByteLen plaintext len
-  \param[in]  pubKey public key.
-  \param[out]  Cipher Pointer to the chipher
+  \param[in]   sm2           sm2 handle to operate.
+  \param[in]   Plain         Pointer to the plaintext.
+  \param[in]   PlainByteLen  plaintext len
+  \param[in]   pubKey        public key.
+  \param[out]  Cipher        Pointer to the chipher
   \param[out]  CipherByteLen Pointer to the chipher len.
-  \return      uint32_t
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_sm2_encrypt(csi_sm2_t *sm2, uint8_t *Plain,
                             uint32_t PlainByteLen, uint8_t pubKey[65],
@@ -191,13 +202,13 @@ csi_error_t csi_sm2_encrypt(csi_sm2_t *sm2, uint8_t *Plain,
 
 /**
   \brief       sm2 encrypto
-  \param[in]   sm2       sm2 handle to operate.
-  \param[in]  Cipher Pointer to the chipher
-  \param[in]  CipherByteLen chipher len.
-  \param[in]  prikey private key.
-  \param[out]   Plain       Pointer to the plaintext.
-  \param[out]  PlainByteLen plaintext len
-  \return      uint32_t
+  \param[in]   sm2           sm2 handle to operate.
+  \param[in]   Cipher        Pointer to the chipher
+  \param[in]   CipherByteLen chipher len.
+  \param[in]   prikey        private key.
+  \param[out]  Plain         Pointer to the plaintext.
+  \param[out]  PlainByteLen  plaintext len
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_sm2_decrypt(csi_sm2_t *sm2, uint8_t *Cipher,
                             uint32_t CipherByteLen, uint8_t prikey[32],
@@ -206,7 +217,7 @@ csi_error_t csi_sm2_decrypt(csi_sm2_t *sm2, uint8_t *Cipher,
 /**
   \brief       sm2 key exchange
   \param[in]   sm2       sm2 handle to operate.
-  \return      uint32_t
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_sm2_exchangekey(csi_sm2_t *sm2, sm2_exchange_role_e role,
                                 uint8_t *dA, uint8_t *PB, uint8_t *rA,
@@ -217,7 +228,7 @@ csi_error_t csi_sm2_exchangekey(csi_sm2_t *sm2, sm2_exchange_role_e role,
 /**
   \brief       sm2 key exchange get Z.
   \param[in]   sm2       sm2 handle to operate.
-  \return      uint32_t
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_sm2_getZ(csi_sm2_t *sm2, uint8_t *ID, uint32_t byteLenofID,
                          uint8_t pubKey[65], uint8_t Z[32]);
@@ -225,7 +236,7 @@ csi_error_t csi_sm2_getZ(csi_sm2_t *sm2, uint8_t *ID, uint32_t byteLenofID,
 /**
   \brief       sm2 key exchange get E
   \param[in]   sm2       sm2 handle to operate.
-  \return      uint32_t
+  \return      Error code \ref csi_error_t
 */
 csi_error_t csi_sm2_getE(csi_sm2_t *sm2, uint8_t *M, uint32_t byteLen,
                          uint8_t Z[32], uint8_t E[32]);
@@ -252,7 +263,7 @@ csi_error_t csi_sm2_enable_pm(csi_sm2_t *sm2);
 void csi_sm2_disable_pm(csi_sm2_t *sm2);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif

lib/sec_library/include/sm3.h

@@ -20,49 +20,49 @@
 extern "C" {
 #endif
 
-#define SM3_DATAIN_BLOCK_SIZE 64
-#define SM3_DIGEST_OUT_SIZE   32
+#define SM3_DATAIN_BLOCK_SIZE (64)
+#define SM3_DIGEST_OUT_SIZE   (32)
 
 typedef struct {
-    uint32_t total[2];   ///< Number of bytes processed
-    uint32_t state[16];  ///< Intermediate digest state
-    uint8_t  buffer[SM3_DATAIN_BLOCK_SIZE]; ///< Data block  beingprocessed
-    uint8_t  result[SM3_DIGEST_OUT_SIZE]; ///< Data block has processed
+    uint32_t total[2];                      /*Number of bytes processed*/
+    uint32_t state[16];                     /*Intermediate digest state*/
+    uint8_t  buffer[SM3_DATAIN_BLOCK_SIZE]; /*Data block  beingprocessed*/
+    uint8_t  result[SM3_DIGEST_OUT_SIZE];   /*Data block has processed*/
 } csi_sm3_context_t;
 
 /****** SM3 State ******/
 typedef struct {
-    uint32_t busy             : 1;        ///< Calculate busy flag
-    uint32_t error            : 1;        ///< Calculate error flag
+    uint32_t busy             : 1;          /*Calculate busy flag*/
+    uint32_t error            : 1;          /*Calculate error flag*/
 } csi_sm3_state_t;
 
 
 /****** SM3 Event ******/
 typedef enum {
-    SM3_EVENT_COMPLETE = 0U, ///< Calculate completed
+    SM3_EVENT_COMPLETE = 0U,        /*Calculate completed*/
     SM3_EVENT_UPDATE,
     SM3_EVENT_START,
-    SM3_EVENT_ERROR          ///< Calculate error
+    SM3_EVENT_ERROR                 /*Calculate error*/
 } csi_sm3_event_t;
 
 typedef struct csi_sm3_t csi_sm3_t;
 
 struct csi_sm3_t {
-    csi_dev_t dev; ///< SM3 hw-device info
+    csi_dev_t dev;                  /*SM3 hw-device info*/
     void (*callback)(csi_sm3_t *sm3, csi_sm3_event_t event,
-                        void *arg); ///< SM3 event callback for user
-    void *          arg;    ///< SM3 custom designed param passed to evt_cb
-    csi_sm3_state_t state;  ///< SM3 state
+                        void *arg); /*SM3 event callback for user*/
+    void *          arg;            /*SM3 custom designed param passed to evt_cb*/
+    csi_sm3_state_t state;          /*SM3 state*/
     void *          priv;
 };
 
-// Function documentation
+/*Function documentation*/
 
 /**
   \brief       Initialize SM3 Interface. Initializes the resources needed for the SM3 interface
   \param[in]   sm3  operate handle.
   \param[in]   idx index of sm3
-  \return      error code \ref uint32_t
+  \return      error code \ref csi_error_t
 */
 csi_error_t csi_sm3_init(csi_sm3_t *sm3, uint32_t idx);
 
@@ -93,7 +93,7 @@ void csi_sm3_detach_callback(csi_sm3_t *sm3);
   \brief       start the engine
   \param[in]   sm3     sm3 handle to .operate
   \param[in]   context Pointer to the sm3 context \ref csi_sm3_context_t
-  \return      error code \ref uint32_t
+  \return      error code \ref csi_error_t
 */
 csi_error_t csi_sm3_start(csi_sm3_t *sm3, csi_sm3_context_t *context);
 
@@ -103,10 +103,9 @@ csi_error_t csi_sm3_start(csi_sm3_t *sm3, csi_sm3_context_t *context);
   \param[in]   context Pointer to the sm3 context \ref csi_sm3_context_t
   \param[in]   input   Pointer to the Source data
   \param[in]   size    the data size
-  \return      error code \ref uint32_t
+  \return      error code \ref csi_error_t
 */
-csi_error_t csi_sm3_update(csi_sm3_t *sm3, csi_sm3_context_t *context,
-                           const uint8_t *input, uint32_t size);
+csi_error_t csi_sm3_update(csi_sm3_t *sm3, csi_sm3_context_t *context, const uint8_t *input, uint32_t size);
 
 /**
   \brief       Accumulate the engine (async mode)
@@ -116,8 +115,7 @@ csi_error_t csi_sm3_update(csi_sm3_t *sm3, csi_sm3_context_t *context,
   \param[in]   size       The data size
   \return      Error code \ref csi_error_t
 */
-csi_error_t csi_sm3_update_async(csi_sm3_t *sm3, csi_sm3_context_t *context,
-                                 const uint8_t *input, uint32_t size);
+csi_error_t csi_sm3_update_async(csi_sm3_t *sm3, csi_sm3_context_t *context, const uint8_t *input, uint32_t size);
 
 /**
   \brief       finish the engine
@@ -125,10 +123,9 @@ csi_error_t csi_sm3_update_async(csi_sm3_t *sm3, csi_sm3_context_t *context,
   \param[in]   context  Pointer to the sm3 context \ref csi_sm3_context_t
   \param[out]  output   Pointer to the result data
   \param[out]  out_size Pointer to the result data size(bytes)
-  \return      error code \ref uint32_t
+  \return      error code \ref csi_error_t
 */
-csi_error_t csi_sm3_finish(csi_sm3_t *sm3, csi_sm3_context_t *context,
-                           uint8_t *output, uint32_t *out_size);
+csi_error_t csi_sm3_finish(csi_sm3_t *sm3, csi_sm3_context_t *context, uint8_t *output, uint32_t *out_size);
 
 /**
   \brief       Get SM3 state
@@ -153,7 +150,7 @@ csi_error_t csi_sm3_enable_pm(csi_sm3_t *sm3);
 void csi_sm3_disable_pm(csi_sm3_t *sm3);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif //_DRV_SM3_H

lib/sec_library/include/sm4.h

@@ -20,9 +20,32 @@
 extern "C" {
 #endif
 
-#define SM4_KEY_LEN_BYTES_32 32
-#define SM4_KEY_LEN_BYTES_24 24
-#define SM4_KEY_LEN_BYTES_16 16
+#define SM4_KEY_LEN_BYTES_32 (32)
+#define SM4_KEY_LEN_BYTES_24 (24)
+#define SM4_KEY_LEN_BYTES_16 (16)
+
+#define SM4_KEY_128_BITS     (0x08)
+#define SM4_KEY_192_BITS     (0x10)
+#define SM4_KEY_256_BITS     (0x18)
+
+#define SM4_IV_LEN_BYTES_16   (16)
+#define SM4_BLOCK_CRYPTO_SIZE (16)
+
+#define SM4_DIR_ENCRYPT       (1)
+#define SM4_DIR_DECRYPT       (0)
+
+/**
+\brief SM4 data transfer mode config
+*/
+typedef enum {
+    SM4_SLAVE_MODE = 0U,         /*slave mode*/
+    SM4_DMA_MODE,                /*dma mode*/
+} csi_sm4_trans_mode_t;
+
+typedef enum{
+    SM4_MODE_ECB = 0,
+    SM4_MODE_CBC = 0x20000020,
+} csi_sm4_mode_t;
 
 typedef enum {
     SM4_KEY_LEN_BITS_128        = 0,       /*128 Data bits*/
@@ -30,14 +53,15 @@ typedef enum {
 } csi_sm4_key_bits_t;
 
 typedef struct {
-    uint32_t busy             : 1;        ///< Calculate busy flag
-    uint32_t error            : 1;        ///< Calculate error flag
+    uint32_t busy             : 1;        /*Calculate busy flag*/
+    uint32_t error            : 1;        /*Calculate error flag*/
 } csi_sm4_state_t;
 
 typedef struct {
     uint32_t            key_len_byte;
-    uint8_t             key[32];          ///< Data block being processed
+    uint8_t             key[32];          /*Data block being processed*/
     uint32_t            sca;
+    uint32_t            is_dma;
 } csi_sm4_context_t;
 
 /**
@@ -51,7 +75,7 @@ typedef struct {
     uint32_t          is_kdf;
 } csi_sm4_t;
 
-// Function documentation
+/*Function documentation*/
 /**
   \brief       Initialize sm4 Interface. Initializes the resources needed for the sm4 interface
   \param[in]   sm4    operate handle
@@ -67,6 +91,13 @@ csi_error_t csi_sm4_init(csi_sm4_t *sm4, uint32_t idx);
 */
 void csi_sm4_uninit(csi_sm4_t *sm4);
 
+/**
+  \brief       Config SM4 data transfer mode
+  \param[in]   mode    \ref csi_sm4_trans_mode_t 
+  \return      error code \ref csi_error_t
+*/
+csi_error_t csi_sm4_trans_config(csi_sm4_t *aes, csi_sm4_trans_mode_t mode);
+
 /**
   \brief       Set encrypt key
   \param[in]   sm4        handle to operate
@@ -91,8 +122,7 @@ csi_error_t csi_sm4_set_decrypt_key(csi_sm4_t *sm4, uint8_t *key, csi_sm4_key_bi
   \param[in]   size    the Source data size
   \return      error code \ref uint32_t
 */
-csi_error_t csi_sm4_ecb_encrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out,
-                                uint32_t size);
+csi_error_t csi_sm4_ecb_encrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out, uint32_t size);
 
 /**
   \brief       sm4 ecb decrypt
@@ -102,8 +132,7 @@ csi_error_t csi_sm4_ecb_encrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out,
   \param[in]   size    the Source data size
   \return      error code \ref uint32_t
 */
-csi_error_t csi_sm4_ecb_decrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out,
-                                uint32_t size);
+csi_error_t csi_sm4_ecb_decrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out, uint32_t size);
 
 /**
   \brief       sm4 cbc encrypt
@@ -266,7 +295,7 @@ csi_error_t csi_sm4_enable_pm(csi_sm4_t *sm4);
 void csi_sm4_disable_pm(csi_sm4_t *sm4);
 
 #ifdef __cplusplus
-extern "C" {
+}
 #endif
 
 #endif // _DRV_SM4_H_

run.sh

@@ -1,4 +1,4 @@
 #!/bin/sh
 
-make ARCH=riscv CROSS_COMPILE=~/toolchain/riscv-linux/bin/riscv64-unknown-linux-gnu- -j
+make ARCH=riscv CROSS_COMPILE=/home/cxx194832/toolchain/riscv-linux/bin/riscv64-unknown-linux-gnu-  -j BUILD_TYPE=RELEASE
 

scripts/dtc/dtc-lexer.l

@@ -38,7 +38,7 @@ LINECOMMENT	"//".*\n
 #include "srcpos.h"
 #include "dtc-parser.tab.h"
 
-YYLTYPE yylloc;
+extern YYLTYPE yylloc;
 extern bool treesource_error;
 
 /* CAUTION: this will stop working if we ever use yyless() or yyunput() */

tools/Makefile

@@ -238,6 +238,10 @@ LOGO-$(CONFIG_VIDEO_LOGO) += $(LOGO_H)
 LOGO-$(CONFIG_VIDEO_LOGO) += $(LOGO_DATA_H)
 
 # Generic logo
+ifeq ($(CONFIG_VIDEO_LCD_CUSTOM_LOGO),y)
+LOGO_BMP= $(srctree)/$(src)/logos/custom.bmp
+else
+
 ifeq ($(LOGO_BMP),)
 LOGO_BMP= $(srctree)/$(src)/logos/denx.bmp
 
@@ -252,6 +256,8 @@ endif
 
 endif # !LOGO_BMP
 
+endif
+
 #
 # Use native tools and options
 # Define __KERNEL_STRICT_NAMES to prevent typedef overlaps