mirror of
https://github.com/revyos/th1520-vendor-uboot.git
synced 2026-06-21 17:12:31 +02:00
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1 Commits
Linux_SDK_
...
develop
| Author | SHA1 | Date | |
|---|---|---|---|
|
51a2c4f060 |
@@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_ICE_C910) += ice-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
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dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb
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dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb
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targets += $(dtb-y)
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488
arch/riscv/dts/light-lpi4a.dts
Normal file
488
arch/riscv/dts/light-lpi4a.dts
Normal file
@@ -0,0 +1,488 @@
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/dts-v1/;
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/ {
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model = "T-HEAD c910 light";
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compatible = "thead,c910_light";
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#address-cells = <2>;
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#size-cells = <2>;
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xc0000000 0x0 0x40000000>;
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};
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aliases {
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spi0 = &spi0;
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spi1 = &qspi0;
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spi2 = &qspi1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <3000000>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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device_type = "cpu";
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reg = <0>;
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status = "okay";
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compatible = "riscv";
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riscv,isa = "rv64imafdcvsu";
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mmu-type = "riscv,sv39";
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u-boot,dm-pre-reloc;
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};
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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u-boot,dm-pre-reloc;
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intc: interrupt-controller@ffd8000000 {
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compatible = "riscv,plic0";
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reg = <0xff 0xd8000000 0x0 0x04000000>;
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status = "disabled";
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};
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dummy_apb: apb-clock {
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compatible = "fixed-clock";
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clock-frequency = <62500000>;
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clock-output-names = "dummy_apb";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_ahb: ahb-clock {
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compatible = "fixed-clock";
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clock-frequency = <250000000>;
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clock-output-names = "core";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_spi: spi-clock {
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compatible = "fixed-clock";
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clock-frequency = <396000000>;
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clock-output-names = "dummy_spi";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_qspi0: qspi0-clock {
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compatible = "fixed-clock";
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clock-frequency = <792000000>;
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clock-output-names = "dummy_qspi0";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_uart_sclk: uart-sclk-clock {
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "dummy_uart_sclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_i2c_icclk: i2c-icclk-clock {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "dummy_i2c_icclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dpu_pixclk: dpu-pix-clock {
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compatible = "fixed-clock";
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clock-frequency = <74250000>;
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clock-output-names = "dummy_dpu_pixclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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dummy_dphy_refclk: dphy-ref-clock {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "dummy_dpu_refclk";
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#clock-cells = <0>;
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u-boot,dm-pre-reloc;
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};
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i2c0: i2c@ffe7f20000 {
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f20000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c1: i2c@ffe7f24000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f24000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c2: i2c@ffec00c000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xec00c000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c3: i2c@ffec014000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xec014000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c4: i2c@ffe7f28000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xe7f28000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcal6408ahk_a: gpio@20 {
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compatible = "nxp,pca9554";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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i2c5: i2c@fff7f2c000{
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compatible = "snps,designware-i2c";
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reg = <0xff 0xf7f2c000 0x0 0x4000>;
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clocks = <&dummy_i2c_icclk>;
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clock-frequency = <100000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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serial@ffe7014000 {
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compatible = "snps,dw-apb-uart";
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reg = <0xff 0xe7014000 0x0 0x400>;
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clocks = <&dummy_uart_sclk>;
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clock-frequency = <100000000>;
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clock-names = "baudclk";
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reg-shift = <2>;
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reg-io-width = <4>;
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u-boot,dm-pre-reloc;
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};
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gmac0: ethernet@ffe7070000 {
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compatible = "snps,dwmac";
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reg = <0xff 0xe7070000 0x0 0x2000>;
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clocks = <&dummy_apb>;
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clock-names = "stmmaceth";
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snps,pbl = <32>;
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snps,fixed-burst;
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phy-mode = "rgmii-id";
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phy-handle = <&phy_88E1111_a>;
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status = "okay";
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy_88E1111_a: ethernet-phy@1 {
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reg = <0x1>;
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};
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phy_88E1111_b: ethernet-phy@2 {
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reg = <0x2>;
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};
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};
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};
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gmac1: ethernet@ffe7060000 {
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compatible = "snps,dwmac";
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reg = <0xff 0xe7060000 0x0 0x2000>;
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clocks = <&dummy_apb>;
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clock-names = "stmmaceth";
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snps,pbl = <32>;
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snps,fixed-burst;
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phy-mode = "rgmii-id";
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phy-handle = <&phy_88E1111_b>;
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status = "okay";
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};
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emmc: sdhci@ffe7080000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7080000 0x0 0x10000>;
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index = <0x0>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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clock-names = "core";
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max-frequency = <198000000>;
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sdhci-caps-mask = <0x0 0x1000000>;
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mmc-hs400-1_8v;
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non-removable;
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no-sdio;
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no-sd;
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bus-width = <8>;
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voltage= "1.8v";
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pull_up;
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io_fixed_1v8;
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fifo-mode;
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u-boot,dm-pre-reloc;
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};
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sdhci0: sd@ffe7090000 {
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compatible = "snps,dwcmshc-sdhci";
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reg = <0xff 0xe7090000 0x0 0x10000>;
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index = <0x1>;
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clocks = <&dummy_ahb>;
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clock-frequency = <198000000>;
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max-frequency = <198000000>;
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sd-uhs-sdr104;
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pull_up;
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||||
clock-names = "core";
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bus-width = <4>;
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voltage= "3.3v";
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};
|
||||
|
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qspi0: spi@ffea000000 {
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compatible = "snps,dw-apb-ssi-quad";
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reg = <0xff 0xea000000 0x0 0x1000>;
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||||
clocks = <&dummy_qspi0>;
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||||
num-cs = <1>;
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||||
cs-gpio = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
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spi-max-frequency = <100000000>;
|
||||
#address-cells = <1>;
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||||
#size-cells =<0>;
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||||
spi-flash@0 {
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#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
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||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi1: spi@fff8000000 {
|
||||
compatible = "snps,dw-apb-ssi-quad";
|
||||
reg = <0xff 0xf8000000 0x0 0x1000>;
|
||||
clocks = <&dummy_spi>;
|
||||
num-cs = <1>;
|
||||
cs-gpio = <&gpio0_porta 1 0>; // GPIO_ACTIVE_HIGH: 0
|
||||
spi-max-frequency = <66000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells =<0>;
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@ffe700c000 {
|
||||
compatible = "snps,dw-apb-ssi";
|
||||
reg = <0xff 0xe700c000 0x0 0x1000>;
|
||||
clocks = <&dummy_spi>;
|
||||
cs-gpio = <&gpio2_porta 15 0>;
|
||||
spi-max-frequency = <100000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio2: gpio@ffe7f34000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xff 0xe7f34000 0x0 0x1000>;
|
||||
clocks = <&dummy_apb>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio2_porta: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@ffec005000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xff 0xec005000 0x0 0x1000>;
|
||||
clocks = <&dummy_apb>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio0_porta: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio1: gpio@ffec006000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xff 0xec006000 0x0 0x1000>;
|
||||
clocks = <&dummy_apb>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio1_porta: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm: pwm@ffec01c000 {
|
||||
compatible = "thead,pwm-light";
|
||||
reg = <0xff 0xec01c000 0x0 0x4000>;
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
dsi_regs: dsi-controller@ffef500000 {
|
||||
compatible = "thead,light-dsi-regs", "syscon";
|
||||
reg = <0xff 0xef500000 0x0 0x10000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
vosys_regs: vosys@ffef528000 {
|
||||
compatible = "thead,light-vo-subsys", "syscon";
|
||||
reg = <0xff 0xef528000 0x0 0x1000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dpu: dc8200@ffef600000 {
|
||||
compatible = "verisilicon,dc8200";
|
||||
reg = <0xff 0xef600000 0x0 0x100>;
|
||||
};
|
||||
|
||||
axiscr {
|
||||
compatible = "thead,axiscr";
|
||||
reg = <0xff 0xff004000 0x0 0x1000>;
|
||||
lock-read = "okay";
|
||||
lock-write = "okay";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
axiscr0: axisrc@0 {
|
||||
device_type = "axiscr";
|
||||
region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
axiscr1: axisrc@1 {
|
||||
device_type = "axiscr";
|
||||
region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
axiscr2: axisrc@2 {
|
||||
device_type = "axiscr";
|
||||
region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
axiparity {
|
||||
compatible = "thead,axiparity";
|
||||
reg = <0xff 0xff00c000 0x0 0x1000>;
|
||||
lock = "okay";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
axiparity0: axiparity@0 {
|
||||
device_type = "axiparity";
|
||||
region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
axiparity1: axiparity@1 {
|
||||
device_type = "axiparity";
|
||||
region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
dsi_bridge: dsi-bridge {
|
||||
compatible = "thead,light-dsi-bridge";
|
||||
clocks = <&dummy_dpu_pixclk>;
|
||||
clock-names = "pix-clk";
|
||||
phys = <&dsi_dphy>;
|
||||
phy-names = "dphy";
|
||||
};
|
||||
|
||||
dsi_host: dsi-host {
|
||||
compatible = "synopsys,dw-mipi-dsi";
|
||||
regmap = <&dsi_regs>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dsi_dphy: dsi-dphy {
|
||||
compatible = "synopsys,dw-dphy";
|
||||
regmap = <&dsi_regs>;
|
||||
vosys-regmap = <&vosys_regs>;
|
||||
clocks = <&dummy_dpu_pixclk>, <&dummy_dphy_refclk>;
|
||||
clock-names = "pix-clk", "ref-clk";
|
||||
#phy-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
lcd_backlight: pwm-backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
};
|
||||
|
||||
ili9881c_panel {
|
||||
compatible = "ilitek,ili9881c";
|
||||
backlight = <&lcd_backlight>;
|
||||
reset-gpios = <&gpio1_porta 5 1>; /* active low */
|
||||
lcd-en-gpios = <&pcal6408ahk_a 2 0>; /* active high */
|
||||
lcd-bias-en-gpios = <&pcal6408ahk_a 4 0>;/* active high */
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
stdout-path = "/soc/serial@ffe7014000:115200";
|
||||
};
|
||||
};
|
||||
@@ -5,9 +5,21 @@
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define AONSYS_RSTGEN_BASE ((void __iomem *)0xFFFFF44000UL)
|
||||
#define REG_RST_REQ_EN_0 (AONSYS_RSTGEN_BASE + 0x140)
|
||||
#define WDT0_SYS_RST_REQ (1 << 8)
|
||||
|
||||
static __attribute__((naked))void sys_wdt_reset(void)
|
||||
{
|
||||
uint32_t data;
|
||||
|
||||
/* wdt0 reset enable */
|
||||
data = readl(REG_RST_REQ_EN_0);
|
||||
data |= WDT0_SYS_RST_REQ;
|
||||
writel(data, REG_RST_REQ_EN_0);
|
||||
|
||||
asm volatile (
|
||||
"1: \n\r"
|
||||
"li a0, 0xFFEFC30000 \n\r"
|
||||
@@ -21,7 +33,7 @@ static __attribute__((naked))void sys_wdt_reset(void)
|
||||
|
||||
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
printf("resetting ...\n");
|
||||
printf("resetting ...\n");
|
||||
|
||||
sys_wdt_reset();
|
||||
hang();
|
||||
|
||||
@@ -84,6 +84,10 @@ config TARGET_LIGHT_FM_C910_BEAGLE
|
||||
bool "light fullmask for beagle board "
|
||||
default n
|
||||
|
||||
config TARGET_LIGHT_FM_C910_LPI4A
|
||||
bool "light fullmask for Lichee Pi 4A board "
|
||||
default n
|
||||
|
||||
config TARGET_LIGHT_FM_C910_B_POWER
|
||||
bool "light fullmask for light-b-power board "
|
||||
default n
|
||||
|
||||
@@ -153,13 +153,16 @@ int csi_tf_get_image_version(unsigned int *ver)
|
||||
{
|
||||
char runcmd[64] = {0};
|
||||
unsigned char blkdata[256];
|
||||
int ret = 0;
|
||||
|
||||
/* tf version reside in RPMB block#0, offset#16*/
|
||||
sprintf(runcmd, "mmc rpmb read 0x%lx 0 1", (unsigned long)blkdata);
|
||||
run_command(runcmd, 0);
|
||||
*ver = (blkdata[16] << 8) + blkdata[17];
|
||||
|
||||
return 0;
|
||||
ret = run_command(runcmd, 0);
|
||||
if (ret == 0) {
|
||||
*ver = (blkdata[16] << 8) + blkdata[17];
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int csi_tf_set_image_version(unsigned int ver)
|
||||
@@ -203,13 +206,16 @@ int csi_tee_get_image_version(unsigned int *ver)
|
||||
{
|
||||
char runcmd[64] = {0};
|
||||
unsigned char blkdata[256];
|
||||
int ret = 0;
|
||||
|
||||
/* tf version reside in RPMB block#0, offset#0*/
|
||||
sprintf(runcmd, "mmc rpmb read 0x%lx 0 1", (unsigned long)blkdata);
|
||||
run_command(runcmd, 0);
|
||||
*ver = (blkdata[0] << 8) + blkdata[1];
|
||||
ret = run_command(runcmd, 0);
|
||||
if (ret == 0) {
|
||||
*ver = (blkdata[0] << 8) + blkdata[1];
|
||||
}
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
int csi_kernel_get_image_version(unsigned int *ver)
|
||||
@@ -691,10 +697,22 @@ void sec_firmware_version_dump(void)
|
||||
unsigned int tf_ver = 0;
|
||||
unsigned int tee_ver = 0;
|
||||
unsigned int uboot_ver = 0;
|
||||
unsigned int tf_ver_env = 0;
|
||||
unsigned int tee_ver_env = 0;
|
||||
|
||||
csi_uboot_get_image_version(&uboot_ver);
|
||||
csi_tf_get_image_version(&tf_ver);
|
||||
csi_tee_get_image_version(&tee_ver);
|
||||
/* Keep sync with version in RPMB, the Following version could be leveraged by OTA client */
|
||||
tee_ver_env = env_get_hex("tee_version", 0);
|
||||
tf_ver_env = env_get_hex("tf_version", 0);
|
||||
if ((tee_ver_env != tee_ver) && (tee_ver != 0)) {
|
||||
env_set_hex("tee_version", tee_ver);
|
||||
}
|
||||
|
||||
if ((tf_ver_env != tf_ver) && (tf_ver != 0)) {
|
||||
env_set_hex("tf_version", tf_ver);
|
||||
}
|
||||
|
||||
printf("\n\n");
|
||||
printf("Secure Firmware image version info: \n");
|
||||
@@ -708,6 +726,8 @@ void sec_upgrade_thread(void)
|
||||
{
|
||||
const unsigned long temp_addr=0x200000;
|
||||
char runcmd[80];
|
||||
uint8_t * image_buffer = NULL;
|
||||
uint8_t * image_malloc_buffer = NULL;
|
||||
int ret = 0;
|
||||
unsigned int sec_upgrade_flag = 0;
|
||||
unsigned int upgrade_file_size = 0;
|
||||
@@ -732,6 +752,15 @@ void sec_upgrade_thread(void)
|
||||
upgrade_file_size = env_get_hex("filesize", 0);
|
||||
printf("upgrade file size: %d\n", upgrade_file_size);
|
||||
|
||||
/*store image to temp buffer as temp_addr may be decrypted*/
|
||||
image_malloc_buffer = malloc(upgrade_file_size);
|
||||
if ( image_malloc_buffer == NULL ) {
|
||||
image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
|
||||
} else {
|
||||
image_buffer = image_malloc_buffer;
|
||||
}
|
||||
memcpy(image_buffer, temp_addr, upgrade_file_size);
|
||||
|
||||
/* STEP 2: verify its authentiticy here */
|
||||
sprintf(runcmd, "vimage 0x%p tf", (void *)temp_addr);
|
||||
printf("runcmd:%s\n", runcmd);
|
||||
@@ -743,7 +772,7 @@ void sec_upgrade_thread(void)
|
||||
|
||||
/* STEP 3: update tf partition */
|
||||
printf("read upgrade image (trust_firmware.bin) into tf partition \n");
|
||||
sprintf(runcmd, "ext4write mmc 0:3 0x%p /trust_firmware.bin 0x%x", (void *)temp_addr, upgrade_file_size);
|
||||
sprintf(runcmd, "ext4write mmc 0:3 0x%p /trust_firmware.bin 0x%x", (void *)image_buffer, upgrade_file_size);
|
||||
printf("runcmd:%s\n", runcmd);
|
||||
ret = run_command(runcmd, 0);
|
||||
if (ret != 0) {
|
||||
@@ -765,6 +794,10 @@ _upgrade_tf_exit:
|
||||
run_command("saveenv", 0);
|
||||
run_command("reset", 0);
|
||||
|
||||
if ( image_malloc_buffer != NULL ) {
|
||||
free(image_malloc_buffer);
|
||||
image_malloc_buffer = NULL;
|
||||
}
|
||||
} else if (sec_upgrade_flag == TEE_SEC_UPGRADE_FLAG) {
|
||||
|
||||
/* STEP 1: read upgrade image (tee.bin) from stash partition */
|
||||
@@ -779,6 +812,15 @@ _upgrade_tf_exit:
|
||||
/* Fetch the total file size after read out operation end */
|
||||
upgrade_file_size = env_get_hex("filesize", 0);
|
||||
printf("TEE upgrade file size: %d\n", upgrade_file_size);
|
||||
|
||||
/*store image to temp buffer as temp_addr may be decrypted*/
|
||||
image_malloc_buffer = malloc(upgrade_file_size);
|
||||
if ( image_malloc_buffer == NULL ) {
|
||||
image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
|
||||
} else {
|
||||
image_buffer = image_malloc_buffer;
|
||||
}
|
||||
memcpy(image_buffer, temp_addr, upgrade_file_size);
|
||||
|
||||
/* STEP 2: verify its authentiticy here */
|
||||
sprintf(runcmd, "vimage 0x%p tee", (void *)temp_addr);
|
||||
@@ -791,7 +833,7 @@ _upgrade_tf_exit:
|
||||
|
||||
/* STEP 3: update tee partition */
|
||||
printf("read upgrade image (tee.bin) into tf partition \n");
|
||||
sprintf(runcmd, "ext4write mmc 0:4 0x%p /tee.bin 0x%x", (void *)temp_addr, upgrade_file_size);
|
||||
sprintf(runcmd, "ext4write mmc 0:4 0x%p /tee.bin 0x%x", (void *)image_buffer, upgrade_file_size);
|
||||
printf("runcmd:%s\n", runcmd);
|
||||
ret = run_command(runcmd, 0);
|
||||
if (ret != 0) {
|
||||
@@ -812,7 +854,11 @@ _upgrade_tee_exit:
|
||||
run_command("env set sec_upgrade_mode 0", 0);
|
||||
run_command("saveenv", 0);
|
||||
run_command("reset", 0);
|
||||
|
||||
|
||||
if ( image_malloc_buffer != NULL ) {
|
||||
free(image_malloc_buffer);
|
||||
image_malloc_buffer = NULL;
|
||||
}
|
||||
} else if (sec_upgrade_flag == UBOOT_SEC_UPGRADE_FLAG) {
|
||||
unsigned int block_cnt;
|
||||
struct blk_desc *dev_desc;
|
||||
|
||||
@@ -1302,7 +1302,7 @@ int clk_config(void)
|
||||
|
||||
/* The boards other than the LightA board perform the bus down-speed operation */
|
||||
|
||||
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
|
||||
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
ap_multimedia_div_num_set(VI_MIPI_CSI0_DIV, 12); /* Input frquency: 2376MHZ */
|
||||
ap_multimedia_div_num_set(VI_ISP0_CORE_DIV, 15); /* Input frquency: 2376MHZ */
|
||||
ap_multimedia_div_num_set(VI_ISP1_CORE_DIV, 12); /* Input frquency: 2376MHZ */
|
||||
|
||||
@@ -1406,6 +1406,280 @@ static void light_iopin_init(void)
|
||||
light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
}
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
static void light_iopin_init(void)
|
||||
{
|
||||
/* aon-padmux config */
|
||||
light_pin_cfg(I2C_AON_SCL, PIN_SPEED_NORMAL, PIN_PN, 8);
|
||||
light_pin_cfg(I2C_AON_SDA, PIN_SPEED_NORMAL, PIN_PN, 8);
|
||||
|
||||
light_pin_mux(CPU_JTG_TCLK, 3);
|
||||
light_pin_cfg(CPU_JTG_TCLK, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(CPU_JTG_TMS, 3);
|
||||
light_pin_cfg(CPU_JTG_TMS, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(CPU_JTG_TDI, 3);
|
||||
light_pin_cfg(CPU_JTG_TDI, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
|
||||
light_pin_mux(AOGPIO_7, 1);
|
||||
light_pin_mux(AOGPIO_8, 1);
|
||||
// light_pin_mux(AOGPIO_9, 0);
|
||||
light_pin_mux(AOGPIO_10, 1);
|
||||
light_pin_mux(AOGPIO_11, 1);
|
||||
light_pin_mux(AOGPIO_12, 1);
|
||||
light_pin_mux(AOGPIO_13, 1);
|
||||
light_pin_mux(AOGPIO_14, 0);
|
||||
// light_pin_mux(AOGPIO_15,0);
|
||||
light_pin_cfg(AOGPIO_7, PIN_SPEED_NORMAL, PIN_PN, 2); ///NC
|
||||
light_pin_cfg(AOGPIO_8, PIN_SPEED_NORMAL, PIN_PN, 2); ///NC
|
||||
// light_pin_cfg(AOGPIO_9,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(AOGPIO_10, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(AOGPIO_11, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(AOGPIO_12, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(AOGPIO_13, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(AOGPIO_14, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
// light_pin_cfg(AOGPIO_15,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
|
||||
light_pin_mux(AUDIO_PA0, 0);
|
||||
light_pin_cfg(AUDIO_PA0, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA1, 0);
|
||||
light_pin_cfg(AUDIO_PA1, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA3, 0);
|
||||
light_pin_cfg(AUDIO_PA3, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA4, 0);
|
||||
light_pin_cfg(AUDIO_PA4, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA5, 0);
|
||||
light_pin_cfg(AUDIO_PA5, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA6, 0);
|
||||
light_pin_cfg(AUDIO_PA6, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA7, 0);
|
||||
light_pin_cfg(AUDIO_PA7, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA14, 0);
|
||||
light_pin_cfg(AUDIO_PA14, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA15, 0);
|
||||
light_pin_cfg(AUDIO_PA15, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA16, 0);
|
||||
light_pin_cfg(AUDIO_PA16, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA17, 0);
|
||||
light_pin_cfg(AUDIO_PA17, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA29, 0);
|
||||
light_pin_cfg(AUDIO_PA29, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(AUDIO_PA30, 0);
|
||||
light_pin_cfg(AUDIO_PA30, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
|
||||
// light_pin_mux(AUDIO_PA9,3); ///AUDIO-PA-RESET
|
||||
// light_pin_cfg(AUDIO_PA9,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
// light_pin_mux(AUDIO_PA10,3); /// AUD-3V3-EN
|
||||
// light_pin_cfg(AUDIO_PA10,PIN_SPEED_NORMAL,PIN_PU,2);
|
||||
// light_pin_mux(AUDIO_PA12,3); /// AUD-1V8-EN
|
||||
// light_pin_cfg(AUDIO_PA12,PIN_SPEED_NORMAL,PIN_PU,2);
|
||||
// light_pin_mux(AUDIO_PA13,0);
|
||||
|
||||
/*ap-padmux on left/top */
|
||||
light_pin_mux(QSPI1_SCLK, 4);
|
||||
light_pin_cfg(QSPI1_SCLK, PIN_SPEED_NORMAL,PIN_PN, 8); ///se-spi
|
||||
light_pin_mux(QSPI1_CSN0, 4);
|
||||
light_pin_cfg(QSPI1_CSN0, PIN_SPEED_NORMAL, PIN_PN, 8); ///se-spi
|
||||
light_pin_mux(QSPI1_D0_MOSI, 4);
|
||||
light_pin_cfg(QSPI1_D0_MOSI, PIN_SPEED_NORMAL, PIN_PU, 8); ///se-spi
|
||||
light_pin_mux(QSPI1_D1_MISO, 4);
|
||||
light_pin_cfg(QSPI1_D1_MISO, PIN_SPEED_NORMAL, PIN_PU, 8); ///se-spi
|
||||
light_pin_mux(QSPI1_D2_WP, 4);
|
||||
light_pin_cfg(QSPI1_D2_WP, PIN_SPEED_NORMAL, PIN_PN, 8); ///NC
|
||||
// light_pin_mux(QSPI1_D3_HOLD, 4);
|
||||
// light_pin_cfg(QSPI1_D3_HOLD, PIN_SPEED_NORMAL, PIN_PN, 8); ///NC
|
||||
|
||||
light_pin_cfg(I2C0_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
light_pin_cfg(I2C0_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
light_pin_cfg(I2C1_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
light_pin_cfg(I2C1_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
|
||||
light_pin_cfg(UART1_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(UART1_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(UART4_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(UART4_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(UART4_CTSN, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(UART4_RTSN, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(UART3_TXD, 1);
|
||||
light_pin_cfg(UART3_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_mux(UART3_RXD, 1);
|
||||
light_pin_cfg(UART3_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
|
||||
// light_pin_mux(GPIO0_18,1);
|
||||
// light_pin_mux(GPIO0_19,1);
|
||||
// light_pin_cfg(GPIO0_18,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
// light_pin_cfg(GPIO0_19,PIN_SPEED_NORMAL,PIN_PN,4);
|
||||
|
||||
// light_pin_mux(GPIO0_20,0);
|
||||
// light_pin_mux(GPIO0_21,0);
|
||||
// light_pin_mux(GPIO0_22,1);
|
||||
// light_pin_mux(GPIO0_23,1);
|
||||
// light_pin_mux(GPIO0_24,1);
|
||||
// light_pin_mux(GPIO0_25,1);
|
||||
// light_pin_mux(GPIO0_26,1);
|
||||
// light_pin_mux(GPIO0_27,0);
|
||||
// light_pin_mux(GPIO0_28,0);
|
||||
// light_pin_mux(GPIO0_29,0);
|
||||
// light_pin_mux(GPIO0_30,0);
|
||||
// light_pin_cfg(GPIO0_20,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
// light_pin_cfg(GPIO0_21,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO0_24, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO0_25, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO0_27, PIN_SPEED_NORMAL, PIN_PN, 2); ///< NC(not used)
|
||||
light_pin_cfg(GPIO0_28, PIN_SPEED_NORMAL, PIN_PN, 2); ///< AVDD25_IR_EN
|
||||
// light_pin_cfg(GPIO0_29,PIN_SPEED_NORMAL,PIN_PN,2); ///< DVDD12_IR_EN
|
||||
light_pin_cfg(GPIO0_30, PIN_SPEED_NORMAL, PIN_PU, 2); ///< gmac,uart,led
|
||||
light_pin_cfg(GPIO0_31, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
|
||||
light_pin_mux(GPIO1_0, 0);
|
||||
// light_pin_mux(GPIO1_1,1);
|
||||
// light_pin_mux(GPIO1_2,1);
|
||||
light_pin_mux(GPIO1_3, 0);
|
||||
light_pin_mux(GPIO1_4, 0);
|
||||
light_pin_mux(GPIO1_5, 0);
|
||||
light_pin_mux(GPIO1_6, 0);
|
||||
light_pin_mux(GPIO1_9, 0);
|
||||
light_pin_mux(GPIO1_10, 0);
|
||||
// light_pin_mux(GPIO1_11,0);
|
||||
// light_pin_mux(GPIO1_12,0);
|
||||
light_pin_mux(GPIO1_13, 0);
|
||||
light_pin_mux(GPIO1_14, 0);
|
||||
// light_pin_mux(GPIO1_15,0);
|
||||
// light_pin_mux(GPIO1_16,0);
|
||||
light_pin_cfg(GPIO1_0, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
// light_pin_cfg(GPIO1_1,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
// light_pin_cfg(GPIO1_2,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_3, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO1_4, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO1_5, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO1_6, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO1_9, PIN_SPEED_NORMAL, PIN_PN, 2); ///<VDD18_LCD0_EN
|
||||
light_pin_cfg(GPIO1_10, PIN_SPEED_NORMAL, PIN_PN, 2); ///<LCD0_BIAS_EN
|
||||
// light_pin_cfg(GPIO1_11,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
// light_pin_cfg(GPIO1_12,PIN_SPEED_NORMAL,PIN_PN,2); ///<TOUCH-PANNEL VDD28_TP0_EN
|
||||
light_pin_cfg(GPIO1_13, PIN_SPEED_NORMAL, PIN_PN, 2); ///<DOVDD18_RGB_EN
|
||||
light_pin_cfg(GPIO1_14, PIN_SPEED_NORMAL, PIN_PN, 2); ///<DVDD12_RGB_EN
|
||||
// light_pin_cfg(GPIO1_15,PIN_SPEED_NORMAL,PIN_PN,2); ///<AVDD28_RGB_EN
|
||||
// light_pin_cfg(GPIO1_16,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
|
||||
light_pin_mux(CLK_OUT_0, 1);
|
||||
light_pin_cfg(CLK_OUT_0, PIN_SPEED_NORMAL, PIN_PU, 2);
|
||||
light_pin_mux(CLK_OUT_1, 1);
|
||||
light_pin_cfg(CLK_OUT_1, PIN_SPEED_NORMAL, PIN_PU, 2);
|
||||
light_pin_mux(CLK_OUT_2, 0);
|
||||
light_pin_cfg(CLK_OUT_2, PIN_SPEED_NORMAL, PIN_PU, 2);
|
||||
light_pin_mux(CLK_OUT_3, 0);
|
||||
light_pin_cfg(CLK_OUT_3, PIN_SPEED_NORMAL, PIN_PU, 2);
|
||||
|
||||
// light_pin_mux(GPIO1_21,3);
|
||||
light_pin_mux(GPIO1_22, 3);
|
||||
// light_pin_mux(GPIO1_23,3);
|
||||
light_pin_mux(GPIO1_24, 3);
|
||||
// light_pin_mux(GPIO1_25,3);
|
||||
// light_pin_mux(GPIO1_26,3);
|
||||
// light_pin_mux(GPIO1_27,3);
|
||||
light_pin_mux(GPIO1_28, 0);
|
||||
// light_pin_mux(GPIO1_29,3);
|
||||
light_pin_mux(GPIO1_30, 0);
|
||||
// light_pin_cfg(GPIO1_21,PIN_SPEED_NORMAL,PIN_PN,2);
|
||||
light_pin_cfg(GPIO1_22, PIN_SPEED_NORMAL, PIN_PN,2);
|
||||
// light_pin_cfg(GPIO1_23,PIN_SPEED_NORMAL,PIN_PN,2); ///<LED_PDN
|
||||
light_pin_cfg(GPIO1_24, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO1_28, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO1_30, PIN_SPEED_NORMAL, PIN_PN, 2); ///<DBB2LEDDRIVER_EN
|
||||
|
||||
light_pin_cfg(UART0_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(UART0_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
|
||||
/*ap-pdmux on righ/top*/
|
||||
// light_pin_mux(QSPI0_SCLK,3); ///NC
|
||||
// light_pin_mux(QSPI0_CSN0,3); ///NC
|
||||
// light_pin_mux(QSPI0_CSN1,3); ///NC
|
||||
// light_pin_mux(QSPI0_D0_MOSI,3); ///NC
|
||||
// light_pin_mux(QSPI0_D1_MISO,3); ///NC
|
||||
// light_pin_mux(QSPI0_D2_WP,3); ///NC
|
||||
// light_pin_mux(QSPI0_D3_HOLD,3); ///NC
|
||||
|
||||
light_pin_cfg(I2C2_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
light_pin_cfg(I2C2_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
light_pin_cfg(I2C3_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
light_pin_cfg(I2C3_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
|
||||
|
||||
// light_pin_mux(SPI_CSN,3); /// W_DISABLE_CATE1
|
||||
// light_pin_mux(SPI_MOSI,3); /// NC
|
||||
// light_pin_mux(SPI_MISO,3); /// RERST1_N_CAT1
|
||||
// light_pin_mux(SPI_SCLK,3);
|
||||
light_pin_cfg(SPI_CSN, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(SPI_MOSI, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(SPI_MISO, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(SPI_SCLK, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
|
||||
light_pin_mux(GPIO2_13, 0);
|
||||
light_pin_mux(GPIO2_18, 1);
|
||||
light_pin_mux(GPIO2_19, 1);
|
||||
light_pin_mux(GPIO2_20, 1);
|
||||
light_pin_mux(GPIO2_21, 1);
|
||||
light_pin_mux(GPIO2_22, 1);
|
||||
light_pin_mux(GPIO2_23, 1);
|
||||
light_pin_mux(GPIO2_24, 1);
|
||||
light_pin_mux(GPIO2_25, 1);
|
||||
|
||||
light_pin_cfg(GPIO2_13, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
light_pin_cfg(GPIO2_18, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GPIO2_19, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GPIO2_20, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GPIO2_21, PIN_SPEED_NORMAL, PIN_PN, 0xF); ///<NC
|
||||
light_pin_cfg(GPIO2_22, PIN_SPEED_NORMAL, PIN_PN, 0xF); ///<WIFI_BT_GPIO2
|
||||
light_pin_cfg(GPIO2_23, PIN_SPEED_NORMAL, PIN_PN, 0xF); ///<WIFI_BT_GPIO3
|
||||
light_pin_cfg(GPIO2_24, PIN_SPEED_NORMAL, PIN_PN, 0xF); ///<WIFI_BT_RST_N
|
||||
light_pin_cfg(GPIO2_25, PIN_SPEED_NORMAL, PIN_PU, 0xF); ///KEY1
|
||||
|
||||
light_pin_mux(SDIO0_DETN, 0);
|
||||
light_pin_cfg(SDIO0_DETN, PIN_SPEED_NORMAL, PIN_PN, 2);
|
||||
// light_pin_mux(SDIO0_WPRTN,3);
|
||||
// light_pin_cfg(SDIO0_WPRTN,PIN_SPEED_NORMAL,PIN_PN,2); ///< NC
|
||||
// light_pin_mux(SDIO1_WPRTN,3);
|
||||
// light_pin_cfg(SDIO1_WPRTN,PIN_SPEED_NORMAL,PIN_PU,2); ///VBUS_EN
|
||||
// light_pin_mux(SDIO1_DETN,3);
|
||||
// light_pin_cfg(SDIO1_DETN,PIN_SPEED_NORMAL,PIN_PN,2); ///WCN_33_EN
|
||||
|
||||
light_pin_mux(GPIO2_30, 1);
|
||||
light_pin_mux(GPIO2_31, 1);
|
||||
light_pin_mux(GPIO3_0, 1);
|
||||
light_pin_mux(GPIO3_1, 1);
|
||||
light_pin_mux(GPIO3_2, 1);
|
||||
light_pin_mux(GPIO3_3, 1);
|
||||
light_pin_cfg(GPIO2_30, PIN_SPEED_NORMAL, PIN_PN, 0xF); ///NC
|
||||
light_pin_cfg(GPIO2_31, PIN_SPEED_NORMAL, PIN_PN, 0xF); ///NC
|
||||
light_pin_cfg(GPIO3_0, PIN_SPEED_NORMAL, PIN_PN, 0xF); ///NC
|
||||
light_pin_cfg(GPIO3_1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GPIO3_2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GPIO3_3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
|
||||
light_pin_cfg(HDMI_SCL, PIN_SPEED_NORMAL, PIN_PN, 0x2);
|
||||
light_pin_cfg(HDMI_SDA, PIN_SPEED_NORMAL, PIN_PN, 0x2);
|
||||
light_pin_cfg(HDMI_CEC, PIN_SPEED_NORMAL, PIN_PN, 0x2);
|
||||
|
||||
/* GMAC0 pad drive strength configurate to 0xF */
|
||||
light_pin_cfg(GMAC0_TX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXEN, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_TXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXDV, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
// light_pin_cfg(GMAC0_MDC, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
// light_pin_cfg(GMAC0_MDIO, PIN_SPEED_NORMAL, PIN_PN, 0xF);
|
||||
|
||||
light_pin_mux(GMAC0_COL, 3);
|
||||
light_pin_mux(GMAC0_CRS, 3);
|
||||
light_pin_cfg(GMAC0_COL, PIN_SPEED_NORMAL, PIN_PU, 2);
|
||||
light_pin_cfg(GMAC0_CRS, PIN_SPEED_NORMAL, PIN_PU, 2);
|
||||
}
|
||||
#else
|
||||
static void light_iopin_init(void)
|
||||
{
|
||||
|
||||
@@ -136,7 +136,7 @@ static const struct regulator_t g_apcpu_regu_id_list[] = {
|
||||
REGU_ID_DEF(IIC_IDX_AONIIC,APCPU_REGU_VDDM,0x31,0x39,0,1,800000,600000,3500000,12500,1),
|
||||
},
|
||||
};
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
/**
|
||||
* board for ant-ref
|
||||
*
|
||||
@@ -944,7 +944,7 @@ int pmic_reset_apcpu_voltage(void)
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
int pmic_reset_apcpu_voltage(void)
|
||||
{
|
||||
int ret = -1;
|
||||
|
||||
@@ -290,7 +290,7 @@ void sys_clk_config(void)
|
||||
|
||||
/* The boards other than the LightA board perform the bus down-speed operation */
|
||||
|
||||
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
|
||||
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
/* axi_sram_clk: 812.8512MHz -> 688.128MHz */
|
||||
tmp = readl((void *)LIGHT_AONCLK_ADDRBASE + 0x104);
|
||||
tmp |= 0x2000;
|
||||
|
||||
106
configs/light_lpi4a_defconfig
Normal file
106
configs/light_lpi4a_defconfig
Normal file
@@ -0,0 +1,106 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0xe0000
|
||||
CONFIG_NR_DRAM_BANKS=8
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_TARGET_LIGHT_C910=y
|
||||
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
|
||||
# CONFIG_THEAD_PLIC is not set
|
||||
# CONFIG_THEAD_LIGHT_TIMER is not set
|
||||
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
|
||||
CONFIG_ARCH_RV64I=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
|
||||
CONFIG_DISPLAY_CPUINFO=y
|
||||
CONFIG_DISPLAY_BOARDINFO=y
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_RAM_SUPPORT=y
|
||||
CONFIG_SPL_RAM_DEVICE=y
|
||||
CONFIG_SYS_PROMPT="C910 Light# "
|
||||
CONFIG_DDR_LP4X_3733_DUALRANK=y
|
||||
# CONFIG_DDR_LP4_3733_DUALRANK is not set
|
||||
CONFIG_DDR_BOARD_CONFIG=y
|
||||
CONFIG_CMD_BOOT_SLAVE=y
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_DDR_SCAN=y
|
||||
CONFIG_DDR_PRBS_TEST=n
|
||||
# CONFIG_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_PARTITION_TYPE_GUID=y
|
||||
CONFIG_OF_EMBED=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_UDP_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_DW=y
|
||||
CONFIG_DWAPB_GPIO=y
|
||||
# CONFIG_MMC_SPI is not set
|
||||
CONFIG_MMC_VERBOSE=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_MMC_HS400_SUPPORT=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_SNPS=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SNPS=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MMC_RPMB=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_ETH_DESIGNWARE=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
|
||||
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
|
||||
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DESIGNWARE_SPI=y
|
||||
CONFIG_DESIGNWARE_QSPI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
|
||||
# CONFIG_SPL_USE_TINY_PRINTF is not set
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
# CONFIG_LIGHT_SEC_BOOT is not set
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_VIDEO_BRIDGE=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_VIDEO_VS_DPU=y
|
||||
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
|
||||
CONFIG_VIDEO_DW_DSI_LIGHT=y
|
||||
CONFIG_VIDEO_DW_DPHY=y
|
||||
CONFIG_VIDEO_DW_DSI_HOST=y
|
||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
CONFIG_PMIC_VOL_INIT=y
|
||||
CONFIG_DDR_REGU_0V6=600000
|
||||
CONFIG_DDR_REGU_0V8=800000
|
||||
CONFIG_DDR_REGU_1V1=1100000
|
||||
106
configs/light_lpi4a_singlerank_defconfig
Normal file
106
configs/light_lpi4a_singlerank_defconfig
Normal file
@@ -0,0 +1,106 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0xe0000
|
||||
CONFIG_NR_DRAM_BANKS=8
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_TARGET_LIGHT_C910=y
|
||||
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
|
||||
# CONFIG_THEAD_PLIC is not set
|
||||
# CONFIG_THEAD_LIGHT_TIMER is not set
|
||||
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
|
||||
CONFIG_ARCH_RV64I=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
|
||||
CONFIG_DISPLAY_CPUINFO=y
|
||||
CONFIG_DISPLAY_BOARDINFO=y
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_RAM_SUPPORT=y
|
||||
CONFIG_SPL_RAM_DEVICE=y
|
||||
CONFIG_SYS_PROMPT="C910 Light# "
|
||||
CONFIG_DDR_LP4X_3733_SINGLERANK=y
|
||||
# CONFIG_DDR_LP4_3733_DUALRANK is not set
|
||||
CONFIG_DDR_BOARD_CONFIG=y
|
||||
CONFIG_CMD_BOOT_SLAVE=y
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_DDR_SCAN=y
|
||||
CONFIG_DDR_PRBS_TEST=n
|
||||
# CONFIG_DOS_PARTITION is not set
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_PARTITION_TYPE_GUID=y
|
||||
CONFIG_OF_EMBED=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_UDP_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_DW=y
|
||||
CONFIG_DWAPB_GPIO=y
|
||||
# CONFIG_MMC_SPI is not set
|
||||
CONFIG_MMC_VERBOSE=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_MMC_HS400_SUPPORT=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_SNPS=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SNPS=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MMC_RPMB=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_ETH_DESIGNWARE=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
|
||||
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
|
||||
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DESIGNWARE_SPI=y
|
||||
CONFIG_DESIGNWARE_QSPI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
|
||||
# CONFIG_SPL_USE_TINY_PRINTF is not set
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
# CONFIG_LIGHT_SEC_BOOT is not set
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_CMD_BMP=y
|
||||
CONFIG_VIDEO_BRIDGE=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_VIDEO_VS_DPU=y
|
||||
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
|
||||
CONFIG_VIDEO_DW_DSI_LIGHT=y
|
||||
CONFIG_VIDEO_DW_DPHY=y
|
||||
CONFIG_VIDEO_DW_DSI_HOST=y
|
||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
CONFIG_PMIC_VOL_INIT=y
|
||||
CONFIG_DDR_REGU_0V6=600000
|
||||
CONFIG_DDR_REGU_0V8=800000
|
||||
CONFIG_DDR_REGU_1V1=1100000
|
||||
@@ -91,6 +91,14 @@
|
||||
#define TEE_SEC_UPGRADE_FLAG 0x5a5aa5a5
|
||||
#define UBOOT_SEC_UPGRADE_FLAG 0xa5a5aa55
|
||||
|
||||
/* Define secure debug log level */
|
||||
#define LOG_LEVEL 1
|
||||
#if defined (LOG_LEVEL)
|
||||
#define SECLOG_PRINT printf
|
||||
#else
|
||||
#define SECLOG_PRINT
|
||||
#endif
|
||||
|
||||
#define UBOOT_MAX_VER 64
|
||||
#define CONFIG_SYS_CBSIZE 512
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
@@ -108,6 +116,8 @@
|
||||
|
||||
#if defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A)
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"splashimage=0x30000000\0" \
|
||||
"splashpos=m,m\0" \
|
||||
"fdt_high=0xffffffffffffffff\0" \
|
||||
"tf_addr=0x100000\0" \
|
||||
"dtb_addr=0x01f00000\0" \
|
||||
@@ -118,24 +128,31 @@
|
||||
"tee_addr=0x1c000000\0" \
|
||||
"sec_upgrade_mode=0\0"\
|
||||
"mmcdev=0\0" \
|
||||
"mmcpart=6\0" \
|
||||
"boot_partition=bootA\0" \
|
||||
"root_partition=rootfsA\0" \
|
||||
"kdump_buf=1M\0" \
|
||||
"uboot_version=0x0000000000000000\0"\
|
||||
"tee_version=0x00000000\0"\
|
||||
"tf_version=0x00000000\0"\
|
||||
"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=7; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=8; else mmcpart=6; fi;\0" \
|
||||
"fdt_file=light-a-val-sec.dtb\0" \
|
||||
"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfs};name=data,size=-,type=linux\0" \
|
||||
"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
|
||||
"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
|
||||
"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
|
||||
"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
|
||||
"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
|
||||
"factory_reset=yes\0"\
|
||||
"\0"
|
||||
|
||||
#elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B)
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"splashimage=0x30000000\0" \
|
||||
"splashpos=m,m\0" \
|
||||
"fdt_high=0xffffffffffffffff\0" \
|
||||
"tf_addr=0x100000\0" \
|
||||
"dtb_addr=0x01f00000\0" \
|
||||
@@ -146,24 +163,31 @@
|
||||
"tee_addr=0x1c000000\0" \
|
||||
"sec_upgrade_mode=0\0"\
|
||||
"mmcdev=0\0" \
|
||||
"mmcpart=6\0" \
|
||||
"boot_partition=bootA\0" \
|
||||
"root_partition=rootfsA\0" \
|
||||
"kdump_buf=1M\0" \
|
||||
"uboot_version=0x0000000000000000\0"\
|
||||
"tee_version=0x00000000\0"\
|
||||
"tf_version=0x00000000\0"\
|
||||
"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=7; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=8; else mmcpart=6; fi;\0" \
|
||||
"fdt_file=light-b-product-sec.dtb\0" \
|
||||
"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfs};name=data,size=-,type=linux\0" \
|
||||
"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
|
||||
"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
|
||||
"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
|
||||
"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
|
||||
"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
|
||||
"factory_reset=yes\0"\
|
||||
"\0"
|
||||
|
||||
#elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF)
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"splashimage=0x30000000\0" \
|
||||
"splashpos=m,m\0" \
|
||||
"fdt_high=0xffffffffffffffff\0" \
|
||||
"tf_addr=0x100000\0" \
|
||||
"dtb_addr=0x01f00000\0" \
|
||||
@@ -174,18 +198,23 @@
|
||||
"tee_addr=0x1c000000\0" \
|
||||
"sec_upgrade_mode=0\0"\
|
||||
"mmcdev=0\0" \
|
||||
"mmcpart=6\0" \
|
||||
"boot_partition=bootA\0" \
|
||||
"root_partition=rootfsA\0" \
|
||||
"kdump_buf=1M\0" \
|
||||
"uboot_version=0x0000000000000000\0"\
|
||||
"tee_version=0x00000000\0"\
|
||||
"tf_version=0x00000000\0"\
|
||||
"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=7; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=8; else mmcpart=6; fi;\0" \
|
||||
"fdt_file=light-ant-ref-sec.dtb\0" \
|
||||
"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfs};name=data,size=-,type=linux\0" \
|
||||
"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
|
||||
"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
|
||||
"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
|
||||
"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
|
||||
"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
|
||||
"factory_reset=yes\0"\
|
||||
"\0"
|
||||
@@ -318,7 +347,9 @@
|
||||
"mmcdev=0\0" \
|
||||
"boot_partition=bootA\0" \
|
||||
"root_partition=rootfsA\0" \
|
||||
ENV_KERNEL_LOGLEVEL \
|
||||
"kdump_buf=1M\0" \
|
||||
ENV_STR_BOOT_DELAY \
|
||||
"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
|
||||
"fdt_file=light-ant-ref.dtb\0" \
|
||||
"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
|
||||
@@ -326,7 +357,7 @@
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
|
||||
"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
|
||||
"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=${kernel_loglevel} eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
|
||||
@@ -391,6 +422,35 @@
|
||||
"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
|
||||
"factory_reset=yes\0"\
|
||||
"\0"
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"splashimage=0x30000000\0" \
|
||||
"splashpos=m,m\0" \
|
||||
"fdt_high=0xffffffffffffffff\0" \
|
||||
"opensbi_addr=0x0\0" \
|
||||
"dtb_addr=0x01f00000\0" \
|
||||
"kernel_addr=0x00200000\0" \
|
||||
"aon_ram_addr=0xffffef8000\0" \
|
||||
"audio_ram_addr=0xffc0000000\0" \
|
||||
"fwaddr=0x10000000\0"\
|
||||
"mmcdev=0\0" \
|
||||
"boot_partition=bootA\0" \
|
||||
"root_partition=rootfsA\0" \
|
||||
"kdump_buf=500M\0" \
|
||||
"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
|
||||
"fdt_file=light-lpi4a.dtb\0" \
|
||||
"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
|
||||
"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
|
||||
"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
|
||||
"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
|
||||
"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused loglevel=7 eth=$ethaddr rootrw=PARTLABEL=data init=/init rootinit=/sbin/init rootrwoptions=rw,noatime rootrwreset=${factory_reset} crashkernel=${kdump_buf}\0" \
|
||||
"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize\0"\
|
||||
"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
|
||||
"bootcmd_load=run findpart;run load_aon;run load_c906_audio; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
|
||||
"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
|
||||
"factory_reset=yes\0"\
|
||||
"\0"
|
||||
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF)
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"splashimage=0x30000000\0" \
|
||||
@@ -434,7 +494,7 @@
|
||||
"root_partition=rootfsA\0" \
|
||||
"kdump_buf=500M\0" \
|
||||
"findpart=rollback; if test ${boot_partition} = bootB; then mmcbootpart=4; else mmcbootpart=2; fi; if test ${root_partition} = rootfsB; then mmcpart=5; else mmcpart=3; fi;\0" \
|
||||
"fdt_file=light-a-val.dtb\0" \
|
||||
"fdt_file=light-a-val-dsi0-hdmi.dtb\0" \
|
||||
"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
|
||||
"uuid_rootfsB=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
|
||||
"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=4000MiB,type=linux,uuid=${uuid_rootfsA};name=bootB,size=200MiB,type=boot;name=rootB,size=4000MiB,type=linux,uuid=${uuid_rootfsB};name=data,size=-,type=linux\0" \
|
||||
|
||||
79
lib/sec_library/include/aes.h
Normal file → Executable file
79
lib/sec_library/include/aes.h
Normal file → Executable file
@@ -21,12 +21,44 @@ extern "C" {
|
||||
#endif
|
||||
|
||||
/*----- Encrypt & Decrypt: Config key length -----*/
|
||||
#define AES_KEY_LEN_BYTES_32 (32)
|
||||
#define AES_KEY_LEN_BYTES_24 (24)
|
||||
#define AES_KEY_LEN_BYTES_16 (16)
|
||||
|
||||
#define AES_BLOCK_IV_SIZE (16)
|
||||
#define AES_BLOCK_TAG_SIZE (16)
|
||||
#define AES_BLOCK_CRYPTO_SIZE (16)
|
||||
|
||||
#define AES_DIR_ENCRYPT (1)
|
||||
#define AES_DIR_DECRYPT (0)
|
||||
|
||||
#define KEY_128_BITS (0x08)
|
||||
#define KEY_192_BITS (0x10)
|
||||
#define KEY_256_BITS (0x18)
|
||||
|
||||
#define AES_DMA_ENABLE (1)
|
||||
#define AES_DMA_DISABLE (0)
|
||||
|
||||
/**
|
||||
\brief DES data transfer mode config
|
||||
*/
|
||||
typedef enum {
|
||||
AES_SLAVE_MODE = 0U, ///< slave mode
|
||||
AES_DMA_MODE, ///< dma mode
|
||||
} csi_aes_trans_mode_t;
|
||||
|
||||
/**
|
||||
\brief AES Keylen type
|
||||
*/
|
||||
typedef enum {
|
||||
AES_KEY_LEN_BITS_128 = 0, ///< 128 Data bits
|
||||
AES_KEY_LEN_BITS_192, ///< 192 Data bits
|
||||
AES_KEY_LEN_BITS_256 ///< 256 Data bits
|
||||
} csi_aes_key_bits_t;
|
||||
|
||||
/**
|
||||
\brief AES mode config
|
||||
*/
|
||||
typedef enum{
|
||||
AES_MODE_ECB = 0,
|
||||
AES_MODE_CBC = 0x20000020,
|
||||
@@ -35,48 +67,19 @@ typedef enum{
|
||||
AES_MODE_GCM = 0x20030040,
|
||||
AES_MODE_CCM = 0x21D40040,
|
||||
AES_MODE_OFB = 0x24000000,
|
||||
} aes_mode_t;
|
||||
|
||||
#define AES_KEY_LEN_BYTES_32 32
|
||||
#define AES_KEY_LEN_BYTES_24 24
|
||||
#define AES_KEY_LEN_BYTES_16 16
|
||||
|
||||
#define AES_CRYPTO_CTRL_CBC_256 0x20000038
|
||||
#define AES_CRYPTO_CTRL_CBC_192 0x20000030
|
||||
#define AES_CRYPTO_CTRL_CBC_128 0x20000028
|
||||
#define AES_CRYPTO_CTRL_ECB_256 0x00000018
|
||||
#define AES_CRYPTO_CTRL_ECB_192 0x00000010
|
||||
#define AES_CRYPTO_CTRL_ECB_128 0x00000008
|
||||
|
||||
#define AES_BLOCK_IV_SIZE 16
|
||||
#define AES_BLOCK_TAG_SIZE 16
|
||||
#define AES_BLOCK_CRYPTO_SIZE 16
|
||||
|
||||
#define AES_DIR_ENCRYPT 1
|
||||
#define AES_DIR_DECRYPT 0
|
||||
|
||||
#define KEY_128_BITS 0x8
|
||||
#define KEY_192_BITS 0x10
|
||||
#define KEY_256_BITS 0x18
|
||||
|
||||
#define AES_DMA_ENABLE 1
|
||||
#define AES_DMA_DISABLE 0
|
||||
|
||||
|
||||
typedef enum{
|
||||
AES_CRYPTO_ECB_256_MODE = 0,
|
||||
AES_CRYPTO_ECB_192_MODE,
|
||||
AES_CRYPTO_ECB_128_MODE,
|
||||
AES_CRYPTO_CBC_256_MODE,
|
||||
AES_CRYPTO_CBC_192_MODE,
|
||||
AES_CRYPTO_CBC_128_MODE,
|
||||
} csi_aes_mode_t;
|
||||
|
||||
/**
|
||||
\brief AES state
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t busy : 1; ///< Calculate busy flag
|
||||
uint32_t error : 1; ///< Calculate error flag
|
||||
} csi_aes_state_t;
|
||||
|
||||
/**
|
||||
\brief AES Context
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t key_len_byte;
|
||||
uint8_t key[32]; ///< Data block being processed
|
||||
@@ -343,11 +346,11 @@ csi_error_t csi_aes_enable_pm(csi_aes_t *aes);
|
||||
void csi_aes_disable_pm(csi_aes_t *aes);
|
||||
|
||||
/**
|
||||
\brief Config AES mode dma or slave
|
||||
\param[in] dam_en zero disable dma, not zero enable dma
|
||||
\brief Config AES data transfer mode
|
||||
\param[in] mode \ref csi_des_trans_mode_t
|
||||
\return None
|
||||
*/
|
||||
void csi_aes_dma_enable(csi_aes_t *aes, uint8_t dma_en);
|
||||
void csi_aes_trans_config(csi_aes_t *aes, csi_aes_trans_mode_t mode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
16
lib/sec_library/include/common.h
Normal file → Executable file
16
lib/sec_library/include/common.h
Normal file → Executable file
@@ -68,11 +68,13 @@ extern "C" {
|
||||
} while (0);
|
||||
|
||||
typedef enum {
|
||||
CSI_OK = 0,
|
||||
CSI_ERROR = -1,
|
||||
CSI_BUSY = -2,
|
||||
CSI_TIMEOUT = -3,
|
||||
CSI_UNSUPPORTED = -4
|
||||
CSI_OK = 0,
|
||||
CSI_ERROR = -1,
|
||||
CSI_BUSY = -2,
|
||||
CSI_TIMEOUT = -3,
|
||||
CSI_UNSUPPORTED = -4,
|
||||
CSI_INVALID_PARAM = -5,
|
||||
CSI_CRYPT_FAIL = -6,
|
||||
} csi_error_t;
|
||||
|
||||
typedef struct {
|
||||
@@ -132,9 +134,7 @@ typedef struct {
|
||||
|
||||
csi_error_t target_get(csi_dev_tag_t dev_tag, uint32_t idx, csi_dev_t *dev);
|
||||
csi_error_t target_get_optimal_dma_channel(void *dma_list, uint32_t ctrl_num, csi_dev_t *parent_dev, void *ch_info);
|
||||
//void mdelay(uint32_t ms);
|
||||
//void udelay(uint32_t us);
|
||||
//void msleep(uint32_t ms);
|
||||
void msleep(uint32_t ms);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
0
lib/sec_library/include/core/README.txt
Normal file → Executable file
0
lib/sec_library/include/core/README.txt
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/ARMCM0.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/ARMCM0.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/cmsis_compiler.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/cmsis_compiler.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/cmsis_gcc.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/cmsis_gcc.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/cmsis_version.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/cmsis_version.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/core_cm0.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/core_cm0.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/csi_core.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/csi_core.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/system_ARMCM0.h
Normal file → Executable file
0
lib/sec_library/include/core/cmsis/system_ARMCM0.h
Normal file → Executable file
0
lib/sec_library/include/core/core_801.h
Normal file → Executable file
0
lib/sec_library/include/core/core_801.h
Normal file → Executable file
0
lib/sec_library/include/core/core_802.h
Normal file → Executable file
0
lib/sec_library/include/core/core_802.h
Normal file → Executable file
0
lib/sec_library/include/core/core_803.h
Normal file → Executable file
0
lib/sec_library/include/core/core_803.h
Normal file → Executable file
0
lib/sec_library/include/core/core_804.h
Normal file → Executable file
0
lib/sec_library/include/core/core_804.h
Normal file → Executable file
0
lib/sec_library/include/core/core_805.h
Normal file → Executable file
0
lib/sec_library/include/core/core_805.h
Normal file → Executable file
0
lib/sec_library/include/core/core_807.h
Normal file → Executable file
0
lib/sec_library/include/core/core_807.h
Normal file → Executable file
0
lib/sec_library/include/core/core_810.h
Normal file → Executable file
0
lib/sec_library/include/core/core_810.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck610.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck610.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck801.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck801.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck802.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck802.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck803.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck803.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck807.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck807.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck810.h
Normal file → Executable file
0
lib/sec_library/include/core/core_ck810.h
Normal file → Executable file
0
lib/sec_library/include/core/core_rv32.h
Normal file → Executable file
0
lib/sec_library/include/core/core_rv32.h
Normal file → Executable file
0
lib/sec_library/include/core/core_rv64.h
Normal file → Executable file
0
lib/sec_library/include/core/core_rv64.h
Normal file → Executable file
0
lib/sec_library/include/core/csi_gcc.h
Normal file → Executable file
0
lib/sec_library/include/core/csi_gcc.h
Normal file → Executable file
0
lib/sec_library/include/core/csi_rv32_gcc.h
Normal file → Executable file
0
lib/sec_library/include/core/csi_rv32_gcc.h
Normal file → Executable file
0
lib/sec_library/include/core/csi_rv64_gcc.h
Normal file → Executable file
0
lib/sec_library/include/core/csi_rv64_gcc.h
Normal file → Executable file
0
lib/sec_library/include/csi_core.h
Normal file → Executable file
0
lib/sec_library/include/csi_core.h
Normal file → Executable file
0
lib/sec_library/include/csi_efuse_api.h
Normal file → Executable file
0
lib/sec_library/include/csi_efuse_api.h
Normal file → Executable file
0
lib/sec_library/include/csi_sec_img_verify.h
Normal file → Executable file
0
lib/sec_library/include/csi_sec_img_verify.h
Normal file → Executable file
221
lib/sec_library/include/des.h
Executable file
221
lib/sec_library/include/des.h
Executable file
@@ -0,0 +1,221 @@
|
||||
/*
|
||||
* Copyright (C) 2017-2020 Alibaba Group Holding Limited
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* @file drv/des.h
|
||||
* @brief Header File for DES Driver
|
||||
* @version V1.0
|
||||
* @date 24. Oct 2022
|
||||
* @model des
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef _DRV_DES_H_
|
||||
#define _DRV_DES_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "common.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*----- Encrypt & Decrypt: Config key length -----*/
|
||||
/**
|
||||
\brief DES data transfer mode config
|
||||
*/
|
||||
typedef enum {
|
||||
DES_SLAVE_MODE = 0U, ///< slave mode
|
||||
DES_DMA_MODE, ///< dma mode
|
||||
} csi_des_trans_mode_t;
|
||||
|
||||
/**
|
||||
\brief DES key-len-bits type
|
||||
*/
|
||||
typedef enum {
|
||||
DES_KEY_LEN_BITS_64 = 0, ///< 64 Data bits
|
||||
DES_KEY_LEN_BITS_128, ///< 128 Data bits
|
||||
DES_KEY_LEN_BITS_192, ///< 192 Data bits
|
||||
} csi_des_key_bits_t;
|
||||
|
||||
typedef enum{
|
||||
DES_MODE_ECB = 0x00000000,
|
||||
DES_MODE_CBC = 0x20000020,
|
||||
TDES_MODE_ECB = 0x00000008,
|
||||
TDES_MODE_CBC = 0x20000028,
|
||||
} des_mode_t;
|
||||
|
||||
|
||||
#define DES_KEY_LEN_BYTES_32 (32)
|
||||
#define DES_KEY_LEN_BYTES_16 (16)
|
||||
#define DES_KEY_LEN_BYTES_24 (24)
|
||||
#define DES_KEY_LEN_BYTES_8 (8)
|
||||
|
||||
#define DES_BLOCK_IV_SIZE (16)
|
||||
#define DES_BLOCK_CRYPTO_SIZE (8)
|
||||
#define TDES_BLOCK_CRYPTO_SIZE (16)
|
||||
|
||||
#define DES_DIR_ENCRYPT (1)
|
||||
#define DES_DIR_DECRYPT (0)
|
||||
|
||||
#define DES_KEY_128_BITS (0x8)
|
||||
#define DES_KEY_192_BITS (0x10)
|
||||
|
||||
/**
|
||||
\brief DES State
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t busy : 1; ///< Calculate busy flag
|
||||
uint32_t error : 1; ///< Calculate error flag
|
||||
} csi_des_state_t;
|
||||
|
||||
/**
|
||||
\brief DES Context
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t key_len_byte;
|
||||
uint8_t key[32]; ///< Data block being processed
|
||||
uint32_t sca;
|
||||
uint32_t is_kdf;
|
||||
uint32_t is_dma;
|
||||
} csi_des_context_t;
|
||||
|
||||
/**
|
||||
\brief DES Ctrl Block
|
||||
*/
|
||||
typedef struct {
|
||||
csi_des_state_t state;
|
||||
csi_des_context_t context;
|
||||
csi_dev_t dev;
|
||||
void *priv;
|
||||
} csi_des_t;
|
||||
|
||||
/**
|
||||
\brief Initialize DES interface. Initializes the resources needed for the DES interface
|
||||
\param[in] des Handle to operate
|
||||
\param[in] idx Device id
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_des_init(csi_des_t *des, uint32_t idx);
|
||||
|
||||
/**
|
||||
\brief De-initialize DES interface. Stops operation and releases the software resources used by the interface
|
||||
\param[in] des Dandle to operate
|
||||
\return None
|
||||
*/
|
||||
void csi_des_uninit(csi_des_t *des);
|
||||
|
||||
/**
|
||||
\brief Set encrypt key
|
||||
\param[in] des Handle to operate
|
||||
\param[in] key Pointer to the key buf
|
||||
\param[in] key_len Pointer to \ref csi_des_key_bits_t
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_des_set_encrypt_key(csi_des_t *des, void *key, csi_des_key_bits_t key_len);
|
||||
|
||||
/**
|
||||
\brief Set decrypt key
|
||||
\param[in] des Handle to operate
|
||||
\param[in] key Pointer to the key buf
|
||||
\param[in] key_len Pointer to \ref csi_des_key_bits_t
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_des_set_decrypt_key(csi_des_t *des, void *key, csi_des_key_bits_t key_len);
|
||||
|
||||
/**
|
||||
\brief DES ecb encrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_des_ecb_encrypt(csi_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief DES ecb decrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_des_ecb_decrypt(csi_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief DES cbc encrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\param[in] iv Init vector
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_des_cbc_encrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv) ;
|
||||
|
||||
/**
|
||||
\brief DES cbc decrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\param[in] iv Init vector
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_des_cbc_decrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv);
|
||||
|
||||
/**
|
||||
\brief TDES ecb encrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_tdes_ecb_encrypt(csi_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief TDES ecb decrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_tdes_ecb_decrypt(csi_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief TDES cbc encrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\param[in] iv Init vector
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_tdes_cbc_encrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv) ;
|
||||
|
||||
/**
|
||||
\brief TDES cbc decrypt
|
||||
\param[in] des Handle to operate
|
||||
\param[in] in Pointer to the source data
|
||||
\param[out] out Pointer to the result data
|
||||
\param[in] size The source data size
|
||||
\param[in] iv Init vector
|
||||
\return Error code \ref Csi_error_t
|
||||
*/
|
||||
csi_error_t csi_tdes_cbc_decrypt(csi_des_t *des, void *in, void *out, uint32_t size, void *iv);
|
||||
|
||||
/**
|
||||
\brief Config DES mode dma or slave
|
||||
\param[in] mode \ref csi_des_trans_mode_t
|
||||
\return None
|
||||
*/
|
||||
void csi_des_trans_config(csi_des_t *des, csi_des_trans_mode_t mode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _DRV_AES_H_ */
|
||||
0
lib/sec_library/include/dev_tag.h
Normal file → Executable file
0
lib/sec_library/include/dev_tag.h
Normal file → Executable file
0
lib/sec_library/include/device_types.h
Normal file → Executable file
0
lib/sec_library/include/device_types.h
Normal file → Executable file
159
lib/sec_library/include/ecc.h
Normal file → Executable file
159
lib/sec_library/include/ecc.h
Normal file → Executable file
@@ -20,8 +20,15 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define ECC_PRIME_CURVE_G_BYTES 64
|
||||
#define ECC_PRIME_CURVE_P_BYTES 70
|
||||
#define CSI_ECC_PUBKEY_LEN (65-1)
|
||||
#define CSI_ECC_PRIVKEY_LEN (32)
|
||||
#define CSI_ECC_PUBKEYTMP_LEN (65)
|
||||
#define CSI_ECC_RK_LEN (24) //random
|
||||
#define CSI_ECC_SIGNATURE_LEN (64)
|
||||
#define CSI_ECC_DIGEST_LEN (32)
|
||||
|
||||
#define ECC_PRIME_CURVE_G_BYTES (64)
|
||||
#define ECC_PRIME_CURVE_P_BYTES (70)
|
||||
|
||||
typedef struct {
|
||||
uint32_t ecc_curve : 1; ///< supports 256bits curve
|
||||
@@ -35,11 +42,17 @@ typedef enum {
|
||||
ECC_C1C2C3,
|
||||
} ecc_cipher_order_e;
|
||||
|
||||
/**
|
||||
\brief ECC endian mode
|
||||
*/
|
||||
typedef enum {
|
||||
ECC_ENDIAN_LITTLE = 0, ///< Little Endian
|
||||
ECC_ENDIAN_BIG ///< Big Endian
|
||||
} ecc_endian_mode_e;
|
||||
|
||||
/**
|
||||
\brief ECC prime curve type
|
||||
*/
|
||||
typedef enum {
|
||||
ECC_PRIME256V1 = 0,
|
||||
} ecc_prime_curve_type;
|
||||
@@ -59,11 +72,17 @@ typedef enum {
|
||||
ECC_EVENT_EXCHANGE_KEY_COMPLETE, ///< Exchange key completed
|
||||
} ecc_event_e;
|
||||
|
||||
/**
|
||||
\brief ECC prime curve param
|
||||
*/
|
||||
typedef struct {
|
||||
ecc_prime_curve_type type;
|
||||
uint32_t *p;
|
||||
} csi_ecc_prime_curve_t;
|
||||
|
||||
/**
|
||||
\brief ECC curve type g param
|
||||
*/
|
||||
typedef struct {
|
||||
ecc_prime_curve_type type;
|
||||
uint8_t *G;
|
||||
@@ -77,6 +96,9 @@ typedef struct {
|
||||
uint32_t busy : 1; ///< Calculate busy flag
|
||||
} csi_ecc_state_t;
|
||||
|
||||
/**
|
||||
\brief ECC handle
|
||||
*/
|
||||
typedef struct {
|
||||
csi_dev_t dev;
|
||||
void * cb;
|
||||
@@ -90,9 +112,8 @@ typedef void (*csi_ecc_callback_t)(ecc_event_e event);
|
||||
|
||||
/**
|
||||
\brief Initialize ECC.
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] idx device id
|
||||
\return \ref uint32_t
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_init(csi_ecc_t *ecc, uint32_t idx);
|
||||
|
||||
@@ -106,111 +127,111 @@ void csi_ecc_uninit(csi_ecc_t *ecc);
|
||||
/**
|
||||
\brief ecc get capability.
|
||||
\param[in] ecc Operate handle.
|
||||
\return \ref uint32_t
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_config(csi_ecc_t *ecc, ecc_cipher_order_e co,
|
||||
ecc_endian_mode_e endian);
|
||||
csi_error_t csi_ecc_config(csi_ecc_t *ecc, ecc_cipher_order_e co, ecc_endian_mode_e endian);
|
||||
|
||||
/**
|
||||
\brief Attach the callback handler to ECC
|
||||
\param[in] ecc Operate handle.
|
||||
\param[in] cb Callback function
|
||||
\param[in] arg User can define it by himself as callback's param
|
||||
\return Error code \ref csi_error_t
|
||||
\return Error code Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_attach_callback(csi_ecc_t *ecc, csi_ecc_callback_t cb,
|
||||
void *arg);
|
||||
csi_error_t csi_ecc_attach_callback(csi_ecc_t *ecc, csi_ecc_callback_t cb, void *arg);
|
||||
|
||||
/**
|
||||
\brief Detach the callback handler
|
||||
\param[in] ecc Operate handle.
|
||||
\return Error code Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_detach_callback(csi_ecc_t *ecc);
|
||||
|
||||
/**
|
||||
\brief ecc get capability.
|
||||
\param[in] ecc Operate handle.
|
||||
\param[out] cap Pointer of ecc_capabilities_t.
|
||||
\return \ref uint32_t
|
||||
\param[out] cap Pointer of ecc_capabilities_t.
|
||||
\return Error code Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_get_capabilities(csi_ecc_t *ecc, ecc_capabilities_t *cap);
|
||||
|
||||
/**
|
||||
\brief check whether the public key and private key are a pair.
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] private Pointer to the ecc private key, alloc by caller.
|
||||
\param[in] public Pointer to the ecc public key, alloc by caller.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_check_keypair(csi_ecc_t *ecc, uint8_t pubkey[65], uint8_t prikey[32]);
|
||||
|
||||
/**
|
||||
\brief generate ecc key.
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[out] private Pointer to the ecc private key, alloc by caller.
|
||||
\param[out] public Pointer to the ecc public key, alloc by caller.
|
||||
\return \ref uint32_t
|
||||
\param[out] public Pointer to the ecc public key, alloc by caller.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_gen_key(csi_ecc_t *ecc, uint8_t pubkey[65],
|
||||
uint8_t prikey[32]);
|
||||
csi_error_t csi_ecc_gen_key(csi_ecc_t *ecc, uint8_t pubkey[65], uint8_t prikey[32]);
|
||||
|
||||
/**
|
||||
\brief generate ecc pubkey by privkey.
|
||||
\brief generate ecc public key by private key.
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] private Pointer to the ecc private key, alloc by caller.
|
||||
\param[out] public Pointer to the ecc public key, alloc by caller.
|
||||
\return \ref uint32_t
|
||||
\param[out] private Pointer to the ecc private key, alloc by caller.
|
||||
\param[out] public Pointer to the ecc public key, alloc by caller.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_gen_pubkey(csi_ecc_t *ecc, uint8_t pubkey[65],
|
||||
uint8_t prikey[32]);
|
||||
csi_error_t csi_ecc_gen_pubkey(csi_ecc_t *ecc, uint8_t pubkey[65], uint8_t prikey[32]);
|
||||
|
||||
/**
|
||||
\brief ecc sign
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return \ref uint32_t
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_sign(csi_ecc_t *ecc, uint8_t d[32], uint8_t prikey[32],
|
||||
uint8_t s[64]);
|
||||
csi_error_t csi_ecc_sign(csi_ecc_t *ecc, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief ecc sign
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return \ref uint32_t
|
||||
\brief ecc sign asybnc
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_sign_async(csi_ecc_t *ecc, uint8_t d[32],
|
||||
uint8_t prikey[32], uint8_t s[64]);
|
||||
csi_error_t csi_ecc_sign_async(csi_ecc_t *ecc, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
|
||||
|
||||
/* TODO */
|
||||
/**
|
||||
\brief ecc verify
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return verify result
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return verify result
|
||||
*/
|
||||
bool csi_ecc_verify(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65],
|
||||
uint8_t s[64]);
|
||||
bool csi_ecc_verify(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief ecc verify
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return verify result
|
||||
*/
|
||||
bool csi_ecc_verify_async(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65],
|
||||
uint8_t s[64]);
|
||||
bool csi_ecc_verify_async(csi_ecc_t *ecc, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief ecc encrypto
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] Plain Pointer to the plaintext.
|
||||
\param[in] PlainByteLen plaintext len
|
||||
\param[in] pubKey public key.
|
||||
\param[out] Cipher Pointer to the chipher
|
||||
\param[out] CipherByteLen Pointer to the chipher len.
|
||||
\return uint32_t
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] Plain Pointer to the plaintext.
|
||||
\param[in] PlainByteLen plaintext len
|
||||
\param[in] pubKey public key.
|
||||
\param[out] Cipher Pointer to the chipher
|
||||
\param[out] CipherByteLen Pointer to the chipher len.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_encrypt(csi_ecc_t *ecc, uint8_t *Plain,
|
||||
uint32_t PlainByteLen, uint8_t pubKey[65],
|
||||
@@ -218,13 +239,13 @@ csi_error_t csi_ecc_encrypt(csi_ecc_t *ecc, uint8_t *Plain,
|
||||
|
||||
/**
|
||||
\brief ecc encrypto
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] Cipher Pointer to the chipher
|
||||
\param[in] CipherByteLen chipher len.
|
||||
\param[in] prikey private key.
|
||||
\param[out] Plain Pointer to the plaintext.
|
||||
\param[out] PlainByteLen plaintext len
|
||||
\return uint32_t
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] Cipher Pointer to the chipher
|
||||
\param[in] CipherByteLen chipher len.
|
||||
\param[in] prikey private key.
|
||||
\param[out] Plain Pointer to the plaintext.
|
||||
\param[out] PlainByteLen plaintext len
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_decrypt(csi_ecc_t *ecc, uint8_t *Cipher,
|
||||
uint32_t CipherByteLen, uint8_t prikey[32],
|
||||
@@ -233,7 +254,7 @@ csi_error_t csi_ecc_decrypt(csi_ecc_t *ecc, uint8_t *Cipher,
|
||||
/**
|
||||
\brief ecc key exchange
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_exchangekey(csi_ecc_t *ecc, ecc_exchange_role_e role,
|
||||
uint8_t *dA, uint8_t *PB, uint8_t *rA,
|
||||
@@ -244,7 +265,7 @@ csi_error_t csi_ecc_exchangekey(csi_ecc_t *ecc, ecc_exchange_role_e role,
|
||||
/**
|
||||
\brief ecc key exchange get Z.
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_getZ(csi_ecc_t *ecc, uint8_t *ID, uint32_t byteLenofID,
|
||||
uint8_t pubKey[65], uint8_t Z[32]);
|
||||
@@ -252,7 +273,7 @@ csi_error_t csi_ecc_getZ(csi_ecc_t *ecc, uint8_t *ID, uint32_t byteLenofID,
|
||||
/**
|
||||
\brief ecc key exchange get E
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_getE(csi_ecc_t *ecc, uint8_t *M, uint32_t byteLen,
|
||||
uint8_t Z[32], uint8_t E[32]);
|
||||
@@ -261,14 +282,14 @@ csi_error_t csi_ecc_getE(csi_ecc_t *ecc, uint8_t *M, uint32_t byteLen,
|
||||
\brief Get ECC state.
|
||||
\param[in] ecc ECC handle to operate.
|
||||
\param[out] state ECC state \ref csi_ecc_state_t.
|
||||
\return Error code \ref csi_error_t
|
||||
\return Error code Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_get_state(csi_ecc_t *ecc, csi_ecc_state_t *state);
|
||||
|
||||
/**
|
||||
\brief Enable ecc power manage
|
||||
\param[in] ecc ECC handle to operate.
|
||||
\return Error code \ref csi_error_t
|
||||
\return Error code Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecc_enable_pm(csi_ecc_t *ecc);
|
||||
|
||||
|
||||
20
lib/sec_library/include/ecdh.h
Normal file → Executable file
20
lib/sec_library/include/ecdh.h
Normal file → Executable file
@@ -20,19 +20,21 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CSI_ECDH_PUBKEY_LEN (65-1)
|
||||
#define CSI_ECDH_PRIVKEY_LEN (32)
|
||||
#define CSI_ECDH_SHARE_LEN (64)
|
||||
#define CSI_ECDH_SHAREKEY_LEN (32)
|
||||
|
||||
/**
|
||||
\brief ecdh cacl share secret
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] pubkey Pointer to the A public key.
|
||||
\param[in] privkey Pointer to the B private key.
|
||||
\param[out] shareKey Pointer to the share secret.
|
||||
\param[out] len length of the share secret.
|
||||
\return \ref uint32_t
|
||||
\param[in] ecc ecc handle to operate.
|
||||
\param[in] pubkey Pointer to the A public key.
|
||||
\param[in] prikey Pointer to the B private key.
|
||||
\param[out] shareKey Pointer to the share secret.
|
||||
\param[out] len length of the share secret.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_ecdh_calc_secret(csi_ecc_t *ecc, uint8_t privkey[32],
|
||||
uint8_t pubkey[65], uint8_t shareKey[32],
|
||||
uint32_t *len);
|
||||
csi_error_t csi_ecdh_calc_secret(csi_ecc_t *ecc, uint8_t privkey[32], uint8_t pubkey[65], uint8_t shareKey[32], uint32_t *len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
0
lib/sec_library/include/kdf.h
Normal file → Executable file
0
lib/sec_library/include/kdf.h
Normal file → Executable file
0
lib/sec_library/include/keyram.h
Normal file → Executable file
0
lib/sec_library/include/keyram.h
Normal file → Executable file
0
lib/sec_library/include/list.h
Normal file → Executable file
0
lib/sec_library/include/list.h
Normal file → Executable file
0
lib/sec_library/include/rambus.h
Normal file → Executable file
0
lib/sec_library/include/rambus.h
Normal file → Executable file
0
lib/sec_library/include/rng.h
Normal file → Executable file
0
lib/sec_library/include/rng.h
Normal file → Executable file
22
lib/sec_library/include/rsa.h
Normal file → Executable file
22
lib/sec_library/include/rsa.h
Normal file → Executable file
@@ -18,17 +18,17 @@ extern "C" {
|
||||
#include <stdint.h>
|
||||
#include "common.h"
|
||||
|
||||
#define RSA_PRIME_256_BIT_LEN 128
|
||||
#define RSA_PRIME_512_BIT_LEN 256
|
||||
#define RSA_PRIME_1024_BIT_LEN 512
|
||||
#define RSA_PRIME_2048_BIT_LEN 1024
|
||||
#define RSA_PRIME_4096_BIT_LEN 2048
|
||||
#define RSA_PRIME_256_BIT_LEN (128)
|
||||
#define RSA_PRIME_512_BIT_LEN (256)
|
||||
#define RSA_PRIME_1024_BIT_LEN (512)
|
||||
#define RSA_PRIME_2048_BIT_LEN (1024)
|
||||
#define RSA_PRIME_4096_BIT_LEN (2048)
|
||||
|
||||
#define RSA_256_BYTE_LEN 32
|
||||
#define RSA_512_BYTE_LEN 64
|
||||
#define RSA_1024_BYTE_LEN 128
|
||||
#define RSA_2048_BYTE_LEN 256
|
||||
#define RSA_4096_BYTE_LEN 512
|
||||
#define RSA_256_BYTE_LEN (32)
|
||||
#define RSA_512_BYTE_LEN (64)
|
||||
#define RSA_1024_BYTE_LEN (128)
|
||||
#define RSA_2048_BYTE_LEN (256)
|
||||
#define RSA_4096_BYTE_LEN (512)
|
||||
#define RSA_EM_BYTE_LEN RSA_4096_BYTE_LEN
|
||||
|
||||
#define SHA256_DIGEST_BYTE_LEN 32
|
||||
@@ -301,7 +301,7 @@ csi_error_t csi_rsa_get_publickey(csi_rsa_t *rsa, void *p, uint32_t p_byte_len,
|
||||
/**
|
||||
\brief Generation rsa keyparis
|
||||
\param[in] rsa rsa handle to operate.
|
||||
\param[in] context Pointer to the rsa context
|
||||
\param[in] context Pointer to the rsa context
|
||||
\param[in] keybits_len Pointer to the publickey bits length
|
||||
\return \ref csi_error_t
|
||||
*/
|
||||
|
||||
@@ -31,6 +31,17 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
\brief AES data transfer mode config
|
||||
*/
|
||||
typedef enum {
|
||||
SC_AES_SLAVE_MODE = 0U, ///< slave mode
|
||||
SC_AES_DMA_MODE, ///< dma mode
|
||||
} sc_aes_trans_mode_t;
|
||||
|
||||
/**
|
||||
\brief AES key-len-bits type
|
||||
*/
|
||||
typedef enum {
|
||||
SC_AES_KEY_LEN_BITS_128 = 0U, ///< 128 Data bits
|
||||
SC_AES_KEY_LEN_BITS_192, ///< 192 Data bits
|
||||
@@ -297,7 +308,10 @@ uint32_t sc_aes_ccm_encrypt(sc_aes_t *aes, void *in, void *out,uint32_t size, ui
|
||||
*/
|
||||
uint32_t sc_aes_ccm_decrypt(sc_aes_t *aes, void *in, void *out,uint32_t size, uint32_t add_len, void *iv, uint8_t* tag_out);
|
||||
|
||||
void sc_aes_dma_enable(sc_aes_t *aes, uint8_t en);
|
||||
/**
|
||||
\brief Aes data transfer config
|
||||
*/
|
||||
void sc_aes_trans_config(sc_aes_t *aes, sc_aes_trans_mode_t mode) ;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
0
lib/sec_library/include/sec_crypto_common.h
Normal file → Executable file
0
lib/sec_library/include/sec_crypto_common.h
Normal file → Executable file
205
lib/sec_library/include/sec_crypto_des.h
Executable file
205
lib/sec_library/include/sec_crypto_des.h
Executable file
@@ -0,0 +1,205 @@
|
||||
/*
|
||||
* Copyright (C) 2017-2022 Alibaba Group Holding Limited
|
||||
*/
|
||||
/******************************************************************************
|
||||
* @file sec_crypt0_des.h
|
||||
* @brief Header File for DES
|
||||
* @version V1.0
|
||||
* @date 24. Oct 2022
|
||||
* @model des
|
||||
******************************************************************************/
|
||||
#ifndef _SC_DES_H_
|
||||
#define _SC_DES_H_
|
||||
|
||||
#include "sec_include_config.h"
|
||||
#include <stdint.h>
|
||||
#include "sec_crypto_errcode.h"
|
||||
|
||||
#ifdef CONFIG_SYSTEM_SECURE
|
||||
#ifdef SEC_LIB_VERSION
|
||||
#include <drv/des.h>
|
||||
#else
|
||||
#include "des.h"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SEC_CRYPTO_DES_SW
|
||||
#include "crypto_des.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
\brief DES data transfer mode config
|
||||
*/
|
||||
typedef enum {
|
||||
SC_DES_SLAVE_MODE = 0U, ///< slave mode
|
||||
SC_DES_DMA_MODE, ///< dma mode
|
||||
} sc_des_trans_mode_t;
|
||||
|
||||
/**
|
||||
\brief DES key-len-bits type
|
||||
*/
|
||||
typedef enum {
|
||||
SC_DES_KEY_LEN_BITS_64 = 0U, ///< 64 Data bits
|
||||
SC_DES_KEY_LEN_BITS_128, ///< 128 Data bits
|
||||
SC_TDES_KEY_LEN_BITS_192, ///< 192 Data bits
|
||||
} sc_des_key_bits_t;
|
||||
|
||||
/**
|
||||
\brief DES Ctrl Block
|
||||
*/
|
||||
typedef struct {
|
||||
#ifdef CONFIG_SYSTEM_SECURE
|
||||
#ifdef CONFIG_CSI_V1
|
||||
des_handle_t handle;
|
||||
unsigned char key[32];
|
||||
unsigned int key_len;
|
||||
#endif
|
||||
#ifdef CONFIG_CSI_V2
|
||||
csi_des_t csi_des;
|
||||
//unsigned char sc_ctx[SC_DES_CTX_SIZE];
|
||||
#endif
|
||||
#endif
|
||||
#if defined(CONFIG_TEE_CA)
|
||||
unsigned char key[32];
|
||||
unsigned int key_len;
|
||||
#endif
|
||||
#if defined(CONFIG_SEC_CRYPTO_DES_SW)
|
||||
sc_mbedtls_des_context des_ctx;
|
||||
#endif
|
||||
//void *ctx;
|
||||
} sc_des_t;
|
||||
|
||||
// Function documentation
|
||||
/**
|
||||
\brief Initialize DES Interface. Initializes the resources needed for the DES interface
|
||||
\param[in] des operate handle
|
||||
\param[in] idx device id
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_des_init(sc_des_t *des, uint32_t idx);
|
||||
|
||||
/**
|
||||
\brief De-initialize DES Interface. stops operation and releases the software resources used by the interface
|
||||
\param[in] des handle to operate
|
||||
\return None
|
||||
*/
|
||||
void sc_des_uninit(sc_des_t *des);
|
||||
|
||||
/**
|
||||
\brief Set encrypt key
|
||||
\param[in] des handle to operate
|
||||
\param[in] key Pointer to the key buf
|
||||
\param[in] key_len Pointer to \ref sc_des_key_bits_t
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_des_set_encrypt_key(sc_des_t *des, void *key, sc_des_key_bits_t key_len);
|
||||
|
||||
/**
|
||||
\brief Set decrypt key
|
||||
\param[in] des handle to operate
|
||||
\param[in] key Pointer to the key buf
|
||||
\param[in] key_len Pointer to \ref sc_des_key_bits_t
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_des_set_decrypt_key(sc_des_t *des, void *key, sc_des_key_bits_t key_len);
|
||||
|
||||
/**
|
||||
\brief Des ecb encrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_des_ecb_encrypt(sc_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief Des ecb decrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_des_ecb_decrypt(sc_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief Des cbc encrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\param[in] iv init vector
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_des_cbc_encrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
|
||||
|
||||
/**
|
||||
\brief Des cbc decrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\param[in] iv init vector
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_des_cbc_decrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
|
||||
|
||||
/**
|
||||
\brief TDes ecb encrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_tdes_ecb_encrypt(sc_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief TDes ecb decrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_tdes_ecb_decrypt(sc_des_t *des, void *in, void *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief TDes cbc encrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\param[in] iv init vector
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_tdes_cbc_encrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
|
||||
|
||||
/**
|
||||
\brief TDes cbc decrypt
|
||||
\param[in] des handle to operate
|
||||
\param[in] in Pointer to the Source data
|
||||
\param[out] out Pointer to the Result data
|
||||
\param[in] size the Source data size
|
||||
\param[in] iv init vector
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_tdes_cbc_decrypt(sc_des_t *des, void *in, void *out, uint32_t size, void *iv);
|
||||
|
||||
/**
|
||||
\brief Config DES mode dma or slave
|
||||
\param[in] mode \ref sc_des_trans_mode_t
|
||||
\return None
|
||||
*/
|
||||
void sc_des_trans_config(sc_des_t *des, sc_des_trans_mode_t mode) ;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SC_DES_H_ */
|
||||
0
lib/sec_library/include/sec_crypto_ecc.h
Normal file → Executable file
0
lib/sec_library/include/sec_crypto_ecc.h
Normal file → Executable file
0
lib/sec_library/include/sec_crypto_ecdh.h
Normal file → Executable file
0
lib/sec_library/include/sec_crypto_ecdh.h
Normal file → Executable file
0
lib/sec_library/include/sec_crypto_kdf.h
Normal file → Executable file
0
lib/sec_library/include/sec_crypto_kdf.h
Normal file → Executable file
72
lib/sec_library/include/sec_crypto_mac.h
Normal file → Executable file
72
lib/sec_library/include/sec_crypto_mac.h
Normal file → Executable file
@@ -15,15 +15,15 @@
|
||||
#include "sec_crypto_errcode.h"
|
||||
#include "sec_crypto_sha.h"
|
||||
|
||||
#define SC_MAC_KEY_LEN_MAX 64
|
||||
#define HMAC_SHA1_BLOCK_SIZE 64
|
||||
#define HMAC_SHA224_BLOCK_SIZE 64
|
||||
#define HMAC_SM3_BLOCK_SIZE 64
|
||||
#define HMAC_SHA256_BLOCK_SIZE 64
|
||||
#define HMAC_MD5_BLOCK_SIZE 64
|
||||
#define HMAC_SHA384_BLOCK_SIZE 128
|
||||
#define HMAC_SHA512_BLOCK_SIZE 128
|
||||
#define HMAC_MAX_BLOCK_SIZE 128
|
||||
#define SC_MAC_KEY_LEN_MAX (64)
|
||||
#define HMAC_SHA1_BLOCK_SIZE (64)
|
||||
#define HMAC_SHA224_BLOCK_SIZE (64)
|
||||
#define HMAC_SM3_BLOCK_SIZE (64)
|
||||
#define HMAC_SHA256_BLOCK_SIZE (64)
|
||||
#define HMAC_MD5_BLOCK_SIZE (64)
|
||||
#define HMAC_SHA384_BLOCK_SIZE (128)
|
||||
#define HMAC_SHA512_BLOCK_SIZE (128)
|
||||
#define HMAC_MAX_BLOCK_SIZE (128)
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -44,7 +44,7 @@ typedef struct {
|
||||
/**
|
||||
\brief Initialize MAC Interface. Initializes the resources needed for the MAC interface
|
||||
\param[in] mac operate handle.
|
||||
\param[in] idx index of mac
|
||||
\param[in] idx index of mac
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_mac_init(sc_mac_t *mac, uint32_t idx);
|
||||
@@ -57,23 +57,22 @@ uint32_t sc_mac_init(sc_mac_t *mac, uint32_t idx);
|
||||
void sc_mac_uninit(sc_mac_t *mac);
|
||||
|
||||
/**
|
||||
\brief MAC set key function.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] key Pointer to the mac key.
|
||||
\param[in] key_len Length of key.
|
||||
\brief MAC set key function.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] key Pointer to the mac key.
|
||||
\param[in] key_len Length of key.
|
||||
\return error code
|
||||
*/
|
||||
uint32_t sc_mac_set_key(sc_mac_t *mac, uint8_t *key, uint32_t key_len);
|
||||
|
||||
/**
|
||||
\brief MAC operation function.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] mode sc_sha_mode_t.
|
||||
\param[in] msg Pointer to the mac input message.
|
||||
\param[in] msg_len Length of msg.
|
||||
\param[out] out mac buffer, malloc by caller.
|
||||
\param[out] out_len, out mac length,
|
||||
should 32 bytes if HMAC_SHA256 mode.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] mode sc_sha_mode_t.
|
||||
\param[in] msg Pointer to the mac input message.
|
||||
\param[in] msg_len Length of msg.
|
||||
\param[out] out mac buffer, malloc by caller.
|
||||
\param[out] out_len out mac length, should 32 bytes if HMAC_SHA256 mode.
|
||||
\return error code
|
||||
*/
|
||||
uint32_t sc_mac_calc(sc_mac_t *mac, sc_sha_mode_t mode, uint8_t *msg,
|
||||
@@ -81,35 +80,32 @@ uint32_t sc_mac_calc(sc_mac_t *mac, sc_sha_mode_t mode, uint8_t *msg,
|
||||
|
||||
/**
|
||||
\brief MAC start operation function.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] context mac context pointer.
|
||||
\param[in] mode sc_sha_mode_t.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] context mac context pointer.
|
||||
\param[in] mode sc_sha_mode_t.
|
||||
\return error code
|
||||
*/
|
||||
uint32_t sc_mac_start(sc_mac_t *mac, sc_mac_context_t *context,
|
||||
sc_sha_mode_t mode);
|
||||
uint32_t sc_mac_start(sc_mac_t *mac, sc_mac_context_t *context, sc_sha_mode_t mode);
|
||||
|
||||
/**
|
||||
\brief MAC start operation function.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] context mac context pointer.
|
||||
\param[in] msg Pointer to the mac input message.
|
||||
\param[in] msg_len Length of msg.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] context mac context pointer.
|
||||
\param[in] msg Pointer to the mac input message.
|
||||
\param[in] msg_len Length of msg.
|
||||
\return error code
|
||||
*/
|
||||
uint32_t sc_mac_update(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *msg,
|
||||
uint32_t msg_len);
|
||||
uint32_t sc_mac_update(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *msg, uint32_t msg_len);
|
||||
|
||||
/**
|
||||
\brief MAC start operation function.
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] context mac context pointer.
|
||||
\param[out] out mac buffer, malloc by caller.
|
||||
\param[out] out_len, out mac length,
|
||||
\param[in] mac mac handle to operate.
|
||||
\param[in] context mac context.
|
||||
\param[out] out mac buffer, malloc by caller.
|
||||
\param[out] out_len out mac length,
|
||||
\return error code
|
||||
*/
|
||||
uint32_t sc_mac_finish(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *out,
|
||||
uint32_t *out_len);
|
||||
uint32_t sc_mac_finish(sc_mac_t *mac, sc_mac_context_t *context, uint8_t *out, uint32_t *out_len);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -44,13 +44,13 @@ extern "C" {
|
||||
/*----- SHA Control Codes: Mode -----*/
|
||||
typedef enum {
|
||||
SC_SHA_MODE_SHA1 = 1U, ///< SHA_1 mode
|
||||
SC_SHA_MODE_256, ///< SHA_256 mode
|
||||
SC_SHA_MODE_224, ///< SHA_224 mode
|
||||
SC_SHA_MODE_512, ///< SHA_512 mode
|
||||
SC_SHA_MODE_384, ///< SHA_384 mode
|
||||
SC_SHA_MODE_512_256, ///< SHA_512_256 mode
|
||||
SC_SHA_MODE_512_224, ///< SHA_512_224 mode
|
||||
SC_SHA_MODE_MD5, ///< MD5 mode
|
||||
SC_SHA_MODE_256, ///< SHA_256 mode
|
||||
SC_SHA_MODE_224, ///< SHA_224 mode
|
||||
SC_SHA_MODE_512, ///< SHA_512 mode
|
||||
SC_SHA_MODE_384, ///< SHA_384 mode
|
||||
SC_SHA_MODE_512_256, ///< SHA_512_256 mode
|
||||
SC_SHA_MODE_512_224, ///< SHA_512_224 mode
|
||||
SC_SHA_MODE_MD5, ///< MD5 mode
|
||||
SC_SM3_MODE,
|
||||
} sc_sha_mode_t;
|
||||
|
||||
@@ -125,7 +125,7 @@ void sc_sha_uninit(sc_sha_t *sha);
|
||||
|
||||
/**
|
||||
\brief attach the callback handler to SHA
|
||||
\param[in] sha operate handle.
|
||||
\param[in] sha operate handle.
|
||||
\param[in] callback callback function
|
||||
\param[in] arg callback's param
|
||||
\return error code
|
||||
@@ -165,8 +165,7 @@ uint32_t sc_sha_update(sc_sha_t *sha, sc_sha_context_t *context, const void *inp
|
||||
\param[in] size the data size
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sha_update_async(sc_sha_t *sha, sc_sha_context_t *context, const void *input,
|
||||
uint32_t size);
|
||||
uint32_t sc_sha_update_async(sc_sha_t *sha, sc_sha_context_t *context, const void *input, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief finish the engine
|
||||
|
||||
@@ -77,7 +77,7 @@ typedef void (*sc_sm2_callback_t)(sc_sm2_event_e event);
|
||||
\brief Initialize SM2.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] idx device id
|
||||
\return \ref uint32_t
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_init(sc_sm2_t *sm2, uint32_t idx);
|
||||
|
||||
@@ -91,14 +91,13 @@ void sc_sm2_uninit(sc_sm2_t *sm2);
|
||||
/**
|
||||
\brief sm2 get capability.
|
||||
\param[in] sm2 Operate handle.
|
||||
\return \ref uint32_t
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_config(sc_sm2_t *sm2, sc_sm2_cipher_order_e co,
|
||||
sc_sm2_endian_mode_e endian);
|
||||
uint32_t sc_sm2_config(sc_sm2_t *sm2, sc_sm2_cipher_order_e co, sc_sm2_endian_mode_e endian);
|
||||
|
||||
/**
|
||||
\brief Attach the callback handler to SM2
|
||||
\param[in] sm2 Operate handle.
|
||||
\param[in] sm2 Operate handle.
|
||||
\param[in] cb Callback function
|
||||
\param[in] arg User can define it by himself as callback's param
|
||||
\return Error code \ref uint32_t
|
||||
@@ -114,91 +113,92 @@ void sc_sm2_detach_callback(sc_sm2_t *sm2);
|
||||
/**
|
||||
\brief sm2 get capability.
|
||||
\param[in] sm2 Operate handle.
|
||||
\param[out] cap Pointer of sc_sm2_capabilities_t.
|
||||
\return \ref uint32_t
|
||||
\param[out] cap Pointer of sc_sm2_capabilities_t.
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_get_capabilities(sc_sm2_t *sm2, sc_sm2_capabilities_t *cap);
|
||||
|
||||
uint32_t sc_sm2_check_keypair(sc_sm2_t *sm2, uint8_t pubkey[65],
|
||||
uint8_t prikey[32]);
|
||||
/**
|
||||
\brief check whether the public key and private key are a pair.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] private Pointer to the sm2 private key, alloc by caller.
|
||||
\param[in] public Pointer to the sm2 public key, alloc by caller.
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_check_keypair(sc_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
|
||||
|
||||
/**
|
||||
\brief generate sm2 key.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[out] private Pointer to the sm2 private key, alloc by caller.
|
||||
\param[out] public Pointer to the sm2 public key, alloc by caller.
|
||||
\return \ref uint32_t
|
||||
\param[out] public Pointer to the sm2 public key, alloc by caller.
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_gen_key(sc_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
|
||||
|
||||
/**
|
||||
\brief sm2 sign
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return \ref uint32_t
|
||||
\param[out] s Pointer to the signature
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_sign(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32],
|
||||
uint8_t s[64]);
|
||||
uint32_t sc_sm2_sign(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief sm2 sign
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return \ref uint32_t
|
||||
\param[out] s Pointer to the signature
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_sign_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32],
|
||||
uint8_t s[64]);
|
||||
uint32_t sc_sm2_sign_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
|
||||
|
||||
/* TODO */
|
||||
/**
|
||||
\brief sm2 verify
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\param[out] s Pointer to the signature
|
||||
\return verify result
|
||||
*/
|
||||
bool sc_sm2_verify(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
|
||||
uint8_t s[64]);
|
||||
bool sc_sm2_verify(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief sm2 verify
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\param[out] s Pointer to the signature
|
||||
\return verify result
|
||||
*/
|
||||
bool sc_sm2_verify_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
|
||||
uint8_t s[64]);
|
||||
bool sc_sm2_verify_async(sc_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief sm2 encrypto
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] plain Pointer to the plaintext.
|
||||
\param[in] PlainByteLen plaintext len
|
||||
\param[in] pubKey public key.
|
||||
\param[out] cipher Pointer to the chipher
|
||||
\param[out] cipher_byte_len Pointer to the chipher len.
|
||||
\return uint32_t
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] plain Pointer to the plaintext.
|
||||
\param[in] PlainByteLen plaintext len
|
||||
\param[in] pubKey public key.
|
||||
\param[out] cipher Pointer to the chipher
|
||||
\param[out] cipher_byte_len Pointer to the chipher len.
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_encrypt(sc_sm2_t *sm2, uint8_t *plain, uint32_t plain_len,
|
||||
uint8_t pubKey[65], uint8_t *cipher,
|
||||
uint32_t *cipher_len);
|
||||
uint8_t pubKey[65], uint8_t *cipher, uint32_t *cipher_len);
|
||||
|
||||
/**
|
||||
\brief sm2 encrypto
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] cipher Pointer to the chipher
|
||||
\param[in] CipherByteLen chipher len.
|
||||
\param[in] prikey private key.
|
||||
\param[out] plain Pointer to the plaintext.
|
||||
\param[out] PlainByteLen plaintext len
|
||||
\return uint32_t
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] cipher Pointer to the chipher
|
||||
\param[in] CipherByteLen chipher len.
|
||||
\param[in] prikey private key.
|
||||
\param[out] plain Pointer to the plaintext.
|
||||
\param[out] PlainByteLen plaintext len
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_decrypt(sc_sm2_t *sm2, uint8_t *cipher, uint32_t cipher_len,
|
||||
uint8_t prikey[32], uint8_t *plain,
|
||||
@@ -207,7 +207,7 @@ uint32_t sc_sm2_decrypt(sc_sm2_t *sm2, uint8_t *cipher, uint32_t cipher_len,
|
||||
/**
|
||||
\brief sm2 key exchange
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_exchangekey(sc_sm2_t *sm2, sc_sm2_exchange_role_e role,
|
||||
uint8_t *da, uint8_t *pb, uint8_t *ra1, uint8_t *ra,
|
||||
@@ -218,7 +218,7 @@ uint32_t sc_sm2_exchangekey(sc_sm2_t *sm2, sc_sm2_exchange_role_e role,
|
||||
/**
|
||||
\brief sm2 key exchange get Z.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_getZ(sc_sm2_t *sm2, uint8_t *id, uint32_t id_len,
|
||||
uint8_t pubkey[65], uint8_t z[32]);
|
||||
@@ -226,10 +226,9 @@ uint32_t sc_sm2_getZ(sc_sm2_t *sm2, uint8_t *id, uint32_t id_len,
|
||||
/**
|
||||
\brief sm2 key exchange get E
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code \ref uint32_t
|
||||
*/
|
||||
uint32_t sc_sm2_getE(sc_sm2_t *sm2, uint8_t *m, uint32_t len, uint8_t z[32],
|
||||
uint8_t e[32]);
|
||||
uint32_t sc_sm2_getE(sc_sm2_t *sm2, uint8_t *m, uint32_t len, uint8_t z[32], uint8_t e[32]);
|
||||
|
||||
/**
|
||||
\brief Get SM2 state.
|
||||
|
||||
0
lib/sec_library/include/sec_include_config.h
Normal file → Executable file
0
lib/sec_library/include/sec_include_config.h
Normal file → Executable file
28
lib/sec_library/include/sha.h
Normal file → Executable file
28
lib/sec_library/include/sha.h
Normal file → Executable file
@@ -19,14 +19,28 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define HASH_DATAIN_BLOCK_SIZE 64
|
||||
#define HASH_DATAIN_BLOCK_SIZE (64)
|
||||
|
||||
#define SHA1_DIGEST_OUT_SIZE 20
|
||||
#define SHA224_DIGEST_OUT_SIZE 28
|
||||
#define SHA256_DIGEST_OUT_SIZE 32
|
||||
#define SHA384_DIGEST_OUT_SIZE 48
|
||||
#define SHA512_DIGEST_OUT_SIZE 64
|
||||
#define MD5_DIGEST_OUT_SIZE 16
|
||||
#define SHA1_DIGEST_OUT_SIZE (20)
|
||||
#define SHA224_DIGEST_OUT_SIZE (28)
|
||||
#define SHA256_DIGEST_OUT_SIZE (32)
|
||||
#define SHA384_DIGEST_OUT_SIZE (48)
|
||||
#define SHA512_DIGEST_OUT_SIZE (64)
|
||||
#define MD5_DIGEST_OUT_SIZE (16)
|
||||
|
||||
#define CSI_SHA256_MODE (0x00000008)
|
||||
#define CSI_SHA224_MODE (0x00000010)
|
||||
#define CSI_SHA384_MODE (0x00000040)
|
||||
#define CSI_SHA512_MODE (0x00000020)
|
||||
#define CSI_MD5_MODE (0x00000002)
|
||||
#define CSI_SHA1_MODE (0x00000004)
|
||||
|
||||
#define CSI_SHA256_NEW_MODE (0x00000009)
|
||||
#define CSI_SHA224_MEW_MODE (0x00000011)
|
||||
#define CSI_SHA384_NEW_MODE (0x00000041)
|
||||
#define CSI_SHA512_NEW_MODE (0x00000021)
|
||||
#define CSI_MD5_NEW_MODE (0x00000003)
|
||||
#define CSI_SHA1_NEW_MODE (0x00000005)
|
||||
|
||||
/****** SHA mode ******/
|
||||
typedef enum {
|
||||
|
||||
101
lib/sec_library/include/sm2.h
Normal file → Executable file
101
lib/sec_library/include/sm2.h
Normal file → Executable file
@@ -20,6 +20,16 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CSI_SM2_PUBKEY_LEN (65-1)
|
||||
#define CSI_SM2_PRIVKEY_LEN (32)
|
||||
#define CSI_SM2_PUBKEYTMP_LEN (65)
|
||||
#define CSI_SM2_RK_LEN (32) //random
|
||||
#define CSI_SM2_SIGNATURE_LEN (64)
|
||||
#define CSI_SM2_DIGEST_LEN (32)
|
||||
|
||||
#define SM2_PRIME_CURVE_G_BYTES (64)
|
||||
#define SM2_PRIME_CURVE_N_BYTES (32)
|
||||
|
||||
typedef struct {
|
||||
uint32_t sm2_curve : 1; ///< supports 256bits curve
|
||||
} sm2_capabilities_t;
|
||||
@@ -95,95 +105,96 @@ csi_error_t csi_sm2_config(csi_sm2_t *sm2, sm2_cipher_order_e co,
|
||||
|
||||
/**
|
||||
\brief Attach the callback handler to SM2
|
||||
\param[in] sm2 Operate handle.
|
||||
\param[in] sm2 Operate handle.
|
||||
\param[in] cb Callback function
|
||||
\param[in] arg User can define it by himself as callback's param
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_attach_callback(csi_sm2_t *sm2, csi_sm2_callback_t cb,
|
||||
void *arg);
|
||||
csi_error_t csi_sm2_attach_callback(csi_sm2_t *sm2, csi_sm2_callback_t cb, void *arg);
|
||||
|
||||
/**
|
||||
\brief Detach the callback handler
|
||||
\param[in] sm2 Operate handle.
|
||||
\return none
|
||||
*/
|
||||
void csi_sm2_detach_callback(csi_sm2_t *sm2);
|
||||
|
||||
/**
|
||||
\brief sm2 get capability.
|
||||
\param[in] sm2 Operate handle.
|
||||
\param[out] cap Pointer of sm2_capabilities_t.
|
||||
\return \ref uint32_t
|
||||
\param[out] cap Pointer of sm2_capabilities_t.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_get_capabilities(csi_sm2_t *sm2, sm2_capabilities_t *cap);
|
||||
|
||||
csi_error_t csi_sm2_check_keypair(csi_sm2_t *sm2, uint8_t pubkey[65],
|
||||
uint8_t prikey[32]);
|
||||
/**
|
||||
\brief check whether the public key and private key are a pair.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] private Pointer to the sm2 private key, alloc by caller.
|
||||
\param[in] public Pointer to the sm2 public key, alloc by caller.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_check_keypair(csi_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
|
||||
|
||||
/**
|
||||
\brief generate sm2 key.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[out] private Pointer to the sm2 private key, alloc by caller.
|
||||
\param[out] public Pointer to the sm2 public key, alloc by caller.
|
||||
\return \ref uint32_t
|
||||
\param[out] public Pointer to the sm2 public key, alloc by caller.
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_gen_key(csi_sm2_t *sm2, uint8_t pubkey[65],
|
||||
uint8_t prikey[32]);
|
||||
csi_error_t csi_sm2_gen_key(csi_sm2_t *sm2, uint8_t pubkey[65], uint8_t prikey[32]);
|
||||
|
||||
/**
|
||||
\brief sm2 sign
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return \ref uint32_t
|
||||
\param[out] s Pointer to the signature
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_sign(csi_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32],
|
||||
uint8_t s[64]);
|
||||
csi_error_t csi_sm2_sign(csi_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief sm2 sign
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\return \ref uint32_t
|
||||
\param[out] s Pointer to the signature
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_sign_async(csi_sm2_t *sm2, uint8_t d[32],
|
||||
uint8_t prikey[32], uint8_t s[64]);
|
||||
csi_error_t csi_sm2_sign_async(csi_sm2_t *sm2, uint8_t d[32], uint8_t prikey[32], uint8_t s[64]);
|
||||
|
||||
/* TODO */
|
||||
/**
|
||||
\brief sm2 verify
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\param[out] s Pointer to the signature
|
||||
\return verify result
|
||||
*/
|
||||
bool csi_sm2_verify(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
|
||||
uint8_t s[64]);
|
||||
bool csi_sm2_verify(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief sm2 verify
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] d Pointer to the digest.
|
||||
\param[out] privkey Pointer to the private key
|
||||
\param[out] s Pointer to the signature
|
||||
\param[out] s Pointer to the signature
|
||||
\return verify result
|
||||
*/
|
||||
bool csi_sm2_verify_async(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65],
|
||||
uint8_t s[64]);
|
||||
bool csi_sm2_verify_async(csi_sm2_t *sm2, uint8_t d[32], uint8_t pubkey[65], uint8_t s[64]);
|
||||
|
||||
/**
|
||||
\brief sm2 encrypto
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] Plain Pointer to the plaintext.
|
||||
\param[in] PlainByteLen plaintext len
|
||||
\param[in] pubKey public key.
|
||||
\param[out] Cipher Pointer to the chipher
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] Plain Pointer to the plaintext.
|
||||
\param[in] PlainByteLen plaintext len
|
||||
\param[in] pubKey public key.
|
||||
\param[out] Cipher Pointer to the chipher
|
||||
\param[out] CipherByteLen Pointer to the chipher len.
|
||||
\return uint32_t
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_encrypt(csi_sm2_t *sm2, uint8_t *Plain,
|
||||
uint32_t PlainByteLen, uint8_t pubKey[65],
|
||||
@@ -191,13 +202,13 @@ csi_error_t csi_sm2_encrypt(csi_sm2_t *sm2, uint8_t *Plain,
|
||||
|
||||
/**
|
||||
\brief sm2 encrypto
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] Cipher Pointer to the chipher
|
||||
\param[in] CipherByteLen chipher len.
|
||||
\param[in] prikey private key.
|
||||
\param[out] Plain Pointer to the plaintext.
|
||||
\param[out] PlainByteLen plaintext len
|
||||
\return uint32_t
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\param[in] Cipher Pointer to the chipher
|
||||
\param[in] CipherByteLen chipher len.
|
||||
\param[in] prikey private key.
|
||||
\param[out] Plain Pointer to the plaintext.
|
||||
\param[out] PlainByteLen plaintext len
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_decrypt(csi_sm2_t *sm2, uint8_t *Cipher,
|
||||
uint32_t CipherByteLen, uint8_t prikey[32],
|
||||
@@ -206,7 +217,7 @@ csi_error_t csi_sm2_decrypt(csi_sm2_t *sm2, uint8_t *Cipher,
|
||||
/**
|
||||
\brief sm2 key exchange
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_exchangekey(csi_sm2_t *sm2, sm2_exchange_role_e role,
|
||||
uint8_t *dA, uint8_t *PB, uint8_t *rA,
|
||||
@@ -217,7 +228,7 @@ csi_error_t csi_sm2_exchangekey(csi_sm2_t *sm2, sm2_exchange_role_e role,
|
||||
/**
|
||||
\brief sm2 key exchange get Z.
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_getZ(csi_sm2_t *sm2, uint8_t *ID, uint32_t byteLenofID,
|
||||
uint8_t pubKey[65], uint8_t Z[32]);
|
||||
@@ -225,7 +236,7 @@ csi_error_t csi_sm2_getZ(csi_sm2_t *sm2, uint8_t *ID, uint32_t byteLenofID,
|
||||
/**
|
||||
\brief sm2 key exchange get E
|
||||
\param[in] sm2 sm2 handle to operate.
|
||||
\return uint32_t
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm2_getE(csi_sm2_t *sm2, uint8_t *M, uint32_t byteLen,
|
||||
uint8_t Z[32], uint8_t E[32]);
|
||||
|
||||
41
lib/sec_library/include/sm3.h
Normal file → Executable file
41
lib/sec_library/include/sm3.h
Normal file → Executable file
@@ -20,39 +20,39 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define SM3_DATAIN_BLOCK_SIZE 64
|
||||
#define SM3_DIGEST_OUT_SIZE 32
|
||||
#define SM3_DATAIN_BLOCK_SIZE (64)
|
||||
#define SM3_DIGEST_OUT_SIZE (32)
|
||||
|
||||
typedef struct {
|
||||
uint32_t total[2]; ///< Number of bytes processed
|
||||
uint32_t state[16]; ///< Intermediate digest state
|
||||
uint32_t total[2]; ///< Number of bytes processed
|
||||
uint32_t state[16]; ///< Intermediate digest state
|
||||
uint8_t buffer[SM3_DATAIN_BLOCK_SIZE]; ///< Data block beingprocessed
|
||||
uint8_t result[SM3_DIGEST_OUT_SIZE]; ///< Data block has processed
|
||||
uint8_t result[SM3_DIGEST_OUT_SIZE]; ///< Data block has processed
|
||||
} csi_sm3_context_t;
|
||||
|
||||
/****** SM3 State ******/
|
||||
typedef struct {
|
||||
uint32_t busy : 1; ///< Calculate busy flag
|
||||
uint32_t error : 1; ///< Calculate error flag
|
||||
uint32_t busy : 1; ///< Calculate busy flag
|
||||
uint32_t error : 1; ///< Calculate error flag
|
||||
} csi_sm3_state_t;
|
||||
|
||||
|
||||
/****** SM3 Event ******/
|
||||
typedef enum {
|
||||
SM3_EVENT_COMPLETE = 0U, ///< Calculate completed
|
||||
SM3_EVENT_COMPLETE = 0U, ///< Calculate completed
|
||||
SM3_EVENT_UPDATE,
|
||||
SM3_EVENT_START,
|
||||
SM3_EVENT_ERROR ///< Calculate error
|
||||
SM3_EVENT_ERROR ///< Calculate error
|
||||
} csi_sm3_event_t;
|
||||
|
||||
typedef struct csi_sm3_t csi_sm3_t;
|
||||
|
||||
struct csi_sm3_t {
|
||||
csi_dev_t dev; ///< SM3 hw-device info
|
||||
csi_dev_t dev; ///< SM3 hw-device info
|
||||
void (*callback)(csi_sm3_t *sm3, csi_sm3_event_t event,
|
||||
void *arg); ///< SM3 event callback for user
|
||||
void * arg; ///< SM3 custom designed param passed to evt_cb
|
||||
csi_sm3_state_t state; ///< SM3 state
|
||||
void * arg; ///< SM3 custom designed param passed to evt_cb
|
||||
csi_sm3_state_t state; ///< SM3 state
|
||||
void * priv;
|
||||
};
|
||||
|
||||
@@ -62,7 +62,7 @@ struct csi_sm3_t {
|
||||
\brief Initialize SM3 Interface. Initializes the resources needed for the SM3 interface
|
||||
\param[in] sm3 operate handle.
|
||||
\param[in] idx index of sm3
|
||||
\return error code \ref uint32_t
|
||||
\return error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm3_init(csi_sm3_t *sm3, uint32_t idx);
|
||||
|
||||
@@ -93,7 +93,7 @@ void csi_sm3_detach_callback(csi_sm3_t *sm3);
|
||||
\brief start the engine
|
||||
\param[in] sm3 sm3 handle to .operate
|
||||
\param[in] context Pointer to the sm3 context \ref csi_sm3_context_t
|
||||
\return error code \ref uint32_t
|
||||
\return error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm3_start(csi_sm3_t *sm3, csi_sm3_context_t *context);
|
||||
|
||||
@@ -103,10 +103,9 @@ csi_error_t csi_sm3_start(csi_sm3_t *sm3, csi_sm3_context_t *context);
|
||||
\param[in] context Pointer to the sm3 context \ref csi_sm3_context_t
|
||||
\param[in] input Pointer to the Source data
|
||||
\param[in] size the data size
|
||||
\return error code \ref uint32_t
|
||||
\return error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm3_update(csi_sm3_t *sm3, csi_sm3_context_t *context,
|
||||
const uint8_t *input, uint32_t size);
|
||||
csi_error_t csi_sm3_update(csi_sm3_t *sm3, csi_sm3_context_t *context, const uint8_t *input, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief Accumulate the engine (async mode)
|
||||
@@ -116,8 +115,7 @@ csi_error_t csi_sm3_update(csi_sm3_t *sm3, csi_sm3_context_t *context,
|
||||
\param[in] size The data size
|
||||
\return Error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm3_update_async(csi_sm3_t *sm3, csi_sm3_context_t *context,
|
||||
const uint8_t *input, uint32_t size);
|
||||
csi_error_t csi_sm3_update_async(csi_sm3_t *sm3, csi_sm3_context_t *context, const uint8_t *input, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief finish the engine
|
||||
@@ -125,10 +123,9 @@ csi_error_t csi_sm3_update_async(csi_sm3_t *sm3, csi_sm3_context_t *context,
|
||||
\param[in] context Pointer to the sm3 context \ref csi_sm3_context_t
|
||||
\param[out] output Pointer to the result data
|
||||
\param[out] out_size Pointer to the result data size(bytes)
|
||||
\return error code \ref uint32_t
|
||||
\return error code \ref csi_error_t
|
||||
*/
|
||||
csi_error_t csi_sm3_finish(csi_sm3_t *sm3, csi_sm3_context_t *context,
|
||||
uint8_t *output, uint32_t *out_size);
|
||||
csi_error_t csi_sm3_finish(csi_sm3_t *sm3, csi_sm3_context_t *context, uint8_t *output, uint32_t *out_size);
|
||||
|
||||
/**
|
||||
\brief Get SM3 state
|
||||
|
||||
14
lib/sec_library/include/sm4.h
Normal file → Executable file
14
lib/sec_library/include/sm4.h
Normal file → Executable file
@@ -20,9 +20,11 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define SM4_KEY_LEN_BYTES_32 32
|
||||
#define SM4_KEY_LEN_BYTES_24 24
|
||||
#define SM4_KEY_LEN_BYTES_16 16
|
||||
#define SM4_KEY_LEN_BYTES_32 (32)
|
||||
#define SM4_KEY_LEN_BYTES_24 (24)
|
||||
#define SM4_KEY_LEN_BYTES_16 (16)
|
||||
|
||||
#define SM4_IV_LEN_BYTES_16 (16)
|
||||
|
||||
typedef enum {
|
||||
SM4_KEY_LEN_BITS_128 = 0, /*128 Data bits*/
|
||||
@@ -91,8 +93,7 @@ csi_error_t csi_sm4_set_decrypt_key(csi_sm4_t *sm4, uint8_t *key, csi_sm4_key_bi
|
||||
\param[in] size the Source data size
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
csi_error_t csi_sm4_ecb_encrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out,
|
||||
uint32_t size);
|
||||
csi_error_t csi_sm4_ecb_encrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief sm4 ecb decrypt
|
||||
@@ -102,8 +103,7 @@ csi_error_t csi_sm4_ecb_encrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out,
|
||||
\param[in] size the Source data size
|
||||
\return error code \ref uint32_t
|
||||
*/
|
||||
csi_error_t csi_sm4_ecb_decrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out,
|
||||
uint32_t size);
|
||||
csi_error_t csi_sm4_ecb_decrypt(csi_sm4_t *sm4, uint8_t *in, uint8_t *out, uint32_t size);
|
||||
|
||||
/**
|
||||
\brief sm4 cbc encrypt
|
||||
|
||||
0
lib/sec_library/include/soc.h
Normal file → Executable file
0
lib/sec_library/include/soc.h
Normal file → Executable file
0
lib/sec_library/include/sys_clk.h
Normal file → Executable file
0
lib/sec_library/include/sys_clk.h
Normal file → Executable file
BIN
lib/sec_library/libsec_library.a
Normal file → Executable file
BIN
lib/sec_library/libsec_library.a
Normal file → Executable file
Binary file not shown.
Reference in New Issue
Block a user