12 Commits

Author SHA1 Message Date
Maximilian Rehkopf
7df6909266 FPGA: rework shared memory access FSM 2012-07-09 02:12:59 +02:00
Maximilian Rehkopf
006ea8c44a FPGA: debug wires 2012-07-09 02:03:59 +02:00
Maximilian Rehkopf
3af05cef91 FPGA/sd2sneslite: add missing file mcu_cmd.v; remove avr_cmd.v 2012-07-09 01:55:02 +02:00
Maximilian Rehkopf
a083d80ff9 FPGA: update clock speed to 88MHz 2012-07-09 01:54:05 +02:00
Maximilian Rehkopf
8148f5567c FPGA: properly synchronize external signals 2012-07-09 01:48:43 +02:00
Maximilian Rehkopf
e33b2b2bc7 FPGA: simple SNES address input filtering 2012-07-09 01:37:57 +02:00
Maximilian Rehkopf
a5a02992e5 FPGA/embedded config: slightly tighten timing constraints 2012-06-11 01:52:45 +02:00
Maximilian Rehkopf
034b39588c FPGA: adjust menu memory mapping to make more room for file database 2012-06-10 20:07:45 +02:00
Maximilian Rehkopf
86576d2e48 FPGA: clean up (port size mismatches, unused regs/wires, ...) 2011-10-09 14:13:35 +02:00
Maximilian Rehkopf
b05c89cdbf FPGA: merge recent changes into sd2sneslite 2011-10-08 17:05:22 +02:00
ikari
d803252866 reduced FPGA config: cleanup... 2010-12-31 02:53:49 +01:00
ikari
90fcdf6615 feature reduced FPGA config for uC flash embedding 2010-12-31 02:49:04 +01:00