Menu: simplify some memory accesses

pcb/kicad/RevE/fpga.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Fri 29 Jul 2011 09:56:34 PM CEST
+EESchema Schematic File Version 2  date Fri 02 Dec 2011 09:50:04 AM CET
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A3 16535 11700
 encoding utf-8
 Sheet 6 6
 Title "sd2snes Mark II"
-Date "24 jul 2011"
+Date "2 dec 2011"
 Rev "C"
 Comp "Maximilian Rehkopf"
 Comment1 ""

pcb/kicad/RevE/mcu.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Fri 29 Jul 2011 09:56:34 PM CEST
+EESchema Schematic File Version 2  date Fri 02 Dec 2011 09:50:04 AM CET
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
 encoding utf-8
 Sheet 4 6
 Title "sd2snes Mark II"
-Date "24 jul 2011"
+Date "2 dec 2011"
 Rev "C"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -1034,7 +1034,7 @@ L C C409
 U 1 1 4BEECBD1
 P 3100 6600
 F 0 "C409" H 3150 6700 50  0000 L CNN
-F 1 "22p" H 3150 6500 50  0000 L CNN
+F 1 "10p" H 3150 6500 50  0000 L CNN
 F 2 "SM0805_FIXEDMASK" H 3100 6600 60  0001 C CNN
 	1    3100 6600
 	1    0    0    -1  
@@ -1044,7 +1044,7 @@ L C C408
 U 1 1 4BEECBCD
 P 2500 6600
 F 0 "C408" H 2550 6700 50  0000 L CNN
-F 1 "22p" H 2550 6500 50  0000 L CNN
+F 1 "10p" H 2550 6500 50  0000 L CNN
 F 2 "SM0805_FIXEDMASK" H 2500 6600 60  0001 C CNN
 	1    2500 6600
 	1    0    0    -1  

pcb/kicad/RevE/memory.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Fri 29 Jul 2011 09:56:34 PM CEST
+EESchema Schematic File Version 2  date Fri 02 Dec 2011 09:50:04 AM CET
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
 encoding utf-8
 Sheet 3 6
 Title "sd2snes Mark II"
-Date "24 jul 2011"
+Date "2 dec 2011"
 Rev "C"
 Comp "Maximilian Rehkopf"
 Comment1 ""

pcb/kicad/RevE/pwr_misc.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Fri 29 Jul 2011 09:56:34 PM CEST
+EESchema Schematic File Version 2  date Fri 02 Dec 2011 09:50:04 AM CET
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
 encoding utf-8
 Sheet 5 6
 Title "sd2snes Mark II"
-Date "24 jul 2011"
+Date "2 dec 2011"
 Rev "C"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -55,6 +55,8 @@ Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
+Text Notes 4900 5900 0    50   ~ 0
+Stuff with 0603 ferrite bead
 Wire Wire Line
 	5750 5500 5900 5500
 Wire Wire Line
@@ -334,7 +336,7 @@ L JUMPER JP341
 U 1 1 4DB35D41
 P 5450 5500
 F 0 "JP341" H 5450 5650 60  0000 C CNN
-F 1 "JUMPER" H 5450 5420 40  0000 C CNN
+F 1 "FB 0603" H 5450 5420 40  0000 C CNN
 	1    5450 5500
 	1    0    0    -1  
 $EndComp

pcb/kicad/RevE/sd2snes.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Fri 29 Jul 2011 09:56:34 PM CEST
+EESchema Schematic File Version 2  date Fri 02 Dec 2011 09:50:04 AM CET
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
 encoding utf-8
 Sheet 1 6
 Title "sd2snes Mark II"
-Date "24 jul 2011"
+Date "2 dec 2011"
 Rev "E"
 Comp "Maximilian Rehkopf"
 Comment1 ""

pcb/kicad/RevE/snesslot.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Fri 29 Jul 2011 09:56:34 PM CEST
+EESchema Schematic File Version 2  date Fri 02 Dec 2011 09:50:04 AM CET
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A3 16535 11700
 encoding utf-8
 Sheet 2 6
 Title "sd2snes Mark II"
-Date "24 jul 2011"
+Date "2 dec 2011"
 Rev "C"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -855,7 +855,7 @@ L R_PACK4 RA114
 U 1 1 4D97B45F
 P 15250 4750
 F 0 "RA114" H 15250 4600 40  0000 C CNN
-F 1 "220" H 15250 4950 40  0000 C CNN
+F 1 "100" H 15250 4950 40  0000 C CNN
 	1    15250 4750
 	1    0    0    -1  
 $EndComp
@@ -864,7 +864,7 @@ L R_PACK4 RA113
 U 1 1 4D97B45C
 P 15250 4350
 F 0 "RA113" H 15250 4800 40  0000 C CNN
-F 1 "220" H 15250 4550 40  0000 C CNN
+F 1 "100" H 15250 4550 40  0000 C CNN
 	1    15250 4350
 	1    0    0    -1  
 $EndComp
@@ -913,7 +913,7 @@ L R_PACK4 RA108
 U 1 1 4D963119
 P 4150 8350
 F 0 "RA108" H 4150 8300 40  0000 C CNN
-F 1 "220" H 4150 8550 40  0000 C CNN
+F 1 "100" H 4150 8550 40  0000 C CNN
 	1    4150 8350
 	-1   0    0    -1  
 $EndComp
@@ -922,7 +922,7 @@ L R_PACK4 RA107
 U 1 1 4D963117
 P 4150 7950
 F 0 "RA107" H 4150 8400 40  0000 C CNN
-F 1 "220" H 4150 8150 40  0000 C CNN
+F 1 "100" H 4150 8150 40  0000 C CNN
 	1    4150 7950
 	-1   0    0    -1  
 $EndComp
@@ -931,7 +931,7 @@ L R_PACK4 RA106
 U 1 1 4D963115
 P 4150 7350
 F 0 "RA106" H 4150 7300 40  0000 C CNN
-F 1 "220" H 4150 7550 40  0000 C CNN
+F 1 "100" H 4150 7550 40  0000 C CNN
 	1    4150 7350
 	-1   0    0    -1  
 $EndComp
@@ -940,7 +940,7 @@ L R_PACK4 RA105
 U 1 1 4D96310E
 P 4150 6950
 F 0 "RA105" H 4150 7400 40  0000 C CNN
-F 1 "220" H 4150 7150 40  0000 C CNN
+F 1 "100" H 4150 7150 40  0000 C CNN
 	1    4150 6950
 	-1   0    0    -1  
 $EndComp
@@ -949,7 +949,7 @@ L R_PACK4 RA112
 U 1 1 4D96310C
 P 4150 4650
 F 0 "RA112" H 4150 4600 40  0000 C CNN
-F 1 "220" H 4150 4850 40  0000 C CNN
+F 1 "100" H 4150 4850 40  0000 C CNN
 	1    4150 4650
 	1    0    0    -1  
 $EndComp
@@ -958,7 +958,7 @@ L R_PACK4 RA111
 U 1 1 4D96310A
 P 4150 4250
 F 0 "RA111" H 4150 4700 40  0000 C CNN
-F 1 "220" H 4150 4450 40  0000 C CNN
+F 1 "100" H 4150 4450 40  0000 C CNN
 	1    4150 4250
 	-1   0    0    -1  
 $EndComp
@@ -967,7 +967,7 @@ L R_PACK4 RA110
 U 1 1 4D963107
 P 4150 3650
 F 0 "RA110" H 4150 3600 40  0000 C CNN
-F 1 "220" H 4150 3850 40  0000 C CNN
+F 1 "100" H 4150 3850 40  0000 C CNN
 	1    4150 3650
 	-1   0    0    -1  
 $EndComp
@@ -976,7 +976,7 @@ L R_PACK4 RA109
 U 1 1 4D963103
 P 4150 3250
 F 0 "RA109" H 4150 3700 40  0000 C CNN
-F 1 "220" H 4150 3450 40  0000 C CNN
+F 1 "100" H 4150 3450 40  0000 C CNN
 	1    4150 3250
 	-1   0    0    -1  
 $EndComp
@@ -985,7 +985,7 @@ L R_PACK4 RA102
 U 1 1 4D9630F4
 P 12400 3750
 F 0 "RA102" H 12400 3700 40  0000 C CNN
-F 1 "220" H 12400 3950 40  0000 C CNN
+F 1 "100" H 12400 3950 40  0000 C CNN
 	1    12400 3750
 	1    0    0    -1  
 $EndComp
@@ -994,7 +994,7 @@ L R_PACK4 RA101
 U 1 1 4D9630F0
 P 12400 3350
 F 0 "RA101" H 12400 3800 40  0000 C CNN
-F 1 "220" H 12400 3550 40  0000 C CNN
+F 1 "100" H 12400 3550 40  0000 C CNN
 	1    12400 3350
 	1    0    0    -1  
 $EndComp
@@ -1005,7 +1005,7 @@ P 12400 4750
 AR Path="/4B6E16F2/4D95CDCD" Ref="RP?"  Part="1" 
 AR Path="/4B6E16F2/4D95CDD4" Ref="RA104"  Part="1" 
 F 0 "RA104" H 12400 4650 40  0000 C CNN
-F 1 "220" H 12400 4950 40  0000 C CNN
+F 1 "FB" H 12400 4950 40  0000 C CNN
 	1    12400 4750
 	1    0    0    -1  
 $EndComp
@@ -1014,7 +1014,7 @@ L R_PACK4 RA103
 U 1 1 4D95CDCD
 P 12400 4350
 F 0 "RA103" H 12400 4800 40  0000 C CNN
-F 1 "220" H 12400 4550 40  0000 C CNN
+F 1 "FB" H 12400 4550 40  0000 C CNN
 	1    12400 4350
 	1    0    0    -1  
 $EndComp

snes/data.a65

@@ -1,15 +1,15 @@
 .data
 ;don't anger the stack!
 dirptr_addr	.word	0
-dirptr_bank	.byt	0
+dirptr_bank	.word	0
 dirstart_addr	.word	0
-dirstart_bank	.byt	0
+dirstart_bank	.word	0
-dirend_addr	.word 	0
+dirend_addr	.word	0
-dirend_bank	.byt	0
+dirend_bank	.word	0
 dirend_idx	.word	0
 dirptr_idx	.word	0
-dirent_addr	.word 0
+dirent_addr	.word	0
-dirent_bank	.byt 0
+dirent_bank	.word	0
 dirent_type	.byt 0
 dirend_onscreen	.byt 0
 dirlog_idx	.byt 0,0,0 ; long ptr

snes/menu.a65

@@ -188,32 +188,26 @@ redraw_filelist_loop
 	lsr
 	cmp listdisp
 	beq redraw_filelist_last
-	lda dirptr_bank
-	phb
-	pha
-	plb
 	rep #$20 : .al
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	sta @dirent_addr
 	iny
 	iny
 	sep #$20 : .as
-	lda (dirptr_addr), y       ; load fileinfo bank
+	lda [dirptr_addr], y	   ; load fileinfo bank
 	clc
 	adc #$c0                   ; add $C0 for memory map
 	sta @dirent_bank           ; store as current bank
 	cmp #$c0                   ; if bank was 0 -> dirend entry in DB
 	beq redraw_filelist_dirend ; handle dirend
 	iny
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	iny
 	sta @dirent_type
-	plb
 	sty dirptr_idx
 	jsr print_direntry
 	bra redraw_filelist_loop
 redraw_filelist_dirend
-	plb
 	dey                        ; recover last valid direntry number
 	dey                        ; (we had 2x iny of the direntry pointer above,
 	dey                        ;  so account for those too)
@@ -225,15 +219,10 @@ redraw_filelist_dirend
 	sta dirend_onscreen
 	bra redraw_filelist_out
 redraw_filelist_last	;check if next offscreen item is end of dir
-	lda dirptr_bank
-	phb
-	pha
-	plb
 	iny
 	iny
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	beq redraw_filelist_dirend
-	plb
 redraw_filelist_out
 	ldx #$0000
 	stx dirptr_idx
@@ -352,7 +341,7 @@ menu_key_down:
 	lda listdisp
 	dec
 	cmp menu_sel
-	bne +
+	bne down_noscroll
 	lda #$01
 	sta menu_dirty
 	lda dirend_onscreen
@@ -361,10 +350,13 @@ menu_key_down:
 	lda dirptr_addr
 	clc
 	adc #$04
-	sta dirptr_addr
+	bcc +
+	inc dirptr_bank
++	sta dirptr_addr
 	sep #$20 : .as
 	rts
-+	lda dirend_onscreen
+down_noscroll
+	lda dirend_onscreen
 	beq +
 	lda dirend_idx
 	lsr
@@ -380,7 +372,7 @@ down_out
 
 menu_key_up:
 	lda menu_sel
-	bne +
+	bne up_noscroll
 	lda #$01
 	sta menu_dirty
 	rep #$20 : .al
@@ -389,9 +381,12 @@ menu_key_up:
 	beq up_out
 	sec
 	sbc #$04
-	sta dirptr_addr
+	bcs +
+	dec dirptr_bank
++	sta dirptr_addr
 	bra up_out
-+	dec
+up_noscroll
+	dec
 	sta menu_sel
 up_out
 	sep #$20 : .as
@@ -480,14 +475,10 @@ select_item:
 	asl
 	tay
 	sep #$20 : .as
-	lda dirptr_bank
-	phb
-	pha
-	plb
 	iny
 	iny
 	iny
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	cmp #$01
 	beq sel_is_file
 	cmp #$04
@@ -497,7 +488,6 @@ select_item:
 	cmp #$81
 	beq sel_is_parent
 select_item_cont
-	plb
 	rts
 sel_is_file
 	jsr select_file
@@ -513,12 +503,12 @@ select_file:
 	; have avr load the rom
 	dey
 	rep #$20 : .al
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	and #$00ff
 	sta @AVR_PARAM+2
 	dey
 	dey
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	sta @AVR_PARAM
 	sep #$20 : .as
 	lda #$01
@@ -559,14 +549,14 @@ select_dir:
 ; y = direntry ptr
 	txy
 	dey
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	clc
 	adc #$c0
 	sta @dirent_bank
 	dey
 	dey
 	rep #$20 : .al
-	lda (dirptr_addr), y
+	lda [dirptr_addr], y
 	sta @dirent_addr
 	tax
 	sep #$20 : .as

src/bootldr/clock.c

@@ -48,8 +48,7 @@ void clock_init() {
  */
   enableMainOsc();
   setClkSrc(CLKSRC_MAINOSC);
-// XXX  setPLL0MultPrediv(429, 19);
+  setPLL0MultPrediv(12, 1);
-  setPLL0MultPrediv(23, 2);
   enablePLL0();
   setCCLKDiv(3);
   connectPLL0();

src/bootldr/config.h

@@ -1,7 +1,7 @@
 #ifndef _CONFIG_H
 #define _CONFIG_H
 
-#define DEBUG_BL
+//#define DEBUG_BL
 // #define DEBUG_SD
 // #define DEBUG_IRQ
 
@@ -19,7 +19,7 @@
 #define DBG_BL while(0)
 #endif
 
-#define FW_START                  (0x00003000L)
+#define FW_START                  (0x00002000L)
 #define FLASH_SECTORS             (17)
 
 
@@ -51,12 +51,12 @@
 
 #define CONFIG_UART_NUM	          3
 // #define CONFIG_CPU_FREQUENCY      90315789
-#define CONFIG_CPU_FREQUENCY      (92000000L)
+#define CONFIG_CPU_FREQUENCY      (96000000L)
 //#define CONFIG_CPU_FREQUENCY      46000000
 #define CONFIG_UART_PCLKDIV       1
 #define CONFIG_UART_TX_BUF_SHIFT  8
 #define CONFIG_UART_BAUDRATE      921600
-#define CONFIG_UART_DEADLOCKABLE
+//#define CONFIG_UART_DEADLOCKABLE
 
 #define SSP_CLK_DIVISOR_FAST 2
 #define SSP_CLK_DIVISOR_SLOW 250

src/bootldr/iap.c

@@ -183,7 +183,7 @@ FLASH_RES flash_file(uint8_t *filename) {
         return ERR_FLASH;
       }
     }
-    if(total_read != file_header.size) {
+    if(total_read != (file_header.size + 0x100)) {
       DBG_BL printf("wrote less data than expected! (%08lx vs. %08lx)\n", total_read, file_header.size);
       DBG_UART uart_putc('X');
       return ERR_FILECHK;

src/bootldr/lpc1754boot.ld

@@ -10,7 +10,7 @@ ENTRY(_start)
 
 MEMORY
 {
-  flash  (rx)  : ORIGIN = 0x00000000, LENGTH = 0x03000
+  flash  (rx)  : ORIGIN = 0x00000000, LENGTH = 0x02000
   ram    (rwx) : ORIGIN = 0x10000000, LENGTH = 0x03fe0 /* leave room for IAP */
   ahbram (rwx) : ORIGIN = 0x2007C000, LENGTH = 0x04000
 }

src/bootldr/main.c

@@ -29,7 +29,7 @@ int main(void) {
   SNES_CIC_PAIR_REG->FIODIR = BV(SNES_CIC_PAIR_BIT);
   BITBAND(SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT) = 1;
 /*  LPC_GPIO2->FIODIR = BV(0) | BV(1) | BV(2); */
-  LPC_GPIO0->FIODIR = BV(16);
+//  LPC_GPIO0->FIODIR = BV(16);
 
  /* connect UART3 on P0[25:26] + SSP0 on P0[15:18] + MAT3.0 on P0[10] */
   LPC_PINCON->PINSEL1 = BV(18) | BV(19) | BV(20) | BV(21) /* UART3 */
@@ -50,7 +50,7 @@ int main(void) {
   writeled(0);
  /* do this last because the peripheral init()s change PCLK dividers */
   clock_init();
-  LPC_PINCON->PINSEL0 |= BV(20) | BV(21);                  /* MAT3.0 (FPGA clock) */
+//  LPC_PINCON->PINSEL0 |= BV(20) | BV(21);                  /* MAT3.0 (FPGA clock) */
   sdn_init();
   DBG_BL printf("chksum=%08lx\n", *(uint32_t*)28);
   DBG_BL printf("\n\nsd2snes mk.2 bootloader\nver.: " VER "\ncpu clock: %ld Hz\n", CONFIG_CPU_FREQUENCY);
@@ -61,7 +61,8 @@ DBG_BL printf("PCONP=%lx\n", LPC_SC->PCONP);
   LPC_TIM3->MCR=MR0R;
   LPC_TIM3->MR0=1;
   LPC_TIM3->TCR=1;
-
+  NVIC->ICER[0] = 0xffffffff;
+  NVIC->ICER[1] = 0xffffffff;
   FLASH_RES res = flash_file((uint8_t*)"/sd2snes/firmware.img");
   if(res == ERR_FLASHPREP || res == ERR_FLASHERASE || res == ERR_FLASH) {
     rdyled(0);

src/bootldr/uart.c

@@ -10,7 +10,7 @@
 #include "uart.h"
 #include "led.h"
 
-static uint8_t uart_lookupratio(float f_fr) {
+/*static uint8_t uart_lookupratio(float f_fr) {
   uint16_t errors[72]={0,67,71,77,83,91,100,111,125,
                        133,143,154,167,182,200,214,222,231,
                        250,267,273,286,300,308,333,357,364,
@@ -45,8 +45,8 @@ static uint8_t uart_lookupratio(float f_fr) {
   }
   return ratios[i_result];
 }
-
+*/
-static uint32_t baud2divisor(unsigned int baudrate) {
+/*static uint32_t baud2divisor(unsigned int baudrate) {
   uint32_t int_ratio;
   uint32_t error;
   uint32_t dl=0;
@@ -73,7 +73,7 @@ static uint32_t baud2divisor(unsigned int baudrate) {
     return ((fract_ratio<<16)&0xff0000) | dl;
   }
 }
-
+*/
 static char txbuf[1 << CONFIG_UART_TX_BUF_SHIFT];
 static volatile unsigned int read_idx,write_idx;
 
@@ -170,7 +170,7 @@ void uart_init(void) {
 
   /* set baud rate - no fractional stuff for now */
   UART_REGS->LCR = BV(7) | 3; // always 8n1
-  div = baud2divisor(CONFIG_UART_BAUDRATE);
+  div = 0x850004; // baud2divisor(CONFIG_UART_BAUDRATE);
 
   UART_REGS->DLL = div & 0xff;
   UART_REGS->DLM = (div >> 8) & 0xff;

src/cli.c

@@ -58,8 +58,8 @@ static char *curchar;
 
 /* Word lists */
 static char command_words[] =
-  "cd\0reset\0sreset\0dir\0ls\0test\0resume\0loadrom\0loadraw\0saveraw\0put\0d4\0vmode\0mapper\0settime\0time\0setfeature\0hexdump\0w8\0w16\0";
+  "cd\0reset\0sreset\0dir\0ls\0test\0resume\0loadrom\0loadraw\0saveraw\0put\0rm\0d4\0vmode\0mapper\0settime\0time\0setfeature\0hexdump\0w8\0w16\0";
-enum { CMD_CD = 0, CMD_RESET, CMD_SRESET, CMD_DIR, CMD_LS, CMD_TEST, CMD_RESUME, CMD_LOADROM, CMD_LOADRAW, CMD_SAVERAW, CMD_PUT, CMD_D4, CMD_VMODE, CMD_MAPPER, CMD_SETTIME, CMD_TIME, CMD_SETFEATURE, CMD_HEXDUMP, CMD_W8, CMD_W16 };
+enum { CMD_CD = 0, CMD_RESET, CMD_SRESET, CMD_DIR, CMD_LS, CMD_TEST, CMD_RESUME, CMD_LOADROM, CMD_LOADRAW, CMD_SAVERAW, CMD_PUT, CMD_RM, CMD_D4, CMD_VMODE, CMD_MAPPER, CMD_SETTIME, CMD_TIME, CMD_SETFEATURE, CMD_HEXDUMP, CMD_W8, CMD_W16 };
 
 /* ------------------------------------------------------------------------- */
 /*   Parse functions                                                         */
@@ -343,6 +343,11 @@ void cmd_put(void) {
   }
 }
 
+void cmd_rm(void) {
+  FRESULT res = f_unlink(curchar);
+  if(res) printf("Error %d removing %s\n", res, curchar);
+}
+
 void cmd_mapper(void) {
   int32_t mapper;
   mapper = parse_unsigned(0,7,10);
@@ -509,6 +514,10 @@ void cli_loop(void) {
       cmd_saveraw();
       break;
 
+    case CMD_RM:
+      cmd_rm();
+      break;
+
     case CMD_D4:
       cmd_d4();
       break;

src/config

@@ -1,3 +1,4 @@
-CONFIG_VERSION=0.0.1
+CONFIG_VERSION=0.1.0
-CONFIG_FWVER=16777214
+#FWVER=000100
+CONFIG_FWVER=256
 CONFIG_MCU_FOSC=12000000

src/config.h

@@ -65,7 +65,7 @@
 #define FPGA_MCU_RDY_REG          LPC_GPIO2
 #define FPGA_MCU_RDY_BIT          9
 
-#define QSORT_MAXELEM             1024
+#define QSORT_MAXELEM             2048
 
 #define SSP_REGS LPC_SSP0
 #define SSP_PCLKREG PCLKSEL1

src/ff.c

@@ -2198,7 +2198,6 @@ FRESULT f_read (
 #if !_FS_TINY
 #if !_FS_READONLY
 			if (fp->flag & FA__DIRTY) {				/* Write sector I/O buffer if needed */
-printf("DIRTY!?!\n");
 				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)
 					ABORT(fp->fs, FR_DISK_ERR);
 				fp->flag &= ~FA__DIRTY;
@@ -2222,7 +2221,6 @@ printf("DIRTY!?!\n");
 			mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
 #else
 			mem_cpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
-			printf("final mem_cpy, rcnt=%d, rbuff-buff=%d\n", rcnt, (void*)rbuff-buff);
 		} else {
 			sd_offload_partial_start = fp->fptr % SS(fp->fs);
 			sd_offload_partial_end = sd_offload_partial_start + rcnt;
@@ -2376,7 +2374,6 @@ FRESULT f_sync (
 	res = validate(fp->fs, fp->id);		/* Check validity of the object */
 	if (res == FR_OK) {
 		if (fp->flag & FA__WRITTEN) {	/* Has the file been written? */
-printf("DIRTY?!?!?!\n");
 #if !_FS_TINY	/* Write-back dirty buffer */
 			if (fp->flag & FA__DIRTY) {
 				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)
@@ -2822,6 +2819,46 @@ FRESULT f_readdir (
 }
 
 
+FRESULT l_opendirbycluster (
+  FATFS *fs,
+  DIR *dj,
+  const TCHAR *path,
+  DWORD clust
+)
+{
+  FRESULT res;
+  res = chk_mounted(&path, &fs, 0);
+  DEF_NAMEBUF;
+  INIT_BUF(*dj);
+  dj->sclust = clust;
+  dj->fs = fs;
+  dj->id = fs->id;
+  dj->dir = 0;
+  res = dir_sdi(dj, 0);
+  FREE_BUF();
+  return res;
+}
+
+FRESULT l_openfilebycluster (
+  FATFS *fs,           /* Pointer to file system object */
+  FIL *fp,             /* Pointer to the blank file object */
+  const TCHAR *path,
+  DWORD clust,         /* Cluster number to be opened */
+  DWORD fsize          /* File size to be assumed */
+)
+{
+  chk_mounted(&path, &fs, 0);
+  fp->flag = FA_READ;
+  fp->org_clust = clust;
+  fp->fsize = fsize;
+  fp->fptr = 0;
+  fp->dsect = 0;
+  fp->fs = fs;
+
+  return FR_OK;
+}
+
+
 
 #if _FS_MINIMIZE == 0
 /*-----------------------------------------------------------------------*/
@@ -2854,27 +2891,6 @@ FRESULT f_stat (
 	LEAVE_FF(dj.fs, res);
 }
 
-
-FRESULT l_openfilebycluster (
-  FATFS *fs,           /* Pointer to file system object */
-  FIL *fp,             /* Pointer to the blank file object */
-  const TCHAR *path,
-  DWORD clust,         /* Cluster number to be opened */
-  DWORD fsize          /* File size to be assumed */
-)
-{
-  chk_mounted(&path, &fs, 0);
-  fp->flag = FA_READ;
-  fp->org_clust = clust;
-  fp->fsize = fsize;
-  fp->fptr = 0;
-  fp->dsect = 0;
-  fp->fs = fs;
-
-  return FR_OK;
-}
-
-
 #if !_FS_READONLY
 /*-----------------------------------------------------------------------*/
 /* Get Number of Free Clusters                                           */

src/ff.h

@@ -398,6 +398,7 @@ typedef enum {
 
 /* Low Level functions */
 FRESULT l_openfilebycluster(FATFS *fs, FIL *fp, const TCHAR *path, DWORD clust, DWORD fsize);   /* Open a file by its start cluster using supplied file size */
+FRESULT l_opendirbycluster (FATFS *fs, DIR *dj, const TCHAR *path, DWORD clust);
 
 /* application level functions */
 FRESULT f_mount (BYTE, FATFS*);						/* Mount/Unmount a logical drive */

src/fileops.c

@@ -47,6 +47,10 @@ void file_reinit(void) {
   file_init();
 }
 
+FRESULT dir_open_by_filinfo(DIR* dir, FILINFO* fno) {
+  return l_opendirbycluster(&fatfs, dir, (TCHAR*)"", fno->clust);
+}
+
 void file_open_by_filinfo(FILINFO* fno) {
   file_res = l_openfilebycluster(&fatfs, &file_handle, (TCHAR*)"", fno->clust, fno->fsize);
 }

src/fileops.h

@@ -41,6 +41,7 @@ enum filestates file_status;
 
 void file_init(void);
 void file_open(uint8_t* filename, BYTE flags);
+FRESULT dir_open_by_filinfo(DIR* dir, FILINFO* fno_param);
 void file_open_by_filinfo(FILINFO* fno);
 void file_close(void);
 void file_seek(uint32_t offset);

src/filetypes.c

@@ -53,7 +53,7 @@ uint16_t scan_flat(const char* path) {
   return numentries;
 }
 
-uint32_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
+uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_tgt) {
   DIR dir;
   FILINFO fno;
   FRESULT res;
@@ -97,13 +97,17 @@ uint32_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
       if(next_subdir_tgt > dir_end) {
         dir_end = next_subdir_tgt;
       }
-      printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt);
+//      printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt);
       if(mkdb) {
-        printf("d=%d Saving %lx to Address %lx  [end]\n", depth, 0L, next_subdir_tgt - 4);
+//        printf("d=%d Saving %lx to Address %lx  [end]\n", depth, 0L, next_subdir_tgt - 4);
         sram_writelong(0L, next_subdir_tgt - 4);
       }
     }
-    res = f_opendir(&dir, (TCHAR*)path);
+    if(fno_param) {
+      res = dir_open_by_filinfo(&dir, fno_param);
+    } else {
+      res = f_opendir(&dir, path);
+    }
     if (res == FR_OK) {
       if(pass && parent_tgt && mkdb) {
         /* write backlink to parent dir
@@ -114,6 +118,7 @@ uint32_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
           db_tgt += 0x00010000;
           printf("new=%lx\n", db_tgt);
         }
+//        printf("writing link to parent, %lx to address %lx [../]\n", parent_tgt-SRAM_MENU_ADDR, db_tgt);
         sram_writelong((parent_tgt-SRAM_MENU_ADDR), db_tgt);
         sram_writebyte(0, db_tgt+sizeof(next_subdir_tgt));
         sram_writeblock("../\0", db_tgt+sizeof(next_subdir_tgt)+sizeof(len), 4);
@@ -142,9 +147,7 @@ uint32_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
               strncpy(path+len+1, (char*)fn, sizeof(fs_path)-len);
               if(mkdb) {
                 uint16_t pathlen = strlen(path);
-                /* write element pointer to current dir structure */
+//                printf("d=%d Saving %lx to Address %lx  [dir]\n", depth, db_tgt, dir_tgt);
-                printf("d=%d Saving %lx to Address %lx  [dir]\n", depth, db_tgt, dir_tgt);
-                sram_writelong((db_tgt-SRAM_MENU_ADDR)|((uint32_t)0x80<<24), dir_tgt);
                 /* save element:
                    - path name
                    - pointer to sub dir structure */
@@ -154,7 +157,12 @@ uint32_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
                   db_tgt += 0x00010000;
                   printf("new=%lx\n", db_tgt);
                 }
-                printf("    Saving dir descriptor to %lx tgt=%lx, path=%s\n", db_tgt, next_subdir_tgt, path);
+//                printf("    Saving dir descriptor to %lx tgt=%lx, path=%s\n", db_tgt, next_subdir_tgt, path);
+                /* write element pointer to current dir structure */
+                sram_writelong((db_tgt-SRAM_MENU_ADDR)|((uint32_t)0x80<<24), dir_tgt);
+                /* save element:
+                   - path name
+                   - pointer to sub dir structure */
                 sram_writelong((next_subdir_tgt-SRAM_MENU_ADDR), db_tgt);
                 sram_writebyte(len+1, db_tgt+sizeof(next_subdir_tgt));
                 sram_writeblock(path, db_tgt+sizeof(next_subdir_tgt)+sizeof(len), pathlen);
@@ -162,7 +170,7 @@ uint32_t scan_dir(char* path, char mkdb, uint32_t this_dir_tgt) {
                 db_tgt += sizeof(next_subdir_tgt) + sizeof(len) + pathlen + 2;
               }
               parent_tgt = this_dir_tgt;
-              scan_dir(path, mkdb, next_subdir_tgt);
+              scan_dir(path, &fno, mkdb, next_subdir_tgt);
               dir_tgt += 4;
               was_empty = 0;
             }

src/filetypes.h

@@ -50,7 +50,7 @@ char fs_path[256];
 SNES_FTYPE determine_filetype(char* filename);
 //uint32_t scan_fs();
 uint16_t scan_flat(const char* path);
-uint32_t scan_dir(char* path, char mkdb, uint32_t this_subdir_tgt);
+uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_subdir_tgt);
 FRESULT get_db_id(uint32_t*);
 int get_num_dirent(uint32_t addr);
 void sort_all_dir(uint32_t endaddr);

src/flash.script

@@ -6,7 +6,7 @@
 #flash info 0
 
 reset init
-flash write_image erase unlock obj/firmware.img 12288
+flash write_image erase unlock obj/firmware.img 8192
 reset run
 shutdown
 

src/fpga_spi.c

@@ -133,6 +133,7 @@
 #include "spi.h"
 #include "fpga_spi.h"
 #include "timer.h"
+#include "sdnative.h"
 
 void fpga_spi_init(void) {
   spi_init(SPI_SPEED_FAST);
@@ -230,10 +231,12 @@ void fpga_sddma(uint8_t tgt, uint8_t partial) {
   FPGA_SELECT();
   FPGA_TX_BYTE(0xF1); /* STATUS */
   FPGA_TX_BYTE(0x00); /* dummy */
+  DBG_SD printf("FPGA DMA request sent, wait for completion...");
   while((status=FPGA_RX_BYTE()) & 0x80) {
     FPGA_RX_BYTE(); /* eat the 2nd status byte */
     test++;
   }
+  DBG_SD printf("...complete\n");
   FPGA_DESELECT();
   if(test<5)printf("loopy: %ld %02x\n", test, status);
   BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 1;

src/lpc1754.ld

@@ -10,7 +10,7 @@ ENTRY(_start)
 
 MEMORY
 {
-  flash  (rx)  : ORIGIN = 0x00003100, LENGTH = 0x1cf00 /* leave room for bootldr + metadata */
+  flash  (rx)  : ORIGIN = 0x00002100, LENGTH = 0x1df00 /* leave room for bootldr + metadata */
   ram    (rwx) : ORIGIN = 0x10000000, LENGTH = 0x04000
   ahbram (rwx) : ORIGIN = 0x2007C000, LENGTH = 0x04000
 }

src/main.c

@@ -145,7 +145,7 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
     if((mem_magic != 0x12345678) || (mem_dir_id != saved_dir_id) || (newcard)) {
       newcard = 0;
       /* generate fs footprint (interesting files only) */
-      uint32_t curr_dir_id = scan_dir(fs_path, 0, 0);
+      uint32_t curr_dir_id = scan_dir(fs_path, NULL, 0, 0);
       printf("curr dir id = %lx\n", curr_dir_id);
       /* files changed or no database found? */
       if((get_db_id(&saved_dir_id) != FR_OK)
@@ -154,7 +154,7 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
 	printf("saved dir id = %lx\n", saved_dir_id);
 	printf("rebuilding database...");
 	snes_bootprint("     rebuilding database ...    \0");
-	curr_dir_id = scan_dir(fs_path, 1, 0);
+	curr_dir_id = scan_dir(fs_path, NULL, 1, 0);
 	sram_writeblock(&curr_dir_id, SRAM_DB_ADDR, 4);
 	uint32_t endaddr, direndaddr;
 	sram_readblock(&endaddr, SRAM_DB_ADDR+4, 4);

src/memory.h

@@ -34,7 +34,7 @@
 #define SRAM_SAVE_ADDR (0xE00000L)
 
 #define SRAM_MENU_ADDR (0xE00000L)
-#define SRAM_DB_ADDR (0xE20000L)
+#define SRAM_DB_ADDR (0xE40000L)
 #define SRAM_DIR_ADDR (0xE10000L)
 #define SRAM_CMD_ADDR (0xFF1000L)
 #define SRAM_PARAM_ADDR (0xFF1004L)

src/sdnative.c

@@ -449,9 +449,11 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
       j=datcnt;
       datshift=8;
       DBG_SD printf("response over, waiting for data...\n");
+      /* wait for data start bit on DAT0 */
       while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
         wiggle_fast_neg1();
       }
+      DBG_SD if(!timeout) printf("timed out!\n");
       wiggle_fast_neg1(); /* eat the start bit */
       if(sd_offload) {
         if(sd_offload_partial) {
@@ -588,9 +590,12 @@ int stream_datablock(uint8_t *buf) {
   uint8_t datdata=0;
   uint32_t timeout=1000000;
 
+  DBG_SD printf("stream_datablock: wait for ready...\n");
   while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
     wiggle_fast_neg1();
   }
+  DBG_SD if(!timeout) printf("timeout!\n");
+
   wiggle_fast_neg1(); /* eat the start bit */
   if(sd_offload) {
     if(sd_offload_partial) {
@@ -867,6 +872,9 @@ DRESULT sdn_initialize(BYTE drv) {
     if(rsp[1]&0x80) break;
   }
 
+  BITBAND(SD_DAT3REG->FIODIR, SD_DAT3PIN) = 0;
+  BITBAND(SD_DAT3REG->FIOCLR, SD_DAT3PIN) = 1;
+
   ccs = (rsp[1]>>6) & 1; /* SDHC/XC */
 
   cmd_slow(ALL_SEND_CID, 0, 0x4d, NULL, rsp);

verilog/sd2snes/main.v

@@ -460,7 +460,7 @@ end
 reg snes_wr_cycle;
 
 always @(posedge CLK2) begin
-  if(SNES_cycle_start) begin
+  if(SNES_cycle_start & ~SNES_WR_start) begin
     STATE <= ST_SNES_RD_ADDR;
   end else if(SNES_WR_start) begin
     STATE <= ST_SNES_WR_ADDR;
@@ -605,6 +605,6 @@ assign SNES_DATABUS_DIR = !SNES_READ ? 1'b1 : 1'b0;
 assign IRQ_DIR = 1'b0;
 assign SNES_IRQ = 1'bZ;
 
-assign p113_out = ROM_WE;
+assign p113_out = 1'b0;
 
 endmodule

verilog/sd2snes/sd2snes.xise

@@ -377,8 +377,8 @@
     <property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="work.updtest" xil_pn:valueState="default"/>
     <property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="work.updtest" xil_pn:valueState="default"/>
     <property xil_pn:name="Speed Grade" xil_pn:value="-4" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="8" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="1" xil_pn:valueState="default"/>
-    <property xil_pn:name="Starting Placer Cost Table (1-100) Par" xil_pn:value="8" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Starting Placer Cost Table (1-100) Par" xil_pn:value="1" xil_pn:valueState="default"/>
     <property xil_pn:name="Structure window" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
     <property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>

verilog/sd2snes/sd_dma.v

@@ -71,9 +71,9 @@ assign SD_DMA_SRAM_DATA = SD_DMA_SRAM_DATAr;
 // we have 4 internal cycles per SD clock, 8 per RAM byte write
 reg [2:0] clkcnt;
 initial clkcnt = 3'b000;
-reg SD_CLKr;
+reg [1:0] SD_CLKr;
-always @(posedge CLK) SD_CLKr <= clkcnt[1];
+always @(posedge CLK) SD_CLKr <= {SD_CLKr[0], clkcnt[1]};
-assign SD_CLK = SD_DMA_STATUSr ? SD_CLKr : 1'bZ;
+assign SD_CLK = SD_DMA_STATUSr ? SD_CLKr[1] : 1'bZ;
 
 always @(posedge CLK) begin
   if(SD_DMA_EN_rising) begin

verilog/sd2snes_cx4/sd_dma.v

@@ -71,9 +71,9 @@ assign SD_DMA_SRAM_DATA = SD_DMA_SRAM_DATAr;
 // we have 4 internal cycles per SD clock, 8 per RAM byte write
 reg [2:0] clkcnt;
 initial clkcnt = 3'b000;
-reg SD_CLKr;
+reg [1:0] SD_CLKr;
-always @(posedge CLK) SD_CLKr <= clkcnt[1];
+always @(posedge CLK) SD_CLKr <= {SD_CLKr[0], clkcnt[1]};
-assign SD_CLK = SD_DMA_STATUSr ? SD_CLKr : 1'bZ;
+assign SD_CLK = SD_DMA_STATUSr ? SD_CLKr[1] : 1'bZ;
 
 always @(posedge CLK) begin
   if(SD_DMA_EN_rising) begin