Commit my latest changes

.gitignore

@@ -0,0 +1,22 @@
+*.cod
+*.hex
+*.lst
+*.o
+*.diff
+.DS_Store
+*.o65
+*.ips
+*.bin
+*.map
+*.o.d
+*.log
+*.smc
+*.sfc
+*~
+*.old
+*.elf
+*.img
+autoconf.h
+utils/rle
+utils/derle
+*.bit

CHANGELOG

@@ -15,6 +15,7 @@ v0.1.1a (bugfix release)
 v0.1.2
 ======
 
+ * New menu entry: "System Information"
  * Auto region override (eliminate "This game pak is not designed..." messages)
  * Improved mapper detection (fixes Batman vs. Joker and many PD ROMs)
  * Improved data streaming performance
@@ -22,3 +23,18 @@ v0.1.2
  * A and B buttons swapped in menu to match common key mappings
  * Fixes:
    - MSU1: Stop audio playback on end of audio file
+
+
+v0.1.3
+======
+
+ * Updated logo gfx with new version from klaptra
+ * Updated font to distinguish between 1 and I
+ * Menu layout adjusted to move status line up by 4 scanlines
+ * Run previously loaded game by pressing Start in the menu
+ * Auto-scroll file names that do not fit the screen
+ * SD access time measurement on System Information screen (takes a while!)
+ * Cx4 memory map: mirror ROM to 40-7e/c0-ff (fixes MMX3 Zero patch)
+ * Some FPGA configuration error detection (mainly useful for hardware diag)
+ * Fixes:
+   - FPGA-side SD clock pullup (increases reliability with some cards)

cic/supercic/supercic-key.asm

@@ -744,4 +744,4 @@ supercic_pairmode_loop
 ; eeprom memory
 DEEPROM	CODE
 	de      0x09	; D411 (NTSC)
-end
+	end

cic/supercic/supercic-lock.asm

@@ -192,11 +192,11 @@ rst_loop
 	clrf	0x59		; clear D4
 	clrf	0x5e		;
 	clrf	0x5f		;
-        banksel EEADR		; fetch current mode from EEPROM
-        clrf    EEADR		; address 0
-        bsf     EECON1, RD	; 
-        movf    EEDAT, w        ; 
-        banksel PORTA
+	banksel EEADR		; fetch current mode from EEPROM
+	clrf    EEADR		; address 0
+	bsf     EECON1, RD	; 
+	movf    EEDAT, w        ; 
+	banksel PORTA
 	movwf	0x55		; store saved mode in mode var
 	movwf	0x56		; and temp LED
 	movwf	0x58		; and forced region

pcb/kicad/RevE/sd2snes.brd

@@ -1,4 +1,4 @@
-PCBNEW-BOARD Version 1 date Fri 02 Dec 2011 02:55:43 PM CET
+PCBNEW-BOARD Version 1 date Mon 30 Jan 2012 04:25:38 PM CET
 
 # Created by Pcbnew(2011-07-02 BZR 2664)-stable
 
@@ -21,7 +21,7 @@ $EndGENERAL
 $SHEETDESCR
 Sheet A4 11700 8267
 Title "sd2snes Mark II"
-Date "2 dec 2011"
+Date "30 jan 2012"
 Rev "C2"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -71,7 +71,7 @@ PadSize 79 690
 PadDrill 0
 Pad2MaskClearance 40
 AuxiliaryAxisOrg 0 0
-PcbPlotParams (pcbplotparams (layerselection 2097152) (usegerberextensions true) (excludeedgelayer false) (linewidth 79) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext true) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 2) (mirror false) (drillshape 2) (scaleselection 1) (outputdirectory ""))
+PcbPlotParams (pcbplotparams (layerselection 284196865) (usegerberextensions true) (excludeedgelayer true) (linewidth 79) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue false) (plotothertext false) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 1) (mirror false) (drillshape 2) (scaleselection 1) (outputdirectory ""))
 $EndSETUP
 
 $EQUIPOT
@@ -12830,7 +12830,7 @@ Po 45815 24905 700 700 120 0
 De 20 0 0 Normal C
 $EndTEXTPCB
 $TEXTPCB
-Te "©2009 - 2011 M. Rehkopf"
+Te "©2009 - 2012 ikari_01 "
 Po 44000 27540 500 500 75 0
 De 20 0 0 Normal C
 $EndTEXTPCB

pcb/kicad/RevE2/sd2snes.cmp

@@ -1,4 +1,4 @@
-Cmp-Mod V01 Created by CvPCB (2011-07-02 BZR 2664)-stable date = Mon 26 Dec 2011 09:56:51 PM CET
+Cmp-Mod V01 Created by CvPcb (2012-jan-04)-stable date = Sun 26 Feb 2012 01:11:53 AM CET
 
 BeginCmp
 TimeStamp = /4B6EC9C3/4BAF2EAF;
@@ -865,119 +865,119 @@ BeginCmp
 TimeStamp = /4B6E16F2/4D9630F0;
 Reference = RA101;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D9630F4;
 Reference = RA102;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D95CDCD;
 Reference = RA103;
 ValeurCmp = FB;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D95CDD4;
 Reference = RA104;
 ValeurCmp = FB;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D96310E;
 Reference = RA105;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D963115;
 Reference = RA106;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D963117;
 Reference = RA107;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D963119;
 Reference = RA108;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D963103;
 Reference = RA109;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D963107;
 Reference = RA110;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D96310A;
 Reference = RA111;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D96310C;
 Reference = RA112;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D97B45C;
 Reference = RA113;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4D97B45F;
 Reference = RA114;
 ValeurCmp = 100;
-IdModule  = R_PACK_0804;
+IdModule  = R_PACK_0804_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4B6E1740;
 Reference = U101;
 ValeurCmp = 74ALVC164245DGG;
-IdModule  = TSSOP48;
+IdModule  = TSSOP48_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4B6E1744;
 Reference = U102;
 ValeurCmp = 74ALVC164245DGG;
-IdModule  = TSSOP48;
+IdModule  = TSSOP48_LONGPADS;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6E16F2/4B6E1748;
 Reference = U103;
 ValeurCmp = 74ALVC164245DGG;
-IdModule  = TSSOP48;
+IdModule  = TSSOP48_LONGPADS;
 EndCmp
 
 BeginCmp
@@ -1026,7 +1026,7 @@ BeginCmp
 TimeStamp = /4B6EC9C3/4BAA9331;
 Reference = U341;
 ValeurCmp = CS4344;
-IdModule  = TSSOP10;
+IdModule  = TSSOP10_LONGPADS;
 EndCmp
 
 BeginCmp

pcb/kicad/RevE2/sd2snes.pro

@@ -1,4 +1,4 @@
-update=Wed 28 Dec 2011 06:55:00 PM CET
+update=ven. 20 avril 2012 18:26:30 CEST
 version=1
 last_client=pcbnew
 [general]
@@ -83,10 +83,11 @@ LibName40=libs/usb_minib
 LibName41=libs/mic23250
 [pcbnew]
 version=1
-PadDrlX=512
-PadDimH=512
-PadDimV=512
+PadDrlX=0
+PadDimH=197
+PadDimV=276
 BoardThickness=630
+SgPcb45=1
 TxtPcbV=800
 TxtPcbH=600
 TxtModV=600
@@ -114,3 +115,4 @@ LibName11=libs/mypackages
 LibName12=libs/snescart
 LibName13=libs/sdcard
 LibName14=libs/snail
+LibName15=libs/snail2

pcb/kicad/libs/mypackages.mod

@@ -1,10 +1,11 @@
-PCBNEW-LibModule-V1  Tue 27 Dec 2011 12:29:40 AM CET
+PCBNEW-LibModule-V1  Sun 26 Feb 2012 12:35:43 AM CET
 # encoding utf-8
 $INDEX
 BT_KEYSTONE_1059_20MM
 CP_TANTAL_SMD_D
 DIP-36
 HC49US
+HRS-DM1AA
 LED-3MM-FIXED
 LQFP80-.5
 L_4.2X4.2
@@ -30,6 +31,7 @@ TSSOP10_LONGPADS
 TSSOP48
 TSSOP48_LONGPADS
 USB-MINIB-THT
+USB_MINIB_SMT
 VFBGA36
 VFBGA48
 VFBGA54
@@ -5707,75 +5709,6 @@ Ne 0 ""
 Po -510 -384
 $EndPAD
 $EndMODULE  R_PACK_1206
-$MODULE R_PACK_0804_LONGPADS
-Po 0 0 0 15 4EF2E2A7 00000000 ~~
-Li R_PACK_0804_LONGPADS
-Sc 00000000
-AR
-Op 0 0 0
-T0 0 0 320 320 0 70 N V 21 N "R_PACK_0804"
-T1 0 0 320 320 0 70 N V 21 N "VAL**"
-DS 551 591 551 -591 79 21
-DS -551 -591 -551 591 79 21
-DS -551 -591 551 -591 79 21
-DS 551 591 -551 591 79 21
-$PAD
-Sh "7" R 118 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po -98 -276
-$EndPAD
-$PAD
-Sh "6" R 118 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po 98 -276
-$EndPAD
-$PAD
-Sh "2" R 118 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po -98 276
-$EndPAD
-$PAD
-Sh "3" R 118 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po 98 276
-$EndPAD
-$PAD
-Sh "8" R 197 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po -335 -276
-$EndPAD
-$PAD
-Sh "5" R 197 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po 335 -276
-$EndPAD
-$PAD
-Sh "4" R 197 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po 335 276
-$EndPAD
-$PAD
-Sh "1" R 197 354 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po -335 276
-$EndPAD
-$EndMODULE  R_PACK_0804_LONGPADS
 $MODULE TSSOP10_LONGPADS
 Po 0 0 0 15 4EF2E58B 00000000 ~~
 Li TSSOP10_LONGPADS
@@ -5860,19 +5793,390 @@ Ne 0 ""
 Po -393 -965
 $EndPAD
 $EndMODULE  TSSOP10_LONGPADS
-$MODULE TSSOP48_LONGPADS
-Po 0 0 0 15 4B6E17E6 00000000 ~~
-Li TSSOP48_LONGPADS
+$MODULE L_4.2X4.2
+Po 0 0 0 15 4EF777D2 00000000 ~~
+Li L_4.2X4.2
 Sc 00000000
 AR
 Op 0 0 0
-T0 0 -551 600 600 0 120 N V 21 N "Test"
-T1 0 630 600 600 0 120 N V 21 N "VAL**"
-DC -2205 945 -2087 945 40 21
-DS -2460 -1200 2460 -1200 47 21
-DS 2460 -1200 2460 1200 47 21
-DS -2460 1200 2460 1200 47 21
-DS -2460 -1200 -2460 1200 47 21
+T0 0 0 600 600 0 120 N V 21 N "L_4.2X4.2"
+T1 0 0 600 600 0 120 N V 21 N "VAL**"
+DS -1024 -984 1024 -984 79 21
+DS 1024 -984 1024 984 79 21
+DS 1024 984 -1024 984 79 21
+DS -1024 984 -1024 -984 79 21
+$PAD
+Sh "1" R 591 1654 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 0 ""
+Po -571 0
+$EndPAD
+$PAD
+Sh "2" R 591 1654 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 0 ""
+Po 571 0
+$EndPAD
+$EndMODULE  L_4.2X4.2
+$MODULE LED-3MM-FIXED
+Po 0 0 0 15 4EF9035D 00000000 ~~
+Li LED-3MM-FIXED
+Cd LED 3mm - Lead pitch 100mil (2,54mm)
+Kw LED led 3mm 3MM 100mil 2,54mm
+Sc 00000000
+AR /4B6ED75B/4C0DA78D
+Op 0 0 0
+At VIRTUAL
+T0 -300 -2125 320 320 0 70 N V 21 N "D403"
+T1 25 3575 320 320 2700 70 N V 21 N "LED_2mA_1.7V,_red"
+DS 669 669 669 394 80 21
+DS 669 -669 669 -394 80 21
+DA 0 0 669 669 2700 80 21
+$PAD
+Sh "1" C 660 660 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 1 "+3.3V"
+Po -500 0
+$EndPAD
+$PAD
+Sh "2" C 660 660 0 0 0
+Dr 400 0 0
+At STD N 00E0FFFF
+Ne 2 "N-000262"
+Po 500 0
+$EndPAD
+$SHAPE3D
+Na "libs/led3_vertical_red.wrl"
+Sc 1.000000 1.000000 1.000000
+Of 0.000000 0.000000 0.000000
+Ro 0.000000 0.000000 0.000000
+$EndSHAPE3D
+$EndMODULE  LED-3MM-FIXED
+$MODULE USB_MINIB_SMT
+Po 0 0 0 15 4F34EE0A 00000000 ~~
+Li USB_MINIB_SMT
+Sc 00000000
+AR /4B6ED75B/4BF00175
+Op 0 0 0
+T0 -2553 -147 320 320 0 70 N V 21 N "J421"
+T1 0 0 320 320 0 80 N I 21 N "USB_Mini-B_SMT"
+DS -1516 2047 1516 2047 79 21
+DS 1516 2047 1516 -1575 79 21
+DS 1516 -1575 -1516 -1575 79 21
+DS -1516 -1575 -1516 2047 79 21
+$PAD
+Sh "6" R 787 1299 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 1 "GND"
+Po -1752 -1161
+$EndPAD
+$PAD
+Sh "7" R 787 1299 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 1 "GND"
+Po 1752 -1161
+$EndPAD
+$PAD
+Sh "6" R 787 984 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 1 "GND"
+Po -1752 1161
+$EndPAD
+$PAD
+Sh "7" R 787 984 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 1 "GND"
+Po 1752 1161
+$EndPAD
+$PAD
+Sh "" C 354 354 0 0 0
+Dr 354 0 0
+At HOLE N 00E0FFFF
+Ne 0 ""
+Po -866 0
+$EndPAD
+$PAD
+Sh "" C 354 354 0 0 0
+Dr 354 0 0
+At HOLE N 00E0FFFF
+Ne 0 ""
+Po 866 0
+$EndPAD
+$PAD
+Sh "3" R 197 1496 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 3 "N-000315"
+Po 0 -1418
+$EndPAD
+$PAD
+Sh "4" R 197 1496 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 0 ""
+Po 315 -1418
+$EndPAD
+$PAD
+Sh "5" R 197 1496 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 1 "GND"
+Po 630 -1418
+$EndPAD
+$PAD
+Sh "1" R 197 1496 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 4 "N-000328"
+Po -630 -1418
+$EndPAD
+$PAD
+Sh "2" R 197 1496 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "N-000310"
+Po -315 -1418
+$EndPAD
+$EndMODULE  USB_MINIB_SMT
+$MODULE HRS-DM1AA
+Po 0 0 0 15 4F34F118 00000000 ~~
+Li HRS-DM1AA
+Sc 00000000
+AR /4B6ED75B/4BAA6A9C
+Op 0 0 0
+T0 -5000 -6425 320 320 0 70 N V 21 N "J411"
+T1 0 0 320 320 0 70 N V 21 N "Hirose_DM1AA"
+DS 4134 -5984 5512 -5984 120 21
+DS 5512 6024 -5512 6024 120 21
+DS -5512 -5984 -4685 -5984 120 21
+DS -5512 4685 -5512 6024 120 21
+DS 5511 6025 5511 4686 120 21
+DS 5511 -2637 5511 3584 120 21
+DS 5511 -5983 5511 -3779 120 21
+DS 4133 -5511 3779 -5511 120 21
+DS -4686 -5511 -4529 -5511 120 21
+DS -5512 2521 -5512 2796 120 21
+DS -5512 -983 -5512 1773 120 21
+DS -5512 -2637 -5512 -1731 120 21
+DS -5512 -5983 -5512 -3779 120 21
+DS -4686 -5983 -4686 -5511 120 21
+DS 4133 -5511 4133 -5983 120 21
+$PAD
+Sh "" C 512 512 0 0 0
+Dr 512 0 0
+At HOLE N 00E0FFFF
+Ne 0 ""
+Po -4686 -4999
+$EndPAD
+$PAD
+Sh "" C 512 512 0 0 0
+Dr 512 0 0
+At HOLE N 00E0FFFF
+Ne 0 ""
+Po 4133 -4999
+$EndPAD
+$PAD
+Sh "1" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 10 "SD_DAT3"
+Po 2391 -5865
+$EndPAD
+$PAD
+Sh "2" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 6 "SD_CMD"
+Po 1407 -5865
+$EndPAD
+$PAD
+Sh "3" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "GND"
+Po 422 -5865
+$EndPAD
+$PAD
+Sh "4" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 1 "+3.3V"
+Po -562 -5865
+$EndPAD
+$PAD
+Sh "5" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 5 "SD_CLK"
+Po -1546 -5865
+$EndPAD
+$PAD
+Sh "6" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "GND"
+Po -2530 -5865
+$EndPAD
+$PAD
+Sh "7" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 7 "SD_DAT0"
+Po -3485 -5865
+$EndPAD
+$PAD
+Sh "8" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 8 "SD_DAT1"
+Po -4155 -5865
+$EndPAD
+$PAD
+Sh "9" R 433 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 9 "SD_DAT2"
+Po 3375 -5865
+$EndPAD
+$PAD
+Sh "GND1" R 787 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "GND"
+Po 5708 -3208
+$EndPAD
+$PAD
+Sh "GND1" R 787 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "GND"
+Po 5708 4135
+$EndPAD
+$PAD
+Sh "GND1" R 787 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "GND"
+Po -5710 -3208
+$EndPAD
+$PAD
+Sh "GND1" R 787 787 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "GND"
+Po -5710 4135
+$EndPAD
+$PAD
+Sh "DT" R 787 394 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 4 "N-000318"
+Po -5552 -1377
+$EndPAD
+$PAD
+Sh "WP" R 787 394 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 3 "N-000295"
+Po -5552 2147
+$EndPAD
+$PAD
+Sh "GND2" R 787 394 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "GND"
+Po -5552 3170
+$EndPAD
+$EndMODULE  HRS-DM1AA
+$MODULE R_PACK_0804_LONGPADS
+Po 0 0 0 15 4F496244 00000000 ~~
+Li R_PACK_0804_LONGPADS
+Sc 00000000
+AR /4B6E16F2/4D96310E
+Op 0 0 0
+T0 325 750 320 320 0 70 N V 21 N "RA105"
+T1 0 0 320 320 0 70 N V 21 N "100"
+DS -551 -472 -551 472 79 21
+DS 551 -472 551 472 79 21
+DS -551 -472 551 -472 79 21
+DS 551 472 -551 472 79 21
+$PAD
+Sh "7" R 118 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 5 "N-000012"
+Po -98 -236
+$EndPAD
+$PAD
+Sh "6" R 118 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 7 "N-000143"
+Po 98 -236
+$EndPAD
+$PAD
+Sh "2" R 118 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 2 "/SNES_Slot/SNES_EXT_/RD"
+Po -98 236
+$EndPAD
+$PAD
+Sh "3" R 118 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 3 "/SNES_Slot/SNES_EXT_/ROMSEL"
+Po 98 236
+$EndPAD
+$PAD
+Sh "8" R 197 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 8 "N-000147"
+Po -335 -236
+$EndPAD
+$PAD
+Sh "5" R 197 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 6 "N-000038"
+Po 335 -236
+$EndPAD
+$PAD
+Sh "4" R 197 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 4 "/SNES_Slot/SNES_EXT_A23"
+Po 335 236
+$EndPAD
+$PAD
+Sh "1" R 197 276 0 0 0
+Dr 0 0 0
+At SMD N 00888000
+Ne 1 "/SNES_Slot/SNES_EXT_/IRQ"
+Po -335 236
+$EndPAD
+$EndMODULE  R_PACK_0804_LONGPADS
+$MODULE TSSOP48_LONGPADS
+Po 0 0 0 15 4F497040 00000000 ~~
+Li TSSOP48_LONGPADS
+Sc 00000000
+AR 
+Op 0 0 0
+T0 0 -551 320 320 0 70 N V 21 N "Test"
+T1 0 630 320 320 0 70 N V 21 N "VAL**"
+DS -2461 1161 -2461 -1161 79 21
+DS 2461 -1161 2461 1161 79 21
+DC -2205 906 -2087 906 79 21
+DS -2460 -1160 2460 -1160 79 21
+DS -2460 1160 2460 1160 79 21
 $PAD
 Sh "1" R 118 630 0 0 1800
 Dr 0 0 0
@@ -6210,66 +6514,4 @@ Ne 0 ""
 Po -2263 -1614
 $EndPAD
 $EndMODULE  TSSOP48_LONGPADS
-$MODULE L_4.2X4.2
-Po 0 0 0 15 4EF777D2 00000000 ~~
-Li L_4.2X4.2
-Sc 00000000
-AR
-Op 0 0 0
-T0 0 0 600 600 0 120 N V 21 N "L_4.2X4.2"
-T1 0 0 600 600 0 120 N V 21 N "VAL**"
-DS -1024 -984 1024 -984 79 21
-DS 1024 -984 1024 984 79 21
-DS 1024 984 -1024 984 79 21
-DS -1024 984 -1024 -984 79 21
-$PAD
-Sh "1" R 591 1654 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po -571 0
-$EndPAD
-$PAD
-Sh "2" R 591 1654 0 0 0
-Dr 0 0 0
-At SMD N 00888000
-Ne 0 ""
-Po 571 0
-$EndPAD
-$EndMODULE  L_4.2X4.2
-$MODULE LED-3MM-FIXED
-Po 0 0 0 15 4EF9035D 00000000 ~~
-Li LED-3MM-FIXED
-Cd LED 3mm - Lead pitch 100mil (2,54mm)
-Kw LED led 3mm 3MM 100mil 2,54mm
-Sc 00000000
-AR /4B6ED75B/4C0DA78D
-Op 0 0 0
-At VIRTUAL 
-T0 -300 -2125 320 320 0 70 N V 21 N "D403"
-T1 25 3575 320 320 2700 70 N V 21 N "LED_2mA_1.7V,_red"
-DS 669 669 669 394 80 21
-DS 669 -669 669 -394 80 21
-DA 0 0 669 669 2700 80 21
-$PAD
-Sh "1" C 660 660 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 1 "+3.3V"
-Po -500 0
-$EndPAD
-$PAD
-Sh "2" C 660 660 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 2 "N-000262"
-Po 500 0
-$EndPAD
-$SHAPE3D
-Na "libs/led3_vertical_red.wrl"
-Sc 1.000000 1.000000 1.000000
-Of 0.000000 0.000000 0.000000
-Ro 0.000000 0.000000 0.000000
-$EndSHAPE3D
-$EndMODULE  LED-3MM-FIXED
 $EndLIBRARY

pcb/kicad/libs/sdcard.bak

@@ -1,4 +1,4 @@
-PCBNEW-LibModule-V1  Tue 27 Dec 2011 01:25:51 AM CET
+PCBNEW-LibModule-V1  Tue 27 Dec 2011 12:52:27 PM CET
 # encoding utf-8
 $INDEX
 HRS-DM1AA
@@ -148,14 +148,14 @@ DS -5512 -5983 -5512 -3779 120 21
 DS -4686 -5983 -4686 -5511 120 21
 DS 4133 -5511 4133 -5983 120 21
 $PAD
-Sh "~" C 510 510 0 0 0
+Sh "~" C 512 512 0 0 0
 Dr 512 0 0
 At STD N 0000FFFF
 Ne 0 ""
 Po -4686 -4999
 $EndPAD
 $PAD
-Sh "~" C 510 510 0 0 0
+Sh "~" C 512 512 0 0 0
 Dr 512 0 0
 At STD N 0000FFFF
 Ne 0 ""

pcb/kicad/libs/sdcard.mod

@@ -1,4 +1,4 @@
-PCBNEW-LibModule-V1  Tue 27 Dec 2011 12:52:27 PM CET
+PCBNEW-LibModule-V1  Sun 26 Feb 2012 12:17:38 AM CET
 # encoding utf-8
 $INDEX
 HRS-DM1AA
@@ -125,7 +125,7 @@ Po 3740 709
 $EndPAD
 $EndMODULE  SD-RSMT-2-MQ-WF
 $MODULE HRS-DM1AA
-Po 0 0 0 15 4EF9108C 00000000 ~~
+Po 0 0 0 15 4F496C0E 00000000 ~~
 Li HRS-DM1AA
 Sc 00000000
 AR HRS-DM1AA
@@ -148,16 +148,16 @@ DS -5512 -5983 -5512 -3779 120 21
 DS -4686 -5983 -4686 -5511 120 21
 DS 4133 -5511 4133 -5983 120 21
 $PAD
-Sh "~" C 512 512 0 0 0
+Sh "" C 512 512 0 0 0
 Dr 512 0 0
-At STD N 0000FFFF
+At HOLE N 00E0FFFF
 Ne 0 ""
 Po -4686 -4999
 $EndPAD
 $PAD
-Sh "~" C 512 512 0 0 0
+Sh "" C 512 512 0 0 0
 Dr 512 0 0
-At STD N 0000FFFF
+At HOLE N 00E0FFFF
 Ne 0 ""
 Po 4133 -4999
 $EndPAD

pcb/kicad/libs/snescart.bak

@@ -1,4 +1,4 @@
-PCBNEW-LibModule-V1  Mon 04 Jul 2011 12:35:33 AM CEST
+PCBNEW-LibModule-V1  Thu 09 Feb 2012 09:51:59 PM CET
 # encoding utf-8
 $INDEX
 SNESCART_EXT
@@ -537,7 +537,7 @@ Po 14331 -3780
 $EndPAD
 $EndMODULE  SNESCART_EXT
 $MODULE SNESCART_EXT2
-Po 0 0 0 15 4E0F6C87 00000000 ~~
+Po 0 0 0 15 4F3431E9 00000000 ~~
 Li SNESCART_EXT2
 Sc 00000000
 AR /4B6E16F2/4B6E1766
@@ -546,6 +546,18 @@ Op 0 0 0
 .SolderPaste -4
 T0 -4134 2953 600 600 0 120 N V 21 N "J101"
 T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
+DS -20039 -5000 -20039 -8898 39 28
+DS -18465 -4016 -18465 -5000 39 28
+DS -19449 -2402 -19449 -4016 39 28
+DS -17717 -2402 -17717 1693 39 28
+DS 17717 -2402 17717 1693 39 28
+DS 19921 -4094 19921 -2402 39 28
+DS 19291 -29252 19291 -27756 39 28
+DS -19488 -29252 -19488 -27756 39 28
+DS -8524 -30709 -8524 -29252 39 28
+DS 8622 -29252 8622 -30709 39 28
+DS -20039 -24409 -20039 -12244 39 28
+DS -19488 -27087 -19488 -24409 39 28
 DC 1142 -11378 1929 -11378 79 20
 DC 1142 -11378 1929 -11339 79 21
 DS 19921 -24409 19921 -8976 39 28
@@ -556,46 +568,33 @@ DS 19291 -8189 19291 -6890 39 28
 DS 18307 -8189 19291 -8189 39 28
 DS 18307 -8976 18307 -8189 39 28
 DS 19921 -8976 18307 -8976 39 28
-DS -20039 -4803 -20039 -8898 39 28
-DS -20039 -24528 -20039 -12244 39 28
 DS -18465 -12244 -20039 -12244 39 28
 DS -18465 -11457 -18465 -12244 39 28
 DS -19449 -11457 -18465 -11457 39 28
 DS -19449 -8898 -19449 -11457 39 28
 DS -20039 -8898 -19449 -8898 39 28
-DS -19488 -27087 -19488 -24528 39 28
 DA -17441 1693 -17441 1969 900 39 28
 DA -13071 1693 -12795 1693 900 39 28
 DA -11535 1693 -11535 1969 900 39 28
 DA 11535 1693 11811 1693 900 39 28
 DA 13071 1693 13071 1969 900 39 28
 DA 17441 1693 17717 1693 900 39 28
-DS 8622 -29331 19291 -29331 40 28
+DS 8622 -29252 19291 -29252 40 28
 DS -8524 -30709 8622 -30709 40 28
-DS -19488 -29331 -8524 -29331 40 28
+DS -19488 -29252 -8524 -29252 40 28
 DC 2796 -17047 3583 -17047 75 20
 DC 2795 -17047 3582 -17047 75 21
-DS 8622 -29331 8622 -30709 40 28
-DS -8524 -30709 -8524 -29331 40 28
-DS -19488 -29331 -19488 -27756 40 28
 DS -19488 -27756 -18504 -27756 40 28
 DS -18504 -27756 -18504 -27087 40 28
 DS -18504 -27087 -19488 -27087 40 28
-DS -19488 -24528 -20039 -24528 40 28
-DS -20039 -4803 -18465 -4803 40 28
-DS -18465 -4803 -18465 -4016 40 28
+DS -19488 -24409 -20039 -24409 40 28
+DS -20039 -5000 -18465 -5000 40 28
 DS -18465 -4016 -19449 -4016 40 28
-DS -19449 -4016 -19449 -2205 40 28
-DS -19449 -2205 -17717 -2205 40 28
-DS -17717 -2205 -17717 -2165 40 28
+DS -19449 -2402 -17717 -2402 40 28
 DS 19291 -27087 18307 -27087 40 28
 DS 18307 -27087 18307 -27756 40 28
 DS 18307 -27756 19291 -27756 40 28
-DS 19291 -27756 19291 -29331 40 28
-DS 17717 1693 17717 -2165 40 28
-DS 17717 -2165 17717 -2205 40 28
-DS 17717 -2205 19921 -2205 40 28
-DS 19921 -2205 19921 -4094 40 28
+DS 17717 -2402 19921 -2402 40 28
 DS 19921 -4094 19291 -4094 40 28
 DS 19291 -4094 19291 -6102 40 28
 DS 19291 -6102 18307 -6102 40 28
@@ -604,7 +603,6 @@ DS 13071 1969 17441 1969 40 28
 DS 11811 1693 11811 -2480 40 28
 DS 11811 -2480 12795 -2480 40 28
 DS 12795 -2480 12795 1693 40 28
-DS -17717 1693 -17717 -2165 40 28
 DS -13071 1969 -17441 1969 40 28
 DS -11811 1693 -11811 -2480 40 28
 DS -11811 -2480 -12795 -2480 40 28
@@ -864,6 +862,7 @@ Dr 0 0 0
 At CONN N 00000001
 Ne 0 ""
 Po -16732 197
+Le -65794
 $EndPAD
 $PAD
 Sh "33" R 591 2756 0 0 0
@@ -871,6 +870,7 @@ Dr 0 0 0
 At CONN N 00000001
 Ne 49 "/SNES_Slot/SNES_EXT_REFRESH"
 Po -15748 197
+Le -197380
 $EndPAD
 $PAD
 Sh "34" R 591 2756 0 0 0

pcb/kicad/libs/snescart.mod

@@ -1,8 +1,9 @@
-PCBNEW-LibModule-V1  Mon 04 Jul 2011 12:37:18 AM CEST
+PCBNEW-LibModule-V1  Fri 10 Feb 2012 10:51:00 AM CET
 # encoding utf-8
 $INDEX
 SNESCART_EXT
 SNESCART_EXT2
+SNESCART_EXT2_SMTUSB
 $EndINDEX
 $MODULE SNESCART_EXT
 Po 0 0 0 15 4D200467 00000000 ~~
@@ -537,7 +538,7 @@ Po 14331 -3780
 $EndPAD
 $EndMODULE  SNESCART_EXT
 $MODULE SNESCART_EXT2
-Po 0 0 0 15 4E10EF0E 00000000 ~~
+Po 0 0 0 15 4F3431E9 00000000 ~~
 Li SNESCART_EXT2
 Sc 00000000
 AR /4B6E16F2/4B6E1766
@@ -546,6 +547,16 @@ Op 0 0 0
 .SolderPaste -4
 T0 -4134 2953 600 600 0 120 N V 21 N "J101"
 T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
+DS -20039 -5000 -20039 -8898 39 28
+DS -18465 -4016 -18465 -5000 39 28
+DS -19449 -2402 -19449 -4016 39 28
+DS -17717 -2402 -17717 1693 39 28
+DS 17717 -2402 17717 1693 39 28
+DS 19921 -4094 19921 -2402 39 28
+DS 19291 -29252 19291 -27756 39 28
+DS -19488 -29252 -19488 -27756 39 28
+DS -8524 -30709 -8524 -29252 39 28
+DS 8622 -29252 8622 -30709 39 28
 DS -20039 -24409 -20039 -12244 39 28
 DS -19488 -27087 -19488 -24409 39 28
 DC 1142 -11378 1929 -11378 79 20
@@ -558,7 +569,6 @@ DS 19291 -8189 19291 -6890 39 28
 DS 18307 -8189 19291 -8189 39 28
 DS 18307 -8976 18307 -8189 39 28
 DS 19921 -8976 18307 -8976 39 28
-DS -20039 -4803 -20039 -8898 39 28
 DS -18465 -12244 -20039 -12244 39 28
 DS -18465 -11457 -18465 -12244 39 28
 DS -19449 -11457 -18465 -11457 39 28
@@ -570,32 +580,22 @@ DA -11535 1693 -11535 1969 900 39 28
 DA 11535 1693 11811 1693 900 39 28
 DA 13071 1693 13071 1969 900 39 28
 DA 17441 1693 17717 1693 900 39 28
-DS 8622 -29331 19291 -29331 40 28
+DS 8622 -29252 19291 -29252 40 28
 DS -8524 -30709 8622 -30709 40 28
-DS -19488 -29331 -8524 -29331 40 28
+DS -19488 -29252 -8524 -29252 40 28
 DC 2796 -17047 3583 -17047 75 20
 DC 2795 -17047 3582 -17047 75 21
-DS 8622 -29331 8622 -30709 40 28
-DS -8524 -30709 -8524 -29331 40 28
-DS -19488 -29331 -19488 -27756 40 28
 DS -19488 -27756 -18504 -27756 40 28
 DS -18504 -27756 -18504 -27087 40 28
 DS -18504 -27087 -19488 -27087 40 28
 DS -19488 -24409 -20039 -24409 40 28
-DS -20039 -4803 -18465 -4803 40 28
-DS -18465 -4803 -18465 -4016 40 28
+DS -20039 -5000 -18465 -5000 40 28
 DS -18465 -4016 -19449 -4016 40 28
-DS -19449 -4016 -19449 -2205 40 28
-DS -19449 -2205 -17717 -2205 40 28
-DS -17717 -2205 -17717 -2165 40 28
+DS -19449 -2402 -17717 -2402 40 28
 DS 19291 -27087 18307 -27087 40 28
 DS 18307 -27087 18307 -27756 40 28
 DS 18307 -27756 19291 -27756 40 28
-DS 19291 -27756 19291 -29331 40 28
-DS 17717 1693 17717 -2165 40 28
-DS 17717 -2165 17717 -2205 40 28
-DS 17717 -2205 19921 -2205 40 28
-DS 19921 -2205 19921 -4094 40 28
+DS 17717 -2402 19921 -2402 40 28
 DS 19921 -4094 19291 -4094 40 28
 DS 19291 -4094 19291 -6102 40 28
 DS 19291 -6102 18307 -6102 40 28
@@ -604,7 +604,6 @@ DS 13071 1969 17441 1969 40 28
 DS 11811 1693 11811 -2480 40 28
 DS 11811 -2480 12795 -2480 40 28
 DS 12795 -2480 12795 1693 40 28
-DS -17717 1693 -17717 -2165 40 28
 DS -13071 1969 -17441 1969 40 28
 DS -11811 1693 -11811 -2480 40 28
 DS -11811 -2480 -12795 -2480 40 28
@@ -1147,4 +1146,614 @@ Po 14331 -3780
 Le 23484672
 $EndPAD
 $EndMODULE  SNESCART_EXT2
+$MODULE SNESCART_EXT2_SMTUSB
+Po 0 0 0 15 4F34E870 00000000 ~~
+Li SNESCART_EXT2_SMTUSB
+Sc 00000000
+AR /4B6E16F2/4B6E1766
+Op 0 0 0
+.SolderMask 4
+.SolderPaste -4
+T0 -4134 2953 600 600 0 120 N V 21 N "J101"
+T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
+DS 8858 -29252 19291 -29252 39 28
+DS 8622 -30709 8858 -30709 39 28
+DS -20039 -5000 -20039 -8898 39 28
+DS -18465 -4016 -18465 -5000 39 28
+DS -19449 -2402 -19449 -4016 39 28
+DS -17717 -2402 -17717 1693 39 28
+DS 17717 -2402 17717 1693 39 28
+DS 19921 -4094 19921 -2402 39 28
+DS 19291 -29252 19291 -27756 39 28
+DS -19488 -29252 -19488 -27756 39 28
+DS -8524 -30709 -8524 -29252 39 28
+DS 8858 -29252 8858 -30709 39 28
+DS -20039 -24409 -20039 -12244 39 28
+DS -19488 -27087 -19488 -24409 39 28
+DC 1142 -11378 1929 -11378 79 20
+DC 1142 -11378 1929 -11339 79 21
+DS 19921 -24409 19921 -8976 39 28
+DS 19291 -27087 19291 -24409 39 28
+DS 19291 -24409 19921 -24409 39 28
+DS 18307 -6890 19291 -6890 39 28
+DS 19291 -8189 19291 -6890 39 28
+DS 18307 -8189 19291 -8189 39 28
+DS 18307 -8976 18307 -8189 39 28
+DS 19921 -8976 18307 -8976 39 28
+DS -18465 -12244 -20039 -12244 39 28
+DS -18465 -11457 -18465 -12244 39 28
+DS -19449 -11457 -18465 -11457 39 28
+DS -19449 -8898 -19449 -11457 39 28
+DS -20039 -8898 -19449 -8898 39 28
+DA -17441 1693 -17441 1969 900 39 28
+DA -13071 1693 -12795 1693 900 39 28
+DA -11535 1693 -11535 1969 900 39 28
+DA 11535 1693 11811 1693 900 39 28
+DA 13071 1693 13071 1969 900 39 28
+DA 17441 1693 17717 1693 900 39 28
+DS -8524 -30709 8622 -30709 40 28
+DS -19488 -29252 -8524 -29252 40 28
+DC 2796 -17047 3583 -17047 75 20
+DC 2795 -17047 3582 -17047 75 21
+DS -19488 -27756 -18504 -27756 40 28
+DS -18504 -27756 -18504 -27087 40 28
+DS -18504 -27087 -19488 -27087 40 28
+DS -19488 -24409 -20039 -24409 40 28
+DS -20039 -5000 -18465 -5000 40 28
+DS -18465 -4016 -19449 -4016 40 28
+DS -19449 -2402 -17717 -2402 40 28
+DS 19291 -27087 18307 -27087 40 28
+DS 18307 -27087 18307 -27756 40 28
+DS 18307 -27756 19291 -27756 40 28
+DS 17717 -2402 19921 -2402 40 28
+DS 19921 -4094 19291 -4094 40 28
+DS 19291 -4094 19291 -6102 40 28
+DS 19291 -6102 18307 -6102 40 28
+DS 18307 -6102 18307 -6890 40 28
+DS 13071 1969 17441 1969 40 28
+DS 11811 1693 11811 -2480 40 28
+DS 11811 -2480 12795 -2480 40 28
+DS 12795 -2480 12795 1693 40 28
+DS -13071 1969 -17441 1969 40 28
+DS -11811 1693 -11811 -2480 40 28
+DS -11811 -2480 -12795 -2480 40 28
+DS -12795 -2480 -12795 1693 40 28
+DS -11535 1969 11535 1969 40 28
+$PAD
+Sh "1" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 50 "/SNES_Slot/SNES_EXT_SYS_CLK"
+Po -16732 197
+Le 19
+$EndPAD
+$PAD
+Sh "2" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 0 ""
+Po -15748 197
+Le 86
+$EndPAD
+$PAD
+Sh "3" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 47 "/SNES_Slot/SNES_EXT_PA6"
+Po -14764 197
+Le 98
+$EndPAD
+$PAD
+Sh "4" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 3 "/SNES_Slot/SNES_EXT_/PARD"
+Po -13780 197
+Le 353
+$EndPAD
+$PAD
+Sh "5" R 787 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 57 "GND"
+Po -10925 197
+Le 46326
+$EndPAD
+$PAD
+Sh "6" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 11 "/SNES_Slot/SNES_EXT_A11"
+Po -9843 197
+Le 41840
+$EndPAD
+$PAD
+Sh "7" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 10 "/SNES_Slot/SNES_EXT_A10"
+Po -8858 197
+Le 33
+$EndPAD
+$PAD
+Sh "8" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 31 "/SNES_Slot/SNES_EXT_A9"
+Po -7874 197
+Le 10
+$EndPAD
+$PAD
+Sh "9" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 30 "/SNES_Slot/SNES_EXT_A8"
+Po -6890 197
+Le 40686
+$EndPAD
+$PAD
+Sh "10" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 29 "/SNES_Slot/SNES_EXT_A7"
+Po -5906 197
+Le 32
+$EndPAD
+$PAD
+Sh "11" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 28 "/SNES_Slot/SNES_EXT_A6"
+Po -4921 197
+Le 26720752
+$EndPAD
+$PAD
+Sh "12" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 27 "/SNES_Slot/SNES_EXT_A5"
+Po -3937 197
+Le 44474
+$EndPAD
+$PAD
+Sh "13" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 26 "/SNES_Slot/SNES_EXT_A4"
+Po -2953 197
+Le 41300
+$EndPAD
+$PAD
+Sh "14" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 25 "/SNES_Slot/SNES_EXT_A3"
+Po -1969 197
+Le 26690192
+$EndPAD
+$PAD
+Sh "15" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 20 "/SNES_Slot/SNES_EXT_A2"
+Po -984 197
+Le 778140282
+$EndPAD
+$PAD
+Sh "16" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 9 "/SNES_Slot/SNES_EXT_A1"
+Po 0 197
+Le 45976
+$EndPAD
+$PAD
+Sh "17" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 8 "/SNES_Slot/SNES_EXT_A0"
+Po 984 197
+Le 26692384
+$EndPAD
+$PAD
+Sh "18" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 2 "/SNES_Slot/SNES_EXT_/IRQ"
+Po 1969 197
+Le 33
+$EndPAD
+$PAD
+Sh "19" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 33 "/SNES_Slot/SNES_EXT_D0"
+Po 2953 197
+Le 101
+$EndPAD
+$PAD
+Sh "20" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 34 "/SNES_Slot/SNES_EXT_D1"
+Po 3937 197
+Le 72
+$EndPAD
+$PAD
+Sh "21" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 35 "/SNES_Slot/SNES_EXT_D2"
+Po 4921 197
+Le 1362898584
+$EndPAD
+$PAD
+Sh "22" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 36 "/SNES_Slot/SNES_EXT_D3"
+Po 5906 197
+Le 193
+$EndPAD
+$PAD
+Sh "23" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 5 "/SNES_Slot/SNES_EXT_/RD"
+Po 6890 197
+Le 1
+$EndPAD
+$PAD
+Sh "24" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 56 "EXT_CIC_DATA1"
+Po 7874 197
+Le -268371600
+$EndPAD
+$PAD
+Sh "25" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 54 "CIC_RESET"
+Po 8858 197
+Le 44216
+$EndPAD
+$PAD
+Sh "26" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 58 "SNES_/RESET"
+Po 9843 197
+Le 26710224
+$EndPAD
+$PAD
+Sh "27" R 787 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 1 "+5VL"
+Po 10925 197
+Le -268358496
+$EndPAD
+$PAD
+Sh "28" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 41 "/SNES_Slot/SNES_EXT_PA0"
+Po 13780 197
+Le 40657
+$EndPAD
+$PAD
+Sh "29" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 43 "/SNES_Slot/SNES_EXT_PA2"
+Po 14764 197
+Le 42
+$EndPAD
+$PAD
+Sh "30" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 45 "/SNES_Slot/SNES_EXT_PA4"
+Po 15748 197
+Le 27776368
+$EndPAD
+$PAD
+Sh "31" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00008000
+Ne 51 "AUDIO_L"
+Po 16732 197
+Le 1376453976
+$EndPAD
+$PAD
+Sh "32" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 0 ""
+Po -16732 197
+Le -65794
+$EndPAD
+$PAD
+Sh "33" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 49 "/SNES_Slot/SNES_EXT_REFRESH"
+Po -15748 197
+Le -197380
+$EndPAD
+$PAD
+Sh "34" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 48 "/SNES_Slot/SNES_EXT_PA7"
+Po -14764 197
+Le 26706208
+$EndPAD
+$PAD
+Sh "35" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 4 "/SNES_Slot/SNES_EXT_/PAWR"
+Po -13780 197
+Le 48
+$EndPAD
+$PAD
+Sh "36" R 787 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 57 "GND"
+Po -10925 197
+Le 26698352
+$EndPAD
+$PAD
+Sh "37" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 12 "/SNES_Slot/SNES_EXT_A12"
+Po -9843 197
+Le 26703872
+$EndPAD
+$PAD
+Sh "38" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 13 "/SNES_Slot/SNES_EXT_A13"
+Po -8858 197
+Le 2513
+$EndPAD
+$PAD
+Sh "39" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 14 "/SNES_Slot/SNES_EXT_A14"
+Po -7874 197
+Le 48
+$EndPAD
+$PAD
+Sh "40" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 15 "/SNES_Slot/SNES_EXT_A15"
+Po -6890 197
+Le 14164224
+$EndPAD
+$PAD
+Sh "41" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 16 "/SNES_Slot/SNES_EXT_A16"
+Po -5906 197
+Le 14319616
+$EndPAD
+$PAD
+Sh "42" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 17 "/SNES_Slot/SNES_EXT_A17"
+Po -4921 197
+Le 14154752
+$EndPAD
+$PAD
+Sh "43" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 18 "/SNES_Slot/SNES_EXT_A18"
+Po -3937 197
+Le 192512
+$EndPAD
+$PAD
+Sh "44" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 19 "/SNES_Slot/SNES_EXT_A19"
+Po -2953 197
+Le 39524
+$EndPAD
+$PAD
+Sh "45" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 21 "/SNES_Slot/SNES_EXT_A20"
+Po -1969 197
+Le 1077956333
+$EndPAD
+$PAD
+Sh "46" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 22 "/SNES_Slot/SNES_EXT_A21"
+Po -984 197
+Le 39959
+$EndPAD
+$PAD
+Sh "47" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 23 "/SNES_Slot/SNES_EXT_A22"
+Po 0 197
+Le 1077938791
+$EndPAD
+$PAD
+Sh "48" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 24 "/SNES_Slot/SNES_EXT_A23"
+Po 984 197
+Le 40274
+$EndPAD
+$PAD
+Sh "49" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 6 "/SNES_Slot/SNES_EXT_/ROMSEL"
+Po 1969 197
+Le 40357
+$EndPAD
+$PAD
+Sh "50" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 37 "/SNES_Slot/SNES_EXT_D4"
+Po 2953 197
+Le 40449
+$EndPAD
+$PAD
+Sh "51" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 38 "/SNES_Slot/SNES_EXT_D5"
+Po 3937 197
+Le 1077956333
+$EndPAD
+$PAD
+Sh "52" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 39 "/SNES_Slot/SNES_EXT_D6"
+Po 4921 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "53" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 40 "/SNES_Slot/SNES_EXT_D7"
+Po 5906 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "54" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 7 "/SNES_Slot/SNES_EXT_/WR"
+Po 6890 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "55" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 55 "EXT_CIC_DATA0"
+Po 7874 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "56" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 53 "CIC_CLK"
+Po 8858 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "57" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 32 "/SNES_Slot/SNES_EXT_CPU_CLK"
+Po 9843 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "58" R 787 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 1 "+5VL"
+Po 10925 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "59" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 42 "/SNES_Slot/SNES_EXT_PA1"
+Po 13780 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "60" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 44 "/SNES_Slot/SNES_EXT_PA3"
+Po 14764 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "61" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 46 "/SNES_Slot/SNES_EXT_PA5"
+Po 15748 197
+Le 1077941145
+$EndPAD
+$PAD
+Sh "62" R 591 2756 0 0 0
+Dr 0 0 0
+At CONN N 00000001
+Ne 52 "AUDIO_R"
+Po 16732 197
+Le 23484672
+$EndPAD
+$PAD
+Sh "" R 4921 3150 0 0 0
+Dr 0 0 0
+At CONN N 00C00000
+Ne 0 ""
+Po -15256 394
+Le 23484672
+$EndPAD
+$PAD
+Sh "" R 4921 3150 0 0 0
+Dr 0 0 0
+At CONN N 00C00000
+Ne 0 ""
+Po 15256 394
+Le 23484672
+$EndPAD
+$PAD
+Sh "" R 23622 3150 0 0 0
+Dr 0 0 0
+At CONN N 00C00000
+Ne 0 ""
+Po 0 394
+Le 23484672
+$EndPAD
+$PAD
+Sh "" R 2362 1969 0 0 0
+Dr 0 0 0
+At CONN N 00400000
+Ne 0 ""
+Po -10945 -3819
+Le 23484672
+$EndPAD
+$PAD
+Sh "" R 2283 2362 0 0 0
+Dr 0 0 0
+At CONN N 00400000
+Ne 0 ""
+Po 14331 -3780
+Le 23484672
+$EndPAD
+$EndMODULE  SNESCART_EXT2_SMTUSB
 $EndLIBRARY

snes/const.a65

@@ -3,7 +3,7 @@ zero		.word	0
 bg2tile		.byt $20
 hdma_pal_src	.byt 44
 		.byt $60, $2d
-		.byt 14
+		.byt 10
 		.byt $00, $00
 		.byt 2
 		.byt $60, $2d
@@ -29,7 +29,7 @@ hdma_pal_src	.byt 44
 		.byt $20, $25
 		.byt 11
 		.byt $40, $29
-		.byt 31
+		.byt 29
 		.byt $60, $2d
 		.byt 2
 		.byt $20, $04
@@ -69,11 +69,11 @@ hdma_cg_addr_src
 		.byt $00, $00, $00, $00, $00, $00, $00, $00
 		.byt $00, $00, $00, $00, $00, $00, $00, $00
 		.byt $00
-hdma_mode_src	.byt 64, $03, $01, $05, $00
-hdma_scroll_src	.byt 64
-		.byt $00, $00, $ff, $0f
+hdma_mode_src	.byt 56, $03, $01, $05, $00
+hdma_scroll_src	.byt 56
+		.byt $00, $00, $ff, $03
 		.byt $01
-		.byt $fc, $00, $05, $00
+		.byt $fc, $00, $1f, $03
 		.byt $00
 ; colors:
 ; upper border: + #547fff -> 10,15,31
@@ -93,30 +93,31 @@ hdma_math_src	.byt 1 ; these are filled in...
 		.byt $00, $e0
 		.byt 0
 
-oam_data_l	.byt 75, 56, 31, $0e
-		.byt 83, 56, 1, $0e
-		.byt 91, 56, 2, $0e
-		.byt 99, 56, 3, $0e
-		.byt 107, 56, 4, $0e
-		.byt 115, 56, 5, $0e
-		.byt 123, 56, 6, $0e
-		.byt 131, 56, 7, $0e
-		.byt 75, 64, 8, $0e
-		.byt 83, 64, 9, $0e
-		.byt 91, 64, 10, $0e
-		.byt 99, 64, 11, $0e
-		.byt 107, 64, 12, $0e
-		.byt 115, 64, 13, $0e
-		.byt 123, 64, 14, $0e
-		.byt 131, 64, 15, $0e
-		.byt 75, 72, 16, $0e
-		.byt 83, 72, 17, $0e
-		.byt 91, 72, 18, $0e
-		.byt 99, 72, 19, $0e
-		.byt 75, 80, 24, $0e
-		.byt 83, 80, 25, $0e
-		.byt 91, 80, 26, $0e
-oam_data_h	.byt 0, 0, 0, 0, 0, 0, 0, 0
+oam_data_l	.byt 88, 56, 0, $08
+		.byt 96, 56, 1, $08
+		.byt 104, 56, 2, $08
+		.byt 112, 56, 3, $08
+		.byt 120, 56, 4, $08
+		.byt 128, 56, 5, $08
+		.byt 136, 56, 6, $08
+		.byt 88, 64, 7, $08
+		.byt 96, 64, 8, $08
+		.byt 104, 64, 9, $08
+		.byt 112, 64, 10, $08
+		.byt 88, 72, 14, $08
+		.byt 96, 72, 15, $08
+		.byt 157, 56, 21, $0a
+		.byt 171, 56, 22, $0c
+		.byt 179, 56, 23, $0c
+		.byt 171, 64, 24, $0c
+		.byt 171, 72, 26, $0c
+		.byt 171, 80, 28, $0c
+		.byt 171, 88, 30, $0c
+		.byt 171, 96, 32, $0c
+		.byt 193, 56, 34, $0e
+		.byt 193, 64, 35, $0e
+		.byt 193, 72, 36, $0e
+oam_data_h	.byt 0, 0, 0, 0, 0, 0, 0, 0, 0
 
 space64	.byt $20, $20, $20, $20, $20, $20, $20, $20
 	.byt $20, $20, $20, $20, $20, $20, $20, $20
@@ -153,6 +154,10 @@ sysinfo_win_x	.byt 10
 sysinfo_win_y	.byt 9
 sysinfo_win_w	.byt 43
 sysinfo_win_h	.byt 17
+last_win_x	.byt 2
+last_win_y	.byt 12
+last_win_w	.byt 60
+last_win_h	.byt 5
 
 text_mm_file		.byt "File Browser", 0
 text_mm_last		.byt "Run last game", 0
@@ -162,3 +167,5 @@ text_mm_vmode_menu	.byt "Menu video mode", 0
 text_mm_vmode_game	.byt "Game video mode", 0
 text_mm_sysinfo		.byt "System Information", 0
 text_statusbar_keys	.byt "A:Select B:Back X:Menu", 0
+text_last		.byt "Run previous ROM: Press Start again to confirm", 0
+

snes/data.a65

@@ -14,6 +14,8 @@ dirent_bank	.word	0
 dirent_type	.byt 0
 dirend_onscreen	.byt 0
 dirlog_idx	.byt 0,0,0 ; long ptr
+direntry_fits_idx
+		.byt 0,0
 
 ;----------parameters for text output----------
 print_x	.byt 0		;x coordinate
@@ -26,7 +28,8 @@ print_pal	.word 0	;palette number for text output
 print_temp	.word 0 ;work variable
 print_count	.byt 0	;how many characters may be printed?
 print_count_tmp .byt 0	;work variable
-print_done	.word 0  ;how many characters were printed?
+print_done	.word 0 ;how many characters were printed?
+print_over	.byt 0  ;was the string printed incompletely?
 ;----------parameters for dma----------
 dma_a_bank	.byt 0
 dma_a_addr	.word 0
@@ -171,5 +174,14 @@ dirlog  .word	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
 	.word	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
 	.word	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
 
+direntry_fits
+	.byt	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+	.byt	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+direntry_xscroll_state
+	.word	0
+direntry_xscroll
+	.word	0
+direntry_xscroll_wait
+	.word	0
 infloop		.byt 0,0  ; to be filled w/ 80 FE
 wram_fadeloop	.byt 0

snes/logospr.a65

@@ -1,80 +1,69 @@
-logospr .byt  $00, $00, $00, $00, $00, $00, $00, $00
+logospr .byt  $50, $2f, $75, $2a, $7e, $21, $4a, $14
+        .byt  $6f, $3e, $5b, $1b, $60, $20, $54, $00
+        .byt  $10, $0f, $15, $0a, $1f, $00, $3e, $01
+        .byt  $1e, $01, $3a, $05, $01, $1e, $21, $1f
+        .byt  $f4, $8f, $fc, $83, $7f, $84, $fe, $05
+        .byt  $fe, $07, $fb, $07, $fe, $02, $fe, $00
+        .byt  $0c, $8b, $08, $0f, $03, $04, $83, $80
+        .byt  $03, $00, $07, $04, $00, $01, $01, $01
+        .byt  $0f, $f8, $4f, $b8, $f7, $00, $b7, $58
+        .byt  $af, $e0, $ff, $f0, $0f, $10, $df, $e0
+        .byt  $08, $f8, $40, $b8, $f8, $08, $f8, $08
+        .byt  $e0, $10, $f0, $10, $00, $e0, $c0, $c0
+        .byt  $ff, $00, $fb, $00, $f9, $00, $f8, $00
+        .byt  $f8, $00, $f0, $00, $f0, $00, $f0, $00
+        .byt  $00, $01, $03, $03, $00, $00, $00, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $00, $ff, $00, $7f, $fe, $61, $eb, $0a
+        .byt  $7f, $00, $1f, $00, $00, $00, $00, $00
+        .byt  $00, $ff, $00, $ff, $3f, $40, $35, $39
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $0f, $e0, $1f, $c0, $bf, $c0, $ff, $00
+        .byt  $ff, $00, $fe, $00, $70, $00, $00, $00
+        .byt  $10, $e0, $60, $80, $c0, $c0, $00, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $f0, $00, $e0, $00, $e0, $00, $c0, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $7f, $2b, $5e, $1f, $7e, $3f, $6b, $2b
+        .byt  $4f, $0f, $da, $1a, $c0, $22, $c0, $35
+        .byt  $0a, $1e, $3e, $1e, $00, $1e, $14, $0a
+        .byt  $30, $20, $25, $25, $1d, $1d, $0a, $0a
+        .byt  $ff, $00, $ff, $00, $ff, $00, $ff, $00
+        .byt  $ff, $00, $ff, $00, $ff, $00, $ff, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $ff, $00, $ff, $00, $83, $00, $00, $00
+        .byt  $80, $00, $80, $00, $80, $00, $80, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $e0, $00, $e0, $00, $80, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $e0, $a0, $a1, $a0, $41, $80, $01, $c0
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $de, $3f, $9e, $7f, $bf, $7f, $bf, $7f
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $ff, $ff, $fe, $ff, $01, $fe, $00, $fe
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $ff, $00, $ff, $00, $ff, $00, $fe, $01
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $00, $00, $80, $80, $00, $80, $80, $80
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $ff, $7f, $7f, $7f, $7f, $7f, $7f, $ff
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $2f, $07, $13, $07, $11, $02, $48, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $df, $d8, $cb, $cc, $cd, $ce, $87, $86
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $ff, $ff, $ff, $ff, $00, $ff, $c5, $3b
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $ff, $00, $ff, $00, $ff, $00, $7f, $83
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $c0, $e0, $a0, $e0, $00, $00, $80, $80
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $ff, $0f, $ff, $3f, $7f, $bf, $7f, $ff
+        .byt  $c0, $3f, $d5, $2a, $ff, $00, $7f, $00
+        .byt  $7f, $00, $7f, $00, $3f, $00, $0f, $00
+        .byt  $3f, $3f, $3f, $3f, $3f, $3f, $1e, $1e
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $04, $00, $08, $00, $10, $00, $10, $00
+        .byt  $ff, $00, $ff, $00, $ff, $00, $ff, $00
+        .byt  $ff, $00, $ff, $00, $fe, $00, $fc, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $f8, $f8, $f0, $f0, $e0, $e0, $e0, $e0
-        .byt  $7f, $20, $7f, $20, $60, $00, $00, $20
-        .byt  $00, $3f, $c0, $3f, $ff, $40, $ff, $00
-        .byt  $3f, $20, $3f, $20, $20, $3f, $40, $7f
-        .byt  $5f, $7f, $1f, $3f, $20, $7f, $20, $3f
-        .byt  $c1, $01, $80, $00, $01, $01, $40, $40
-        .byt  $00, $c0, $40, $c0, $c0, $40, $c0, $40
-        .byt  $ff, $7f, $ff, $3e, $7e, $be, $3f, $bf
-        .byt  $bf, $bf, $bf, $ff, $3f, $ff, $3f, $ff
-        .byt  $ff, $00, $ff, $00, $01, $01, $01, $81
-        .byt  $80, $fc, $5c, $4c, $00, $00, $18, $00
-        .byt  $fe, $01, $ff, $01, $01, $ff, $00, $fe
-        .byt  $3f, $fd, $bb, $db, $ff, $ff, $e7, $e7
-        .byt  $00, $00, $00, $00, $00, $00, $c0, $c0
-        .byt  $80, $80, $00, $00, $01, $00, $03, $00
-        .byt  $ff, $ff, $ff, $ff, $ff, $ff, $3f, $ff
-        .byt  $7f, $ff, $ff, $ff, $fe, $fe, $fc, $fc
-        .byt  $46, $00, $41, $00, $40, $00, $40, $00
-        .byt  $40, $00, $80, $00, $80, $00, $00, $00
-        .byt  $81, $81, $80, $80, $80, $80, $80, $80
-        .byt  $80, $80, $00, $00, $00, $00, $00, $00
-        .byt  $44, $44, $00, $00, $78, $00, $03, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $bb, $83, $ff, $ff, $07, $07, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $00, $00, $00, $00, $03, $00, $fc, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $ff, $ff, $ff, $ff, $fc, $fc, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $60, $00, $c0, $00, $00, $00, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $80, $80, $00, $00, $00, $00, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $e0, $5f, $a0, $5f, $bf, $40, $bf, $60
-        .byt  $bf, $7f, $bf, $7f, $80, $40, $00, $40
-        .byt  $20, $7f, $20, $3f, $3f, $3f, $3f, $3f
-        .byt  $3f, $3f, $3f, $3f, $3f, $00, $bf, $80
-        .byt  $00, $80, $10, $c0, $c0, $40, $e0, $40
-        .byt  $c0, $c0, $e0, $e0, $60, $60, $00, $40
-        .byt  $7f, $ff, $2f, $af, $bf, $bf, $9f, $9f
-        .byt  $bf, $bf, $9f, $bf, $9f, $3f, $bf, $3f
-        .byt  $13, $00, $10, $00, $10, $00, $08, $00
-        .byt  $08, $00, $08, $00, $08, $00, $00, $00
-        .byt  $e0, $e0, $e0, $e0, $e0, $e0, $f0, $f0
-        .byt  $f0, $f0, $f0, $f0, $f0, $f0, $f8, $f8
-        .byt  $fc, $00, $00, $00, $00, $00, $00, $00
+        .byt  $80, $00, $80, $00, $80, $00, $80, $00
+        .byt  $80, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
@@ -93,36 +82,67 @@ logospr .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $3f, $7f, $3f, $7f, $c0, $7f, $80, $3f
-        .byt  $3f, $3f, $1f, $1f, $00, $00, $00, $00
-        .byt  $80, $80, $80, $80, $00, $40, $40, $40
-        .byt  $40, $7f, $60, $7f, $3f, $3f, $1f, $1f
-        .byt  $80, $c0, $80, $c0, $00, $c0, $40, $c0
-        .byt  $80, $80, $00, $00, $00, $00, $00, $00
-        .byt  $3f, $3f, $3f, $3f, $3f, $3f, $3f, $7f
-        .byt  $7f, $ff, $ff, $ff, $ff, $ff, $ff, $ff
-        .byt  $08, $00, $08, $00, $08, $00, $00, $00
-        .byt  $00, $00, $00, $00, $20, $00, $40, $00
-        .byt  $f0, $f0, $f0, $f0, $f0, $f0, $f0, $f0
-        .byt  $f0, $f0, $e0, $e0, $c0, $c0, $80, $80
+        .byt  $00, $20, $c0, $00, $80, $40, $c0, $40
+        .byt  $00, $80, $40, $c0, $c0, $c0, $40, $00
+        .byt  $00, $20, $40, $00, $40, $00, $40, $00
+        .byt  $00, $40, $40, $00, $40, $00, $00, $40
+        .byt  $7b, $06, $3a, $47, $3e, $43, $4c, $41
+        .byt  $0f, $00, $1f, $10, $0f, $10, $1f, $10
+        .byt  $06, $01, $06, $01, $02, $01, $30, $03
+        .byt  $08, $02, $05, $00, $0b, $00, $05, $00
+        .byt  $fc, $02, $d8, $7c, $80, $00, $80, $00
+        .byt  $80, $40, $c0, $40, $80, $80, $00, $00
+        .byt  $00, $00, $00, $40, $40, $00, $40, $40
+        .byt  $80, $00, $00, $00, $00, $80, $80, $00
+        .byt  $07, $19, $0e, $10, $14, $1a, $18, $16
+        .byt  $10, $0e, $02, $1c, $00, $1e, $10, $1e
+        .byt  $0e, $08, $0e, $00, $0e, $0a, $0e, $06
+        .byt  $1e, $1e, $0e, $0c, $0e, $0e, $0e, $0e
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $0b, $1f, $15, $1e, $1e, $1e, $06, $1e
+        .byt  $0f, $1f, $1f, $0f, $0f, $0f, $0f, $0f
+        .byt  $04, $0e, $0b, $0f, $01, $0f, $09, $0e
+        .byt  $09, $0f, $14, $1f, $0a, $0f, $05, $0f
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $0f, $1f, $0f, $0f, $05, $05, $0a, $0a
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $0f, $0f, $1f, $1f, $1f, $05, $1f, $0a
+        .byt  $1f, $08, $1f, $00, $1f, $0a, $1f, $15
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $00, $00, $00, $00, $00, $02, $00, $10
+        .byt  $00, $0e, $00, $15, $10, $0f, $10, $0f
+        .byt  $1f, $1f, $1f, $1f, $1d, $1d, $0f, $0f
+        .byt  $11, $11, $0a, $0a, $10, $10, $10, $10
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $0a, $05, $05, $0a, $0f, $00, $0f, $00
+        .byt  $0f, $0a, $07, $05, $00, $00, $00, $00
+        .byt  $0a, $0a, $05, $05, $0f, $0f, $0f, $0f
+        .byt  $05, $05, $02, $02, $00, $00, $00, $00
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $5f, $2f, $5f, $2f, $70, $2f, $40, $1f
         .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $1f, $00, $1f, $00, $1f, $00, $3f, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $00, $00, $00, $00, $00, $00, $00, $00
+        .byt  $09, $00, $01, $08, $0f, $08, $05, $00
+        .byt  $03, $05, $07, $05, $00, $02, $06, $00
+        .byt  $07, $00, $07, $00, $05, $02, $03, $00
+        .byt  $04, $03, $05, $02, $00, $06, $00, $02
+        .byt  $00, $06, $02, $04, $06, $04, $00, $02
+        .byt  $02, $00, $00, $02, $02, $00, $02, $00
+        .byt  $00, $02, $00, $02, $02, $06, $04, $06
+        .byt  $06, $06, $04, $06, $06, $06, $06, $06
+        .byt  $02, $04, $00, $06, $02, $04, $00, $06
+        .byt  $06, $06, $04, $06, $00, $04, $00, $00
+        .byt  $06, $06, $06, $06, $06, $06, $06, $06
+        .byt  $06, $06, $06, $04, $04, $02, $00, $06

snes/main.a65

@@ -97,15 +97,8 @@ setup_gfx:
 	sta $2183
 	DMA0(#$08, #0, #^zero, #!zero, #$80)
 
-;copy 2bpp font (can be used as 4-bit lores font!)
-	ldx #$4000
-	stx $2116
-	DMA0(#$01, #$2000, #^font2, #!font2, #$18)
-
-;copy 4bpp font
-	ldx #$0000
-	stx $2116
-	DMA0(#$01, #$4000, #^font4, #!font4, #$18)
+;generate fonts
+	jsr genfonts
 
 ;clear BG1 tilemap
 	ldx #BG1_TILE_BASE
@@ -127,23 +120,28 @@ setup_gfx:
 	stx $2116
 	DMA0(#$01, #$4000, #^logo, #!logo, #$18)
 
-;copy logo tilemap
+;generate logo tilemap
 	ldx #BG1_TILE_BASE
 	stx $2116
-	DMA0(#$01, #$280, #^logomap, #!logomap, #$18)
+	ldx #$0100
+-	stx $2118
+	inx
+	cpx #$01e0
+	bne -
+
 
 ;copy sprites tiles
 	ldx #OAM_TILE_BASE
 	stx $2116
-	DMA0(#$01, #$400, #^logospr, #!logospr, #$18)
+	DMA0(#$01, #$500, #^logospr, #!logospr, #$18)
 
 ;set OAM tables
 	ldx #$0000
 	stx $2102
-	DMA0(#$00, #$5C, #^oam_data_l, #!oam_data_l, #$04)
+	DMA0(#$00, #$60, #^oam_data_l, #!oam_data_l, #$04)
 	ldx #$0100
 	stx $2102
-	DMA0(#$00, #$08, #^oam_data_h, #!oam_data_h, #$04)
+	DMA0(#$00, #$09, #^oam_data_h, #!oam_data_h, #$04)
 
 ;set palette
 	stz $2121
@@ -232,7 +230,7 @@ tests:
 	lda #9
 	sta bar_yl
 	rts
-	
+
 snes_init:
 	sep #$20 : .as		;8-bit accumulator
 	rep #$10 : .xl		;16-bit index
@@ -283,7 +281,7 @@ snes_init:
 	stz $2113		;
 	stz $2114		;
 	stz $2114		;
-	lda #$80		
+	lda #$80
 	sta $2115		;
 	stz $2116		;
 	stz $2117		;
@@ -387,3 +385,59 @@ fadeloop_start
 
 fadeloop_end:
 	.byt $ff
+
+genfonts:
+	php
+	rep #$10 : .xl
+	sep #$20 : .as
+
+;clear VRAM font areas
+	ldx #$0000
+	stx $2116
+	DMA0(#$09, #$4000, #^zero, #!zero, #$18)
+
+	ldx #$4000
+	stx $2116
+	DMA0(#$09, #$2000, #^zero, #!zero, #$18)
+
+	sep #$10 : .xs
+	rep #$20 : .al
+
+	stz $2116
+	ldx #$01
+	stx $4300
+	ldx #^font
+	stx $4304
+	lda #!font
+	sta $4302
+	lda #$0010
+	sta $4305
+	ldx #$18
+	stx $4301
+	lda #$0000
+-	sta $2116
+	ldx #$10
+	stx $4305
+	ldx #$01
+	stx $420b
+	clc
+	adc #$20
+	cmp #$2000
+	bne -
+	ldx #^font
+	stx $4304
+	lda #!font
+	sta $4302
+	lda #$4000
+-	sta $2116
+	ldx #$10
+	stx $4305
+	ldx #$01
+	stx $420b
+	clc
+	adc #$10
+	cmp #$5000
+	bne -
+	plp
+	rts
+

snes/memmap.i65

@@ -20,7 +20,9 @@
 #define AVR_CMD		$307000
 #define AVR_PARAM	$307004
 #define RTC_STATUS	$307100
-#define SYSINFO_BLK	$307110
+#define LAST_STATUS	$307101
+#define SYSINFO_BLK	$307200
+#define LAST_GAME	$307420
 
 #define ROOT_DIR	$C10000
 

snes/menu.a65

@@ -23,6 +23,8 @@ menu_init:
 	ldx #$0000
 	stx dirptr_idx
 	stx menu_sel
+	stx direntry_xscroll
+	stx direntry_xscroll_state
 	lda #$01
 	sta menu_dirty
 	rep #$20 : .al
@@ -47,6 +49,7 @@ menuloop_s1
 	lda menu_dirty		;is there ANY reason to redraw the menu?
 	cmp #$01
 	beq menuloop_redraw 	;then do
+	jsr scroll_direntry
 	bra menuloop_s1
 menuloop_redraw
 	stz menu_dirty
@@ -126,6 +129,9 @@ menu_updates:
 	lda #$80
 	and pad1trig+1
 	bne key_b
+	lda #$10
+	and pad1trig+1
+	bne key_start
 	lda #$20
 	and pad1trig+1
 	bne key_select
@@ -157,10 +163,12 @@ key_a
 key_x
 	jsr menu_key_x
 	bra menuupd_out
-
 key_select
 	jsr menu_key_select
 	bra menuupd_out
+key_start
+	jsr menu_key_start
+	bra menuupd_out
 
 menuupd_out
 	lda #$09
@@ -179,6 +187,7 @@ menu_redraw_out
 redraw_filelist
 	ldy #$0000
 	sty dirptr_idx
+	sty direntry_fits_idx
 	stz dirend_idx
 	stz dirend_onscreen
 redraw_filelist_loop
@@ -206,6 +215,7 @@ redraw_filelist_loop
 	sta @dirent_type
 	sty dirptr_idx
 	jsr print_direntry
+	inc direntry_fits_idx
 	bra redraw_filelist_loop
 redraw_filelist_dirend
 	dey                        ; recover last valid direntry number
@@ -284,6 +294,8 @@ dirent_type_cont
 	txa
 	clc
 	adc @fd_fnoff
+	clc
+	adc @direntry_xscroll
 	sta @fd_fnoff
 	plb
 
@@ -298,12 +310,14 @@ dirent_type_cont
 	lda dirent_bank
 	sta print_bank
 	jsr hiprint
-
 	lda cursor_x
 	clc
 	adc print_done
 	sta print_x
 
+	lda print_over
+	ldy direntry_fits_idx
+	sta !direntry_fits, y
 	lda #54
 	sec
 	sbc print_done
@@ -339,6 +353,7 @@ dirent_type_cont_2
 	rts
 
 menu_key_down:
+	jsr scroll_direntry_clean
 	lda listdisp
 	dec
 	cmp menu_sel
@@ -372,6 +387,7 @@ down_out
 	rts
 
 menu_key_up:
+	jsr scroll_direntry_clean
 	lda menu_sel
 	bne up_noscroll
 	lda #$01
@@ -394,6 +410,7 @@ up_out
 	rts
 
 menuupd_lastcursor
+	jsr scroll_direntry_clean
 	lda dirend_idx
 	lsr
 	lsr
@@ -402,6 +419,8 @@ menuupd_lastcursor
 
 ; go back one page
 menu_key_left:
+	stz direntry_xscroll
+	stz direntry_xscroll_state
 	lda #$01            ; must redraw afterwards
 	sta menu_dirty
 	rep #$20 : .al
@@ -427,6 +446,8 @@ menu_key_left:
 
 ; go forth one page
 menu_key_right:
+	stz direntry_xscroll
+	stz direntry_xscroll_state
 	sep #$20 : .as
 	lda dirend_onscreen
 	bne menuupd_lastcursor
@@ -447,16 +468,15 @@ menu_key_a:
 	rts
 
 menu_key_select:
-	lda barstep
-	beq do_setup448
-do_setup224
-	jsr setup_224
 	rts
-do_setup448
-	jsr setup_448
+
+menu_key_start:
+	jsr select_last_file
 	rts
 
 menu_key_b:
+	stz direntry_xscroll
+	stz direntry_xscroll_state
 	rep #$20 : .al
 	lda dirstart_addr
 	beq skip_key_b
@@ -514,6 +534,7 @@ select_file:
 	sep #$20 : .as
 	lda #$01
 	sta @AVR_CMD
+select_file_fade:
 	lda #$00
 	sta @$4200
 	sei
@@ -632,10 +653,10 @@ setup_224_adjsel
 +
 	lda #18*64
 	sta textdmasize
-	lda #$0007
+	lda #$000b
 	sta hdma_scroll+8
 	sep #$20 : .as
-	lda #$07
+	lda #$0b
 	sta $2110
 	lda #$00
 	sta $2110
@@ -667,32 +688,6 @@ setup_224_adjsel
 	plp
 	rts
 
-setup_448:
-	php
-	rep #$30 : .xl : .al
-	lda #36
-	sta listdisp
-	lda #36*64
-	sta textdmasize
-	lda #$ffc6
-	sta hdma_scroll+8
-	sep #$20 : .as
-	lda #$c6
-	sta $2110
-	lda #$ff
-	sta $2110
-	lda #$01
-	sta barstep
-	ora #$08
-	sta $2133
-	lda #$04
-	sta hdma_math_selection
-	lda #$01
-	sta vidmode
-	sta menu_dirty
-	plp
-	rts
-
 menu_statusbar
 	pha
 	phx
@@ -723,3 +718,141 @@ menu_statusbar
 	pla
 	rts
 
+select_last_file:
+	php
+	sep #$20 : .as
+	rep #$10 : .xl
+	lda @LAST_STATUS
+	bne +
+	plp
+	rts
++	jsr backup_screen
+	lda #^text_last
+	sta window_tbank
+	ldx #!text_last
+	stx window_taddr
+	lda @last_win_x
+	sta window_x
+	inc
+	inc
+	sta bar_xl
+	pha
+	lda @last_win_y
+	sta window_y
+	inc
+	sta bar_yl
+	inc
+	pha
+	lda @last_win_w
+	sta window_w
+	lda @last_win_h
+	sta window_h
+	jsr draw_window
+	stz print_pal
+	lda #^LAST_GAME
+	ldx #!LAST_GAME
+	sta print_bank
+	stx print_src
+	stz print_pal
+	pla
+	sta print_y
+	pla
+	sta print_x
+	lda #56
+	sta bar_wl
+	sta print_count
+	jsr hiprint
+-	lda isr_done
+	lsr
+	bcc -
+	jsr printtime
+	jsr read_pad
+	lda #$80
+	and pad1trig+1
+	bne +
+	lda #$10
+	and pad1trig+1
+	beq -
+	lda #$04
+	sta @AVR_CMD
+	jmp select_file_fade
++	jsr restore_screen
+	plp
+	rts
+
+scroll_direntry_clean:
+	lda #$01
+	sta direntry_xscroll_state
+	stz direntry_xscroll
+	stz direntry_xscroll_wait
+	jsr scroll_direntry
+	stz direntry_xscroll_state
+	stz direntry_xscroll
+	rts
+
+scroll_direntry:
+	ldy menu_sel
+	lda direntry_xscroll_state
+	bne +
+	lda direntry_fits, y
+	bne scroll_direntry_enter
+;	stz direntry_xscroll_state
+	rts
+scroll_direntry_enter
+	lda #$01
+	sta direntry_xscroll_state
+	stz direntry_xscroll_wait
++	lda direntry_xscroll_wait
+	beq +
+	dec direntry_xscroll_wait
+	rts
+
++	lda direntry_xscroll
+	bne scroll_direntry_scrollfast
+	lda #$28
+	bra +
+scroll_direntry_scrollfast
+	lda #$10
++	sta direntry_xscroll_wait
+	tya
+	clc
+	adc #$09
+	sta cursor_y
+	lda #$02
+	sta cursor_x
+	rep #$20 : .al
+	lda menu_sel
+	asl
+	asl
+	tay
+	lda [dirptr_addr], y
+	sta @dirent_addr
+	iny
+	iny
+	sep #$20 : .as
+	lda [dirptr_addr], y	   ; load fileinfo bank
+	clc
+	adc #$c0                   ; add $C0 for memory map
+	sta @dirent_bank           ; store as current bank
+	iny
+	lda [dirptr_addr], y
+	iny
+	sta @dirent_type
+	ldy menu_sel
+	sty direntry_fits_idx
+	phy
+	jsr print_direntry
+	ply
+	lda direntry_fits, y
+	bne +
+	lda #$ff
+	sta direntry_xscroll_state
+	lda #$28
+	sta direntry_xscroll_wait
++	lda direntry_xscroll_state
+	adc direntry_xscroll
+	sta direntry_xscroll
+	bne +
+	lda #$01
+	sta direntry_xscroll_state
++	rts

snes/palette.a65

@@ -1,77 +1,64 @@
-palette
-;8bit palette; 4bit palette0; 2bit palette0
-        .byt  $42, $08, $ff, $7f, $c6, $18, $18, $63
-;2bit palette1
-        .byt  $42, $08, $ff, $43, $c6, $0c, $18, $63
-;2bit palette2
-        .byt  $42, $08, $f0, $43, $c0, $0c, $18, $63
-;2bit palette3
+palette .byt  $1f, $7c, $ff, $7f, $c6, $18, $18, $63
+        .byt  $00, $00, $ff, $43, $c6, $0c, $18, $33
+        .byt  $00, $00, $f0, $43, $c3, $0c, $0c, $33
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $00, $00, $ff, $43, $c6, $0c, $18, $33
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $00, $00, $f0, $43, $c3, $0c, $0c, $33
+        .byt  $40, $08, $60, $0c, $80, $10, $80, $0c
+        .byt  $80, $14, $a0, $14, $05, $21, $30, $42
+        .byt  $0f, $3e, $cd, $3d, $c1, $18, $52, $4a
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $d6, $5a, $6b, $2d, $39, $67, $7a, $6b
+        .byt  $ce, $39, $46, $29, $94, $52, $ad, $35
+        .byt  $a2, $14, $aa, $35, $c0, $18, $18, $63
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $e0, $1c, $a0, $18, $c3, $18, $29, $25
+        .byt  $4a, $29, $ff, $7f, $21, $04, $bd, $73
+        .byt  $fe, $7b, $e7, $18, $42, $08, $00, $00
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $a5, $14, $79, $7b, $e6, $1c, $63, $0c
+        .byt  $de, $7f, $bd, $7f, $08, $21, $8c, $31
+        .byt  $6a, $2d, $08, $25, $61, $29, $00, $21
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $c4, $45, $45, $5a, $a5, $6e, $e6, $7e
+        .byt  $c7, $10, $b4, $66, $82, $35, $27, $35
+        .byt  $8b, $3d, $66, $59, $85, $69, $6f, $76
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $83, $75, $37, $7f, $46, $45, $0a, $7a
+        .byt  $9b, $7f, $d2, $7a, $15, $7f, $c0, $3c
+        .byt  $08, $11, $21, $25, $86, $52, $0e, $25
+        .byt  $d9, $1c, $f1, $1c, $9e, $14, $ef, $1c
+        .byt  $ca, $18, $9d, $14, $36, $29, $d3, $72
+        .byt  $50, $5a, $81, $28, $cd, $49, $6a, $26
+        .byt  $c7, $15, $63, $25, $4f, $23, $ac, $1e
+        .byt  $05, $0d, $0e, $2b, $25, $0d, $c4, $08
+        .byt  $62, $04, $e7, $29, $b2, $18, $6c, $0c
+        .byt  $82, $04, $ce, $19, $31, $1a, $ff, $17
+        .byt  $dd, $1b, $7b, $1f, $4a, $11, $d6, $1a
+        .byt  $29, $73, $4d, $63, $50, $4f, $d3, $26
+        .byt  $b8, $37, $26, $08, $fe, $20, $94, $3f
+        .byt  $a3, $04, $10, $42, $10, $42, $10, $42
         .byt  $10, $42, $10, $42, $10, $42, $10, $42
-;4bit palette1; 2bit palette4
-        .byt  $42, $08, $ff, $43, $c6, $0c, $18, $63
-;2bit palette5
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
+        .byt  $1f, $74, $00, $00, $08, $21, $8c, $31
+        .byt  $ce, $39, $bd, $77, $7b, $6f, $39, $67
+        .byt  $d6, $5a, $94, $52, $ff, $7f, $10, $42
+        .byt  $4a, $29, $84, $10, $c6, $18, $52, $4a
+        .byt  $1f, $74, $45, $11, $e3, $10, $a1, $0c
+        .byt  $e8, $19, $4f, $27, $0e, $23, $ed, $22
+        .byt  $2e, $23, $09, $1a, $cc, $22, $24, $11
         .byt  $10, $42, $10, $42, $10, $42, $10, $42
-;2bit palette6
-        .byt  $10, $42, $10, $42, $10, $42, $10, $42
-;2bit palette7
-        .byt  $10, $42, $10, $42, $10, $42, $10, $42
-;4bit palette2
-        .byt  $10, $42, $f0, $43, $c0, $0c, $18, $63
-;logo
-        .byt  $00, $00, $00, $00, $20, $04, $20, $00
-        .byt  $20, $00, $21, $00, $21, $08, $40, $08
-        .byt  $40, $04, $42, $04, $42, $0c, $60, $0c
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $62, $0c, $61, $0c, $62, $00, $63, $0c
-        .byt  $63, $10, $62, $08, $80, $10, $64, $0c
-        .byt  $a0, $14, $84, $10, $a2, $0c, $a4, $0c
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $a4, $10, $c0, $18, $a4, $14, $a6, $14
-        .byt  $a5, $14, $89, $14, $e0, $1c, $c5, $10
-        .byt  $c6, $18, $e3, $0c, $e5, $1c, $00, $21
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $04, $0d, $ca, $18, $04, $11, $e7, $1c
-        .byt  $20, $25, $21, $1d, $5d, $0c, $08, $15
-        .byt  $40, $29, $08, $21, $5e, $10, $5d, $10
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $cf, $20, $7b, $10, $7e, $14, $27, $25
-        .byt  $60, $31, $28, $25, $44, $29, $61, $29
-        .byt  $46, $29, $29, $25, $62, $2d, $f3, $1c
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $66, $15, $d6, $18, $63, $31, $d8, $18
-        .byt  $0e, $25, $80, $35, $48, $29, $bb, $18
-        .byt  $4a, $29, $66, $2d, $4b, $29, $a3, $2d
-        .byt  $a0, $39, $f6, $20, $6a, $15, $6a, $19
-        .byt  $32, $21, $a1, $39, $a1, $41, $31, $29
-        .byt  $4e, $31, $a2, $39, $c0, $3d, $6b, $2d
-        .byt  $8a, $31, $6d, $2d, $c8, $19, $00, $42
-        .byt  $8c, $31, $e3, $3d, $ac, $19, $e3, $45
-        .byt  $ad, $15, $e3, $49, $02, $42, $e6, $2d
-        .byt  $20, $42, $ad, $35, $24, $46, $24, $4e
-        .byt  $28, $2e, $42, $46, $ee, $39, $45, $4a
-        .byt  $2a, $16, $48, $2e, $0f, $1e, $46, $56
-        .byt  $64, $4a, $44, $5e, $0f, $3e, $64, $4e
-        .byt  $65, $5a, $83, $4e, $67, $4e, $30, $42
-        .byt  $86, $4e, $32, $46, $6d, $2e, $52, $1a
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $00, $00, $00, $00, $00, $00, $00, $00
-        .byt  $8b, $22, $a5, $56, $51, $46, $ab, $1a
-        .byt  $a5, $6a, $a5, $6e, $c1, $76, $c7, $5a
-        .byt  $93, $16, $e0, $7a, $72, $4a, $cc, $26
-        .byt  $b0, $2a, $93, $4e, $e5, $7e, $e8, $5e
-        .byt  $b5, $1e, $ed, $1e, $e6, $7e, $b5, $16
-        .byt  $95, $52, $b3, $56, $b5, $56, $0a, $63
-        .byt  $2d, $1b, $29, $67, $2f, $23, $f4, $2a
-        .byt  $d6, $5a, $17, $1b, $4a, $6b, $4d, $67
-        .byt  $f7, $5e, $f8, $62, $39, $1f, $18, $63
-        .byt  $6c, $73, $78, $23, $39, $67, $7b, $1b
-        .byt  $5a, $6b, $7b, $6f, $de, $17, $9c, $73
-        .byt  $bd, $77, $ff, $13, $de, $7b, $ff, $7f
-;sprite palette 7
-        .byt  $3f, $7c, $20, $08, $84, $0c, $a5, $14
-        .byt  $08, $21, $5a, $6b, $bc, $73, $fe, $7b
-        .byt  $f7, $5e, $73, $4e, $10, $42, $42, $08
-        .byt  $00, $00, $ad, $35, $b5, $56, $6b, $2d
-
+        .byt  $1f, $74, $df, $17, $47, $15, $c3, $0c
+        .byt  $0e, $12, $7b, $13, $b9, $33, $06, $7f
+        .byt  $2c, $63, $75, $3b, $72, $4f, $93, $16
+        .byt  $aa, $15, $24, $15, $17, $13, $50, $16
+        .byt  $1f, $74, $0e, $21, $54, $29, $a6, $14
+        .byt  $7e, $14, $5a, $2d, $10, $21, $0d, $25
+        .byt  $eb, $20, $9c, $14, $99, $14, $37, $29
+        .byt  $f6, $1c, $96, $14, $d3, $1c, $f1, $1c

snes/reset.a65

@@ -39,6 +39,8 @@ NMI_ROUTINE:
 	php
 	txa
 	dec
+	dec
+	dec
 	plp
 	bne small_bar
 	asl

snes/sysinfo.a65

@@ -0,0 +1,91 @@
+#include "memmap.i65"
+
+; sysinfo.a65: display sysinfo text block
+.byt "===SHOW_SYSINFO==="
+show_sysinfo:
+	php
+	sep #$20 : .as
+	rep #$10 : .xl
+	stz bar_wl
+	dec bar_wl
+	stz bar_xl
+	dec bar_xl
+	stz bar_yl
+	dec bar_yl
+	jsr backup_screen
+	lda #^text_mm_sysinfo
+	sta window_tbank
+	ldx #!text_mm_sysinfo
+	stx window_taddr
+	lda @sysinfo_win_x
+	sta window_x
+	inc
+	inc
+	pha
+	stz print_x+1
+	lda @sysinfo_win_y
+	sta window_y
+	inc
+	inc
+	pha
+	stz print_y+1
+	lda @sysinfo_win_w
+	sta window_w
+	lda @sysinfo_win_h
+	sta window_h
+	jsr draw_window
+	stz print_pal
+sysinfo_printloop:
+	sep #$20 : .as
+	rep #$10 : .xl
+	lda #CMD_SYSINFO
+	sta @AVR_CMD
+	lda #^SYSINFO_BLK
+	ldx #!SYSINFO_BLK
+	sta print_bank
+	stx print_src
+	stz print_pal
+	pla
+	sta print_y
+	pla
+	sta print_x
+	lda #40
+	sta print_count
+	lda #13
+-	pha
+	jsr hiprint
+	inc print_y
+	rep #$20 : .al
+	lda print_src
+	clc
+	adc #40
+	sta print_src
+	sep #$20 : .as
+	pla
+	dec
+	bne -
+-	lda isr_done
+	lsr
+	bcc -
+	jsr printtime
+	jsr read_pad
+	lda #$80
+	and pad1trig
+	bne +
+	lda #$80
+	and pad1trig+1
+	bne +
+	lda @sysinfo_win_x
+	inc
+	inc
+	pha
+	lda @sysinfo_win_y
+	inc
+	inc
+	pha
+	jmp sysinfo_printloop
++	plp
+	jsr restore_screen
+	lda #$00
+	sta @AVR_CMD
+	rtl

snes/text.a65

@@ -5,6 +5,7 @@ hiprint:
 	sep #$20 : .as
 	lda print_count
 	sta print_count_tmp
+	stz print_over
 	rep #$30 : .xl : .al
 	stz print_done
 	lda print_x
@@ -120,21 +121,23 @@ print_loop2_inner
 	inx
 	lda !0,x
 	beq print_end
-	inx
-	lda !0,x
-	beq print_end
 	lda @print_count_tmp
 	dec
 	dec
 	sta @print_count_tmp
 	beq print_end
 	bmi print_end
+	inx
+	lda !0,x
+	beq print_end
 	bra print_loop2_inner
 print_end2 ; clean up the stack (6 bytes)
 	ply
 	ply
 	ply
 print_end
+	lda !0,x
+	sta @print_over
 	lda #$00
 	pha
 	plb

snes/time.a65

@@ -86,7 +86,7 @@ time_update
 	lda #$00
 	xba
 	tax
-	lda !timebox_data, x
+	lda @timebox_data, x
 	clc
 	adc #$04
 	adc @time_win_x
@@ -95,10 +95,10 @@ time_update
 	adc #$02
 	sta bar_yl
 	inx
-	lda !timebox_data, x
+	lda @timebox_data, x
 	sta bar_wl
 	inx
-	lda !timebox_data, x
+	lda @timebox_data, x
 	sta time_ptr
 timeloop1
 	lda isr_done
@@ -263,12 +263,12 @@ time_inc_day
 	lda #$00
 	xba
 	tax
-	lda !time_month, x
+	lda @time_month, x
 	cmp time_d10
 	bne time_inc_day_normal
 	inx
 	jsr is_leapyear_feb
-	lda !time_month, x
+	lda @time_month, x
 	dec
 	adc #$00
 	cmp time_d1
@@ -309,13 +309,13 @@ time_adjust_mon
 	xba
 	tax
 	lda time_d10
-	cmp !time_month, x
+	cmp @time_month, x
 	bcs time_mon_adjust
 	rts
 time_mon_adjust
 	php
 	inx
-	lda !time_month, x
+	lda @time_month, x
 	pha
 	jsr is_leapyear_feb	; c=1 -> a leapyear february
 	pla
@@ -327,7 +327,7 @@ time_mon_adjust
 time_mon_doadjust
 	sta time_d1
 	dex
-	lda !time_month, x
+	lda @time_month, x
 	sta time_d10
 +
 	rts
@@ -446,10 +446,10 @@ time_dec_cont
 	asl
 	ldx #$0000
 	tax
-	lda !time_month, x
+	lda @time_month, x
 	sta time_d10
 	inx
-	lda !time_month, x
+	lda @time_month, x
 	pha
 	jsr is_leapyear_feb
 	pla
@@ -710,8 +710,6 @@ printtime:
         lda listdisp
         clc
         adc #$0a
-        clc
-        adc vidmode
         sta print_y
         lda #$2b
         sta print_x

src/Makefile

@@ -55,7 +55,7 @@ TARGET = $(OBJDIR)/sd2snes
 
 
 # List C source files here. (C dependencies are automatically generated.)
-SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c crc32.c cic.c cli.c xmodem.c irq.c rle.c sdnative.c msu1.c crc16.c sysinfo.c
+SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c crc32.c cic.c cli.c xmodem.c irq.c rle.c sdnative.c msu1.c crc16.c sysinfo.c cfg.c
 
 # usbcontrol.c usb_hid.c usbhw_lpc.c usbinit.c usbstdreq.c
 
@@ -117,6 +117,7 @@ endif
 # CC must be defined here to generate the correct CFLAGS
 SHELL = sh
 CC = $(ARCH)-gcc
+#CC = clang
 OBJCOPY = $(ARCH)-objcopy
 OBJDUMP = $(ARCH)-objdump
 SIZE = $(ARCH)-size
@@ -125,7 +126,6 @@ REMOVE = rm -f
 COPY = cp
 AWK = awk
 
-
 #---------------- Compiler Options ----------------
 #  -g*:          generate debugging information
 #  -O*:          optimization level
@@ -138,8 +138,10 @@ CFLAGS += $(CDEFS) $(CINCS)
 CFLAGS += -O$(OPT)
 CFLAGS += $(CPUFLAGS) -nostartfiles
 #CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
-CFLAGS += -Wall -Wstrict-prototypes -Werror
+CFLAGS += -Wall -Wstrict-prototypes
+#-Werror
 CFLAGS += -Wa,-adhlns=$(OBJDIR)/$(<:.c=.lst)
+#CFLAGS += -I/opt/arm-none-eabi-4.6.2/arm-none-eabi/include/
 CFLAGS += -I$(OBJDIR)
 CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
 CFLAGS += $(CSTANDARD)

src/bootldr/baudcalc.c

@@ -0,0 +1,80 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include "config.h"
+
+static uint8_t uart_lookupratio(float f_fr) {
+  uint16_t errors[72]={0,67,71,77,83,91,100,111,125,
+                       133,143,154,167,182,200,214,222,231,
+                       250,267,273,286,300,308,333,357,364,
+                       375,385,400,417,429,444,455,462,467,
+                       500,533,538,545,556,571,583,600,615,
+                       625,636,643,667,692,700,714,727,733,
+                       750,769,778,786,800,818,833,846,857,
+                       867,875,889,900,909,917,923,929,933};
+
+  uint8_t ratios[72]={0x10,0xf1,0xe1,0xd1,0xc1,0xb1,0xa1,0x91,0x81,
+                      0xf2,0x71,0xd2,0x61,0xb2,0x51,0xe3,0x92,0xd3,
+                      0x41,0xf4,0xb3,0x72,0xa3,0xd4,0x31,0xe5,0xb4,
+                      0x83,0xd5,0x52,0xc5,0x73,0x94,0xb5,0xd6,0xf7,
+                      0x21,0xf8,0xd7,0xb6,0x95,0x74,0xc7,0x53,0xd8,
+                      0x85,0xb7,0xe9,0x32,0xd9,0xa7,0x75,0xb8,0xfb,
+                      0x43,0xda,0x97,0xeb,0x54,0xb9,0x65,0xdb,0x76,
+                      0xfd,0x87,0x98,0xa9,0xba,0xcb,0xdc,0xed,0xfe};
+
+  int fr = (f_fr-1)*1000;
+  int i=0, i_result=0;
+  int err=0, lasterr=1000;
+  for(i=0; i<72; i++) {
+    if(fr<errors[i]) {
+      err=errors[i]-fr;
+    } else {
+      err=fr-errors[i];
+    }
+    if(err<lasterr) {
+      i_result=i;
+      lasterr=err;
+    }
+  }
+  return ratios[i_result];
+}
+static uint32_t baud2divisor(unsigned int baudrate) {
+  uint32_t int_ratio;
+  uint32_t error;
+  uint32_t dl=0;
+  float f_ratio;
+  float f_fr;
+  float f_dl;
+  float f_pclk = (float)CONFIG_CPU_FREQUENCY / CONFIG_UART_PCLKDIV;
+  uint8_t fract_ratio;
+  f_ratio=(f_pclk / 16 / baudrate);
+  int_ratio = (int)f_ratio;
+  error=(f_ratio*1000)-(int_ratio*1000);
+  if(error>990) {
+    int_ratio++;
+  } else if(error>10) {
+    f_fr=1.5;
+    f_dl=f_pclk / (16 * baudrate * (f_fr));
+    dl = (int)f_dl;
+    f_fr=f_pclk / (16 * baudrate * dl);
+    fract_ratio = uart_lookupratio(f_fr);
+  }
+  if(!dl) {
+    return int_ratio;
+  } else {
+    return ((fract_ratio<<16)&0xff0000) | dl;
+  }
+}
+
+int main(int argc, char *argv[])
+{
+   if (argc != 2)
+   {
+      printf("usage: %s baud\n", argv[0]);
+      return -1;
+   }
+      
+   printf("Baud %d : 0x%X\n", atoi(argv[1]), baud2divisor(atoi(argv[1])));
+
+   return 0;
+}

src/bootldr/conf2h.awk

@@ -4,7 +4,7 @@
 # file to a C header. No copyright claimed.
 
 BEGIN {
-  print "// autoconf.h generated from " ARGV[1] " at " strftime() "\n" \
+  print "// autoconf.h generated from " ARGV[1] " at TODAY \n" \
     "#ifndef AUTOCONF_H\n" \
     "#define AUTOCONF_H"
 }

src/bootldr/config.h

@@ -1,7 +1,7 @@
 #ifndef _CONFIG_H
 #define _CONFIG_H
 
-//#define DEBUG_BL
+// #define DEBUG_BL
 // #define DEBUG_SD
 // #define DEBUG_IRQ
 
@@ -56,6 +56,7 @@
 #define CONFIG_UART_PCLKDIV       1
 #define CONFIG_UART_TX_BUF_SHIFT  8
 #define CONFIG_UART_BAUDRATE      921600
+//#define CONFIG_UART_BAUDRATE      115200
 #define CONFIG_UART_DEADLOCKABLE
 
 #define SSP_CLK_DIVISOR_FAST 2

src/bootldr/fileops.h

@@ -31,7 +31,9 @@
 
 enum filestates { FILE_OK=0, FILE_ERR, FILE_EOF };
 
-BYTE file_buf[512];
+#define GCC_ALIGN_WORKAROUND __attribute__ ((aligned(4)))
+BYTE file_buf[512] GCC_ALIGN_WORKAROUND;
+
 FATFS fatfs;
 FIL file_handle;
 FRESULT file_res;

src/bootldr/main.c

@@ -23,7 +23,7 @@ int i;
 volatile enum diskstates disk_state;
 extern volatile tick_t ticks;
 
-int (*chain)(void) = (void*)(FW_START+0x000001c5);
+int (*chain)(void);
 
 int main(void) {
   SNES_CIC_PAIR_REG->FIODIR = BV(SNES_CIC_PAIR_BIT);
@@ -86,6 +86,16 @@ DBG_BL printf("PCONP=%lx\n", LPC_SC->PCONP);
   NVIC_DisableIRQ(UART_IRQ);
 
   SCB->VTOR=FW_START+0x00000100;
+  chain = (void*)(*((uint32_t*)(FW_START+0x00000104)));
+  uart_putc("0123456789abcdef"[((uint32_t)chain>>28)&15]);
+  uart_putc("0123456789abcdef"[((uint32_t)chain>>24)&15]);
+  uart_putc("0123456789abcdef"[((uint32_t)chain>>20)&15]);
+  uart_putc("0123456789abcdef"[((uint32_t)chain>>16)&15]);
+  uart_putc("0123456789abcdef"[((uint32_t)chain>>12)&15]);
+  uart_putc("0123456789abcdef"[((uint32_t)chain>>8)&15]);
+  uart_putc("0123456789abcdef"[((uint32_t)chain>>4)&15]);
+  uart_putc("0123456789abcdef"[((uint32_t)chain)&15]);
+  uart_putc('\n');
   chain();
   while(1);
 }

src/bootldr/openocd-usb.cfg

@@ -5,8 +5,14 @@
 #
 
 interface ft2232
-ft2232_vid_pid 0x0403 0x6010
-ft2232_device_desc "Dual RS232"
-ft2232_layout "oocdlink"
-ft2232_latency 2
+ft2232_vid_pid 0x15ba 0x0003
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout "olimex-jtag"
+
+
+#interface ft2232
+#ft2232_vid_pid 0x0403 0x6010
+#ft2232_device_desc "Dual RS232"
+#ft2232_layout "oocdlink"
+#ft2232_latency 2
 #adapter_khz 10

src/bootldr/uart.c

@@ -119,7 +119,7 @@ void uart_init(void) {
 
   /* set baud rate - no fractional stuff for now */
   UART_REGS->LCR = BV(7) | 3; // always 8n1
-  div = 0x850004; // baud2divisor(CONFIG_UART_BAUDRATE);
+  div = 0xF80022; //0x850004; // baud2divisor(CONFIG_UART_BAUDRATE);
 
   UART_REGS->DLL = div & 0xff;
   UART_REGS->DLM = (div >> 8) & 0xff;

src/cfg.c

@@ -0,0 +1,59 @@
+#include "cfg.h"
+#include "config.h"
+#include "uart.h"
+#include "fileops.h"
+
+cfg_t CFG = {
+  .cfg_ver_maj = 1,
+  .cfg_ver_min = 0,
+  .last_game_valid = 0,
+  .vidmode_menu = VIDMODE_AUTO,
+  .vidmode_game = VIDMODE_AUTO,
+  .pair_mode_allowed = 0,
+  .bsx_use_systime = 0,
+  .bsx_time = 0x0619970301180530LL
+};
+
+int cfg_save() {
+  int err = 0;
+  file_open(CFG_FILE, FA_CREATE_ALWAYS | FA_WRITE);
+  if(file_writeblock(&CFG, 0, sizeof(CFG)) < sizeof(CFG)) {
+    err = file_res;
+  }
+  file_close();
+  return err;
+}
+
+int cfg_load() {
+  int err = 0;
+  file_open(CFG_FILE, FA_READ);
+  if(file_readblock(&CFG, 0, sizeof(CFG)) < sizeof(CFG)) {
+    err = file_res;
+  }
+  file_close();
+  return err;
+}
+
+int cfg_save_last_game(uint8_t *fn) {
+  int err = 0;
+  file_open(LAST_FILE, FA_CREATE_ALWAYS | FA_WRITE);
+  err = f_puts((const TCHAR*)fn, &file_handle);
+  file_close();
+  return err;
+}
+
+int cfg_get_last_game(uint8_t *fn) {
+  int err = 0;
+  file_open(LAST_FILE, FA_READ);
+  f_gets((TCHAR*)fn, 255, &file_handle);
+  file_close();
+  return err;
+}
+
+void cfg_set_last_game_valid(uint8_t valid) {
+  CFG.last_game_valid = valid;
+}
+
+uint8_t cfg_is_last_game_valid() {
+  return CFG.last_game_valid;
+}

src/cfg.h

@@ -0,0 +1,39 @@
+#ifndef _CFG_H
+#define _CFG_H
+
+#include <stdint.h>
+
+#define CFG_FILE ((const uint8_t*)"/sd2snes/sd2snes.cfg")
+#define LAST_FILE ((const uint8_t*)"/sd2snes/lastgame.cfg")
+
+typedef enum {
+  VIDMODE_AUTO = 0,
+  VIDMODE_60,
+  VIDMODE_50
+} cfg_vidmode_t;
+
+typedef struct _cfg_block {
+  uint8_t cfg_ver_maj;
+  uint8_t cfg_ver_min;
+  uint8_t last_game_valid;
+  uint8_t vidmode_menu;
+  uint8_t vidmode_game;
+  uint8_t pair_mode_allowed;
+  uint8_t bsx_use_systime;
+  uint64_t bsx_time;
+} cfg_t;
+
+int cfg_save(void);
+int cfg_load(void);
+
+int cfg_save_last_game(uint8_t *fn);
+int cfg_get_last_game(uint8_t *fn);
+
+cfg_vidmode_t cfg_get_vidmode_menu(void);
+cfg_vidmode_t cfg_get_vidmode_game(void);
+
+void cfg_set_last_game_valid(uint8_t);
+uint8_t cfg_is_last_game_valid(void);
+uint8_t cfg_is_pair_mode_allowed(void);
+
+#endif

src/cli.c

@@ -58,8 +58,8 @@ static char *curchar;
 
 /* Word lists */
 static char command_words[] =
-  "cd\0reset\0sreset\0dir\0ls\0test\0resume\0loadrom\0loadraw\0saveraw\0put\0rm\0d4\0vmode\0mapper\0settime\0time\0setfeature\0hexdump\0w8\0w16\0";
-enum { CMD_CD = 0, CMD_RESET, CMD_SRESET, CMD_DIR, CMD_LS, CMD_TEST, CMD_RESUME, CMD_LOADROM, CMD_LOADRAW, CMD_SAVERAW, CMD_PUT, CMD_RM, CMD_D4, CMD_VMODE, CMD_MAPPER, CMD_SETTIME, CMD_TIME, CMD_SETFEATURE, CMD_HEXDUMP, CMD_W8, CMD_W16 };
+  "cd\0reset\0sreset\0dir\0ls\0test\0resume\0loadrom\0loadraw\0saveraw\0put\0rm\0d4\0vmode\0mapper\0settime\0time\0setfeature\0hexdump\0w8\0w16\0stramtest\0";
+enum { CMD_CD = 0, CMD_RESET, CMD_SRESET, CMD_DIR, CMD_LS, CMD_TEST, CMD_RESUME, CMD_LOADROM, CMD_LOADRAW, CMD_SAVERAW, CMD_PUT, CMD_RM, CMD_D4, CMD_VMODE, CMD_MAPPER, CMD_SETTIME, CMD_TIME, CMD_SETFEATURE, CMD_HEXDUMP, CMD_W8, CMD_W16, CMD_SRAMTEST };
 
 /* ------------------------------------------------------------------------- */
 /*   Parse functions                                                         */
@@ -416,6 +416,10 @@ void cmd_w16(void) {
   sram_writeshort(val, offset);
 }
 
+void cmd_sramtest(void) {
+   sram_memtest();
+}
+
 /* ------------------------------------------------------------------------- */
 /*   CLI interface functions                                                 */
 /* ------------------------------------------------------------------------- */
@@ -424,7 +428,7 @@ void cli_init(void) {
 }
 
 void cli_entrycheck() {
-  if(uart_gotc() && uart_getc() == 27) {
+  if(uart_gotc() && ((uart_getc() == 27) || (uart_getc() == 13))) {
     printf("*** BREAK\n");
     cli_loop();
   }
@@ -561,7 +565,10 @@ void cli_loop(void) {
     case CMD_W16:
       cmd_w16();
       break;
+    
+    case CMD_SRAMTEST:
+      cmd_sramtest();
+      break;
     }
-
   }
 }

src/conf2h.awk

@@ -4,7 +4,7 @@
 # file to a C header. No copyright claimed.
 
 BEGIN {
-  print "// autoconf.h generated from " ARGV[1] " at " strftime() "\n" \
+  print "// autoconf.h generated from " ARGV[1] " at TODAY\n" \
     "#ifndef AUTOCONF_H\n" \
     "#define AUTOCONF_H"
 }

src/config

@@ -1,4 +1,4 @@
-CONFIG_VERSION="0.1.2"
-#FWVER=00010200
-CONFIG_FWVER=66048
+CONFIG_VERSION="0.1.30"
+#FWVER=00010300
+CONFIG_FWVER=66305
 CONFIG_MCU_FOSC=12000000

src/config.h

@@ -39,7 +39,8 @@
 //#define CONFIG_CPU_FREQUENCY      46000000
 #define CONFIG_UART_PCLKDIV       1
 #define CONFIG_UART_TX_BUF_SHIFT  8
-#define CONFIG_UART_BAUDRATE      921600
+//#define CONFIG_UART_BAUDRATE      921600
+#define CONFIG_UART_BAUDRATE      115200
 #define CONFIG_UART_DEADLOCKABLE
 
 #define SSP_CLK_DIVISOR_FAST 2

src/ffconf.h

@@ -36,7 +36,7 @@
 /   3: f_lseek is removed in addition to 2. */
 
 
-#define	_USE_STRFUNC	0	/* 0:Disable or 1/2:Enable */
+#define	_USE_STRFUNC	1	/* 0:Disable or 1/2:Enable */
 /* To enable string functions, set _USE_STRFUNC to 1 or 2. */
 
 

src/fileops.c

@@ -55,7 +55,7 @@ void file_open_by_filinfo(FILINFO* fno) {
   file_res = l_openfilebycluster(&fatfs, &file_handle, (TCHAR*)"", fno->clust, fno->fsize);
 }
 
-void file_open(uint8_t* filename, BYTE flags) {
+void file_open(const uint8_t* filename, BYTE flags) {
   if (disk_state == DISK_CHANGED) {
     file_reinit();
     newcard = 1;

src/fileops.h

@@ -40,7 +40,7 @@ uint16_t file_block_off, file_block_max;
 enum filestates file_status;
 
 void file_init(void);
-void file_open(uint8_t* filename, BYTE flags);
+void file_open(const uint8_t* filename, BYTE flags);
 FRESULT dir_open_by_filinfo(DIR* dir, FILINFO* fno_param);
 void file_open_by_filinfo(FILINFO* fno);
 void file_close(void);

src/filetypes.c

@@ -100,7 +100,7 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
       if(next_subdir_tgt > dir_end) {
         dir_end = next_subdir_tgt;
       }
-//      printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt);
+      DBG_FS printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt);
       if(mkdb) {
 //        printf("d=%d Saving %lx to Address %lx  [end]\n", depth, 0L, next_subdir_tgt - 4);
         sram_writelong(0L, next_subdir_tgt - 4);
@@ -251,7 +251,7 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
       }
     } else uart_putc(0x30+res);
   }
-//  printf("db_tgt=%lx dir_end=%lx\n", db_tgt, dir_end);
+  DBG_FS printf("db_tgt=%lx dir_end=%lx\n", db_tgt, dir_end);
   sram_writelong(db_tgt, SRAM_DB_ADDR+4);
   sram_writelong(dir_end, SRAM_DB_ADDR+8);
   sram_writeshort(num_files_total, SRAM_DB_ADDR+12);

src/fpga.c

@@ -102,6 +102,10 @@ void fpga_pgm(uint8_t* filename) {
     i=0;
     timeout = getticks() + 100;
     fpga_set_prog_b(0);
+if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
+  printf("PROGB is stuck high!\n");
+  led_panic();
+}
     uart_putc('P');
     fpga_set_prog_b(1);
     while(!fpga_get_initb()){
@@ -110,18 +114,22 @@ void fpga_pgm(uint8_t* filename) {
         led_panic();
       }
     };
+    if(fpga_get_done()) {
+      printf("DONE is stuck high!\n");
+      led_panic();
+    }
     LPC_GPIO2->FIOMASK1 = ~(BV(0));
-    uart_putc('p');
+    //uart_putc('p');
 
 
     /* open configware file */
     file_open(filename, FA_READ);
     if(file_res) {
-      uart_putc('?');
-      uart_putc(0x30+file_res);
+      //uart_putc('?');
+      //uart_putc(0x30+file_res);
       return;
     }
-    uart_putc('C');
+    //uart_putc('C');
 
     for (;;) {
       data = rle_file_getc();
@@ -129,16 +137,16 @@ void fpga_pgm(uint8_t* filename) {
       if (file_status || file_res) break;   /* error or eof */
       FPGA_SEND_BYTE_SERIAL(data);
     }
-    uart_putc('c');
+    //uart_putc('c');
     file_close();
-    printf("fpga_pgm: %d bytes programmed\n", i);
+    printf("%s: %d bytes programmed\n", __func__, i);
     delay_ms(1);
   } while (!fpga_get_done() && retries--);
   if(!fpga_get_done()) {
     printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
     led_panic();
   }
-  printf("FPGA configured\n");
+  printf("%s: FPGA configured\n", __func__);
   fpga_postinit();
 }
 
@@ -152,7 +160,7 @@ void fpga_rompgm() {
     i=0;
     timeout = getticks() + 100;
     fpga_set_prog_b(0);
-    uart_putc('P');
+    //uart_putc('P');
     fpga_set_prog_b(1);
     while(!fpga_get_initb()){
       if(getticks() > timeout) {
@@ -160,27 +168,31 @@ void fpga_rompgm() {
         led_panic();
       }
     };
+    if(fpga_get_done()) {
+      printf("DONE is stuck high!\n");
+      led_panic();
+    }
     LPC_GPIO2->FIOMASK1 = ~(BV(0));
-    uart_putc('p');
+    //uart_putc('p');
 
     /* open configware file */
     rle_mem_init(cfgware, sizeof(cfgware));
-    printf("sizeof(cfgware) = %d\n", sizeof(cfgware));
+    //printf("sizeof(cfgware) = %d\n", sizeof(cfgware));
     for (;;) {
       data = rle_mem_getc();
       if(rle_state) break;
       i++;
       FPGA_SEND_BYTE_SERIAL(data);
     }
-    uart_putc('c');
-    printf("fpga_pgm: %d bytes programmed\n", i);
+    //uart_putc('c');
+    printf("%s: %d bytes programmed\n", __func__, i);
     delay_ms(1);
   } while (!fpga_get_done() && retries--);
   if(!fpga_get_done()) {
     printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
     led_panic();
   }
-  printf("FPGA configured\n");
+  printf("%s: FPGA configured\n", __func__);
   fpga_postinit();
 }
 

src/led.c

@@ -86,13 +86,16 @@ void toggle_write_led() {
 }
 
 void led_panic() {
+  led_std();
   while(1) {
-    LPC_GPIO2->FIODIR |= BV(4) | BV(5);
-    LPC_GPIO1->FIODIR |= BV(23);
-    delay_ms(350);
-    LPC_GPIO2->FIODIR &= ~(BV(4) | BV(5));
-    LPC_GPIO1->FIODIR &= ~BV(23);
-    delay_ms(350);
+    rdyled(1);
+    readled(1);
+    writeled(1);
+    delay_ms(100);
+    rdyled(0);
+    readled(0);
+    writeled(0);
+    delay_ms(100);
     cli_entrycheck();
   }
 }

src/main.c

@@ -27,6 +27,7 @@
 #include "msu1.h"
 #include "rtc.h"
 #include "sysinfo.h"
+#include "cfg.h"
 
 #define EMC0TOGGLE	(3<<4)
 #define MR0R		(1<<1)
@@ -45,271 +46,363 @@ extern volatile tick_t ticks;
 extern snes_romprops_t romprops;
 extern volatile int reset_changed;
 
+extern volatile cfg_t CFG;
+
 enum system_states {
-  SYS_RTC_STATUS = 0
+  SYS_RTC_STATUS = 0,
+  SYS_LAST_STATUS = 1
 };
 
-int main(void) {
-  LPC_GPIO2->FIODIR = BV(4) | BV(5);
-  LPC_GPIO1->FIODIR = BV(23) | BV(SNES_CIC_PAIR_BIT);
-  BITBAND(SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT) = 1;
-  LPC_GPIO0->FIODIR = BV(16);
+int main(void)
+{
+   /* Start by initial configuration, needed in all cases */
+   LPC_GPIO2->FIODIR = BV(4) | BV(5);
+   LPC_GPIO1->FIODIR = BV(23) | BV(SNES_CIC_PAIR_BIT);
+   BITBAND(SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT) = 1;
+   LPC_GPIO0->FIODIR = BV(16);
 
- /* connect UART3 on P0[25:26] + SSP0 on P0[15:18] + MAT3.0 on P0[10] */
-  LPC_PINCON->PINSEL1 = BV(18) | BV(19) | BV(20) | BV(21) /* UART3 */
-                      | BV(3) | BV(5);                    /* SSP0 (FPGA) except SS */
-  LPC_PINCON->PINSEL0 = BV(31);                            /* SSP0 */
-/*                      | BV(13) | BV(15) | BV(17) | BV(19)  SSP1 (SD) */
+   /* connect UART3 on P0[25:26] + SSP0 on P0[15:18] + MAT3.0 on P0[10] */
+   LPC_PINCON->PINSEL1 = BV(18) | BV(19) | BV(20) | BV(21) /* UART3 */
+                       | BV(3) | BV(5);                    /* SSP0 (FPGA) except SS */
+   LPC_PINCON->PINSEL0 = BV(31);                            /* SSP0 */
+   /*                      | BV(13) | BV(15) | BV(17) | BV(19)  SSP1 (SD) */
 
- /* pull-down CIC data lines */
-  LPC_PINCON->PINMODE0 = BV(0) | BV(1) | BV(2) | BV(3);
+   /* pull-down CIC data lines */
+   LPC_PINCON->PINMODE0 = BV(0) | BV(1) | BV(2) | BV(3);
 
-  clock_disconnect();
-  snes_init();
-  snes_reset(1);
-  power_init();
-  timer_init();
-  uart_init();
-  fpga_spi_init();
-  spi_preinit();
-  led_init();
- /* do this last because the peripheral init()s change PCLK dividers */
-  clock_init();
-  LPC_PINCON->PINSEL0 |= BV(20) | BV(21);                  /* MAT3.0 (FPGA clock) */
-led_pwm();
-  sdn_init();
-  printf("\n\nsd2snes mk.2\n============\nfw ver.: " CONFIG_VERSION "\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
-printf("PCONP=%lx\n", LPC_SC->PCONP);
+   clock_disconnect();
+   /* First init all SNES functions */
+   snes_init();
+   snes_reset(1); /* Maintain RESET UP, to prevent SNES to start */
 
-  file_init();
-  cic_init(0);
-/* setup timer (fpga clk) */
-  LPC_TIM3->CTCR=0;
-  LPC_TIM3->EMR=EMC0TOGGLE;
-  LPC_TIM3->MCR=MR0R;
-  LPC_TIM3->MR0=1;
-  LPC_TIM3->TCR=1;
-  fpga_init();
-  fpga_rompgm();
-  sram_writebyte(0, SRAM_CMD_ADDR);
-  while(1) {
-    if(disk_state == DISK_CHANGED) {
-      sdn_init();
-      newcard = 1;
-    }
-    load_bootrle(SRAM_MENU_ADDR);
-    set_saveram_mask(0x1fff);
-    set_rom_mask(0x3fffff);
-    set_mapper(0x7);
-    snes_reset(0);
-    while(get_cic_state() == CIC_FAIL) {
-      rdyled(0);
+   /* Init all other parts */
+   power_init();
+   timer_init();
+   uart_init();
+   fpga_spi_init();
+   spi_preinit();
+   led_init();
+
+   /* do this last because the peripheral init()s change PCLK dividers */
+   clock_init();
+
+   LPC_PINCON->PINSEL0 |= BV(20) | BV(21);                  /* MAT3.0 (FPGA clock) */
+   led_pwm();
+   sdn_init();
+
+   /* Banner */
+   printf("\n\nsd2snes mk.2\n============\nfw ver.: " CONFIG_VERSION "\nfwver: %d\ncpu clock: %d Hz\n", CONFIG_FWVER, CONFIG_CPU_FREQUENCY);
+   printf("PCONP=%lx\n", LPC_SC->PCONP);
+
+   file_init();
+   cic_init(0);
+
+   /* FPGA Initialisation */
+   /* setup timer (fpga clk) */
+   LPC_TIM3->CTCR = 0;
+   LPC_TIM3->EMR  = EMC0TOGGLE;
+   LPC_TIM3->MCR  = MR0R;
+   LPC_TIM3->MR0  = 1;
+   LPC_TIM3->TCR  = 1;
+   fpga_init();
+   fpga_rompgm();
+
+   sram_writebyte(0, SRAM_CMD_ADDR);
+
+   /* Should test SRAM here */
+ 
+
+   while(1)
+   {
+      if(disk_state == DISK_CHANGED)
+      {
+         sdn_init();
+         newcard = 1;
+      }
+
+      load_bootrle(SRAM_MENU_ADDR);
+      set_saveram_mask(0x1fff);
+      set_rom_mask(0x3fffff);
+      set_mapper(0x7);
+      
+      /* Unlock SNES */
+      snes_reset(0);
+      
+      /* Check CIC status */
+      while(get_cic_state() == CIC_FAIL)
+      {
+         rdyled(0);
+         readled(0);
+         writeled(0);
+         delay_ms(500);
+         rdyled(1);
+         readled(1);
+         writeled(1);
+         delay_ms(500);
+      }
+
+      fpga_pgm((uint8_t*)"/sd2snes/fpga_base.bit");
+      sram_memtest();
+      
+      /* some sanity checks */
+      uint8_t card_go = 0;
+      while(!card_go)
+      {
+         if(disk_status(0) & (STA_NOINIT|STA_NODISK))
+         {
+	         snes_bootprint("        No SD Card found!       \0");
+      	   while(disk_status(0) & (STA_NOINIT|STA_NODISK));
+      	   delay_ms(200);
+         }
+         file_open((uint8_t*)"/sd2snes/menu.bin", FA_READ);
+      
+         if(file_status != FILE_OK)
+         {
+         	snes_bootprint("  /sd2snes/menu.bin not found!  \0");
+         	while(disk_status(0) == RES_OK);
+         } 
+         else
+         {
+	         card_go = 1;
+         }
+         file_close();
+      }
+      snes_bootprint("           Loading ...          \0");
+      if(get_cic_state() == CIC_PAIR)
+      {
+         printf("PAIR MODE ENGAGED!\n");
+         cic_pair(CIC_NTSC, CIC_NTSC);
+      }
+      
+      rdyled(1);
       readled(0);
       writeled(0);
-      delay_ms(500);
-      rdyled(1);
-      readled(1);
-      writeled(1);
-      delay_ms(500);
-    }
-    /* some sanity checks */
-    uint8_t card_go = 0;
-    while(!card_go) {
-      if(disk_status(0) & (STA_NOINIT|STA_NODISK)) {
-	snes_bootprint("        No SD Card found!       \0");
-	while(disk_status(0) & (STA_NOINIT|STA_NODISK));
-	delay_ms(200);
+
+      cfg_load();
+      cfg_save();
+      
+      sram_writebyte(cfg_is_last_game_valid(), SRAM_STATUS_ADDR+SYS_LAST_STATUS);
+      cfg_get_last_game(file_lfn);
+      sram_writeblock(strrchr((const char*)file_lfn, '/')+1, SRAM_LASTGAME_ADDR, 256);
+      
+      *fs_path=0;
+      uint32_t saved_dir_id;
+      get_db_id(&saved_dir_id);
+
+      uint32_t mem_dir_id = sram_readlong(SRAM_DIRID);
+      uint32_t mem_magic = sram_readlong(SRAM_SCRATCHPAD);
+      
+      printf("mem_magic=%lx mem_dir_id=%lx saved_dir_id=%lx\n", mem_magic, mem_dir_id, saved_dir_id);
+      
+      if((mem_magic != 0x12345678) || (mem_dir_id != saved_dir_id) || (newcard))
+      {
+         newcard = 0;
+         /* generate fs footprint (interesting files only) */
+         uint32_t curr_dir_id = scan_dir(fs_path, NULL, 0, 0);
+         printf("curr dir id = %lx\n", curr_dir_id);
+         /* files changed or no database found? */
+         if((get_db_id(&saved_dir_id) != FR_OK) || saved_dir_id != curr_dir_id)
+         {
+	         /* rebuild database */
+	         printf("saved dir id = %lx\n", saved_dir_id);
+	         snes_bootprint("     rebuilding database ...    \0");
+	         curr_dir_id = scan_dir(fs_path, NULL, 1, 0);
+         	sram_writeblock(&curr_dir_id, SRAM_DB_ADDR, 4);
+         	uint32_t endaddr, direndaddr;
+         	sram_readblock(&endaddr, SRAM_DB_ADDR+4, 4);
+         	sram_readblock(&direndaddr, SRAM_DB_ADDR+8, 4);
+         	printf("endaddr: 0x%lX dirend: 0x%lX\n", endaddr, direndaddr);
+         	snes_bootprint("       sorting database ...     \0");
+         	sort_all_dir(direndaddr);
+         	printf("done\n");
+         	snes_bootprint("        saving database ...     \0");
+         	save_sram((uint8_t*)"/sd2snes/sd2snes.db", endaddr-SRAM_DB_ADDR, SRAM_DB_ADDR);
+         	save_sram((uint8_t*)"/sd2snes/sd2snes.dir", direndaddr-(SRAM_DIR_ADDR), SRAM_DIR_ADDR);
+         	printf("done\n");
+         }
+         else
+         {
+         	printf("saved dir id = %lx\n", saved_dir_id);
+         	printf("different card, consistent db, loading db...\n");
+         	load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
+         	load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
+         }
+      
+         sram_writelong(curr_dir_id, SRAM_DIRID);
+         sram_writelong(0x12345678, SRAM_SCRATCHPAD);
       }
-      file_open((uint8_t*)"/sd2snes/menu.bin", FA_READ);
-      if(file_status != FILE_OK) {
-	snes_bootprint("  /sd2snes/menu.bin not found!  \0");
-	while(disk_status(0) == RES_OK);
-      } else {
-	card_go = 1;
+      else
+      {
+         snes_bootprint("    same card, loading db...     \0");
+         printf("same card, loading db...\n");
+         load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
+         load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
       }
-      file_close();
-    }
-    snes_bootprint("           Loading ...          \0");
-    if(get_cic_state() == CIC_PAIR) {
-      printf("PAIR MODE ENGAGED!\n");
-      cic_pair(CIC_NTSC, CIC_NTSC);
-    }
-    rdyled(1);
-    readled(0);
-    writeled(0);
 
-    *fs_path=0;
-    uint32_t saved_dir_id;
-    get_db_id(&saved_dir_id);
+#if 1
+      cli_loop();
+#endif
 
-    uint32_t mem_dir_id = sram_readlong(SRAM_DIRID);
-    uint32_t mem_magic = sram_readlong(SRAM_SCRATCHPAD);
-    printf("mem_magic=%lx mem_dir_id=%lx saved_dir_id=%lx\n", mem_magic, mem_dir_id, saved_dir_id);
-    if((mem_magic != 0x12345678) || (mem_dir_id != saved_dir_id) || (newcard)) {
-      newcard = 0;
-      /* generate fs footprint (interesting files only) */
-      uint32_t curr_dir_id = scan_dir(fs_path, NULL, 0, 0);
-      printf("curr dir id = %lx\n", curr_dir_id);
-      /* files changed or no database found? */
-      if((get_db_id(&saved_dir_id) != FR_OK)
-	|| saved_dir_id != curr_dir_id) {
-	/* rebuild database */
-	printf("saved dir id = %lx\n", saved_dir_id);
-	printf("rebuilding database...");
-	snes_bootprint("     rebuilding database ...    \0");
-	curr_dir_id = scan_dir(fs_path, NULL, 1, 0);
-	sram_writeblock(&curr_dir_id, SRAM_DB_ADDR, 4);
-	uint32_t endaddr, direndaddr;
-	sram_readblock(&endaddr, SRAM_DB_ADDR+4, 4);
-	sram_readblock(&direndaddr, SRAM_DB_ADDR+8, 4);
-	printf("%lx %lx\n", endaddr, direndaddr);
-	printf("sorting database...");
-	snes_bootprint("       sorting database ...     \0");
-	sort_all_dir(direndaddr);
-	printf("done\n");
-	snes_bootprint("        saving database ...     \0");
-	save_sram((uint8_t*)"/sd2snes/sd2snes.db", endaddr-SRAM_DB_ADDR, SRAM_DB_ADDR);
-	save_sram((uint8_t*)"/sd2snes/sd2snes.dir", direndaddr-(SRAM_DIR_ADDR), SRAM_DIR_ADDR);
-	printf("done\n");
-      } else {
-	printf("saved dir id = %lx\n", saved_dir_id);
-	printf("different card, consistent db, loading db...\n");
-	load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
-	load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
+      /* load menu */
+      fpga_pgm((uint8_t*)"/sd2snes/fpga_base.bit");
+      fpga_dspx_reset(1);
+
+      uart_putc('(');
+      load_rom((uint8_t*)"/sd2snes/menu.bin", SRAM_MENU_ADDR, 0);
+      /* force memory size + mapper */
+      set_rom_mask(0x3fffff);
+      set_mapper(0x7);
+      uart_putc(')');
+      uart_putcrlf();
+
+      sram_writebyte(0, SRAM_CMD_ADDR);
+
+      if((rtc_state = rtc_isvalid()) != RTC_OK)
+      {
+         printf("RTC invalid!\n");
+         sram_writebyte(0xff, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
+         set_bcdtime(0x20110401000000LL);
+         set_fpga_time(0x20110401000000LL);
+         invalidate_rtc();
       }
-      sram_writelong(curr_dir_id, SRAM_DIRID);
-      sram_writelong(0x12345678, SRAM_SCRATCHPAD);
-    } else {
-      snes_bootprint("    same card, loading db...     \0");
-      printf("same card, loading db...\n");
-      load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
-      load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
-    }
-    /* cli_loop(); */
-    /* load menu */
+      else
+      {
+         printf("RTC valid!\n");
+         sram_writebyte(0x00, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
+         set_fpga_time(get_bcdtime());
+      }
+      sram_memset(SRAM_SYSINFO_ADDR, 13*40, 0x20);
+      printf("SNES GO!\n");
+      snes_reset(1);
+      delay_ms(1);
+      snes_reset(0);
 
-    fpga_pgm((uint8_t*)"/sd2snes/fpga_base.bit");
-    fpga_dspx_reset(1);
-    uart_putc('(');
-    load_rom((uint8_t*)"/sd2snes/menu.bin", SRAM_MENU_ADDR, 0);
-    /* force memory size + mapper */
-    set_rom_mask(0x3fffff);
-    set_mapper(0x7);
-    uart_putc(')');
-    uart_putcrlf();
+      uint8_t cmd = 0;
+      uint64_t btime = 0;
+      uint32_t filesize=0;
+      sram_writebyte(32, SRAM_CMD_ADDR);
+      
+      printf("test sram\n");
+      while(!sram_reliable()) cli_entrycheck();
+      
+      printf("ok\n");
 
-    sram_writebyte(0, SRAM_CMD_ADDR);
-
-    if((rtc_state = rtc_isvalid()) != RTC_OK) {
-      printf("RTC invalid!\n");
-      sram_writebyte(0xff, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
-      set_bcdtime(0x20110401000000LL);
-      set_fpga_time(0x20110401000000LL);
-      invalidate_rtc();
-    } else {
-      printf("RTC valid!\n");
-      sram_writebyte(0x00, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
-      set_fpga_time(get_bcdtime());
-    }
-    sram_memset(SRAM_SYSINFO_ADDR, 13*40, 0x20);
-    printf("SNES GO!\n");
-    snes_reset(1);
-    delay_ms(1);
-    snes_reset(0);
-
-    uint8_t cmd = 0;
-    uint64_t btime = 0;
-    uint32_t filesize=0;
-    sram_writebyte(32, SRAM_CMD_ADDR);
-    printf("test sram\n");
-    while(!sram_reliable()) cli_entrycheck();
-    printf("ok\n");
 //while(1) {
 //  delay_ms(1000);
 //  printf("Estimated SNES master clock: %ld Hz\n", get_snes_sysclk());
 //}
   //sram_hexdump(SRAM_DB_ADDR, 0x200);
   //sram_hexdump(SRAM_MENU_ADDR, 0x400);
-    while(!cmd) {
-      cmd=menu_main_loop();
-      printf("cmd: %d\n", cmd);
-      uart_putc('-');
-      switch(cmd) {
-	case SNES_CMD_LOADROM:
-	  get_selected_name(file_lfn);
-	  printf("Selected name: %s\n", file_lfn);
-	  filesize = load_rom(file_lfn, SRAM_ROM_ADDR, LOADROM_WITH_SRAM | LOADROM_WITH_RESET);
-	  break;
-	case SNES_CMD_SETRTC:
-          /* get time from RAM */
-          btime = sram_gettime(SRAM_PARAM_ADDR);
-          /* set RTC */
-          set_bcdtime(btime);
-          set_fpga_time(btime);
-	  cmd=0; /* stay in menu loop */
-	  break;
-        case SNES_CMD_SYSINFO:
-          /* go to sysinfo loop */
-          sysinfo_loop();
-          cmd=0; /* stay in menu loop */
-          break;
-	default:
-	  printf("unknown cmd: %d\n", cmd);
-	  cmd=0; /* unknown cmd: stay in loop */
-	  break;
-      }
-    }
-    printf("cmd was %x, going to snes main loop\n", cmd);
 
-    if(romprops.has_msu1 && msu1_loop()) {
-      prepare_reset();
-      continue;
-    }
+      while(!cmd)
+      {
+         cmd=menu_main_loop();
+         printf("cmd: %d\n", cmd);
+         uart_putc('-');
+         switch(cmd)
+         {
+	      case SNES_CMD_LOADROM:
+	         get_selected_name(file_lfn);
+	         printf("Selected name: %s\n", file_lfn);
+            cfg_save_last_game(file_lfn);
+            cfg_set_last_game_valid(1);
+            cfg_save();
+	         filesize = load_rom(file_lfn, SRAM_ROM_ADDR, LOADROM_WITH_SRAM | LOADROM_WITH_RESET);
+	         break;
 
-    cmd=0;
-    uint8_t snes_reset_prev=0, snes_reset_now=0, snes_reset_state=0;
-    uint16_t reset_count=0;
-    while(fpga_test() == FPGA_TEST_TOKEN) {
-      cli_entrycheck();
-      sleep_ms(250);
-      sram_reliable();
-      printf("%s ", get_cic_statename(get_cic_state()));
-      if(reset_changed) {
-        printf("reset\n");
-        reset_changed = 0;
-        fpga_reset_srtc_state();
+	      case SNES_CMD_SETRTC:
+            /* get time from RAM */
+            btime = sram_gettime(SRAM_PARAM_ADDR);
+            /* set RTC */
+            set_bcdtime(btime);
+            set_fpga_time(btime);
+	         cmd=0; /* stay in menu loop */
+	         break;
+
+         case SNES_CMD_SYSINFO:
+            /* go to sysinfo loop */
+            sysinfo_loop();
+            cmd=0; /* stay in menu loop */
+            break;
+
+         case SNES_CMD_LOADLAST:
+            cfg_get_last_game(file_lfn);
+            printf("Selected name: %s\n", file_lfn);
+            filesize = load_rom(file_lfn, SRAM_ROM_ADDR, LOADROM_WITH_SRAM | LOADROM_WITH_RESET);
+            break;
+
+	      default:
+	         printf("unknown cmd: %d\n", cmd);
+	         cmd=0; /* unknown cmd: stay in loop */
+	         break;
+         }
       }
-      snes_reset_now=get_snes_reset();
-      if(snes_reset_now) {
-	if(!snes_reset_prev) {
-	  printf("RESET BUTTON DOWN\n");
-	  snes_reset_state=1;
-	  reset_count=0;
-	}
-      } else {
-	if(snes_reset_prev) {
-	  printf("RESET BUTTON UP\n");
-	  snes_reset_state=0;
-	}
+      
+      printf("cmd was %x, going to snes main loop\n", cmd);
+
+      if(romprops.has_msu1 && msu1_loop())
+      {
+         prepare_reset();
+         continue;
       }
-      if(snes_reset_state) {
-	reset_count++;
-      } else {
-	sram_reliable();
-	snes_main_loop();
+
+      cmd=0;
+      uint8_t snes_reset_prev=0, snes_reset_now=0, snes_reset_state=0;
+      uint16_t reset_count=0;
+      while(fpga_test() == FPGA_TEST_TOKEN)
+      {
+         cli_entrycheck();
+         sleep_ms(250);
+         sram_reliable();
+         printf("%s ", get_cic_statename(get_cic_state()));
+         if(reset_changed)
+         {
+            printf("reset\n");
+            reset_changed = 0;
+            fpga_reset_srtc_state();
+         }
+         snes_reset_now=get_snes_reset();
+         if(snes_reset_now)
+         {
+	         if(!snes_reset_prev)
+	         {
+	            printf("RESET BUTTON DOWN\n");
+	            snes_reset_state=1;
+	            reset_count=0;
+	         }
+         }
+         else
+         {
+	         if(snes_reset_prev)
+	         {
+	            printf("RESET BUTTON UP\n");
+	            snes_reset_state=0;
+	         }
+         }
+         if(snes_reset_state)
+         {
+         	reset_count++;
+         }
+         else
+         {
+	         sram_reliable();
+	         snes_main_loop();
+         }
+         if(reset_count>4)
+         {
+	         reset_count=0;
+            prepare_reset();
+	         break;
+         }
+         snes_reset_prev = snes_reset_now;
       }
-      if(reset_count>4) {
-	reset_count=0;
-        prepare_reset();
-	break;
+
+      /* fpga test fail: panic */
+      if(fpga_test() != FPGA_TEST_TOKEN)
+      {
+         led_panic();
       }
-      snes_reset_prev = snes_reset_now;
-    }
-    /* fpga test fail: panic */
-    if(fpga_test() != FPGA_TEST_TOKEN){
-      led_panic();
-    }
-    /* else reset */
-  }
+      /* else reset */
+   }
 }
 

src/memory.c

@@ -182,7 +182,7 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
   UINT count=0;
   tick_t ticksstart, ticks_total=0;
   ticksstart=getticks();
-  printf("%s\n", filename);
+  printf("Loading: %s\n", filename);
   file_open(filename, FA_READ);
   if(file_res) {
     uart_putc('?');
@@ -470,6 +470,99 @@ void sram_memset(uint32_t base_addr, uint32_t len, uint8_t val) {
   FPGA_DESELECT();
 }
 
+/* memtest functions */
+uint8_t memtest_checkvalue(uint8_t value)
+{
+   uint8_t ret = 0;
+   uint32_t idx, lasterr = 0, errwas = 0, errcount = 0;
+   uint8_t data;
+   set_saveram_mask(0x0);
+   set_rom_mask(0x0);
+   printf("%s: Set memory to 0x%02X...\n", __func__, value);
+   sram_memset(0x00000, 0x1000000, value);
+   printf("Checking... [");
+   
+   set_mcu_addr(0x0);
+   
+   FPGA_SELECT();
+   FPGA_WAIT_RDY();
+   FPGA_TX_BYTE(0x88);
+   for(idx = 0; idx < 0x1000000; idx++)
+   {
+      FPGA_WAIT_RDY();
+      data = FPGA_RX_BYTE();
+      if ((idx % 0x100000) == 0)
+         uart_putc('.');
+
+      if ((idx % 0x10000) == 0)
+         toggle_read_led();
+
+      if (data != value)
+      {
+         //printf("%06x [%02x],", idx, data);
+         lasterr = idx;
+         errwas = data;
+         errcount++;
+         writeled(1);
+         ret = 0xFF;
+      }
+   }
+   printf("]\n");
+   if (errcount > 0)
+      printf("Found %d error(s) - last @ %x [%02x]\n", errcount, lasterr, errwas);
+
+   FPGA_DESELECT(); 
+   return ret;
+}
+
+uint8_t fpga_check(uint8_t value)
+{
+   uint8_t ret = 0, read;
+   FPGA_SELECT();
+   FPGA_WAIT_RDY();
+   FPGA_TX_BYTE(0xFF);
+   FPGA_TX_BYTE(value);
+   FPGA_TX_BYTE(value);
+   read = FPGA_RX_BYTE();
+   if (read != value)
+   {
+      printf("%02x != %02x!!\n", value, read);
+      ret = 0xFF;
+   }
+   FPGA_DESELECT();
+   return ret;
+}
+
+uint8_t sram_memtest(void)
+{
+   uint32_t ret;
+   printf("%s: Start memory test...\n", __func__);
+   writeled(0);
+   printf("Check FPGA Communication..\n");
+   printf("fpga_test   =   %02X\n", fpga_test());
+      
+   printf("fpga_status = %04X\n", fpga_status());
+   
+   ret  = fpga_check(0x00);
+   ret |= fpga_check(0xFF);
+   ret |= fpga_check(0xAA);
+   ret |= fpga_check(0x55);
+   if (ret != 0x00)
+   {
+      printf("Error communicating with FPGA...\n");
+      //return ret;
+   }
+    
+   
+    
+   ret  = memtest_checkvalue(0x00);
+   ret |= memtest_checkvalue(0xFF);
+   ret |= memtest_checkvalue(0xAA);
+   ret |= memtest_checkvalue(0x55);
+
+   return ret;
+}
+
 uint64_t sram_gettime(uint32_t base_addr) {
   set_mcu_addr(base_addr);
   FPGA_SELECT();

src/memory.h

@@ -39,7 +39,8 @@
 #define SRAM_CMD_ADDR           (0xFF1000L)
 #define SRAM_PARAM_ADDR         (0xFF1004L)
 #define SRAM_STATUS_ADDR        (0xFF1100L)
-#define SRAM_SYSINFO_ADDR       (0xFF1110L)
+#define SRAM_SYSINFO_ADDR       (0xFF1200L)
+#define SRAM_LASTGAME_ADDR      (0xFF1420L)
 #define SRAM_MENU_SAVE_ADDR     (0xFF0000L)
 #define SRAM_SCRATCHPAD         (0xFFFF00L)
 #define SRAM_DIRID              (0xFFFFF0L)
@@ -70,4 +71,6 @@ uint8_t sram_reliable(void);
 void sram_memset(uint32_t base_addr, uint32_t len, uint8_t val);
 uint64_t sram_gettime(uint32_t base_addr);
 
+uint8_t sram_memtest(void);
+
 #endif

src/openocd-usb.cfg

@@ -5,8 +5,14 @@
 #
 
 interface ft2232
-ft2232_vid_pid 0x0403 0x6010
-ft2232_device_desc "Dual RS232"
-ft2232_layout "oocdlink"
-ft2232_latency 2
+ft2232_vid_pid 0x15ba 0x0003
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout "olimex-jtag"
+
+
+#interface ft2232
+#ft2232_vid_pid 0x0403 0x6010
+#ft2232_device_desc "Dual RS232"
+#ft2232_layout "oocdlink"
+#ft2232_latency 2
 #adapter_khz 10

src/sdnative.c

@@ -12,6 +12,7 @@
 #include "fileops.h"
 #include "bits.h"
 #include "fpga_spi.h"
+#include "memory.h"
 
 #define MAX_CARDS 1
 
@@ -112,6 +113,7 @@ uint8_t cmd[6]={0,0,0,0,0,0};
 uint8_t rsp[17];
 uint8_t csd[17];
 uint8_t cid[17];
+diskinfo0_t di;
 uint8_t ccs=0;
 uint32_t rca;
 
@@ -360,7 +362,7 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
     default:
       rsplen = 6;
   }
-  if(dat && (buf==NULL)) {
+  if(dat && (buf==NULL) && !sd_offload) {
     printf("send_command_fast error: buf is null but data transfer expected.\n");
     return 0;
   }
@@ -387,7 +389,7 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
   BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 0;
 
   if(rsplen) {
-    uint32_t timeout=2000000;
+    uint32_t timeout=200000;
     /* wait for response */
     while((BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN)) && --timeout) {
       wiggle_fast_neg1();
@@ -466,8 +468,8 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
       while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
         wiggle_fast_neg1();
       }
-//printf("%ld\n", timeout);
-      DBG_SD if(!timeout) printf("timed out!\n");
+// printf("%ld\n", timeout);
+      if(!timeout) printf("timed out!\n");
       wiggle_fast_neg1(); /* eat the start bit */
       if(sd_offload) {
         if(sd_offload_partial) {
@@ -929,6 +931,7 @@ DRESULT sdn_initialize(BYTE drv) {
 
   /* record CSD for getinfo */
   cmd_slow(SEND_CSD, rca, 0, NULL, csd);
+  sdn_getinfo(drv, 0, &di);
 
   /* record CID */
   cmd_slow(SEND_CID, rca, 0, NULL, cid);
@@ -971,6 +974,7 @@ void sdn_init(void) {
   BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 1;
   BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 1;
   BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN) = 1;
+  LPC_PINCON->PINMODE0 &= ~(BV(14) | BV(15));
   LPC_GPIO2->FIOPIN0 = 0x00;
   LPC_GPIO2->FIOMASK0 = ~0xf;
 }
@@ -1057,3 +1061,55 @@ void sdn_changed() {
   }
 }
 
+/* measure sd access time */
+void sdn_gettacc(uint32_t *tacc_max, uint32_t *tacc_avg) {
+  uint32_t sec1 = 0;
+  uint32_t sec2 = 0;
+  uint32_t time, time_max = 0;
+  uint32_t time_avg = 0LL;
+  uint32_t numread = 16384;
+  int i;
+  int sec_step = di.sectorcount / numread - 1;
+  if(disk_state == DISK_REMOVED) return;
+  sdn_checkinit(0);
+  for (i=0; i < 128; i++) {
+    sd_offload_tgt=2;
+    sd_offload=1;
+    sdn_read(0, NULL, 0, 1);
+    sd_offload_tgt=2;
+    sd_offload=1;
+    sdn_read(0, NULL, i*sec_step, 1);
+  }
+  for (i=0; i < numread && sram_readbyte(SRAM_CMD_ADDR) != 0x00 && disk_state != DISK_REMOVED; i++) {
+  /* reset timer */
+    LPC_RIT->RICTRL = 0;
+    sd_offload_tgt=2;
+    sd_offload=1;
+    sdn_read(0, NULL, sec1, 2);
+    sec1 += 2;
+  /* start timer */
+    LPC_RIT->RICOUNTER = 0;
+    LPC_RIT->RICTRL = BV(RITEN);
+    sd_offload_tgt=2;
+    sd_offload=1;
+    sdn_read(0, NULL, sec2, 1);
+  /* read timer */
+    time = LPC_RIT->RICOUNTER;
+/*    sd_offload_tgt=2;
+    sd_offload=1;
+    sdn_read(0, NULL, sec2, 15);*/
+    time_avg += time/16;
+    if(time > time_max) {
+      time_max = time;
+    }
+    sec2 += sec_step;
+  }
+  time_avg = time_avg / (i+1) * 16;
+  sd_offload=0;
+  LPC_RIT->RICTRL = 0;
+  if(disk_state != DISK_REMOVED) {
+    *tacc_max = time_max/(CONFIG_CPU_FREQUENCY / 1000000)-114;
+    *tacc_avg = time_avg/(CONFIG_CPU_FREQUENCY / 1000000)-114;
+  }
+}
+

src/sdnative.h

@@ -25,6 +25,6 @@ DRESULT sdn_getinfo(BYTE drv, BYTE page, void *buffer);
 
 void    sdn_changed(void);
 uint8_t* sdn_getcid(void);
-
+void    sdn_gettacc(uint32_t *tacc_max, uint32_t *tacc_avg);
 #endif
 

src/snes.c

@@ -44,6 +44,7 @@ uint32_t saveram_crc, saveram_crc_old;
 extern snes_romprops_t romprops;
 
 volatile int reset_changed;
+volatile int reset_pressed;
 
 void prepare_reset() {
   snes_reset(1);
@@ -164,6 +165,7 @@ void get_selected_name(uint8_t* fn) {
 }
 
 void snes_bootprint(void* msg) {
+  printf("snes_boot: %s\n",msg);
   sram_writeblock(msg, SRAM_CMD_ADDR, 33);
 }
 

src/snes.h

@@ -30,6 +30,7 @@
 #define SNES_CMD_LOADROM   (1)
 #define SNES_CMD_SETRTC    (2)
 #define SNES_CMD_SYSINFO   (3)
+#define SNES_CMD_LOADLAST  (4)
 
 #define MENU_ERR_OK		(0)
 #define MENU_ERR_NODSP	(1)

src/sysinfo.c

@@ -0,0 +1,127 @@
+#include <arm/NXP/LPC17xx/LPC17xx.h>
+#include <arm/bits.h>
+#include <string.h>
+#include "config.h"
+#include "diskio.h"
+#include "ff.h"
+#include "timer.h"
+#include "uart.h"
+#include "fileops.h"
+#include "memory.h"
+#include "snes.h"
+#include "fpga.h"
+#include "fpga_spi.h"
+#include "cic.h"
+#include "sdnative.h"
+
+#include "sysinfo.h"
+
+static uint32_t sd_tacc_max, sd_tacc_avg;
+
+void sysinfo_loop() {
+  sd_tacc_max = 0;
+  sd_tacc_avg = 0;
+  while(sram_readbyte(SRAM_CMD_ADDR) != 0x00) {
+    write_sysinfo();
+    delay_ms(100);
+  }
+}
+
+void write_sysinfo() {
+  uint32_t sram_addr = SRAM_SYSINFO_ADDR;
+  char linebuf[40];
+  int len;
+  int sd_ok = 0;
+  uint8_t *sd_cid = sdn_getcid();
+  uint32_t sd_tacc_max_int = sd_tacc_max / 1000;
+  uint32_t sd_tacc_max_frac = sd_tacc_max - (sd_tacc_max_int * 1000);
+  uint32_t sd_tacc_avg_int = sd_tacc_avg / 1000;
+  uint32_t sd_tacc_avg_frac = sd_tacc_avg - (sd_tacc_avg_int * 1000);
+  uint16_t numfiles = sram_readshort(SRAM_DB_ADDR+12);
+  uint16_t numdirs = sram_readshort(SRAM_DB_ADDR+14);
+  int32_t sysclk = get_snes_sysclk();
+
+  len = snprintf(linebuf, sizeof(linebuf), "Firmware version: %s", CONFIG_VERSION);
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  if(disk_state == DISK_REMOVED) {
+    sd_tacc_max = 0;
+    sd_tacc_avg = 0;
+    len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    len = snprintf(linebuf, sizeof(linebuf), "         *** SD Card removed ***        ");
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    sd_ok = 0;
+  } else {
+    len = snprintf(linebuf, sizeof(linebuf), "SD Maker/OEM:    0x%02x, \"%c%c\"", sd_cid[1], sd_cid[2], sd_cid[3]);
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    len = snprintf(linebuf, sizeof(linebuf), "SD Product Name: \"%c%c%c%c%c\", Rev. %d.%d", sd_cid[4], sd_cid[5], sd_cid[6], sd_cid[7], sd_cid[8], sd_cid[9]>>4, sd_cid[9]&15);
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    len = snprintf(linebuf, sizeof(linebuf), "SD Serial No.:   %02x%02x%02x%02x, Mfd. %d/%02d", sd_cid[10], sd_cid[11], sd_cid[12], sd_cid[13], 2000+((sd_cid[14]&15)<<4)+(sd_cid[15]>>4), sd_cid[15]&15);
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    if(sd_tacc_max)
+      len = snprintf(linebuf, sizeof(linebuf), "SD acc. time: %ld.%03ld / %ld.%03ld ms avg/max", sd_tacc_avg_int, sd_tacc_avg_frac, sd_tacc_max_int, sd_tacc_max_frac);
+    else
+      len = snprintf(linebuf, sizeof(linebuf), "SD acc. time: measuring...  ");
+    sram_writeblock(linebuf, sram_addr, 40);
+    sram_memset(sram_addr+len, 40-len, 0x20);
+    sram_addr += 40;
+    sd_ok = 1;
+  }
+  len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  len = snprintf(linebuf, sizeof(linebuf), "CIC state: %s", get_cic_statefriendlyname(get_cic_state()));
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  if(sysclk == -1)
+    len = snprintf(linebuf, sizeof(linebuf), "SNES master clock: measuring...");
+  else
+    len = snprintf(linebuf, sizeof(linebuf), "SNES master clock: %ldHz    ", get_snes_sysclk());
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  len = snprintf(linebuf, sizeof(linebuf), "Database: %d files, %d dirs", numfiles, numdirs);
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_addr += 40;
+  len = snprintf(linebuf, sizeof(linebuf), "                                        ");
+  sram_writeblock(linebuf, sram_addr, 40);
+  sram_memset(sram_addr+len, 40-len, 0x20);
+  sram_hexdump(SRAM_SYSINFO_ADDR, 13*40);
+  if(sysclk != -1 && sd_ok)sdn_gettacc(&sd_tacc_max, &sd_tacc_avg);
+}
+

src/sysinfo.h

@@ -0,0 +1,7 @@
+#ifndef _SYSINFO_H
+#define _SYSINFO_H
+
+void write_sysinfo(void);
+void sysinfo_loop(void);
+
+#endif

src/tests/Makefile

@@ -138,7 +138,8 @@ CFLAGS += $(CDEFS) $(CINCS)
 CFLAGS += -O$(OPT)
 CFLAGS += $(CPUFLAGS) -nostartfiles
 #CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
-CFLAGS += -Wall -Wstrict-prototypes -Werror
+CFLAGS += -Wall -Wstrict-prototypes
+#-Werror
 CFLAGS += -Wa,-adhlns=$(OBJDIR)/$(<:.c=.lst)
 CFLAGS += -I$(OBJDIR)
 CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))

src/timer.c

@@ -1,6 +1,7 @@
 /* ___INGO___ */
 
 #include <arm/NXP/LPC17xx/LPC17xx.h>
+#include "power.h"
 #include "bits.h"
 #include "config.h"
 #include "timer.h"
@@ -9,14 +10,11 @@
 #include "sdnative.h"
 #include "snes.h"
 
-/* bit definitions */
-#define RITINT 0
-#define RITEN  3
-
-#define PCRIT 16
 
 extern volatile int sd_changed;
 extern volatile int reset_changed;
+extern volatile int reset_pressed;
+
 volatile tick_t ticks;
 volatile int wokefromrit;
 
@@ -35,6 +33,7 @@ void SysTick_Handler(void) {
   }
   reset_state = (reset_state << 1) | get_snes_reset() | 0xe000;
   if((reset_state == 0xf000) || (reset_state == 0xefff)) {
+    reset_pressed = (reset_state == 0xf000);
     reset_changed = 1;
   }
   sdn_changed();

src/timer.h

@@ -8,6 +8,10 @@ typedef unsigned int tick_t;
 extern volatile tick_t ticks;
 #define HZ 100
 
+/* bit definitions */
+#define RITINT 0
+#define RITEN  3
+
 /**
  * getticks - return the current system tick count
  *

utils/gentilemap.c

@@ -3,21 +3,18 @@
 
 int main(void) {
 uint16_t tile=256;
-uint16_t pad=256;
 	int i,j;
 	FILE *out;
 	if((out=fopen("tilemap", "wb"))==NULL) {
 		perror("Could not open output file 'tilemap'");
 		return 1;
 	}
-	for(i=0; i<8; i++) {
-		for(j=0; j<26; j++)	{
+	for(i=0; i<7; i++) {
+		for(j=0; j<32; j++)	{
 			fwrite(&tile, 2, 1, out);
-			tile++;			
-		}
-		for(j=26; j<32; j++) {
-			fwrite(&pad, 2, 1, out);
+			tile++;
 		}
 	}
 	fclose(out);
+	return 0;
 }

utils/palremap.c

@@ -1,6 +1,28 @@
 #include <stdio.h>
 #include <stdint.h>
 
+/* Mapping table. This table specifies the target index in the
+   output file. */
+int map_idx [120] = {
+	0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
+	0x2c, 0x2d, 0x2e, 0x2f, 0x34, 0x35, 0x36, 0x37,
+	0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+	0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b,
+	0x4c, 0x4d, 0x4e, 0x4f, 0x54, 0x55, 0x56, 0x57,
+	0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
+	0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b,
+	0x6c, 0x6d, 0x6e, 0x6f, 0x74, 0x75, 0x76, 0x77,
+	0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
+	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
+	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
+	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
+	0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+	0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf
+};
+
+
+/* remap colors in a 256 color bitmap */
 int main(int argc, char **argv) {
 	if(argc<3) {
 		fprintf(stderr, "Usage: %s <infile> <outfile>\n", argv[0]);
@@ -18,28 +40,28 @@ int main(int argc, char **argv) {
 	while(1) {
 		uint8_t c=fgetc(in);
 		if(feof(in))break;
-//		if(c>=1 && c<=48) {
-//			c+=207;
-//		}
-
-//		shift palette by 32
-//		keep color 0
-//		leave room for sprite pal 3 and 7 (176-192 and 240-255)
-		if(c) {
-			if(c>224) { // move upper colors to start
-				c-=224;
-			} else if(c==224) { // remap 224 to 32, not 0
-				c=32;
-			} else {	// shift colors, leave gap 176-191
-					// relocate 0xd0-0xdf (which would be
-					// remapped to 0x00-0x0f) to 0xb0-0xbf
-				c+=32;
-				if(c>=176) {
-					c+=16;
-					if(c<16) c=0xb0+c;
-				}
-			}
-		}
+/* new palette mapping:
+   0-31: fonts, tile stuff
+   32-35: 4bit palette 2
+   36-47: logo
+   48-51: 4bit palette 3
+   52-63: logo
+   64-67: 4bit palette 4
+   68-79: logo
+   80-83: 4bit palette 5
+   84-95: logo
+   96-99: 4bit palette 6
+   100-111: logo
+   112-115: 4bit palette 7
+   116-175: logo
+   176-191: sprites (misc overlays, cursor, etc.)
+   192-255: sprites (logo gfx overlays)
+*/
+		if(c < 120) {
+			c = map_idx[c];
+		} else {
+			c = 0;
+                }
 		fputc(c, out);
 	}
 	fclose(out);

utils/palreorder.c

@@ -1,5 +1,117 @@
 #include <stdio.h>
 #include <stdint.h>
+/* reorder entries in a palette file */
+/* map action types:
+   MA_NONE: do not map anything to this entry (constant 0000)
+   MA_LOC:  map indexed entry of local palette to this entry
+   MA_SRC:  map indexed entry of input palette to this entry
+*/
+enum map_action_type { MA_NONE = 0, MA_LOC, MA_SRC };
+
+int map_action [256] = {
+/* 0-3:   local entries (2-bit text palette 0 + 4-bit text palette 0)
+   4-7:   local entries (2-bit text palette 1)
+   8-11:  local entries (2-bit text palette 2)
+   12-15: local entries (2-bit text palette 3)
+   16-19: local entries (4-bit text palette 1 - 2-bit palette 4 not used)
+   20-23: local entries (2-bit text palette 5)
+   24-27: local entries (2-bit text palette 6)
+   28-31: local entries (2-bit text palette 7) */
+	MA_NONE, MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_LOC,
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC,	MA_LOC, MA_LOC, MA_LOC, MA_LOC,
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC,	MA_LOC, MA_LOC, MA_LOC, MA_LOC,
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC,	MA_LOC, MA_LOC, MA_LOC, MA_LOC,
+/* 32-35: local entries (4-bit text palette 2)
+   36-47: logo gfx */
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+/* 48-51: local entries (4-bit text palette 3)
+   52-63: logo */
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+/* 48-51: local entries (4-bit text palette 4 - 4-bit only spare palette)
+   52-63: logo */
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+/* 48-51: local entries (4-bit text palette 5)
+   52-63: logo */
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+/* 48-51: local entries (4-bit text palette 6)
+   52-63: logo */
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+/* 48-51: local entries (4-bit text palette 7)
+   52-175: logo */
+	MA_LOC, MA_LOC, MA_LOC, MA_LOC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+/* 176-191: sprites (reserved) */
+	MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE,
+	MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE, MA_NONE,
+/* 192-255: sprites (logo gfx overlays) */
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC,
+	MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC, MA_SRC
+};
+
+/* Mapping table. This table specifies the source index in either the
+   source palette file or the local palette, depending on the action
+   specified in the table above. */
+int map_idx [256] = {
+	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+	0x04, 0x05, 0x06, 0x07, 0x14, 0x15, 0x16, 0x17,
+	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+	0x08, 0x09, 0x0a, 0x0b, 0x00, 0x01, 0x02, 0x03,
+        0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
+        0x0c, 0x0d, 0x0e, 0x0f, 0x0c, 0x0d, 0x0e, 0x0f,
+	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+	0x10, 0x11, 0x12, 0x13, 0x18, 0x19, 0x1a, 0x1b,
+	0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
+	0x14, 0x15, 0x16, 0x17, 0x24, 0x25, 0x26, 0x27,
+	0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+	0x18, 0x19, 0x1a, 0x1b, 0x30, 0x31, 0x32, 0x33,
+	0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b,
+	0x1c, 0x1d, 0x1e, 0x1f, 0x3c, 0x3d, 0x3e, 0x3f,
+	0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+	0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
+	0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+	0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
+	0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
+	0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
+	0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+	0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
+	0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
+	0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
+	0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
+	0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
+	0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+	0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff
+};
+
+/* local palette. Basically a list of 2-bit palettes that is mirrored
+   to the 4-bit palette locations by the map above.
+   Palettes 4-7 are currently unused. */
+uint16_t local_palette [32] = {
+	0x0000, 0x7fff, 0x18c6, 0x6318, 0x0000, 0x43ff, 0x0cc6, 0x3318,
+	0x0000, 0x43f0, 0x0cc3, 0x330c, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f,
+	0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f,
+	0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f, 0x7c1f
+};
 
 int main(int argc, char **argv) {
 	if(argc<3) {
@@ -17,27 +129,22 @@ int main(int argc, char **argv) {
 	}
 	uint16_t palette_src[256];
 	uint16_t palette_tgt[256];
-	uint16_t i=0;
+	uint16_t palette_val;
+	int tgt_index;
 	fread(palette_src, 2, 256, in);
-	for(i=0; i<256; i++) {
-		uint8_t tgt_index=i;
-                if(tgt_index) {
-                        if(tgt_index>224) { // move upper colors to start
-                                tgt_index-=224;
-                        } else if(tgt_index==224) { // remap 224 to 32, not 0
-                                tgt_index=32;
-                        } else {        // shift colors, leave gap 176-191
-                                        // relocate 0xd0-0xdf (which would be
-                                        // remapped to 0x00-0x0f) to 0xb0-0xbf
-                                tgt_index+=32;
-                                if(tgt_index>=176) {
-                                        tgt_index+=16;
-                                        if(tgt_index<16) tgt_index=0xb0+tgt_index;
-                                }
-                        }
-                }
-
-		palette_tgt[tgt_index] = palette_src[i];
+	for(tgt_index=0; tgt_index<256; tgt_index++) {
+		switch(map_action[tgt_index]) {
+			case MA_LOC:
+				palette_val = local_palette[map_idx[tgt_index]];
+				break;
+			case MA_SRC:
+				palette_val = palette_src[map_idx[tgt_index]];
+				break;
+			case MA_NONE:
+			default:
+				palette_val = 0x7c1f;
+		}
+		palette_tgt[tgt_index] = palette_val;
 	}
 	fwrite(palette_tgt, 2, 256, out);
 	fclose(out);

verilog/sd2snes/ipcore_dir/dac_buf.v

@@ -1,29 +1,28 @@
 /*******************************************************************************
-*     This file is owned and controlled by Xilinx and must be used             *
-*     solely for design, simulation, implementation and creation of            *
-*     design files limited to Xilinx devices or technologies. Use              *
-*     with non-Xilinx devices or technologies is expressly prohibited          *
-*     and immediately terminates your license.                                 *
+*     This file is owned and controlled by Xilinx and must be used solely      *
+*     for design, simulation, implementation and creation of design files      *
+*     limited to Xilinx devices or technologies. Use with non-Xilinx           *
+*     devices or technologies is expressly prohibited and immediately          *
+*     terminates your license.                                                 *
 *                                                                              *
-*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"            *
-*     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                  *
-*     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION          *
-*     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION              *
-*     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                *
-*     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                  *
-*     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE         *
-*     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                 *
-*     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                  *
+*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY     *
+*     FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY     *
+*     PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE              *
+*     IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS       *
+*     MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY       *
+*     CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY        *
+*     RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY        *
+*     DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE    *
 *     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR           *
 *     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF          *
-*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS          *
-*     FOR A PARTICULAR PURPOSE.                                                *
+*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A    *
+*     PARTICULAR PURPOSE.                                                      *
 *                                                                              *
-*     Xilinx products are not intended for use in life support                 *
-*     appliances, devices, or systems. Use in such applications are            *
-*     expressly prohibited.                                                    *
+*     Xilinx products are not intended for use in life support appliances,     *
+*     devices, or systems.  Use in such applications are expressly             *
+*     prohibited.                                                              *
 *                                                                              *
-*     (c) Copyright 1995-2011 Xilinx, Inc.                                     *
+*     (c) Copyright 1995-2012 Xilinx, Inc.                                     *
 *     All rights reserved.                                                     *
 *******************************************************************************/
 // You must compile the wrapper file dac_buf.v when simulating
@@ -57,7 +56,7 @@ output [31 : 0] doutb;
 
 // synthesis translate_off
 
-  BLK_MEM_GEN_V6_1 #(
+  BLK_MEM_GEN_V6_3 #(
     .C_ADDRA_WIDTH(11),
     .C_ADDRB_WIDTH(9),
     .C_ALGORITHM(1),
@@ -69,6 +68,7 @@ output [31 : 0] doutb;
     .C_DEFAULT_DATA("0"),
     .C_DISABLE_WARN_BHV_COLL(0),
     .C_DISABLE_WARN_BHV_RANGE(0),
+    .C_ENABLE_32BIT_ADDRESS(0),
     .C_FAMILY("spartan3"),
     .C_HAS_AXI_ID(0),
     .C_HAS_ENA(0),

verilog/sd2snes/ipcore_dir/dac_buf.xco

@@ -1,7 +1,7 @@
 ##############################################################
 #
-# Xilinx Core Generator version 13.1
-# Date: Mon Jun 13 22:11:22 2011
+# Xilinx Core Generator version 13.4
+# Date: Tue May 15 16:23:22 2012
 #
 ##############################################################
 #
@@ -12,12 +12,16 @@
 #
 ##############################################################
 #
+#  Generated from component: xilinx.com:ip:blk_mem_gen:6.3
+#
+##############################################################
+#
 # BEGIN Project Options
 SET addpads = false
 SET asysymbol = true
 SET busformat = BusFormatAngleBracketNotRipped
 SET createndf = false
-SET designentry = Advanced
+SET designentry = Verilog
 SET device = xc3s400
 SET devicefamily = spartan3
 SET flowvendor = Foundation_ISE
@@ -29,10 +33,10 @@ SET removerpms = false
 SET simulationfiles = Behavioral
 SET speedgrade = -4
 SET verilogsim = true
-SET vhdlsim = true
+SET vhdlsim = false
 # END Project Options
 # BEGIN Select
-SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.1
+SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.3
 # END Select
 # BEGIN Parameters
 CSET additional_inputs_for_power_estimation=false
@@ -49,6 +53,7 @@ CSET disable_collision_warnings=false
 CSET disable_out_of_range_warnings=false
 CSET ecc=false
 CSET ecctype=No_ECC
+CSET enable_32bit_address=false
 CSET enable_a=Always_Enabled
 CSET enable_b=Always_Enabled
 CSET error_injection_type=Single_Bit_Error_Injection
@@ -95,7 +100,7 @@ CSET write_width_a=8
 CSET write_width_b=32
 # END Parameters
 # BEGIN Extra information
-MISC pkg_timestamp=2011-02-03T22:20:43.000Z
+MISC pkg_timestamp=2011-10-21T13:54:23Z
 # END Extra information
 GENERATE
-# CRC: 70eef295
+# CRC: e5078255

verilog/sd2snes/ipcore_dir/dac_buf.xise

@@ -12,7 +12,7 @@
     <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->
   </header>
 
-  <version xil_pn:ise_version="13.2" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/>
 
   <files>
     <file xil_pn:name="dac_buf.ngc" xil_pn:type="FILE_NGC">
@@ -26,13 +26,7 @@
       <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="5"/>
       <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="5"/>
     </file>
-    <file xil_pn:name="dac_buf.vhd" xil_pn:type="FILE_VHDL">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostMapSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="7"/>
-    </file>
+    <file xil_pn:name="dac_buf.vhd" xil_pn:type="FILE_VHDL"/>
   </files>
 
   <properties>

verilog/sd2snes/ipcore_dir/msu_databuf.v

@@ -1,29 +1,28 @@
 /*******************************************************************************
-*     This file is owned and controlled by Xilinx and must be used             *
-*     solely for design, simulation, implementation and creation of            *
-*     design files limited to Xilinx devices or technologies. Use              *
-*     with non-Xilinx devices or technologies is expressly prohibited          *
-*     and immediately terminates your license.                                 *
+*     This file is owned and controlled by Xilinx and must be used solely      *
+*     for design, simulation, implementation and creation of design files      *
+*     limited to Xilinx devices or technologies. Use with non-Xilinx           *
+*     devices or technologies is expressly prohibited and immediately          *
+*     terminates your license.                                                 *
 *                                                                              *
-*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"            *
-*     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                  *
-*     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION          *
-*     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION              *
-*     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                *
-*     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                  *
-*     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE         *
-*     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                 *
-*     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                  *
+*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY     *
+*     FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY     *
+*     PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE              *
+*     IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS       *
+*     MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY       *
+*     CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY        *
+*     RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY        *
+*     DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE    *
 *     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR           *
 *     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF          *
-*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS          *
-*     FOR A PARTICULAR PURPOSE.                                                *
+*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A    *
+*     PARTICULAR PURPOSE.                                                      *
 *                                                                              *
-*     Xilinx products are not intended for use in life support                 *
-*     appliances, devices, or systems. Use in such applications are            *
-*     expressly prohibited.                                                    *
+*     Xilinx products are not intended for use in life support appliances,     *
+*     devices, or systems.  Use in such applications are expressly             *
+*     prohibited.                                                              *
 *                                                                              *
-*     (c) Copyright 1995-2011 Xilinx, Inc.                                     *
+*     (c) Copyright 1995-2012 Xilinx, Inc.                                     *
 *     All rights reserved.                                                     *
 *******************************************************************************/
 // You must compile the wrapper file msu_databuf.v when simulating
@@ -57,7 +56,7 @@ output [7 : 0] doutb;
 
 // synthesis translate_off
 
-  BLK_MEM_GEN_V6_1 #(
+  BLK_MEM_GEN_V6_3 #(
     .C_ADDRA_WIDTH(14),
     .C_ADDRB_WIDTH(14),
     .C_ALGORITHM(1),
@@ -69,6 +68,7 @@ output [7 : 0] doutb;
     .C_DEFAULT_DATA("0"),
     .C_DISABLE_WARN_BHV_COLL(0),
     .C_DISABLE_WARN_BHV_RANGE(0),
+    .C_ENABLE_32BIT_ADDRESS(0),
     .C_FAMILY("spartan3"),
     .C_HAS_AXI_ID(0),
     .C_HAS_ENA(0),

verilog/sd2snes/ipcore_dir/msu_databuf.xco

@@ -1,7 +1,7 @@
 ##############################################################
 #
-# Xilinx Core Generator version 13.1
-# Date: Mon Jun 13 22:13:20 2011
+# Xilinx Core Generator version 13.4
+# Date: Tue May 15 16:26:06 2012
 #
 ##############################################################
 #
@@ -12,12 +12,16 @@
 #
 ##############################################################
 #
+#  Generated from component: xilinx.com:ip:blk_mem_gen:6.3
+#
+##############################################################
+#
 # BEGIN Project Options
 SET addpads = false
 SET asysymbol = true
 SET busformat = BusFormatAngleBracketNotRipped
 SET createndf = false
-SET designentry = Advanced
+SET designentry = Verilog
 SET device = xc3s400
 SET devicefamily = spartan3
 SET flowvendor = Foundation_ISE
@@ -29,10 +33,10 @@ SET removerpms = false
 SET simulationfiles = Behavioral
 SET speedgrade = -4
 SET verilogsim = true
-SET vhdlsim = true
+SET vhdlsim = false
 # END Project Options
 # BEGIN Select
-SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.1
+SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.3
 # END Select
 # BEGIN Parameters
 CSET additional_inputs_for_power_estimation=false
@@ -49,6 +53,7 @@ CSET disable_collision_warnings=false
 CSET disable_out_of_range_warnings=false
 CSET ecc=false
 CSET ecctype=No_ECC
+CSET enable_32bit_address=false
 CSET enable_a=Always_Enabled
 CSET enable_b=Always_Enabled
 CSET error_injection_type=Single_Bit_Error_Injection
@@ -95,7 +100,7 @@ CSET write_width_a=8
 CSET write_width_b=8
 # END Parameters
 # BEGIN Extra information
-MISC pkg_timestamp=2011-02-03T22:20:43.000Z
+MISC pkg_timestamp=2011-10-21T13:54:23Z
 # END Extra information
 GENERATE
-# CRC: eabbe14d
+# CRC: cbebd26a

verilog/sd2snes/ipcore_dir/msu_databuf.xise

@@ -12,7 +12,7 @@
     <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->
   </header>
 
-  <version xil_pn:ise_version="13.2" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/>
 
   <files>
     <file xil_pn:name="msu_databuf.ngc" xil_pn:type="FILE_NGC">
@@ -26,13 +26,7 @@
       <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="5"/>
       <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="5"/>
     </file>
-    <file xil_pn:name="msu_databuf.vhd" xil_pn:type="FILE_VHDL">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostMapSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="7"/>
-    </file>
+    <file xil_pn:name="msu_databuf.vhd" xil_pn:type="FILE_VHDL"/>
   </files>
 
   <properties>

verilog/sd2snes/ipcore_dir/upd77c25_datram.v

@@ -1,29 +1,28 @@
 /*******************************************************************************
-*     This file is owned and controlled by Xilinx and must be used             *
-*     solely for design, simulation, implementation and creation of            *
-*     design files limited to Xilinx devices or technologies. Use              *
-*     with non-Xilinx devices or technologies is expressly prohibited          *
-*     and immediately terminates your license.                                 *
+*     This file is owned and controlled by Xilinx and must be used solely      *
+*     for design, simulation, implementation and creation of design files      *
+*     limited to Xilinx devices or technologies. Use with non-Xilinx           *
+*     devices or technologies is expressly prohibited and immediately          *
+*     terminates your license.                                                 *
 *                                                                              *
-*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"            *
-*     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                  *
-*     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION          *
-*     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION              *
-*     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                *
-*     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                  *
-*     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE         *
-*     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                 *
-*     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                  *
+*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY     *
+*     FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY     *
+*     PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE              *
+*     IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS       *
+*     MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY       *
+*     CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY        *
+*     RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY        *
+*     DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE    *
 *     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR           *
 *     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF          *
-*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS          *
-*     FOR A PARTICULAR PURPOSE.                                                *
+*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A    *
+*     PARTICULAR PURPOSE.                                                      *
 *                                                                              *
-*     Xilinx products are not intended for use in life support                 *
-*     appliances, devices, or systems. Use in such applications are            *
-*     expressly prohibited.                                                    *
+*     Xilinx products are not intended for use in life support appliances,     *
+*     devices, or systems.  Use in such applications are expressly             *
+*     prohibited.                                                              *
 *                                                                              *
-*     (c) Copyright 1995-2011 Xilinx, Inc.                                     *
+*     (c) Copyright 1995-2012 Xilinx, Inc.                                     *
 *     All rights reserved.                                                     *
 *******************************************************************************/
 // You must compile the wrapper file upd77c25_datram.v when simulating
@@ -63,7 +62,7 @@ output [7 : 0] doutb;
 
 // synthesis translate_off
 
-  BLK_MEM_GEN_V6_1 #(
+  BLK_MEM_GEN_V6_3 #(
     .C_ADDRA_WIDTH(10),
     .C_ADDRB_WIDTH(11),
     .C_ALGORITHM(1),
@@ -75,6 +74,7 @@ output [7 : 0] doutb;
     .C_DEFAULT_DATA("0"),
     .C_DISABLE_WARN_BHV_COLL(0),
     .C_DISABLE_WARN_BHV_RANGE(0),
+    .C_ENABLE_32BIT_ADDRESS(0),
     .C_FAMILY("spartan3"),
     .C_HAS_AXI_ID(0),
     .C_HAS_ENA(0),

verilog/sd2snes/ipcore_dir/upd77c25_datram.xco

@@ -1,7 +1,7 @@
 ##############################################################
 #
-# Xilinx Core Generator version 13.1
-# Date: Sun Jun 19 20:18:04 2011
+# Xilinx Core Generator version 13.4
+# Date: Wed May 16 07:50:33 2012
 #
 ##############################################################
 #
@@ -12,12 +12,16 @@
 #
 ##############################################################
 #
+#  Generated from component: xilinx.com:ip:blk_mem_gen:6.3
+#
+##############################################################
+#
 # BEGIN Project Options
 SET addpads = false
 SET asysymbol = true
 SET busformat = BusFormatAngleBracketNotRipped
 SET createndf = false
-SET designentry = Advanced
+SET designentry = Verilog
 SET device = xc3s400
 SET devicefamily = spartan3
 SET flowvendor = Other
@@ -29,10 +33,10 @@ SET removerpms = false
 SET simulationfiles = Behavioral
 SET speedgrade = -4
 SET verilogsim = true
-SET vhdlsim = true
+SET vhdlsim = false
 # END Project Options
 # BEGIN Select
-SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.1
+SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.3
 # END Select
 # BEGIN Parameters
 CSET additional_inputs_for_power_estimation=false
@@ -49,6 +53,7 @@ CSET disable_collision_warnings=false
 CSET disable_out_of_range_warnings=false
 CSET ecc=false
 CSET ecctype=No_ECC
+CSET enable_32bit_address=false
 CSET enable_a=Always_Enabled
 CSET enable_b=Always_Enabled
 CSET error_injection_type=Single_Bit_Error_Injection
@@ -95,7 +100,7 @@ CSET write_width_a=16
 CSET write_width_b=8
 # END Parameters
 # BEGIN Extra information
-MISC pkg_timestamp=2011-02-03T22:20:43.000Z
+MISC pkg_timestamp=2011-10-21T13:54:23Z
 # END Extra information
 GENERATE
-# CRC: 78e2bfe1
+# CRC: 94c2e5cc

verilog/sd2snes/ipcore_dir/upd77c25_datram.xise

@@ -12,12 +12,12 @@
     <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->
   </header>
 
-  <version xil_pn:ise_version="13.2" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/>
 
   <files>
     <file xil_pn:name="upd77c25_datram.ngc" xil_pn:type="FILE_NGC">
       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
     </file>
     <file xil_pn:name="upd77c25_datram.v" xil_pn:type="FILE_VERILOG">
       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
@@ -26,13 +26,7 @@
       <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="5"/>
       <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="5"/>
     </file>
-    <file xil_pn:name="upd77c25_datram.vhd" xil_pn:type="FILE_VHDL">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
-      <association xil_pn:name="PostMapSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="7"/>
-    </file>
+    <file xil_pn:name="upd77c25_datram.vhd" xil_pn:type="FILE_VHDL"/>
   </files>
 
   <properties>

verilog/sd2snes/ipcore_dir/upd77c25_datrom.v

@@ -1,29 +1,28 @@
 /*******************************************************************************
-*     This file is owned and controlled by Xilinx and must be used             *
-*     solely for design, simulation, implementation and creation of            *
-*     design files limited to Xilinx devices or technologies. Use              *
-*     with non-Xilinx devices or technologies is expressly prohibited          *
-*     and immediately terminates your license.                                 *
+*     This file is owned and controlled by Xilinx and must be used solely      *
+*     for design, simulation, implementation and creation of design files      *
+*     limited to Xilinx devices or technologies. Use with non-Xilinx           *
+*     devices or technologies is expressly prohibited and immediately          *
+*     terminates your license.                                                 *
 *                                                                              *
-*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"            *
-*     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                  *
-*     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION          *
-*     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION              *
-*     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                *
-*     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                  *
-*     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE         *
-*     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                 *
-*     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                  *
+*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY     *
+*     FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY     *
+*     PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE              *
+*     IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS       *
+*     MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY       *
+*     CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY        *
+*     RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY        *
+*     DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE    *
 *     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR           *
 *     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF          *
-*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS          *
-*     FOR A PARTICULAR PURPOSE.                                                *
+*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A    *
+*     PARTICULAR PURPOSE.                                                      *
 *                                                                              *
-*     Xilinx products are not intended for use in life support                 *
-*     appliances, devices, or systems. Use in such applications are            *
-*     expressly prohibited.                                                    *
+*     Xilinx products are not intended for use in life support appliances,     *
+*     devices, or systems.  Use in such applications are expressly             *
+*     prohibited.                                                              *
 *                                                                              *
-*     (c) Copyright 1995-2011 Xilinx, Inc.                                     *
+*     (c) Copyright 1995-2012 Xilinx, Inc.                                     *
 *     All rights reserved.                                                     *
 *******************************************************************************/
 // You must compile the wrapper file upd77c25_datrom.v when simulating
@@ -57,7 +56,7 @@ output [15 : 0] doutb;
 
 // synthesis translate_off
 
-  BLK_MEM_GEN_V6_1 #(
+  BLK_MEM_GEN_V6_3 #(
     .C_ADDRA_WIDTH(11),
     .C_ADDRB_WIDTH(11),
     .C_ALGORITHM(1),
@@ -69,6 +68,7 @@ output [15 : 0] doutb;
     .C_DEFAULT_DATA("0"),
     .C_DISABLE_WARN_BHV_COLL(0),
     .C_DISABLE_WARN_BHV_RANGE(0),
+    .C_ENABLE_32BIT_ADDRESS(0),
     .C_FAMILY("spartan3"),
     .C_HAS_AXI_ID(0),
     .C_HAS_ENA(0),

verilog/sd2snes/ipcore_dir/upd77c25_datrom.xco

@@ -1,7 +1,7 @@
 ##############################################################
 #
-# Xilinx Core Generator version 13.1
-# Date: Wed Jun 22 21:30:01 2011
+# Xilinx Core Generator version 13.4
+# Date: Wed May 16 07:43:52 2012
 #
 ##############################################################
 #
@@ -12,12 +12,16 @@
 #
 ##############################################################
 #
+#  Generated from component: xilinx.com:ip:blk_mem_gen:6.3
+#
+##############################################################
+#
 # BEGIN Project Options
 SET addpads = false
 SET asysymbol = true
 SET busformat = BusFormatAngleBracketNotRipped
 SET createndf = false
-SET designentry = Advanced
+SET designentry = Verilog
 SET device = xc3s400
 SET devicefamily = spartan3
 SET flowvendor = Other
@@ -29,10 +33,10 @@ SET removerpms = false
 SET simulationfiles = Behavioral
 SET speedgrade = -4
 SET verilogsim = true
-SET vhdlsim = true
+SET vhdlsim = false
 # END Project Options
 # BEGIN Select
-SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.1
+SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.3
 # END Select
 # BEGIN Parameters
 CSET additional_inputs_for_power_estimation=false
@@ -49,6 +53,7 @@ CSET disable_collision_warnings=false
 CSET disable_out_of_range_warnings=false
 CSET ecc=false
 CSET ecctype=No_ECC
+CSET enable_32bit_address=false
 CSET enable_a=Always_Enabled
 CSET enable_b=Always_Enabled
 CSET error_injection_type=Single_Bit_Error_Injection
@@ -95,7 +100,7 @@ CSET write_width_a=16
 CSET write_width_b=16
 # END Parameters
 # BEGIN Extra information
-MISC pkg_timestamp=2011-02-03T22:20:43.000Z
+MISC pkg_timestamp=2011-10-21T13:54:23Z
 # END Extra information
 GENERATE
-# CRC: 7b2b203b
+# CRC: 4c89ee28

verilog/sd2snes/ipcore_dir/upd77c25_datrom.xise

@@ -12,7 +12,7 @@
     <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->
   </header>
 
-  <version xil_pn:ise_version="13.2" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/>
 
   <files>
     <file xil_pn:name="upd77c25_datrom.ngc" xil_pn:type="FILE_NGC">
@@ -26,13 +26,7 @@
       <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="5"/>
       <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="5"/>
     </file>
-    <file xil_pn:name="upd77c25_datrom.vhd" xil_pn:type="FILE_VHDL">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostMapSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="7"/>
-    </file>
+    <file xil_pn:name="upd77c25_datrom.vhd" xil_pn:type="FILE_VHDL"/>
   </files>
 
   <properties>

verilog/sd2snes/ipcore_dir/upd77c25_pgmrom.v

@@ -1,29 +1,28 @@
 /*******************************************************************************
-*     This file is owned and controlled by Xilinx and must be used             *
-*     solely for design, simulation, implementation and creation of            *
-*     design files limited to Xilinx devices or technologies. Use              *
-*     with non-Xilinx devices or technologies is expressly prohibited          *
-*     and immediately terminates your license.                                 *
+*     This file is owned and controlled by Xilinx and must be used solely      *
+*     for design, simulation, implementation and creation of design files      *
+*     limited to Xilinx devices or technologies. Use with non-Xilinx           *
+*     devices or technologies is expressly prohibited and immediately          *
+*     terminates your license.                                                 *
 *                                                                              *
-*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"            *
-*     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                  *
-*     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION          *
-*     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION              *
-*     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                *
-*     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                  *
-*     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE         *
-*     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                 *
-*     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                  *
+*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY     *
+*     FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES.  BY     *
+*     PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE              *
+*     IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS       *
+*     MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY       *
+*     CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY        *
+*     RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY        *
+*     DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE    *
 *     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR           *
 *     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF          *
-*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS          *
-*     FOR A PARTICULAR PURPOSE.                                                *
+*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A    *
+*     PARTICULAR PURPOSE.                                                      *
 *                                                                              *
-*     Xilinx products are not intended for use in life support                 *
-*     appliances, devices, or systems. Use in such applications are            *
-*     expressly prohibited.                                                    *
+*     Xilinx products are not intended for use in life support appliances,     *
+*     devices, or systems.  Use in such applications are expressly             *
+*     prohibited.                                                              *
 *                                                                              *
-*     (c) Copyright 1995-2011 Xilinx, Inc.                                     *
+*     (c) Copyright 1995-2012 Xilinx, Inc.                                     *
 *     All rights reserved.                                                     *
 *******************************************************************************/
 // You must compile the wrapper file upd77c25_pgmrom.v when simulating
@@ -57,7 +56,7 @@ output [23 : 0] doutb;
 
 // synthesis translate_off
 
-  BLK_MEM_GEN_V6_1 #(
+  BLK_MEM_GEN_V6_3 #(
     .C_ADDRA_WIDTH(11),
     .C_ADDRB_WIDTH(11),
     .C_ALGORITHM(1),
@@ -69,6 +68,7 @@ output [23 : 0] doutb;
     .C_DEFAULT_DATA("0"),
     .C_DISABLE_WARN_BHV_COLL(0),
     .C_DISABLE_WARN_BHV_RANGE(0),
+    .C_ENABLE_32BIT_ADDRESS(0),
     .C_FAMILY("spartan3"),
     .C_HAS_AXI_ID(0),
     .C_HAS_ENA(0),

verilog/sd2snes/ipcore_dir/upd77c25_pgmrom.xco

@@ -1,7 +1,7 @@
 ##############################################################
 #
-# Xilinx Core Generator version 13.1
-# Date: Wed Jun 22 21:31:49 2011
+# Xilinx Core Generator version 13.4
+# Date: Wed May 16 08:14:01 2012
 #
 ##############################################################
 #
@@ -12,12 +12,16 @@
 #
 ##############################################################
 #
+#  Generated from component: xilinx.com:ip:blk_mem_gen:6.3
+#
+##############################################################
+#
 # BEGIN Project Options
 SET addpads = false
 SET asysymbol = true
 SET busformat = BusFormatAngleBracketNotRipped
 SET createndf = false
-SET designentry = Advanced
+SET designentry = Verilog
 SET device = xc3s400
 SET devicefamily = spartan3
 SET flowvendor = Other
@@ -29,10 +33,10 @@ SET removerpms = false
 SET simulationfiles = Behavioral
 SET speedgrade = -4
 SET verilogsim = true
-SET vhdlsim = true
+SET vhdlsim = false
 # END Project Options
 # BEGIN Select
-SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.1
+SELECT Block_Memory_Generator xilinx.com:ip:blk_mem_gen:6.3
 # END Select
 # BEGIN Parameters
 CSET additional_inputs_for_power_estimation=false
@@ -49,6 +53,7 @@ CSET disable_collision_warnings=false
 CSET disable_out_of_range_warnings=false
 CSET ecc=false
 CSET ecctype=No_ECC
+CSET enable_32bit_address=false
 CSET enable_a=Always_Enabled
 CSET enable_b=Always_Enabled
 CSET error_injection_type=Single_Bit_Error_Injection
@@ -95,7 +100,7 @@ CSET write_width_a=24
 CSET write_width_b=24
 # END Parameters
 # BEGIN Extra information
-MISC pkg_timestamp=2011-02-03T22:20:43.000Z
+MISC pkg_timestamp=2011-10-21T13:54:23Z
 # END Extra information
 GENERATE
-# CRC: b11006ad
+# CRC: 4fd43971

verilog/sd2snes/ipcore_dir/upd77c25_pgmrom.xise

@@ -12,7 +12,7 @@
     <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->
   </header>
 
-  <version xil_pn:ise_version="13.2" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/>
 
   <files>
     <file xil_pn:name="upd77c25_pgmrom.ngc" xil_pn:type="FILE_NGC">
@@ -26,13 +26,7 @@
       <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="5"/>
       <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="5"/>
     </file>
-    <file xil_pn:name="upd77c25_pgmrom.vhd" xil_pn:type="FILE_VHDL">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostMapSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="7"/>
-      <association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="7"/>
-    </file>
+    <file xil_pn:name="upd77c25_pgmrom.vhd" xil_pn:type="FILE_VHDL"/>
   </files>
 
   <properties>

verilog/sd2snes/main.ucf

@@ -535,6 +535,7 @@ NET "SD_DAT[3]" LOC = P63;
 # PlanAhead Generated IO constraints 
 
 NET "SD_CLK" IOSTANDARD = LVCMOS33;
+NET "SD_CLK" PULLUP;
 NET "SD_CMD" IOSTANDARD = LVCMOS33;
 NET "SD_DAT[0]" IOSTANDARD = LVCMOS33;
 NET "SD_DAT[1]" IOSTANDARD = LVCMOS33;

verilog/sd2snes/sd2snes.xise

@@ -12,7 +12,7 @@
     <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->
   </header>
 
-  <version xil_pn:ise_version="13.2" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/>
 
   <files>
     <file xil_pn:name="address.v" xil_pn:type="FILE_VERILOG">
@@ -377,8 +377,8 @@
     <property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="work.updtest" xil_pn:valueState="default"/>
     <property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="work.updtest" xil_pn:valueState="default"/>
     <property xil_pn:name="Speed Grade" xil_pn:value="-4" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="2" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="Starting Placer Cost Table (1-100) Par" xil_pn:value="2" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="6" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Starting Placer Cost Table (1-100) Par" xil_pn:value="6" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Structure window" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
     <property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>

verilog/sd2snes_cx4/address.v

@@ -44,7 +44,7 @@ wire [23:0] SRAM_SNES_ADDR;
    - MMIO @ 6000-7fff
  */
 
-assign IS_ROM = SNES_ADDR[15] & ~SNES_CS;
+assign IS_ROM = ~SNES_CS;
 
 assign SRAM_SNES_ADDR = ({2'b00, SNES_ADDR[22:16], SNES_ADDR[14:0]}
                                & ROM_MASK);

verilog/sd2snes_cx4/main.ucf

@@ -535,6 +535,7 @@ NET "SD_DAT[3]" LOC = P63;
 
 # PlanAhead Generated IO constraints 
 NET "SD_CLK" IOSTANDARD = LVCMOS33;
+NET "SD_CLK" PULLUP;
 NET "SD_CMD" IOSTANDARD = LVCMOS33;
 NET "SD_DAT[0]" IOSTANDARD = LVCMOS33;
 NET "SD_DAT[1]" IOSTANDARD = LVCMOS33;

verilog/sd2snes_cx4/sd2snes_cx4.xise

@@ -366,8 +366,8 @@
     <property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="work.updtest" xil_pn:valueState="default"/>
     <property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="work.updtest" xil_pn:valueState="default"/>
     <property xil_pn:name="Speed Grade" xil_pn:value="-4" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="4" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="Starting Placer Cost Table (1-100) Par" xil_pn:value="4" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="11" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Starting Placer Cost Table (1-100) Par" xil_pn:value="11" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Structure window" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
     <property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>