Godzil 1d928e7091 Merge branch 'udev' into develop

2013-10-06 14:52:40 +01:00

..

address.v

Merge branch 'udev' into develop

2013-10-06 14:52:40 +01:00

data.v

FPGA: merge recent changes into sd2sneslite

2011-10-08 17:05:22 +02:00

dcm.v

FPGA: merge recent changes into sd2sneslite

2011-10-08 17:05:22 +02:00

main.ucf

FPGA: update clock speed to 88MHz

2012-07-09 01:54:05 +02:00

main.v

Merge branch 'udev' into develop

2013-10-06 14:52:40 +01:00

mcu_cmd.v

FPGA/sd2sneslite: add missing file mcu_cmd.v; remove avr_cmd.v

2012-07-09 01:55:02 +02:00

sd2sneslite.xise

Merge branch 'udev' into develop

2013-10-06 14:52:40 +01:00

spi.v

FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input

2012-07-09 02:17:01 +02:00