26 Commits

Author SHA1 Message Date
Han Gao
a13e24ed9e ci: remove xuantie toolchain
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2026-05-04 07:26:43 +08:00
Han Gao
7c400aca79 ci: bump action
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2026-05-04 07:07:17 +08:00
Han Gao
1a0c68d152 ahead: add aon config
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2026-05-04 06:40:27 +08:00
Yao Zi
0028a957e3 configs: light-c910: Setup kernel decompression buffer
Image decompression requires a temporary buffer to store decompressed
image. Setup it for C910 boards.

Signed-off-by: Yao Zi <ziyao@disroot.org>
2025-11-24 19:50:27 +08:00
Yao Zi
c971a1448d cmd/boot: Try decompressing kernel through GZIP
This makes it possible to boot GZIP-compressed Linux kernel with
sysboot.

Signed-off-by: Yao Zi <ziyao@disroot.org>
2025-11-24 19:49:23 +08:00
nekorouter
ac3b305def configs/light_lpi4a_cluster_16g_defconfig: fix typo
16gb -> 16g

Signed-off-by: nekorouter <nekorouter@outlook.com>
2025-09-03 19:07:53 +08:00
nekorouter
57fa274f6d ci: remove build mainline binarys command
since the only difference from "default build" and "mainline build" is the devicetree name,
and the devicetree name in default build has been updated, this is not needed.

Signed-off-by: nekorouter <nekorouter@outlook.com>
2025-08-13 16:32:47 +08:00
nekorouter
c1a95ddefe configs: update devicetree names
update devicetree filename to mainline-like format.

Signed-off-by: nekorouter <nekorouter@outlook.com>
2025-08-13 16:32:47 +08:00
SkyRain
93ff49d9f5 enable fan in uboot for meles 2025-03-17 05:54:24 +08:00
SkyRain
6278bac553 enable PWM fan in uboot for LPi4A 2025-03-17 05:54:24 +08:00
Han Gao
b5ee6e549a ci: update to actions/upload-artifact@v4
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
2025-02-05 13:32:07 +08:00
Han Gao
3d877f3648 Revert "Linux_SDK_V2.0.2"
This reverts commit 8942b2dce6.
2025-01-10 17:54:03 +08:00
LevitatingBusinessMan (Rein Fernhout)
68565d2855 use 0 instead of NULL in function returning int 2024-12-23 15:41:01 +08:00
LevitatingBusinessMan (Rein Fernhout)
72c738e9ce use cmd_tbl_t type 2024-12-23 15:41:01 +08:00
Lindsay Zhou
a46c283102 fix: implicit conversion and implicit function declaration errors on gcc14 2024-12-23 15:41:01 +08:00
Han Gao
71bb3b069e fix: set initrd_high for initrd size too big
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
2024-12-23 15:40:00 +08:00
devops_admin
8942b2dce6 Linux_SDK_V2.0.2
Signed-off-by: devops_admin <devops_admin@alibabacloud.com>
2024-12-23 15:40:00 +08:00
Han Gao
fc9575fa63 feat: add 8g emmc lpi4a som support
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
2024-07-21 02:01:37 +08:00
钦峰
4ca0f76729 add single/dual rank support
Change-Id: I633daa4a871f93c5b4d897b1d60ed23bcc198912
2024-07-21 00:29:20 +08:00
NekoRouter
660cb1b920 env: Add boot from usb 2024-07-21 00:19:51 +08:00
NekoRouter
f0e5c60169 ci: Add build for laptop4a and pocket4a 2024-07-16 21:25:44 +08:00
Lu
0248804ead configs: add plastic & pocket config file 2024-07-16 18:31:21 +08:00
Lu
7ce2d43f6b xhci: allow trans data on 0x0 2024-07-16 18:31:21 +08:00
Lu
dd138c76f8 th1520: enable usb host support 2024-07-16 18:31:21 +08:00
Haaland Chen
197c6cdccd ci: enable ci for DDR-16GB meles
Signed-off-by: Haaland Chen <haaland@milkv.io>
2024-07-06 19:14:03 +08:00
Haaland Chen
2a2c5264a5 configs: add DDR-16GB meles board
Signed-off-by: Haaland Chen <haaland@milkv.io>
2024-07-06 19:14:03 +08:00
67 changed files with 899 additions and 9217 deletions

View File

@@ -1,4 +1,4 @@
name: thead-u-boot-build
name: th1520-vendor-uboot-build
on:
push:
@@ -8,12 +8,8 @@ on:
- '*'
pull_request:
workflow_dispatch:
schedule:
- cron: "0 2 * * *"
env:
xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395627867
toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1-20240115.tar.gz
mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2024.04.12
mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2024.04.12-nightly.tar.gz
wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
@@ -22,11 +18,6 @@ env:
jobs:
build:
strategy:
fail-fast: false
matrix:
name: [thead-gcc, gcc-13]
runs-on: ubuntu-22.04
steps:
@@ -38,20 +29,14 @@ jobs:
dkms libelf-dev libudev-dev libpci-dev libiberty-dev autoconf device-tree-compiler
- name: Checkout uboot
uses: actions/checkout@v4
uses: actions/checkout@v6
- name: uboot compile
run: |
mkdir output
if [[ ${{ matrix.name }} = "thead-gcc" ]]; then
${wget_alias} ${xuantie_toolchain}/${toolchain_file_name}
tar -xvf ${toolchain_file_name} -C /opt
export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1/bin:$PATH"
else
${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
tar -xvf ${mainline_toolchain_file_name} -C /opt
export PATH="/opt/riscv/bin:$PATH"
fi
${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
tar -xvf ${mainline_toolchain_file_name} -C /opt
export PATH="/opt/riscv/bin:$PATH"
${CROSS_COMPILE}gcc -v
pushd $PWD
@@ -71,6 +56,18 @@ jobs:
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lcon4a-16g.bin
make clean
make light_lpi4a_plastic_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-laptop4a.bin
make clean
make light_lpi4a_plastic_16g_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-laptop4a-16g.bin
make clean
make light_lpi4a_pocket_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-pocket4a.bin
make clean
make light_lpi4a_cluster_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lc4a.bin
@@ -87,6 +84,10 @@ jobs:
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-vala.bin
make clean
make light_milkv_meles_16g_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles-16g.bin
make clean
make light_milkv_meles_dualrank_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles.bin
@@ -94,48 +95,26 @@ jobs:
make light_milkv_meles_singlerank_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles-4g.bin
make clean
make light_huiwei_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-huiwei.bin
# mainline support
# 8g emmc support
sed -i 's/name=swap,size=4096MiB,type=swap/name=swap,size=2MiB,type=swap/' include/configs/light-c910.h
make clean
make light_lpi4a_defconfig
sed -i 's#thead/light-lpi4a.dtb#thead/th1520-lichee-pi-4a.dtb#' .config
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a-main.bin
make clean
make light_lpi4a_16g_defconfig
sed -i 's#thead/light-lpi4a-16gb.dtb#thead/th1520-lichee-pi-4a-16g.dtb#' .config
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a-16g-main.bin
make clean
make light_lpi4a_cluster_defconfig
sed -i 's#thead/light-lpi4a-cluster.dtb#thead/th1520-lichee-cluster-4a.dtb#' .config
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lc4a-main.bin
make clean
make light_lpi4a_cluster_16g_defconfig
sed -i 's#thead/light-lpi4a-cluster-16gb.dtb#thead/th1520-lichee-cluster-4a-16g.dtb#' .config
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lc4a-16g-main.bin
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a_8gemmc.bin
popd
tree ${GITHUB_WORKSPACE}/output
- name: 'Upload Artifact'
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v7
with:
name: thead-u-uboot-${{ matrix.name }}
name: th1520-uboot
path: output/*.bin
retention-days: 30
- name: 'Create release by tag'
uses: softprops/action-gh-release@v1
if: ${{ startsWith(github.ref, 'refs/tags/') && matrix.name == 'thead-gcc' }}
uses: softprops/action-gh-release@v3
if: ${{ startsWith(github.ref, 'refs/tags/') }}
with:
files: output/*.bin
token: ${{ secrets.GITHUB_TOKEN }}

View File

@@ -757,8 +757,6 @@ libs-y += drivers/net/phy/
libs-y += drivers/power/ \
drivers/power/domain/ \
drivers/power/fuel_gauge/ \
drivers/power/charge/ \
drivers/mcu/ \
drivers/power/mfd/ \
drivers/power/pmic/ \
drivers/power/battery/ \

View File

@@ -7,7 +7,6 @@ dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb light-milkv-meles.dtb
dtb-$(CONFIG_TARGET_LIGHT_C910) += light-lpi4a-laptop.dtb
dtb-$(CONFIG_TARGET_LIGHT_C910) += light-huiwei.dtb
targets += $(dtb-y)

View File

@@ -1,4 +1,7 @@
/dts-v1/;
#include <dt-bindings/pmic/light_pmic.h>
/ {
model = "T-HEAD c910 light";
compatible = "thead,c910_light";
@@ -479,6 +482,367 @@
lcd-en-gpios = <&pcal6408ahk_a 2 0>; /* active high */
lcd-bias-en-gpios = <&pcal6408ahk_a 4 0>;/* active high */
};
aon {
compatible = "thead,light-aon";
status = "okay";
wakeup-by-gpio-on;
wakeup-by-rtc-on;
pd: light-aon-pd {
compatible = "thead,light-aon-pd";
#power-domain-cells = <1>;
};
light-regu-reg {
compatible = "thead,light-dialog-pmic";
status = "okay";
soc_dvdd18_aon_reg: soc_dvdd18_aon {
regulator-name = "soc_dvdd18_aon";
regulator-boot-on;
regulator-always-on;
};
soc_avdd33_usb3_reg: soc_avdd33_usb3 {
regulator-name = "soc_avdd33_usb3";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_aon_reg: soc_dvdd08_aon {
regulator-name = "soc_dvdd08_aon";
regulator-boot-on;
regulator-always-on;
};
soc_apcpu_dvdd_dvddm_reg: soc_apcpu_dvdd_dvddm {
regulator-name = "soc_apcpu_dvdd_dvddm";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1570000>;
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
regulator-name = "soc_dvdd08_ddr";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
regulator-name = "soc_vdd_ddr_1v8";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
regulator-name = "soc_vdd_ddr_1v1";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
regulator-name = "soc_vdd_ddr_0v6";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd18_ap_reg: soc_dvdd18_ap {
regulator-name = "soc_dvdd18_ap";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_ap_reg: soc_dvdd08_ap {
regulator-name = "soc_dvdd08_ap";
regulator-boot-on;
regulator-always-on;
};
soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
regulator-name = "soc_avdd08_mipi_hdmi";
regulator-boot-on;
regulator-always-on;
};
soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
regulator-name = "soc_avdd18_mipi_hdmi";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
regulator-name = "soc_dvdd33_emmc";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
regulator-name = "soc_vdd18_emmc";
regulator-boot-on;
regulator-always-on;
};
soc_dovdd18_scan_reg: soc_dovdd18_scan {
regulator-name = "soc_dovdd18_scan";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
soc_vext_2v8_reg: soc_vext_2v8 {
regulator-name = "soc_vext_2v8";
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dvdd12_scan_reg: soc_dvdd12_scan {
regulator-name = "soc_dvdd12_scan";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
regulator-name = "soc_avdd28_scan_en";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
soc_avdd28_rgb_reg: soc_avdd28_rgb {
regulator-name = "soc_avdd28_rgb";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <3475000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
regulator-name = "soc_dovdd18_rgb";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
regulator-name = "soc_dvdd12_rgb";
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1675000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_avdd25_ir_reg: soc_avdd25_ir {
regulator-name = "soc_avdd25_ir";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <3475000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dovdd18_ir_reg: soc_dovdd18_ir {
regulator-name = "soc_dovdd18_ir";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dvdd12_ir_reg: soc_dvdd12_ir {
regulator-name = "soc_dvdd12_ir";
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1675000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
};
aon_pmic_config {
compatible = "thead,light-pmic-conf";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
iic-config = <0 0 2>;
pmic_dev_0: pmic-dev@0 {
pmic-name = "dialog,da9063,v1";
pmic-addr = <0x5a 0x5b>;
pmic_wdt_on;
status = "okay";
};
pmic_dev_1: pmic-dev@1 {
pmic-name = "dialog,da9121,v1";
pmic-addr = <0x68>;
status = "okay";
};
regu_config_0 {
reg_info = <&soc_dvdd18_aon_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO3>;
};
};
regu_config_1 {
reg_info = <&soc_avdd33_usb3_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO9>;
};
};
regu_config_2 {
reg_info = <&soc_dvdd08_aon_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO2>;
};
};
regu_config_3 {
reg_info = <&soc_apcpu_dvdd_dvddm_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE1>;
auto_on_info = <0 0 800000>;
};
regu_id@1 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE2>;
auto_on_info = <1 0 800000>;
};
regu_id@2 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKIO>;
auto_on_info = <2 0 800000>;
};
coupling_info@0 {
negative-min;
info = <0 2 5 30>;
};
coupling_info@1 {
negative-min;
info = <1 2 5 30>;
};
};
regu_config_4 {
reg_info = <&soc_dvdd08_ddr_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPERI>;
};
};
regu_config_5 {
reg_info = <&soc_vdd_ddr_1v8_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO4>;
};
};
regu_config_6 {
reg_info = <&soc_vdd_ddr_1v1_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKMEM>;
};
};
regu_config_7 {
reg_info = <&soc_vdd_ddr_0v6_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPRO>;
};
};
regu_config_8 {
reg_info = <&soc_dvdd18_ap_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO11>;
};
};
regu_config_9 {
reg_info = <&soc_avdd08_mipi_hdmi_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO1>;
};
};
regu_config_10 {
reg_info = <&soc_avdd18_mipi_hdmi_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO5>;
};
};
regu_config_11 {
reg_info = <&soc_dvdd33_emmc_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO10>;
};
};
regu_config_12 {
reg_info = <&soc_dovdd18_scan_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO6>;
auto_on_info = <3 1 1800000>;
auto_off_info = <1 1>;
};
};
regu_config_13 {
reg_info = <&soc_dvdd12_scan_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO8>;
auto_on_info = <4 1 1200000>;
auto_off_info = <2 1>;
};
};
regu_config_14 {
reg_info = <&soc_avdd28_scan_en_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO7>;
auto_on_info = <5 1 2800000>;
auto_off_info = <0 1>;
};
};
regu_config_15 {
reg_info = <&soc_dvdd08_ap_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_1 DA9121_ID_BUCK1>;
parent_pmic_dev = <&pmic_dev_0 2 0>;
};
};
regu_config_16 {
reg_info = <&soc_dvdd18_emmc_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_GPIO7>;
parent_pmic_dev = <&pmic_dev_0 7 0>;
};
};
};
};
};
chosen {

File diff suppressed because it is too large Load Diff

View File

@@ -8,6 +8,10 @@
#address-cells = <2>;
#size-cells = <2>;
config {
huben-gpio = <&gpio1_porta 16 0>;
};
memory@0 {
device_type = "memory";
reg = <0x0 0xc0000000 0x0 0x40000000>;

View File

@@ -9,7 +9,8 @@
#size-cells = <2>;
config {
select-gpio = <&gpio1_porta 16 0>;
select-gpio = <&gpio1_porta 16 0>; // Enable the blue LED on Milk-V Meles
fan-gpio = <&gpio2_porta 4 0>; // Enable the fan on Milk-V Meles, see schematic for details
};
memory@0 {

View File

@@ -110,7 +110,7 @@ void next_stage(void)
bool has_reset_sample(ulong dtb_addr)
{
int node_offset;
node_offset = fdt_path_offset(dtb_addr, "/soc/reset-sample");
node_offset = fdt_path_offset((void *)dtb_addr, "/soc/reset-sample");
if (node_offset < 0) {
printf("## fdt has no reset_sample\n");
return false;
@@ -160,8 +160,8 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
announce_and_cleanup(fake);
_load_start = kernel;
_dtb_addr = images->ft_addr;
_load_start = (ulong)kernel;
_dtb_addr = (ulong)(images->ft_addr);
_dyn_info_addr = (ulong)&opensbi_info;
if (!has_reset_sample(_dtb_addr)) {
opensbi_info.magic = FW_DYNAMIC_INFO_MAGIC_VALUE;

View File

@@ -54,8 +54,6 @@ int board_usb_cleanup(int index, enum usb_init_type init)
int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
{
int ret = board_usb_init(index, USB_INIT_HOST);
if (ret != 0) {
puts("Failed to initialize board for USB\n");
@@ -246,7 +244,7 @@ int do_bootslave(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
}
#endif
static void light_c910_set_gpio_output_high(void)
static void light_c910_set_gpio_output_high(const char* gpio_name)
{
ofnode node;
struct gpio_desc select_gpio;
@@ -259,9 +257,9 @@ static void light_c910_set_gpio_output_high(void)
return;
}
if (gpio_request_by_name_nodev(node, "select-gpio", 0,
if (gpio_request_by_name_nodev(node, gpio_name, 0,
&select_gpio, GPIOD_IS_OUT)) {
printf("%s: could not find a /config/select-gpio\n", __func__);
printf("%s: could not find a /config/%s\n", __func__, gpio_name);
return;
}
@@ -270,7 +268,12 @@ static void light_c910_set_gpio_output_high(void)
int misc_init_r(void)
{
light_c910_set_gpio_output_high();
// Enable blue LED
light_c910_set_gpio_output_high("select-gpio");
// Enable fan on some boards(currently only on Meles)
// For LPi4A, the fan is controlled by PWM, see lpi4a_fan_pwm_config() in light.c
light_c910_set_gpio_output_high("fan-gpio");
return 0;
}

View File

@@ -1430,8 +1430,6 @@ static void light_iopin_init(void)
light_pin_cfg(CPU_JTG_TMS, PIN_SPEED_NORMAL, PIN_PN, 2);
light_pin_mux(CPU_JTG_TDI, 3);
light_pin_cfg(CPU_JTG_TDI, PIN_SPEED_NORMAL, PIN_PN, 2);
light_pin_mux(CPU_JTG_TRST, 3);
light_pin_cfg(CPU_JTG_TRST, PIN_SPEED_NORMAL, PIN_PN, 2);
light_pin_mux(AOGPIO_7, 1);
light_pin_mux(AOGPIO_8, 1);
@@ -1618,7 +1616,7 @@ static void light_iopin_init(void)
light_pin_cfg(I2C3_SCL, PIN_SPEED_NORMAL, PIN_PN, 4);
light_pin_cfg(I2C3_SDA, PIN_SPEED_NORMAL, PIN_PN, 4);
light_pin_mux(SPI_CSN,3); /// W_DISABLE_CATE1
// light_pin_mux(SPI_CSN,3); /// W_DISABLE_CATE1
// light_pin_mux(SPI_MOSI,3); /// NC
// light_pin_mux(SPI_MISO,3); /// RERST1_N_CAT1
// light_pin_mux(SPI_SCLK,3);
@@ -2404,13 +2402,59 @@ static void light_iopin_init(void)
}
#endif
#define PWM_BASE ((void *)0xffec01c000)
#define PWM_CHAN_REG(chan, off) (PWM_BASE + (chan) * 0x20 + (off))
#define PWM_PER_OFFSET 0x08 // Offset for Periodic Control Register
#define PWM_FP_OFFSET 0x0C // Offset for First Phase Control Register
#define PWM_CTRL_OFFSET 0x00 // Offset for Control Register
// See T-HEAD TH1520 Peripheral Interface User Manual
// https://dl.sipeed.com/shareURL/LICHEE/licheepi4a/09_Doc
static void light_pwm_config(void)
{
/* pwm0 */
writel(0x4b0, (void *)0xFFEC01C008);
writel(0x258, (void *)0xFFEC01C00c);
writel(0x328, (void *)0xFFEC01C000);
/*
* Enable MIPI Display backlight on PWM0.
* Period=1200 clock cycles, Duty Cycle=50%
*/
// Set PWM Period to 1200 clock cycles
writel(0x4b0, PWM_CHAN_REG(0, PWM_PER_OFFSET));
// Set PWM First Phase to 600 clock cycles
writel(0x258, PWM_CHAN_REG(0, PWM_FP_OFFSET));
// Configure PWM Control Register:
// [9] INACTOUT = 1 (inactive output set to high)
// [8] FPOUT = 1 (first phase output set to high)
// [7:6] EVTRIG = 00 (event-triggered mode disabled)
// [5:4] MODE = 10 (continuous mode)
// [3] INTEN = 1 (interrupt enabled)
// [2] CFG_UPDATE = 0 (do not wait for configuration update)
// [1] SOFT_RST = 0 (software reset disabled)
// [0] START = 0 (PWM start coding enable, rising edge effective)
// Final address: 0xffec01c000 + 0x00 (channel 0) + 0x00 (control register offset) = 0xffec01c000
writel(0b1100101000, PWM_CHAN_REG(0, PWM_CTRL_OFFSET));
}
static void lpi4a_fan_pwm_config(void)
{
/*
* Enable fan on PWM1(GPIO10) for Lichee Pi 4A.
* See LPi4A Schematic:
* https://dl.sipeed.com/shareURL/LICHEE/licheepi4a/02_Schematic
*/
// Set PWM Period to 1200 clock cycles
writel(0x4b0, PWM_CHAN_REG(1, PWM_PER_OFFSET));
// Set PWM First Phase to 600 clock cycles
writel(0x258, PWM_CHAN_REG(1, PWM_FP_OFFSET));
// Configure PWM Control Register:
// [9] INACTOUT = 1 (inactive output set to high)
// [8] FPOUT = 1 (first phase output set to high)
// [7:6] EVTRIG = 00 (event-triggered mode disabled)
// [5:4] MODE = 10 (continuous mode)
// [3] INTEN = 0 (interrupt disabled)
// [2] CFG_UPDATE = 0 (do not wait for configuration update)
// [1] SOFT_RST = 0 (software reset disabled)
// [0] START = 0 (PWM start coding enable, rising edge effective)
// Final address: 0xffec01c000 + 0x20 (channel 1) + 0x00 (control register offset) = 0xffec01c020
writel(0b1100100000, PWM_CHAN_REG(1, PWM_CTRL_OFFSET));
}
int board_init(void)
@@ -2427,6 +2471,9 @@ int board_init(void)
light_pwm_config();
#ifdef CONFIG_TARGET_LIGHT_FM_C910_LPI4A
lpi4a_fan_pwm_config();
#endif
return 0;
}
@@ -2506,15 +2553,6 @@ int board_late_init(void)
light_usb_boot_check();
light_mac_vaild_check();
ap_peri_clk_disable();
#ifdef CONFIG_MCU_HC32fX
mcu_poweron();
#endif
#ifdef CONFIG_DM_CHARGE_DISPLAY
charge_display();
#endif
return 0;
}

View File

@@ -28,6 +28,8 @@ typedef enum {
typedef struct Ddr_Reg_Config {
uint32_t misc_reg_num;
uint32_t phy_reg_num;
uint8_t ddr_rank;
uint8_t reserve[55];
} Ddr_Reg_Config_t;
int dwc_ddrphy_phyinit_regInterface(regInstr myRegInstr);

View File

@@ -3,6 +3,7 @@
#include "../include/common_lib.h"
#include "../include/ddr_common_func.h"
#include "../include/ddr_retention.h"
#include "../include/pinmux.h"
DDR_SYSREG_REG_SW_REG_S ddr_sysreg;
@@ -48,7 +49,7 @@ int get_ddr_rank_number() {
#ifdef CONFIG_DDR_MSG
DDR_DEBUG("unsupported ddr rank type!!!\n");
#endif
return NULL;
return 0;
#endif
}

View File

@@ -1,6 +1,7 @@
#include "../include/common_lib.h"
#include "../include/ddr_common_func.h"
#include "../include/ddr_retention.h"
#include "../include/pinmux.h"
/*
/// data structure to store register address, value pairs
@@ -1009,6 +1010,11 @@ int dwc_ddrphy_phyinit_regInterface(regInstr myRegInstr) {
uint32_t phy_reg_num = ARRAY_SIZE(RetRegList_addr);
ddr_Regu_Config->phy_reg_num = phy_reg_num;
#ifdef CONFIG_DDR_DUAL_RANK
ddr_Regu_Config->ddr_rank = 2;
#else
ddr_Regu_Config->ddr_rank = 1;
#endif
Reg_Phy_Addr_Val_t* phy_addr_t = (Reg_Phy_Addr_Val_t*)((char*)ddr_Regu_Config + 64 + sizeof(Reg_Misc_Addr_Val_t) * ARRAY_SIZE(MiscRegList));
#ifdef CONFIG_DDR_MSG

View File

@@ -338,37 +338,37 @@ int boundary_verify(unsigned long boundary) {
phys_addr_t verify_addr4 = (phys_addr_t)boundary + CONFIG_SYS_SDRAM_BASE;
// verify data accessing result firstly
writel(MAGIC_DATA2, verify_addr);
writel(MAGIC_DATA2, (void *)verify_addr);
invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
if (readl(verify_addr) != MAGIC_DATA2) {
if (readl((void *)verify_addr) != MAGIC_DATA2) {
printf("ddr rw test failed\n");
return -1;
}
writel(MAGIC_DATA, verify_addr); // writing at beginning
writel(MAGIC_DATA, (void *)verify_addr); // writing at beginning
invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
if (readl(verify_addr) != MAGIC_DATA) {
if (readl((void *)verify_addr) != MAGIC_DATA) {
printf("ddr rw test failed\n");
return -1;
}
writel(MAGIC_DATA2, verify_addr2); // writing at one-quarter addr
writel(MAGIC_DATA3, verify_addr3); // writing at half addr
writel(MAGIC_DATA2, (void *)verify_addr2); // writing at one-quarter addr
writel(MAGIC_DATA3, (void *)verify_addr3); // writing at half addr
invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
invalidate_dcache_range(verify_addr2, verify_addr2 + CONFIG_SYS_CACHELINE_SIZE);
invalidate_dcache_range(verify_addr3, verify_addr3 + CONFIG_SYS_CACHELINE_SIZE);
if (boundary == (unsigned long)MAXIMAL_DDR_DENSITY_MB * UNIT_MB) { // boundary by design
if ((readl(verify_addr) == MAGIC_DATA) &&
(readl(verify_addr2) == MAGIC_DATA2) &&
(readl(verify_addr3) == MAGIC_DATA3))
if ((readl((void *)verify_addr) == MAGIC_DATA) &&
(readl((void *)verify_addr2) == MAGIC_DATA2) &&
(readl((void *)verify_addr3) == MAGIC_DATA3))
return 0;
}
else {
writel(MAGIC_DATA4, verify_addr4); // writing out of boundary
writel(MAGIC_DATA4, (void *)verify_addr4); // writing out of boundary
invalidate_dcache_range(verify_addr4, verify_addr4 + CONFIG_SYS_CACHELINE_SIZE);
if ((readl(verify_addr) == MAGIC_DATA4) && // overwrite by verify_addr4
(readl(verify_addr2) == MAGIC_DATA2) &&
(readl(verify_addr3) == MAGIC_DATA3) &&
(readl(verify_addr4) == MAGIC_DATA4))
if ((readl((void *)verify_addr) == MAGIC_DATA4) && // overwrite by verify_addr4
(readl((void *)verify_addr2) == MAGIC_DATA2) &&
(readl((void *)verify_addr3) == MAGIC_DATA3) &&
(readl((void *)verify_addr4) == MAGIC_DATA4))
return 0;
}

View File

@@ -24,6 +24,10 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
ulong ld;
ulong relocated_addr;
ulong image_size;
char *tmp;
ulong dest_end;
ulong decomp_dst;
ulong comp_len;
ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
images, 1);
@@ -38,6 +42,29 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
debug("* kernel: cmdline image address = 0x%08lx\n", ld);
}
tmp = map_sysmem(ld, 0);
decomp_dst = env_get_ulong("kernel_comp_addr_r", 16, 0);
comp_len = env_get_ulong("kernel_comp_size", 16, 0);
if (!decomp_dst || !comp_len) {
puts("kernel_comp_addr_r or kernel_comp_size aren't defined!\n");
return -EINVAL;
}
ret = image_decomp(IH_COMP_GZIP, 0, ld, IH_TYPE_KERNEL,
(void *)decomp_dst, (void *)ld, comp_len,
comp_len * 10, &dest_end);
if (!ret) {
printf("Kernel image compression size = 0x%08lx, address = 0x%08lx\n",
comp_len, decomp_dst);
memmove((void *)ld, (void *)decomp_dst, dest_end);
} else {
printf("failed to decompress kernel image: %d\n", ret);
}
ret = booti_setup(ld, &relocated_addr, &image_size, false);
if (ret != 0)
return 1;

View File

@@ -335,7 +335,7 @@ static int label_localboot(struct pxe_label *label)
* Loads fdt overlays specified in 'fdtoverlays'.
*/
#ifdef CONFIG_OF_LIBFDT_OVERLAY
static void label_boot_fdtoverlay(struct cmd_tbl *cmdtp, struct pxe_label *label)
static void label_boot_fdtoverlay(cmd_tbl_t *cmdtp, struct pxe_label *label)
{
char *fdtoverlay = label->fdtoverlays;
struct fdt_header *working_fdt;

View File

@@ -13,7 +13,7 @@ CONFIG_DDR_BOARD_CONFIG=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DEFAULT_FDT_FILE="thead/light-beagle.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-beaglev-ahead.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y

View File

@@ -88,7 +88,7 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/light-lpi4a-16gb.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lichee-pi-4a-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y

View File

@@ -88,7 +88,7 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/light-lpi4a-cluster-16gb.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-cluster-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y

View File

@@ -87,7 +87,7 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/light-lpi4a-cluster.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-cluster.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y

View File

@@ -88,7 +88,7 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/light-lpi4a-console-16g.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-console-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
@@ -112,3 +112,8 @@ CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -87,7 +87,7 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/light-lpi4a-console.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-console.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
@@ -111,3 +111,8 @@ CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -90,7 +90,7 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/light-lpi4a.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lichee-pi-4a.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y

View File

@@ -18,11 +18,10 @@ CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="Light huiwei# "
CONFIG_SYS_PROMPT="LicheeLaptop4A 16G # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
@@ -33,10 +32,11 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-huiwei"
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
@@ -78,9 +78,6 @@ CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
@@ -90,7 +87,7 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-huiwei-product.dtb"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-plastic-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
@@ -98,13 +95,10 @@ CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_CMD_USB=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=n
CONFIG_VIDEO_LCD_JD9365DA=y
#CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
@@ -114,24 +108,12 @@ CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_TPM=y
CONFIG_TPM_V2=y
CONFIG_TPM_Z32H330TC_SPI=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_V2=y
CONFIG_CMD_TPM_TEST=y
CONFIG_DM_CHARGE_DISPLAY=y
CONFIG_CHARGE_ANIMATION=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_CW201X=y
CONFIG_CHARGER_BQ25700=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_DM_MCU=y
CONFIG_MCU_HC32fX=y
CONFIG_DM_POWER_DELIVERY=y
CONFIG_TYPEC_TCPM=y
CONFIG_TYPEC_TCPCI=y
CONFIG_TYPEC_HUSB311=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -0,0 +1,119 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheeLaptop4A # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-plastic.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -0,0 +1,119 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheePocket4A # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-pocket.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -0,0 +1,94 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
CONFIG_DDR_LP4X_3733_DUALRANK=y
CONFIG_DDR_DDP=y
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="Milk-V Meles 16G# "
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC_SPI is not set
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -130,8 +130,6 @@ source "drivers/w1-eeprom/Kconfig"
source "drivers/watchdog/Kconfig"
source "drivers/mcu/Kconfig"
config PHYS_TO_BUS
bool "Custom physical to bus address mapping"
help

View File

@@ -85,7 +85,6 @@ obj-y += misc/
obj-$(CONFIG_MMC) += mmc/
obj-$(CONFIG_NVME) += nvme/
obj-$(CONFIG_PCI_ENDPOINT) += pci_endpoint/
obj-$(CONFIG_DM_POWER_DELIVERY) += power/power_delivery/
obj-y += dfu/
obj-$(CONFIG_PCH) += pch/
obj-y += phy/allwinner/

View File

@@ -1,15 +0,0 @@
menu "MCU Support"
config DM_MCU
bool "Enable driver model for mcu device support"
depends on DM
help
This adds a simple uclass for mcu device.
config MCU_HC32fX
bool "Enable HC32fX MCU support"
depends on DM_MCU
help
This adds a driver for the HC32fX MCU support.
endmenu

View File

@@ -1,9 +0,0 @@
#
# Copyright (c) 2015 Google, Inc
# Written by Simon Glass <sjg@chromium.org>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_DM_MCU) += mcu-uclass.o
obj-$(CONFIG_MCU_HC32fX) += mcu_hc32fx.o

View File

@@ -1,65 +0,0 @@
/*
* Copyright (c) 2015 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <mcu/mcu-uclass.h>
#include <dm/root.h>
#include <dm/uclass-internal.h>
int _mcu_shutdown(struct udevice *dev)
{
struct mcu_ops *ops = dev_get_driver_ops(dev);
if (!ops->shutdown)
return -ENOSYS;
return ops->shutdown(dev);
}
int _mcu_poweron(struct udevice *dev)
{
struct mcu_ops *ops = dev_get_driver_ops(dev);
if (!ops->poweron)
return -ENOSYS;
return ops->poweron(dev);
}
int mcu_poweron(void)
{
struct udevice *mcu;
int ret;
ret = uclass_get_device(UCLASS_MCU, 0, &mcu);
if (ret) {
printf("Get UCLASS_MCU failed, ret=%d\n", ret);
return ret;
}
return _mcu_poweron(mcu);
}
int mcu_shutdown(void)
{
struct udevice *mcu;
int ret;
ret = uclass_get_device(UCLASS_MCU, 0, &mcu);
if (ret) {
printf("Get charge display failed, ret=%d\n", ret);
return ret;
}
return _mcu_shutdown(mcu);
}
UCLASS_DRIVER(mcu) = {
.id = UCLASS_MCU,
.name = "mcu",
};

View File

@@ -1,97 +0,0 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <mcu/mcu-uclass.h>
#include <dm/lists.h>
DECLARE_GLOBAL_DATA_PTR;
#define HC32FX_POWEROFF_20 0x20
#define HC32FX_POWERON_30 0x30
#define POWER_OFF 0x55
#define POWER_ON 0x01
struct hc32fx_info {
struct udevice *dev;
};
static u8 hc32fx_read(struct hc32fx_info *hc32fx, u8 reg)
{
u8 val;
int ret;
ret = dm_i2c_read(hc32fx->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
hc32fx->dev, reg);
return ret;
}
return val;
}
static int hc32fx_write(struct hc32fx_info *hc32fx, u8 reg, u8 val)
{
int ret;
ret = dm_i2c_write(hc32fx->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
hc32fx->dev, reg);
return ret;
}
return 0;
}
static int mcu_hc32fx_poweron(struct udevice *dev)
{
struct hc32fx_info *hc32fx = dev_get_priv(dev);
int ret;
ret = hc32fx_write(hc32fx, HC32FX_POWERON_30, POWER_ON);
if(ret)
printf("set mcu POWERON fail\n");
return ret;
}
static int mcu_hc32fx_shutdown(struct udevice *dev)
{
struct hc32fx_info *hc32fx = dev_get_priv(dev);
int ret;
ret = hc32fx_write(hc32fx, HC32FX_POWEROFF_20, POWER_OFF);
if(ret)
printf("set mcu POWEROFF fail\n");
return ret;
}
static int mcu_gpio_probe(struct udevice *dev)
{
struct hc32fx_info *priv = dev_get_priv(dev);
priv->dev = dev;
return 0;
}
static const struct mcu_ops mcu_hc32fx_ops = {
.poweron = mcu_hc32fx_poweron,
.shutdown = mcu_hc32fx_shutdown,
};
static const struct udevice_id hc32fx_ops_ids[] = {
{ .compatible = "mcu_hc32fx" },
{ }
};
U_BOOT_DRIVER(mcu_gpio) = {
.name = "hc32fx-mcu",
.id = UCLASS_MCU,
.of_match = hc32fx_ops_ids,
.ops = &mcu_hc32fx_ops,
.priv_auto_alloc_size = sizeof(struct hc32fx_info),
.probe = mcu_gpio_probe,
};

View File

@@ -2,22 +2,10 @@ menu "Power"
source "drivers/power/domain/Kconfig"
source "drivers/power/fuel_gauge/Kconfig"
source "drivers/power/pmic/Kconfig"
source "drivers/power/regulator/Kconfig"
source "drivers/power/charge/Kconfig"
source "drivers/power/power_delivery/Kconfig"
config DM_CHARGE_DISPLAY
bool "Enable driver model for charge display support"
depends on DM
help
This adds a simple uclass for charge display.
choice
prompt "Select Sunxi PMIC Variant"
depends on ARCH_SUNXI
@@ -84,13 +72,6 @@ config SY8106A_POWER
endchoice
config CHARGE_ANIMATION
bool "Enable charge animation"
depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
select ARM_CPU_SUSPEND
help
This adds a simple function for charge animation display.
config AXP_DCDC1_VOLT
int "axp pmic dcdc1 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER

View File

@@ -3,14 +3,11 @@
# Copyright (c) 2009 Wind River Systems, Inc.
# Tom Rix <Tom.Rix at windriver.com>
obj-$(CONFIG_DM_CHARGE_DISPLAY) += charge-display-uclass.o
obj-$(CONFIG_AXP152_POWER) += axp152.o
obj-$(CONFIG_AXP209_POWER) += axp209.o
obj-$(CONFIG_AXP221_POWER) += axp221.o
obj-$(CONFIG_AXP809_POWER) += axp809.o
obj-$(CONFIG_AXP818_POWER) += axp818.o
obj-$(CONFIG_CHARGE_ANIMATION) += charge_animation.o
obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o
obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o
obj-$(CONFIG_SY8106A_POWER) += sy8106a.o
@@ -23,4 +20,3 @@ obj-$(CONFIG_DIALOG_POWER) += power_dialog.o
obj-$(CONFIG_POWER_FSL) += power_fsl.o
obj-$(CONFIG_POWER_I2C) += power_i2c.o
obj-$(CONFIG_POWER_SPI) += power_spi.o

View File

@@ -1,40 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <command.h>
#include <common.h>
#include <dm.h>
#include <power/charge_display.h>
int charge_display_show(struct udevice *dev)
{
const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->show)
return -ENOSYS;
return ops->show(dev);
}
int charge_display(void)
{
struct udevice *dev;
struct udevice *fg_dev;
int ret;
ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
if (ret) {
debug("Get charge display failed, ret=%d\n", ret);
return ret;
}
return charge_display_show(dev);
}
UCLASS_DRIVER(charge_display) = {
.id = UCLASS_CHARGE_DISPLAY,
.name = "charge_display",
};

View File

@@ -1,5 +0,0 @@
config CHARGER_BQ25700
bool "BQ25700 charger support"
depends on DM_FUEL_GAUGE
help
This adds support for BQ25700 charger support.

View File

@@ -1,7 +0,0 @@
#
# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_CHARGER_BQ25700) += bq25700_charger.o

View File

@@ -1,334 +0,0 @@
/*
* (C) Copyright 2019 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/gpio.h>
#include <dm/device.h>
#include <dm/uclass.h>
#include <power/fuel_gauge.h>
#include <power/pmic.h>
#include <power/power_delivery/power_delivery.h>
DECLARE_GLOBAL_DATA_PTR;
#define BQ25700_ID 0x25700
#define BQ25703_ID 0x25703
#define COMPAT_BQ25700 "ti,bq25700"
#define COMPAT_BQ25703 "ti,bq25703"
#define BQ25700_I2C_SPEED 100000
#define BQ25700_CHARGE_CURRENT_1500MA 0x5C0
#define BQ25700_SDP_INPUT_CURRENT_500MA 0xA00
#define BQ25700_DCP_INPUT_CURRENT_1500MA 0x1E00
#define BQ25700_DCP_INPUT_CURRENT_2000MA 0x2800
#define BQ25700_DCP_INPUT_CURRENT_3000MA 0x3C00
#define WATCHDOG_ENSABLE (0x03 << 13)
#define BQ25700_CHARGEOPTION0_REG 0x12
#define BQ25700_CHARGECURREN_REG 0x14
#define BQ25700_CHARGERSTAUS_REG 0x20
#define BQ25700_INPUTVOLTAGE_REG 0x3D
#define BQ25700_INPUTCURREN_REG 0x3F
#define BQ25703_CHARGEOPTION0_REG 0x00
#define BQ25703_CHARGECURREN_REG 0x02
#define BQ25703_CHARGERSTAUS_REG 0x20
#define BQ25703_INPUTVOLTAGE_REG 0x0A
#define BQ25703_INPUTCURREN_REG 0x0E
#define PD_MUN 2
#define TYPEC0_I2C "i2c@ffe7f20000"
#define TYPEC1_I2C "i2c@ffe7f24000"
enum bq25700_table_ids {
/* range tables */
TBL_ICHG,
TBL_CHGMAX,
TBL_INPUTVOL,
TBL_INPUTCUR,
TBL_SYSVMIN,
TBL_OTGVOL,
TBL_OTGCUR,
TBL_EXTCON,
};
struct bq25700 {
struct udevice *dev;
u32 ichg;
u32 chip_id;
struct udevice *pd[PD_MUN];
};
struct bq25700_range {
u32 min;
u32 max;
u32 step;
};
static int bq25700_read(struct bq25700 *charger, uint reg)
{
u16 val;
int ret;
ret = dm_i2c_read(charger->dev, reg, (u8 *)&val, 2);
if (ret) {
printf("write error to device: %p register: %#x!",
charger->dev, reg);
return ret;
}
return val;
}
static int bq25700_write(struct bq25700 *charger, uint reg, u16 val)
{
int ret;
ret = dm_i2c_write(charger->dev, reg, (u8 *)&val, 2);
if (ret) {
printf("write error to device: %p register: %#x!",
charger->dev, reg);
return ret;
}
return 0;
}
static const union {
struct bq25700_range rt;
} bq25700_tables[] = {
/* range tables */
[TBL_ICHG] = {.rt = {0, 8128000, 64000}},
/* uV */
[TBL_CHGMAX] = {.rt = {0, 19200000, 16000}},
/* uV max charge voltage*/
[TBL_INPUTVOL] = {.rt = {3200000, 19520000, 64000}},
/* uV input charge voltage*/
[TBL_INPUTCUR] = {.rt = {0, 6350000, 50000}},
/*uA input current*/
[TBL_SYSVMIN] = {.rt = {1024000, 16182000, 256000}},
/* uV min system voltage*/
[TBL_OTGVOL] = {.rt = {4480000, 20800000, 64000}},
/*uV OTG volage*/
[TBL_OTGCUR] = {.rt = {0, 6350000, 50000}},
};
static u32 bq25700_find_idx(u32 value, enum bq25700_table_ids id)
{
const struct bq25700_range *rtbl = &bq25700_tables[id].rt;
u32 rtbl_size;
u32 idx;
rtbl_size = (rtbl->max - rtbl->min) / rtbl->step + 1;
for (idx = 1;
idx < rtbl_size && (idx * rtbl->step + rtbl->min <= value);
idx++)
;
return idx - 1;
}
static bool bq25700_charger_status(struct bq25700 *charger)
{
int state_of_charger;
u16 value;
value = bq25700_read(charger, BQ25700_CHARGERSTAUS_REG);
state_of_charger = value >> 15;
return state_of_charger;
}
static bool bq25703_charger_status(struct bq25700 *charger)
{
int state_of_charger;
u16 value;
value = bq25700_read(charger, BQ25703_CHARGERSTAUS_REG);
state_of_charger = value >> 15;
return state_of_charger;
}
static bool bq257xx_charger_status(struct udevice *dev)
{
struct bq25700 *charger = dev_get_priv(dev);
if (charger->chip_id == BQ25700_ID)
return bq25700_charger_status(charger);
else
return bq25703_charger_status(charger);
}
static int bq25700_charger_capability(struct udevice *dev)
{
return FG_CAP_CHARGER;
}
static int bq25700_get_usb_type(void)
{
#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
return rockchip_chg_get_type();
#else
return 0;
#endif
}
static int bq25700_get_pd_output_val(struct bq25700 *charger,
int *vol, int *cur)
{
struct power_delivery_data pd_data;
int ret;
if (!charger->pd[0] && !charger->pd[1]) {
return -EINVAL;
}
memset(&pd_data, 0, sizeof(pd_data));
int i = 0;
for (i = 0; i < PD_MUN; i++) {
if (!charger->pd[i]) {
continue;
}
ret = power_delivery_get_data(charger->pd[i], &pd_data);
if (ret) {
continue;
}
if (!pd_data.online || !pd_data.voltage || !pd_data.current) {
continue;
}
*vol = pd_data.voltage;
*cur = pd_data.current;
printf("voltage is %d current is %d\n", *vol, *cur);
goto end;
}
return -EINVAL;
end:
return 0;
}
static void bq25703_charger_current_init(struct bq25700 *charger)
{
u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
int pd_inputvol, pd_inputcurrent;
u16 vol_idx = 0, cur_idx;
u16 temp;
temp = bq25700_read(charger, BQ25703_CHARGEOPTION0_REG);
temp &= (~WATCHDOG_ENSABLE);
bq25700_write(charger, BQ25703_CHARGEOPTION0_REG, temp);
if (!bq25700_get_pd_output_val(charger, &pd_inputvol,
&pd_inputcurrent)) {
if (pd_inputvol > 5000000) {
vol_idx = bq25700_find_idx(pd_inputvol - 1280000 - 3200000,
TBL_INPUTVOL);
vol_idx = vol_idx << 6;
}
cur_idx = bq25700_find_idx(pd_inputcurrent,
TBL_INPUTCUR);
cur_idx = cur_idx << 8;
if (pd_inputcurrent != 0)
{
bq25700_write(charger, BQ25703_INPUTCURREN_REG,
cur_idx);
if (vol_idx)
bq25700_write(charger, BQ25703_INPUTVOLTAGE_REG,
vol_idx);
charge_current = bq25700_find_idx(pd_inputcurrent,
TBL_ICHG);
charge_current = charge_current << 6;
}
} else {
bq25700_write(charger, BQ25703_INPUTCURREN_REG,
dcp_inputcurrent);
}
if (bq25703_charger_status(charger)) {
bq25700_write(charger, BQ25703_CHARGECURREN_REG,
charge_current);
}
}
static int bq25700_ofdata_to_platdata(struct udevice *dev)
{
struct bq25700 *charger = dev_get_priv(dev);
const void *blob = gd->fdt_blob;
int node, node1;
charger->dev = dev;
node = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25700);
node1 = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25703);
if ((node < 0) && (node1 < 0)) {
printf("Can't find dts node for charger bq25700\n");
return -ENODEV;
}
if (node < 0) {
node = node1;
charger->chip_id = BQ25703_ID;
} else {
charger->chip_id = BQ25700_ID;
}
return 0;
}
static int bq25700_probe(struct udevice *dev)
{
struct bq25700 *charger = dev_get_priv(dev);
int ret;
struct udevice *pd_tmp;
struct udevice *dev_tmp;
for (uclass_first_device(UCLASS_PD, &pd_tmp);
pd_tmp;
uclass_next_device(&pd_tmp))
{
dev_tmp = dev_get_parent(pd_tmp);
if (!strncmp(TYPEC0_I2C, dev_tmp->name, strlen(TYPEC0_I2C))) { // Ensure that typec0 has the highest priority
charger->pd[0] = pd_tmp;
} else if (!strncmp(TYPEC1_I2C, dev_tmp->name, strlen(TYPEC1_I2C))) {
charger->pd[1] = pd_tmp;
}
}
if (charger->chip_id == BQ25703_ID) {
bq25703_charger_current_init(charger);
}
return 0;
}
static const struct udevice_id charger_ids[] = {
{.compatible = "ti,bq25700"},
{.compatible = "ti,bq25703"},
{},
{ },
};
static struct dm_fuel_gauge_ops charger_ops = {
.get_chrg_online = bq257xx_charger_status,
.capability = bq25700_charger_capability,
};
U_BOOT_DRIVER(bq25700_charger) = {
.name = "bq25700_charger",
.id = UCLASS_FG,
.probe = bq25700_probe,
.of_match = charger_ids,
.ops = &charger_ops,
.ofdata_to_platdata = bq25700_ofdata_to_platdata,
.priv_auto_alloc_size = sizeof(struct bq25700),
};

View File

@@ -1,366 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/io.h>
#include <asm/gpio.h>
#include <common.h>
#include <console.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
#include <rtc.h>
#include <pwm.h>
#include <power/charge_display.h>
#include <power/charge_animation.h>
#include <power/fuel_gauge.h>
#include <power/pmic.h>
#include <mcu/mcu-uclass.h>
#ifdef CONFIG_IRQ
#include <irq-generic.h>
#include <rk_timer_irq.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
#define IMAGE_RECALC_IDX -1
#define IMAGE_SOC_100_IDX(n) ((n) - 2)
#define IMAGE_LOWPOWER_IDX(n) ((n) - 1)
#define SYSTEM_SUSPEND_DELAY_MS 5000
#define FUEL_GAUGE_POLL_MS 1000
#define LED_CHARGING_NAME "battery_charging"
#define LED_CHARGING_FULL_NAME "battery_full"
#define LED_CHARGING_START_NAME "battery_start"
struct charge_image {
const char *name;
int soc;
int period; /* ms */
};
struct charge_animation_priv {
struct udevice *fg;
struct udevice *charger;
struct udevice *mcu;
#ifdef CONFIG_LED
struct udevice *led_charging;
struct udevice *led_full;
struct udevice *led_start;
#endif
const struct charge_image *image;
int image_num;
int auto_wakeup_key_state;
ulong auto_screen_off_timeout; /* ms */
ulong suspend_delay_timeout; /* ms */
};
struct gpio_desc powerkey_gpio;
static int leds_switch = 0;
#ifdef CONFIG_LED
static int leds_update(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
static int old_soc = -1;
int ret, ledst;
if (old_soc == soc)
return 0;
old_soc = soc;
if (priv->led_charging) {
ledst = (soc < 100) ? LEDST_ON : LEDST_OFF;
ret = led_set_state(priv->led_charging, ledst);
if (ret) {
printf("set charging led %s failed, ret=%d\n",
(ledst == LEDST_ON) ? "ON" : "OFF", ret);
return ret;
}
}
if (priv->led_full) {
ledst = (soc == 100) ? LEDST_ON : LEDST_OFF;
ret = led_set_state(priv->led_full, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
}
return 0;
}
static int leds_charge_on(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, ledst;
ledst = LEDST_ON;
ret = led_set_state(priv->led_full, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
return 0;
}
static int leds_charge_off(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, ledst;
ledst = LEDST_OFF;
ret = led_set_state(priv->led_charging, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
ret = led_set_state(priv->led_full, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
return 0;
}
static int leds_charge_update(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, ledst;
if (leds_switch > 5){
leds_charge_on(dev, soc);
} else {
leds_charge_off(dev, soc);
}
leds_switch++;
if (leds_switch > 10)
leds_switch = 0;
return 0;
}
#else
static int leds_update(struct udevice *dev, int soc) { return 0; }
static int leds_charge_on(struct udevice *dev, int soc) { return 0; }
static int leds_charge_off(struct udevice *dev, int soc) { return 0; }
static int leds_charge_update(struct udevice *dev, int soc) { return 0; }
#endif
static int charge_animation_ofdata_to_platdata(struct udevice *dev)
{
struct charge_animation_pdata *pdata = dev_get_platdata(dev);
pdata->low_power_voltage =
dev_read_u32_default(dev, "uboot-low-power-voltage", 0);
return 0;
}
static int fg_charger_get_chrg_online(struct udevice *dev)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
struct udevice *charger;
charger = priv->charger ? : priv->fg;
return fuel_gauge_get_chrg_online(charger);
}
static int get_reboot_state(void){
const char *var_name = "battery_charge";
char *value = env_get(var_name);
if (value)
if (strcmp(value, "0") == 0) {
env_set(var_name, "1");
env_save();
return 0;
}
env_set(var_name, "1");
env_save();
return 1;
}
static int charge_animation_show(struct udevice *dev)
{
int soc, voltage, ret, charging = 0;
struct charge_animation_priv *priv = dev_get_priv(dev);
struct charge_animation_pdata *pdata = dev_get_platdata(dev);
struct udevice *fg = priv->fg;
struct udevice *mcu = priv->mcu;
voltage = fuel_gauge_get_voltage(fg);
if (voltage < 0)
return -EINVAL;
while (voltage < pdata->low_power_voltage + 50) {
soc = fuel_gauge_update_get_soc(fg);
if (soc < 0 || soc > 100) {
printf("get soc failed: %d\n", soc);
continue;
} else if (soc >= 1) {
printf("soc is: %d\n", soc);
break;
}
voltage = fuel_gauge_get_voltage(fg);
if (voltage < 0) {
printf("get voltage failed: %d\n", voltage);
continue;
}
ret = leds_update(dev, soc);
if (ret)
printf("update led failed: %d\n", ret);
printf("soc is: %d voltage is :%d\n", soc, voltage);
charging = fg_charger_get_chrg_online(dev);
if (charging <= 0) {
mcu_shutdown(); // shutdown system power
}
mdelay(100);
};
leds_charge_off(dev, soc);
ret = get_reboot_state();
charging = fg_charger_get_chrg_online(dev);
if (!(charging <= 0) && ret != 0)
while(1){
ret = dm_gpio_get_value(&powerkey_gpio);
if (ret == 0){
break;
}
charging = fg_charger_get_chrg_online(dev);
if (charging <= 0) {
mcu_shutdown(); // shutdown system power
}
soc = fuel_gauge_update_get_soc(fg);
if (soc == 100){
leds_charge_on(dev, soc);
}else if (soc < 100){
leds_charge_update(dev, soc);
}
mdelay(300);
}
leds_charge_off(dev, soc);
ret = led_set_state(priv->led_start, LEDST_ON);
if (!ret)
printf("Found Charging-Start LED\n");
return 0;
}
static int fg_charger_get_device(struct udevice **fuel_gauge,
struct udevice **charger)
{
struct udevice *dev;
struct uclass *uc;
int ret, cap;
*fuel_gauge = NULL,
*charger = NULL;
ret = uclass_get(UCLASS_FG, &uc);
if (ret)
return ret;
for (uclass_first_device(UCLASS_FG, &dev);
dev;
uclass_next_device(&dev)) {
cap = fuel_gauge_capability(dev);
if (cap == (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE)) {
*fuel_gauge = dev;
*charger = NULL;
} else if (cap == FG_CAP_FUEL_GAUGE) {
*fuel_gauge = dev;
} else if (cap == FG_CAP_CHARGER) {
*charger = dev;
}
}
return (*fuel_gauge) ? 0 : -ENODEV;
}
static const struct dm_charge_display_ops charge_animation_ops = {
.show = charge_animation_show,
};
static int charge_animation_probe(struct udevice *dev)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, soc;
/* Get PMIC: used for power off system */
ret = uclass_get_device(UCLASS_MCU, 0, &priv->mcu);
if (ret) {
if (ret == -ENODEV)
printf("Can't find MCU\n");
else
printf("Get UCLASS MCU failed: %d\n", ret);
}
/* Get fuel gauge and charger(If need) */
ret = fg_charger_get_device(&priv->fg, &priv->charger);
if (ret) {
if (ret == -ENODEV)
debug("Can't find FG\n");
else
debug("Get UCLASS FG failed: %d\n", ret);
// return ret;
}
#ifdef CONFIG_LED
ret = led_get_by_label(LED_CHARGING_NAME, &priv->led_charging);
if (!ret)
printf("Found Charging LED \n");
ret = led_get_by_label(LED_CHARGING_FULL_NAME, &priv->led_full);
if (!ret)
printf("Found Charging-Full LED\n");
ret = led_get_by_label(LED_CHARGING_START_NAME, &priv->led_start);
if (!ret)
printf("Found Charging-Start LED\n");
#endif
ret = gpio_request_by_name(dev, "powerkey-gpio", 0, &powerkey_gpio, 0);
if (dm_gpio_is_valid(&powerkey_gpio)) {
dm_gpio_set_dir_flags(&powerkey_gpio, GPIOD_IS_IN);
}
printf("Enable charge animation display\n");
return 0;
}
static const struct udevice_id charge_animation_ids[] = {
{ .compatible = "rockchip,uboot-charge" },
{ },
};
U_BOOT_DRIVER(charge_animation) = {
.name = "charge-animation",
.id = UCLASS_CHARGE_DISPLAY,
.probe = charge_animation_probe,
.of_match = charge_animation_ids,
.ops = &charge_animation_ops,
.ofdata_to_platdata = charge_animation_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct charge_animation_pdata),
.priv_auto_alloc_size = sizeof(struct charge_animation_priv),
};

View File

@@ -1,11 +0,0 @@
config DM_FUEL_GAUGE
bool "Enable driver model fuel gauge support"
depends on DM
help
This adds a simple uclass for fuel gauge.
config POWER_FG_CW201X
bool "CW201X Fuel gauge support"
depends on DM_FUEL_GAUGE
help
This adds support for CW201X fuel gauge support.

View File

@@ -3,7 +3,4 @@
# Copyright (C) 2012 Samsung Electronics
# Lukasz Majewski <l.majewski@samsung.com>
obj-$(CONFIG_$(SPL_)DM_FUEL_GAUGE) += fuel_gauge_uclass.o
obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o

View File

@@ -1,415 +0,0 @@
/*
* (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/gpio.h>
#include <dm.h>
#include <dm/device.h>
#include <errno.h>
#include <fdtdec.h>
#include <i2c.h>
// #include <linux/usb/phy-rockchip-usb2.h>
#include <malloc.h>
#include <power/battery.h>
#include <power/fuel_gauge.h>
// #include <power/pmic.h>
#include "fg_regs.h"
DECLARE_GLOBAL_DATA_PTR;
#define COMPAT_ROCKCHIP_CW201X "cw201x"
#define REG_VERSION 0x0
#define REG_VCELL 0x2
#define REG_SOC 0x4
#define REG_RRT_ALERT 0x6
#define REG_CONFIG 0x8
#define REG_MODE 0xA
#define REG_BATINFO 0x10
#define MODE_SLEEP_MASK (0x3 << 6)
#define MODE_SLEEP (0x3 << 6)
#define MODE_NORMAL (0x0 << 6)
#define MODE_QUICK_START (0x3 << 4)
#define MODE_RESTART (0xf << 0)
#define CONFIG_UPDATE_FLG (0x1 << 1)
#define ATHD (0x0 << 3)
enum charger_type {
CHARGER_TYPE_NO = 0,
CHARGER_TYPE_USB,
CHARGER_TYPE_AC,
CHARGER_TYPE_DC,
CHARGER_TYPE_UNDEF,
};
struct cw201x_info {
struct udevice *dev;
int capacity;
u32 *cw_bat_config_info;
int divider_res1;
int divider_res2;
int hw_id_check;
struct gpio_desc hw_id0;
struct gpio_desc hw_id1;
int support_dc_adp;
struct gpio_desc dc_det_gpio;
int dc_det_flag;
bool dual_cell;
};
static u8 cw201x_read(struct cw201x_info *cw201x, u8 reg)
{
u8 val;
int ret;
ret = dm_i2c_read(cw201x->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
cw201x->dev, reg);
return ret;
}
return val;
}
static int cw201x_write(struct cw201x_info *cw201x, u8 reg, u8 val)
{
int ret;
ret = dm_i2c_write(cw201x->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
cw201x->dev, reg);
return ret;
}
return 0;
}
static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
{
u8 vall, valh;
u16 val;
valh = cw201x_read(cw201x, reg);
vall = cw201x_read(cw201x, reg + 1);
val = ((u16)valh << 8) | vall;
return val;
}
static int cw201x_parse_config_info(struct cw201x_info *cw201x)
{
int ret;
int i, len, size;
const u8 *info;
struct udevice *dev = cw201x->dev;
if (dev_read_prop(dev, "bat_config_info", &len)) {
len /= sizeof(u32);
size = sizeof(*cw201x->cw_bat_config_info) * len;
cw201x->cw_bat_config_info = calloc(size, 1);
if (!cw201x->cw_bat_config_info) {
printf("calloc cw_bat_config_info fail\n");
return -EINVAL;
}
ret = dev_read_u32_array(dev, "bat_config_info",
cw201x->cw_bat_config_info, len);
if (ret) {
printf("fdtdec_get cw_bat_config_info fail\n");
return -EINVAL;
}
return 0;
}
if (!dev_read_prop(dev, "cellwise,battery-profile", &len))
return -EINVAL;
size = sizeof(*cw201x->cw_bat_config_info) * len;
cw201x->cw_bat_config_info = calloc(size, 1);
if (!cw201x->cw_bat_config_info) {
printf("calloc cw_bat_config_info fail\n");
return -EINVAL;
}
info = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", len);
if (!info) {
printf("fdtdec_get battery profile fail\n");
return -EINVAL;
}
for (i = 0; i < len; i++) {
cw201x->cw_bat_config_info[i] = info[i];
printf("%#x ", cw201x->cw_bat_config_info[i]);
if ((i+1) % 8 == 0)
printf("\n");
}
return 0;
}
static int cw201x_ofdata_to_platdata(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
int ret;
int hw_id0_val, hw_id1_val;
cw201x->dev = dev;
ret = cw201x_parse_config_info(cw201x);
if (ret)
return ret;
cw201x->dual_cell = dev_read_bool(dev, "cellwise,dual-cell");
ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
0, &cw201x->dc_det_gpio, GPIOD_IS_IN);
if (!ret) {
cw201x->support_dc_adp = 1;
printf("DC is valid\n");
} else {
printf("DC is invalid, ret=%d\n", ret);
}
cw201x->hw_id_check = dev_read_u32_default(dev, "hw_id_check", 0);
if (cw201x->hw_id_check) {
ret = gpio_request_by_name_nodev(dev_ofnode(dev),
"hw_id0_gpio", 0,
&cw201x->hw_id0, GPIOD_IS_IN);
if (ret)
return -EINVAL;
hw_id0_val = dm_gpio_get_value(&cw201x->hw_id0);
ret = gpio_request_by_name_nodev(dev_ofnode(dev),
"hw_id1_gpio", 0,
&cw201x->hw_id1, GPIOD_IS_IN);
if (ret)
return -EINVAL;
hw_id1_val = dm_gpio_get_value(&cw201x->hw_id1);
/* ID1 = 0, ID0 = 1 : Battery */
if (!hw_id0_val || hw_id1_val)
return -EINVAL;
}
cw201x->divider_res1 = dev_read_u32_default(dev, "divider_res1", 0);
cw201x->divider_res2 = dev_read_u32_default(dev, "divider_res2", 0);
return 0;
}
static int cw201x_get_vol(struct cw201x_info *cw201x)
{
u16 value16, value16_1, value16_2, value16_3;
int voltage;
int res1, res2;
int retry = 0;
__retry:
value16 = cw201x_read_half_word(cw201x, REG_VCELL);
if (value16 < 0)
return -1;
value16_1 = cw201x_read_half_word(cw201x, REG_VCELL);
if (value16_1 < 0)
return -1;
value16_2 = cw201x_read_half_word(cw201x, REG_VCELL);
if (value16_2 < 0)
return -1;
if (value16 > value16_1) {
value16_3 = value16;
value16 = value16_1;
value16_1 = value16_3;
}
if (value16_1 > value16_2) {
value16_3 = value16_1;
value16_1 = value16_2;
value16_2 = value16_3;
}
if (value16 > value16_1) {
value16_3 = value16;
value16 = value16_1;
value16_1 = value16_3;
}
voltage = value16_1 * 312 / 1024;
if (voltage <= 0 && retry < 10) {
retry++;
mdelay(20);
goto __retry;
}
if (cw201x->divider_res1 &&
cw201x->divider_res2) {
res1 = cw201x->divider_res1;
res2 = cw201x->divider_res2;
voltage = voltage * (res1 + res2) / res2;
}
if (cw201x->dual_cell)
voltage *= 2;
// printf("the cw201x voltage=%d\n", voltage);
return voltage;
}
static int cw201x_dwc_otg_check_dpdm(void)
{
#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
return rockchip_chg_get_type();
#else
printf("rockchip_chg_get_type() is not implement\n");
return CHARGER_TYPE_NO;
#endif
}
static int cw201x_get_usb_state(struct cw201x_info *cw201x)
{
int charger_type;
switch (cw201x_dwc_otg_check_dpdm()) {
case 0:
charger_type = CHARGER_TYPE_NO;
break;
case 1:
case 3:
charger_type = CHARGER_TYPE_USB;
break;
case 2:
charger_type = CHARGER_TYPE_AC;
break;
default:
charger_type = CHARGER_TYPE_NO;
break;
}
return charger_type;
}
static bool cw201x_get_dc_state(struct cw201x_info *cw201x)
{
if (dm_gpio_get_value(&cw201x->dc_det_gpio))
return true;
return false;
}
static bool cw201x_check_charge(struct cw201x_info *cw201x)
{
if (cw201x_get_usb_state(cw201x) != CHARGER_TYPE_NO)
return true;
if (cw201x_get_dc_state(cw201x))
return true;
return false;
}
static int cw201x_get_soc(struct cw201x_info *cw201x)
{
int cap, i = 0;
while (i < 10) {
mdelay(30);
cap = cw201x_read(cw201x, REG_SOC);
if ((cap < 0) || (cap > 100))
cap = cw201x->capacity;
i++;
if (cap)
break;
}
cw201x->capacity = cap;
return cw201x->capacity;
}
static int cw201x_update_get_soc(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
return cw201x_get_soc(cw201x);
}
static int cw201x_update_get_voltage(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
return cw201x_get_vol(cw201x);
}
static int cw201x_update_get_current(struct udevice *dev)
{
return 0;
}
static bool cw201x_update_get_chrg_online(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
return cw201x_check_charge(cw201x);
}
static int cw201x_capability(struct udevice *dev)
{
return FG_CAP_FUEL_GAUGE;
}
static struct dm_fuel_gauge_ops cw201x_fg_ops = {
.capability = cw201x_capability,
.get_soc = cw201x_update_get_soc,
.get_voltage = cw201x_update_get_voltage,
.get_current = cw201x_update_get_current,
.get_chrg_online = cw201x_update_get_chrg_online,
};
static int cw201x_fg_cfg(struct cw201x_info *cw201x)
{
u8 val = MODE_SLEEP;
int i;
if ((val & MODE_SLEEP_MASK) == MODE_SLEEP) {
val = MODE_NORMAL;
cw201x_write(cw201x, REG_MODE, val);
}
for (i = 0; i < 64; i++) {
cw201x_write(cw201x, REG_BATINFO + i,
(u8)cw201x->cw_bat_config_info[i]);
}
return 0;
}
static int cw201x_fg_probe(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
cw201x->dev = dev;
cw201x_fg_cfg(cw201x);
printf("vol: %d, soc: %d\n",
cw201x_get_vol(cw201x), cw201x_get_soc(cw201x));
return 0;
}
static const struct udevice_id cw201x_ids[] = {
{ .compatible = "cw201x" },
{ .compatible = "cellwise,cw2015" },
{ }
};
U_BOOT_DRIVER(cw201x_fg) = {
.name = "cw201x_fg",
.id = UCLASS_FG,
.of_match = cw201x_ids,
.probe = cw201x_fg_probe,
.ofdata_to_platdata = cw201x_ofdata_to_platdata,
.ops = &cw201x_fg_ops,
.priv_auto_alloc_size = sizeof(struct cw201x_info),
};

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@@ -1,95 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _FG_RK8XX_H_
#define _FG_RK8XX_H_
/* register definition */
#define SECONDS_REG 0X00
#define VB_MON_REG 0x21
#define THERMAL_REG 0x22
#define SUP_STS_REG 0xA0
#define USB_CTRL_REG 0xA1
#define CHRG_CTRL_REG1 0xA3
#define CHRG_CTRL_REG2 0xA4
#define CHRG_CTRL_REG3 0xA5
#define BAT_CTRL_REG 0xA6
#define BAT_HTS_TS_REG 0xA8
#define BAT_LTS_TS_REG 0xA9
#define TS_CTRL_REG 0xAC
#define ADC_CTRL_REG 0xAD
#define GGCON_REG 0xB0
#define GGSTS_REG 0xB1
#define ZERO_CUR_ADC_REGH 0xB2
#define ZERO_CUR_ADC_REGL 0xB3
#define GASCNT_CAL_REG3 0xB4
#define GASCNT_CAL_REG2 0xB5
#define GASCNT_CAL_REG1 0xB6
#define GASCNT_CAL_REG0 0xB7
#define GASCNT_REG3 0xB8
#define GASCNT_REG2 0xB9
#define GASCNT_REG1 0xBA
#define GASCNT_REG0 0xBB
#define BAT_CUR_AVG_REGH 0xBC
#define BAT_CUR_AVG_REGL 0xBD
#define TS_ADC_REGH 0xBE
#define TS_ADC_REGL 0xBF
#define RK818_TS2_ADC_REGH 0xC0
#define RK818_TS2_ADC_REGL 0xC1
#define RK816_USB_ADC_REGH 0xC0
#define RK816_USB_ADC_REGL 0xC1
#define BAT_OCV_REGH 0xC2
#define BAT_OCV_REGL 0xC3
#define BAT_VOL_REGH 0xC4
#define BAT_VOL_REGL 0xC5
#define RELAX_ENTRY_THRES_REGH 0xC6
#define RELAX_ENTRY_THRES_REGL 0xC7
#define RELAX_EXIT_THRES_REGH 0xC8
#define RELAX_EXIT_THRES_REGL 0xC9
#define RELAX_VOL1_REGH 0xCA
#define RELAX_VOL1_REGL 0xCB
#define RELAX_VOL2_REGH 0xCC
#define RELAX_VOL2_REGL 0xCD
#define RELAX_CUR1_REGH 0xCE
#define RELAX_CUR1_REGL 0xCF
#define RELAX_CUR2_REGH 0xD0
#define RELAX_CUR2_REGL 0xD1
#define CAL_OFFSET_REGH 0xD2
#define CAL_OFFSET_REGL 0xD3
#define NON_ACT_TIMER_CNT_REG 0xD4
#define VCALIB0_REGH 0xD5
#define VCALIB0_REGL 0xD6
#define VCALIB1_REGH 0xD7
#define VCALIB1_REGL 0xD8
#define FCC_GASCNT_REG3 0xD9
#define FCC_GASCNT_REG2 0xDA
#define FCC_GASCNT_REG1 0xDB
#define FCC_GASCNT_REG0 0xDC
#define IOFFSET_REGH 0xDD
#define IOFFSET_REGL 0xDE
#define SLEEP_CON_SAMP_CUR_REG 0xDF
#define SOC_REG 0xE0
#define REMAIN_CAP_REG3 0xE1
#define REMAIN_CAP_REG2 0xE2
#define REMAIN_CAP_REG1 0xE3
#define REMAIN_CAP_REG0 0xE4
#define UPDAT_LEVE_REG 0xE5
#define NEW_FCC_REG3 0xE6
#define NEW_FCC_REG2 0xE7
#define NEW_FCC_REG1 0xE8
#define NEW_FCC_REG0 0xE9
#define NON_ACT_TIMER_CNT_SAVE_REG 0xEA
#define OCV_VOL_VALID_REG 0xEB
#define REBOOT_CNT_REG 0xEC
#define POFFSET_REG 0xED
#define MISC_MARK_REG 0xEE
#define HALT_CNT_REG 0xEF
#define DATA15_REG 0xEF
#define DATA16_REG 0xF0
#define DATA17_REG 0xF1
#define DATA18_REG 0xF2
#endif

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@@ -1,136 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <errno.h>
#include <dm.h>
#include <power/fuel_gauge.h>
DECLARE_GLOBAL_DATA_PTR;
int fuel_gauge_capability(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->capability)
return (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE);
return ops->capability(dev);
}
int fuel_gauge_bat_is_exist(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->bat_is_exist)
return -ENOSYS;
return ops->bat_is_exist(dev);
}
int fuel_gauge_get_current(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_current)
return -ENOSYS;
return ops->get_current(dev);
}
int fuel_gauge_get_voltage(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_voltage)
return -ENOSYS;
return ops->get_voltage(dev);
}
int fuel_gauge_update_get_soc(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_soc)
return -ENOSYS;
return ops->get_soc(dev);
}
bool fuel_gauge_get_chrg_online(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_chrg_online)
return -ENOSYS;
return ops->get_chrg_online(dev);
}
int fuel_gauge_get_temperature(struct udevice *dev, int *temp)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_temperature)
return -ENOSYS;
return ops->get_temperature(dev, temp);
}
int charger_set_charger_voltage(struct udevice *dev, int uV)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_voltage)
return -ENOSYS;
return ops->set_charger_voltage(dev, uV);
}
int charger_set_current(struct udevice *dev, int ichrg_uA)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_current)
return -ENOSYS;
return ops->set_charger_current(dev, ichrg_uA);
}
int charger_set_iprechg_current(struct udevice *dev, int iprechrg_uA)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_iprechg_current)
return -ENOSYS;
return ops->set_iprechg_current(dev, iprechrg_uA);
}
int charger_set_enable(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_enable)
return -ENOSYS;
return ops->set_charger_enable(dev);
}
int charger_set_disable(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_disable)
return -ENOSYS;
return ops->set_charger_disable(dev);
}
UCLASS_DRIVER(fuel_guage) = {
.id = UCLASS_FG,
.name = "fuel_gauge",
};

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@@ -1,40 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config DM_POWER_DELIVERY
bool "Enable driver model power delivery support"
depends on DM
help
This adds a simple uclass for power delivery.
config TYPEC_TCPM
tristate "USB Type-C Port Controller Manager"
depends on DM && DM_POWER_DELIVERY
help
The Type-C Port Controller Manager provides a USB PD and USB Type-C
state machine for use with Type-C Port Controllers.
config TYPEC_TCPCI
tristate "Type-C Port Controller Interface driver"
depends on DM && DM_POWER_DELIVERY && DM_I2C
help
Type-C Port Controller driver for TCPCI-compliant controller.
if TYPEC_TCPCI
config TYPEC_HUSB311
tristate "Hynetek HUSB311 Type-C chip driver"
depends on DM && DM_POWER_DELIVERY && DM_I2C
help
Hynetek HUSB311 Type-C chip driver that works with
Type-C Port Controller Manager to provide USB PD and USB
Type-C functionalities.
endif # TYPEC_TCPCI
config TYPEC_FUSB302
tristate "Fairchild FUSB302 Type-C chip driver"
depends on DM && DM_POWER_DELIVERY && DM_I2C
help
The Fairchild FUSB302 Type-C chip driver that works with
Type-C Port Controller Manager to provide USB PD and USB
Type-C functionalities.

View File

@@ -1,7 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_$(SPL_)DM_POWER_DELIVERY) += power_delivery_uclass.o
obj-$(CONFIG_TYPEC_TCPM) += tcpm.o
obj-$(CONFIG_TYPEC_FUSB302) += fusb302.o
obj-$(CONFIG_TYPEC_TCPCI) += tcpci.o
obj-$(CONFIG_TYPEC_HUSB311) += tcpci_husb311.o

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@@ -1,31 +0,0 @@
/*
* (C) Copyright 2022 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <errno.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <power/power_delivery/power_delivery.h>
DECLARE_GLOBAL_DATA_PTR;
int power_delivery_get_data(struct udevice *dev, struct power_delivery_data *pd_data)
{
const struct dm_power_delivery_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_current || !ops->get_voltage || !ops->get_online)
return -ENOSYS;
pd_data->voltage = ops->get_voltage(dev);
pd_data->current = ops->get_current(dev);
pd_data->online = ops->get_online(dev);
return 0;
}
UCLASS_DRIVER(power_delivery) = {
.id = UCLASS_PD,
.name = "power_delivery",
};

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@@ -1,778 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015-2017 Google, Inc
*
* USB Type-C Port Controller Interface.
*/
#include <dm.h>
#include <i2c.h>
#include <asm/gpio.h>
#include <power/power_delivery/pd.h>
#include <power/power_delivery/tcpm.h>
#include <power/power_delivery/typec.h>
#include <power/power_delivery/power_delivery.h>
#include "tcpci.h"
#define PD_RETRY_COUNT 3
#define tcpc_presenting_cc1_rd(reg) \
(!(TCPC_ROLE_CTRL_DRP & (reg)) && \
(((reg) & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) == \
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT)))
#define tcpc_presenting_cc2_rd(reg) \
(!(TCPC_ROLE_CTRL_DRP & (reg)) && \
(((reg) & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) == \
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT)))
struct tcpci {
struct udevice *dev;
struct tcpm_port *port;
bool controls_vbus;
bool gpio_cc_int_present;
struct tcpc_dev tcpc;
struct tcpci_data *data;
struct gpio_desc gpio_cc_int;
};
struct tcpci_chip {
struct udevice *udev;
struct tcpci *tcpci;
struct tcpci_data data;
};
static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
{
return container_of(tcpc, struct tcpci, tcpc);
}
static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val)
{
int ret = 0;
u8 buffer[2];
ret = dm_i2c_read(tcpci->dev, reg, buffer, 2);
if (ret) {
printf("%s: cannot read %02x, ret=%d\n",
__func__, reg, ret);
return ret;
}
*val = ((buffer[1] << 8) & 0xFF00) | (buffer[0] & 0xFF);
return ret;
}
static int tcpci_block_read(struct tcpci *tcpci, unsigned int reg,
u8 *data, u8 length)
{
int ret = 0;
ret = dm_i2c_read(tcpci->dev, reg, data, length);
if (ret)
printf("%s: cannot block read 0x%02x, len=%d, ret=%d\n",
__func__, reg, length, ret);
return ret;
}
static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
{
int ret = 0;
u8 buffer[2];
buffer[0] = val & 0xFF;
buffer[1] = (val >> 8) & 0xFF;
ret = dm_i2c_write(tcpci->dev, reg, buffer, 2);
if (ret)
printf("%s: cannot write 0x%02x, ret=%d\n",
__func__, reg, ret);
return ret;
}
static int tcpci_block_write(struct tcpci *tcpci, unsigned int reg,
u8 *data, u8 length)
{
int ret = 0;
ret = dm_i2c_write(tcpci->dev, reg, data, length);
if (ret)
printf("%s: cannot block write 0x%02x, len=%d, ret=%d\n",
__func__, reg, length, ret);
return ret;
}
static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
switch (cc) {
case TYPEC_CC_RA:
reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
case TYPEC_CC_RD:
reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
case TYPEC_CC_RP_DEF:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_DEF <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_1_5:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_1_5 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_3_0:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_3_0 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_OPEN:
default:
reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
}
ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
if (ret)
return ret;
return 0;
}
static int tcpci_start_toggling(struct tcpc_dev *tcpc,
enum typec_port_type port_type,
enum typec_cc_status cc)
{
int ret;
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg = TCPC_ROLE_CTRL_DRP;
if (port_type != TYPEC_PORT_DRP)
return -EOPNOTSUPP;
/* Handle vendor drp toggling */
if (tcpci->data->start_drp_toggling) {
ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc);
if (ret < 0)
return ret;
}
switch (cc) {
default:
case TYPEC_CC_RP_DEF:
reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_1_5:
reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_3_0:
reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
}
if (cc == TYPEC_CC_RD)
reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
else
reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
if (ret < 0)
return ret;
return dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_LOOK4CONNECTION);
}
static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
{
switch (cc) {
case 0x1:
return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
case 0x2:
return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
case 0x3:
if (sink)
return TYPEC_CC_RP_3_0;
/* fall through */
case 0x0:
default:
return TYPEC_CC_OPEN;
}
}
static int tcpci_get_cc(struct tcpc_dev *tcpc,
enum typec_cc_status *cc1, enum typec_cc_status *cc2)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg, role_control;
role_control = dm_i2c_reg_read(tcpci->dev, TCPC_ROLE_CTRL);
if (role_control < 0)
return role_control;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_CC_STATUS);
if (reg < 0)
return reg;
*cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
TCPC_CC_STATUS_CC1_MASK,
reg & TCPC_CC_STATUS_TERM ||
tcpc_presenting_cc1_rd(role_control));
*cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
TCPC_CC_STATUS_CC2_MASK,
reg & TCPC_CC_STATUS_TERM ||
tcpc_presenting_cc2_rd(role_control));
return 0;
}
static int tcpci_set_polarity(struct tcpc_dev *tcpc,
enum typec_cc_polarity polarity)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
enum typec_cc_status cc1, cc2;
/* Obtain Rp setting from role control */
reg = dm_i2c_reg_read(tcpci->dev, TCPC_ROLE_CTRL);
if (reg < 0)
return reg;
ret = tcpci_get_cc(tcpc, &cc1, &cc2);
if (ret < 0)
return ret;
/*
* When port has drp toggling enabled, ROLE_CONTROL would only have the initial
* terminations for the toggling and does not indicate the final cc
* terminations when ConnectionResult is 0 i.e. drp toggling stops and
* the connection is resolbed. Infer port role from TCPC_CC_STATUS based on the
* terminations seen. The port role is then used to set the cc terminations.
*/
if (reg & TCPC_ROLE_CTRL_DRP) {
/* Disable DRP for the OPEN setting to take effect */
reg = reg & ~TCPC_ROLE_CTRL_DRP;
if (polarity == TYPEC_POLARITY_CC2) {
reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
/* Local port is source */
if (cc2 == TYPEC_CC_RD)
/* Role control would have the Rp setting when DRP was enabled */
reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT;
else
reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT;
} else {
reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
/* Local port is source */
if (cc1 == TYPEC_CC_RD)
/* Role control would have the Rp setting when DRP was enabled */
reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT;
else
reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT;
}
}
if (polarity == TYPEC_POLARITY_CC2)
reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT;
else
reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
if (ret < 0)
return ret;
return dm_i2c_reg_write(tcpci->dev, TCPC_TCPC_CTRL,
(polarity == TYPEC_POLARITY_CC2) ?
TCPC_TCPC_CTRL_ORIENTATION : 0);
}
static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
int ret;
unsigned int reg;
/* Handle vendor set vconn */
if (tcpci->data->set_vconn) {
ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable);
if (ret < 0)
return ret;
}
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_CTRL);
if (reg)
return reg;
reg &= ~TCPC_POWER_CTRL_VCONN_ENABLE;
reg |= enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0;
return dm_i2c_reg_write(tcpci->dev, TCPC_POWER_CTRL, reg);
}
static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
enum typec_role role, enum typec_data_role data)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
if (role == TYPEC_SOURCE)
reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
if (data == TYPEC_HOST)
reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_MSG_HDR_INFO, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg = 0;
int ret;
if (enable)
reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_RX_DETECT, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_get_vbus(struct tcpc_dev *tcpc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS);
if (reg < 0)
return reg;
return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
}
static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
int ret;
/* Disable both source and sink first before enabling anything */
if (!source) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_DISABLE_SRC_VBUS);
if (ret < 0)
return ret;
}
if (!sink) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_DISABLE_SINK_VBUS);
if (ret < 0)
return ret;
}
if (source) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_SRC_VBUS_DEFAULT);
if (ret < 0)
return ret;
}
if (sink) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_SINK_VBUS);
if (ret < 0)
return ret;
}
return 0;
}
static int tcpci_pd_transmit(struct tcpc_dev *tcpc,
enum tcpm_transmit_type type,
const struct pd_message *msg,
unsigned int negotiated_rev)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
u16 header = msg ? le16_to_cpu(msg->header) : 0;
unsigned int reg, cnt;
int ret;
cnt = msg ? pd_header_cnt(header) * 4 : 0;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_TX_BYTE_CNT, cnt + 2);
if (ret < 0)
return ret;
ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
if (ret < 0)
return ret;
if (cnt > 0) {
ret = tcpci_block_write(tcpci, TCPC_TX_DATA,
(u8 *)&msg->payload, cnt);
if (ret < 0)
return ret;
}
reg = (PD_RETRY_COUNT << TCPC_TRANSMIT_RETRY_SHIFT) |
(type << TCPC_TRANSMIT_TYPE_SHIFT);
ret = dm_i2c_reg_write(tcpci->dev, TCPC_TRANSMIT, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_init(struct tcpc_dev *tcpc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int timeout = 0; /* XXX */
unsigned int reg;
int ret;
while (timeout < 100) {
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS);
if (reg < 0)
return reg;
if (!(reg & TCPC_POWER_STATUS_UNINIT))
break;
timeout++;
udelay(200);
}
if (timeout >= 100)
return -ETIMEDOUT;
/* Handle vendor init */
if (tcpci->data->init) {
ret = tcpci->data->init(tcpci, tcpci->data);
if (ret < 0)
return ret;
}
/* Clear all events */
ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
if (ret < 0)
return ret;
if (tcpci->controls_vbus)
reg = TCPC_POWER_STATUS_VBUS_PRES;
else
reg = 0;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_POWER_STATUS_MASK, reg);
if (ret < 0)
return ret;
/* Enable Vbus detection */
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_ENABLE_VBUS_DETECT);
if (ret < 0)
return ret;
reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
if (tcpci->controls_vbus)
reg |= TCPC_ALERT_POWER_STATUS;
return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
}
static void tcpci_poll_event(struct tcpc_dev *tcpc)
{
u16 status;
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
tcpci_read16(tcpci, TCPC_ALERT, &status);
/*
* Clear alert status for everything except RX_STATUS, which shouldn't
* be cleared until we have successfully retrieved message.
*/
if (status & ~TCPC_ALERT_RX_STATUS)
tcpci_write16(tcpci, TCPC_ALERT,
status & ~TCPC_ALERT_RX_STATUS);
if (status & TCPC_ALERT_CC_STATUS)
tcpm_cc_change(tcpci->port);
if (status & TCPC_ALERT_POWER_STATUS) {
unsigned int reg;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS_MASK);
if (reg < 0)
return;
/*
* If power status mask has been reset, then the TCPC
* has reset.
*/
if (reg == 0xff)
tcpm_tcpc_reset(tcpci->port);
else
tcpm_vbus_change(tcpci->port);
}
if (status & TCPC_ALERT_RX_STATUS) {
struct pd_message msg;
unsigned int cnt, payload_cnt;
u16 header;
cnt = dm_i2c_reg_read(tcpci->dev, TCPC_RX_BYTE_CNT);
if (cnt < 0)
return;
/*
* 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14
* of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is
* defined in table 4-36 as one greater than the number of
* bytes received. And that number includes the header. So:
*/
if (cnt > 3)
payload_cnt = cnt - (1 + sizeof(msg.header));
else
payload_cnt = 0;
tcpci_read16(tcpci, TCPC_RX_HDR, &header);
msg.header = cpu_to_le16(header);
if ((payload_cnt > sizeof(msg.payload)))
payload_cnt = sizeof(msg.payload);
if (payload_cnt > 0)
tcpci_block_read(tcpci, TCPC_RX_DATA,
(u8 *)&msg.payload, payload_cnt);
/* Read complete, clear RX status alert bit */
tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
tcpm_pd_receive(tcpci->port, &msg);
}
if (status & TCPC_ALERT_RX_HARD_RST)
tcpm_pd_hard_reset(tcpci->port);
if (status & TCPC_ALERT_TX_SUCCESS)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
else if (status & TCPC_ALERT_TX_DISCARDED)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
else if (status & TCPC_ALERT_TX_FAILED)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
}
static int tcpci_enter_low_power_mode(struct tcpc_dev *tcpc,
bool attached, bool pd_capable)
{
int ret;
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
/* Disable chip interrupts before unregistering port */
ret = tcpci_write16(tcpci, TCPC_ALERT_MASK, 0);
if (ret < 0)
return ret;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_BMCIO_CTRL);
if (reg < 0)
return reg;
/*
* For Type-C devices with PD capability, Only disable VBUS detect,
* do not diable 24M oscillator for BMC communication. Otherwise,
* data packets cannot be received.
*/
if (attached && pd_capable)
reg &= ~TCPC_BMCIO_VBUS_DETECT_MASK;
else
reg &= ~(TCPC_BMCIO_VBUS_DETECT_MASK | TCPC_BMCIO_24M_OSC_MASK);
return dm_i2c_reg_write(tcpci->dev, TCPC_BMCIO_CTRL, reg);
}
static int tcpci_parse_config(struct tcpci *tcpci)
{
tcpci->controls_vbus = true; /* XXX */
tcpci->tcpc.connector_node = dev_read_subnode(tcpci->dev, "connector");
if (!ofnode_valid(tcpci->tcpc.connector_node)) {
printf("%s: 'connector' node is not found\n", __func__);
return -EINVAL;
}
return 0;
}
struct tcpci *tcpci_register_port(struct udevice *dev, struct tcpci_data *data)
{
struct tcpci *tcpci;
int err;
tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL);
if (!tcpci)
return ERR_PTR(-ENOMEM);
err = gpio_request_by_name(dev, "int-n-gpios", 0, &tcpci->gpio_cc_int, GPIOD_IS_IN);
if (err) {
printf("%s: fail to get int GPIO: err=%d\n", __func__, err);
tcpci->gpio_cc_int_present = false;
} else {
printf("%s: success to get int GPIO: err=%d\n", __func__, err);
tcpci->gpio_cc_int_present = true;
}
tcpci->dev = dev;
tcpci->data = data;
tcpci->tcpc.init = tcpci_init;
tcpci->tcpc.get_vbus = tcpci_get_vbus;
tcpci->tcpc.set_vbus = tcpci_set_vbus;
tcpci->tcpc.set_cc = tcpci_set_cc;
tcpci->tcpc.get_cc = tcpci_get_cc;
tcpci->tcpc.set_polarity = tcpci_set_polarity;
tcpci->tcpc.set_vconn = tcpci_set_vconn;
tcpci->tcpc.start_toggling = tcpci_start_toggling;
tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
tcpci->tcpc.set_roles = tcpci_set_roles;
tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
tcpci->tcpc.poll_event = tcpci_poll_event;
tcpci->tcpc.enter_low_power_mode = tcpci_enter_low_power_mode;
err = tcpci_parse_config(tcpci);
if (err < 0)
return ERR_PTR(err);
tcpci->port = tcpm_port_init(tcpci->dev, &tcpci->tcpc);
if (IS_ERR(tcpci->port)) {
printf("%s: failed to tcpm port init\n", __func__);
return ERR_CAST(tcpci->port);
}
// tcpm_tcpc_reset(tcpci->port);
tcpm_poll_event(tcpci->port);
return tcpci;
}
EXPORT_SYMBOL_GPL(tcpci_register_port);
void tcpci_unregister_port(struct tcpci *tcpci)
{
tcpm_uninit_port(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_unregister_port);
int tcpci_get_voltage_fun(struct tcpci *tcpci)
{
return tcpm_get_voltage(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_get_voltage_fun);
int tcpci_get_current_fun(struct tcpci *tcpci)
{
return tcpm_get_current(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_get_current_fun);
int tcpci_get_online_fun(struct tcpci *tcpci)
{
return tcpm_get_online(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_get_online_fun);
static int tcpci_probe(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
int err;
u16 val = 0;
chip->udev = dev;
/* Disable chip interrupts before requesting irq */
err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, val);
if (err < 0)
return err;
chip->tcpci = tcpci_register_port(chip->udev, &chip->data);
if (IS_ERR(chip->tcpci))
return PTR_ERR(chip->tcpci);
return 0;
}
static int tcpci_remove(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
int err;
/* Disable chip interrupts before unregistering port */
err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
if (err < 0)
return err;
tcpci_unregister_port(chip->tcpci);
return 0;
}
static int tcpci_get_voltage(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
return tcpm_get_voltage(chip->tcpci->port);
}
static int tcpci_get_current(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
return tcpm_get_current(chip->tcpci->port);
}
static int tcpci_get_online(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
return tcpm_get_online(chip->tcpci->port);
}
static struct dm_power_delivery_ops tcpci_ops = {
.get_voltage = tcpci_get_voltage,
.get_current = tcpci_get_current,
.get_online = tcpci_get_online,
};
static const struct udevice_id tcpci_ids[] = {
{ .compatible = "nxp,ptn5110", },
{},
};
U_BOOT_DRIVER(tcpci) = {
.name = "tcpci",
.id = UCLASS_PD,
.of_match = tcpci_ids,
.ops = &tcpci_ops,
.probe = tcpci_probe,
.remove = tcpci_remove,
.priv_auto_alloc_size = sizeof(struct tcpci_chip),
}
MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
MODULE_LICENSE("GPL");

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@@ -1,150 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2015-2017 Google, Inc
*
* USB Type-C Port Controller Interface.
*/
#ifndef __LINUX_USB_TCPCI_H
#define __LINUX_USB_TCPCI_H
#define TCPC_VENDOR_ID 0x0
#define TCPC_PRODUCT_ID 0x2
#define TCPC_BCD_DEV 0x4
#define TCPC_TC_REV 0x6
#define TCPC_PD_REV 0x8
#define TCPC_PD_INT_REV 0xa
#define TCPC_ALERT 0x10
#define TCPC_ALERT_VBUS_DISCNCT BIT(11)
#define TCPC_ALERT_RX_BUF_OVF BIT(10)
#define TCPC_ALERT_FAULT BIT(9)
#define TCPC_ALERT_V_ALARM_LO BIT(8)
#define TCPC_ALERT_V_ALARM_HI BIT(7)
#define TCPC_ALERT_TX_SUCCESS BIT(6)
#define TCPC_ALERT_TX_DISCARDED BIT(5)
#define TCPC_ALERT_TX_FAILED BIT(4)
#define TCPC_ALERT_RX_HARD_RST BIT(3)
#define TCPC_ALERT_RX_STATUS BIT(2)
#define TCPC_ALERT_POWER_STATUS BIT(1)
#define TCPC_ALERT_CC_STATUS BIT(0)
#define TCPC_ALERT_MASK 0x12
#define TCPC_POWER_STATUS_MASK 0x14
#define TCPC_FAULT_STATUS_MASK 0x15
#define TCPC_CONFIG_STD_OUTPUT 0x18
#define TCPC_TCPC_CTRL 0x19
#define TCPC_TCPC_CTRL_ORIENTATION BIT(0)
#define TCPC_ROLE_CTRL 0x1a
#define TCPC_ROLE_CTRL_DRP BIT(6)
#define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4
#define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3
#define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0
#define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1
#define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2
#define TCPC_ROLE_CTRL_CC2_SHIFT 2
#define TCPC_ROLE_CTRL_CC2_MASK 0x3
#define TCPC_ROLE_CTRL_CC1_SHIFT 0
#define TCPC_ROLE_CTRL_CC1_MASK 0x3
#define TCPC_ROLE_CTRL_CC_RA 0x0
#define TCPC_ROLE_CTRL_CC_RP 0x1
#define TCPC_ROLE_CTRL_CC_RD 0x2
#define TCPC_ROLE_CTRL_CC_OPEN 0x3
#define TCPC_FAULT_CTRL 0x1b
#define TCPC_POWER_CTRL 0x1c
#define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0)
#define TCPC_CC_STATUS 0x1d
#define TCPC_CC_STATUS_TOGGLING BIT(5)
#define TCPC_CC_STATUS_TERM BIT(4)
#define TCPC_CC_STATUS_CC2_SHIFT 2
#define TCPC_CC_STATUS_CC2_MASK 0x3
#define TCPC_CC_STATUS_CC1_SHIFT 0
#define TCPC_CC_STATUS_CC1_MASK 0x3
#define TCPC_POWER_STATUS 0x1e
#define TCPC_POWER_STATUS_UNINIT BIT(6)
#define TCPC_POWER_STATUS_VBUS_DET BIT(3)
#define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
#define TCPC_FAULT_STATUS 0x1f
#define TCPC_COMMAND 0x23
#define TCPC_CMD_WAKE_I2C 0x11
#define TCPC_CMD_DISABLE_VBUS_DETECT 0x22
#define TCPC_CMD_ENABLE_VBUS_DETECT 0x33
#define TCPC_CMD_DISABLE_SINK_VBUS 0x44
#define TCPC_CMD_SINK_VBUS 0x55
#define TCPC_CMD_DISABLE_SRC_VBUS 0x66
#define TCPC_CMD_SRC_VBUS_DEFAULT 0x77
#define TCPC_CMD_SRC_VBUS_HIGH 0x88
#define TCPC_CMD_LOOK4CONNECTION 0x99
#define TCPC_CMD_RXONEMORE 0xAA
#define TCPC_CMD_I2C_IDLE 0xFF
#define TCPC_DEV_CAP_1 0x24
#define TCPC_DEV_CAP_2 0x26
#define TCPC_STD_INPUT_CAP 0x28
#define TCPC_STD_OUTPUT_CAP 0x29
#define TCPC_MSG_HDR_INFO 0x2e
#define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3)
#define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0)
#define TCPC_MSG_HDR_INFO_REV_SHIFT 1
#define TCPC_MSG_HDR_INFO_REV_MASK 0x3
#define TCPC_RX_DETECT 0x2f
#define TCPC_RX_DETECT_HARD_RESET BIT(5)
#define TCPC_RX_DETECT_SOP BIT(0)
#define TCPC_RX_BYTE_CNT 0x30
#define TCPC_RX_BUF_FRAME_TYPE 0x31
#define TCPC_RX_HDR 0x32
#define TCPC_RX_DATA 0x34 /* through 0x4f */
#define TCPC_TRANSMIT 0x50
#define TCPC_TRANSMIT_RETRY_SHIFT 4
#define TCPC_TRANSMIT_RETRY_MASK 0x3
#define TCPC_TRANSMIT_TYPE_SHIFT 0
#define TCPC_TRANSMIT_TYPE_MASK 0x7
#define TCPC_TX_BYTE_CNT 0x51
#define TCPC_TX_HDR 0x52
#define TCPC_TX_DATA 0x54 /* through 0x6f */
#define TCPC_VBUS_VOLTAGE 0x70
#define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72
#define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74
#define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76
#define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78
#define TCPC_BMCIO_CTRL 0x90
#define TCPC_BMCIO_VBUS_DETECT_MASK BIT(1)
#define TCPC_BMCIO_VBUS_DETECT_ENABLE BIT(1)
#define TCPC_BMCIO_VBUS_DETECT_DISABLE 0
#define TCPC_BMCIO_24M_OSC_MASK BIT(0)
#define TCPC_BMCIO_ENABLE_24M_OSC BIT(0)
#define TCPC_BMCIO_DISABLE_24M_OSC 0
struct tcpci;
struct tcpci_data {
struct regmap *regmap;
int (*init)(struct tcpci *tcpci, struct tcpci_data *data);
int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data,
bool enable);
int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
enum typec_cc_status cc);
};
struct tcpci *tcpci_register_port(struct udevice *dev, struct tcpci_data *data);
void tcpci_unregister_port(struct tcpci *tcpci);
int tcpci_get_voltage_fun(struct tcpci *tcpci);
int tcpci_get_current_fun(struct tcpci *tcpci);
int tcpci_get_online_fun(struct tcpci *tcpci);
irqreturn_t tcpci_irq(struct tcpci *tcpci);
#endif /* __LINUX_USB_TCPCI_H */

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@@ -1,229 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2021 Rockchip Co.,Ltd.
* Author: Wang Jie <dave.wang@rock-chips.com>
*
* Hynetek Husb311 Type-C Chip Driver
*/
#include <dm.h>
#include <i2c.h>
#include <asm/gpio.h>
#include <power/power_delivery/tcpm.h>
#include <power/power_delivery/power_delivery.h>
#include "tcpci.h"
#define HUSB311_VID 0x2E99
#define HUSB311_PID 0x0311
#define HUSB311_TCPC_I2C_RESET 0x9E
#define HUSB311_TCPC_SOFTRESET 0xA0
#define HUSB311_TCPC_FILTER 0xA1
#define HUSB311_TCPC_TDRP 0xA2
#define HUSB311_TCPC_DCSRCDRP 0xA3
#define HUSB311_I2C_RETRY_MAX_CNT 3
struct husb311_chip {
struct udevice *udev;
struct tcpci_data data;
struct tcpci *tcpci;
};
static int husb311_read16(struct husb311_chip *chip, unsigned int reg)
{
int ret = 0;
u8 buffer[2];
ret = dm_i2c_read(chip->udev, reg, buffer, 2);
if (ret < 0) {
printf("%s: cannot read %02x, ret=%d\n",
__func__, reg, ret);
return ret;
}
ret = ((buffer[1] << 8) & 0xFF00) + (buffer[0] & 0xFF);
return ret;
}
static int husb311_write8(struct husb311_chip *chip, unsigned int reg, u8 val)
{
int ret = 0;
int i;
for (i = 0; i < HUSB311_I2C_RETRY_MAX_CNT; i++) {
ret = dm_i2c_write(chip->udev, reg, &val, 1);
if (!ret)
break;
else
udelay(200);
}
if (ret)
printf("%s: cannot write 0x%02x to 0x%02x, ret=%d\n",
__func__, val, reg, ret);
return ret;
}
static int husb311_write16(struct husb311_chip *chip, unsigned int reg, u16 val)
{
int ret = 0;
u8 buffer[2];
buffer[0] = val & 0xFF;
buffer[1] = (val >> 8) & 0xFF;
ret = dm_i2c_write(chip->udev, reg, buffer, 2);
if (ret)
printf("%s: cannot write 0x%02x, len=%d, ret=%d\n",
__func__, reg, 2, ret);
return ret;
}
static struct husb311_chip *tdata_to_husb311(struct tcpci_data *tdata)
{
return container_of(tdata, struct husb311_chip, data);
}
static int husb311_sw_reset(struct husb311_chip *chip)
{
/* soft reset */
return husb311_write8(chip, HUSB311_TCPC_SOFTRESET, 0x01);
}
static int husb311_init(struct tcpci *tcpci, struct tcpci_data *tdata)
{
int ret;
struct husb311_chip *chip = tdata_to_husb311(tdata);
/* I2C reset : (val + 1) * 12.5ms */
ret = husb311_write8(chip, HUSB311_TCPC_I2C_RESET, 0x8F);
/* tTCPCfilter : (26.7 * val) us */
ret |= husb311_write8(chip, HUSB311_TCPC_FILTER, 0x0F);
/* tDRP : (51.2 + 6.4 * val) ms */
ret |= husb311_write8(chip, HUSB311_TCPC_TDRP, 0x04);
/* dcSRC.DRP : 33% */
ret |= husb311_write16(chip, HUSB311_TCPC_DCSRCDRP, 330);
if (ret)
printf("%s: fail to init registers(%d)\n", __func__, ret);
return ret;
}
static int husb311_check_revision(struct husb311_chip *chip)
{
int ret;
ret = husb311_read16(chip, TCPC_VENDOR_ID);
if (ret < 0) {
printf("%s: fail to read Vendor id(%d)\n", __func__, ret);
return ret;
}
if (ret != HUSB311_VID) {
printf("%s: vid is not correct, 0x%04x\n", __func__, ret);
return -ENODEV;
}
ret = husb311_read16(chip, TCPC_PRODUCT_ID);
if (ret < 0) {
printf("%s: fail to read Product id(%d)\n", __func__, ret);
return ret;
}
if (ret != HUSB311_PID) {
printf("%s: pid is not correct, 0x%04x\n", __func__, ret);
return -ENODEV;
}
return 0;
}
static int husb311_probe(struct udevice *dev)
{
int ret;
struct husb311_chip *chip = dev_get_priv(dev);
chip->udev = dev;
ret = husb311_check_revision(chip);
if (ret < 0) {
printf("%s: check vid/pid fail(%d)\n", __func__, ret);
return ret;
}
ret = husb311_sw_reset(chip);
if (ret) {
printf("%s: fail to soft reset, ret = %d\n", __func__, ret);
return ret;
}
chip->data.init = husb311_init;
chip->tcpci = tcpci_register_port(chip->udev, &chip->data);
if (IS_ERR(chip->tcpci))
return PTR_ERR(chip->tcpci);
return 0;
}
static int husb311_remove(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
int ret = 0;
printf("PD chip husb311 remove\n");
/* Disable chip interrupts before unregistering port */
ret = husb311_write16(chip, TCPC_ALERT_MASK, 0);
if (ret < 0)
return ret;
tcpci_unregister_port(chip->tcpci);
return 0;
}
static int husb311_get_voltage(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
return tcpci_get_voltage_fun(chip->tcpci);
}
static int husb311_get_current(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
return tcpci_get_current_fun(chip->tcpci);
}
static int husb311_get_online(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
return tcpci_get_online_fun(chip->tcpci);
}
static struct dm_power_delivery_ops husb311_ops = {
.get_voltage = husb311_get_voltage,
.get_current = husb311_get_current,
.get_online = husb311_get_online,
};
static const struct udevice_id husb311_ids[] = {
{ .compatible = "hynetek,husb311" },
{},
};
U_BOOT_DRIVER(husb311) = {
.name = "husb311",
.id = UCLASS_PD,
.of_match = husb311_ids,
.ops = &husb311_ops,
.probe = husb311_probe,
.remove = husb311_remove,
.priv_auto_alloc_size = sizeof(struct husb311_chip),
};
MODULE_AUTHOR("Wang Jie <dave.wang@rock-chips.com>");
MODULE_DESCRIPTION("Husb311 USB Type-C Port Controller Interface Driver");
MODULE_LICENSE("GPL v2");

File diff suppressed because it is too large Load Diff

View File

@@ -93,16 +93,6 @@ config TPM_ST33ZP24_SPI
to the device using the standard TPM Interface Specification (TIS)
protocol
config TPM_Z32H330TC_SPI
bool "STMicroelectronics Z32H330TC SPI TPM"
depends on TPM_V1 && DM_SPI
---help---
This driver supports STMicroelectronics TPM devices connected on the SP
I bus.
The usual tpm operations and the 'tpm' command can be used to talk
to the device using the standard TPM Interface Specification (TIS)
protocol
config TPM_FLUSH_RESOURCES
bool "Enable TPM resource flushing support"
depends on TPM_V1

View File

@@ -34,7 +34,10 @@
*/
void xhci_flush_cache(uintptr_t addr, u32 len)
{
BUG_ON((void *)addr == NULL || len == 0);
// th1520 will load fw_dymaic.bin into 0x0
// so disable it
// load usb 0:2 0x0 fw_dynamic.bin
//BUG_ON((void *)addr == NULL || len == 0);
flush_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));
@@ -49,7 +52,10 @@ void xhci_flush_cache(uintptr_t addr, u32 len)
*/
void xhci_inval_cache(uintptr_t addr, u32 len)
{
BUG_ON((void *)addr == NULL || len == 0);
// th1520 will load fw_dymaic.bin into 0x0
// so disable it
// load usb 0:2 0x0 fw_dynamic.bin
//BUG_ON((void *)addr == NULL || len == 0);
invalidate_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));

View File

@@ -12,7 +12,6 @@ enum ili9881c_op {
ILI9881C_COMMAND,
};
struct ili9881c_instr {
enum ili9881c_op op;
@@ -481,7 +480,6 @@ static int ili9881c_panel_ofdata_to_platdata(struct udevice *dev)
mdelay(100);
}
/* power gpios */
ret = gpio_request_by_name(dev, "lcd-en-gpios", 0,
&priv->lcd_en, GPIOD_IS_OUT);

2
env/env.c vendored
View File

@@ -243,7 +243,7 @@ int env_save(void)
if (!env_has_inited(drv->location))
return -ENODEV;
// printf("Saving Environment to %s... ", drv->name);
printf("Saving Environment to %s... ", drv->name);
ret = drv->save();
if (ret)
printf("Failed (%d)\n", ret);

View File

@@ -145,6 +145,7 @@
"dtb_addr=0x03800000\0" \
"fdt_addr_r=0x03800000\0" \
"fdtoverlay_addr_r=0x03700000\0" \
"initrd_high=0x1a000000\0" \
"kernel_addr_r=0x00200000\0" \
"ramdisk_addr_r=0x06000000\0" \
"boot_conf_addr_r=0xc0000000\0" \
@@ -159,23 +160,27 @@
ENV_STR_BOARD \
"kernel_addr_r=0x00200000\0" \
"kdump_buf=180M\0" \
"boottype=mmc\0" \
"mmcbootpart=2\0" \
"default_mmcdev=1\0" \
"emmc_dev=0\0" \
"sdcard_dev=1\0" \
"mmc_select=if test -e mmc ${default_mmcdev}:${mmcbootpart} ${boot_conf_file}; then mmcdev=1; else mmcdev=0; fi;\0" \
"mmc_select=if test -e ${boottype} ${default_mmcdev}:${mmcbootpart} ${boot_conf_file}; then mmcdev=1; else mmcdev=0; fi;\0" \
"kernel_comp_addr_r=0x20000000\0" \
"kernel_comp_size=0x08000000\0" \
"boot_conf_file=/extlinux/extlinux.conf\0" \
"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
"uuid_swap=5ebcaaf0-e098-43b9-beef-1f8deedd135e\0" \
"partitions=name=table,size=2031KB;name=boot,size=500MiB,type=boot;name=swap,size=4096MiB,type=swap,uuid=${uuid_swap};name=root,size=-,type=linux,uuid=${uuid_rootfsA}\0" \
"gpt_partition=gpt write mmc ${emmc_dev} $partitions\0" \
"sdcard_gpt_partition=gpt write mmc ${sdcard_dev} $partitions\0" \
"load_aon=load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0" \
"load_c906_audio=load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0" \
"load_str=load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0" \
"load_opensbi=load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin\0" \
"bootcmd_load=run mmc_select; run load_aon; run load_c906_audio; run load_str; run load_opensbi\0" \
"bootcmd=run bootcmd_load; chk_hibernate; fixup_memory_region; bootslave; sysboot mmc ${mmcdev}:${mmcbootpart} any $boot_conf_addr_r $boot_conf_file;\0" \
"load_aon=load ${boottype} ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0" \
"load_c906_audio=load ${boottype} ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0" \
"load_str=load ${boottype} ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0" \
"load_opensbi=load ${boottype} ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin\0" \
"load_usb=usb start; load usb ${mmcdev}:${mmcbootpart} ${boot_conf_addr_r} ${boot_conf_file}; if test -e usb ${mmcdev}:${mmcbootpart} ${boot_conf_file}; then setenv boottype usb; fi;\0" \
"bootcmd_load=run load_usb; run mmc_select; run load_aon; run load_c906_audio; run load_str; run load_opensbi\0" \
"bootcmd=run bootcmd_load; chk_hibernate; fixup_memory_region; bootslave; sysboot ${boottype} ${mmcdev}:${mmcbootpart} any $boot_conf_addr_r $boot_conf_file;\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"\0"

View File

@@ -115,10 +115,7 @@ enum uclass_id {
UCLASS_W1, /* Dallas 1-Wire bus */
UCLASS_W1_EEPROM, /* one-wire EEPROMs */
UCLASS_WDT, /* Watchdog Timer driver */
UCLASS_FG, /* Fuel gauge */
UCLASS_CHARGE_DISPLAY, /* Charge display */
UCLASS_MCU, /* MCU device */
UCLASS_PD, /* PD device */
UCLASS_COUNT,
UCLASS_INVALID = -1,
};

View File

@@ -1,23 +0,0 @@
#ifndef __MCU_H
#define __MCU_H
struct mcu_ops {
int (*shutdown)(struct udevice *dev);
int (*poweron)(struct udevice *dev);
};
/**
* mcu_shutdown() - power off supplies
*
* @return 0 on success or negative value of errno.
*/
int mcu_shutdown(void);
/**
* mcu_poweron() - power on supplies
*
* @return 0 on success or negative value of errno.
*/
int mcu_poweron(void);
#endif

View File

@@ -1,33 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CHARGE_ANIMATION_H_
#define _CHARGE_ANIMATION_H_
struct regulator_mem {
struct udevice *dev;
bool enable;
};
struct charge_animation_pdata {
int android_charge; /* android charge, 1: enable, 0: disable */
int uboot_charge; /* u-boot charge, 1: enable, 0: disable */
int auto_exit_charge; /* energy enough auto exit uboot charging*/
int exit_charge_voltage;/* lowest voltage allowed to exit charging */
int exit_charge_level; /* lowest soc level allowed to exit charging */
int low_power_voltage; /* below this voltage, force system into charge mode anyway */
int screen_on_voltage; /* lowest voltage allowed to turn on screen */
int system_suspend; /* enter ATF system suspend, 1: enable, 0: disable */
int auto_wakeup_interval;/* timeout seconds to auto wakeup system */
int auto_wakeup_screen_invert;/* auto wakeup system, 1: enable, 0: disable */
int auto_off_screen_interval;/* timeout seconds to auto turn off screen */
struct regulator_mem *regulators_mem; /* assigned regulator suspend state */
};
#endif

View File

@@ -1,17 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CHARGE_DISPLAY_H_
#define _CHARGE_DISPLAY_H_
struct dm_charge_display_ops {
int (*show)(struct udevice *dev);
};
int charge_display(void);
int charge_display_show(struct udevice *dev);
#endif

View File

@@ -1,46 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _FUEL_GAUGE_H_
#define _FUEL_GAUGE_H_
#ifndef BIT
#define BIT(nr) (1 << (nr))
#endif
/* Capability */
#define FG_CAP_FUEL_GAUGE BIT(0)
#define FG_CAP_CHARGER BIT(1)
struct dm_fuel_gauge_ops {
int (*capability)(struct udevice *dev);
int (*bat_is_exist)(struct udevice *dev);
int (*get_soc)(struct udevice *dev);
int (*get_voltage)(struct udevice *dev);
int (*get_current)(struct udevice *dev);
int (*get_temperature)(struct udevice *dev, int *temp);
bool (*get_chrg_online)(struct udevice *dev);
int (*set_charger_voltage)(struct udevice *dev, int uV);
int (*set_charger_enable)(struct udevice *dev);
int (*set_charger_disable)(struct udevice *dev);
int (*set_iprechg_current)(struct udevice *dev, int iprechrg_uA);
int (*set_charger_current)(struct udevice *dev, int ichrg_uA);
};
int fuel_gauge_capability(struct udevice *dev);
int fuel_gauge_bat_is_exist(struct udevice *dev);
int fuel_gauge_update_get_soc(struct udevice *dev);
int fuel_gauge_get_voltage(struct udevice *dev);
int fuel_gauge_get_current(struct udevice *dev);
bool fuel_gauge_get_chrg_online(struct udevice *dev);
int fuel_gauge_get_temperature(struct udevice *dev, int *temp);
int charger_set_charger_voltage(struct udevice *dev, int uV);
int charger_set_iprechg_current(struct udevice *dev, int iprechrg_uA);
int charger_set_current(struct udevice *dev, int ichrg_uA);
int charger_set_enable(struct udevice *dev);
int charger_set_disable(struct udevice *dev);
#endif

View File

@@ -1,498 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2015-2017 Google, Inc
*/
#ifndef __LINUX_USB_PD_H
#define __LINUX_USB_PD_H
#include <linux/kernel.h>
#include <linux/types.h>
#include "typec.h"
/* USB PD Messages */
enum pd_ctrl_msg_type {
/* 0 Reserved */
PD_CTRL_GOOD_CRC = 1,
PD_CTRL_GOTO_MIN = 2,
PD_CTRL_ACCEPT = 3,
PD_CTRL_REJECT = 4,
PD_CTRL_PING = 5,
PD_CTRL_PS_RDY = 6,
PD_CTRL_GET_SOURCE_CAP = 7,
PD_CTRL_GET_SINK_CAP = 8,
PD_CTRL_DR_SWAP = 9,
PD_CTRL_PR_SWAP = 10,
PD_CTRL_VCONN_SWAP = 11,
PD_CTRL_WAIT = 12,
PD_CTRL_SOFT_RESET = 13,
/* 14-15 Reserved */
PD_CTRL_NOT_SUPP = 16,
PD_CTRL_GET_SOURCE_CAP_EXT = 17,
PD_CTRL_GET_STATUS = 18,
PD_CTRL_FR_SWAP = 19,
PD_CTRL_GET_PPS_STATUS = 20,
PD_CTRL_GET_COUNTRY_CODES = 21,
/* 22-31 Reserved */
};
enum pd_data_msg_type {
/* 0 Reserved */
PD_DATA_SOURCE_CAP = 1,
PD_DATA_REQUEST = 2,
PD_DATA_BIST = 3,
PD_DATA_SINK_CAP = 4,
PD_DATA_BATT_STATUS = 5,
PD_DATA_ALERT = 6,
PD_DATA_GET_COUNTRY_INFO = 7,
PD_DATA_ENTER_USB = 8,
/* 9-14 Reserved */
PD_DATA_VENDOR_DEF = 15,
/* 16-31 Reserved */
};
enum pd_ext_msg_type {
/* 0 Reserved */
PD_EXT_SOURCE_CAP_EXT = 1,
PD_EXT_STATUS = 2,
PD_EXT_GET_BATT_CAP = 3,
PD_EXT_GET_BATT_STATUS = 4,
PD_EXT_BATT_CAP = 5,
PD_EXT_GET_MANUFACTURER_INFO = 6,
PD_EXT_MANUFACTURER_INFO = 7,
PD_EXT_SECURITY_REQUEST = 8,
PD_EXT_SECURITY_RESPONSE = 9,
PD_EXT_FW_UPDATE_REQUEST = 10,
PD_EXT_FW_UPDATE_RESPONSE = 11,
PD_EXT_PPS_STATUS = 12,
PD_EXT_COUNTRY_INFO = 13,
PD_EXT_COUNTRY_CODES = 14,
/* 15-31 Reserved */
};
#define PD_REV10 0x0
#define PD_REV20 0x1
#define PD_REV30 0x2
#define PD_MAX_REV PD_REV30
#define PD_HEADER_EXT_HDR BIT(15)
#define PD_HEADER_CNT_SHIFT 12
#define PD_HEADER_CNT_MASK 0x7
#define PD_HEADER_ID_SHIFT 9
#define PD_HEADER_ID_MASK 0x7
#define PD_HEADER_PWR_ROLE BIT(8)
#define PD_HEADER_REV_SHIFT 6
#define PD_HEADER_REV_MASK 0x3
#define PD_HEADER_DATA_ROLE BIT(5)
#define PD_HEADER_TYPE_SHIFT 0
#define PD_HEADER_TYPE_MASK 0x1f
#define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \
((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \
((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \
((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \
(rev << PD_HEADER_REV_SHIFT) | \
(((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \
(((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \
((ext_hdr) ? PD_HEADER_EXT_HDR : 0))
#define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \
cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0)))
static inline unsigned int pd_header_cnt(u16 header)
{
return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK;
}
static inline unsigned int pd_header_cnt_le(__le16 header)
{
return pd_header_cnt(le16_to_cpu(header));
}
static inline unsigned int pd_header_type(u16 header)
{
return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK;
}
static inline unsigned int pd_header_type_le(__le16 header)
{
return pd_header_type(le16_to_cpu(header));
}
static inline unsigned int pd_header_msgid(u16 header)
{
return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK;
}
static inline unsigned int pd_header_msgid_le(__le16 header)
{
return pd_header_msgid(le16_to_cpu(header));
}
static inline unsigned int pd_header_rev(u16 header)
{
return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK;
}
static inline unsigned int pd_header_rev_le(__le16 header)
{
return pd_header_rev(le16_to_cpu(header));
}
#define PD_EXT_HDR_CHUNKED BIT(15)
#define PD_EXT_HDR_CHUNK_NUM_SHIFT 11
#define PD_EXT_HDR_CHUNK_NUM_MASK 0xf
#define PD_EXT_HDR_REQ_CHUNK BIT(10)
#define PD_EXT_HDR_DATA_SIZE_SHIFT 0
#define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff
#define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \
((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \
((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \
(((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \
((chunked) ? PD_EXT_HDR_CHUNKED : 0))
#define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \
cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked)))
static inline unsigned int pd_ext_header_chunk_num(u16 ext_header)
{
return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) &
PD_EXT_HDR_CHUNK_NUM_MASK;
}
static inline unsigned int pd_ext_header_data_size(u16 ext_header)
{
return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) &
PD_EXT_HDR_DATA_SIZE_MASK;
}
static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header)
{
return pd_ext_header_data_size(le16_to_cpu(ext_header));
}
#define PD_MAX_PAYLOAD 7
#define PD_EXT_MAX_CHUNK_DATA 26
/**
* struct pd_chunked_ext_message_data - PD chunked extended message data as
* seen on wire
* @header: PD extended message header
* @data: PD extended message data
*/
struct pd_chunked_ext_message_data {
__le16 header;
u8 data[PD_EXT_MAX_CHUNK_DATA];
} __packed;
/**
* struct pd_message - PD message as seen on wire
* @header: PD message header
* @payload: PD message payload
* @ext_msg: PD message chunked extended message data
*/
struct pd_message {
__le16 header;
union {
__le32 payload[PD_MAX_PAYLOAD];
struct pd_chunked_ext_message_data ext_msg;
};
} __packed;
/* PDO: Power Data Object */
#define PDO_MAX_OBJECTS 7
enum pd_pdo_type {
PDO_TYPE_FIXED = 0,
PDO_TYPE_BATT = 1,
PDO_TYPE_VAR = 2,
PDO_TYPE_APDO = 3,
};
#define PDO_TYPE_SHIFT 30
#define PDO_TYPE_MASK 0x3
#define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT)
#define PDO_VOLT_MASK 0x3ff
#define PDO_CURR_MASK 0x3ff
#define PDO_PWR_MASK 0x3ff
#define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */
#define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */
#define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */
#define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */
#define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */
#define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */
#define PDO_FIXED_UNCHUNK_EXT BIT(24) /* Unchunked Extended Message supported (Source) */
#define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */
#define PDO_FIXED_FRS_CURR_SHIFT 23
#define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
#define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */
#define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
#define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
#define PDO_FIXED(mv, ma, flags) \
(PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \
PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
#define VSAFE5V 5000 /* mv units */
#define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
#define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */
#define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
#define PDO_BATT(min_mv, max_mv, max_mw) \
(PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \
PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
#define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */
#define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */
#define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */
#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
#define PDO_VAR(min_mv, max_mv, max_ma) \
(PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \
PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
enum pd_apdo_type {
APDO_TYPE_PPS = 0,
};
#define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */
#define PDO_APDO_TYPE_MASK 0x3
#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
#define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */
#define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */
#define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */
#define PDO_PPS_APDO_VOLT_MASK 0xff
#define PDO_PPS_APDO_CURR_MASK 0x7f
#define PDO_PPS_APDO_MIN_VOLT(mv) \
((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
#define PDO_PPS_APDO_MAX_VOLT(mv) \
((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
#define PDO_PPS_APDO_MAX_CURR(ma) \
((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
#define PDO_PPS_APDO(min_mv, max_mv, max_ma) \
(PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
PDO_PPS_APDO_MAX_CURR(max_ma))
static inline enum pd_pdo_type pdo_type(u32 pdo)
{
return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK;
}
static inline unsigned int pdo_fixed_voltage(u32 pdo)
{
return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
}
static inline unsigned int pdo_min_voltage(u32 pdo)
{
return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
}
static inline unsigned int pdo_max_voltage(u32 pdo)
{
return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
}
static inline unsigned int pdo_max_current(u32 pdo)
{
return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10;
}
static inline unsigned int pdo_max_power(u32 pdo)
{
return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250;
}
static inline enum pd_apdo_type pdo_apdo_type(u32 pdo)
{
return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK;
}
static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo)
{
return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) &
PDO_PPS_APDO_VOLT_MASK) * 100;
}
static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo)
{
return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) &
PDO_PPS_APDO_VOLT_MASK) * 100;
}
static inline unsigned int pdo_pps_apdo_max_current(u32 pdo)
{
return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
PDO_PPS_APDO_CURR_MASK) * 50;
}
/* RDO: Request Data Object */
#define RDO_OBJ_POS_SHIFT 28
#define RDO_OBJ_POS_MASK 0x7
#define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */
#define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */
#define RDO_USB_COMM BIT(25) /* USB communications capable */
#define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */
#define RDO_PWR_MASK 0x3ff
#define RDO_CURR_MASK 0x3ff
#define RDO_FIXED_OP_CURR_SHIFT 10
#define RDO_FIXED_MAX_CURR_SHIFT 0
#define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT)
#define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT)
#define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT)
#define RDO_FIXED(idx, op_ma, max_ma, flags) \
(RDO_OBJ(idx) | (flags) | \
PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma))
#define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */
#define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
#define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT)
#define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT)
#define RDO_BATT(idx, op_mw, max_mw, flags) \
(RDO_OBJ(idx) | (flags) | \
RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw))
#define RDO_PROG_VOLT_MASK 0x7ff
#define RDO_PROG_CURR_MASK 0x7f
#define RDO_PROG_VOLT_SHIFT 9
#define RDO_PROG_CURR_SHIFT 0
#define RDO_PROG_VOLT_MV_STEP 20
#define RDO_PROG_CURR_MA_STEP 50
#define PDO_PROG_OUT_VOLT(mv) \
((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT)
#define PDO_PROG_OP_CURR(ma) \
((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT)
#define RDO_PROG(idx, out_mv, op_ma, flags) \
(RDO_OBJ(idx) | (flags) | \
PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma))
static inline unsigned int rdo_index(u32 rdo)
{
return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK;
}
static inline unsigned int rdo_op_current(u32 rdo)
{
return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10;
}
static inline unsigned int rdo_max_current(u32 rdo)
{
return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) &
RDO_CURR_MASK) * 10;
}
static inline unsigned int rdo_op_power(u32 rdo)
{
return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250;
}
static inline unsigned int rdo_max_power(u32 rdo)
{
return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250;
}
/* Enter_USB Data Object */
#define EUDO_USB_MODE_MASK GENMASK(30, 28)
#define EUDO_USB_MODE_SHIFT 28
#define EUDO_USB_MODE_USB2 0
#define EUDO_USB_MODE_USB3 1
#define EUDO_USB_MODE_USB4 2
#define EUDO_USB4_DRD BIT(26)
#define EUDO_USB3_DRD BIT(25)
#define EUDO_CABLE_SPEED_MASK GENMASK(23, 21)
#define EUDO_CABLE_SPEED_SHIFT 21
#define EUDO_CABLE_SPEED_USB2 0
#define EUDO_CABLE_SPEED_USB3_GEN1 1
#define EUDO_CABLE_SPEED_USB4_GEN2 2
#define EUDO_CABLE_SPEED_USB4_GEN3 3
#define EUDO_CABLE_TYPE_MASK GENMASK(20, 19)
#define EUDO_CABLE_TYPE_SHIFT 19
#define EUDO_CABLE_TYPE_PASSIVE 0
#define EUDO_CABLE_TYPE_RE_TIMER 1
#define EUDO_CABLE_TYPE_RE_DRIVER 2
#define EUDO_CABLE_TYPE_OPTICAL 3
#define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17)
#define EUDO_CABLE_CURRENT_SHIFT 17
#define EUDO_CABLE_CURRENT_NOTSUPP 0
#define EUDO_CABLE_CURRENT_3A 2
#define EUDO_CABLE_CURRENT_5A 3
#define EUDO_PCIE_SUPPORT BIT(16)
#define EUDO_DP_SUPPORT BIT(15)
#define EUDO_TBT_SUPPORT BIT(14)
#define EUDO_HOST_PRESENT BIT(13)
/* USB PD timers and counters */
#define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */
#define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */
#define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */
#define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */
#define PD_T_RECEIVER_RESPONSE 15 /* 15ms max */
#define PD_T_SOURCE_ACTIVITY 45
#define PD_T_SINK_ACTIVITY 135
#define PD_T_SINK_WAIT_CAP 310 /* 310 - 620 ms */
#define PD_T_PS_TRANSITION 500
#define PD_T_SRC_TRANSITION 35
#define PD_T_DRP_SNK 40
#define PD_T_DRP_SRC 30
#define PD_T_PS_SOURCE_OFF 920
#define PD_T_PS_SOURCE_ON 480
#define PD_T_PS_SOURCE_ON_PRS 450 /* 390 - 480ms */
#define PD_T_PS_HARD_RESET 30
#define PD_T_SRC_RECOVER 760
#define PD_T_SRC_RECOVER_MAX 1000
#define PD_T_SRC_TURN_ON 275
#define PD_T_SAFE_0V 650
#define PD_T_VCONN_SOURCE_ON 100
#define PD_T_SINK_REQUEST 100 /* 100 ms minimum */
#define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */
#define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */
#define PD_T_NEWSRC 250 /* Maximum of 275ms */
#define PD_T_SWAP_SRC_START 20 /* Minimum of 20ms */
#define PD_T_BIST_CONT_MODE 50 /* 30 - 60 ms */
#define PD_T_SINK_TX 16 /* 16 - 20 ms */
#define PD_T_CHUNK_NOT_SUPP 42 /* 40 - 50 ms */
#define PD_T_DRP_TRY 100 /* 75 - 150 ms */
#define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */
#define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */
#define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */
#define PD_T_TRY_CC_DEBOUNCE 15 /* 10 - 20 ms */
#define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP)
#define PD_N_HARD_RESET_COUNT 1
#define PD_P_SNK_STDBY_MW 2500 /* 2500 mW */
#endif /* __LINUX_USB_PD_H */

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@@ -1,518 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2015-2017 Google, Inc
*/
#ifndef __LINUX_USB_PD_VDO_H
#define __LINUX_USB_PD_VDO_H
#include "pd.h"
/*
* VDO : Vendor Defined Message Object
* VDM object is minimum of VDM header + 6 additional data objects.
*/
#define VDO_MAX_OBJECTS 6
#define VDO_MAX_SIZE (VDO_MAX_OBJECTS + 1)
/*
* VDM header
* ----------
* <31:16> :: SVID
* <15> :: VDM type ( 1b == structured, 0b == unstructured )
* <14:13> :: Structured VDM version
* <12:11> :: reserved
* <10:8> :: object position (1-7 valid ... used for enter/exit mode only)
* <7:6> :: command type (SVDM only?)
* <5> :: reserved (SVDM), command type (UVDM)
* <4:0> :: command
*/
#define VDO(vid, type, ver, custom) \
(((vid) << 16) | \
((type) << 15) | \
((ver) << 13) | \
((custom) & 0x7FFF))
#define VDO_SVDM_TYPE (1 << 15)
#define VDO_SVDM_VERS(x) ((x) << 13)
#define VDO_OPOS(x) ((x) << 8)
#define VDO_CMDT(x) ((x) << 6)
#define VDO_SVDM_VERS_MASK VDO_SVDM_VERS(0x3)
#define VDO_OPOS_MASK VDO_OPOS(0x7)
#define VDO_CMDT_MASK VDO_CMDT(0x3)
#define CMDT_INIT 0
#define CMDT_RSP_ACK 1
#define CMDT_RSP_NAK 2
#define CMDT_RSP_BUSY 3
/* reserved for SVDM ... for Google UVDM */
#define VDO_SRC_INITIATOR (0 << 5)
#define VDO_SRC_RESPONDER (1 << 5)
#define CMD_DISCOVER_IDENT 1
#define CMD_DISCOVER_SVID 2
#define CMD_DISCOVER_MODES 3
#define CMD_ENTER_MODE 4
#define CMD_EXIT_MODE 5
#define CMD_ATTENTION 6
#define VDO_CMD_VENDOR(x) (((0x10 + (x)) & 0x1f))
/* ChromeOS specific commands */
#define VDO_CMD_VERSION VDO_CMD_VENDOR(0)
#define VDO_CMD_SEND_INFO VDO_CMD_VENDOR(1)
#define VDO_CMD_READ_INFO VDO_CMD_VENDOR(2)
#define VDO_CMD_REBOOT VDO_CMD_VENDOR(5)
#define VDO_CMD_FLASH_ERASE VDO_CMD_VENDOR(6)
#define VDO_CMD_FLASH_WRITE VDO_CMD_VENDOR(7)
#define VDO_CMD_ERASE_SIG VDO_CMD_VENDOR(8)
#define VDO_CMD_PING_ENABLE VDO_CMD_VENDOR(10)
#define VDO_CMD_CURRENT VDO_CMD_VENDOR(11)
#define VDO_CMD_FLIP VDO_CMD_VENDOR(12)
#define VDO_CMD_GET_LOG VDO_CMD_VENDOR(13)
#define VDO_CMD_CCD_EN VDO_CMD_VENDOR(14)
#define PD_VDO_VID(vdo) ((vdo) >> 16)
#define PD_VDO_SVDM(vdo) (((vdo) >> 15) & 1)
#define PD_VDO_SVDM_VER(vdo) (((vdo) >> 13) & 0x3)
#define PD_VDO_OPOS(vdo) (((vdo) >> 8) & 0x7)
#define PD_VDO_CMD(vdo) ((vdo) & 0x1f)
#define PD_VDO_CMDT(vdo) (((vdo) >> 6) & 0x3)
/*
* SVDM Identity request -> response
*
* Request is simply properly formatted SVDM header
*
* Response is 4 data objects:
* [0] :: SVDM header
* [1] :: Identitiy header
* [2] :: Cert Stat VDO
* [3] :: (Product | Cable) VDO
* [4] :: AMA VDO
*
*/
#define VDO_INDEX_HDR 0
#define VDO_INDEX_IDH 1
#define VDO_INDEX_CSTAT 2
#define VDO_INDEX_CABLE 3
#define VDO_INDEX_PRODUCT 3
#define VDO_INDEX_AMA 4
/*
* SVDM Identity Header
* --------------------
* <31> :: data capable as a USB host
* <30> :: data capable as a USB device
* <29:27> :: product type (UFP / Cable / VPD)
* <26> :: modal operation supported (1b == yes)
* <25:23> :: product type (DFP) (SVDM version 2.0+ only; set to zero in version 1.0)
* <22:21> :: connector type (SVDM version 2.0+ only; set to zero in version 1.0)
* <20:16> :: Reserved, Shall be set to zero
* <15:0> :: USB-IF assigned VID for this cable vendor
*/
/* PD Rev2.0 definition */
#define IDH_PTYPE_UNDEF 0
/* SOP Product Type (UFP) */
#define IDH_PTYPE_NOT_UFP 0
#define IDH_PTYPE_HUB 1
#define IDH_PTYPE_PERIPH 2
#define IDH_PTYPE_PSD 3
#define IDH_PTYPE_AMA 5
/* SOP' Product Type (Cable Plug / VPD) */
#define IDH_PTYPE_NOT_CABLE 0
#define IDH_PTYPE_PCABLE 3
#define IDH_PTYPE_ACABLE 4
#define IDH_PTYPE_VPD 6
/* SOP Product Type (DFP) */
#define IDH_PTYPE_NOT_DFP 0
#define IDH_PTYPE_DFP_HUB 1
#define IDH_PTYPE_DFP_HOST 2
#define IDH_PTYPE_DFP_PB 3
/* ID Header Mask */
#define IDH_DFP_MASK GENMASK(25, 23)
#define IDH_CONN_MASK GENMASK(22, 21)
#define VDO_IDH(usbh, usbd, ufp_cable, is_modal, dfp, conn, vid) \
((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27 \
| (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \
| ((vid) & 0xffff))
#define PD_IDH_PTYPE(vdo) (((vdo) >> 27) & 0x7)
#define PD_IDH_VID(vdo) ((vdo) & 0xffff)
#define PD_IDH_MODAL_SUPP(vdo) ((vdo) & (1 << 26))
#define PD_IDH_DFP_PTYPE(vdo) (((vdo) >> 23) & 0x7)
#define PD_IDH_CONN_TYPE(vdo) (((vdo) >> 21) & 0x3)
/*
* Cert Stat VDO
* -------------
* <31:0> : USB-IF assigned XID for this cable
*/
#define PD_CSTAT_XID(vdo) (vdo)
#define VDO_CERT(xid) ((xid) & 0xffffffff)
/*
* Product VDO
* -----------
* <31:16> : USB Product ID
* <15:0> : USB bcdDevice
*/
#define VDO_PRODUCT(pid, bcd) (((pid) & 0xffff) << 16 | ((bcd) & 0xffff))
#define PD_PRODUCT_PID(vdo) (((vdo) >> 16) & 0xffff)
/*
* UFP VDO (PD Revision 3.0+ only)
* --------
* <31:29> :: UFP VDO version
* <28> :: Reserved
* <27:24> :: Device capability
* <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
* <21:11> :: Reserved
* <10:8> :: Vconn power (AMA only)
* <7> :: Vconn required (AMA only, 0b == no, 1b == yes)
* <6> :: Vbus required (AMA only, 0b == yes, 1b == no)
* <5:3> :: Alternate modes
* <2:0> :: USB highest speed
*/
#define PD_VDO_UFP_DEVCAP(vdo) (((vdo) & GENMASK(27, 24)) >> 24)
/* UFP VDO Version */
#define UFP_VDO_VER1_2 2
/* Device Capability */
#define DEV_USB2_CAPABLE BIT(0)
#define DEV_USB2_BILLBOARD BIT(1)
#define DEV_USB3_CAPABLE BIT(2)
#define DEV_USB4_CAPABLE BIT(3)
/* Connector Type */
#define UFP_RECEPTACLE 2
#define UFP_CAPTIVE 3
/* Vconn Power (AMA only, set to AMA_VCONN_NOT_REQ if Vconn is not required) */
#define AMA_VCONN_PWR_1W 0
#define AMA_VCONN_PWR_1W5 1
#define AMA_VCONN_PWR_2W 2
#define AMA_VCONN_PWR_3W 3
#define AMA_VCONN_PWR_4W 4
#define AMA_VCONN_PWR_5W 5
#define AMA_VCONN_PWR_6W 6
/* Vconn Required (AMA only) */
#define AMA_VCONN_NOT_REQ 0
#define AMA_VCONN_REQ 1
/* Vbus Required (AMA only) */
#define AMA_VBUS_REQ 0
#define AMA_VBUS_NOT_REQ 1
/* Alternate Modes */
#define UFP_ALTMODE_NOT_SUPP 0
#define UFP_ALTMODE_TBT3 BIT(0)
#define UFP_ALTMODE_RECFG BIT(1)
#define UFP_ALTMODE_NO_RECFG BIT(2)
/* USB Highest Speed */
#define UFP_USB2_ONLY 0
#define UFP_USB32_GEN1 1
#define UFP_USB32_4_GEN2 2
#define UFP_USB4_GEN3 3
#define VDO_UFP(ver, cap, conn, vcpwr, vcr, vbr, alt, spd) \
(((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \
| ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3 \
| ((spd) & 0x7))
/*
* DFP VDO (PD Revision 3.0+ only)
* --------
* <31:29> :: DFP VDO version
* <28:27> :: Reserved
* <26:24> :: Host capability
* <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
* <21:5> :: Reserved
* <4:0> :: Port number
*/
#define PD_VDO_DFP_HOSTCAP(vdo) (((vdo) & GENMASK(26, 24)) >> 24)
#define DFP_VDO_VER1_1 1
#define HOST_USB2_CAPABLE BIT(0)
#define HOST_USB3_CAPABLE BIT(1)
#define HOST_USB4_CAPABLE BIT(2)
#define DFP_RECEPTACLE 2
#define DFP_CAPTIVE 3
#define VDO_DFP(ver, cap, conn, pnum) \
(((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22 \
| ((pnum) & 0x1f))
/*
* Cable VDO (for both Passive and Active Cable VDO in PD Rev2.0)
* ---------
* <31:28> :: Cable HW version
* <27:24> :: Cable FW version
* <23:20> :: Reserved, Shall be set to zero
* <19:18> :: type-C to Type-A/B/C/Captive (00b == A, 01 == B, 10 == C, 11 == Captive)
* <17> :: Reserved, Shall be set to zero
* <16:13> :: cable latency (0001 == <10ns(~1m length))
* <12:11> :: cable termination type (11b == both ends active VCONN req)
* <10> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
* <9> :: SSTX2 Directionality support
* <8> :: SSRX1 Directionality support
* <7> :: SSRX2 Directionality support
* <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A)
* <4> :: Vbus through cable (0b == no, 1b == yes)
* <3> :: SOP" controller present? (0b == no, 1b == yes)
* <2:0> :: USB SS Signaling support
*
* Passive Cable VDO (PD Rev3.0+)
* ---------
* <31:28> :: Cable HW version
* <27:24> :: Cable FW version
* <23:21> :: VDO version
* <20> :: Reserved, Shall be set to zero
* <19:18> :: Type-C to Type-C/Captive (10b == C, 11b == Captive)
* <17> :: Reserved, Shall be set to zero
* <16:13> :: cable latency (0001 == <10ns(~1m length))
* <12:11> :: cable termination type (10b == Vconn not req, 01b == Vconn req)
* <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
* <8:7> :: Reserved, Shall be set to zero
* <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A)
* <4:3> :: Reserved, Shall be set to zero
* <2:0> :: USB highest speed
*
* Active Cable VDO 1 (PD Rev3.0+)
* ---------
* <31:28> :: Cable HW version
* <27:24> :: Cable FW version
* <23:21> :: VDO version
* <20> :: Reserved, Shall be set to zero
* <19:18> :: Connector type (10b == C, 11b == Captive)
* <17> :: Reserved, Shall be set to zero
* <16:13> :: cable latency (0001 == <10ns(~1m length))
* <12:11> :: cable termination type (10b == one end active, 11b == both ends active VCONN req)
* <10:9> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
* <8> :: SBU supported (0b == supported, 1b == not supported)
* <7> :: SBU type (0b == passive, 1b == active)
* <6:5> :: Vbus current handling capability (01b == 3A, 10b == 5A)
* <2:0> :: USB highest speed
*/
/* Cable VDO Version */
#define CABLE_VDO_VER1_0 0
#define CABLE_VDO_VER1_3 3
/* Connector Type (_ATYPE and _BTYPE are for PD Rev2.0 only) */
#define CABLE_ATYPE 0
#define CABLE_BTYPE 1
#define CABLE_CTYPE 2
#define CABLE_CAPTIVE 3
/* Cable Latency */
#define CABLE_LATENCY_1M 1
#define CABLE_LATENCY_2M 2
#define CABLE_LATENCY_3M 3
#define CABLE_LATENCY_4M 4
#define CABLE_LATENCY_5M 5
#define CABLE_LATENCY_6M 6
#define CABLE_LATENCY_7M 7
#define CABLE_LATENCY_7M_PLUS 8
/* Cable Termination Type */
#define PCABLE_VCONN_NOT_REQ 0
#define PCABLE_VCONN_REQ 1
#define ACABLE_ONE_END 2
#define ACABLE_BOTH_END 3
/* Maximum Vbus Voltage */
#define CABLE_MAX_VBUS_20V 0
#define CABLE_MAX_VBUS_30V 1
#define CABLE_MAX_VBUS_40V 2
#define CABLE_MAX_VBUS_50V 3
/* Active Cable SBU Supported/Type */
#define ACABLE_SBU_SUPP 0
#define ACABLE_SBU_NOT_SUPP 1
#define ACABLE_SBU_PASSIVE 0
#define ACABLE_SBU_ACTIVE 1
/* Vbus Current Handling Capability */
#define CABLE_CURR_DEF 0
#define CABLE_CURR_3A 1
#define CABLE_CURR_5A 2
/* USB SuperSpeed Signaling Support (PD Rev2.0) */
#define CABLE_USBSS_U2_ONLY 0
#define CABLE_USBSS_U31_GEN1 1
#define CABLE_USBSS_U31_GEN2 2
/* USB Highest Speed */
#define CABLE_USB2_ONLY 0
#define CABLE_USB32_GEN1 1
#define CABLE_USB32_4_GEN2 2
#define CABLE_USB4_GEN3 3
#define VDO_CABLE(hw, fw, cbl, lat, term, tx1d, tx2d, rx1d, rx2d, cur, vps, sopp, usbss) \
(((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | ((cbl) & 0x3) << 18 \
| ((lat) & 0x7) << 13 | ((term) & 0x3) << 11 | (tx1d) << 10 \
| (tx2d) << 9 | (rx1d) << 8 | (rx2d) << 7 | ((cur) & 0x3) << 5 \
| (vps) << 4 | (sopp) << 3 | ((usbss) & 0x7))
#define VDO_PCABLE(hw, fw, ver, conn, lat, term, vbm, cur, spd) \
(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \
| ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \
| ((vbm) & 0x3) << 9 | ((cur) & 0x3) << 5 | ((spd) & 0x7))
#define VDO_ACABLE1(hw, fw, ver, conn, lat, term, vbm, sbu, sbut, cur, vbt, sopp, spd) \
(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \
| ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11 \
| ((vbm) & 0x3) << 9 | (sbu) << 8 | (sbut) << 7 | ((cur) & 0x3) << 5 \
| (vbt) << 4 | (sopp) << 3 | ((spd) & 0x7))
#define VDO_TYPEC_CABLE_TYPE(vdo) (((vdo) >> 18) & 0x3)
/*
* Active Cable VDO 2
* ---------
* <31:24> :: Maximum operating temperature
* <23:16> :: Shutdown temperature
* <15> :: Reserved, Shall be set to zero
* <14:12> :: U3/CLd power
* <11> :: U3 to U0 transition mode (0b == direct, 1b == through U3S)
* <10> :: Physical connection (0b == copper, 1b == optical)
* <9> :: Active element (0b == redriver, 1b == retimer)
* <8> :: USB4 supported (0b == yes, 1b == no)
* <7:6> :: USB2 hub hops consumed
* <5> :: USB2 supported (0b == yes, 1b == no)
* <4> :: USB3.2 supported (0b == yes, 1b == no)
* <3> :: USB lanes supported (0b == one lane, 1b == two lanes)
* <2> :: Optically isolated active cable (0b == no, 1b == yes)
* <1> :: Reserved, Shall be set to zero
* <0> :: USB gen (0b == gen1, 1b == gen2+)
*/
/* U3/CLd Power*/
#define ACAB2_U3_CLD_10MW_PLUS 0
#define ACAB2_U3_CLD_10MW 1
#define ACAB2_U3_CLD_5MW 2
#define ACAB2_U3_CLD_1MW 3
#define ACAB2_U3_CLD_500UW 4
#define ACAB2_U3_CLD_200UW 5
#define ACAB2_U3_CLD_50UW 6
/* Other Active Cable VDO 2 Fields */
#define ACAB2_U3U0_DIRECT 0
#define ACAB2_U3U0_U3S 1
#define ACAB2_PHY_COPPER 0
#define ACAB2_PHY_OPTICAL 1
#define ACAB2_REDRIVER 0
#define ACAB2_RETIMER 1
#define ACAB2_USB4_SUPP 0
#define ACAB2_USB4_NOT_SUPP 1
#define ACAB2_USB2_SUPP 0
#define ACAB2_USB2_NOT_SUPP 1
#define ACAB2_USB32_SUPP 0
#define ACAB2_USB32_NOT_SUPP 1
#define ACAB2_LANES_ONE 0
#define ACAB2_LANES_TWO 1
#define ACAB2_OPT_ISO_NO 0
#define ACAB2_OPT_ISO_YES 1
#define ACAB2_GEN_1 0
#define ACAB2_GEN_2_PLUS 1
#define VDO_ACABLE2(mtemp, stemp, u3p, trans, phy, ele, u4, hops, u2, u32, lane, iso, gen) \
(((mtemp) & 0xff) << 24 | ((stemp) & 0xff) << 16 | ((u3p) & 0x7) << 12 \
| (trans) << 11 | (phy) << 10 | (ele) << 9 | (u4) << 8 \
| ((hops) & 0x3) << 6 | (u2) << 5 | (u32) << 4 | (lane) << 3 \
| (iso) << 2 | (gen))
/*
* AMA VDO (PD Rev2.0)
* ---------
* <31:28> :: Cable HW version
* <27:24> :: Cable FW version
* <23:12> :: Reserved, Shall be set to zero
* <11> :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
* <10> :: SSTX2 Directionality support
* <9> :: SSRX1 Directionality support
* <8> :: SSRX2 Directionality support
* <7:5> :: Vconn power
* <4> :: Vconn power required
* <3> :: Vbus power required
* <2:0> :: USB SS Signaling support
*/
#define VDO_AMA(hw, fw, tx1d, tx2d, rx1d, rx2d, vcpwr, vcr, vbr, usbss) \
(((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 \
| (tx1d) << 11 | (tx2d) << 10 | (rx1d) << 9 | (rx2d) << 8 \
| ((vcpwr) & 0x7) << 5 | (vcr) << 4 | (vbr) << 3 \
| ((usbss) & 0x7))
#define PD_VDO_AMA_VCONN_REQ(vdo) (((vdo) >> 4) & 1)
#define PD_VDO_AMA_VBUS_REQ(vdo) (((vdo) >> 3) & 1)
#define AMA_USBSS_U2_ONLY 0
#define AMA_USBSS_U31_GEN1 1
#define AMA_USBSS_U31_GEN2 2
#define AMA_USBSS_BBONLY 3
/*
* VPD VDO
* ---------
* <31:28> :: HW version
* <27:24> :: FW version
* <23:21> :: VDO version
* <20:17> :: Reserved, Shall be set to zero
* <16:15> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
* <14> :: Charge through current support (0b == 3A, 1b == 5A)
* <13> :: Reserved, Shall be set to zero
* <12:7> :: Vbus impedance
* <6:1> :: Ground impedance
* <0> :: Charge through support (0b == no, 1b == yes)
*/
#define VPD_VDO_VER1_0 0
#define VPD_MAX_VBUS_20V 0
#define VPD_MAX_VBUS_30V 1
#define VPD_MAX_VBUS_40V 2
#define VPD_MAX_VBUS_50V 3
#define VPDCT_CURR_3A 0
#define VPDCT_CURR_5A 1
#define VPDCT_NOT_SUPP 0
#define VPDCT_SUPP 1
#define VDO_VPD(hw, fw, ver, vbm, curr, vbi, gi, ct) \
(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21 \
| ((vbm) & 0x3) << 15 | (curr) << 14 | ((vbi) & 0x3f) << 7 \
| ((gi) & 0x3f) << 1 | (ct))
/*
* SVDM Discover SVIDs request -> response
*
* Request is properly formatted VDM Header with discover SVIDs command.
* Response is a set of SVIDs of all supported SVIDs with all zero's to
* mark the end of SVIDs. If more than 12 SVIDs are supported command SHOULD be
* repeated.
*/
#define VDO_SVID(svid0, svid1) (((svid0) & 0xffff) << 16 | ((svid1) & 0xffff))
#define PD_VDO_SVID_SVID0(vdo) ((vdo) >> 16)
#define PD_VDO_SVID_SVID1(vdo) ((vdo) & 0xffff)
/* USB-IF SIDs */
#define USB_SID_PD 0xff00 /* power delivery */
#define USB_SID_DISPLAYPORT 0xff01
#define USB_SID_MHL 0xff02 /* Mobile High-Definition Link */
/* VDM command timeouts (in ms) */
#define PD_T_VDM_UNSTRUCTURED 500
#define PD_T_VDM_BUSY 100
#define PD_T_VDM_WAIT_MODE_E 100
#define PD_T_VDM_SNDR_RSP 30
#define PD_T_VDM_E_MODE 25
#define PD_T_VDM_RCVR_RSP 15
#endif /* __LINUX_USB_PD_VDO_H */

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@@ -1,36 +0,0 @@
/*
* (C) Copyright 2020 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _power_delivery_H_
#define _power_delivery_H_
/* Capability */
#define FG_CAP_FUEL_GAUGE BIT(0)
#define FG_CAP_CHARGER BIT(1)
struct dm_power_delivery_ops {
int (*get_voltage)(struct udevice *dev);
int (*get_current)(struct udevice *dev);
int (*get_online)(struct udevice *dev);
int (*get_vbus_power)(struct udevice *dev);
};
struct power_delivery_data {
int voltage;
int current;
int online;
};
int power_delivery_get_vbus(struct udevice *dev, int *status);
#ifdef CONFIG_DM_POWER_DELIVERY
int power_delivery_get_data(struct udevice *dev, struct power_delivery_data *pd_data);
#else
inline int power_delivery_get_data(struct udevice *dev,
struct power_delivery_data *pd_data)
{
return -ENOSYS;
}
#endif
#endif

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@@ -1,195 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2015-2017 Google, Inc
*/
#ifndef __LINUX_USB_TCPM_H
#define __LINUX_USB_TCPM_H
#include <linux/bitops.h>
#include "typec.h"
#include "pd.h"
enum typec_cc_status {
TYPEC_CC_OPEN,
TYPEC_CC_RA,
TYPEC_CC_RD,
TYPEC_CC_RP_DEF,
TYPEC_CC_RP_1_5,
TYPEC_CC_RP_3_0,
};
/* Collision Avoidance */
#define SINK_TX_NG TYPEC_CC_RP_1_5
#define SINK_TX_OK TYPEC_CC_RP_3_0
enum typec_cc_polarity {
TYPEC_POLARITY_CC1,
TYPEC_POLARITY_CC2,
};
/* Time to wait for TCPC to complete transmit */
#define PD_T_TCPC_TX_TIMEOUT 100 /* in ms */
#define PD_ROLE_SWAP_TIMEOUT (MSEC_PER_SEC * 10)
#define PD_PPS_CTRL_TIMEOUT (MSEC_PER_SEC * 10)
enum tcpm_transmit_status {
TCPC_TX_SUCCESS = 0,
TCPC_TX_DISCARDED = 1,
TCPC_TX_FAILED = 2,
};
enum tcpm_transmit_type {
TCPC_TX_SOP = 0,
TCPC_TX_SOP_PRIME = 1,
TCPC_TX_SOP_PRIME_PRIME = 2,
TCPC_TX_SOP_DEBUG_PRIME = 3,
TCPC_TX_SOP_DEBUG_PRIME_PRIME = 4,
TCPC_TX_HARD_RESET = 5,
TCPC_TX_CABLE_RESET = 6,
TCPC_TX_BIST_MODE_2 = 7
};
/* Mux state attributes */
#define TCPC_MUX_USB_ENABLED BIT(0) /* USB enabled */
#define TCPC_MUX_DP_ENABLED BIT(1) /* DP enabled */
#define TCPC_MUX_POLARITY_INVERTED BIT(2) /* Polarity inverted */
/**
* struct tcpc_dev - Port configuration and callback functions
* @fwnode: Pointer to port fwnode
* @get_vbus: Called to read current VBUS state
* @get_current_limit:
* Optional; called by the tcpm core when configured as a snk
* and cc=Rp-def. This allows the tcpm to provide a fallback
* current-limit detection method for the cc=Rp-def case.
* For example, some tcpcs may include BC1.2 charger detection
* and use that in this case.
* @set_cc: Called to set value of CC pins
* @apply_rc: Optional; Needed to move TCPCI based chipset to APPLY_RC state
* as stated by the TCPCI specification.
* @get_cc: Called to read current CC pin values
* @set_polarity:
* Called to set polarity
* @set_vconn: Called to enable or disable VCONN
* @set_vbus: Called to enable or disable VBUS
* @set_current_limit:
* Optional; called to set current limit as negotiated
* with partner.
* @set_pd_rx: Called to enable or disable reception of PD messages
* @set_roles: Called to set power and data roles
* @start_toggling:
* Optional; if supported by hardware, called to start dual-role
* toggling or single-role connection detection. Toggling stops
* automatically if a connection is established.
* @try_role: Optional; called to set a preferred role
* @pd_transmit:Called to transmit PD message
* @set_bist_data: Turn on/off bist data mode for compliance testing
* @enable_frs:
* Optional; Called to enable/disable PD 3.0 fast role swap.
* Enabling frs is accessory dependent as not all PD3.0
* accessories support fast role swap.
* @frs_sourcing_vbus:
* Optional; Called to notify that vbus is now being sourced.
* Low level drivers can perform chip specific operations, if any.
* @enable_auto_vbus_discharge:
* Optional; TCPCI spec based TCPC implementations can optionally
* support hardware to autonomously dischrge vbus upon disconnecting
* as sink or source. TCPM signals TCPC to enable the mechanism upon
* entering connected state and signals disabling upon disconnect.
* @set_auto_vbus_discharge_threshold:
* Mandatory when enable_auto_vbus_discharge is implemented. TCPM
* calls this function to allow lower levels drivers to program the
* vbus threshold voltage below which the vbus discharge circuit
* will be turned on. requested_vbus_voltage is set to 0 when vbus
* is going to disappear knowingly i.e. during PR_SWAP and
* HARD_RESET etc.
* @is_vbus_vsafe0v:
* Optional; TCPCI spec based TCPC implementations are expected to
* detect VSAFE0V voltage level at vbus. When detection of VSAFE0V
* is supported by TCPC, set this callback for TCPM to query
* whether vbus is at VSAFE0V when needed.
* Returns true when vbus is at VSAFE0V, false otherwise.
* @set_partner_usb_comm_capable:
* Optional; The USB Communications Capable bit indicates if port
* partner is capable of communication over the USB data lines
* (e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit.
* @check_contaminant:
* Optional; The callback is called when CC pins report open status
* at the end of the toggling period. Chip level drivers are
* expected to check for contaminant and re-enable toggling if
* needed. When 0 is not returned, check_contaminant is expected to
* restart toggling after checking the connector for contaminant.
* This forces the TCPM state machine to tranistion to TOGGLING state
* without calling start_toggling callback.
* @poll_event:
* After the PD chip driver is loaded, the callback function will be
* called to poll what events have been triggered.
* @enter_low_power_mode:
* Optional; the pd chip enters low power mode.
*/
struct tcpc_dev {
ofnode connector_node;
int (*init)(struct tcpc_dev *dev);
int (*get_vbus)(struct tcpc_dev *dev);
int (*get_current_limit)(struct tcpc_dev *dev);
int (*set_cc)(struct tcpc_dev *dev, enum typec_cc_status cc);
int (*apply_rc)(struct tcpc_dev *dev, enum typec_cc_status cc,
enum typec_cc_polarity polarity);
int (*get_cc)(struct tcpc_dev *dev, enum typec_cc_status *cc1,
enum typec_cc_status *cc2);
int (*set_polarity)(struct tcpc_dev *dev,
enum typec_cc_polarity polarity);
int (*set_vconn)(struct tcpc_dev *dev, bool on);
int (*set_vbus)(struct tcpc_dev *dev, bool on, bool charge);
int (*set_current_limit)(struct tcpc_dev *dev, u32 max_ma, u32 mv);
int (*set_pd_rx)(struct tcpc_dev *dev, bool on);
int (*set_roles)(struct tcpc_dev *dev, bool attached,
enum typec_role role, enum typec_data_role data);
int (*start_toggling)(struct tcpc_dev *dev,
enum typec_port_type port_type,
enum typec_cc_status cc);
int (*try_role)(struct tcpc_dev *dev, int role);
int (*pd_transmit)(struct tcpc_dev *dev, enum tcpm_transmit_type type,
const struct pd_message *msg, unsigned int negotiated_rev);
int (*set_bist_data)(struct tcpc_dev *dev, bool on);
int (*enable_frs)(struct tcpc_dev *dev, bool enable);
void (*frs_sourcing_vbus)(struct tcpc_dev *dev);
int (*enable_auto_vbus_discharge)(struct tcpc_dev *dev, bool enable);
int (*set_auto_vbus_discharge_threshold)(struct tcpc_dev *dev, enum typec_pwr_opmode mode,
bool pps_active, u32 requested_vbus_voltage);
int (*check_contaminant)(struct tcpc_dev *dev);
bool (*is_vbus_vsafe0v)(struct tcpc_dev *dev);
void (*set_partner_usb_comm_capable)(struct tcpc_dev *dev, bool enable);
void (*poll_event)(struct tcpc_dev *dev);
int (*enter_low_power_mode)(struct tcpc_dev *dev, bool attached, bool pd_capable);
};
struct tcpm_port;
struct tcpm_port *tcpm_port_init(struct udevice *dev, struct tcpc_dev *tcpc);
void tcpm_poll_event(struct tcpm_port *port);
int tcpm_get_voltage(struct tcpm_port *port);
int tcpm_get_current(struct tcpm_port *port);
int tcpm_get_online(struct tcpm_port *port);
int tcpm_get_vbus(struct tcpm_port *port);
void tcpm_uninit_port(struct tcpm_port *port);
int tcpm_update_sink_capabilities(struct tcpm_port *port, const u32 *pdo,
unsigned int nr_pdo,
unsigned int operating_snk_mw);
void tcpm_vbus_change(struct tcpm_port *port);
void tcpm_cc_change(struct tcpm_port *port);
void tcpm_sink_frs(struct tcpm_port *port);
void tcpm_sourcing_vbus(struct tcpm_port *port);
void tcpm_pd_receive(struct tcpm_port *port,
const struct pd_message *msg);
void tcpm_pd_transmit_complete(struct tcpm_port *port,
enum tcpm_transmit_status status);
void tcpm_pd_hard_reset(struct tcpm_port *port);
void tcpm_tcpc_reset(struct tcpm_port *port);
bool tcpm_is_debouncing(struct tcpm_port *tcpm);
bool tcpm_is_toggling(struct tcpm_port *port);
#endif /* __LINUX_USB_TCPM_H */

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@@ -1,315 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __LINUX_USB_TYPEC_H
#define __LINUX_USB_TYPEC_H
#include <linux/types.h>
/* USB Type-C Specification releases */
#define USB_TYPEC_REV_1_0 0x100 /* 1.0 */
#define USB_TYPEC_REV_1_1 0x110 /* 1.1 */
#define USB_TYPEC_REV_1_2 0x120 /* 1.2 */
#define USB_TYPEC_REV_1_3 0x130 /* 1.3 */
#define USB_TYPEC_REV_1_4 0x140 /* 1.4 */
#define USB_TYPEC_REV_2_0 0x200 /* 2.0 */
struct typec_partner;
struct typec_cable;
struct typec_plug;
struct typec_port;
struct typec_altmode_ops;
struct fwnode_handle;
struct device;
enum typec_port_type {
TYPEC_PORT_SRC,
TYPEC_PORT_SNK,
TYPEC_PORT_DRP,
};
enum typec_port_data {
TYPEC_PORT_DFP,
TYPEC_PORT_UFP,
TYPEC_PORT_DRD,
};
enum typec_plug_type {
USB_PLUG_NONE,
USB_PLUG_TYPE_A,
USB_PLUG_TYPE_B,
USB_PLUG_TYPE_C,
USB_PLUG_CAPTIVE,
};
enum typec_data_role {
TYPEC_DEVICE,
TYPEC_HOST,
};
enum typec_role {
TYPEC_SINK,
TYPEC_SOURCE,
};
enum typec_pwr_opmode {
TYPEC_PWR_MODE_USB,
TYPEC_PWR_MODE_1_5A,
TYPEC_PWR_MODE_3_0A,
TYPEC_PWR_MODE_PD,
};
enum typec_accessory {
TYPEC_ACCESSORY_NONE,
TYPEC_ACCESSORY_AUDIO,
TYPEC_ACCESSORY_DEBUG,
};
#define TYPEC_MAX_ACCESSORY 3
enum typec_orientation {
TYPEC_ORIENTATION_NONE,
TYPEC_ORIENTATION_NORMAL,
TYPEC_ORIENTATION_REVERSE,
};
/*
* struct enter_usb_data - Enter_USB Message details
* @eudo: Enter_USB Data Object
* @active_link_training: Active Cable Plug Link Training
*
* @active_link_training is a flag that should be set with uni-directional SBRX
* communication, and left 0 with passive cables and with bi-directional SBRX
* communication.
*/
struct enter_usb_data {
u32 eudo;
unsigned char active_link_training:1;
};
/*
* struct usb_pd_identity - USB Power Delivery identity data
* @id_header: ID Header VDO
* @cert_stat: Cert Stat VDO
* @product: Product VDO
* @vdo: Product Type Specific VDOs
*
* USB power delivery Discover Identity command response data.
*
* REVISIT: This is USB Power Delivery specific information, so this structure
* probable belongs to USB Power Delivery header file once we have them.
*/
struct usb_pd_identity {
u32 id_header;
u32 cert_stat;
u32 product;
u32 vdo[3];
};
int typec_partner_set_identity(struct typec_partner *partner);
int typec_cable_set_identity(struct typec_cable *cable);
/*
* struct typec_altmode_desc - USB Type-C Alternate Mode Descriptor
* @svid: Standard or Vendor ID
* @mode: Index of the Mode
* @vdo: VDO returned by Discover Modes USB PD command
* @roles: Only for ports. DRP if the mode is available in both roles
*
* Description of an Alternate Mode which a connector, cable plug or partner
* supports.
*/
struct typec_altmode_desc {
u16 svid;
u8 mode;
u32 vdo;
/* Only used with ports */
enum typec_port_data roles;
};
void typec_partner_set_pd_revision(struct typec_partner *partner, u16 pd_revision);
int typec_partner_set_num_altmodes(struct typec_partner *partner, int num_altmodes);
struct typec_altmode
*typec_partner_register_altmode(struct typec_partner *partner,
const struct typec_altmode_desc *desc);
int typec_plug_set_num_altmodes(struct typec_plug *plug, int num_altmodes);
struct typec_altmode
*typec_plug_register_altmode(struct typec_plug *plug,
const struct typec_altmode_desc *desc);
struct typec_altmode
*typec_port_register_altmode(struct typec_port *port,
const struct typec_altmode_desc *desc);
#ifdef CONFIG_NO_GKI
void typec_port_register_altmodes(struct typec_port *port,
const struct typec_altmode_ops *ops, void *drvdata,
struct typec_altmode **altmodes, size_t n);
#else
static inline void typec_port_register_altmodes(struct typec_port *port,
const struct typec_altmode_ops *ops, void *drvdata,
struct typec_altmode **altmodes, size_t n)
{
}
#endif
void typec_unregister_altmode(struct typec_altmode *altmode);
struct typec_port *typec_altmode2port(struct typec_altmode *alt);
void typec_altmode_update_active(struct typec_altmode *alt, bool active);
enum typec_plug_index {
TYPEC_PLUG_SOP_P,
TYPEC_PLUG_SOP_PP,
};
/*
* struct typec_plug_desc - USB Type-C Cable Plug Descriptor
* @index: SOP Prime for the plug connected to DFP and SOP Double Prime for the
* plug connected to UFP
*
* Represents USB Type-C Cable Plug.
*/
struct typec_plug_desc {
enum typec_plug_index index;
};
/*
* struct typec_cable_desc - USB Type-C Cable Descriptor
* @type: The plug type from USB PD Cable VDO
* @active: Is the cable active or passive
* @identity: Result of Discover Identity command
* @pd_revision: USB Power Delivery Specification revision if supported
*
* Represents USB Type-C Cable attached to USB Type-C port.
*/
struct typec_cable_desc {
enum typec_plug_type type;
unsigned int active:1;
struct usb_pd_identity *identity;
u16 pd_revision; /* 0300H = "3.0" */
};
/*
* struct typec_partner_desc - USB Type-C Partner Descriptor
* @usb_pd: USB Power Delivery support
* @accessory: Audio, Debug or none.
* @identity: Discover Identity command data
* @pd_revision: USB Power Delivery Specification Revision if supported
*
* Details about a partner that is attached to USB Type-C port. If @identity
* member exists when partner is registered, a directory named "identity" is
* created to sysfs for the partner device.
*
* @pd_revision is based on the setting of the "Specification Revision" field
* in the message header on the initial "Source Capabilities" message received
* from the partner, or a "Request" message received from the partner, depending
* on whether our port is a Sink or a Source.
*/
struct typec_partner_desc {
unsigned int usb_pd:1;
enum typec_accessory accessory;
struct usb_pd_identity *identity;
u16 pd_revision; /* 0300H = "3.0" */
};
/**
* struct typec_operations - USB Type-C Port Operations
* @try_role: Set data role preference for DRP port
* @dr_set: Set Data Role
* @pr_set: Set Power Role
* @vconn_set: Source VCONN
* @port_type_set: Set port type
*/
struct typec_operations {
int (*try_role)(struct typec_port *port, int role);
int (*dr_set)(struct typec_port *port, enum typec_data_role role);
int (*pr_set)(struct typec_port *port, enum typec_role role);
int (*vconn_set)(struct typec_port *port, enum typec_role role);
int (*port_type_set)(struct typec_port *port,
enum typec_port_type type);
};
enum usb_pd_svdm_ver {
SVDM_VER_1_0 = 0,
SVDM_VER_2_0 = 1,
SVDM_VER_MAX = SVDM_VER_2_0,
};
/*
* struct typec_capability - USB Type-C Port Capabilities
* @type: Supported power role of the port
* @data: Supported data role of the port
* @revision: USB Type-C Specification release. Binary coded decimal
* @pd_revision: USB Power Delivery Specification revision if supported
* @svdm_version: USB PD Structured VDM version if supported
* @prefer_role: Initial role preference (DRP ports).
* @accessory: Supported Accessory Modes
* @fwnode: Optional fwnode of the port
* @driver_data: Private pointer for driver specific info
* @ops: Port operations vector
*
* Static capabilities of a single USB Type-C port.
*/
struct typec_capability {
enum typec_port_type type;
enum typec_port_data data;
u16 revision; /* 0120H = "1.2" */
u16 pd_revision; /* 0300H = "3.0" */
enum usb_pd_svdm_ver svdm_version;
int prefer_role;
enum typec_accessory accessory[TYPEC_MAX_ACCESSORY];
unsigned int orientation_aware:1;
struct fwnode_handle *fwnode;
void *driver_data;
const struct typec_operations *ops;
};
/* Specific to try_role(). Indicates the user want's to clear the preference. */
#define TYPEC_NO_PREFERRED_ROLE (-1)
struct typec_port *typec_register_port(struct device *parent,
const struct typec_capability *cap);
void typec_unregister_port(struct typec_port *port);
struct typec_partner *typec_register_partner(struct typec_port *port,
struct typec_partner_desc *desc);
void typec_unregister_partner(struct typec_partner *partner);
struct typec_cable *typec_register_cable(struct typec_port *port,
struct typec_cable_desc *desc);
void typec_unregister_cable(struct typec_cable *cable);
struct typec_cable *typec_cable_get(struct typec_port *port);
void typec_cable_put(struct typec_cable *cable);
int typec_cable_is_active(struct typec_cable *cable);
struct typec_plug *typec_register_plug(struct typec_cable *cable,
struct typec_plug_desc *desc);
void typec_unregister_plug(struct typec_plug *plug);
void typec_set_data_role(struct typec_port *port, enum typec_data_role role);
void typec_set_pwr_role(struct typec_port *port, enum typec_role role);
void typec_set_vconn_role(struct typec_port *port, enum typec_role role);
void typec_set_pwr_opmode(struct typec_port *port, enum typec_pwr_opmode mode);
int typec_set_orientation(struct typec_port *port,
enum typec_orientation orientation);
enum typec_orientation typec_get_orientation(struct typec_port *port);
int typec_set_mode(struct typec_port *port, int mode);
void *typec_get_drvdata(struct typec_port *port);
int typec_find_pwr_opmode(const char *name);
int typec_find_orientation(const char *name);
int typec_find_port_power_role(const char *name);
int typec_find_power_role(const char *name);
int typec_find_port_data_role(const char *name);
void typec_partner_set_svdm_version(struct typec_partner *partner,
enum usb_pd_svdm_ver svdm_version);
int typec_get_negotiated_svdm_version(struct typec_port *port);
#endif /* __LINUX_USB_TYPEC_H */