ci: remove xuantie toolchain

Signed-off-by: Han Gao <gaohan@iscas.ac.cn>

.github/workflows/build.yml

@@ -0,0 +1,120 @@
+name: th1520-vendor-uboot-build
+
+on:
+  push:
+    tags:
+      - '*'
+    branches:
+      - '*'
+  pull_request:
+  workflow_dispatch:
+
+env:
+  mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2024.04.12
+  mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2024.04.12-nightly.tar.gz
+  wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
+  ARCH: riscv
+  CROSS_COMPILE: riscv64-unknown-linux-gnu-
+
+jobs:
+  build:
+    runs-on: ubuntu-22.04
+
+    steps:
+      - name: Install software
+        run: |
+              sudo apt update && \
+              sudo apt install -y gdisk dosfstools g++-12-riscv64-linux-gnu build-essential \
+                                  libncurses-dev gawk flex bison openssl libssl-dev tree \
+                                  dkms libelf-dev libudev-dev libpci-dev libiberty-dev autoconf device-tree-compiler
+
+      - name: Checkout uboot
+        uses: actions/checkout@v6
+
+      - name: uboot compile
+        run: |
+              mkdir output
+              ${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
+              tar -xvf ${mainline_toolchain_file_name} -C /opt
+              export PATH="/opt/riscv/bin:$PATH"
+              ${CROSS_COMPILE}gcc -v
+
+              pushd $PWD
+                make light_lpi4a_16g_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a-16g.bin
+                make clean
+                make light_lpi4a_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a.bin
+                make clean
+                make light_lpi4a_console_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lcon4a.bin
+                make clean
+                make light_lpi4a_console_16g_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lcon4a-16g.bin
+                make clean
+                make light_lpi4a_plastic_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-laptop4a.bin
+                make clean
+                make light_lpi4a_plastic_16g_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-laptop4a-16g.bin
+                make clean
+                make light_lpi4a_pocket_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-pocket4a.bin
+                make clean
+                make light_lpi4a_cluster_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lc4a.bin
+                make clean
+                make light_lpi4a_cluster_16g_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lc4a-16g.bin
+                make clean
+                make light_beagle_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-beagle.bin
+                make clean
+                make light_a_val_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-vala.bin
+                make clean
+                make light_milkv_meles_16g_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles-16g.bin
+                make clean
+                make light_milkv_meles_dualrank_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles.bin
+                make clean
+                make light_milkv_meles_singlerank_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles-4g.bin
+
+                # 8g emmc support
+                sed -i 's/name=swap,size=4096MiB,type=swap/name=swap,size=2MiB,type=swap/' include/configs/light-c910.h
+                make clean
+                make light_lpi4a_defconfig
+                make -j$(nproc)
+                find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a_8gemmc.bin
+              popd
+              tree ${GITHUB_WORKSPACE}/output
+
+      - name: 'Upload Artifact'
+        uses: actions/upload-artifact@v7
+        with:
+          name: th1520-uboot
+          path: output/*.bin
+          retention-days: 30
+
+      - name: 'Create release by tag'
+        uses: softprops/action-gh-release@v3
+        if: ${{ startsWith(github.ref, 'refs/tags/') }}
+        with:
+          files: output/*.bin
+          token: ${{ secrets.GITHUB_TOKEN }}

arch/Kconfig

@@ -119,6 +119,7 @@ config SANDBOX
 	select SPI
 	select SUPPORT_OF_CONTROL
 	select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
+	select SUPPORT_EXTENSION_SCAN
 	imply BITREVERSE
 	select BLOBLIST
 	imply CMD_DM
@@ -152,6 +153,7 @@ config SANDBOX
 	imply PHYLIB
 	imply DM_MDIO
 	imply DM_MDIO_MUX
+	imply CMD_EXTENSION
 
 config SH
 	bool "SuperH architecture"

arch/riscv/Makefile

@@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
 	CMODEL = medany
 endif
 
-ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
+RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
+
+# Newer binutils versions default to ISA spec version 20191213 which moves some
+# instructions from the I extension to the Zicsr and Zifencei extensions.
+toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
+ifeq ($(toolchain-need-zicsr-zifencei),y)
+	RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
+endif
+
+ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
 	     -mcmodel=$(CMODEL)
 
 PLATFORM_CPPFLAGS	+= $(ARCH_FLAGS)

arch/riscv/cpu/c9xx/cpu.c

@@ -125,10 +125,11 @@ void icache_enable(void)
 #ifdef CONFIG_SPL_BUILD
 #ifdef CONFIG_SPL_RISCV_MMODE
 #ifdef CONFIG_TARGET_LIGHT_C910
+// mhcr is 0x7c1
 	asm volatile (
-        "csrr x29, mhcr\n\t"
+        "csrr x29, 0x7c1\n\t"
         "ori x28, x29, 0x1\n\t"
-        "csrw mhcr, x28\n\t"
+        "csrw 0x7c1, x28\n\t"
     );
 #endif
 #endif
@@ -141,9 +142,9 @@ void dcache_enable(void)
 #ifdef CONFIG_SPL_RISCV_MMODE
 #ifdef CONFIG_TARGET_LIGHT_C910
 	asm volatile (
-		"csrr x29, mhcr\n\t"
-        "ori x28, x29, 0x2\n\t"
-        "csrw mhcr, x28\n\t"
+	"csrr x29, 0x7c1\n\t"
+	"ori x28, x29, 0x2\n\t"
+	"csrw 0x7c1, x28\n\t"
     );
 #endif
 #endif

arch/riscv/dts/Makefile

@@ -5,7 +5,8 @@ dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_ICE_C910) += ice-c910.dtb
 dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
 dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
-dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb
+dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb light-milkv-meles.dtb
+dtb-$(CONFIG_TARGET_LIGHT_C910) += light-lpi4a-laptop.dtb
 
 targets += $(dtb-y)
 

arch/riscv/dts/light-a-val.dts

@@ -513,8 +513,6 @@
 			compatible = "thead,light-dialog-pmic";
 			status = "okay";
 
-
-
 			soc_dvdd18_aon_reg: soc_dvdd18_aon {
 				regulator-name = "soc_dvdd18_aon";
 				regulator-boot-on;
@@ -669,6 +667,7 @@
 			status = "okay";
 			#address-cells = <1>;
 			#size-cells = <0>;
+			iic-config = <0 0 2>;
 			pmic_dev_0: pmic-dev@0 {
 			  pmic-name = "dialog,da9063,v1";
 			  pmic-addr = <0x5a 0x5b>;

arch/riscv/dts/light-b-product.dts

@@ -663,8 +663,8 @@
 			compatible = "thead,light-pmic-conf";
 			status = "okay";
 			#address-cells = <1>;
-			#size-cells = <0>;
-
+		    #size-cells = <0>;
+			iic-config = <0 0 2>;
 			pmic_dev_0: pmic-dev@0 {
 			  pmic-name = "ricoh,rn5t567,v0";
 			  pmic-addr = <0x31>;

arch/riscv/dts/light-beagle.dts

@@ -1,4 +1,7 @@
 /dts-v1/;
+
+#include <dt-bindings/pmic/light_pmic.h>
+
 / {
 	model = "T-HEAD c910 light";
 	compatible = "thead,c910_light";
@@ -479,6 +482,367 @@
 			lcd-en-gpios    = <&pcal6408ahk_a 2 0>; /* active high */
 			lcd-bias-en-gpios = <&pcal6408ahk_a 4 0>;/* active high */
 		};
+
+
+		aon {
+			compatible = "thead,light-aon";
+			status = "okay";
+
+			wakeup-by-gpio-on;
+			wakeup-by-rtc-on;
+
+			pd: light-aon-pd {
+				compatible = "thead,light-aon-pd";
+				#power-domain-cells = <1>;
+			};
+
+			light-regu-reg {
+				compatible = "thead,light-dialog-pmic";
+				status = "okay";
+
+				soc_dvdd18_aon_reg: soc_dvdd18_aon {
+					regulator-name = "soc_dvdd18_aon";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+					regulator-name = "soc_avdd33_usb3";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_dvdd08_aon_reg: soc_dvdd08_aon {
+					regulator-name = "soc_dvdd08_aon";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_apcpu_dvdd_dvddm_reg: soc_apcpu_dvdd_dvddm {
+					regulator-name = "soc_apcpu_dvdd_dvddm";
+					regulator-min-microvolt = <300000>;
+					regulator-max-microvolt = <1570000>;
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+					regulator-name = "soc_dvdd08_ddr";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+					regulator-name = "soc_vdd_ddr_1v8";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+					regulator-name = "soc_vdd_ddr_1v1";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+					regulator-name = "soc_vdd_ddr_0v6";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_dvdd18_ap_reg: soc_dvdd18_ap {
+					regulator-name = "soc_dvdd18_ap";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_dvdd08_ap_reg: soc_dvdd08_ap {
+					regulator-name = "soc_dvdd08_ap";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+					regulator-name = "soc_avdd08_mipi_hdmi";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+					regulator-name = "soc_avdd18_mipi_hdmi";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
+					regulator-name = "soc_dvdd33_emmc";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
+					regulator-name = "soc_vdd18_emmc";
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				soc_dovdd18_scan_reg: soc_dovdd18_scan {
+					regulator-name = "soc_dovdd18_scan";
+					regulator-min-microvolt = <900000>;
+					regulator-max-microvolt = <3600000>;
+				};
+				soc_vext_2v8_reg: soc_vext_2v8 {
+					regulator-name = "soc_vext_2v8";
+					regulator-boot-on;
+					regulator-always-on;
+					status = "disabled";
+				};
+				soc_dvdd12_scan_reg: soc_dvdd12_scan {
+					regulator-name = "soc_dvdd12_scan";
+					regulator-min-microvolt = <900000>;
+					regulator-max-microvolt = <3600000>;
+				};
+				soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+					regulator-name = "soc_avdd28_scan_en";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+				};
+				soc_avdd28_rgb_reg: soc_avdd28_rgb {
+					regulator-name = "soc_avdd28_rgb";
+					regulator-min-microvolt = <2200000>;
+					regulator-max-microvolt = <3475000>;
+					regulator-boot-on;
+					regulator-always-on;
+					status = "disabled";
+				};
+				soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
+					regulator-name = "soc_dovdd18_rgb";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <3600000>;
+					regulator-boot-on;
+					regulator-always-on;
+					status = "disabled";
+				};
+				soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
+					regulator-name = "soc_dvdd12_rgb";
+					regulator-min-microvolt = <400000>;
+					regulator-max-microvolt = <1675000>;
+					regulator-boot-on;
+					regulator-always-on;
+					status = "disabled";
+				};
+				soc_avdd25_ir_reg: soc_avdd25_ir {
+					regulator-name = "soc_avdd25_ir";
+					regulator-min-microvolt = <2200000>;
+					regulator-max-microvolt = <3475000>;
+					regulator-boot-on;
+					regulator-always-on;
+					status = "disabled";
+				};
+				soc_dovdd18_ir_reg: soc_dovdd18_ir {
+					regulator-name = "soc_dovdd18_ir";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <3600000>;
+					regulator-boot-on;
+					regulator-always-on;
+					status = "disabled";
+				};
+				soc_dvdd12_ir_reg: soc_dvdd12_ir {
+					regulator-name = "soc_dvdd12_ir";
+					regulator-min-microvolt = <400000>;
+					regulator-max-microvolt = <1675000>;
+					regulator-boot-on;
+					regulator-always-on;
+					status = "disabled";
+				};
+			};
+
+			aon_pmic_config {
+				compatible = "thead,light-pmic-conf";
+				status = "okay";
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+				iic-config = <0 0 2>;
+				pmic_dev_0: pmic-dev@0 {
+					pmic-name = "dialog,da9063,v1";
+					pmic-addr = <0x5a 0x5b>;
+					pmic_wdt_on;
+					status = "okay";
+				};
+
+				pmic_dev_1: pmic-dev@1 {
+					pmic-name = "dialog,da9121,v1";
+					pmic-addr = <0x68>;
+					status = "okay";
+				};
+
+				regu_config_0 {
+					reg_info = <&soc_dvdd18_aon_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO3>;
+					};
+				};
+
+				regu_config_1 {
+					reg_info = <&soc_avdd33_usb3_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO9>;
+					};
+				};
+
+				regu_config_2 {
+					reg_info = <&soc_dvdd08_aon_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO2>;
+					};
+				};
+
+				regu_config_3 {
+					reg_info = <&soc_apcpu_dvdd_dvddm_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE1>;
+						auto_on_info = <0 0 800000>;
+					};
+
+					regu_id@1 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE2>;
+						auto_on_info = <1 0 800000>;
+					};
+
+					regu_id@2 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKIO>;
+						auto_on_info = <2 0 800000>;
+					};
+
+					coupling_info@0 {
+						negative-min;
+						info = <0 2 5 30>;
+					};
+
+					coupling_info@1 {
+						negative-min;
+						info = <1 2 5 30>;
+					};
+				};
+
+				regu_config_4 {
+					reg_info = <&soc_dvdd08_ddr_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPERI>;
+					};
+				};
+
+				regu_config_5 {
+					reg_info = <&soc_vdd_ddr_1v8_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO4>;
+					};
+				};
+
+				regu_config_6 {
+					reg_info = <&soc_vdd_ddr_1v1_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKMEM>;
+					};
+				};
+
+				regu_config_7 {
+					reg_info = <&soc_vdd_ddr_0v6_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPRO>;
+					};
+				};
+
+				regu_config_8 {
+					reg_info = <&soc_dvdd18_ap_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO11>;
+					};
+				};
+
+				regu_config_9 {
+					reg_info = <&soc_avdd08_mipi_hdmi_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO1>;
+					};
+				};
+
+				regu_config_10 {
+					reg_info = <&soc_avdd18_mipi_hdmi_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO5>;
+					};
+				};
+
+				regu_config_11 {
+					reg_info = <&soc_dvdd33_emmc_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO10>;
+					};
+				};
+
+				regu_config_12 {
+					reg_info = <&soc_dovdd18_scan_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO6>;
+						auto_on_info = <3 1 1800000>;
+						auto_off_info = <1 1>;
+					};
+				};
+
+				regu_config_13 {
+					reg_info = <&soc_dvdd12_scan_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO8>;
+						auto_on_info = <4 1 1200000>;
+						auto_off_info = <2 1>;
+					};
+				};
+
+				regu_config_14 {
+					reg_info = <&soc_avdd28_scan_en_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_LDO7>;
+						auto_on_info = <5 1 2800000>;
+						auto_off_info = <0 1>;
+					};
+				};
+
+				regu_config_15 {
+					reg_info = <&soc_dvdd08_ap_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_1 DA9121_ID_BUCK1>;
+						parent_pmic_dev = <&pmic_dev_0 2 0>;
+					};
+				};
+
+				regu_config_16 {
+					reg_info = <&soc_dvdd18_emmc_reg>;
+					status = "okay";
+					regu_id@0 {
+						pmic_dev = <&pmic_dev_0 DA9063_ID_GPIO7>;
+						parent_pmic_dev = <&pmic_dev_0 7 0>;
+					};
+				};
+			};
+		};
 	};
 
 	chosen {

arch/riscv/dts/light-lpi4a-laptop.dts

@@ -0,0 +1,46 @@
+#include "light-lpi4a.dts"
+
+/ {
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+        status = "okay";
+
+        pcal6408ahk_c: gpio@20 {
+                compatible = "nxp,pca9557";
+                reg = <0x18>;
+                gpio-controller;
+                #gpio-cells = <2>;
+        };
+};
+
+&i2c3 {
+	clock-frequency = <400000>;
+	status = "okay";
+	pcal6408ahk_d: gpio@20 {
+		compatible = "nxp,pca9557";
+		reg = <0x18>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+&lcd_backlight {
+	pwms = <&pwm 0 50000>;
+	brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
+	36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
+	76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
+	default-brightness-level = <2>;
+};
+
+&panel0 {
+	compatible = "ilitek,ili9881c";
+	status = "okay";
+	backlight = <&lcd_backlight>;
+	// 5v power cycle
+	// TODO: move into regulator
+	reset-gpios     = <&pcal6408ahk_c 0 0>; /* active low  */
+	/delete-property/ lcd-en-gpios;
+	/delete-property/ lcd-bias-en-gpios;
+};

arch/riscv/dts/light-lpi4a.dts

@@ -8,6 +8,10 @@
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	config {
+		huben-gpio = <&gpio1_porta 16 0>;
+        };
+
 	memory@0 {
 		device_type = "memory";
 		reg = <0x0 0xc0000000 0x0 0x40000000>;
@@ -489,7 +493,7 @@
 			default-brightness-level = <7>;
 		};
 
-		jadard_jd9365da {
+		panel0: dsi_panel0 {
 			compatible      = "jadard,jd9365da-h3";
 			backlight       = <&lcd_backlight>;
 			reset-gpio     = <&pcal6408ahk_d 7 0>;
@@ -677,7 +681,7 @@
 
 			#address-cells = <1>;
 			#size-cells = <0>;
-
+			iic-config = <0 0 2>;
 			pmic_dev_0: pmic-dev@0 {
 			  pmic-name = "dialog,da9063,v1";
 			  pmic-addr = <0x5a 0x5b>;

arch/riscv/dts/light-milkv-meles.dts

@@ -0,0 +1,655 @@
+/dts-v1/;
+
+#include <dt-bindings/pmic/light_pmic.h>
+
+/ {
+	model = "Milk-V Meles";
+	compatible = "milkv,meles", "thead,c910_light";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	config {
+		select-gpio = <&gpio1_porta 16 0>; // Enable the blue LED on Milk-V Meles
+		fan-gpio = <&gpio2_porta 4 0>; // Enable the fan on Milk-V Meles, see schematic for details
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0xc0000000 0x0 0x40000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <3000000>;
+		u-boot,dm-pre-reloc;
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu";
+			mmu-type = "riscv,sv39";
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		ranges;
+		u-boot,dm-pre-reloc;
+
+		intc: interrupt-controller@ffd8000000 {
+			compatible = "riscv,plic0";
+			reg = <0xff 0xd8000000 0x0 0x04000000>;
+			status = "disabled";
+		};
+
+		dummy_apb: apb-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <62500000>;
+			clock-output-names = "dummy_apb";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_ahb: ahb-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <250000000>;
+			clock-output-names = "core";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_spi: spi-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <396000000>;
+			clock-output-names = "dummy_spi";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_qspi0: qspi0-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <792000000>;
+			clock-output-names = "dummy_qspi0";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_uart_sclk: uart-sclk-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <100000000>;
+			clock-output-names = "dummy_uart_sclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_i2c_icclk: i2c-icclk-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+			clock-output-names = "dummy_i2c_icclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_dpu_pixclk: dpu-pix-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <74250000>;
+			clock-output-names = "dummy_dpu_pixclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		dummy_dphy_refclk: dphy-ref-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <24000000>;
+			clock-output-names = "dummy_dpu_refclk";
+			#clock-cells = <0>;
+			u-boot,dm-pre-reloc;
+		};
+
+		serial@ffe7014000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0xff 0xe7014000 0x0 0x400>;
+			clocks = <&dummy_uart_sclk>;
+			clock-frequency = <100000000>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			u-boot,dm-pre-reloc;
+		};
+
+		gmac0: ethernet@ffe7070000 {
+			compatible = "snps,dwmac";
+			reg = <0xff 0xe7070000 0x0 0x2000>;
+			clocks = <&dummy_apb>;
+			clock-names = "stmmaceth";
+			snps,pbl = <32>;
+			snps,fixed-burst;
+
+			phy-mode = "rgmii-id";
+			phy-handle = <&phy_88E1111_a>;
+			status = "okay";
+			mdio0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				phy_88E1111_a: ethernet-phy@1 {
+					reg = <0x1>;
+				};
+			};
+		};
+
+		emmc: sdhci@ffe7080000 {
+			compatible = "snps,dwcmshc-sdhci";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			index = <0x0>;
+			clocks = <&dummy_ahb>;
+			clock-frequency = <198000000>;
+			clock-names = "core";
+			max-frequency = <198000000>;
+			sdhci-caps-mask = <0x0 0x1000000>;
+			mmc-hs400-1_8v;
+			non-removable;
+			no-sdio;
+			no-sd;
+			bus-width = <8>;
+			voltage= "1.8v";
+			pull_up;
+			io_fixed_1v8;
+			fifo-mode;
+			u-boot,dm-pre-reloc;
+		};
+
+		sdhci0: sd@ffe7090000 {
+			compatible = "snps,dwcmshc-sdhci";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			index = <0x1>;
+			clocks = <&dummy_ahb>;
+			clock-frequency = <198000000>;
+			max-frequency = <198000000>;
+			sd-uhs-sdr104;
+			pull_up;
+			clock-names = "core";
+			bus-width = <4>;
+			voltage= "3.3v";
+		};
+
+		gpio2: gpio@ffe7f34000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xe7f34000 0x0 0x1000>;
+			clocks = <&dummy_apb>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			gpio2_porta: gpio-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+			};
+		};
+
+		gpio0: gpio@ffec005000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xec005000 0x0 0x1000>;
+			clocks = <&dummy_apb>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			gpio0_porta: gpio-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+			};
+		};
+
+		gpio1: gpio@ffec006000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0xff 0xec006000 0x0 0x1000>;
+			clocks = <&dummy_apb>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			gpio1_porta: gpio-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+			};
+		};
+
+		axiscr {
+			compatible = "thead,axiscr";
+			reg = <0xff 0xff004000 0x0 0x1000>;
+			lock-read = "okay";
+			lock-write = "okay";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			u-boot,dm-pre-reloc;
+			axiscr0: axisrc@0 {
+				device_type = "axiscr";
+				region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+			axiscr1: axisrc@1 {
+				device_type = "axiscr";
+				region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+			axiscr2: axisrc@2 {
+				device_type = "axiscr";
+				region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+		};
+
+		axiparity {
+			compatible = "thead,axiparity";
+			reg = <0xff 0xff00c000 0x0 0x1000>;
+			lock = "okay";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			u-boot,dm-pre-reloc;
+			axiparity0: axiparity@0 {
+				device_type = "axiparity";
+				region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+			axiparity1: axiparity@1 {
+				device_type = "axiparity";
+				region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
+				status = "disabled";
+				#address-cells = <2>;
+				#size-cells = <2>;
+				u-boot,dm-pre-reloc;
+			};
+		};
+
+		aon {
+		compatible = "thead,light-aon";
+		status = "okay";
+
+		wakeup-by-gpio-on;
+		wakeup-by-rtc-on;
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+		};
+
+		light-regu-reg {
+			compatible = "thead,light-dialog-pmic";
+			status = "okay";
+
+
+
+			soc_dvdd18_aon_reg: soc_dvdd18_aon {
+				regulator-name = "soc_dvdd18_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+				regulator-name = "soc_avdd33_usb3";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_aon_reg: soc_dvdd08_aon {
+				regulator-name = "soc_dvdd08_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_apcpu_dvdd_dvddm_reg: soc_apcpu_dvdd_dvddm {
+				regulator-name = "soc_apcpu_dvdd_dvddm";
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1570000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+				regulator-name = "soc_dvdd08_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+				regulator-name = "soc_vdd_ddr_1v8";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+				regulator-name = "soc_vdd_ddr_1v1";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+				regulator-name = "soc_vdd_ddr_0v6";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_ap_reg: soc_dvdd18_ap {
+				regulator-name = "soc_dvdd18_ap";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_ap_reg: soc_dvdd08_ap {
+				regulator-name = "soc_dvdd08_ap";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+				regulator-name = "soc_avdd08_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+				regulator-name = "soc_avdd18_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
+				regulator-name = "soc_dvdd33_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
+				regulator-name = "soc_vdd18_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+			soc_dovdd18_scan_reg: soc_dovdd18_scan {
+				regulator-name = "soc_dovdd18_scan";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+			soc_vext_2v8_reg: soc_vext_2v8 {
+				regulator-name = "soc_vext_2v8";
+				regulator-boot-on;
+				regulator-always-on;
+				status = "disabled";
+			};
+			soc_dvdd12_scan_reg: soc_dvdd12_scan {
+				regulator-name = "soc_dvdd12_scan";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+				regulator-name = "soc_avdd28_scan_en";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+			soc_avdd28_rgb_reg: soc_avdd28_rgb {
+				regulator-name = "soc_avdd28_rgb";
+				regulator-min-microvolt = <2200000>;
+				regulator-max-microvolt = <3475000>;
+				regulator-boot-on;
+				regulator-always-on;
+				status = "disabled";
+			};
+			soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
+				regulator-name = "soc_dovdd18_rgb";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3600000>;
+				regulator-boot-on;
+				regulator-always-on;
+				status = "disabled";
+			};
+			soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
+				regulator-name = "soc_dvdd12_rgb";
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1675000>;
+				regulator-boot-on;
+				regulator-always-on;
+				status = "disabled";
+			};
+			soc_avdd25_ir_reg: soc_avdd25_ir {
+				regulator-name = "soc_avdd25_ir";
+				regulator-min-microvolt = <2200000>;
+				regulator-max-microvolt = <3475000>;
+				regulator-boot-on;
+				regulator-always-on;
+				status = "disabled";
+			};
+			soc_dovdd18_ir_reg: soc_dovdd18_ir {
+				regulator-name = "soc_dovdd18_ir";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3600000>;
+				regulator-boot-on;
+				regulator-always-on;
+				status = "disabled";
+			};
+			soc_dvdd12_ir_reg: soc_dvdd12_ir {
+				regulator-name = "soc_dvdd12_ir";
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1675000>;
+				regulator-boot-on;
+				regulator-always-on;
+				status = "disabled";
+			};
+	   };
+
+	    aon_pmic_config {
+			compatible = "thead,light-pmic-conf";
+			status = "okay";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+			iic-config = <0 0 2>;
+			pmic_dev_0: pmic-dev@0 {
+			  pmic-name = "dialog,da9063,v1";
+			  pmic-addr = <0x5a 0x5b>;
+			  pmic_wdt_on;
+			  status = "okay";
+			};
+
+			pmic_dev_1: pmic-dev@1 {
+			  pmic-name = "dialog,da9121,v1";
+			  pmic-addr = <0x68>;
+			  status = "okay";
+			};
+
+			regu_config_0 {
+                reg_info = <&soc_dvdd18_aon_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO3>;
+				};
+			};
+
+			regu_config_1 {
+                reg_info = <&soc_avdd33_usb3_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO9>;
+				};
+			};
+
+			regu_config_2 {
+                reg_info = <&soc_dvdd08_aon_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO2>;
+				};
+			};
+
+			regu_config_3 {
+                reg_info = <&soc_apcpu_dvdd_dvddm_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE1>;
+					auto_on_info = <0 0 800000>;
+				};
+
+				regu_id@1 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE2>;
+					auto_on_info = <1 0 800000>;
+				};
+
+				regu_id@2 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKIO>;
+					auto_on_info = <2 0 800000>;
+				};
+
+				coupling_info@0 {
+					negative-min;
+                    info = <0 2 5 30>;
+				};
+
+				coupling_info@1 {
+					negative-min;
+                    info = <1 2 5 30>;
+				};
+			};
+
+			regu_config_4 {
+                reg_info = <&soc_dvdd08_ddr_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPERI>;
+				};
+			};
+
+			regu_config_5 {
+                reg_info = <&soc_vdd_ddr_1v8_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO4>;
+				};
+			};
+
+		    regu_config_6 {
+                reg_info = <&soc_vdd_ddr_1v1_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKMEM>;
+				};
+			};
+
+			regu_config_7 {
+                reg_info = <&soc_vdd_ddr_0v6_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPRO>;
+				};
+			};
+
+			regu_config_8 {
+                reg_info = <&soc_dvdd18_ap_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO11>;
+				};
+			};
+
+            regu_config_9 {
+                reg_info = <&soc_avdd08_mipi_hdmi_reg>;
+				status = "okay";
+				regu_id@0 {
+					pmic_dev = <&pmic_dev_0 DA9063_ID_LDO1>;
+				};
+			};
+
+			regu_config_10 {
+                reg_info = <&soc_avdd18_mipi_hdmi_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO5>;
+				};
+			};
+
+			regu_config_11 {
+                reg_info = <&soc_dvdd33_emmc_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO10>;
+				};
+			};
+
+			regu_config_12 {
+                reg_info = <&soc_dovdd18_scan_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO6>;
+					auto_on_info = <3 1 1800000>;
+					auto_off_info = <1 1>;
+				};
+			};
+
+
+			regu_config_13 {
+                reg_info = <&soc_dvdd12_scan_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO8>;
+					auto_on_info = <4 1 1200000>;
+					auto_off_info = <2 1>;
+				};
+			};
+
+			regu_config_14 {
+                reg_info = <&soc_avdd28_scan_en_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_LDO7>;
+					auto_on_info = <5 1 2800000>;
+					auto_off_info = <0 1>;
+				};
+			};
+
+			regu_config_15 {
+                reg_info = <&soc_dvdd08_ap_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_1 DA9121_ID_BUCK1>;
+                    parent_pmic_dev = <&pmic_dev_0 2 0>;
+				};
+			};
+
+			regu_config_16 {
+                reg_info = <&soc_dvdd18_emmc_reg>;
+				status = "okay";
+				regu_id@0 {
+                    pmic_dev = <&pmic_dev_0 DA9063_ID_GPIO7>;
+					parent_pmic_dev = <&pmic_dev_0 7 0>;
+				};
+			};
+		};
+	};
+	
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+		stdout-path = "/soc/serial@ffe7014000:115200";
+	};
+};

arch/riscv/include/asm/bitops.h

@@ -90,6 +90,16 @@ static inline int __test_and_clear_bit(int nr, void *addr)
 	return retval;
 }
 
+static inline int test_and_clear_bit(int nr, volatile void * addr)
+{
+	unsigned long flags = 0;
+	int out;
+
+	out = __test_and_clear_bit(nr, addr);
+
+	return out;
+}
+
 static inline int __test_and_change_bit(int nr, void *addr)
 {
 	int mask, retval;

arch/riscv/lib/bootm.c

@@ -110,7 +110,7 @@ void next_stage(void)
 bool has_reset_sample(ulong dtb_addr)
 {
 	int node_offset;
-	node_offset = fdt_path_offset(dtb_addr, "/soc/reset-sample");
+	node_offset = fdt_path_offset((void *)dtb_addr, "/soc/reset-sample");
 	if (node_offset < 0) {
 		printf("## fdt has no reset_sample\n");
 		return false;
@@ -160,8 +160,8 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 
 	announce_and_cleanup(fake);
 
-	_load_start = kernel;
-	_dtb_addr = images->ft_addr;
+	_load_start = (ulong)kernel;
+	_dtb_addr = (ulong)(images->ft_addr);
 	_dyn_info_addr = (ulong)&opensbi_info;
 	if (!has_reset_sample(_dtb_addr)) {
 		opensbi_info.magic = FW_DYNAMIC_INFO_MAGIC_VALUE;

arch/sandbox/dts/Makefile

@@ -6,6 +6,7 @@ else
 dtb-$(CONFIG_SANDBOX) += sandbox.dtb
 endif
 dtb-$(CONFIG_UT_DM) += test.dtb
+dtb-$(CONFIG_CMD_EXTENSION) += overlay0.dtbo overlay1.dtbo
 
 targets += $(dtb-y)
 

arch/sandbox/dts/overlay0.dts

@@ -0,0 +1,9 @@
+/dts-v1/;
+/plugin/;
+
+&{/buttons} {
+	btn3 {
+		gpios = <&gpio_a 5 0>;
+		label = "button3";
+	};
+};

arch/sandbox/dts/overlay1.dts

@@ -0,0 +1,9 @@
+/dts-v1/;
+/plugin/;
+
+&{/buttons} {
+	btn4 {
+		gpios = <&gpio_a 5 0>;
+		label = "button4";
+	};
+};

board/sandbox/sandbox.c

@@ -12,6 +12,9 @@
 #include <os.h>
 #include <asm/test.h>
 #include <asm/u-boot-sandbox.h>
+#include <malloc.h>
+
+#include <extension_board.h>
 
 /*
  * Pointer to initial global data area
@@ -58,6 +61,26 @@ int board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_EXTENSION
+int extension_board_scan(struct list_head *extension_list)
+{
+	struct extension *extension;
+	int i;
+
+	for (i = 0; i < 2; i++) {
+		extension = calloc(1, sizeof(struct extension));
+		snprintf(extension->overlay, sizeof(extension->overlay), "overlay%d.dtbo", i);
+		snprintf(extension->name, sizeof(extension->name), "extension board %d", i);
+		snprintf(extension->owner, sizeof(extension->owner), "sandbox");
+		snprintf(extension->version, sizeof(extension->version), "1.1");
+		snprintf(extension->other, sizeof(extension->other), "Fictionnal extension board");
+		list_add_tail(&extension->list, extension_list);
+	}
+
+	return i;
+}
+#endif
+
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {

board/thead/light-c910/Kconfig

@@ -130,13 +130,17 @@ config TARGET_LIGHT_FM_C910_B_POWER
     bool "light fullmask for light-b-power board "
     default n
 
+config TARGET_LIGHT_FM_C910_MILKV_MELES
+    bool "light fullmask for Milk-V Meles board "
+    default n
+
 config SYS_TEXT_BASE
     default 0xc0000000 if RISCV_MMODE
     default 0x00200000 if RISCV_SMODE
 
 config SPL_TEXT_BASE
     hex
-    default 0xffe0000800
+    default 0xffe0000000
 
 config SPL_MAX_SIZE
     hex

board/thead/light-c910/board.c

@@ -10,12 +10,14 @@
 #include <usb.h>
 #include <usb/xhci.h>
 #include <cpu_func.h>
+#include <asm/gpio.h>
 #include <abuf.h>
 #include "sec_library.h"
 
 #ifdef CONFIG_LIGHT_AON_CONF
 #include "../../../drivers/misc/light_regu.h"
 #include "dm/device.h"
+#include "dm/uclass.h"
 #endif
 
 #ifdef CONFIG_USB_DWC3
@@ -52,8 +54,6 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 
 int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
 {
-
-
 	int ret = board_usb_init(index, USB_INIT_HOST);
 	if (ret != 0) {
 		puts("Failed to initialize board for USB\n");
@@ -140,7 +140,7 @@ void boot_audio(void)
 
 #ifdef CONFIG_LIGHT_AON_CONF
 
-int get_and_set_aon_config_data()
+int get_and_set_aon_config_data(void)
 {
 	int ret =0;
     struct udevice *dev;
@@ -155,12 +155,12 @@ int get_and_set_aon_config_data()
 	config_data = (struct mic_regu_platdata *)(dev->platdata);
 
     volatile aon_config_t* read_config = (aon_config_t* )C910_E902_START_ADDRESS;
-	if(strncmp(read_config->magic , AON_CONFIG_MAGIC, strlen(AON_CONFIG_MAGIC))) {
+	if(strncmp((const char*)read_config->magic , AON_CONFIG_MAGIC, strlen(AON_CONFIG_MAGIC))) {
         printf("No aon config magic found in aon bin, please check the aon bin\n");
 		return -1;
 	}
 
-	if(strncmp(read_config->version, AON_CONFIG_VERSION, strlen(AON_CONFIG_VERSION))) {
+	if(strncmp((const char*)read_config->version, AON_CONFIG_VERSION, strlen(AON_CONFIG_VERSION))) {
        printf("Err aon config version, aon bin is:%s, u-boot is:%s\n", read_config->version, AON_CONFIG_VERSION);
 	   return -1;
 	}
@@ -173,25 +173,28 @@ int get_and_set_aon_config_data()
 	/*set pmic dev info */
 	int pmic_dev_num =  config_data->pmic_list.pmic_num;
     int pmic_dev_list_offset   = sizeof(aon_config_t);
-	uintptr_t pmic_dev_start_addr  =  C910_E902_START_ADDRESS + pmic_dev_list_offset;
+	uint64_t pmic_dev_start_addr  =  C910_E902_START_ADDRESS + pmic_dev_list_offset;
 
 	int  regu_num            = config_data->regu_id_list.regu_id_num;
 	int  regu_id_list_offset = pmic_dev_list_offset + pmic_dev_num * sizeof(pmic_dev_info_t);
-	uintptr_t regu_start_addr  = C910_E902_START_ADDRESS + regu_id_list_offset;
+	uint64_t regu_start_addr  = C910_E902_START_ADDRESS + regu_id_list_offset;
     int aon_bin_size  =  regu_id_list_offset + regu_num* sizeof(csi_regu_id_t);
     if( aon_bin_size > read_config->aon_config_partition_size) {
-         printf("Invalid aon partition size, aon bin support:%d, u-boot is %d\n", read_config->aon_config_partition_size, aon_bin_size);
+         printf("Invalid aon partition size, aon bin support:%lld, u-boot is %d\n", read_config->aon_config_partition_size, aon_bin_size);
 		 return -1;
 	}
 
-	printf("pmic_dev_num:%d offset:%d addr:0x%10x\n",pmic_dev_num, pmic_dev_list_offset, pmic_dev_start_addr);
+	printf("pmic_dev_num:%d offset:%d addr:%lld\n",pmic_dev_num, pmic_dev_list_offset, pmic_dev_start_addr);
 
-	memcpy(pmic_dev_start_addr, config_data->pmic_list.pmic_list, pmic_dev_num * sizeof(pmic_dev_info_t));
-    printf("regu_num:%d offset:%d addr:0x%10x\n",regu_num,regu_id_list_offset, regu_start_addr);
+	memcpy((void*)pmic_dev_start_addr, config_data->pmic_list.pmic_list, pmic_dev_num * sizeof(pmic_dev_info_t));
+    printf("regu_num:%d offset:%d addr:%lld\n",regu_num,regu_id_list_offset, regu_start_addr);
 
-	memcpy(regu_start_addr, config_data->regu_id_list.regu_id_list, regu_num * sizeof(csi_regu_id_t));
+	memcpy((void*)regu_start_addr, config_data->regu_id_list.regu_id_list, regu_num * sizeof(csi_regu_id_t));
     
 	read_config->wakeup_flag = config_data->wakeup_flag;
+	read_config->aon_pmic.iic_config.iic_id = config_data->iic_config.iic_id;
+	read_config->aon_pmic.iic_config.addr_mode = config_data->iic_config.addr_mode;
+	read_config->aon_pmic.iic_config.speed  = config_data->iic_config.speed;
 	read_config->aon_pmic.pmic_dev_num =  pmic_dev_num;
     read_config->aon_pmic.pmic_dev_list_offset   = pmic_dev_list_offset;
 
@@ -199,11 +202,12 @@ int get_and_set_aon_config_data()
 	read_config->aon_pmic.regu_num =  regu_num;
 	read_config->aon_pmic.regu_id_list_offset = regu_id_list_offset;
 
+	memcpy((void*)read_config->uboot_set_magic, UBOOT_CONFIG_MAGIC, strlen(UBOOT_CONFIG_MAGIC));
+
     flush_cache((uintptr_t)C910_E902_START_ADDRESS, aon_bin_size);
 
 	printf("-->pmic_dev_num:%d offset:%d\n",read_config->aon_pmic.pmic_dev_num, read_config->aon_pmic.pmic_dev_list_offset);
 	printf("-->regu_num:%d offset:%d\n",read_config->aon_pmic.regu_num,read_config->aon_pmic.regu_id_list_offset);
-
 	return 0;
 }
 #endif
@@ -240,6 +244,40 @@ int do_bootslave(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 }
 #endif
 
+static void light_c910_set_gpio_output_high(const char* gpio_name)
+{
+	ofnode node;
+	struct gpio_desc select_gpio;
+
+	printf("%s: trying to set gpio output high\n", __func__);
+
+	node = ofnode_path("/config");
+	if (!ofnode_valid(node)) {
+		printf("%s: no /config node?\n", __func__);
+		return;
+	}
+
+	if (gpio_request_by_name_nodev(node, gpio_name, 0,
+				       &select_gpio, GPIOD_IS_OUT)) {
+		printf("%s: could not find a /config/%s\n", __func__, gpio_name);
+		return;
+	}
+
+	dm_gpio_set_value(&select_gpio, 1);
+}
+
+int misc_init_r(void)
+{
+	// Enable blue LED
+	light_c910_set_gpio_output_high("select-gpio");
+
+	// Enable fan on some boards(currently only on Meles)
+	// For LPi4A, the fan is controlled by PWM, see lpi4a_fan_pwm_config() in light.c
+	light_c910_set_gpio_output_high("fan-gpio");
+
+	return 0;
+}
+
 #ifdef CONFIG_BOARD_RNG_SEED
 const char pre_gen_seed[128] = {211, 134, 226, 116, 1, 13, 224, 196, 88, 213, 188, 219, 128, 41, 231, 228, 129, 123, 173, 234, 219, 79, 152, 154, 169, 27, 183, 166, 52, 21, 118, 7, 155, 89, 124, 156, 102, 92, 96, 190, 49, 28, 154, 177, 69, 129, 149, 199, 253, 66, 177, 216, 146, 73, 114, 59, 100, 41, 225, 152, 62, 88, 160, 217, 177, 28, 117, 23, 120, 213, 213, 169, 242, 111, 90, 55, 241, 239, 254, 238, 50, 175, 198, 196, 248, 56, 255, 92, 97, 224, 245, 160, 56, 149, 121, 233, 177, 239, 0, 41, 196, 214, 210, 182, 69, 44, 238, 54, 27, 236, 36, 77, 156, 234, 17, 148, 34, 16, 241, 132, 241, 230, 36, 41, 123, 157, 19, 44};
 /* Use hardware rng to seed Linux random. */

board/thead/light-c910/clock_config.c

@@ -1146,7 +1146,7 @@ void ap_mipi_dsi1_clk_endisable(bool en)
 	writel(cfg1, (void __iomem *)AP_DPU1_PLL_CFG1);
 }
 
-#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
 static void ap_multimedia_div_num_set(enum multimedia_div_type type, unsigned int div_num)
 {
 	unsigned long div_reg;
@@ -1305,7 +1305,7 @@ int clk_config(void)
 
 	/* The boards other than the LightA board perform the bus down-speed operation */
 
-#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
 	ap_multimedia_div_num_set(VI_MIPI_CSI0_DIV, 12); /* Input frquency: 2376MHZ */
 	ap_multimedia_div_num_set(VI_ISP0_CORE_DIV, 12); /* Input frquency: 2376MHZ */
 	ap_multimedia_div_num_set(VI_ISP1_CORE_DIV, 12); /* Input frquency: 2376MHZ */

board/thead/light-c910/light.c

@@ -34,6 +34,7 @@
 
 #define GMAC0_APB3S_BADDR	0xffec003000
 #define GMAC1_APB3S_BADDR	0xffec004000
+
 static uint64_t apb3s_baddr;
 extern int check_image_board_id(uint8_t *image_data);
 
@@ -634,6 +635,7 @@ static void light_iopin_init(void)
 {
 	return;
 }
+
 #elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_A)
 static void light_iopin_init(void)
 {
@@ -813,6 +815,7 @@ static void light_iopin_init(void)
 	light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
 
 }
+
 #elif defined ( CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined ( CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER)
 static void light_iopin_init(void)
 {
@@ -1218,7 +1221,8 @@ static void light_iopin_init(void)
 	light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
 	light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
 }
-#elif defined   (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
+
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF)
 static void light_iopin_init(void)
 {
 	/* aon-padmux config */
@@ -1371,7 +1375,7 @@ static void light_iopin_init(void)
 	light_pin_cfg(GPIO2_22,PIN_SPEED_NORMAL,PIN_PN,2);                        ///<WIFI_BT_GPIO2
 	light_pin_cfg(GPIO2_23,PIN_SPEED_NORMAL,PIN_PN,2);                        ///<WIFI_BT_GPIO3
 	light_pin_cfg(GPIO2_24,PIN_SPEED_NORMAL,PIN_PN,2);                        ///<WIFI_BT_RST_N
-	light_pin_cfg(GPIO2_25,PIN_SPEED_NORMAL,PIN_PU,2);                        ///KEY1
+	light_pin_cfg(GPIO2_25,PIN_SPEED_NORMAL,PIN_PN,2);                        ///KEY1
 
 
 	light_pin_mux(SDIO0_WPRTN,3);
@@ -1388,7 +1392,7 @@ static void light_iopin_init(void)
 	light_pin_mux(GPIO3_2,1);
 	light_pin_mux(GPIO3_3,0);
 	light_pin_cfg(GPIO2_30, PIN_SPEED_NORMAL, PIN_PN, 0x2);                 ///NC
-	light_pin_cfg(GPIO2_31, PIN_SPEED_NORMAL, PIN_PN, 0x2);                 ///NC
+	light_pin_cfg(GPIO2_31, PIN_SPEED_NORMAL, PIN_PU, 0x2);                 ///NC
 	light_pin_cfg(GPIO3_0, PIN_SPEED_NORMAL, PIN_PN, 0x2);                  ///NC
 	light_pin_cfg(GPIO3_1, PIN_SPEED_NORMAL, PIN_PN, 0x2);
 	light_pin_cfg(GPIO3_2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
@@ -1472,7 +1476,6 @@ static void light_iopin_init(void)
 	light_pin_cfg(AUDIO_PA29, PIN_SPEED_NORMAL, PIN_PN, 2);
 	light_pin_mux(AUDIO_PA30, 0);
 	light_pin_cfg(AUDIO_PA30, PIN_SPEED_NORMAL, PIN_PN, 2);
-	#warning "aon set to 3"
 	light_pin_mux(AUDIO_PA30, 3);
 
 	// light_pin_mux(AUDIO_PA9,3);                         ///AUDIO-PA-RESET
@@ -1689,6 +1692,565 @@ static void light_iopin_init(void)
 	light_pin_cfg(GMAC0_COL, PIN_SPEED_NORMAL, PIN_PU, 2);
 	light_pin_cfg(GMAC0_CRS, PIN_SPEED_NORMAL, PIN_PU, 2);
 }
+
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
+static void light_iopin_init(void)
+{	
+	/* P8_03 (Ball:J34) GPIO1_21_MUX*/
+	light_pin_mux(GPIO1_21,3);
+	light_pin_cfg(GPIO1_21, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_04 (Ball:J35) GPIO1_22_MUX*/
+	light_pin_mux(GPIO1_22,3);
+	light_pin_cfg(GPIO1_22, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_05 (Ball:K32) GPIO1_23_MUX*/
+	light_pin_mux(GPIO1_23,3);
+	light_pin_cfg(GPIO1_23, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_06 (Ball:K33) GPIO1_24_MUX*/
+	light_pin_mux(GPIO1_24,3);
+	light_pin_cfg(GPIO1_24, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_07 (Ball:K34) GPIO1_25_MUX*/
+	light_pin_mux(GPIO1_25,3);
+	light_pin_cfg(GPIO1_25, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_08 (Ball:K35) GPIO1_26_MUX*/
+	light_pin_mux(GPIO1_26,0);
+	light_pin_cfg(GPIO1_26, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_09 (Ball:K36) GPIO1_27_MUX*/
+	light_pin_mux(GPIO1_27,0);
+	light_pin_cfg(GPIO1_27, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_10 (Ball:K37) GPIO1_28_MUX*/
+	light_pin_mux(GPIO1_28,0);
+	light_pin_cfg(GPIO1_28, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_11 (Ball:L32) GPIO1_29_MUX*/
+	light_pin_mux(GPIO1_29,0);
+	light_pin_cfg(GPIO1_29, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_12 (Ball:L33) GPIO1_30_MUX*/
+	light_pin_mux(GPIO1_30,0);
+	light_pin_cfg(GPIO1_30, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_13 (Ball:C6) GPIO3_2_MUX*/
+	light_pin_mux(GPIO3_2,0);
+	light_pin_cfg(GPIO3_2, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_14 (Ball:E29) CLK_OUT_3_MUX*/
+	light_pin_mux(CLK_OUT_3,3);
+	light_pin_cfg(CLK_OUT_3, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_15 (Ball:A6) GPIO3_0_MUX*/
+	light_pin_mux(GPIO3_0,0);
+	light_pin_cfg(GPIO3_0, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_16 (Ball:F34) GPIO0_20_MUX*/
+	light_pin_mux(GPIO0_20,0);
+	light_pin_cfg(GPIO0_20, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_17 (Ball:B6) GPIO3_1_MUX*/
+	light_pin_mux(GPIO3_1,0);
+	light_pin_cfg(GPIO3_1, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_18 (Ball:B34) GPIO1_5_MUX*/
+	light_pin_mux(GPIO1_5,0);
+	light_pin_cfg(GPIO1_5, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_19 (Ball:D6) GPIO3_3_MUX*/
+	light_pin_mux(GPIO3_3,0);
+	light_pin_cfg(GPIO3_3, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_20 (Ball:C34) GPIO1_6_MUX*/
+	light_pin_mux(GPIO1_6,0);
+	light_pin_cfg(GPIO1_6, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_21 (Ball:D34) GPIO1_7_MUX*/
+	light_pin_mux(GPIO1_7,0);
+	light_pin_cfg(GPIO1_7, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_22 (Ball:B35) GPIO1_8_MUX*/
+	light_pin_mux(GPIO1_8,0);
+	light_pin_cfg(GPIO1_8, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_23 (Ball:A36) GPIO1_9_MUX*/
+	light_pin_mux(GPIO1_9,0);
+	light_pin_cfg(GPIO1_9, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_24 (Ball:B36) GPIO1_10_MUX*/
+	light_pin_mux(GPIO1_10,0);
+	light_pin_cfg(GPIO1_10, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_25 (Ball:B37) GPIO1_11_MUX*/
+	light_pin_mux(GPIO1_11,0);
+	light_pin_cfg(GPIO1_11, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_26 (Ball:C36) GPIO1_12_MUX*/
+	light_pin_mux(GPIO1_12,0);
+	light_pin_cfg(GPIO1_12, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_27 (Ball:D37) GPIO1_15_MUX*/
+	light_pin_mux(GPIO1_15,0);
+	light_pin_cfg(GPIO1_15, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_28 (Ball:E34) GPIO1_16_MUX*/
+	light_pin_mux(GPIO1_16,0);
+	light_pin_cfg(GPIO1_16, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_29 (Ball:D36) GPIO1_14_MUX*/
+	light_pin_mux(GPIO1_14,0);
+	light_pin_cfg(GPIO1_14, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_30 (Ball:D35) GPIO1_13_MUX*/
+	light_pin_mux(GPIO1_13,0);
+	light_pin_cfg(GPIO1_13, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_31 (Ball:D33) GPIO1_3_MUX*/
+	light_pin_mux(GPIO1_3,0);
+	light_pin_cfg(GPIO1_3, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_32 (Ball:A34) GPIO1_4_MUX*/
+	light_pin_mux(GPIO1_4,0);
+	light_pin_cfg(GPIO1_4, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_33 (Ball:C33) GPIO1_2_MUX*/
+	light_pin_mux(GPIO1_2,0);
+	light_pin_cfg(GPIO1_2, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_34 (Ball:E32) GPIO1_0_MUX*/
+	light_pin_mux(GPIO1_0,0);
+	light_pin_cfg(GPIO1_0, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_35 (Ball:A32) GPIO1_1_MUX*/
+	light_pin_mux(GPIO1_1,0);
+	light_pin_cfg(GPIO1_1, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_36 (Ball:D32) GPIO0_31_MUX*/
+	light_pin_mux(GPIO0_31,0);
+	light_pin_cfg(GPIO0_31, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_37 (Ball:B32) GPIO0_29_MUX*/
+	light_pin_mux(GPIO0_29,0);
+	light_pin_cfg(GPIO0_29, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_38 (Ball:C32) GPIO0_30_MUX*/
+	light_pin_mux(GPIO0_30,0);
+	light_pin_cfg(GPIO0_30, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_39 (Ball:D31) GPIO0_27_MUX*/
+	light_pin_mux(GPIO0_27,0);
+	light_pin_cfg(GPIO0_27, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_40 (Ball:E31) GPIO0_28_MUX*/
+	light_pin_mux(GPIO0_28,0);
+	light_pin_cfg(GPIO0_28, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_41 (Ball:F30) GPIO0_25_MUX*/
+	light_pin_mux(GPIO0_25,0);
+	light_pin_cfg(GPIO0_25, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_42 (Ball:C31) GPIO0_26_MUX*/
+	light_pin_mux(GPIO0_26,0);
+	light_pin_cfg(GPIO0_26, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_43 (Ball:C30) GPIO0_23_MUX*/
+	light_pin_mux(GPIO0_23,0);
+	light_pin_cfg(GPIO0_23, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_44 (Ball:D30) GPIO0_24_MUX*/
+	light_pin_mux(GPIO0_24,0);
+	light_pin_cfg(GPIO0_24, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_45 (Ball:F36) GPIO0_21_MUX*/
+	light_pin_mux(GPIO0_21,0);
+	light_pin_cfg(GPIO0_21, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P8_46 (Ball:D29) GPIO0_22_MUX*/
+	light_pin_mux(GPIO0_22,0);
+	light_pin_cfg(GPIO0_22, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_01 - GND */
+	/* P9_02 - GND */
+	/* P9_03 - VOUT_3V3 */
+	/* P9_04 - VOUT_3V3 */
+	/* P9_05 - VIN */
+	/* P9_06 - VIN */
+	/* P9_07 - VOUT_SYS */
+	/* P9_08 - VOUT_SYS */
+	/* P9_09 - ONKEY# */
+	/* P9_10 - RESET# */
+	/* P9_11 (Ball:M32) UART1_TXD_MUX*/
+	light_pin_mux(UART1_TXD,3);
+	light_pin_cfg(UART1_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_12 (Ball:H1) QSPI0_CSN0_MUX*/
+	light_pin_mux(QSPI0_CSN0,3);
+	light_pin_cfg(QSPI0_CSN0, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_13 (Ball:M33) UART1_RXD_MUX*/
+	light_pin_mux(UART1_RXD,3);
+	light_pin_cfg(UART1_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_14 (Ball:K3) QSPI0_D1_MISO_MUX*/
+	light_pin_mux(QSPI0_D1_MISO,3);
+	light_pin_cfg(QSPI0_D1_MISO, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_15 (Ball:K2) QSPI0_D2_WP_MUX*/
+	light_pin_mux(QSPI0_D2_WP,3);
+	light_pin_cfg(QSPI0_D2_WP, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_16 (Ball:J3) QSPI0_D0_MOSI_MUX*/
+	light_pin_mux(QSPI0_D0_MOSI,3);
+	light_pin_cfg(QSPI0_D0_MOSI, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_17 (Ball:H32) QSPI1_CSN0_MUX*/
+	light_pin_mux(QSPI1_CSN0,3);
+	light_pin_cfg(QSPI1_CSN0, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_18 (Ball:G35) QSPI1_D0_MOSI_MUX*/
+	light_pin_mux(QSPI1_D0_MOSI,3);
+	light_pin_cfg(QSPI1_D0_MOSI, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_19 (Ball:G4) I2C2_SCL_MUX*/
+	light_pin_mux(I2C2_SCL,3);
+	light_pin_cfg(I2C2_SCL, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_20 (Ball:G3) I2C2_SDA_MUX*/
+	light_pin_mux(I2C2_SDA,3);
+	light_pin_cfg(I2C2_SDA, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_21 (Ball:G34) QSPI1_D1_MISO_MUX*/
+	light_pin_mux(QSPI1_D1_MISO,3);
+	light_pin_cfg(QSPI1_D1_MISO, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_22 (Ball:H34) QSPI1_SCLK_MUX*/
+	light_pin_mux(QSPI1_SCLK,3);
+	light_pin_cfg(QSPI1_SCLK, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_23 (Ball:K1) QSPI0_D3_HOLD_MUX*/
+	light_pin_mux(QSPI0_D3_HOLD,3);
+	light_pin_cfg(QSPI0_D3_HOLD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_24 (Ball:G33) QSPI1_D2_WP_MUX*/
+	light_pin_mux(QSPI1_D2_WP,3);
+	light_pin_cfg(QSPI1_D2_WP, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_25 (Ball:F5) GPIO2_18_MUX*/
+	light_pin_mux(GPIO2_18,0);
+	light_pin_cfg(GPIO2_18, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_26 (Ball:F37) QSPI1_D3_HOLD_MUX*/
+	light_pin_mux(QSPI1_D3_HOLD,3);
+	light_pin_cfg(QSPI1_D3_HOLD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_27 (Ball:E4) GPIO2_19_MUX*/
+	light_pin_mux(GPIO2_19,0);
+	light_pin_cfg(GPIO2_19, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_28 (Ball:E3) SPI_CSN_MUX*/
+	light_pin_mux(SPI_CSN,3);
+	light_pin_cfg(SPI_CSN, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_29 (Ball:F1) SPI_MISO_MUX*/
+	light_pin_mux(SPI_MISO,3);
+	light_pin_cfg(SPI_MISO, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_30 (Ball:F2) SPI_MOSI_MUX*/
+	light_pin_mux(SPI_MOSI,3);
+	light_pin_cfg(SPI_MOSI, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_31 (Ball:D3) SPI_SCLK_MUX*/
+	light_pin_mux(SPI_SCLK,3);
+	light_pin_cfg(SPI_SCLK, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_32 - GND */
+	/* P9_33 - ADC_VIN_CH4 */
+	/* P9_34 - GND */
+	/* P9_35 - ADC_VIN_CH6 */
+	/* P9_36 - ADC_VIN_CH5 */
+	/* P9_37 - ADC_VIN_CH2 */
+	/* P9_38 - ADC_VIN_CH3 */
+	/* P9_39 - ADC_VIN_CH0 */
+	/* P9_39 - ADC_VIN_CH1 */
+	/* P9_41 (Ball:D2) GPIO2_13_MUX*/
+	light_pin_mux(GPIO2_13,0);
+	light_pin_cfg(GPIO2_13, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_42 (Ball:H3) QSPI0_SCLK_MUX*/
+	light_pin_mux(QSPI0_SCLK,3);
+	light_pin_cfg(QSPI0_SCLK, PIN_SPEED_NORMAL, PIN_PN, 2);
+	/* P9_43 - GND */
+	/* P9_44 - GND */
+	/* P9_45 - GND */
+	/* P9_46 - GND */
+
+	/* RTL8211F-VD-CG */
+
+	light_pin_mux(GMAC0_COL,3);
+	light_pin_mux(GMAC0_CRS,3);
+	light_pin_cfg(GMAC0_COL,PIN_SPEED_NORMAL,PIN_PU,2);
+	light_pin_cfg(GMAC0_CRS,PIN_SPEED_NORMAL,PIN_PU,2);
+
+	light_pin_cfg(GMAC0_TX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXEN, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXDV, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+
+	/* PMIC */
+	light_pin_cfg(I2C_AON_SCL,PIN_SPEED_NORMAL,PIN_PN,8);
+	light_pin_cfg(I2C_AON_SDA,PIN_SPEED_NORMAL,PIN_PN,8);
+	
+	light_pin_cfg(AOGPIO_14,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_15,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_mux(AOGPIO_14,0);
+	light_pin_mux(AOGPIO_15,0);
+	
+	/* Debug port */
+    light_pin_mux(AOGPIO_12,0xF); // TXD
+	light_pin_mux(AOGPIO_13,0xF); // RXD
+
+	/* LEDs */
+	light_pin_mux(AUDIO_PA8,3);
+	light_pin_cfg(AUDIO_PA8,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_mux(AUDIO_PA9,3);
+	light_pin_cfg(AUDIO_PA9,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_mux(AUDIO_PA10,3);
+	light_pin_cfg(AUDIO_PA10,PIN_SPEED_NORMAL,PIN_PU,2);
+	light_pin_mux(AUDIO_PA11,3);
+	light_pin_cfg(AUDIO_PA11,PIN_SPEED_NORMAL,PIN_PU,2);
+	light_pin_mux(AUDIO_PA12,3);
+	light_pin_cfg(AUDIO_PA12,PIN_SPEED_NORMAL,PIN_PU,2);
+	
+	/* Boot select*/
+
+	/* SD boot button*/
+	light_pin_mux(CLK_OUT_0,3);
+	light_pin_cfg(CLK_OUT_0,PIN_SPEED_NORMAL,PIN_PD,2);
+
+	/* NC */
+	light_pin_mux(CLK_OUT_1,3);
+	light_pin_cfg(CLK_OUT_1,PIN_SPEED_NORMAL,PIN_PD,2);
+
+	/* USB boot button*/
+	light_pin_mux(CLK_OUT_2,3);
+	light_pin_cfg(CLK_OUT_2,PIN_SPEED_NORMAL,PIN_PU,2);
+
+
+	/*mikroBUS pinmuxing*/
+
+	/*mikroBUS PWM*/
+	light_pin_mux(QSPI0_CSN1,3); // MB_PWM
+	light_pin_cfg(QSPI0_CSN1,PIN_SPEED_NORMAL,PIN_PN,2);
+	
+	/*mikroBUS GPIO*/
+	light_pin_mux(AUDIO_PA3,3); // MB_RST
+	light_pin_mux(GPIO2_21,0); // MB_INT
+	light_pin_cfg(AUDIO_PA3,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_21,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	/*mikroBUS UART*/
+	light_pin_mux(UART3_RXD,3); // MB_RXD
+	light_pin_mux(UART3_TXD,3); // MB_TXD
+	light_pin_cfg(UART3_RXD,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(UART3_TXD,PIN_SPEED_NORMAL,PIN_PN,2);
+	
+	/*mikroBUS SPI*/
+	light_pin_mux(GPIO2_20,3); // MB_CS
+	light_pin_mux(SPI_SCLK,3); // MB_SCK
+	light_pin_mux(SPI_MISO,3); // MB_MOSI
+	light_pin_mux(SPI_MOSI,3); // MB_MISO
+	light_pin_cfg(GPIO2_20,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(SPI_SCLK,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(SPI_MISO,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(SPI_MOSI,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	/*mikroBUS I2C*/
+	light_pin_mux(GPIO0_18,0); // MB_SCL
+	light_pin_mux(GPIO0_19,0); // MB_SDA
+	light_pin_cfg(GPIO0_18,PIN_SPEED_NORMAL,PIN_PN,4);
+	light_pin_cfg(GPIO0_19,PIN_SPEED_NORMAL,PIN_PN,4);
+	
+	/* CSI0 */
+    light_pin_mux(GPIO2_23,0); // CSI0
+	light_pin_cfg(GPIO2_23,PIN_SPEED_NORMAL,PIN_PN,2);
+    light_pin_cfg(I2C1_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+	light_pin_cfg(I2C1_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+	
+	/* CSI1 */
+    light_pin_mux(GPIO2_24,0); // CSI1
+	light_pin_cfg(GPIO2_24,PIN_SPEED_NORMAL,PIN_PN,2);
+    light_pin_cfg(I2C3_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+	light_pin_cfg(I2C3_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+	 
+    /* EEPROM */
+    light_pin_mux(GPIO2_22,0); // EEPROM
+    light_pin_cfg(GPIO2_22,PIN_SPEED_NORMAL,PIN_PN,2);
+    light_pin_cfg(I2C0_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+	light_pin_cfg(I2C0_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+	
+	/* AM6203BM */
+	light_pin_mux(SDIO1_WPRTN,3);
+    light_pin_mux(SDIO1_DETN,3);
+    light_pin_mux(GPIO2_25,0);
+    light_pin_mux(GPIO2_30,0);
+	light_pin_mux(GPIO2_31,0);
+	light_pin_cfg(SDIO1_WPRTN,PIN_SPEED_NORMAL,PIN_PU,2);                   
+	light_pin_cfg(SDIO1_DETN,PIN_SPEED_NORMAL,PIN_PN,2);                    
+    light_pin_cfg(GPIO2_25,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_30,PIN_SPEED_NORMAL,PIN_PN,2);                 
+	light_pin_cfg(GPIO2_31,PIN_SPEED_NORMAL,PIN_PU,2);
+
+	//BT hardware flow control uart
+    light_pin_cfg(UART4_TXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART4_RXD, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART4_CTSN, PIN_SPEED_NORMAL, PIN_PN, 2);
+	light_pin_cfg(UART4_RTSN, PIN_SPEED_NORMAL, PIN_PN, 2);
+
+
+}
+
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
+static void light_iopin_init(void)
+{
+	/* aon-padmux config */
+	light_pin_cfg(I2C_AON_SCL,PIN_SPEED_NORMAL,PIN_PN,8);
+	light_pin_cfg(I2C_AON_SDA,PIN_SPEED_NORMAL,PIN_PN,8);
+
+	light_pin_mux(AOGPIO_7,3);
+	light_pin_mux(AOGPIO_8,3);
+	light_pin_mux(AOGPIO_9,3);
+	light_pin_mux(AOGPIO_10,3);
+	light_pin_mux(AOGPIO_11,0);
+	light_pin_mux(AOGPIO_12,1);
+	light_pin_mux(AOGPIO_13,1);
+	light_pin_mux(AOGPIO_14,0);
+	light_pin_mux(AOGPIO_15,0);
+	light_pin_cfg(AOGPIO_7,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_8,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_9,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_10,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_11,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_14,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(AOGPIO_15,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	light_pin_mux(AUDIO_PA9,3);
+	light_pin_cfg(AUDIO_PA9,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_mux(AUDIO_PA10,3);
+	light_pin_cfg(AUDIO_PA10,PIN_SPEED_NORMAL,PIN_PU,2);
+	light_pin_mux(AUDIO_PA12,3);
+	light_pin_cfg(AUDIO_PA12,PIN_SPEED_NORMAL,PIN_PU,2);
+	light_pin_mux(AUDIO_PA13,0);
+
+	/*ap-padmux on left/top */
+	light_pin_mux(QSPI1_CSN0,3);
+	light_pin_mux(QSPI1_D2_WP,1);
+	light_pin_cfg(QSPI1_CSN0,PIN_SPEED_NORMAL,PIN_PN,8);
+	light_pin_cfg(QSPI1_SCLK,PIN_SPEED_NORMAL,PIN_PN,8);
+	light_pin_cfg(QSPI1_D0_MOSI,PIN_SPEED_NORMAL,PIN_PU,8);
+	light_pin_cfg(QSPI1_D1_MISO,PIN_SPEED_NORMAL,PIN_PU,8);
+	light_pin_cfg(QSPI1_D2_WP,PIN_SPEED_NORMAL,PIN_PN,0xF);
+	light_pin_cfg(QSPI1_D3_HOLD,PIN_SPEED_NORMAL,PIN_PN,8);
+
+	light_pin_mux(I2C0_SCL,0);
+	light_pin_mux(I2C0_SDA,0);
+	light_pin_cfg(I2C0_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+	light_pin_cfg(I2C0_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+
+	light_pin_mux(UART3_TXD,1);
+	light_pin_mux(UART3_RXD,1);
+	light_pin_cfg(UART3_TXD,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(UART3_RXD,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	light_pin_mux(GPIO0_18,1);
+	light_pin_mux(GPIO0_19,1);
+	light_pin_cfg(GPIO0_18,PIN_SPEED_NORMAL,PIN_PN,4);
+	light_pin_cfg(GPIO0_19,PIN_SPEED_NORMAL,PIN_PN,4);
+
+	light_pin_mux(GPIO0_20,0);
+	light_pin_mux(GPIO0_21,0);
+	light_pin_mux(GPIO0_22,1);
+	light_pin_mux(GPIO0_23,1);
+	light_pin_mux(GPIO0_24,1);
+	light_pin_mux(GPIO0_25,1);
+	light_pin_mux(GPIO0_26,1);
+	light_pin_mux(GPIO0_27,0);
+	light_pin_mux(GPIO0_28,0);
+	light_pin_mux(GPIO0_29,0);
+	light_pin_mux(GPIO0_30,0);
+	light_pin_cfg(GPIO0_20,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO0_21,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO0_27,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO0_28,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO0_29,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO0_30,PIN_SPEED_NORMAL,PIN_PU,2);
+
+	light_pin_mux(GPIO1_0,1);
+	light_pin_mux(GPIO1_1,1);
+	light_pin_mux(GPIO1_2,1);
+	light_pin_mux(GPIO1_3,1);
+	light_pin_mux(GPIO1_4,1);
+	light_pin_mux(GPIO1_9,0);
+	light_pin_mux(GPIO1_10,0);
+	light_pin_mux(GPIO1_11,0);
+	light_pin_mux(GPIO1_12,0);
+	light_pin_mux(GPIO1_13,0);
+	light_pin_mux(GPIO1_14,0);
+	light_pin_mux(GPIO1_15,0);
+	light_pin_mux(GPIO1_16,0);
+	light_pin_mux(GPIO1_21,3);
+	light_pin_mux(GPIO1_22,3);
+	light_pin_mux(GPIO1_23,3);
+	light_pin_mux(GPIO1_24,3);
+	light_pin_mux(GPIO1_25,3);
+	light_pin_cfg(GPIO1_0,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_1,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_2,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_3,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_4,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_9,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_10,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_11,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_12,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_13,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_14,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_15,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_16,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_21,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_22,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_23,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_24,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_25,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO1_26,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	light_pin_mux(CLK_OUT_0,1);
+	light_pin_mux(CLK_OUT_1,1);
+	light_pin_mux(CLK_OUT_3,1);
+	light_pin_mux(CLK_OUT_2,3);
+	light_pin_cfg(CLK_OUT_2,PIN_SPEED_NORMAL,PIN_PU,2);
+
+	/*ap-pdmux on righ/top*/
+	light_pin_mux(QSPI0_SCLK,3);
+	light_pin_mux(QSPI0_CSN0,3);
+	light_pin_mux(QSPI0_CSN1,3);
+	light_pin_mux(QSPI0_D0_MOSI,3);
+	light_pin_mux(QSPI0_D1_MISO,3);
+	light_pin_mux(QSPI0_D2_WP,3);
+	light_pin_mux(QSPI0_D3_HOLD,3);
+
+	light_pin_cfg(I2C2_SCL,PIN_SPEED_NORMAL,PIN_PN,4);
+	light_pin_cfg(I2C2_SDA,PIN_SPEED_NORMAL,PIN_PN,4);
+
+	light_pin_mux(I2C3_SCL,0);
+	light_pin_mux(I2C3_SDA,0);
+	light_pin_cfg(I2C3_SCL,PIN_SPEED_NORMAL,PIN_PU,4);
+	light_pin_cfg(I2C3_SDA,PIN_SPEED_NORMAL,PIN_PU,4);
+
+	light_pin_mux(SPI_CSN,1);
+	light_pin_cfg(SPI_CSN,PIN_SPEED_NORMAL,PIN_PU,2);
+
+	light_pin_mux(GPIO2_18,0);
+	light_pin_mux(GPIO2_19,0);
+	light_pin_mux(GPIO2_20,0);
+	light_pin_mux(GPIO2_21,0);
+	light_pin_mux(GPIO2_22,0);
+	light_pin_mux(GPIO2_23,0);
+	light_pin_mux(GPIO2_24,0);
+	light_pin_mux(GPIO2_25,0);
+
+	light_pin_cfg(GPIO2_18,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_19,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_20,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_21,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_22,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_23,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_24,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_cfg(GPIO2_25,PIN_SPEED_NORMAL,PIN_PU,2);
+
+	light_pin_mux(SDIO0_WPRTN,3);
+	light_pin_cfg(SDIO0_WPRTN,PIN_SPEED_NORMAL,PIN_PN,2);
+	light_pin_mux(SDIO1_WPRTN,3);
+	light_pin_cfg(SDIO1_WPRTN,PIN_SPEED_NORMAL,PIN_PU,2);
+	light_pin_mux(SDIO1_DETN,3);
+	light_pin_cfg(SDIO1_DETN,PIN_SPEED_NORMAL,PIN_PN,2);
+
+	light_pin_mux(GPIO2_30,0);
+	light_pin_mux(GPIO2_31,0);
+	light_pin_mux(GPIO3_0,0);
+	light_pin_mux(GPIO3_1,0);
+	light_pin_mux(GPIO3_2,1);
+	light_pin_mux(GPIO3_3,1);
+	light_pin_cfg(GPIO2_30, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+	light_pin_cfg(GPIO2_31, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+	light_pin_cfg(GPIO3_0, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+	light_pin_cfg(GPIO3_1, PIN_SPEED_NORMAL, PIN_PN, 0x2);
+	light_pin_cfg(GPIO3_2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GPIO3_3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+
+	light_pin_mux(GMAC0_COL,3);
+	light_pin_mux(GMAC0_CRS,3);
+	light_pin_cfg(GMAC0_COL,PIN_SPEED_NORMAL,PIN_PU,2);
+	light_pin_cfg(GMAC0_CRS,PIN_SPEED_NORMAL,PIN_PU,2);
+
+	/* GMAC0 pad drive strength configurate to 0xF */
+	light_pin_cfg(GMAC0_TX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RX_CLK, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXEN, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_TXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXDV, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD0, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD1, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD2, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+	light_pin_cfg(GMAC0_RXD3, PIN_SPEED_NORMAL, PIN_PN, 0xF);
+}
+
 #else
 
 static void light_iopin_init(void)
@@ -1840,13 +2402,59 @@ static void light_iopin_init(void)
 }
 #endif
 
+#define PWM_BASE				((void *)0xffec01c000)
+#define PWM_CHAN_REG(chan, off)	(PWM_BASE + (chan) * 0x20 + (off))
+#define PWM_PER_OFFSET			0x08  // Offset for Periodic Control Register
+#define PWM_FP_OFFSET			0x0C  // Offset for First Phase Control Register
+#define PWM_CTRL_OFFSET			0x00  // Offset for Control Register
+// See T-HEAD TH1520 Peripheral Interface User Manual
+// https://dl.sipeed.com/shareURL/LICHEE/licheepi4a/09_Doc
 
 static void light_pwm_config(void)
 {
-	/* pwm0 */
-	writel(0x4b0, (void *)0xFFEC01C008);
-	writel(0x258, (void *)0xFFEC01C00c);
-	writel(0x328, (void *)0xFFEC01C000);
+	/*
+	 * Enable MIPI Display backlight on PWM0.
+	 * Period=1200 clock cycles, Duty Cycle=50%
+	*/
+	// Set PWM Period to 1200 clock cycles
+	writel(0x4b0, PWM_CHAN_REG(0, PWM_PER_OFFSET));
+	// Set PWM First Phase to 600 clock cycles
+	writel(0x258, PWM_CHAN_REG(0, PWM_FP_OFFSET));
+	// Configure PWM Control Register:
+	// [9]  INACTOUT  = 1 (inactive output set to high)
+	// [8]  FPOUT     = 1 (first phase output set to high)
+	// [7:6] EVTRIG   = 00 (event-triggered mode disabled)
+	// [5:4] MODE     = 10 (continuous mode)
+	// [3]   INTEN    = 1 (interrupt enabled)
+	// [2]   CFG_UPDATE = 0 (do not wait for configuration update)
+	// [1]   SOFT_RST = 0 (software reset disabled)
+	// [0]   START    = 0 (PWM start coding enable, rising edge effective)
+	// Final address: 0xffec01c000 + 0x00 (channel 0) + 0x00 (control register offset) = 0xffec01c000
+	writel(0b1100101000, PWM_CHAN_REG(0, PWM_CTRL_OFFSET));
+}
+
+static void lpi4a_fan_pwm_config(void)
+{
+	/*
+	 * Enable fan on PWM1(GPIO10) for Lichee Pi 4A.
+	 * See LPi4A Schematic:
+	 * https://dl.sipeed.com/shareURL/LICHEE/licheepi4a/02_Schematic
+	*/
+	// Set PWM Period to 1200 clock cycles
+	writel(0x4b0, PWM_CHAN_REG(1, PWM_PER_OFFSET));
+	// Set PWM First Phase to 600 clock cycles
+	writel(0x258, PWM_CHAN_REG(1, PWM_FP_OFFSET));
+	// Configure PWM Control Register:
+	// [9]  INACTOUT  = 1 (inactive output set to high)
+	// [8]  FPOUT     = 1 (first phase output set to high)
+	// [7:6] EVTRIG   = 00 (event-triggered mode disabled)
+	// [5:4] MODE     = 10 (continuous mode)
+	// [3]   INTEN    = 0 (interrupt disabled)
+	// [2]   CFG_UPDATE = 0 (do not wait for configuration update)
+	// [1]   SOFT_RST = 0 (software reset disabled)
+	// [0]   START    = 0 (PWM start coding enable, rising edge effective)
+	// Final address: 0xffec01c000 + 0x20 (channel 1) + 0x00 (control register offset) = 0xffec01c020
+	writel(0b1100100000, PWM_CHAN_REG(1, PWM_CTRL_OFFSET));
 }
 
 int board_init(void)
@@ -1863,15 +2471,18 @@ int board_init(void)
 
 	light_pwm_config();
 
+#ifdef CONFIG_TARGET_LIGHT_FM_C910_LPI4A
+	lpi4a_fan_pwm_config();
+#endif
 	return 0;
 }
 
 static void light_usb_boot_check(void)
 {
-	int boot_mode;
-	uchar env_enetaddr[6]={0};
-	uchar env_enet1addr[6]={0};
+	uchar env_enetaddr[6];
+	uchar env_enet1addr[6];
 	int env_ethaddr_flag,env_eth1addr_flag;
+	int boot_mode;
 	int ret = 0;
 
 	boot_mode = readl((void *)SOC_OM_ADDRBASE) & 0x7;
@@ -1887,31 +2498,48 @@ static void light_usb_boot_check(void)
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	env_set("usb_fastboot", "yes");
 #endif
-	/*Get this version ethaddr(mac addr) env,which follows one board, trans to next version env*/
+
+	/* ensure flashing img not to lose mac address on ramfs mode */
 	env_ethaddr_flag  = eth_env_get_enetaddr_by_index("eth", 0, env_enetaddr);
 	env_eth1addr_flag = eth_env_get_enetaddr_by_index("eth", 1, env_enet1addr);
 
 	run_command("env default -a -f", 0);
-	/*If mac addr in last version env  is valid, before save,inherit env mac addr */
-	if(env_ethaddr_flag){
+	if (env_ethaddr_flag)
 		eth_env_set_enetaddr_by_index("eth", 0, env_enetaddr);
-		run_command("printenv ethaddr",0);
-	}else{
-		printf("env ethaddr not exist or invalid\n");
-	}
-
-	if(env_eth1addr_flag){
+	if (env_eth1addr_flag)
 		eth_env_set_enetaddr_by_index("eth", 1, env_enet1addr);
-		run_command("printenv eth1addr",0);
-	}else{
-		printf("env eth1addr not exist or invalid\n");
-	}
-
-	run_command("env save", 0);
+	env_save();
 	run_command("run gpt_partition", 0);
 	run_command("fastboot usb 0", 0);
 }
 
+static void light_mac_vaild_check(void)
+{
+	uchar env_enetaddr[6];
+	uchar env_enet1addr[6];
+	int env_ethaddr_flag,env_eth1addr_flag;
+
+	/*Get this version ethaddr(mac addr) env,which follows one board, trans to next version env*/
+	env_ethaddr_flag  = eth_env_get_enetaddr_by_index("eth", 0, env_enetaddr);
+	env_eth1addr_flag = eth_env_get_enetaddr_by_index("eth", 1, env_enet1addr);
+
+	if (!env_ethaddr_flag || !env_eth1addr_flag) {
+		net_random_ethaddr(env_enetaddr);
+		if (env_enetaddr[5] == (uchar)(0xff)) {
+			env_enetaddr[5] = 0xfe;
+		}
+		eth_env_set_enetaddr_by_index("eth", 0, env_enetaddr);
+		env_enetaddr[5] += 0x01;
+		eth_env_set_enetaddr_by_index("eth", 1, env_enetaddr);
+		printf("Use random addr as fixed mac addr\n");
+		env_save();
+	}
+
+	printf("ethaddr: %s\n", env_get("ethaddr"));
+	printf("eth1addr: %s\n", env_get("eth1addr"));
+
+	return;
+}
 
 int board_late_init(void)
 {
@@ -1922,8 +2550,8 @@ int board_late_init(void)
 	sec_upgrade_thread();
 	sec_firmware_version_dump();
 #endif
-
 	light_usb_boot_check();
+	light_mac_vaild_check();
 	ap_peri_clk_disable();
 	return 0;
 }

board/thead/light-c910/lpddr-regu/ddr_regu.c

@@ -136,7 +136,7 @@ static const struct regulator_t g_apcpu_regu_id_list[] = {
 		REGU_ID_DEF(IIC_IDX_AONIIC,APCPU_REGU_VDDM,0x31,0x39,0,1,800000,600000,3500000,12500,1),
 	},
 };
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
 /**
  * board for ant-ref
  *
@@ -955,7 +955,7 @@ int pmic_reset_apcpu_voltage(void)
 		return ret;
 	return 0;
 }
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
 int pmic_reset_apcpu_voltage(void)
 {
 	int                ret = -1;

board/thead/light-c910/lpddr4/include/ddr_retention.h

@@ -28,8 +28,11 @@ typedef enum {
 typedef struct Ddr_Reg_Config {
     uint32_t misc_reg_num;
     uint32_t phy_reg_num;
+    uint8_t  ddr_rank;
+    uint8_t  reserve[55];
 } Ddr_Reg_Config_t;
 
 int dwc_ddrphy_phyinit_regInterface(regInstr myRegInstr);
+void dwc_ddr_misc_regu_save(void);
 
 #endif

board/thead/light-c910/lpddr4/src/ddr_common_func.c

@@ -3,6 +3,7 @@
 #include "../include/common_lib.h"
 #include "../include/ddr_common_func.h"
 #include "../include/ddr_retention.h"
+#include "../include/pinmux.h"
 
 DDR_SYSREG_REG_SW_REG_S ddr_sysreg;
 
@@ -48,7 +49,7 @@ int get_ddr_rank_number() {
 #ifdef CONFIG_DDR_MSG
 	DDR_DEBUG("unsupported ddr rank type!!!\n");
 #endif
-    return NULL;
+    return 0;
 #endif
 }
 

board/thead/light-c910/lpddr4/src/ddr_retention.c

@@ -1,6 +1,7 @@
 #include "../include/common_lib.h"
 #include "../include/ddr_common_func.h"
 #include "../include/ddr_retention.h"
+#include "../include/pinmux.h"
 
 /*
 /// data structure to store register address, value pairs
@@ -988,9 +989,8 @@ static const uint32_t RetRegList_addr[934] =
     0x13840,
 };
 
-void dwc_ddr_misc_regu_save()
+void dwc_ddr_misc_regu_save(void)
 {
-    uint32_t data =  0;
     ddr_Regu_Config->misc_reg_num =  ARRAY_SIZE(MiscRegList);
     Reg_Misc_Addr_Val_t* misc_addr_t =  (Reg_Misc_Addr_Val_t*)((char*)ddr_Regu_Config +  64);
     for(int i = 0; i < ddr_Regu_Config->misc_reg_num; i++) {
@@ -1010,6 +1010,11 @@ int dwc_ddrphy_phyinit_regInterface(regInstr myRegInstr) {
 
     uint32_t phy_reg_num = ARRAY_SIZE(RetRegList_addr);
     ddr_Regu_Config->phy_reg_num = phy_reg_num;
+#ifdef CONFIG_DDR_DUAL_RANK
+    ddr_Regu_Config->ddr_rank   =  2;
+#else
+    ddr_Regu_Config->ddr_rank   =  1;
+#endif
     Reg_Phy_Addr_Val_t* phy_addr_t = (Reg_Phy_Addr_Val_t*)((char*)ddr_Regu_Config +  64 +  sizeof(Reg_Misc_Addr_Val_t) *  ARRAY_SIZE(MiscRegList));
 
 #ifdef CONFIG_DDR_MSG

board/thead/light-c910/spl.c

@@ -338,37 +338,37 @@ int boundary_verify(unsigned long boundary) {
 	phys_addr_t verify_addr4 = (phys_addr_t)boundary + CONFIG_SYS_SDRAM_BASE;
 
 	// verify data accessing result firstly
-	writel(MAGIC_DATA2, verify_addr);
+	writel(MAGIC_DATA2, (void *)verify_addr);
 	invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
-	if (readl(verify_addr) != MAGIC_DATA2) {
+	if (readl((void *)verify_addr) != MAGIC_DATA2) {
 		printf("ddr rw test failed\n");
 		return -1;
 	}
-	writel(MAGIC_DATA, verify_addr);  // writing at beginning
+	writel(MAGIC_DATA, (void *)verify_addr);  // writing at beginning
 	invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
-	if (readl(verify_addr) != MAGIC_DATA) {
+	if (readl((void *)verify_addr) != MAGIC_DATA) {
 		printf("ddr rw test failed\n");
 		return -1;
 	}
-	writel(MAGIC_DATA2, verify_addr2); // writing at one-quarter addr
-	writel(MAGIC_DATA3, verify_addr3); // writing at half addr
+	writel(MAGIC_DATA2, (void *)verify_addr2); // writing at one-quarter addr
+	writel(MAGIC_DATA3, (void *)verify_addr3); // writing at half addr
 	invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
 	invalidate_dcache_range(verify_addr2, verify_addr2 + CONFIG_SYS_CACHELINE_SIZE);
 	invalidate_dcache_range(verify_addr3, verify_addr3 + CONFIG_SYS_CACHELINE_SIZE);
 
 	if (boundary == (unsigned long)MAXIMAL_DDR_DENSITY_MB * UNIT_MB) { // boundary by design
-		if ((readl(verify_addr) == MAGIC_DATA) &&
-			(readl(verify_addr2) == MAGIC_DATA2) &&
-			(readl(verify_addr3) == MAGIC_DATA3))
+		if ((readl((void *)verify_addr) == MAGIC_DATA) &&
+			(readl((void *)verify_addr2) == MAGIC_DATA2) &&
+			(readl((void *)verify_addr3) == MAGIC_DATA3))
 			return 0;
 	}
 	else {
-		writel(MAGIC_DATA4, verify_addr4); // writing out of boundary
+		writel(MAGIC_DATA4, (void *)verify_addr4); // writing out of boundary
 		invalidate_dcache_range(verify_addr4, verify_addr4 + CONFIG_SYS_CACHELINE_SIZE);
-		if ((readl(verify_addr) == MAGIC_DATA4) && // overwrite by verify_addr4
-			(readl(verify_addr2) == MAGIC_DATA2) &&
-			(readl(verify_addr3) == MAGIC_DATA3) &&
-			(readl(verify_addr4) == MAGIC_DATA4))
+		if ((readl((void *)verify_addr) == MAGIC_DATA4) && // overwrite by verify_addr4
+			(readl((void *)verify_addr2) == MAGIC_DATA2) &&
+			(readl((void *)verify_addr3) == MAGIC_DATA3) &&
+			(readl((void *)verify_addr4) == MAGIC_DATA4))
 			return 0;
 	}
 
@@ -377,7 +377,6 @@ int boundary_verify(unsigned long boundary) {
 
 int setup_ddr_addrmap(void)
 {
-	int ret;
 	unsigned long boundary = (unsigned long)MAXIMAL_DDR_DENSITY_MB * UNIT_MB;
 
 	// verify data accessing result firstly
@@ -428,6 +427,7 @@ void cpu_performance_enable(void)
 	// FIXME: Clear bit[12] to disable L0BTB.
 	csr_write(CSR_MHCR, 0x17f); // clear bit7 to disable indirect brantch prediction
 	csr_write(CSR_MHINT, 0x6e30c | (1<<21) | (1<<22)); // set bit21 & bit 22 to close tlb & fence broadcast
+	mdelay(50); // workaround
 }
 
 static int bl1_img_have_head(unsigned long img_src_addr)

cmd/Kconfig

@@ -375,6 +375,18 @@ config CMD_FDT
 	help
 	  Do FDT related setup before booting into the Operating System.
 
+config SUPPORT_EXTENSION_SCAN
+	bool
+
+config CMD_EXTENSION
+	bool "Extension board management command"
+	select CMD_FDT
+	depends on SUPPORT_EXTENSION_SCAN
+	help
+	  Enables the "extension" command, which allows to detect
+	  extension boards connected to the system, and apply
+	  corresponding Device Tree overlays.
+
 config CMD_GO
 	bool "go"
 	default y

cmd/Makefile

@@ -48,6 +48,7 @@ ifdef CONFIG_POST
 obj-$(CONFIG_CMD_DIAG) += diag.o
 endif
 obj-$(CONFIG_CMD_DTIMG) += dtimg.o
+obj-$(CONFIG_CMD_EXTENSION) += extension_board.o
 obj-$(CONFIG_CMD_ECHO) += echo.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
 obj-$(CONFIG_CMD_EEPROM) += eeprom.o

cmd/booti.c

@@ -24,6 +24,10 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
 	ulong ld;
 	ulong relocated_addr;
 	ulong image_size;
+	char *tmp;
+	ulong dest_end;
+	ulong decomp_dst;
+	ulong comp_len;
 
 	ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
 			      images, 1);
@@ -38,6 +42,29 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
 		debug("*  kernel: cmdline image address = 0x%08lx\n", ld);
 	}
 
+	tmp = map_sysmem(ld, 0);
+
+	decomp_dst = env_get_ulong("kernel_comp_addr_r", 16, 0);
+	comp_len = env_get_ulong("kernel_comp_size", 16, 0);
+
+	if (!decomp_dst || !comp_len) {
+		puts("kernel_comp_addr_r or kernel_comp_size aren't defined!\n");
+		return -EINVAL;
+	}
+
+	ret = image_decomp(IH_COMP_GZIP, 0, ld, IH_TYPE_KERNEL,
+			   (void *)decomp_dst, (void *)ld, comp_len,
+			   comp_len * 10, &dest_end);
+
+	if (!ret) {
+		printf("Kernel image compression size = 0x%08lx, address = 0x%08lx\n",
+		       comp_len, decomp_dst);
+
+		memmove((void *)ld, (void *)decomp_dst, dest_end);
+	} else {
+		printf("failed to decompress kernel image: %d\n", ret);
+	}
+
 	ret = booti_setup(ld, &relocated_addr, &image_size, false);
 	if (ret != 0)
 		return 1;

cmd/extension_board.c

@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021
+ * Köry Maincent, Bootlin, <kory.maincent@bootlin.com>
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <extension_board.h>
+#include <mapmem.h>
+#include <linux/libfdt.h>
+#include <fdt_support.h>
+
+static LIST_HEAD(extension_list);
+
+static int extension_apply(struct extension *extension)
+{
+	char *overlay_cmd;
+	ulong extrasize, overlay_addr;
+	struct fdt_header *blob;
+
+	if (!working_fdt) {
+		printf("No FDT memory address configured. Please configure\n"
+		       "the FDT address via \"fdt addr <address>\" command.\n");
+		return CMD_RET_FAILURE;
+	}
+
+	overlay_cmd = env_get("extension_overlay_cmd");
+	if (!overlay_cmd) {
+		printf("Environment extension_overlay_cmd is missing\n");
+		return CMD_RET_FAILURE;
+	}
+
+	overlay_addr = env_get_hex("extension_overlay_addr", 0);
+	if (!overlay_addr) {
+		printf("Environment extension_overlay_addr is missing\n");
+		return CMD_RET_FAILURE;
+	}
+
+	env_set("extension_overlay_name", extension->overlay);
+	if (run_command(overlay_cmd, 0) != 0)
+		return CMD_RET_FAILURE;
+
+	extrasize = env_get_hex("filesize", 0);
+	if (!extrasize)
+		return CMD_RET_FAILURE;
+
+	fdt_shrink_to_minimum(working_fdt, extrasize);
+
+	blob = map_sysmem(overlay_addr, 0);
+	if (!fdt_valid(&blob))
+		return CMD_RET_FAILURE;
+
+	/* apply method prints messages on error */
+	if (fdt_overlay_apply_verbose(working_fdt, blob))
+		return CMD_RET_FAILURE;
+
+	return CMD_RET_SUCCESS;
+}
+
+static int do_extension_list(struct cmd_tbl *cmdtp, int flag,
+			     int argc, char *const argv[])
+{
+	int i = 0;
+	struct extension *extension;
+
+	if (list_empty(&extension_list)) {
+		printf("No extension registered - Please run \"extension scan\"\n");
+		return CMD_RET_SUCCESS;
+	}
+
+	list_for_each_entry(extension, &extension_list, list) {
+		printf("Extension %d: %s\n", i++, extension->name);
+		printf("\tManufacturer: \t\t%s\n", extension->owner);
+		printf("\tVersion: \t\t%s\n", extension->version);
+		printf("\tDevicetree overlay: \t%s\n", extension->overlay);
+		printf("\tOther information: \t%s\n", extension->other);
+	}
+	return CMD_RET_SUCCESS;
+}
+
+static int do_extension_scan(struct cmd_tbl *cmdtp, int flag,
+			     int argc, char *const argv[])
+{
+	struct extension *extension, *next;
+	int extension_num;
+
+	list_for_each_entry_safe(extension, next, &extension_list, list) {
+		list_del(&extension->list);
+		free(extension);
+	}
+	extension_num = extension_board_scan(&extension_list);
+
+	if (extension_num < 0)
+		return CMD_RET_FAILURE;
+
+	printf("Found %d extension board(s).\n", extension_num);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int do_extension_apply(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
+{
+	struct extension *extension = NULL;
+	struct list_head *entry;
+	int i = 0, extension_id, ret;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	if (strcmp(argv[1], "all") == 0) {
+		list_for_each_entry(extension, &extension_list, list) {
+			ret = extension_apply(extension);
+			if (ret != CMD_RET_SUCCESS)
+				break;
+		}
+	} else {
+		extension_id = simple_strtol(argv[1], NULL, 10);
+		list_for_each(entry, &extension_list) {
+			if (i == extension_id) {
+				extension = list_entry(entry, struct extension,  list);
+				break;
+			}
+			i++;
+		}
+
+		if (!extension) {
+			printf("Wrong extension number\n");
+			return CMD_RET_FAILURE;
+		}
+
+		ret = extension_apply(extension);
+	}
+
+	return ret;
+}
+
+static struct cmd_tbl cmd_extension[] = {
+	U_BOOT_CMD_MKENT(scan, 1, 1, do_extension_scan, "", ""),
+	U_BOOT_CMD_MKENT(list, 1, 0, do_extension_list, "", ""),
+	U_BOOT_CMD_MKENT(apply, 2, 0, do_extension_apply, "", ""),
+};
+
+static int do_extensionops(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
+{
+	struct cmd_tbl *cp;
+
+	/* Drop the extension command */
+	argc--;
+	argv++;
+
+	cp = find_cmd_tbl(argv[0], cmd_extension, ARRAY_SIZE(cmd_extension));
+	if (cp)
+		return cp->cmd(cmdtp, flag, argc, argv);
+
+	return CMD_RET_USAGE;
+}
+
+U_BOOT_CMD(extension, 3, 1, do_extensionops,
+	"Extension board management sub system",
+	"scan - scan plugged extension(s) board(s)\n"
+	"extension list - lists available extension(s) board(s)\n"
+	"extension apply <extension number|all> - applies DT overlays corresponding to extension boards\n"
+);

cmd/fdt.c

@@ -27,7 +27,6 @@
  */
 DECLARE_GLOBAL_DATA_PTR;
 
-static int fdt_valid(struct fdt_header **blobp);
 static int fdt_parse_prop(char *const*newval, int count, char *data, int *len);
 static int fdt_print(const char *pathp, char *prop, int depth);
 static int is_printable_string(const void *data, int len);
@@ -732,54 +731,6 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 /****************************************************************************/
 
-/**
- * fdt_valid() - Check if an FDT is valid. If not, change it to NULL
- *
- * @blobp: Pointer to FDT pointer
- * @return 1 if OK, 0 if bad (in which case *blobp is set to NULL)
- */
-static int fdt_valid(struct fdt_header **blobp)
-{
-	const void *blob = *blobp;
-	int err;
-
-	if (blob == NULL) {
-		printf ("The address of the fdt is invalid (NULL).\n");
-		return 0;
-	}
-
-	err = fdt_check_header(blob);
-	if (err == 0)
-		return 1;	/* valid */
-
-	if (err < 0) {
-		printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
-		/*
-		 * Be more informative on bad version.
-		 */
-		if (err == -FDT_ERR_BADVERSION) {
-			if (fdt_version(blob) <
-			    FDT_FIRST_SUPPORTED_VERSION) {
-				printf (" - too old, fdt %d < %d",
-					fdt_version(blob),
-					FDT_FIRST_SUPPORTED_VERSION);
-			}
-			if (fdt_last_comp_version(blob) >
-			    FDT_LAST_SUPPORTED_VERSION) {
-				printf (" - too new, fdt %d > %d",
-					fdt_version(blob),
-					FDT_LAST_SUPPORTED_VERSION);
-			}
-		}
-		printf("\n");
-		*blobp = NULL;
-		return 0;
-	}
-	return 1;
-}
-
-/****************************************************************************/
-
 /*
  * Parse the user's input, partially heuristic.  Valid formats:
  * <0x00112233 4 05>	- an array of cells.  Numbers follow standard

cmd/pxe_utils.c

@@ -9,6 +9,8 @@
 #include <malloc.h>
 #include <mapmem.h>
 #include <lcd.h>
+#include <fdt_support.h>
+#include <linux/libfdt.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
 #include <errno.h>
@@ -279,6 +281,9 @@ static void label_destroy(struct pxe_label *label)
 	if (label->fdtdir)
 		free(label->fdtdir);
 
+	if (label->fdtoverlays)
+		free(label->fdtoverlays);
+
 	free(label);
 }
 
@@ -326,6 +331,92 @@ static int label_localboot(struct pxe_label *label)
 	return run_command_list(localcmd, strlen(localcmd), 0);
 }
 
+/*
+ * Loads fdt overlays specified in 'fdtoverlays'.
+ */
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+static void label_boot_fdtoverlay(cmd_tbl_t *cmdtp, struct pxe_label *label)
+{
+	char *fdtoverlay = label->fdtoverlays;
+	struct fdt_header *working_fdt;
+	char *fdtoverlay_addr_env;
+	ulong fdtoverlay_addr;
+	ulong fdt_addr;
+	int err;
+
+	/* Get the main fdt and map it */
+	fdt_addr = simple_strtoul(env_get("fdt_addr_r"), NULL, 16);
+	working_fdt = map_sysmem(fdt_addr, 0);
+	err = fdt_check_header(working_fdt);
+	if (err)
+		return;
+
+	/* Get the specific overlay loading address */
+	fdtoverlay_addr_env = env_get("fdtoverlay_addr_r");
+	if (!fdtoverlay_addr_env) {
+		printf("Invalid fdtoverlay_addr_r for loading overlays\n");
+		return;
+	}
+
+	fdtoverlay_addr = simple_strtoul(fdtoverlay_addr_env, NULL, 16);
+
+	/* Cycle over the overlay files and apply them in order */
+	do {
+		struct fdt_header *blob;
+		char *overlayfile;
+		char *end;
+		int len;
+
+		/* Drop leading spaces */
+		while (*fdtoverlay == ' ')
+			++fdtoverlay;
+
+		/* Copy a single filename if multiple provided */
+		end = strstr(fdtoverlay, " ");
+		if (end) {
+			len = (int)(end - fdtoverlay);
+			overlayfile = malloc(len + 1);
+			strncpy(overlayfile, fdtoverlay, len);
+			overlayfile[len] = '\0';
+		} else
+			overlayfile = fdtoverlay;
+
+		if (!strlen(overlayfile))
+			goto skip_overlay;
+
+		/* Load overlay file */
+		err = get_relfile_envaddr(cmdtp, overlayfile,
+					  "fdtoverlay_addr_r");
+		if (err < 0) {
+			printf("Failed loading overlay %s\n", overlayfile);
+			goto skip_overlay;
+		}
+
+		/* Resize main fdt */
+		fdt_shrink_to_minimum(working_fdt, 8192);
+
+		blob = map_sysmem(fdtoverlay_addr, 0);
+		err = fdt_check_header(blob);
+		if (err) {
+			printf("Invalid overlay %s, skipping\n",
+			       overlayfile);
+			goto skip_overlay;
+		}
+
+		err = fdt_overlay_apply_verbose(working_fdt, blob);
+		if (err) {
+			printf("Failed to apply overlay %s, skipping\n",
+			       overlayfile);
+			goto skip_overlay;
+		}
+
+skip_overlay:
+		if (end)
+			free(overlayfile);
+	} while ((fdtoverlay = strstr(fdtoverlay, " ")));
+}
+#endif
+
 /*
  * Boot according to the contents of a pxe_label.
  *
@@ -520,6 +611,11 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 				       label->name);
 				goto cleanup;
 			}
+
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+			if (label->fdtoverlays)
+				label_boot_fdtoverlay(cmdtp, label);
+#endif
 		} else {
 			bootm_argv[3] = NULL;
 		}
@@ -577,6 +673,7 @@ enum token_type {
 	T_INCLUDE,
 	T_FDT,
 	T_FDTDIR,
+	T_FDTOVERLAYS,
 	T_ONTIMEOUT,
 	T_IPAPPEND,
 	T_BACKGROUND,
@@ -611,6 +708,7 @@ static const struct token keywords[] = {
 	{"fdt", T_FDT},
 	{"devicetreedir", T_FDTDIR},
 	{"fdtdir", T_FDTDIR},
+	{"fdtoverlays", T_FDTOVERLAYS},
 	{"ontimeout", T_ONTIMEOUT,},
 	{"ipappend", T_IPAPPEND,},
 	{"background", T_BACKGROUND,},
@@ -1043,6 +1141,11 @@ static int parse_label(char **c, struct pxe_menu *cfg)
 				err = parse_sliteral(c, &label->fdtdir);
 			break;
 
+		case T_FDTOVERLAYS:
+			if (!label->fdtoverlays)
+				err = parse_sliteral(c, &label->fdtoverlays);
+			break;
+
 		case T_LOCALBOOT:
 			label->localboot = 1;
 			err = parse_integer(c, &label->localboot_val);

cmd/pxe_utils.h

@@ -43,6 +43,7 @@ struct pxe_label {
 	char *initrd;
 	char *fdt;
 	char *fdtdir;
+	char *fdtoverlays;
 	int ipappend;
 	int attempted;
 	int localboot;

common/fdt_support.c

@@ -1822,3 +1822,49 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto)
 	return err;
 }
 #endif
+
+/**
+ * fdt_valid() - Check if an FDT is valid. If not, change it to NULL
+ *
+ * @blobp: Pointer to FDT pointer
+ * @return 1 if OK, 0 if bad (in which case *blobp is set to NULL)
+ */
+int fdt_valid(struct fdt_header **blobp)
+{
+	const void *blob = *blobp;
+	int err;
+
+	if (!blob) {
+		printf("The address of the fdt is invalid (NULL).\n");
+		return 0;
+	}
+
+	err = fdt_check_header(blob);
+	if (err == 0)
+		return 1;	/* valid */
+
+	if (err < 0) {
+		printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
+		/*
+		 * Be more informative on bad version.
+		 */
+		if (err == -FDT_ERR_BADVERSION) {
+			if (fdt_version(blob) <
+			    FDT_FIRST_SUPPORTED_VERSION) {
+				printf(" - too old, fdt %d < %d",
+				       fdt_version(blob),
+				       FDT_FIRST_SUPPORTED_VERSION);
+			}
+			if (fdt_last_comp_version(blob) >
+			    FDT_LAST_SUPPORTED_VERSION) {
+				printf(" - too new, fdt %d > %d",
+				       fdt_version(blob),
+				       FDT_LAST_SUPPORTED_VERSION);
+			}
+		}
+		printf("\n");
+		*blobp = NULL;
+		return 0;
+	}
+	return 1;
+}

common/spl/spl.c

@@ -735,6 +735,30 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	jump_to_image_no_args(&spl_image);
 }
 
+static void print_ruyisdk_logo(void)
+{
+	//  _____             _  _____ _____  _  __
+	// |  __ \           (_)/ ____|  __ \| |/ /
+	// | |__) |   _ _   _ _| (___ | |  | | ' / 
+	// |  _  / | | | | | | |\___ \| |  | |  <  
+	// | | \ \ |_| | |_| | |____) | |__| | . \ 
+	// |_|  \_\__,_|\__, |_|_____/|_____/|_|\_\
+	//               __/ |                     
+	//              |___/                      
+
+	printf("-----------------------------------------\n");
+	printf("  _____             _  _____ _____  _  __\n");
+	printf(" |  __ \\           (_)/ ____|  __ \\| |/ /\n");
+	printf(" | |__) |   _ _   _ _| (___ | |  | | ' / \n");
+	printf(" |  _  / | | | | | | |\\___ \\| |  | |  <  \n");
+	printf(" | | \\ \\ |_| | |_| | |____) | |__| | . \\ \n");
+	printf(" |_|  \\_\\__,_|\\__, |_|_____/|_____/|_|\\_\\\n");
+	printf("               __/ |                     \n");
+	printf("              |___/                      \n");
+	printf("                    -- Presented by ISCAS\n");
+	printf("-----------------------------------------\n");
+}
+
 #ifdef CONFIG_SPL_SERIAL_SUPPORT
 /*
  * This requires UART clocks to be enabled.  In order for this to work the
@@ -748,6 +772,8 @@ void preloader_console_init(void)
 
 	gd->have_console = 1;
 
+	print_ruyisdk_logo();
+
 #if CONFIG_IS_ENABLED(BANNER_PRINT)
 	puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "
 	     U_BOOT_TIME " " U_BOOT_TZ ")\n");

configs/light_a_val_defconfig

@@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=8
 CONFIG_SPL=y
 CONFIG_SMP=y
 CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_VAL_A=y
 # CONFIG_THEAD_PLIC is not set
 # CONFIG_THEAD_LIGHT_TIMER is not set
 # CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
@@ -17,7 +18,7 @@ CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_SYS_PROMPT="Light VAL-A# "
 CONFIG_DDR_LP4X_3733_SINGLERANK=y
 # CONFIG_DDR_LP4_3733_DUALRANK is not set
 CONFIG_DDR_BOARD_CONFIG=y
@@ -63,6 +64,7 @@ CONFIG_MMC_SDHCI_SNPS=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_SPI_NAND=y
@@ -85,9 +87,11 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
 CONFIG_USB_GADGET_VENDOR_NUM=0x1234
 CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 # CONFIG_EFI_LOADER is not set
-# CONFIG_LIGHT_BOOT_FORCE_SEQ is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="light-a-val.dtb"
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_VIDEO=y
@@ -107,5 +111,6 @@ CONFIG_PMIC_VOL_INIT=y
 CONFIG_DDR_REGU_0V6=600000
 CONFIG_DDR_REGU_0V8=800000
 CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
 CONFIG_MISC=y
 CONFIG_LIGHT_AON_CONF=y

configs/light_beagle_defconfig

@@ -6,39 +6,41 @@ CONFIG_NR_DRAM_BANKS=8
 CONFIG_SPL=y
 CONFIG_SMP=y
 CONFIG_TARGET_LIGHT_C910=y
+CONFIG_PMIC_VOL_INIT=y
 CONFIG_TARGET_LIGHT_FM_C910_BEAGLE=y
-# CONFIG_THEAD_PLIC is not set
-# CONFIG_THEAD_LIGHT_TIMER is not set
-# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_DDR_LP4X_3733_SINGLERANK=y
+CONFIG_DDR_BOARD_CONFIG=y
 CONFIG_ARCH_RV64I=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-beaglev-ahead.dtb"
+CONFIG_BOARD_LATE_INIT=y
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SYS_PROMPT="C910 Light# "
-CONFIG_DDR_LP4X_3733_SINGLERANK=y
-# CONFIG_DDR_LP4_3733_DUALRANK is not set
-CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_SYS_PROMPT="Light AHead# "
 CONFIG_CMD_BOOT_SLAVE=y
 CONFIG_CMD_ERASEENV=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MTD=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_DDR_SCAN=y
-CONFIG_DDR_PRBS_TEST=n
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_PARTITION_TYPE_GUID=y
 CONFIG_OF_EMBED=y
-CONFIG_DEFAULT_DEVICE_TREE="light-a-val"
+CONFIG_DEFAULT_DEVICE_TREE="light-beagle"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
 CONFIG_SPL_CLK=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_UDP_FUNCTION_FASTBOOT=y
@@ -47,11 +49,12 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
-CONFIG_DWAPB_GPIO=y
 # CONFIG_MMC_SPI is not set
-CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
@@ -59,19 +62,21 @@ CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_SNPS=y
 CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SNPS=y
 CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_SNPS=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_SPI_NAND=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_ETH_DESIGNWARE=y
 CONFIG_PHY_REALTEK=y
 CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
 CONFIG_RTL8211X_PHY_FORCE_MASTER=y
 CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DESIGNWARE_SPI=y
@@ -82,25 +87,18 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
 CONFIG_USB_GADGET_VENDOR_NUM=0x1234
 CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
-# CONFIG_SPL_USE_TINY_PRINTF is not set
-# CONFIG_EFI_LOADER is not set
-# CONFIG_LIGHT_SEC_BOOT is not set
-CONFIG_BOARD_LATE_INIT=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_DM_VIDEO=y
-CONFIG_PHY=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CMD_BMP=y
-CONFIG_VIDEO_BRIDGE=y
-CONFIG_DM_PCA953X=y
-CONFIG_VIDEO_VS_DPU=y
+CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_VIDEO_VS_DPU=y
 CONFIG_VIDEO_DW_DSI_LIGHT=y
 CONFIG_VIDEO_DW_DPHY=y
-CONFIG_VIDEO_DW_DSI_HOST=y
-CONFIG_SYS_WHITE_ON_BLACK=y
-CONFIG_PMIC_VOL_INIT=y
-CONFIG_DDR_REGU_0V6=600000
-CONFIG_DDR_REGU_0V8=800000
-CONFIG_DDR_REGU_1V1=1100000
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y

configs/light_lpi4a_16g_defconfig

@@ -0,0 +1,114 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="Light LPI4A 16G# "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+CONFIG_DDR_DDP=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lichee-pi-4a-16g.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y

configs/light_lpi4a_cluster_16g_defconfig

@@ -0,0 +1,114 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="LicheeCluster4A 16G # "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+CONFIG_DDR_DDP=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-cluster-16g.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y

configs/light_lpi4a_cluster_defconfig

@@ -0,0 +1,113 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="LicheeCluster4A # "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-cluster.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y

configs/light_lpi4a_console_16g_defconfig

@@ -0,0 +1,119 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="LicheeConsole4A 16G # "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+CONFIG_DDR_DDP=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-console-16g.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+# CONFIG_DOS_PARTITION is not set
+CONFIG_CMD_USB=y

configs/light_lpi4a_console_defconfig

@@ -0,0 +1,118 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="LicheeConsole4A # "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-console.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+# CONFIG_DOS_PARTITION is not set
+CONFIG_CMD_USB=y

configs/light_lpi4a_defconfig

@@ -18,7 +18,7 @@ CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SYS_PROMPT="C910 Light# "
+CONFIG_SYS_PROMPT="Light LPI4A# "
 CONFIG_DDR_LP4X_3733_DUALRANK=y
 # CONFIG_DDR_LP4_3733_DUALRANK is not set
 CONFIG_DDR_BOARD_CONFIG=y
@@ -63,6 +63,7 @@ CONFIG_MMC_SDHCI_SNPS=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_SPI_NAND=y
@@ -85,9 +86,11 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
 CONFIG_USB_GADGET_VENDOR_NUM=0x1234
 CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 # CONFIG_EFI_LOADER is not set
 # CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lichee-pi-4a.dtb"
 CONFIG_BOARD_LATE_INIT=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_VIDEO=y
@@ -101,7 +104,7 @@ CONFIG_DM_PCA953X=y
 CONFIG_VIDEO_VS_DPU=y
 CONFIG_VIDEO_LCD_ILITEK_ILI9881C=n
 CONFIG_VIDEO_LCD_JD9365DA=y
-CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
+#CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
 CONFIG_VIDEO_DW_DSI_LIGHT=y
 CONFIG_VIDEO_DW_DPHY=y
 CONFIG_VIDEO_DW_DSI_HOST=y
@@ -110,6 +113,6 @@ CONFIG_PMIC_VOL_INIT=y
 CONFIG_DDR_REGU_0V6=600000
 CONFIG_DDR_REGU_0V8=800000
 CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
 CONFIG_MISC=y
 CONFIG_LIGHT_AON_CONF=y
-

configs/light_lpi4a_plastic_16g_defconfig

@@ -0,0 +1,119 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="LicheeLaptop4A 16G # "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-plastic-16g.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+# CONFIG_DOS_PARTITION is not set
+CONFIG_CMD_USB=y
+

configs/light_lpi4a_plastic_defconfig

@@ -0,0 +1,119 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="LicheeLaptop4A # "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-plastic.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+# CONFIG_DOS_PARTITION is not set
+CONFIG_CMD_USB=y
+

configs/light_lpi4a_pocket_defconfig

@@ -0,0 +1,119 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
+# CONFIG_THEAD_PLIC is not set
+# CONFIG_THEAD_LIGHT_TIMER is not set
+# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="LicheePocket4A # "
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+# CONFIG_DDR_LP4_3733_DUALRANK is not set
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_DDR_PRBS_TEST=n
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_DWAPB_GPIO=y
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_VERBOSE=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MMC_RPMB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_LIGHT_SEC_BOOT is not set
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-pocket.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DM_VIDEO=y
+CONFIG_PHY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CMD_BMP=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_DM_PCA953X=y
+CONFIG_VIDEO_VS_DPU=y
+CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
+CONFIG_VIDEO_DW_DSI_LIGHT=y
+CONFIG_VIDEO_DW_DPHY=y
+CONFIG_VIDEO_DW_DSI_HOST=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_DDR_REGU_0V6=600000
+CONFIG_DDR_REGU_0V8=800000
+CONFIG_DDR_REGU_1V1=1100000
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+# CONFIG_DOS_PARTITION is not set
+CONFIG_CMD_USB=y
+

configs/light_lpi4a_sec_defconfig

@@ -102,7 +102,7 @@ CONFIG_DM_PCA953X=y
 CONFIG_VIDEO_VS_DPU=y
 CONFIG_VIDEO_LCD_ILITEK_ILI9881C=n
 CONFIG_VIDEO_LCD_JD9365DA=y
-CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
+#CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
 CONFIG_VIDEO_DW_DSI_LIGHT=y
 CONFIG_VIDEO_DW_DPHY=y
 CONFIG_VIDEO_DW_DSI_HOST=y

configs/light_milkv_meles_16g_defconfig

@@ -0,0 +1,94 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+CONFIG_DDR_DDP=y
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles-16g.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="Milk-V Meles 16G# "
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+# CONFIG_MMC_SPI is not set
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y

configs/light_milkv_meles_defconfig

@@ -0,0 +1,89 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
+CONFIG_DDR_LP4X_3733_SINGLERANK=y
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="Milk-V Meles# "
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+# CONFIG_MMC_SPI is not set
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set

configs/light_milkv_meles_dualrank_defconfig

@@ -0,0 +1,93 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
+CONFIG_DDR_LP4X_3733_DUALRANK=y
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="Milk-V Meles# "
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+# CONFIG_MMC_SPI is not set
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y

configs/light_milkv_meles_singlerank_defconfig

@@ -0,0 +1,93 @@
+CONFIG_RISCV=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xe0000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL=y
+CONFIG_SMP=y
+CONFIG_TARGET_LIGHT_C910=y
+CONFIG_PMIC_VOL_INIT=y
+CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
+CONFIG_DDR_LP4X_3733_SINGLERANK=y
+CONFIG_DDR_BOARD_CONFIG=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
+CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles-4g.dtb"
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SYS_PROMPT="Milk-V Meles 4G# "
+CONFIG_CMD_BOOT_SLAVE=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_DDR_SCAN=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_UDP_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+# CONFIG_MMC_SPI is not set
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_SNPS=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
+CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_DESIGNWARE_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1234
+CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_BOARD_RNG_SEED=y
+CONFIG_FIXUP_MEMORY_REGION=y
+CONFIG_MISC=y
+CONFIG_LIGHT_AON_CONF=y

configs/tools-only_defconfig

@@ -6,6 +6,7 @@ CONFIG_FIT_SIGNATURE=y
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_BOOTM is not set
 # CONFIG_CMD_ELF is not set
+# CONFIG_CMD_EXTENSION is not set
 # CONFIG_CMD_DATE is not set
 CONFIG_OF_CONTROL=y
 CONFIG_OF_HOSTFILE=y

doc/README.pxe

@@ -89,6 +89,9 @@ pxe boot
      fdt_addr - the location of a fdt blob. 'fdt_addr' will be passed to bootm
      command if it is set and 'fdt_addr_r' is not passed to bootm command.
 
+     fdtoverlay_addr_r - location in RAM at which 'pxe boot' will temporarily store
+     fdt overlay(s) before applying them to the fdt blob stored at 'fdt_addr_r'.
+
 pxe file format
 ===============
 The pxe file format is nearly a subset of the PXELINUX file format; see
@@ -148,6 +151,12 @@ kernel <path>	    - if this label is chosen, use tftp to retrieve the kernel
 		      It useful for overlay selection in pxe file
 		      (see: doc/uImage.FIT/overlay-fdt-boot.txt)
 
+fdtoverlays <path> [...] - if this label is chosen, use tftp to retrieve the DT
+                      overlay(s) at <path>. it will be temporarily stored at the
+                      address indicated in the fdtoverlay_addr_r environment variable,
+                      and then applied in the load order to the fdt blob stored at the
+                      address indicated in the fdt_addr_r environment variable.
+
 append <string>	    - use <string> as the kernel command line when booting this
 		      label.
 

doc/usage/extension.rst

@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2021, Kory Maincent <kory.maincent@bootlin.com>
+
+U-Boot extension board usage (CONFIG_EXTENSION)
+===============================================
+
+Synopsis
+--------
+
+::
+
+    extension scan
+    extension list
+    extension apply <extension number|all>
+
+Description
+-----------
+
+The "extension" command proposes a generic U-Boot mechanism to detect
+extension boards connected to the HW platform, and apply the appropriate
+Device Tree overlays depending on the detected extension boards.
+
+The "extension" command comes with three sub-commands:
+
+ - "extension scan" makes the generic code call the board-specific
+   extension_board_scan() function to retrieve the list of detected
+   extension boards.
+
+ - "extension list" allows to list the detected extension boards.
+
+ - "extension apply <number>|all" allows to apply the Device Tree
+   overlay(s) corresponding to one, or all, extension boards
+
+The latter requires two environment variables to exist:
+
+ - extension_overlay_addr: the RAM address where to load the Device
+   Tree overlays
+
+ - extension_overlay_cmd: the U-Boot command to load one overlay.
+   Indeed, the location and mechanism to load DT overlays is very setup
+   specific.
+
+In order to enable this mechanism, board-specific code must implement
+the extension_board_scan() function that fills in a linked list of
+"struct extension", each describing one extension board. In addition,
+the board-specific code must select the SUPPORT_EXTENSION_SCAN Kconfig
+boolean.
+
+Usage example
+-------------
+
+1. Make sure your devicetree is loaded and set as the working fdt tree.
+
+::
+
+    => run loadfdt
+    => fdt addr $fdtaddr
+
+2. Prepare the environment variables
+
+::
+
+    => setenv extension_overlay_addr 0x88080000
+    => setenv extension_overlay_cmd 'load mmc 0:1 ${extension_overlay_addr} /boot/${extension_overlay_name}'
+
+3. Detect the plugged extension board
+
+::
+
+    => extension scan
+
+4. List the plugged extension board information and the devicetree
+   overlay name
+
+::
+
+    => extension list
+
+5. Apply the appropriate devicetree overlay
+
+For apply the selected overlay:
+
+::
+
+    => extension apply 0
+
+For apply all the overlays:
+
+::
+
+    => extension apply all
+
+Simple extension_board_scan function example
+--------------------------------------------
+
+.. code-block:: c
+
+    int extension_board_scan(struct list_head *extension_list)
+    {
+        struct extension *extension;
+
+        extension = calloc(1, sizeof(struct extension));
+        snprintf(extension->overlay, sizeof(extension->overlay), "overlay.dtbo");
+        snprintf(extension->name, sizeof(extension->name), "extension board");
+        snprintf(extension->owner, sizeof(extension->owner), "sandbox");
+        snprintf(extension->version, sizeof(extension->version), "1.1");
+        snprintf(extension->other, sizeof(extension->other), "Extension board information");
+        list_add_tail(&extension->list, extension_list);
+
+        return 1;
+    }

drivers/misc/light_regu.c

@@ -6,6 +6,7 @@
 #include <linux/delay.h>
 #include <command.h>
 #include "light_regu.h"
+#include <dm/device.h>
 
 #define FDT32_TO_CPU(x) (fdt32_to_cpu(x))
 
@@ -18,7 +19,7 @@
 #endif
 
 #ifdef AON_CONF_DEBUG
-#define AON_CONF_D(fmt, args...)  printf(fmt,##args)
+#define AON_CONF_D(fmt, args...) printf(fmt, ##args)
 #else
 #define AON_CONF_D(fmt, args...)
 #endif
@@ -69,7 +70,7 @@ static int misc_regu_remove(struct udevice *dev)
 	return 0;
 }
 
-static soc_virtual_id_t *found_base_virtual_id(char *name)
+static soc_virtual_id_t *found_base_virtual_id(const char *name)
 {
 	for (int i = 0; i < ARRAY_SIZE(soc_base_virtual_id_list); i++)
 	{
@@ -111,7 +112,7 @@ static int misc_regu_get_virtual_regu_config(struct udevice *dev, ofnode parent_
 	soc_virtual_id_t *soc_base_id;
 	ofnode_for_each_subnode(child_node, parent_node)
 	{
-		//printf("sub node name: %s\n", ofnode_get_name(child_node));
+		// printf("sub node name: %s\n", ofnode_get_name(child_node));
 		regu_num++;
 	}
 
@@ -134,8 +135,8 @@ static int misc_regu_get_virtual_regu_config(struct udevice *dev, ofnode parent_
 	ofnode_for_each_subnode(child_node, parent_node)
 	{
 		const char *virtual_id_name = ofnode_get_name(child_node);
-		int min_uv;
-		int max_uv;
+	    uint32_t min_uv;
+		uint32_t max_uv;
 		soc_base_id = found_base_virtual_id(virtual_id_name);
 		if (soc_base_id)
 		{
@@ -173,7 +174,11 @@ static int misc_regu_get_virtual_regu_config(struct udevice *dev, ofnode parent_
 		{
 			id_list[index].max_uv = max_uv;
 		}
-#warning "check double"
+		if (id_list[index].max_uv < id_list[index].min_uv)
+		{
+			printf("id:%d regulator-max-microvolt:%d is smaller than regulator-min-microvolt:%d\n", index, id_list[index].max_uv, id_list[index].min_uv);
+			return -1;
+		}
 		// printf("Get virtual regu_id:[%d]:%s min_uv:%dmv max_uv:%dmv\n", id_list[index].id, id_list[index].virtual_id_name,
 		// 	   id_list[index].min_uv, id_list[index].max_uv);
 		index++;
@@ -185,12 +190,12 @@ static int misc_regu_get_virtual_regu_config(struct udevice *dev, ofnode parent_
 	return 0;
 }
 
-static int misc_grep_pmic_dev_name_info(char *dev_name, pmic_dev_info_t *dev)
+static int misc_grep_pmic_dev_name_info(const char *dev_name, pmic_dev_info_t *dev)
 {
 	int flag_num = 0;
 	int version_flag = 0;
 	int index = 0;
-	char *dev_name_orig = dev_name;
+	const char *dev_name_orig = dev_name;
 	while (*dev_name)
 	{
 		if (*dev_name == ',')
@@ -235,20 +240,117 @@ static int get_node_index(const char *name)
 	return strtoul(name, NULL, 10);
 }
 
+static int misc_pmic_parent_io_ctrl_config(ofnode dev_node, pmic_parent_ctrl_info_t *ctrl_info)
+{
+	ofnode parent_ctrl_sub_node, parent_pmic_node;
+	int get_aon_ctrl_info_flag = 0;
+	int get_pmic_pin_ctrl_info_flag = 0;
+	uint32_t prop_size;
+	int prop_len;
+	const uint32_t *prop_val;
+
+	ofnode_for_each_subnode(parent_ctrl_sub_node, dev_node)
+	{
+		const char *node_name = ofnode_get_name(parent_ctrl_sub_node);
+		if (!strncmp(node_name, PMIC_PARENT_CTRL_NAME, strlen(PMIC_PARENT_CTRL_NAME)))
+		{
+			if (ofnode_read_bool(parent_ctrl_sub_node, "aon_pin_ctrl_info"))
+			{
+				prop_val = ofnode_get_property(parent_ctrl_sub_node, "aon_pin_ctrl_info", &prop_len);
+				if (!prop_val)
+				{
+					printf("aon_pin_ctrl_info property not found\n");
+					return -1;
+				}
+				prop_size = prop_len / sizeof(uint32_t);
+				if (prop_size != 3)
+				{
+					printf("invalid pmic-aon_pin_ctrl_info cell size %d, it should set format as aon_pin_ctrl_info = <<port> <pin> <activate_status>>\n", prop_size);
+					return -1;
+				}
+				ctrl_info->pmic_ctrl_type = PMIC_CTRL_BY_AON_GPIO;
+				ctrl_info->info.aon_io.gpio_port = FDT32_TO_CPU(prop_val[0]);
+				ctrl_info->info.aon_io.pin = FDT32_TO_CPU(prop_val[1]);
+				ctrl_info->info.aon_io.activate_status = FDT32_TO_CPU(prop_val[2]);
+				if (ctrl_info->info.aon_io.activate_status != HW_ID_ACTIVATE_HIGH && ctrl_info->info.aon_io.activate_status != HW_ID_ACTIVATE_LOW)
+				{
+					printf("aon io activate should set to: ACTIVATE_HIGH:0 or ACTIVATE_LOW:1");
+					return -1;
+				}
+				get_aon_ctrl_info_flag = 1;
+			}
+
+			if (ofnode_read_bool(parent_ctrl_sub_node, "pmic_pin_ctrl_info"))
+			{
+				prop_val = ofnode_get_property(parent_ctrl_sub_node, "pmic_pin_ctrl_info", &prop_len);
+				if (!prop_val)
+				{
+					printf("pmic_pin_ctrl_info property not found\n");
+					return -1;
+				}
+				prop_size = prop_len / sizeof(uint32_t);
+				if (prop_size != 3)
+				{
+					printf("invalid pmic-pmic_pin_ctrl_info cell size %d, it should set format as pmic_pin_ctrl_info = <<&pmic_dev> <pin> <activate_status>>\n", prop_size);
+					return -1;
+				}
+
+				parent_pmic_node = ofnode_get_by_phandle(FDT32_TO_CPU(prop_val[0]));
+				if (!ofnode_valid(parent_pmic_node))
+				{
+					printf("parent_pmic_node  not found\n");
+					return -1;
+				}
+				int parent_pmic_index = get_node_index(ofnode_get_name(parent_pmic_node));
+				if (parent_pmic_index < 0)
+				{
+					printf("parent_pmic_node index not found\n");
+					return -1;
+				}
+
+				ctrl_info->pmic_ctrl_type = PMIC_CTRL_BY_PMIC_GPIO;
+				ctrl_info->info.pmic_io.pmic_id = parent_pmic_index;
+				ctrl_info->info.pmic_io.io_hw_id = FDT32_TO_CPU(prop_val[1]);
+				ctrl_info->info.pmic_io.activate_status = FDT32_TO_CPU(prop_val[2]);
+				if (ctrl_info->info.pmic_io.activate_status != HW_ID_ACTIVATE_HIGH && ctrl_info->info.pmic_io.activate_status != HW_ID_ACTIVATE_LOW)
+				{
+					printf("pmic io activate should set to: HW_ID_ACTIVATE_HIGH:0 or HW_ID_ACTIVATE_LOW:1");
+					return -1;
+				}
+				get_pmic_pin_ctrl_info_flag = 1;
+			}
+
+			if (get_aon_ctrl_info_flag && get_pmic_pin_ctrl_info_flag)
+			{
+				printf("aon_pin_ctrl_info or pmic_pin_ctrl_info should only support one for a pmic dev\n");
+				return -1;
+			}
+			if (!get_aon_ctrl_info_flag && !get_pmic_pin_ctrl_info_flag)
+			{
+				printf("aon_pin_ctrl_info or pmic_pin_ctrl_info should only support one for a pmic dev\n");
+				return -1;
+			}
+			return 0;
+		}
+	}
+	ctrl_info->pmic_ctrl_type = PMIC_CTRL_BY_NOTHINTG;
+	return 0;
+}
+
 static int misc_regu_get_pmic_dev_config(ofnode parent_node, pmic_dev_info_t *pmic_dev_info_list)
 {
 	int ret = 0;
-	ofnode child_node, errio_node;
-	fdt_addr_t index;
-	char *pmic_name;
+	ofnode child_node;
+	int index;
+	const char *pmic_name;
 	int pmic_wdt_flag = 0;
 	int pmic_index = 0;
 	int pmic_addr_len = 0, pmic_addr_size;
 	int gpio_addr_len = 0, gpio_addr_size;
 	char err_io_str[40] = "NOT_SUPPORT";
 	char lpm_io_str[40] = "NOT_SUPPORT";
+	char parent_pmic_str[60] = "NOT_SUPPORT";
 	uint32_t port, pin, trigger_mode;
-	uint32_t phandle;
 	const uint32_t *prop_val;
 
 	ofnode_for_each_subnode(child_node, parent_node)
@@ -266,7 +368,7 @@ static int misc_regu_get_pmic_dev_config(ofnode parent_node, pmic_dev_info_t *pm
 			pmic_name = ofnode_read_string(child_node, "pmic-name");
 			if (!pmic_name)
 			{
-				printf("pmic_name property not set for %s%d", PMIC_DEV_DTS_NAME, index);
+				printf("pmic_name property not set for %s %d", PMIC_DEV_DTS_NAME, index);
 				return -1;
 			}
 
@@ -289,7 +391,7 @@ static int misc_regu_get_pmic_dev_config(ofnode parent_node, pmic_dev_info_t *pm
 			}
 			pmic_addr_size = pmic_addr_len / sizeof(uint32_t);
 
-			if (pmic_addr_size != 2 &&  pmic_addr_size!= 1)
+			if (pmic_addr_size != 2 && pmic_addr_size != 1)
 			{
 				printf("invalid pmic-addr cell size %d\n", pmic_addr_size);
 				return -1;
@@ -310,16 +412,23 @@ static int misc_regu_get_pmic_dev_config(ofnode parent_node, pmic_dev_info_t *pm
 				else
 				{
 					port = FDT32_TO_CPU(prop_val[0]);
-					pin = 1 << FDT32_TO_CPU(prop_val[1]);
+					pin = FDT32_TO_CPU(prop_val[1]);
 					trigger_mode = FDT32_TO_CPU(prop_val[2]);
 					dev->flag |= PMIC_DEV_ENABLE_ERR_IO;
 					dev->err_io_info.gpio_port = port;
 					dev->err_io_info.pin = pin;
 					dev->err_io_info.trigger_mode = trigger_mode;
+					if (dev->err_io_info.trigger_mode > GPIO_IRQ_MODE_HIGH_LEVEL)
+					{
+						printf("io trigger_mode support max:%d, it is set to %d\n", GPIO_IRQ_MODE_HIGH_LEVEL, dev->err_io_info.trigger_mode);
+						return -1;
+					}
 					sprintf(err_io_str, "port:%d pin:%d trigger:%d", port, pin, trigger_mode);
 				}
-			} else {
-                    sprintf(err_io_str, "NOT_SUPPORT");
+			}
+			else
+			{
+				sprintf(err_io_str, "NOT_SUPPORT");
 			}
 
 			prop_val = ofnode_get_property(child_node, "lpm_gpio", &gpio_addr_len);
@@ -334,24 +443,57 @@ static int misc_regu_get_pmic_dev_config(ofnode parent_node, pmic_dev_info_t *pm
 				else
 				{
 					port = FDT32_TO_CPU(prop_val[0]);
-					pin = 1 << FDT32_TO_CPU(prop_val[1]);
+					pin = FDT32_TO_CPU(prop_val[1]);
 					trigger_mode = FDT32_TO_CPU(prop_val[2]);
 					dev->flag |= PMIC_DEV_ENABLE_LPM_IO;
 					dev->lpm_io_info.gpio_port = port;
 					dev->lpm_io_info.pin = pin;
 					dev->lpm_io_info.trigger_mode = trigger_mode;
+					if (dev->lpm_io_info.trigger_mode > GPIO_IRQ_MODE_HIGH_LEVEL)
+					{
+						printf("io trigger_mode support max:%d, it is set to %d\n", GPIO_IRQ_MODE_HIGH_LEVEL, dev->lpm_io_info.trigger_mode);
+						return -1;
+					}
 					sprintf(lpm_io_str, "port:%d pin:%d trigger:%d", port, pin, trigger_mode);
 				}
-			} else {
-				sprintf(lpm_io_str,"NOT_SUPPORT");
+			}
+			else
+			{
+				sprintf(lpm_io_str, "NOT_SUPPORT");
+			}
+			ret = misc_pmic_parent_io_ctrl_config(child_node, &dev->ctrl_info);
+			if (ret)
+			{
+				printf("grep pmic parent io ctrl faild %d\n", ret);
+				return -1;
+			}
+			else
+			{
+				if (dev->ctrl_info.pmic_ctrl_type == PMIC_CTRL_BY_AON_GPIO)
+				{
+					sprintf(parent_pmic_str, "ctrl by aon io: port:%d pin:%d activate_status:%d", dev->ctrl_info.info.aon_io.gpio_port, dev->ctrl_info.info.aon_io.pin, dev->ctrl_info.info.aon_io.activate_status);
+				}
+				else if (dev->ctrl_info.pmic_ctrl_type == PMIC_CTRL_BY_PMIC_GPIO)
+				{
+					sprintf(parent_pmic_str, "ctrl by pmic io: pmic:%d hw_id:%d activate_status:%d", dev->ctrl_info.info.pmic_io.pmic_id, dev->ctrl_info.info.pmic_io.io_hw_id, dev->ctrl_info.info.pmic_io.activate_status);
+				}
+				else
+				{
+					sprintf(parent_pmic_str, "NOT_SUPPORT");
+				}
 			}
 
 			dev->pmic_id = index;
 			ret = misc_grep_pmic_dev_name_info(pmic_name, dev);
 			pmic_index++;
-			AON_CONF_D("Get pmic dev:[%d]:%s|%s addr1:0x%02x addr2:0x%02x wdt:{%s} errio:{%s} lpm_io:{%s}\n", index, dev->device_name, dev->version_name, dev->addr1, dev->addr2, (dev->flag & PMIC_DEV_ENABLE_WDT ? "SUPPORT" : "NOT_SUPPORT"), err_io_str, lpm_io_str);
+			AON_CONF_D("Get pmic dev:[%d]:%s|%s addr1:0x%02x addr2:0x%02x wdt:{%s} errio:{%s} lpm_io:{%s} pmic_ctrl_info:{%s}\n", index, dev->device_name, dev->version_name, dev->addr1, dev->addr2, (dev->flag & PMIC_DEV_ENABLE_WDT ? "SUPPORT" : "NOT_SUPPORT"), err_io_str, lpm_io_str, parent_pmic_str);
 		}
 	}
+	if (!pmic_index)
+	{
+		printf("No %s node found\n", PMIC_DEV_DTS_NAME);
+		return -1;
+	}
 	return 0;
 }
 
@@ -383,15 +525,10 @@ static int misc_regu_get_pmic_dev_by_name(const char *name, int pmic_dev_num, pm
 
 static int misc_regu_get_each_regu_hw_id_config(ofnode regu_id_node, int pmic_dev_num, pmic_dev_info_t *pmic_dev_info_list, soc_virtual_id_t *virtual_id_info, pmic_hw_info_t *id)
 {
-	uint32_t phandle;
 	ofnode pmic_node, pmic_parent_node;
 
-	char *pmic_name;
-
 	int prop_len, prop_size;
-	int on_order, on_delay_ms;
-	int off_order, off_delay_ms;
-	int pmic_index, parent_pmic_index;
+	int pmic_index;
 	const uint32_t *prop_val;
 
 	/*get pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE1>*/
@@ -451,12 +588,14 @@ static int misc_regu_get_each_regu_hw_id_config(ofnode regu_id_node, int pmic_de
 		}
 		(*id).soft_power_ctrl_info.on_info.on_order = FDT32_TO_CPU(prop_val[0]);
 		(*id).soft_power_ctrl_info.on_info.on_delay_ms = FDT32_TO_CPU(prop_val[1]);
-		if(prop_size == 3) {
-            (*id).soft_power_ctrl_info.on_info.init_target_uv = FDT32_TO_CPU(prop_val[2]);
-		} else {
+		if (prop_size == 3)
+		{
+			(*id).soft_power_ctrl_info.on_info.init_target_uv = FDT32_TO_CPU(prop_val[2]);
+		}
+		else
+		{
 			(*id).soft_power_ctrl_info.on_info.init_target_uv = 0;
 		}
-		
 	}
 
 	/*get auto_off_info = <1 1>*/
@@ -507,8 +646,12 @@ static int misc_regu_get_each_regu_hw_id_config(ofnode regu_id_node, int pmic_de
 
 		(*id).parent_hw_info.pmic_id = pmic_dev_info_list[pmic_index].pmic_id;
 		(*id).parent_hw_info.io_hw_id = FDT32_TO_CPU(prop_val[1]);
-#warning "check status"
 		(*id).parent_hw_info.activate_status = FDT32_TO_CPU(prop_val[2]);
+		if (FDT32_TO_CPU(prop_val[2]) != HW_ID_ACTIVATE_HIGH && FDT32_TO_CPU(prop_val[2]) != HW_ID_ACTIVATE_LOW)
+		{
+			printf("parent hw io activate should set to: HW_ID_ACTIVATE_HIGH:0 or HW_ID_ACTIVATE_LOW:1");
+			return -1;
+		}
 	}
 
 	return 0;
@@ -519,13 +662,11 @@ static int misc_regu_get_each_regu_config(ofnode regu_config_node, int pmic_dev_
 	int ret = 0;
 	ofnode hw_id_node;
 	ofnode coupling_node;
-	uint32_t phandle = 0;
 	int index = 0;
-	char *regu_id_name;
 	const uint32_t *prop_val;
 	int prop_len = 0;
 	int prop_size = 0;
-    int coupling_num = 0;
+	int coupling_num = 0;
 	uint16_t hw_id_used_flag = 0x0;
 
 	ofnode_for_each_subnode(hw_id_node, regu_config_node)
@@ -540,9 +681,9 @@ static int misc_regu_get_each_regu_config(ofnode regu_config_node, int pmic_dev_
 				return -1;
 			}
 
-			if (index >= PMIC_MAX_HW_ID_NUM || index >= 8 * sizeof(uint16_t))
+			if (index >= PMIC_MAX_HW_ID_NUM || index >= 8 * 2)
 			{
-				printf("regu_id index should less than %d\n", MIN(PMIC_MAX_HW_ID_NUM, 8 * sizeof(uint16_t)));
+				printf("regu_id index should less than %d\n", MIN(PMIC_MAX_HW_ID_NUM, 8 * 2));
 				return -1;
 			}
 
@@ -559,11 +700,10 @@ static int misc_regu_get_each_regu_config(ofnode regu_config_node, int pmic_dev_
 			ret = misc_regu_get_each_regu_hw_id_config(hw_id_node, pmic_dev_num, pmic_dev_info_list, regu_info, &pmic_regu_id_info->sub.id[index]);
 			if (ret)
 			{
-				printf("get hw_id@%d config faild %d\n", ret);
+				printf("get hw_id@%d config faild %d\n", index, ret);
 				return -1;
 			}
 		}
-
 	}
 
 	for (int i = PMIC_MAX_HW_ID_NUM - 1; i >= 0; i--)
@@ -573,74 +713,81 @@ static int misc_regu_get_each_regu_config(ofnode regu_config_node, int pmic_dev_
 			(*pmic_regu_id_info).sub.id[i].pmic_id = PMIC_ID_INVALID;
 		}
 	}
-    
+
 	ofnode_for_each_subnode(coupling_node, regu_config_node)
 	{
 		const char *node_name = ofnode_get_name(coupling_node);
 
 		if (!strncmp(node_name, COUPLING_ID_INFO_NAME, strlen(COUPLING_ID_INFO_NAME)))
 		{
-		/*get info = <0 1 -5 30>;*/
-	     prop_val = ofnode_get_property(coupling_node, "info", &prop_len);
-	    if (!prop_val)
-	    {
-		   printf("no info property set for %s", node_name);
-		   return -1;
-	    } else
-	    {
-			prop_size = prop_len / sizeof(uint32_t);
-			if (prop_size != 4)
+			/*get info = <0 1 -5 30>;*/
+			prop_val = ofnode_get_property(coupling_node, "info", &prop_len);
+			if (!prop_val)
 			{
-				printf("coupling info property should set in format as info = <id0 id1 max_spread min_spread)>\n");
+				printf("no info property set for %s", node_name);
 				return -1;
 			}
+			else
+			{
+				prop_size = prop_len / sizeof(uint32_t);
+				if (prop_size != 4)
+				{
+					printf("coupling info property should set in format as info = <id0 id1 max_spread min_spread)>\n");
+					return -1;
+				}
 
-            int id0 = FDT32_TO_CPU(prop_val[0]);
-		    int id1 = FDT32_TO_CPU(prop_val[1]);
-			int8_t max_spread = FDT32_TO_CPU(prop_val[2]);
-			int8_t min_spread = FDT32_TO_CPU(prop_val[3]);
+				int id0 = FDT32_TO_CPU(prop_val[0]);
+				int id1 = FDT32_TO_CPU(prop_val[1]);
+				int8_t max_spread = FDT32_TO_CPU(prop_val[2]);
+				int8_t min_spread = FDT32_TO_CPU(prop_val[3]);
 
-			if(ofnode_read_bool(coupling_node, "negative-min")) {
-                 min_spread = -min_spread; 
-			}
-			if(ofnode_read_bool(coupling_node, "negative-max")) {
-                 max_spread = -max_spread; 
-			}
-			if(id0 == id1) {
-                printf("coupling info: id0 id1 should not be equal");
-				return -1;
-			}
-			if(min_spread > max_spread) {
-                printf("coupling info: min_spread:%d is higher than max_spread:%d", min_spread, max_spread);
-				return -1;
-			}
-			if(id0 >= PMIC_MAX_HW_ID_NUM || id1 >= PMIC_MAX_HW_ID_NUM) {
-                printf("coupling info: id0:%d id1:%d is higher than max_id:%d", id0, id1, PMIC_MAX_HW_ID_NUM -1);
-				return -1;
-			}
+				if (ofnode_read_bool(coupling_node, "negative-min"))
+				{
+					min_spread = -min_spread;
+				}
+				if (ofnode_read_bool(coupling_node, "negative-max"))
+				{
+					max_spread = -max_spread;
+				}
+				if (id0 == id1)
+				{
+					printf("coupling info: id0 id1 should not be equal");
+					return -1;
+				}
+				if (min_spread > max_spread)
+				{
+					printf("coupling info: min_spread:%d is higher than max_spread:%d", min_spread, max_spread);
+					return -1;
+				}
+				if (id0 >= PMIC_MAX_HW_ID_NUM || id1 >= PMIC_MAX_HW_ID_NUM)
+				{
+					printf("coupling info: id0:%d id1:%d is higher than max_id:%d", id0, id1, PMIC_MAX_HW_ID_NUM - 1);
+					return -1;
+				}
 
-			if((*pmic_regu_id_info).sub.id[id0].pmic_id == PMIC_ID_INVALID || (*pmic_regu_id_info).sub.id[id1].pmic_id == PMIC_ID_INVALID) {
-                printf("coupling info:id0:%d id1:%d is invalid", id0, id1);
-				return -1;
+				if ((*pmic_regu_id_info).sub.id[id0].pmic_id == PMIC_ID_INVALID || (*pmic_regu_id_info).sub.id[id1].pmic_id == PMIC_ID_INVALID)
+				{
+					printf("coupling info:id0:%d id1:%d is invalid", id0, id1);
+					return -1;
+				}
+				(*pmic_regu_id_info).sub.coupling_list[coupling_num].id0 = id0;
+				(*pmic_regu_id_info).sub.coupling_list[coupling_num].id1 = id1;
+				(*pmic_regu_id_info).sub.coupling_list[coupling_num].max_spread = max_spread;
+				(*pmic_regu_id_info).sub.coupling_list[coupling_num].min_spread = min_spread;
+				coupling_num++;
+				if (coupling_num > PMIC_MAX_COUPLING_NUM)
+				{
+					printf("coupling info should no more than %d\n", coupling_num);
+					return -1;
+				}
 			}
-			(*pmic_regu_id_info).sub.coupling_list[coupling_num].id0 = id0;
-			(*pmic_regu_id_info).sub.coupling_list[coupling_num].id1 = id1;
-			(*pmic_regu_id_info).sub.coupling_list[coupling_num].max_spread = max_spread;
-			(*pmic_regu_id_info).sub.coupling_list[coupling_num].min_spread = min_spread;
-			coupling_num++;
-			if(coupling_num > PMIC_MAX_COUPLING_NUM) {
-                printf("coupling info should no more than %d\n", coupling_num);
-				return -1;
-			}
-	   }
 		}
-
 	}
 
-	for(int i = PMIC_MAX_COUPLING_NUM - 1; i >= coupling_num; i--)
+	for (int i = PMIC_MAX_COUPLING_NUM - 1; i >= coupling_num; i--)
 	{
-       (*pmic_regu_id_info).sub.coupling_list[i].id0 =  REGU_SUB_ID_INVALID;
-	   (*pmic_regu_id_info).sub.coupling_list[i].id1 =  REGU_SUB_ID_INVALID;
+		(*pmic_regu_id_info).sub.coupling_list[i].id0 = REGU_SUB_ID_INVALID;
+		(*pmic_regu_id_info).sub.coupling_list[i].id1 = REGU_SUB_ID_INVALID;
 	}
 
 	return 0;
@@ -649,11 +796,10 @@ static int misc_regu_get_each_regu_config(ofnode regu_config_node, int pmic_dev_
 static int misc_regu_get_regu_config(ofnode parent_node, int pmic_dev_num, pmic_dev_info_t *pmic_dev_info_list, int virtual_id_num, soc_virtual_id_t *regu_list, csi_regu_id_t *pmic_regu_id_list)
 {
 	ofnode child_node;
-	int index = 0;
 	uint32_t phandle = 0;
 	int ret = 0;
 	ofnode regu_virtual_node;
-	char *regu_id_name;
+	const char *regu_id_name;
 	int virtual_id_index = 0;
 	uint16_t virtual_id_config_flag = 0;
 	int regu_config_index = 0;
@@ -661,7 +807,7 @@ static int misc_regu_get_regu_config(ofnode parent_node, int pmic_dev_num, pmic_
 	ofnode_for_each_subnode(child_node, parent_node)
 	{
 		virtual_id_index = 0;
-		char *node_name = ofnode_get_name(child_node);
+		const char *node_name = ofnode_get_name(child_node);
 		if (!strncmp(node_name, REGU_ID_CONF_NAME, strlen(REGU_ID_CONF_NAME)))
 		{
 
@@ -718,7 +864,7 @@ static int misc_regu_get_regu_config(ofnode parent_node, int pmic_dev_num, pmic_
 				return -1;
 			}
 
-			AON_CONF_D("Get regu config, virtual_regu_id:[%d]:%s min_uv:%dmv max_uv:%dmv\n", virtual_id, regu_list[virtual_id_index].virtual_id_name, regu_list[virtual_id_index].min_uv,regu_list[virtual_id_index].max_uv);
+			AON_CONF_D("Get regu config, virtual_regu_id:[%d]:%s min_uv:%dmv max_uv:%dmv\n", virtual_id, regu_list[virtual_id_index].virtual_id_name, regu_list[virtual_id_index].min_uv, regu_list[virtual_id_index].max_uv);
 			for (int i = 0; i < ARRAY_SIZE(regu_conf->sub.id); i++)
 			{
 				pmic_hw_info_t *sub = &regu_conf->sub.id[i];
@@ -758,24 +904,31 @@ static int misc_regu_get_regu_config(ofnode parent_node, int pmic_dev_num, pmic_
 				}
 			}
 			int temp_flag = 0;
-			for(int i = 0; i < ARRAY_SIZE(regu_conf->sub.coupling_list); i++) {
-                coupling_desc_t* coupling_info = &regu_conf->sub.coupling_list[i];
-				if(coupling_info->id0 != REGU_SUB_ID_INVALID) {
-					if(!temp_flag) {
-                        AON_CONF_D(">>>>>>");
+			for (int i = 0; i < ARRAY_SIZE(regu_conf->sub.coupling_list); i++)
+			{
+				coupling_desc_t *coupling_info = &regu_conf->sub.coupling_list[i];
+				if (coupling_info->id0 != REGU_SUB_ID_INVALID)
+				{
+					if (!temp_flag)
+					{
+						AON_CONF_D(">>>>>>");
 						temp_flag = 1;
 					}
-                    AON_CONF_D("%s@%d:{id0:%d id1:%d max_spreed:%dmv min_spreed:%dmv}   ", COUPLING_ID_INFO_NAME, i,coupling_info->id0, coupling_info->id1, coupling_info->max_spread *10 , coupling_info->min_spread * 10);
+					AON_CONF_D("%s@%d:{id0:%d id1:%d max_spreed:%dmv min_spreed:%dmv}   ", COUPLING_ID_INFO_NAME, i, coupling_info->id0, coupling_info->id1, coupling_info->max_spread * 10, coupling_info->min_spread * 10);
 				}
 			}
-			if(temp_flag) {
+			if (temp_flag)
+			{
 				AON_CONF_D("\n");
 			}
 			regu_config_index++;
 		}
 	}
-
-#warning "add no config check"
+	if (!regu_config_index)
+	{
+		printf("No %s node found\n", REGU_ID_CONF_NAME);
+		return -1;
+	}
 	return 0;
 }
 
@@ -816,7 +969,7 @@ static int misc_regu_get_aon_pmic_config(struct udevice *dev, ofnode parent_node
 	if (ret)
 	{
 		printf("pmic dev config get faild %d", ret);
-#warning "free"
+		free(pmic_dev_info_list);
 		return -1;
 	}
 
@@ -846,7 +999,8 @@ static int misc_regu_get_aon_pmic_config(struct udevice *dev, ofnode parent_node
 	if (ret)
 	{
 		printf("get regu config faild %d\n", ret);
-#warning "free"
+		free(pmic_dev_info_list);
+		free(pmic_regu_id_list);
 		return -1;
 	}
 
@@ -859,15 +1013,19 @@ static int misc_regu_get_aon_pmic_config(struct udevice *dev, ofnode parent_node
 	return 0;
 }
 
+extern int device_bind_ofnode(struct udevice *parent, const struct driver *driver,
+                       const char *name, const void *platdata, ofnode node,
+                       struct udevice **devp);
+
 static int misc_regu_bind(struct udevice *dev)
 {
 	struct mic_regu_platdata *plat = dev_get_platdata(dev);
 	ofnode parent_node = dev->node;
-
+	const uint32_t *prop_val;
+	int prop_len = 0;
+	int prop_size = 0;
 	int ret;
-	ofnode child_node, node, regu_node, aon_conf_node;
-	const void *blob = gd->fdt_blob;
-	int subnode;
+	ofnode child_node, aon_conf_node = {0}, regu_node = {0};
 	struct udevice *dev_1;
 
 	/* If this is a child device, there is nothing to do here */
@@ -888,7 +1046,7 @@ static int misc_regu_bind(struct udevice *dev)
 	ofnode_for_each_subnode(child_node, parent_node)
 	{
 		/* Increment base_id for all subnodes, also the disabled ones */
-		//printf("sub node name: %s\n", ofnode_get_name(child_node));
+		// printf("sub node name: %s\n", ofnode_get_name(child_node));
 		if (!strncmp(ofnode_get_name(child_node), REGU_DTS_NAME, strlen(REGU_DTS_NAME)))
 		{
 			regu_node = child_node;
@@ -901,8 +1059,6 @@ static int misc_regu_bind(struct udevice *dev)
 		}
 	}
 
-
-
 	if (!get_regu_dts_flag)
 	{
 		printf("No %s node in dts\n", REGU_DTS_NAME);
@@ -921,18 +1077,48 @@ static int misc_regu_bind(struct udevice *dev)
 		return -ENOMEM;
 	}
 
-	plat->wakeup_flag  = 0;
+	plat->wakeup_flag = 0;
 
-	if (ofnode_read_bool(parent_node, "wakeup-by-gpio-on")) {
+	if (ofnode_read_bool(parent_node, "wakeup-by-gpio-on"))
+	{
 		plat->wakeup_flag |= AON_WAKEUP_BY_GPIO;
 		printf("aon wakeup by gpio enabled\n");
 	}
 
-	if (ofnode_read_bool(parent_node, "wakeup-by-rtc-on")) {
+	if (ofnode_read_bool(parent_node, "wakeup-by-rtc-on"))
+	{
 		plat->wakeup_flag |= AON_WAKEUP_BY_RTC;
 		printf("aon wakeup by rtc enabled\n");
 	}
 
+	/*grep ii-config info*/
+	prop_val = ofnode_get_property(aon_conf_node, "iic-config", &prop_len);
+	if (!prop_val)
+	{
+		printf("pmic-addr property not found\n");
+		return -1;
+	}
+	prop_size = prop_len / sizeof(uint32_t);
+	if (prop_size != 3)
+	{
+		printf("invalid iic-config cell size %d,it should set in format as iic-config = <<id> <addr_mode> <speed>>\n", prop_size);
+		return -1;
+	}
+	plat->iic_config.iic_id = FDT32_TO_CPU(prop_val[0]);
+	plat->iic_config.addr_mode = FDT32_TO_CPU(prop_val[1]);
+	plat->iic_config.speed = FDT32_TO_CPU(prop_val[2]);
+	if (plat->iic_config.addr_mode > IIC_ADDRESS_10BIT)
+	{
+		printf("iic addr_mode only support IIC_ADDRESS_7BIT:0 IIC_ADDRESS_10BIT:1\n");
+		return -1;
+	}
+	if (plat->iic_config.speed > IIC_BUS_SPEED_HIGH)
+	{
+		printf("iic speed max support IIC_BUS_SPEED_HIGH:%d\n", IIC_BUS_SPEED_HIGH);
+		return -1;
+	}
+	printf("iic id:%d addr_mode:%d speed:%d\n", plat->iic_config.iic_id, plat->iic_config.addr_mode, plat->iic_config.speed);
+
 	ret = misc_regu_get_virtual_regu_config(dev, regu_node, &plat->regu_list);
 	if (ret)
 	{

drivers/misc/light_regu.h

@@ -1,7 +1,6 @@
 #ifndef __LIGHT_REGU_H__
 #define __LIGHT_REGU_H__
 
-
 typedef enum
 {
 	SOC_DVDD18_AON,		  /*da9063:  ldo-3 */
@@ -35,25 +34,23 @@ typedef enum
 	SOC_REGU_INVALID = 0xFF
 } soc_virtual_id_en;
 
-
 #define REGU_DTS_NAME "light-regu-reg"
 #define AON_CONF_NAME "aon_pmic_config"
 #define PMIC_DEV_DTS_NAME "pmic-dev"
+#define PMIC_PARENT_CTRL_NAME "pmic_ctrl_info"
 #define REGU_ID_CONF_NAME "regu_config"
-#define REGU_ID_NAME      "regu_id"
-#define COUPLING_ID_INFO_NAME  "coupling_info"
+#define REGU_ID_NAME "regu_id"
+#define COUPLING_ID_INFO_NAME "coupling_info"
 
+#define PMIC_DEV_ENABLE_WDT (1U << 0)
+#define PMIC_DEV_ENABLE_ERR_IO (1U << 1)
+#define PMIC_DEV_ENABLE_LPM_IO (1U << 2)
 
-
-#define PMIC_DEV_ENABLE_WDT                (1U << 0)
-#define PMIC_DEV_ENABLE_ERR_IO             (1U << 1)
-#define PMIC_DEV_ENABLE_LPM_IO             (1U << 2)
-
-#define HW_ID_NO_SOFT_AUTO_ON   (0xff)
-#define HW_ID_NO_SOFT_AUTO_OFF  (0xff)
-#define HW_ID_INVALID           (0xff)
-#define PMIC_ID_INVALID         (0xff)
-#define REGU_SUB_ID_INVALID     (0xff)
+#define HW_ID_NO_SOFT_AUTO_ON (0xff)
+#define HW_ID_NO_SOFT_AUTO_OFF (0xff)
+#define HW_ID_INVALID (0xff)
+#define PMIC_ID_INVALID (0xff)
+#define REGU_SUB_ID_INVALID (0xff)
 
 #define REGU_EXT_ID_NAME_LEN 30
 #define PMIC_DEV_NAME_LEN 20
@@ -63,108 +60,148 @@ typedef enum
 #define PMIC_MAX_COUPLING_NUM 3
 
 #define AON_WAKEUP_BY_GPIO (1 << 0)
-#define AON_WAKEUP_BY_RTC  (1 << 1)
+#define AON_WAKEUP_BY_RTC (1 << 1)
 
-typedef enum {
-   HW_ID_ACTIVATE_HIGH  = 0U,
-   HW_ID_ACTIVATE_LOW =   1U,
+#define AON_CONFIG_MAGIC "AON_CONFIG"
+#define UBOOT_CONFIG_MAGIC "UBOOT_SET"
+#define AON_CONFIG_VERSION "1.0.0"
+
+typedef enum
+{
+	HW_ID_ACTIVATE_HIGH = 0U,
+	HW_ID_ACTIVATE_LOW = 1U,
 } hw_activate_status_en;
 
-typedef struct __packed {
+typedef struct __packed
+{
 	uint8_t pmic_id;
-    uint8_t io_hw_id;
-    uint8_t activate_status;
+	uint8_t io_hw_id;
+	uint8_t activate_status;
 } pmic_parent_hw_io_ctrl_info_t;
 
-typedef struct __packed  {
-    uint8_t   on_order;
-	uint8_t   on_delay_ms;
-    uint32_t  init_target_uv;
+typedef struct __packed
+{
+	uint8_t on_order;
+	uint8_t on_delay_ms;
+	uint32_t init_target_uv;
 } regu_soft_power_ctrl_on_t;
 
-typedef struct __packed {
-    uint8_t off_order;
+typedef struct __packed
+{
+	uint8_t off_order;
 	uint8_t off_delay_ms;
 } regu_soft_power_ctrl_off_t;
 
-typedef struct __packed {
-   regu_soft_power_ctrl_on_t  on_info;
-   regu_soft_power_ctrl_off_t off_info;
+typedef struct __packed
+{
+	regu_soft_power_ctrl_on_t on_info;
+	regu_soft_power_ctrl_off_t off_info;
 } regu_soft_power_ctrl_t;
 
-
-typedef struct __packed {
+typedef struct __packed
+{
 	uint8_t id0;
 	uint8_t id1;
 	int8_t max_spread; // mv/10
 	int8_t min_spread; // mv/10
-}coupling_desc_t;
+} coupling_desc_t;
 
+typedef enum
+{
+	GPIO_IRQ_MODE_RISING_EDGE = 0, ///< Interrupt mode for rising edge
+	GPIO_IRQ_MODE_FALLING_EDGE,	   ///< Interrupt mode for falling edge
+	GPIO_IRQ_MODE_BOTH_EDGE,	   ///< Interrupt mode for both edge
+	GPIO_IRQ_MODE_LOW_LEVEL,	   ///< Interrupt mode for low level
+	GPIO_IRQ_MODE_HIGH_LEVEL,	   ///< Interrupt mode for high level
+} csi_gpio_irq_mode_t;
 
-typedef struct __packed {
-   uint8_t pmic_id;
-   uint8_t hw_id;
-   uint8_t benable;
-   pmic_parent_hw_io_ctrl_info_t parent_hw_info;
-   regu_soft_power_ctrl_t soft_power_ctrl_info;
+typedef enum
+{
+	IIC_ADDRESS_7BIT = 0U, ///< 7-bit address mode
+	IIC_ADDRESS_10BIT	   ///< 10-bit address mode
+} csi_iic_addr_mode_t;
+
+typedef enum
+{
+	IIC_BUS_SPEED_STANDARD = 0U, ///< Standard Speed  (<=100kHz)
+	IIC_BUS_SPEED_FAST,			 ///< Fast Speed      (<=400kHz)
+	IIC_BUS_SPEED_FAST_PLUS,	 ///< Fast plus Speed (<=  1MHz)
+	IIC_BUS_SPEED_HIGH			 ///< High Speed      (<=3.4MHz)
+} csi_iic_speed_t;
+
+typedef struct __packed
+{
+	uint8_t pmic_id;
+	uint8_t hw_id;
+	uint8_t benable;
+	pmic_parent_hw_io_ctrl_info_t parent_hw_info;
+	regu_soft_power_ctrl_t soft_power_ctrl_info;
 } pmic_hw_info_t;
 
-
-typedef	struct __packed{
+typedef struct __packed
+{
 	coupling_desc_t coupling_list[PMIC_MAX_COUPLING_NUM];
-	pmic_hw_info_t  id[PMIC_MAX_HW_ID_NUM];                             ///<  sub id1 for single-rail or first src of dual-rail
-}pmic_hw_id_t;
+	pmic_hw_info_t id[PMIC_MAX_HW_ID_NUM]; ///<  sub id1 for single-rail or first src of dual-rail
+} pmic_hw_id_t;
 
-typedef struct __packed {
-	uint8_t     regu_ext_id;                   ///< virtual global regulator id
-	char        regu_ext_id_name[REGU_EXT_ID_NAME_LEN];             ///< vitual regu-id name
-	pmic_hw_id_t sub;                           ///<  sub id set for dual-rail/single-rail regulator
-}csi_regu_id_t;
+typedef struct __packed
+{
+	uint8_t regu_ext_id;						 ///< virtual global regulator id
+	char regu_ext_id_name[REGU_EXT_ID_NAME_LEN]; ///< vitual regu-id name
+	pmic_hw_id_t sub;							 ///<  sub id set for dual-rail/single-rail regulator
+} csi_regu_id_t;
 
-typedef enum {
-   PMIC_CTRL_BY_AON_GPIO =  0U,
-   PMIC_CTRL_BY_PMIC_GPIO = 1U,
-   PMIC_CTRL_BY_NOTHINTG  = 0xFF,
+typedef enum
+{
+	PMIC_CTRL_BY_AON_GPIO = 0U,
+	PMIC_CTRL_BY_PMIC_GPIO = 1U,
+	PMIC_CTRL_BY_NOTHINTG = 0xFF,
 } pmic_ctrl_info_en;
 
-typedef struct __packed {
-    uint8_t port;
+typedef struct __packed
+{
+	uint8_t gpio_port;
 	uint8_t pin;
-    uint8_t activate_status;
+	uint8_t activate_status;
 } pmic_ctrl_by_aon_info_t;
 
-typedef struct __packed {
+typedef struct __packed
+{
 	uint8_t pmic_id;
-    uint8_t io_hw_id;
-    uint8_t activate_status;
+	uint8_t io_hw_id;
+	uint8_t activate_status;
 } pmic_ctrl_by_pmic_info_t;
 
-typedef struct __packed {
-    uint8_t pmic_ctrl_type;
-	union {
-       pmic_ctrl_by_aon_info_t  aon_io_info;
-	   pmic_ctrl_by_pmic_info_t pmic_io_info;
-	};
+typedef struct __packed
+{
+	uint8_t pmic_ctrl_type;
+	union
+	{
+		pmic_ctrl_by_aon_info_t aon_io;
+		pmic_ctrl_by_pmic_info_t pmic_io;
+	} info;
 } pmic_parent_ctrl_info_t;
 
-typedef struct  __packed{
-	 uint16_t gpio_port;
-     uint16_t pin;
-	 uint8_t  trigger_mode;
+typedef struct __packed
+{
+	uint8_t gpio_port;
+	uint8_t pin;
+	uint8_t trigger_mode;
 } pmic_interrupt_io_info_t;
 
-typedef struct __packed  {
-    char device_name[PMIC_DEV_NAME_LEN];
-    char version_name[PMIC_DEV_VERSION_LEN];
-    uint8_t pmic_id;
-    uint8_t addr1;
-    uint8_t addr2;
-	uint8_t flag;          /*support wdt|errio| lpm io*/
+typedef struct __packed
+{
+	char device_name[PMIC_DEV_NAME_LEN];
+	char version_name[PMIC_DEV_VERSION_LEN];
+	uint8_t pmic_id;
+	uint8_t addr1;
+	uint8_t addr2;
+	uint8_t flag; /*support wdt|errio| lpm io*/
 	uint8_t slew_rate;
-	uint32_t    wdt_len;
+	uint32_t wdt_len;
 	pmic_interrupt_io_info_t err_io_info;
 	pmic_interrupt_io_info_t lpm_io_info;
-    pmic_parent_ctrl_info_t ctrl_info;
+	pmic_parent_ctrl_info_t ctrl_info;
 } pmic_dev_info_t;
 
 typedef struct
@@ -193,37 +230,42 @@ typedef struct
 	csi_regu_id_t *regu_id_list;
 } regu_id_list_t;
 
+typedef struct __packed
+{
+	uint8_t iic_id;	   ///< iic id
+	uint8_t addr_mode; ///< iic addr_mode  ---> csi_iic_addr_mode_t
+	uint8_t speed;	   ///< iic speed type  ---> csi_iic_speed_t
+	uint8_t reserved[1];
+} csi_pmic_if_config_t;
+
 struct mic_regu_platdata
 {
 	const char *name;
-	uint32_t  wakeup_flag;
+	uint32_t wakeup_flag;
+	csi_pmic_if_config_t iic_config;
 	virtual_regu_list_t regu_list;
 	pmic_dev_list_t pmic_list;
 	regu_id_list_t regu_id_list;
 };
 
+typedef struct __packed
+{
+	csi_pmic_if_config_t iic_config;
+	uint8_t pmic_dev_num;
+	uint8_t regu_num;
+	uint32_t pmic_dev_list_offset;
+	uint32_t regu_id_list_offset;
+} aon_pmic_config_t;
 
-#define   AON_CONFIG_MAGIC   "AON_CONFIG"
-#define   AON_CONFIG_VERSION "1.0.0"
-
-typedef  struct __packed{
-	uint8_t iic_id;
-    uint8_t pmic_dev_num;
-    uint8_t regu_num;
-	int pmic_dev_list_offset;
-	int regu_id_list_offset;
-}aon_pmic_config_t;
-
-typedef  struct  __packed{
-   const char  magic[11];
-   const char  version[11];
-   uint8_t   max_hw_id_num;
-   uint64_t  aon_config_partition_size;
-   uint32_t  wakeup_flag;
-   aon_pmic_config_t aon_pmic;
+typedef struct __packed
+{
+	const char magic[11];
+	const char version[11];
+	const char uboot_set_magic[11];
+	uint8_t max_hw_id_num;
+	uint64_t aon_config_partition_size;
+	uint32_t wakeup_flag;
+	aon_pmic_config_t aon_pmic;
 } aon_config_t;
 
-
-
-
 #endif

drivers/usb/host/xhci-mem.c

@@ -34,7 +34,10 @@
  */
 void xhci_flush_cache(uintptr_t addr, u32 len)
 {
-	BUG_ON((void *)addr == NULL || len == 0);
+	// th1520 will load fw_dymaic.bin into 0x0
+	// so disable it
+	// load usb 0:2 0x0 fw_dynamic.bin
+	//BUG_ON((void *)addr == NULL || len == 0);
 
 	flush_dcache_range(addr & ~(CACHELINE_SIZE - 1),
 				ALIGN(addr + len, CACHELINE_SIZE));
@@ -49,7 +52,10 @@ void xhci_flush_cache(uintptr_t addr, u32 len)
  */
 void xhci_inval_cache(uintptr_t addr, u32 len)
 {
-	BUG_ON((void *)addr == NULL || len == 0);
+	// th1520 will load fw_dymaic.bin into 0x0
+	// so disable it
+	// load usb 0:2 0x0 fw_dynamic.bin
+	//BUG_ON((void *)addr == NULL || len == 0);
 
 	invalidate_dcache_range(addr & ~(CACHELINE_SIZE - 1),
 				ALIGN(addr + len, CACHELINE_SIZE));

drivers/video/Kconfig

@@ -351,16 +351,24 @@ config VIDEO_LCD_ILITEK_ILI9881C
 	Say Y here if you want to enable support for ILITEK ILI9881C
 	800x1280 DSI video mode panel.
 
+config VIDEO_LCD_MINGJUN_070BI30IA2
+	bool "MingJun 070BI30IA2 DSI LCD panel support"
+	depends on DM_VIDEO
+	select VIDEO_MIPI_DSI
+	help
+	Say Y here if you want to enable support for Mingjun 070BI30IA2
+        800x1280 DSI video mode panel.
+
 config VIDEO_LCD_JD9365DA
 	bool "JD9365DA DSI LCD panel support"
 	depends on DM_VIDEO
 	select VIDEO_MIPI_DSI
 	help
 	Say Y here if you want to enable support for JD9365DA
-	800x1280 DSI video mode panel.
 
 config VIDEO_LCD_CUSTOM_LOGO
 	bool "LCD CUSTOM logo support"
+	default n
 	help
 	Say Y here if you want to enable support for custom logo.
 

drivers/video/Makefile

@@ -55,6 +55,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
 obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
 obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
 obj-$(CONFIG_VIDEO_LCD_ILITEK_ILI9881C) += ilitek-ili9881c.o
+obj-$(CONFIG_VIDEO_LCD_MINGJUN_070BI30IA2) += mingjun-070bi30ia2.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 obj-${CONFIG_VIDEO_MESON} += meson/

drivers/video/ilitek-ili9881c.c

@@ -368,12 +368,12 @@ static int ili9881c_panel_prepare(struct udevice *panel)
 	ret = dm_gpio_set_value(&priv->reset, true);
 	if (ret)
 		return ret;
-	mdelay(1);
+	mdelay(500);
 
 	ret = dm_gpio_set_value(&priv->reset, false);
 	if (ret)
 		return ret;
-	mdelay(10);
+	mdelay(100);
 
 	return 0;
 }
@@ -464,6 +464,20 @@ static int ili9881c_panel_ofdata_to_platdata(struct udevice *dev)
 		dev_err(dev, "Warning: cannot get reset GPIO\n");
 		if (ret != -ENOENT)
 			return ret;
+	} else {
+		/* not a bug, but uboot's regulator is buggy,
+		I haven't more time to fix it, so put it here
+		*/
+		/* reset panel */
+		ret = dm_gpio_set_value(&priv->reset, false);
+		if (ret)
+			return ret;
+		mdelay(100);
+
+		ret = dm_gpio_set_value(&priv->reset, true);
+		if (ret)
+			return ret;
+		mdelay(100);
 	}
 
 	/* power gpios */

drivers/video/mingjun-070bi30ia2.c

@@ -0,0 +1,490 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <backlight.h>
+#include <dm.h>
+#include <mipi_dsi.h>
+#include <panel.h>
+#include <asm/gpio.h>
+
+struct mingjun_panel_cmd {
+	char cmdlen;
+	char cmddata[0x40];
+};
+
+static const struct mingjun_panel_cmd mingjun_on_cmds[] = {
+	// { .cmdlen = 4,	.cmddata = {0xB9, 0xFF, 0x83, 0x94} },
+	// { .cmdlen = 11,	.cmddata = {0xB1, 0x48, 0x0A, 0x6A, 0x09, 0x33, 0x54,
+	// 			0x71, 0x71, 0x2E, 0x45} },
+	// { .cmdlen = 7,	.cmddata = {0xBA, 0x63, 0x03, 0x68, 0x6B, 0xB2, 0xC0} },
+	// { .cmdlen = 7,	.cmddata = {0xB2, 0x00, 0x80, 0x64, 0x0C, 0x06, 0x2F} },
+	// { .cmdlen = 22, .cmddata = {0xB4, 0x1C, 0x78, 0x1C, 0x78, 0x1C, 0x78, 0x01,
+	// 			0x0C, 0x86, 0x75, 0x00, 0x3F, 0x1C, 0x78, 0x1C,
+	// 			0x78, 0x1C, 0x78, 0x01, 0x0C, 0x86} },
+	// { .cmdlen = 34, .cmddata = {0xD3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
+	// 			0x08, 0x32, 0x10, 0x05, 0x00, 0x05, 0x32, 0x13,
+	// 			0xC1, 0x00, 0x01, 0x32, 0x10, 0x08, 0x00, 0x00,
+	// 			0x37, 0x03, 0x07, 0x07, 0x37, 0x05, 0x05, 0x37,
+	// 			0x0C, 0x40} },
+	// { .cmdlen = 45, .cmddata = {0xD5, 0x18, 0x18, 0x18, 0x18, 0x22, 0x23, 0x20,
+	// 			0x21, 0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02,
+	// 			0x03, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+	// 			0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+	// 			0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+	// 			0x18, 0x19, 0x19, 0x19, 0x19} },
+	// { .cmdlen = 45, .cmddata = {0xD6, 0x18, 0x18, 0x19, 0x19, 0x21, 0x20, 0x23,
+	// 			0x22, 0x03, 0x02, 0x01, 0x00, 0x07, 0x06, 0x05,
+	// 			0x04, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+	// 			0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+	// 			0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+	// 			0x18, 0x19, 0x19, 0x18, 0x18} },
+	// { .cmdlen = 59, .cmddata = {0xE0, 0x07, 0x08, 0x09, 0x0D, 0x10, 0x14, 0x16,
+	// 			0x13, 0x24, 0x36, 0x48, 0x4A, 0x58, 0x6F, 0x76,
+	// 			0x80, 0x97, 0xA5, 0xA8, 0xB5, 0xC6, 0x62, 0x63,
+	// 			0x68, 0x6F, 0x72, 0x78, 0x7F, 0x7F, 0x00, 0x02,
+	// 			0x08, 0x0D, 0x0C, 0x0E, 0x0F, 0x10, 0x24, 0x36,
+	// 			0x48, 0x4A, 0x58, 0x6F, 0x78, 0x82, 0x99, 0xA4,
+	// 			0xA0, 0xB1, 0xC0, 0x5E, 0x5E, 0x64, 0x6B, 0x6C,
+	// 			0x73, 0x7F, 0x7F} },
+	// { .cmdlen = 2, .cmddata = {0xCC, 0x03} },
+	// { .cmdlen = 3, .cmddata = {0xC0, 0x1F, 0x73} },
+	// { .cmdlen = 3, .cmddata = {0xB6, 0x90, 0x90} },
+	// { .cmdlen = 2, .cmddata = {0xD4, 0x02} },
+	// { .cmdlen = 2, .cmddata = {0xBD, 0x01} },
+	// { .cmdlen = 2, .cmddata = {0xB1, 0x00} },
+	// { .cmdlen = 2, .cmddata = {0xBD, 0x00} },
+	// { .cmdlen = 8, .cmddn bata = {0xBF, 0x40, 0x81, 0x50, 0x00, 0x1A, 0xFC, 0x01} },
+
+	// { .cmdlen = 2, .cmddata = {0x36, 0x02} },
+{ .cmdlen =4, .cmddata = {0xFF,0x98,0x81,0x03} },
+{ .cmdlen = 2, .cmddata = {0x01,0x00} },
+{ .cmdlen = 2, .cmddata = {0x02,0x00} },
+{ .cmdlen = 2, .cmddata = {0x03,0x73} },
+{ .cmdlen = 2, .cmddata = {0x04,0x13} },
+{ .cmdlen = 2, .cmddata = {0x05,0x00} },
+{ .cmdlen = 2, .cmddata = {0x06,0x0A} },
+{ .cmdlen = 2, .cmddata = {0x07,0x05} },
+{ .cmdlen = 2, .cmddata = {0x11,0x00} },
+{ .cmdlen = 2, .cmddata = {0x09,0x28} },
+{ .cmdlen = 2, .cmddata = {0x0A,0x00} },
+{ .cmdlen = 2, .cmddata = {0x0B,0x00} },
+{ .cmdlen = 2, .cmddata = {0x0C,0x00} },
+{ .cmdlen = 2, .cmddata = {0x0D,0x28} },
+{ .cmdlen = 2, .cmddata = {0x0E,0x00} },
+{ .cmdlen = 2, .cmddata = {0x0F,0x28} },
+{ .cmdlen = 2, .cmddata = {0x10,0x28} },
+{ .cmdlen = 2, .cmddata = {0x11,0x00} },
+{ .cmdlen = 2, .cmddata = {0x12,0x00} },
+{ .cmdlen = 2, .cmddata = {0x13,0x00} },
+{ .cmdlen = 2, .cmddata = {0x14,0x00} },
+{ .cmdlen = 2, .cmddata = {0x15,0x00} },
+{ .cmdlen = 2, .cmddata = {0x16,0x00} },
+{ .cmdlen = 2, .cmddata = {0x17,0x00} },
+{ .cmdlen = 2, .cmddata = {0x18,0x00} },
+{ .cmdlen = 2, .cmddata = {0x19,0x00} },
+{ .cmdlen = 2, .cmddata = {0x1A,0x00} },
+{ .cmdlen = 2, .cmddata = {0x1B,0x00} },
+{ .cmdlen = 2, .cmddata = {0x1C,0x00} },
+{ .cmdlen = 2, .cmddata = {0x1D,0x00} },
+{ .cmdlen = 2, .cmddata = {0x1E,0x40} },
+{ .cmdlen = 2, .cmddata = {0x1F,0x80} },
+{ .cmdlen = 2, .cmddata = {0x20,0x06} },
+{ .cmdlen = 2, .cmddata = {0x21,0x01} },
+{ .cmdlen = 2, .cmddata = {0x22,0x00} },
+{ .cmdlen = 2, .cmddata = {0x23,0x00} },
+{ .cmdlen = 2, .cmddata = {0x24,0x00} },
+{ .cmdlen = 2, .cmddata = {0x25,0x00} },
+{ .cmdlen = 2, .cmddata = {0x26,0x00} },
+{ .cmdlen = 2, .cmddata = {0x27,0x00} },
+{ .cmdlen = 2, .cmddata = {0x28,0x33} },
+{ .cmdlen = 2, .cmddata = {0x29,0x33} },
+{ .cmdlen = 2, .cmddata = {0x2A,0x00} },
+{ .cmdlen = 2, .cmddata = {0x2B,0x00} },
+{ .cmdlen = 2, .cmddata = {0x2C,0x04} },
+{ .cmdlen = 2, .cmddata = {0x2D,0x0C} },
+{ .cmdlen = 2, .cmddata = {0x2E,0x05} },
+{ .cmdlen = 2, .cmddata = {0x2F,0x05} },
+{ .cmdlen = 2, .cmddata = {0x30,0x00} },
+{ .cmdlen = 2, .cmddata = {0x31,0x00} },
+{ .cmdlen = 2, .cmddata = {0x32,0x31} },
+{ .cmdlen = 2, .cmddata = {0x33,0x00} },
+{ .cmdlen = 2, .cmddata = {0x34,0x00} },
+{ .cmdlen = 2, .cmddata = {0x35,0x0A} },
+{ .cmdlen = 2, .cmddata = {0x36,0x00} },
+{ .cmdlen = 2, .cmddata = {0x37,0x08} },
+{ .cmdlen = 2, .cmddata = {0x70,0x00} },
+{ .cmdlen = 2, .cmddata = {0x39,0x00} },
+{ .cmdlen = 2, .cmddata = {0x3A,0x00} },
+{ .cmdlen = 2, .cmddata = {0x3B,0x00} },
+{ .cmdlen = 2, .cmddata = {0x3C,0x00} },
+{ .cmdlen = 2, .cmddata = {0x3D,0x00} },
+{ .cmdlen = 2, .cmddata = {0x3E,0x00} },
+{ .cmdlen = 2, .cmddata = {0x3F,0x00} },
+{ .cmdlen = 2, .cmddata = {0x40,0x00} },
+{ .cmdlen = 2, .cmddata = {0x41,0x00} },
+{ .cmdlen = 2, .cmddata = {0x42,0x00} },
+{ .cmdlen = 2, .cmddata = {0x43,0x08} },
+{ .cmdlen = 2, .cmddata = {0x44,0x00} },
+{ .cmdlen = 2, .cmddata = {0xA0,0x02} },
+{ .cmdlen = 2, .cmddata = {0x51,0x23} },
+{ .cmdlen = 2, .cmddata = {0x52,0x44} },
+{ .cmdlen = 2, .cmddata = {0x53,0x67} },
+{ .cmdlen = 2, .cmddata = {0x54,0x89} },
+{ .cmdlen = 2, .cmddata = {0x55,0xAB} },
+{ .cmdlen = 2, .cmddata = {0x56,0x01} },
+{ .cmdlen = 2, .cmddata = {0x57,0x23} },
+{ .cmdlen = 2, .cmddata = {0x58,0x45} },
+{ .cmdlen = 2, .cmddata = {0x59,0x67} },
+{ .cmdlen = 2, .cmddata = {0x5A,0x89} },
+{ .cmdlen = 2, .cmddata = {0x5B,0xAB} },
+{ .cmdlen = 2, .cmddata = {0x5C,0xCD} },
+{ .cmdlen = 2, .cmddata = {0x5D,0xEF} },
+{ .cmdlen = 2, .cmddata = {0x5E,0x11} },
+{ .cmdlen = 2, .cmddata = {0x5F,0x02} },
+{ .cmdlen = 2, .cmddata = {0x60,0x08} },
+{ .cmdlen = 2, .cmddata = {0x61,0x0E} },
+{ .cmdlen = 2, .cmddata = {0x62,0x0F} },
+{ .cmdlen = 2, .cmddata = {0x63,0x0C} },
+{ .cmdlen = 2, .cmddata = {0x64,0x0D} },
+{ .cmdlen = 2, .cmddata = {0x65,0x17} },
+{ .cmdlen = 2, .cmddata = {0x66,0x01} },
+{ .cmdlen = 2, .cmddata = {0x67,0x01} },
+{ .cmdlen = 2, .cmddata = {0x68,0x02} },
+{ .cmdlen = 2, .cmddata = {0x69,0x02} },
+{ .cmdlen = 2, .cmddata = {0x6A,0x00} },
+{ .cmdlen = 2, .cmddata = {0x6B,0x00} },
+{ .cmdlen = 2, .cmddata = {0x6C,0x02} },
+{ .cmdlen = 2, .cmddata = {0x6D,0x02} },
+{ .cmdlen = 2, .cmddata = {0x6E,0x16} },
+{ .cmdlen = 2, .cmddata = {0x6F,0x16} },
+{ .cmdlen = 2, .cmddata = {0x70,0x06} },
+{ .cmdlen = 2, .cmddata = {0x71,0x06} },
+{ .cmdlen = 2, .cmddata = {0x72,0x07} },
+{ .cmdlen = 2, .cmddata = {0x73,0x07} },
+{ .cmdlen = 2, .cmddata = {0x74,0x02} },
+{ .cmdlen = 2, .cmddata = {0x75,0x02} },
+{ .cmdlen = 2, .cmddata = {0x76,0x08} },
+{ .cmdlen = 2, .cmddata = {0x77,0x0E} },
+{ .cmdlen = 2, .cmddata = {0x78,0x0F} },
+{ .cmdlen = 2, .cmddata = {0x79,0x0C} },
+{ .cmdlen = 2, .cmddata = {0x7A,0x0D} },
+{ .cmdlen = 2, .cmddata = {0x7B,0x17} },
+{ .cmdlen = 2, .cmddata = {0x7C,0x01} },
+{ .cmdlen = 2, .cmddata = {0x7D,0x01} },
+{ .cmdlen = 2, .cmddata = {0x7E,0x02} },
+{ .cmdlen = 2, .cmddata = {0x7F,0x02} },
+{ .cmdlen = 2, .cmddata = {0x80,0x00} },
+{ .cmdlen = 2, .cmddata = {0x81,0x00} },
+{ .cmdlen = 2, .cmddata = {0x82,0x02} },
+{ .cmdlen = 2, .cmddata = {0x83,0x02} },
+{ .cmdlen = 2, .cmddata = {0x84,0x16} },
+{ .cmdlen = 2, .cmddata = {0x85,0x16} },
+{ .cmdlen = 2, .cmddata = {0x86,0x06} },
+{ .cmdlen = 2, .cmddata = {0x87,0x06} },
+{ .cmdlen = 2, .cmddata = {0x88,0x07} },
+{ .cmdlen = 2, .cmddata = {0x89,0x07} },
+{ .cmdlen = 2, .cmddata = {0x8A,0x02} },
+{ .cmdlen = 4, .cmddata = {0xFF,0x98,0x81,0x04} },
+{ .cmdlen = 2, .cmddata = {0x6E,0x1A} },
+{ .cmdlen = 2, .cmddata = {0x6F,0x37} },
+{ .cmdlen = 2, .cmddata = {0x3A,0xA4} },
+{ .cmdlen = 2, .cmddata = {0x8D,0x1F} },
+{ .cmdlen = 2, .cmddata = {0x87,0xBA} },
+{ .cmdlen = 2, .cmddata = {0xB2,0xD1} },
+{ .cmdlen = 2, .cmddata = {0x88,0x0B} },
+{ .cmdlen = 2, .cmddata = {0x38,0x01} },
+{ .cmdlen = 2, .cmddata = {0x39,0x00} },
+{ .cmdlen = 2, .cmddata = {0xB5,0x02} },
+{ .cmdlen = 2, .cmddata = {0x31,0x25} },
+{ .cmdlen = 2, .cmddata = {0x3B,0x98} },
+{ .cmdlen = 4, .cmddata = {0xFF,0x98,0x81,0x01} },
+{ .cmdlen = 2, .cmddata = {0x22,0x0A} },
+{ .cmdlen = 2, .cmddata = {0x31,0x00} },
+{ .cmdlen = 2, .cmddata = {0xA6,0xA6} },
+{ .cmdlen = 2, .cmddata = {0x55,0x3D} },
+{ .cmdlen = 2, .cmddata = {0x50,0x9E} },
+{ .cmdlen = 2, .cmddata = {0x51,0x99} },
+{ .cmdlen = 2, .cmddata = {0x60,0x06} },
+{ .cmdlen = 2, .cmddata = {0x62,0x20} },
+{ .cmdlen = 2, .cmddata = {0xA0,0x00} },
+{ .cmdlen = 2, .cmddata = {0xA1,0x17} },
+{ .cmdlen = 2, .cmddata = {0xA2,0x26} },
+{ .cmdlen = 2, .cmddata = {0xA3,0x13} },
+{ .cmdlen = 2, .cmddata = {0xA4,0x16} },
+{ .cmdlen = 2, .cmddata = {0xA5,0x29} },
+{ .cmdlen = 2, .cmddata = {0xA6,0x1E} },
+{ .cmdlen = 2, .cmddata = {0xA7,0x1F} },
+{ .cmdlen = 2, .cmddata = {0xA8,0x8B} },
+{ .cmdlen = 2, .cmddata = {0xA9,0x1D} },
+{ .cmdlen = 2, .cmddata = {0xAA,0x2A} },
+{ .cmdlen = 2, .cmddata = {0xAB,0x7B} },
+{ .cmdlen = 2, .cmddata = {0xAC,0x1A} },
+{ .cmdlen = 2, .cmddata = {0xAD,0x19} },
+{ .cmdlen = 2, .cmddata = {0xAE,0x4E} },
+{ .cmdlen = 2, .cmddata = {0xAF,0x24} },
+{ .cmdlen = 2, .cmddata = {0xB0,0x29} },
+{ .cmdlen = 2, .cmddata = {0xB1,0x4F} },
+{ .cmdlen = 2, .cmddata = {0xB2,0x5C} },
+{ .cmdlen = 2, .cmddata = {0xB3,0x3E} },
+{ .cmdlen = 2, .cmddata = {0xC0,0x00} },
+{ .cmdlen = 2, .cmddata = {0xC1,0x17} },
+{ .cmdlen = 2, .cmddata = {0xC2,0x26} },
+{ .cmdlen = 2, .cmddata = {0xC3,0x13} },
+{ .cmdlen = 2, .cmddata = {0xC4,0x16} },
+{ .cmdlen = 2, .cmddata = {0xC5,0x29} },
+{ .cmdlen = 2, .cmddata = {0xC6,0x1E} },
+{ .cmdlen = 2, .cmddata = {0xC7,0x1F} },
+{ .cmdlen = 2, .cmddata = {0xC8,0x8B} },
+{ .cmdlen = 2, .cmddata = {0xC9,0x1D} },
+{ .cmdlen = 2, .cmddata = {0xCA,0x2A} },
+{ .cmdlen = 2, .cmddata = {0xCB,0x7B} },
+{ .cmdlen = 2, .cmddata = {0xCC,0x1A} },
+{ .cmdlen = 2, .cmddata = {0xCD,0x19} },
+{ .cmdlen = 2, .cmddata = {0xCE,0x4E} },
+{ .cmdlen = 2, .cmddata = {0xCF,0x24} },
+{ .cmdlen = 2, .cmddata = {0xD0,0x29} },
+{ .cmdlen = 2, .cmddata = {0xD1,0x4D} },
+{ .cmdlen = 2, .cmddata = {0xD2,0x5C} },
+{ .cmdlen = 2, .cmddata = {0xD3,0x3E} },
+{ .cmdlen = 4, .cmddata = {0xFF,0x98,0x81,0x00} },
+{ .cmdlen = 2, .cmddata = {0x11,0x00} },
+{ .cmdlen = 2, .cmddata = {0x29,0x00} },
+{ .cmdlen = 2, .cmddata = {0x35,0x00} },
+{ .cmdlen = 2, .cmddata = {0x00,0x00} },
+};
+
+
+struct mj070bi30ia2_desc {
+	const struct mingjun_panel_cmd *on_cmds;
+	unsigned int on_cmds_num;
+	const struct display_timing *timing;
+};
+
+struct mj070bi30ia2_panel_priv {
+	struct udevice *backlight;
+	struct gpio_desc reset;
+	const struct mj070bi30ia2_desc *desc;
+};
+
+static const struct display_timing mj070bi30ia2_timing = {
+	.pixelclock.typ		= 75750000,
+	.hactive.typ		= 800,
+	.hfront_porch.typ	= 48,
+	.hback_porch.typ	= 80,
+	.hsync_len.typ		= 32,
+	.vactive.typ		= 1280,
+	.vfront_porch.typ	= 3,
+	.vback_porch.typ	= 24,
+	.vsync_len.typ		= 10,
+	.flags			= DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
+};
+
+static int mingjun_send_mipi_cmds(struct udevice *panel,
+					struct mingjun_panel_cmd *cmds)
+{
+	struct mipi_dsi_panel_plat *plat = dev_get_platdata(panel);
+	struct mipi_dsi_device *dsi = plat->device;
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
+	int ret;
+	int i;
+
+	for (i = 0; i < priv->desc->on_cmds_num; i++) {
+		ret = mipi_dsi_dcs_write_buffer(dsi,
+				&(cmds[i].cmddata[0]), cmds[i].cmdlen);
+		if (ret < 0)
+			return ret;
+	}
+	dev_info(dsi->dev, "%s: send initial instruction\n", __func__);
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_setup(struct udevice *panel)
+{
+	int ret;
+	u8 power_mode;
+	const struct mj070bi30ia2_instr *instr;
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
+	struct mipi_dsi_panel_plat *plat = dev_get_platdata(panel);
+	struct mipi_dsi_device *dsi = plat->device;
+
+	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	/* sanity test for connection */
+	ret = mipi_dsi_dcs_get_power_mode(dsi, &power_mode);
+	if (ret) {
+		dev_warn(dsi->dev, "%s: failed to get power mode: %d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_prepare(struct udevice *panel)
+{
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
+	int ret;
+
+	/* reset panel */
+	ret = dm_gpio_set_value(&priv->reset, true);
+	if (ret)
+		return ret;
+	mdelay(1);
+
+	ret = dm_gpio_set_value(&priv->reset, false);
+	if (ret)
+		return ret;
+	mdelay(10);
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_enable(struct udevice *panel)
+{
+	int ret;
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
+	struct mipi_dsi_panel_plat *plat = dev_get_platdata(panel);
+	struct mipi_dsi_device *dsi = plat->device;
+
+	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	ret = mingjun_send_mipi_cmds(panel, priv->desc->on_cmds);
+	if (ret < 0) {
+		dev_err(panel->dev, "failed to send DCS Init Code: %d\n", ret);
+		return ret;
+	}
+
+	ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+	if (ret)
+		return ret;
+
+	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+	if (ret)
+		return ret;
+
+	mdelay(10);
+
+	ret = mipi_dsi_dcs_set_display_on(dsi);
+	if (ret)
+		return ret;
+
+#if 0
+	ret = backlight_enable(priv->backlight);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_enable_backlight(struct udevice *dev)
+{
+	int ret;
+	struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+	struct mipi_dsi_device *device = plat->device;
+
+	ret = mipi_dsi_attach(device);
+	if (ret < 0)
+		return ret;
+
+	ret = mj070bi30ia2_panel_setup(dev);
+	if (ret)
+		return ret;
+
+	ret = mj070bi30ia2_panel_enable(dev);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_get_display_timing(struct udevice *dev,
+					     struct display_timing *timings)
+{
+	struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
+	struct mipi_dsi_device *device = plat->device;
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(dev);
+
+	memcpy(timings, priv->desc->timing, sizeof(*timings));
+
+	device->lanes	= 4;
+	device->format	= MIPI_DSI_FMT_RGB888;
+	device->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST;
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_ofdata_to_platdata(struct udevice *dev)
+{
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0,
+			&priv->reset, GPIOD_IS_OUT);
+	if (ret) {
+		dev_err(dev, "Warning: cannot get reset GPIO\n");
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+					   "backlight", &priv->backlight);
+	if (ret) {
+		dev_err(dev, "Cannot get backlight: ret=%d\n", ret);
+	}
+
+	/* TODO: get lanes, format and mode from dtb */
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_probe(struct udevice *panel)
+{
+	int ret;
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
+
+	priv->desc = (const struct mj070bi30ia2_desc *)dev_get_driver_data(panel);
+
+	/* prepare_panel */
+	ret = mj070bi30ia2_panel_prepare(panel);
+	if (ret) {
+		dev_err(panel, "failed to prepare panel : %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int mj070bi30ia2_panel_remove(struct udevice *panel)
+{
+	struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
+
+	return dm_gpio_set_value(&priv->reset, true);
+}
+
+static const struct mj070bi30ia2_desc mj070bi30ia2_desc = {
+	.on_cmds = mingjun_on_cmds,
+	.on_cmds_num = ARRAY_SIZE(mingjun_on_cmds),
+        .timing = &mj070bi30ia2_timing,
+};
+
+static const struct panel_ops mj070bi30ia2_panel_ops = {
+	.enable_backlight	= mj070bi30ia2_panel_enable_backlight,
+	.get_display_timing	= mj070bi30ia2_panel_get_display_timing,
+};
+
+static const struct udevice_id mj070bi30ia2_panel_ids[] = {
+	{ .compatible = "mingjun,mj070bi30ia2", .data = (ulong)&mj070bi30ia2_desc },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(mj070bi30ia2_panel) = {
+	.name 			  = "mj070bi30ia2_panel",
+	.id			  = UCLASS_PANEL,
+	.of_match		  = mj070bi30ia2_panel_ids,
+	.ops			  = &mj070bi30ia2_panel_ops,
+	.ofdata_to_platdata	  = mj070bi30ia2_panel_ofdata_to_platdata,
+	.probe			  = mj070bi30ia2_panel_probe,
+	.remove			  = mj070bi30ia2_panel_remove,
+	.platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat),
+	.priv_auto_alloc_size	  = sizeof(struct mj070bi30ia2_panel_priv),
+};

include/configs/light-c910.h

@@ -135,539 +135,53 @@
 /*public bootargs in mostly boards, make env 'set_booargs' shorter and clean */
 #define ENV_PUBLIC_BOOTARGS "pub_bootargs=rootfstype=ext4 rdinit=/sbin/init rootwait rw earlycon clk_ignore_unused\0"
 
-/* Define board ID in ENV for firmware download protection */
-#if defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_A) || \
-    defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || \
-    defined(CONFIG_TARGET_LIGHT_FM_C910_VAL_A)
-#define ENV_STR_BOARD "board#=LA\0"
-#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_B) || \
-      defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || \
-      defined(CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
-#define ENV_STR_BOARD "board#=LB\0"
-#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_LPI4A) || \
-      defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A) || \
-      defined(CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
+#define CONFIG_MISC_INIT_R
+
 #define ENV_STR_BOARD "board#=LP\0"
-#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_BEAGLE) || \
-      defined(CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
-#define ENV_STR_BOARD "board#=LG\0"
-#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_ANT_REF) || \
-      defined(CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || \
-      defined(CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF)
-#define ENV_STR_BOARD "board#=LD\0"
-#endif
 
-
-#if defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A)
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-    ENV_STR_BOARD \
-	"tf_addr=0x100000\0" \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
 	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
+	"fdt_addr_r=0x03800000\0" \
+	"fdtoverlay_addr_r=0x03700000\0" \
+	"initrd_high=0x1a000000\0" \
+	"kernel_addr_r=0x00200000\0" \
+	"ramdisk_addr_r=0x06000000\0" \
+	"boot_conf_addr_r=0xc0000000\0" \
 	"aon_ram_addr=0xffffef8000\0" \
 	"audio_ram_addr=0x32000000\0" \
 	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"tee_addr=0x1c000000\0" \
-	"sec_upgrade_mode=0\0"\
-	"mmcdev=0\0" \
-	"mmcpart=8\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"sbmeta_security_level=1\0" \
-	"uboot_version=0x0000000000000000\0"\
-	"tee_version=0x00000000\0"\
-	"tf_version=0x00000000\0"\
-	"sbmeta_version=0x00000000\0"\
-	"fdt_file=th1520-a-val-sec.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=sbmeta,size=8MiB,type=boot;name=swap,size=1536MiB,type=boot;name=fastresume,size=512MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf} ${resume_bootargs}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio;ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:3 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; chk_hibernate; fixup_memory_region; bootslave; run finduuid; run set_bootargs; sbmetaboot;run load_str;booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-
-#elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B)
-#define CONFIG_EXTRA_ENV_SETTINGS \
+	"opensbi_addr=0x0\0" \
+	"fwaddr=0x10000000\0" \
 	"splashimage=0x30000000\0" \
 	"splashpos=m,m\0" \
 	"fdt_high=0xffffffffffffffff\0" \
-    ENV_STR_BOARD \
-	"tf_addr=0x100000\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"tee_addr=0x1c000000\0" \
-	"sec_upgrade_mode=0\0"\
-	"mmcdev=0\0" \
-	"mmcpart=6\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"sbmeta_security_level=1\0" \
-	"uboot_version=0x0000000000000000\0"\
-	"tee_version=0x00000000\0"\
-	"tf_version=0x00000000\0"\
-	"sbmeta_version=0x00000000\0"\
-	"fdt_file=th1520-b-product-sec.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=sbmeta,size=8MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:3 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; fixup_memory_region; bootslave; run finduuid; run set_bootargs; sbmetaboot; run load_str;booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-
-#elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-    ENV_STR_BOARD \
-	"tf_addr=0x100000\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"tee_addr=0x1c000000\0" \
-	"sec_upgrade_mode=0\0"\
-	"mmcdev=0\0" \
-	"mmcpart=6\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"uboot_version=0x0000000000000000\0"\
-	"tee_version=0x00000000\0"\
-	"tf_version=0x00000000\0"\
-	"fdt_file=th1520-ant-ref-sec.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tf,size=50MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio;run load_str; ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:4 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; fixup_memory_region; bootslave; run finduuid; run set_bootargs; secboot; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-
-#elif defined (CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-    ENV_STR_BOARD \
-	"tf_addr=0x100000\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"tee_addr=0x1c000000\0" \
-	"sec_upgrade_mode=0\0"\
-	"mmcdev=0\0" \
-	"mmcpart=8\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"sbmeta_security_level=1\0" \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"uboot_version=0x0000000000000000\0"\
-	"tee_version=0x00000000\0"\
-	"tf_version=0x00000000\0"\
-	"sbmeta_version=0x00000000\0"\
-	"fdt_file=th1520-lpi4a-product-sec.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=tee,size=50MiB,type=boot;name=stash,size=50MiB,type=boot;name=sbmeta,size=8MiB,type=boot;name=swap,size=1536MiB,type=boot;name=fastresume,size=512MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf} ${resume_bootargs}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio;ext4load mmc 0:3 $tf_addr trust_firmware.bin; ext4load mmc 0:3 $tee_addr tee.bin;ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; chk_hibernate; fixup_memory_region; bootslave; run finduuid; run set_bootargs; sbmetaboot; run load_str;booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-
-#elif defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_A) || defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_B) || \
-      defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_LPI4A) || defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_VAL_BEAGLE) || \
-      defined(CONFIG_LIGHT_ANDROID_BOOT_IMAGE_ANT_REF)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	ENV_STR_SERIAL \
 	ENV_STR_BOARD \
-	"tf_addr=0x0\0" \
-	"tee_addr=0x1c000000\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"ramdisk_addr=0x02000000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"fwaddr=0x10000000\0"\
-	"boot_ab=_a\0"\
-	"sb_emulater=1\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
+	"kernel_addr_r=0x00200000\0" \
+	"kdump_buf=180M\0" \
+	"boottype=mmc\0" \
 	"mmcbootpart=2\0" \
-	"mmcteepart=8\0" \
-	ENV_KERNEL_LOGLEVEL \
-	ENV_KERNEL_KDUMP \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=light-val.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=sparse,size=2031kb;name=bootpart_a,size=16MiB;name=bootpart_b,size=16MiB;name=boot_a,size=32MiB;name=boot_b,size=32MiB;name=vendor_boot_a,size=32MiB;name=vendor_boot_b,size=32MiB;name=tee_a,size=32MiB;name=tee_b,size=32MiB;name=dtbo_a,size=8MiB;name=dtbo_b,size=8MiB;name=super,size=4096MiB;name=vbmeta_a,size=1MiB;name=vbmeta_b,size=1MiB;name=vbmeta_system_a,size=1MiB;name=vbmeta_system_b,size=1MiB;name=misc,size=2MiB;name=metadata,size=16MiB;name=userdata,size=-\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 earlycon clk_ignore_unused loop.max_part=7 loglevel=${kernel_loglevel} crashkernel=${kdump_buf} init=/init bootconfig video=HDMI-A-1:800x600-32@60 firmware_class.path=/vendor/firmware androidboot.serialno=${serial#}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"sec_m_load=ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin\0"\
-	"bootcmd_load=bootandroid;secimg_load;run sec_m_load;run load_aon;run load_c906_audio;fdt addr ${dtb_addr};fdt resize 100;fdt chosen;\0" \
-	"bootcmd=run bootcmd_load; fixup_memory_region; bootslave; run finduuid; run set_bootargs; bootm $kernel_addr $ramdisk_addr:$ramdisk_size $dtb_addr;\0" \
-         "\0"
+	"default_mmcdev=1\0" \
+	"emmc_dev=0\0" \
+	"sdcard_dev=1\0" \
+	"mmc_select=if test -e ${boottype} ${default_mmcdev}:${mmcbootpart} ${boot_conf_file}; then mmcdev=1; else mmcdev=0; fi;\0" \
+	"kernel_comp_addr_r=0x20000000\0" \
+	"kernel_comp_size=0x08000000\0" \
+	"boot_conf_file=/extlinux/extlinux.conf\0" \
+	"uuid_rootfsA=80a5a8e9-c744-491a-93c1-4f4194fd690a\0" \
+	"uuid_swap=5ebcaaf0-e098-43b9-beef-1f8deedd135e\0" \
+	"partitions=name=table,size=2031KB;name=boot,size=500MiB,type=boot;name=swap,size=4096MiB,type=swap,uuid=${uuid_swap};name=root,size=-,type=linux,uuid=${uuid_rootfsA}\0" \
+	"gpt_partition=gpt write mmc ${emmc_dev} $partitions\0" \
+	"sdcard_gpt_partition=gpt write mmc ${sdcard_dev} $partitions\0" \
+	"load_aon=load ${boottype} ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0" \
+	"load_c906_audio=load ${boottype} ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0" \
+	"load_str=load ${boottype} ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0" \
+	"load_opensbi=load ${boottype} ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin\0" \
+	"load_usb=usb start; load usb ${mmcdev}:${mmcbootpart} ${boot_conf_addr_r} ${boot_conf_file}; if test -e usb ${mmcdev}:${mmcbootpart} ${boot_conf_file}; then setenv boottype usb; fi;\0" \
+	"bootcmd_load=run load_usb; run mmc_select; run load_aon; run load_c906_audio; run load_str; run load_opensbi\0" \
+	"bootcmd=run bootcmd_load; chk_hibernate; fixup_memory_region; bootslave; sysboot ${boottype} ${mmcdev}:${mmcbootpart} any $boot_conf_addr_r $boot_conf_file;\0" \
+	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+	"\0"
 
-#else
-#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_A)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-    ENV_STR_BOARD \
-	"mmcdev=0\0" \
-	"mmcpart=5\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-a-product.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=swap,size=1536MiB,type=boot;name=fastresume,size=512MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf} ${resume_bootargs}\0" \
-	"load_aon=ext4load mmc 0:2 $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc 0:2 $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc 0:2 $opensbi_addr fw_dynamic.bin; ext4load mmc 0:2 $dtb_addr ${fdt_file}; ext4load mmc 0:2 $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-b-product.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file};ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image;\0" \
-	"bootcmd=run bootcmd_load; fixup_memory_region; bootslave ; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-b-ref.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file};ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image;\0" \
-	"bootcmd=run bootcmd_load; bootslave ; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-b-power.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-ant-ref.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; fixup_memory_region; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-ant-discrete.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-beagle.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; fixup_memory_region; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=5\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-lpi4a-product.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=swap,size=1536MiB,type=boot;name=fastresume,size=512MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf} ${resume_bootargs}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; chk_hibernate; fixup_memory_region; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#elif defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF)
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=3\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-a-ref.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#else
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"splashimage=0x30000000\0" \
-	"splashpos=m,m\0" \
-	"fdt_high=0xffffffffffffffff\0" \
-	"opensbi_addr=0x0\0" \
-	"dtb_addr=0x03800000\0" \
-	"kernel_addr=0x00200000\0" \
-	"aon_ram_addr=0xffffef8000\0" \
-	"audio_ram_addr=0x32000000\0" \
-	"str_ram_addr=0xffe0000000\0" \
-	"fwaddr=0x10000000\0"\
-	"mmcdev=0\0" \
-	"mmcpart=5\0" \
-	"mmcbootpart=2\0" \
-	ENV_KERNEL_LOGLEVEL \
-	"kdump_buf=180M\0" \
-	ENV_STR_BOOT_DELAY \
-	"fdt_file=th1520-a-val.dtb\0" \
-	"uuid_rootfs=80a5a8e9-c744-491a-93c1-4f4194fd690b\0" \
-	"partitions=name=table,size=2031KB;name=boot,size=200MiB,type=boot;name=swap,size=1536MiB,type=boot;name=fastresume,size=512MiB,type=boot;name=root,size=-,type=linux,uuid=${uuid_rootfs}\0" \
-	"finduuid=part uuid mmc ${mmcdev}:${mmcpart} uuid\0" \
-	"gpt_partition=gpt write mmc ${mmcdev} $partitions\0" \
-	ENV_PUBLIC_BOOTARGS \
-	"set_bootargs=setenv bootargs console=ttyS0,115200 root=PARTUUID=${uuid} ${pub_bootargs} loglevel=${kernel_loglevel} eth=$ethaddr crashkernel=${kdump_buf} ${resume_bootargs}\0" \
-	"load_aon=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_aon_fpga.bin;cp.b $fwaddr $aon_ram_addr $filesize;bootaon\0"\
-	"load_c906_audio=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr light_c906_audio.bin;cp.b $fwaddr $audio_ram_addr $filesize\0"\
-	"load_str=ext4load mmc ${mmcdev}:${mmcbootpart} $fwaddr str.bin;cp.b $fwaddr $str_ram_addr $filesize\0"\
-	"bootcmd_load=run load_aon;run load_c906_audio; run load_str; ext4load mmc ${mmcdev}:${mmcbootpart} $opensbi_addr fw_dynamic.bin; ext4load mmc ${mmcdev}:${mmcbootpart} $dtb_addr ${fdt_file}; ext4load mmc ${mmcdev}:${mmcbootpart} $kernel_addr Image\0" \
-	"bootcmd=run bootcmd_load; chk_hibernate; fixup_memory_region; bootslave; run finduuid; run set_bootargs; booti $kernel_addr - $dtb_addr;\0" \
-        "\0"
-#endif
-#endif
 #endif /* __CONFIG_H */

include/extension_board.h

@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2021
+ * Köry Maincent, Bootlin, <kory.maincent@bootlin.com>
+ */
+
+#ifndef __EXTENSION_SUPPORT_H
+#define __EXTENSION_SUPPORT_H
+
+struct extension {
+	struct list_head list;
+	char name[32];
+	char owner[32];
+	char version[32];
+	char overlay[32];
+	char other[32];
+};
+
+/**
+ * extension_board_scan - Add system-specific function to scan extension board.
+ * @param extension_list	List of extension board information to update.
+ * @return the number of extension.
+ *
+ * This function is called if CONFIG_CMD_EXTENSION is defined.
+ * Needs to fill the list extension_list with elements.
+ * Each element need to be allocated to an extension structure.
+ *
+ */
+int extension_board_scan(struct list_head *extension_list);
+
+#endif /* __EXTENSION_SUPPORT_H */

include/fdt_support.h

@@ -326,6 +326,8 @@ int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
 
 int fdt_overlay_apply_verbose(void *fdt, void *fdto);
 
+int fdt_valid(struct fdt_header **blobp);
+
 /**
  * fdt_get_cells_len() - Get the length of a type of cell in top-level nodes
  *

test/py/tests/test_extension.py

@@ -0,0 +1,53 @@
+# SPDX-License-Identifier:  GPL-2.0+
+# Copyright (c) 2020
+# Author: Kory Maincent <kory.maincent@bootlin.com>
+
+# Test U-Boot's "extension" commands.
+
+import os
+import pytest
+import u_boot_utils
+
+overlay_addr = 0x1000
+
+SANDBOX_DTB='arch/sandbox/dts/sandbox.dtb'
+OVERLAY_DIR='arch/sandbox/dts/'
+
+def load_dtb(u_boot_console):
+    u_boot_console.log.action('Loading devicetree to RAM...')
+    u_boot_console.run_command('host load hostfs - $fdt_addr_r %s' % (os.path.join(u_boot_console.config.build_dir, SANDBOX_DTB)))
+    u_boot_console.run_command('fdt addr $fdt_addr_r')
+
+@pytest.mark.buildconfigspec('cmd_fdt')
+@pytest.mark.boardspec('sandbox')
+def test_extension(u_boot_console):
+    """Test the 'extension' command."""
+
+    load_dtb(u_boot_console)
+
+    output = u_boot_console.run_command('extension list')
+    assert('No extension' in output)
+
+    output = u_boot_console.run_command('extension scan')
+    assert output == 'Found 2 extension board(s).'
+
+    output = u_boot_console.run_command('extension list')
+    assert('overlay0.dtbo' in output)
+    assert('overlay1.dtbo' in output)
+
+    u_boot_console.run_command_list([
+        'setenv extension_overlay_addr %s' % (overlay_addr),
+        'setenv extension_overlay_cmd \'host load hostfs - ${extension_overlay_addr} %s${extension_overlay_name}\'' % (os.path.join(u_boot_console.config.build_dir, OVERLAY_DIR))])
+
+    output = u_boot_console.run_command('extension apply 0')
+    assert('bytes read' in output)
+
+    output = u_boot_console.run_command('fdt print')
+    assert('button3' in output)
+
+    output = u_boot_console.run_command('extension apply all')
+    assert('bytes read' in output)
+
+    output = u_boot_console.run_command('fdt print')
+    assert('button4' in output)
+