Godzil
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1d928e7091
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Merge branch 'udev' into develop
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2013-10-06 14:52:40 +01:00 |
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Maximilian Rehkopf
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9fbe61bad1
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FPGA: Use internal clock instead of SNES master clock for $213F RMW timing
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2012-07-09 02:18:28 +02:00 |
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Maximilian Rehkopf
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c231c8b821
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FPGA: misc cleanup
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2012-07-09 02:15:21 +02:00 |
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Maximilian Rehkopf
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7df6909266
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FPGA: rework shared memory access FSM
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2012-07-09 02:12:59 +02:00 |
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Maximilian Rehkopf
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006ea8c44a
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FPGA: debug wires
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2012-07-09 02:03:59 +02:00 |
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Maximilian Rehkopf
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8148f5567c
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FPGA: properly synchronize external signals
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2012-07-09 01:48:43 +02:00 |
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Maximilian Rehkopf
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e33b2b2bc7
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FPGA: simple SNES address input filtering
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2012-07-09 01:37:57 +02:00 |
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Maximilian Rehkopf
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3530613349
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FPGA: prepare new SNES command interface for future use (SNES side)
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2012-07-09 01:29:47 +02:00 |
|
ikari
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059966f06a
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FPGA/Cx4: optimize non-sector-aligned SD DMA reads
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2012-01-14 02:21:01 +01:00 |
|
ikari
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3243143c39
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FPGA/Cx4: region override (patch register $213f)
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2012-01-14 02:19:39 +01:00 |
|
ikari
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1987968db2
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FPGA/cx4: clean up tab/whitespace mix
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2011-11-01 21:09:31 +01:00 |
|
ikari
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ecd75210a9
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FPGA/cx4: fix memory sharing
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2011-11-01 20:55:59 +01:00 |
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ikari
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314da586a4
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FPGA/cx4: implement reset vector access
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2011-11-01 20:54:07 +01:00 |
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ikari
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7643790fed
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FPGA/Cx4: fully operational except reset vector area
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2011-10-30 01:54:39 +02:00 |
|
ikari
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8c76dfbeb6
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FPGA/Cx4: WIP
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2011-10-27 15:42:13 +02:00 |
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ikari
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e57c4aa450
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FPGA/cx4: initial commit
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2011-10-23 04:10:55 +02:00 |
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