62 Commits

Author SHA1 Message Date
ikari
e85ac8c0be utils: update graphics conversion tools 2012-02-29 22:13:50 +01:00
ikari
ca5cbfd785 Update changelog for version 0.1.3 2012-02-29 22:12:52 +01:00
ikari
c9099f0aac PCB: Finalize Rev.E2 2012-02-29 22:12:02 +01:00
ikari
53d7167630 PCB/Rev.E: minor updates 2012-02-29 22:11:10 +01:00
ikari
17286a3075 Changelog: add missing change from v0.1.2 2012-02-29 22:05:32 +01:00
ikari
7820db7329 firmware: update version to 0.1.3 2012-02-29 22:04:03 +01:00
ikari
d88fbb6124 firmware/timer: move constants to header files 2012-02-29 22:03:37 +01:00
ikari
424e1642ea firmware/SD: explicitly pull up SD clock line 2012-02-29 22:02:25 +01:00
ikari
e3f0e9fcc9 firmware/SD: reduce response timeout 2012-02-29 22:01:54 +01:00
ikari
40a4979c32 firmware/SD: only complain about invalid sector buffer when offloading is disabled 2012-02-29 21:58:35 +01:00
ikari
d00b072e5f firmware: query reset button in timer ISR 2012-02-29 21:58:15 +01:00
ikari
3ecf4954a0 firmware: add some FPGA sanity checks; fix led_panic behavior 2012-02-29 21:54:48 +01:00
ikari
4904dfe464 firmware: add some debug messages 2012-02-29 21:53:54 +01:00
ikari
39f1548dbd firmware: add feature to run previously loaded file 2012-02-29 21:52:35 +01:00
ikari
37f725b5ea menu: change abort code for sysinfo 2012-02-29 21:49:45 +01:00
ikari
aabf0557af menu: remove unused screen setup code 2012-02-29 21:49:31 +01:00
ikari
e840524bdd menu: auto-scroll file names that do not fit screen 2012-02-29 21:48:49 +01:00
ikari
4a6b86341e menu: add feature to run previously loaded file 2012-02-29 21:46:45 +01:00
ikari
d3fc44f93d menu/clock set: fix memory access 2012-02-28 16:36:24 +01:00
ikari
349e209284 menu: adjust menu layout + new artwork 2012-02-28 16:35:09 +01:00
ikari
d0422005d0 menu: store font only once, generate tilemap instead of storing it 2012-02-28 16:33:22 +01:00
ikari
8e7f77e49b FPGA/cx4: map ROM above bank 3F/BF 2012-02-27 22:14:19 +01:00
ikari
e2f33c28c9 FPGA: pull-up SD clock 2012-02-27 22:12:35 +01:00
ikari
7eb65e35ce bootldr: properly chain from vector table entry 2012-02-27 12:43:50 +01:00
ikari
8d015f8080 menu: add missing file sysinfo.a65 2012-02-24 18:02:03 +01:00
ikari
8c0ca0ea05 PCB: update Rev.E assembly diagrams 2012-01-14 23:35:14 +01:00
ikari
f0a2e85c65 FPGA: updated project files 2012-01-14 23:16:57 +01:00
ikari
86a81bfa82 PCB: Rev.E2 WIP 2012-01-14 23:13:38 +01:00
ikari
cb859f3bfb Firmware: add SD debugging message 2012-01-14 23:12:45 +01:00
ikari
a79a538560 update changelog 2012-01-14 23:08:12 +01:00
ikari
da2386e453 Firmware/MSU1: stop DAC at end of audio file 2012-01-14 12:18:13 +01:00
ikari
b8f4c9b584 Firmware: optimize non-sector-aligned SD DMA reads (bugfix) 2012-01-14 11:58:20 +01:00
ikari
d7ad740843 FPGA/Cx4: add missing file main.ucf 2012-01-14 02:25:34 +01:00
ikari
2d89eb8000 SNES menu: swap A and B buttons 2012-01-14 02:23:43 +01:00
ikari
d139fdb40c SNES menu: helper script for map creation 2012-01-14 02:22:42 +01:00
ikari
059966f06a FPGA/Cx4: optimize non-sector-aligned SD DMA reads 2012-01-14 02:21:01 +01:00
ikari
3243143c39 FPGA/Cx4: region override (patch register $213f) 2012-01-14 02:19:39 +01:00
ikari
a50522b4e9 FPGA: optimize non-sector-aligned SD DMA reads 2012-01-14 01:22:38 +01:00
ikari
eefcc712ca FPGA: add RAM1 pinout to user constraints 2012-01-14 01:21:40 +01:00
ikari
5a3e935a3e FPGA: region override (patch register $213f) 2012-01-14 01:21:21 +01:00
ikari
5f87768a14 Firmware: remove unnecessary crc16.c from Makefile 2012-01-14 01:17:59 +01:00
ikari
3436ccf46a Firmware: improve map detection 2012-01-14 01:17:20 +01:00
ikari
03ee71a626 Firmware/MSU1: add debug macros before logging statements 2012-01-14 01:14:37 +01:00
ikari
b272a6fc1c Firmware: optimize non-sector-aligned SD DMA reads 2012-01-14 01:13:36 +01:00
ikari
afc26397b1 Firmware: region override (patch register $213f) 2012-01-14 01:10:13 +01:00
ikari
3506cb0ba2 Firmware/bootldr: size reduction and stability measures 2012-01-14 01:05:15 +01:00
ikari
52d5fc9e92 PCB Rev.E: update BOM (RA103, RA104 final) 2012-01-13 13:39:24 +01:00
ikari
cbe30cb388 PCB Rev.E: update BOM (-> RA103, RA104 pending) 2012-01-10 23:59:33 +01:00
ikari
a52638b4be Firmware: update version number to 0.1.2 2012-01-02 23:36:42 +01:00
ikari
22fe28c624 SNES: insert debug marker 2012-01-02 23:34:45 +01:00
ikari
2c14c3f925 SNES: fix crash on empty database 2012-01-02 23:34:31 +01:00
ikari
fec9004dc1 SNES: display system information (new menu entry) 2012-01-02 23:33:24 +01:00
ikari
97aef4a2d3 Firmware: gather+display system information 2012-01-02 23:31:40 +01:00
ikari
6d28f3fb51 PCB: very basic solder paste pad reduction script 2011-12-27 10:31:39 +01:00
ikari
1585032c5a PCB: Rev.E2 (replace elusive Micrel regulator) 2011-12-27 01:56:24 +01:00
ikari
a7c1a29f10 add changelog 2011-12-24 23:06:28 +01:00
ikari
90b91583a1 Firmware: use FatFS FASTSEEK option for MSU1 file access 2011-12-19 22:32:27 +01:00
ikari
20c2cdb961 Firmware/bootloader: add 'fresh' Makefile target (erase+program) 2011-12-19 22:29:19 +01:00
ikari
dc01edfe9a FPGA: add test suite 2011-12-19 22:26:09 +01:00
ikari
014cf46a69 SNES: add test suite (SNES side) 2011-12-19 22:22:51 +01:00
ikari
0a6c7f125b Firmware: add test suite 2011-12-19 22:17:49 +01:00
ikari
72642321a2 SuperCIC/key: fix unreliable pair mode entry (sync with lock) 2011-12-18 18:41:00 +01:00
187 changed files with 69912 additions and 34849 deletions

40
CHANGELOG Normal file
View File

@@ -0,0 +1,40 @@
v0.1.1
======
* initial public release
v0.1.1a (bugfix release)
========================
* Fixes:
- SuperCIC pair mode was erroneously enabled in firmware binary
- SNES menu crashed on empty database
v0.1.2
======
* New menu entry: "System Information"
* Auto region override (eliminate "This game pak is not designed..." messages)
* Improved mapper detection (fixes Batman vs. Joker and many PD ROMs)
* Improved data streaming performance
(should reduce MSU1 errors with some cards)
* A and B buttons swapped in menu to match common key mappings
* Fixes:
- MSU1: Stop audio playback on end of audio file
v0.1.3
======
* Updated logo gfx with new version from klaptra
* Updated font to distinguish between 1 and I
* Menu layout adjusted to move status line up by 4 scanlines
* Run previously loaded game by pressing Start in the menu
* Auto-scroll file names that do not fit the screen
* SD access time measurement on System Information screen (takes a while!)
* Cx4 memory map: mirror ROM to 40-7e/c0-ff (fixes MMX3 Zero patch)
* Some FPGA configuration error detection (mainly useful for hardware diag)
* Fixes:
- FPGA-side SD clock pullup (increases reliability with some cards)

View File

@@ -64,6 +64,7 @@ processor p12f629
; 0x4d buffer for eeprom access
; 0x4e loop variable for longwait
; 0x4f loop variable for wait
; 0x5c GPIO buffer variable for pair mode allow
; 0x5d 0: SuperCIC pair mode available flag
; 0x5e SuperCIC pair mode detect (phase 1)
; 0x5f SuperCIC pair mode detect (phase 2)
@@ -90,8 +91,8 @@ isr
clrf 0x5f ; clear pair mode detect
bsf 0x5f, 1 ;
clrf 0x5d ; clear pair mode available
nop
nop
clrf 0x5c ; clear pair mode allow buffer
bsf 0x5c, 3 ; assume disallow
bsf INTCON, 7 ; re-enable interrupts (ISR will continue as main)
goto main
init
@@ -296,8 +297,8 @@ swapskip
; indirect access, no post increment, etc.
mangle
call mangle_lock
nop
nop
movf GPIO, w ; buffer GPIO state
movwf 0x5c ; for pair mode "transaction"
mangle_key
movf 0x2f, w
movwf 0x20
@@ -459,7 +460,7 @@ mangle_key_withskip
;-------pair mode code-------
bcf GPIO, 0
movf GPIO, w
btfss GPIO, 3
btfss 0x5c, 3
bsf GPIO, 0
movwf 0x5e
movf GPIO, w
@@ -642,7 +643,7 @@ mangle_lock_withskip
goto scic_pair_skip1
btfsc 0x5f, 1
goto scic_pair_skip2
btfsc GPIO, 3
btfsc 0x5c, 3
goto scic_pair_skip3
goto supercic_pairmode
scic_pair_skip1

View File

@@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 02 Dec 2011 09:50:04 AM CET
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:06 PM CET
LIBS:power
LIBS:device
LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A3 16535 11700
encoding utf-8
Sheet 6 6
Title "sd2snes Mark II"
Date "2 dec 2011"
Date "9 dec 2011"
Rev "C"
Comp "Maximilian Rehkopf"
Comment1 ""

View File

@@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 02 Dec 2011 09:50:04 AM CET
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:06 PM CET
LIBS:power
LIBS:device
LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
encoding utf-8
Sheet 4 6
Title "sd2snes Mark II"
Date "2 dec 2011"
Date "9 dec 2011"
Rev "C"
Comp "Maximilian Rehkopf"
Comment1 ""

View File

@@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 02 Dec 2011 09:50:04 AM CET
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:05 PM CET
LIBS:power
LIBS:device
LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
encoding utf-8
Sheet 3 6
Title "sd2snes Mark II"
Date "2 dec 2011"
Date "9 dec 2011"
Rev "C"
Comp "Maximilian Rehkopf"
Comment1 ""
@@ -322,7 +322,7 @@ L R R513
U 1 1 4BF2FDAC
P 9150 5700
F 0 "R513" V 9230 5700 50 0000 C CNN
F 1 "1k" V 9150 5700 50 0000 C CNN
F 1 "100k" V 9150 5700 50 0000 C CNN
F 2 "SM0805_FIXEDMASK" H 9150 5700 60 0001 C CNN
1 9150 5700
1 0 0 -1

View File

@@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 02 Dec 2011 09:50:04 AM CET
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:06 PM CET
LIBS:power
LIBS:device
LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
encoding utf-8
Sheet 5 6
Title "sd2snes Mark II"
Date "2 dec 2011"
Date "9 dec 2011"
Rev "C"
Comp "Maximilian Rehkopf"
Comment1 ""

Binary file not shown.

Before

Width:  |  Height:  |  Size: 351 KiB

After

Width:  |  Height:  |  Size: 270 KiB

Binary file not shown.

Before

Width:  |  Height:  |  Size: 447 KiB

After

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@@ -1,4 +1,4 @@
PCBNEW-BOARD Version 1 date Sat 12 Nov 2011 04:56:02 PM CET
PCBNEW-BOARD Version 1 date Mon 30 Jan 2012 04:25:38 PM CET
# Created by Pcbnew(2011-07-02 BZR 2664)-stable
@@ -9,8 +9,8 @@ Ly 1FFF8001
EnabledLayers 1FFF8001
Links 668
NoConn 0
Di 36595 16630 77260 64790
Ndraw 239
Di 36595 16630 83771 64790
Ndraw 241
Ntrack 4007
Nzone 0
BoardThickness 630
@@ -21,7 +21,7 @@ $EndGENERAL
$SHEETDESCR
Sheet A4 11700 8267
Title "sd2snes Mark II"
Date "12 nov 2011"
Date "30 jan 2012"
Rev "C2"
Comp "Maximilian Rehkopf"
Comment1 ""
@@ -71,7 +71,7 @@ PadSize 79 690
PadDrill 0
Pad2MaskClearance 40
AuxiliaryAxisOrg 0 0
PcbPlotParams (pcbplotparams (layerselection 2097152) (usegerberextensions true) (excludeedgelayer false) (linewidth 79) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext true) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 2) (mirror false) (drillshape 2) (scaleselection 1) (outputdirectory ""))
PcbPlotParams (pcbplotparams (layerselection 284196865) (usegerberextensions true) (excludeedgelayer true) (linewidth 79) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue false) (plotothertext false) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 1) (mirror false) (drillshape 2) (scaleselection 1) (outputdirectory ""))
$EndSETUP
$EQUIPOT
@@ -7484,7 +7484,7 @@ AR /4B6ED75B/4BEECBCD
Op 0 0 0
At SMD
T0 0 600 320 320 2700 70 N V 21 N "C408"
T1 0 0 320 320 2700 70 N I 21 N "22p"
T1 0 0 320 320 2700 70 N I 21 N "10p"
DS 200 350 650 350 75 21
DS -650 350 -200 350 75 21
DS 650 -350 200 -350 75 21
@@ -8708,7 +8708,7 @@ AR /4B6ED75B/4BEECBD1
Op 0 0 0
At SMD
T0 -25 -600 320 320 900 70 N V 21 N "C409"
T1 0 0 320 320 900 70 N I 21 N "22p"
T1 0 0 320 320 900 70 N I 21 N "10p"
DS 200 350 650 350 75 21
DS -650 350 -200 350 75 21
DS 650 -350 200 -350 75 21
@@ -12481,6 +12481,32 @@ Ne 0 ""
Po 14331 3780
$EndPAD
$EndMODULE SNESCART_EXT2
$COTATION
Ge 0 24 0
Va 32677
Te "83.000 mm"
Po 81111 38031 600 800 120 2701 1
Sb 0 80471 21693 80471 54370 120
Sd 0 65630 54370 81751 54370 120
Sg 0 65630 21693 81751 21693 120
S1 0 80471 54370 80241 53927 120
S2 0 80471 54370 80701 53927 120
S3 0 80471 21693 80241 22136 120
S4 0 80471 21693 80701 22136 120
$endCOTATION
$COTATION
Ge 0 24 0
Va 40000
Te "101.600 mm"
Po 57165 59419 600 800 120 0 1
Sb 0 37165 58779 77165 58779 120
Sd 0 77165 34606 77165 60059 120
Sg 0 37165 34606 37165 60059 120
S1 0 77165 58779 76722 59009 120
S2 0 77165 58779 76722 58549 120
S3 0 37165 58779 37608 59009 120
S4 0 37165 58779 37608 58549 120
$endCOTATION
$TEXTPCB
Te "USE_BATT"
Po 46575 27525 320 320 80 0
@@ -12804,7 +12830,7 @@ Po 45815 24905 700 700 120 0
De 20 0 0 Normal C
$EndTEXTPCB
$TEXTPCB
Te "©2009 - 2011 M. Rehkopf"
Te "©2009 - 2012 ikari_01 "
Po 44000 27540 500 500 75 0
De 20 0 0 Normal C
$EndTEXTPCB

View File

@@ -1,4 +1,4 @@
# EESchema Netlist Version 1.1 created Fri 02 Dec 2011 09:50:17 AM CET
# EESchema Netlist Version 1.1 created Fri 09 Dec 2011 10:46:12 PM CET
(
( /4B6E16F2/4D97B45F $noname RA114 100 {Lib=R_PACK4}
( 1 N-000108 )
@@ -176,7 +176,7 @@
( 1 SNES_IRQ_EN )
( 2 N-000036 )
)
( /4B6E16F2/4C7EAEBF $noname R102 1k {Lib=R}
( /4B6E16F2/4C7EAEBF $noname R102 100k {Lib=R}
( 1 N-000036 )
( 2 GND )
)
@@ -489,7 +489,7 @@
( 1 /Memory/SRAM_Vcc )
( 2 /Memory/RAM_/CE )
)
( /4BAA6ABD/4BF2FDAC SM0805_FIXEDMASK R513 1k {Lib=R}
( /4BAA6ABD/4BF2FDAC SM0805_FIXEDMASK R513 100k {Lib=R}
( 1 N-000344 )
( 2 GND )
)

View File

@@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 02 Dec 2011 09:50:04 AM CET
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:05 PM CET
LIBS:power
LIBS:device
LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
encoding utf-8
Sheet 1 6
Title "sd2snes Mark II"
Date "2 dec 2011"
Date "9 dec 2011"
Rev "E"
Comp "Maximilian Rehkopf"
Comment1 ""

View File

@@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 02 Dec 2011 09:50:04 AM CET
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:05 PM CET
LIBS:power
LIBS:device
LIBS:transistors
@@ -47,7 +47,7 @@ $Descr A3 16535 11700
encoding utf-8
Sheet 2 6
Title "sd2snes Mark II"
Date "2 dec 2011"
Date "9 dec 2011"
Rev "C"
Comp "Maximilian Rehkopf"
Comment1 ""
@@ -1125,7 +1125,7 @@ L R R102
U 1 1 4C7EAEBF
P 6850 8600
F 0 "R102" V 6930 8600 50 0000 C CNN
F 1 "1k" V 6850 8600 50 0000 C CNN
F 1 "100k" V 6850 8600 50 0000 C CNN
1 6850 8600
1 0 0 -1
$EndComp

1322
pcb/kicad/RevE2/fpga.sch Normal file

File diff suppressed because it is too large Load Diff

1194
pcb/kicad/RevE2/mcu.sch Normal file

File diff suppressed because it is too large Load Diff

807
pcb/kicad/RevE2/memory.sch Normal file
View File

@@ -0,0 +1,807 @@
EESchema Schematic File Version 2 date Mon 02 Jan 2012 11:27:18 PM CET
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:snescart
LIBS:misc-74
LIBS:vreg
LIBS:lpc1754
LIBS:sd_card
LIBS:cy62148ev30
LIBS:mt45w8mw16
LIBS:cs4344
LIBS:double_sch_kcom
LIBS:usb_minib
LIBS:mic23250
LIBS:sd2snes-cache
EELAYER 25 0
EELAYER END
$Descr A4 11700 8267
encoding utf-8
Sheet 3 6
Title "sd2snes Mark II"
Date "2 jan 2012"
Rev "E2"
Comp "Maximilian Rehkopf"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Label 7650 2000 0 50 ~ 0
SRAM_Vcc
Wire Wire Line
7650 4750 7650 5000
Wire Wire Line
8350 5050 8350 5250
Wire Wire Line
8350 5250 8500 5250
Connection ~ 9150 5250
Wire Wire Line
9150 5450 9150 5250
Connection ~ 9600 2000
Wire Wire Line
9600 2000 9600 3350
Wire Wire Line
10500 2000 10350 2000
Wire Wire Line
8400 1400 8400 1600
Wire Wire Line
8400 1600 8050 1600
Wire Wire Line
6800 4350 6300 4350
Wire Wire Line
6800 4250 6300 4250
Wire Wire Line
6800 4150 6300 4150
Wire Wire Line
6800 4050 6300 4050
Wire Wire Line
6800 3950 6300 3950
Wire Wire Line
6800 3850 6300 3850
Wire Wire Line
6800 3750 6300 3750
Wire Wire Line
6800 3650 6300 3650
Wire Wire Line
6800 3550 6300 3550
Wire Wire Line
6800 3450 6300 3450
Wire Wire Line
6800 3350 6300 3350
Wire Wire Line
6800 3250 6300 3250
Wire Wire Line
6800 3150 6300 3150
Wire Wire Line
6800 3050 6300 3050
Wire Wire Line
6800 2950 6300 2950
Wire Wire Line
6800 2850 6300 2850
Wire Wire Line
6800 2750 6300 2750
Wire Wire Line
6800 2650 6300 2650
Wire Wire Line
6800 2550 6300 2550
Wire Wire Line
8500 3950 9000 3950
Wire Wire Line
4750 4750 4250 4750
Wire Wire Line
4250 4650 4750 4650
Wire Wire Line
4250 4350 4750 4350
Wire Wire Line
4250 4150 4750 4150
Wire Wire Line
4250 4050 4750 4050
Wire Wire Line
4250 3750 4750 3750
Wire Wire Line
4250 3650 4750 3650
Wire Wire Line
4250 3550 4750 3550
Wire Wire Line
4250 3450 4750 3450
Wire Wire Line
4250 3350 4750 3350
Wire Wire Line
4250 3250 4750 3250
Wire Wire Line
4250 3150 4750 3150
Wire Wire Line
4250 3050 4750 3050
Wire Wire Line
4250 2850 4750 2850
Wire Wire Line
4250 2750 4750 2750
Wire Wire Line
4250 2650 4750 2650
Wire Wire Line
4250 2550 4750 2550
Wire Wire Line
4250 2450 4750 2450
Wire Wire Line
4250 2350 4750 2350
Wire Wire Line
4250 2250 4750 2250
Wire Wire Line
4250 2150 4750 2150
Wire Wire Line
3550 6800 3550 6700
Wire Wire Line
3400 5400 3400 5300
Wire Wire Line
3300 5150 3300 5300
Wire Wire Line
3300 1750 3300 1550
Connection ~ 7650 2000
Wire Wire Line
3500 1750 3500 1550
Wire Wire Line
3500 5150 3500 5300
Wire Wire Line
3500 5300 3300 5300
Connection ~ 3400 5300
Wire Wire Line
3550 7200 3550 7300
Wire Wire Line
3250 7200 3250 7300
Wire Wire Line
3250 6700 3250 6800
Wire Wire Line
2550 2150 2050 2150
Wire Wire Line
2550 2250 2050 2250
Wire Wire Line
2550 2350 2050 2350
Wire Wire Line
2550 2450 2050 2450
Wire Wire Line
2550 2550 2050 2550
Wire Wire Line
2550 2650 2050 2650
Wire Wire Line
2550 2750 2050 2750
Wire Wire Line
2550 2850 2050 2850
Wire Wire Line
2550 2950 2050 2950
Wire Wire Line
2550 3050 2050 3050
Wire Wire Line
2550 3150 2050 3150
Wire Wire Line
2550 3250 2050 3250
Wire Wire Line
2550 3350 2050 3350
Wire Wire Line
2550 3450 2050 3450
Wire Wire Line
2550 3550 2050 3550
Wire Wire Line
2550 3650 2050 3650
Wire Wire Line
2550 3750 2050 3750
Wire Wire Line
2550 3850 2050 3850
Wire Wire Line
2550 3950 2050 3950
Wire Wire Line
2550 4050 2050 4050
Wire Wire Line
2550 4150 2050 4150
Wire Wire Line
2550 4250 2050 4250
Wire Wire Line
2550 4350 2050 4350
Wire Wire Line
2550 4650 2050 4650
Wire Wire Line
2550 4750 2050 4750
Wire Wire Line
2550 4550 2050 4550
Wire Wire Line
8500 4050 9000 4050
Connection ~ 4750 4750
Wire Wire Line
4750 4350 4750 5400
Connection ~ 4750 4650
Wire Wire Line
8500 2550 9000 2550
Wire Wire Line
8500 2650 9000 2650
Wire Wire Line
8500 2750 9000 2750
Wire Wire Line
8500 2850 9000 2850
Wire Wire Line
8500 2950 9000 2950
Wire Wire Line
8500 3050 9000 3050
Wire Wire Line
8500 3150 9000 3150
Wire Wire Line
8500 3250 9000 3250
Wire Wire Line
7250 1600 6900 1600
Wire Wire Line
6900 1600 6900 1400
Wire Wire Line
8500 3850 9600 3850
Wire Wire Line
9600 3850 9600 5050
Wire Wire Line
9000 5250 9300 5250
Wire Wire Line
9150 5950 9150 6050
Wire Wire Line
9150 6050 9600 6050
Wire Wire Line
9600 6350 9600 5450
Connection ~ 9600 6050
Wire Wire Line
7650 2150 7650 1800
Wire Wire Line
9950 2000 7650 2000
$Comp
L CY62148EV30-ZSXI U511
U 1 1 4D49598F
P 7650 3450
F 0 "U511" H 7650 3550 60 0000 C CNN
F 1 "CY62148EV30-ZSXI" H 7700 3450 60 0000 C CNN
1 7650 3450
1 0 0 -1
$EndComp
Text Notes 7050 7000 0 250 ~ 50
Memory
Text Notes 7300 1300 0 50 ~ 0
SRAM battery power
Text Notes 9800 5300 0 50 ~ 0
Battery power OE switch
$Comp
L +3.3V #PWR031
U 1 1 4BF2FE97
P 8350 5050
F 0 "#PWR031" H 8350 5010 30 0001 C CNN
F 1 "+3.3V" H 8350 5160 30 0000 C CNN
1 8350 5050
1 0 0 -1
$EndComp
$Comp
L GND #PWR032
U 1 1 4BF2FE7B
P 9600 6350
F 0 "#PWR032" H 9600 6350 30 0001 C CNN
F 1 "GND" H 9600 6280 30 0001 C CNN
1 9600 6350
1 0 0 -1
$EndComp
$Comp
L R R511
U 1 1 4BF2FDAF
P 9600 3600
F 0 "R511" V 9680 3600 50 0000 C CNN
F 1 "20k" V 9600 3600 50 0000 C CNN
F 2 "SM0805_FIXEDMASK" H 9600 3600 60 0001 C CNN
1 9600 3600
1 0 0 -1
$EndComp
$Comp
L R R513
U 1 1 4BF2FDAC
P 9150 5700
F 0 "R513" V 9230 5700 50 0000 C CNN
F 1 "100k" V 9150 5700 50 0000 C CNN
F 2 "SM0805_FIXEDMASK" H 9150 5700 60 0001 C CNN
1 9150 5700
1 0 0 -1
$EndComp
$Comp
L R R512
U 1 1 4BF2FDA9
P 8750 5250
F 0 "R512" V 8830 5250 50 0000 C CNN
F 1 "4k7" V 8750 5250 50 0000 C CNN
F 2 "SM0805_FIXEDMASK" H 8750 5250 60 0001 C CNN
1 8750 5250
0 1 1 0
$EndComp
$Comp
L NPN Q511
U 1 1 4BF2FD9F
P 9500 5250
F 0 "Q511" H 9500 5100 50 0000 R CNN
F 1 "2N2222A" H 9500 5400 50 0000 R CNN
F 2 "SOT23EBC" H 9500 5250 60 0001 C CNN
1 9500 5250
1 0 0 -1
$EndComp
$Comp
L GND #PWR033
U 1 1 4BF1A006
P 10500 2000
F 0 "#PWR033" H 10500 2000 30 0001 C CNN
F 1 "GND" H 10500 1930 30 0001 C CNN
1 10500 2000
0 -1 -1 0
$EndComp
$Comp
L +BATT #PWR034
U 1 1 4BF19EA4
P 8400 1400
F 0 "#PWR034" H 8400 1350 20 0001 C CNN
F 1 "+BATT" H 8400 1500 30 0000 C CNN
1 8400 1400
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR035
U 1 1 4BF19E7A
P 6900 1400
F 0 "#PWR035" H 6900 1360 30 0001 C CNN
F 1 "+3.3V" H 6900 1510 30 0000 C CNN
1 6900 1400
1 0 0 -1
$EndComp
$Comp
L DOUBLE_SCH_KCOM2 D511
U 1 1 4BF19DCA
P 7650 1600
F 0 "D511" H 7800 1475 60 0000 C CNN
F 1 "BAT54C" H 7650 1750 60 0000 C CNN
F 2 "SOT23EBC" H 7650 1600 60 0001 C CNN
1 7650 1600
1 0 0 -1
$EndComp
Text Label 8600 4050 0 50 ~ 0
RAM_/WE
Text Label 8600 3950 0 50 ~ 0
RAM_/OE
Text Label 8600 3850 0 50 ~ 0
RAM_/CE
Text Label 8600 3250 0 50 ~ 0
RAM_DQ7
Text Label 8600 3150 0 50 ~ 0
RAM_DQ6
Text Label 8600 3050 0 50 ~ 0
RAM_DQ5
Text Label 8600 2950 0 50 ~ 0
RAM_DQ4
Text Label 8600 2850 0 50 ~ 0
RAM_DQ3
Text Label 8600 2750 0 50 ~ 0
RAM_DQ2
Text Label 8600 2650 0 50 ~ 0
RAM_DQ1
Text Label 8600 2550 0 50 ~ 0
RAM_DQ0
Text Label 6400 4350 0 50 ~ 0
RAM_A18
Text Label 6400 4250 0 50 ~ 0
RAM_A17
Text Label 6400 4150 0 50 ~ 0
RAM_A16
Text Label 6400 4050 0 50 ~ 0
RAM_A15
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RAM_A14
Text Label 6400 3850 0 50 ~ 0
RAM_A13
Text Label 6400 3750 0 50 ~ 0
RAM_A12
Text Label 6400 3650 0 50 ~ 0
RAM_A11
Text Label 6400 3550 0 50 ~ 0
RAM_A10
Text Label 6400 3450 0 50 ~ 0
RAM_A9
Text Label 6400 3350 0 50 ~ 0
RAM_A8
Text Label 6400 3250 0 50 ~ 0
RAM_A7
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RAM_A6
Text Label 6400 3050 0 50 ~ 0
RAM_A5
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RAM_A4
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RAM_A3
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RAM_A2
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RAM_A1
Text Label 6400 2550 0 50 ~ 0
RAM_A0
Text Label 4350 4150 0 50 ~ 0
ROM_/UB
Text Label 4350 4050 0 50 ~ 0
ROM_/LB
Text Label 4350 3750 0 50 ~ 0
ROM_DQ15
Text Label 4350 3650 0 50 ~ 0
ROM_DQ14
Text Label 4350 3550 0 50 ~ 0
ROM_DQ13
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ROM_DQ12
Text Label 4350 3350 0 50 ~ 0
ROM_DQ11
Text Label 4350 3250 0 50 ~ 0
ROM_DQ10
Text Label 4350 3150 0 50 ~ 0
ROM_DQ9
Text Label 4350 3050 0 50 ~ 0
ROM_DQ8
Text Label 4350 2850 0 50 ~ 0
ROM_DQ7
Text Label 4350 2750 0 50 ~ 0
ROM_DQ6
Text Label 4350 2650 0 50 ~ 0
ROM_DQ5
Text Label 4350 2550 0 50 ~ 0
ROM_DQ4
Text Label 4350 2450 0 50 ~ 0
ROM_DQ3
Text Label 4350 2350 0 50 ~ 0
ROM_DQ2
Text Label 4350 2250 0 50 ~ 0
ROM_DQ1
Text Label 4350 2150 0 50 ~ 0
ROM_DQ0
Text Label 2100 4750 0 50 ~ 0
ROM_/WE
Text Label 2100 4650 0 50 ~ 0
ROM_/OE
Text Label 2100 4550 0 50 ~ 0
ROM_/CE
Text Label 2100 4350 0 50 ~ 0
ROM_A22
Text Label 2100 4250 0 50 ~ 0
ROM_A21
Text Label 2100 4150 0 50 ~ 0
ROM_A20
Text Label 2100 4050 0 50 ~ 0
ROM_A19
Text Label 2100 3950 0 50 ~ 0
ROM_A18
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ROM_A17
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ROM_A16
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ROM_A15
Text Label 2100 3550 0 50 ~ 0
ROM_A14
Text Label 2100 3450 0 50 ~ 0
ROM_A13
Text Label 2100 3350 0 50 ~ 0
ROM_A12
Text Label 2100 3250 0 50 ~ 0
ROM_A11
Text Label 2100 3150 0 50 ~ 0
ROM_A10
Text Label 2100 3050 0 50 ~ 0
ROM_A9
Text Label 2100 2950 0 50 ~ 0
ROM_A8
Text Label 2100 2850 0 50 ~ 0
ROM_A7
Text Label 2100 2750 0 50 ~ 0
ROM_A6
Text Label 2100 2650 0 50 ~ 0
ROM_A5
Text Label 2100 2550 0 50 ~ 0
ROM_A4
Text Label 2100 2450 0 50 ~ 0
ROM_A3
Text Label 2100 2350 0 50 ~ 0
ROM_A2
Text Label 2100 2250 0 50 ~ 0
ROM_A1
Text Label 2100 2150 0 50 ~ 0
ROM_A0
Text GLabel 2050 4550 0 50 Input ~ 0
ROM_/CE
Text GLabel 9000 4050 2 50 Input ~ 0
RAM_/WE
Text GLabel 9000 3950 2 50 Input ~ 0
RAM_/OE
Text GLabel 9000 3250 2 50 BiDi ~ 0
RAM_DQ7
Text GLabel 9000 3150 2 50 BiDi ~ 0
RAM_DQ6
Text GLabel 9000 3050 2 50 BiDi ~ 0
RAM_DQ5
Text GLabel 9000 2950 2 50 BiDi ~ 0
RAM_DQ4
Text GLabel 9000 2850 2 50 BiDi ~ 0
RAM_DQ3
Text GLabel 9000 2750 2 50 BiDi ~ 0
RAM_DQ2
Text GLabel 9000 2650 2 50 BiDi ~ 0
RAM_DQ1
Text GLabel 9000 2550 2 50 BiDi ~ 0
RAM_DQ0
Text GLabel 6300 4350 0 50 Input ~ 0
RAM_A18
Text GLabel 6300 4250 0 50 Input ~ 0
RAM_A17
Text GLabel 6300 4150 0 50 Input ~ 0
RAM_A16
Text GLabel 6300 4050 0 50 Input ~ 0
RAM_A15
Text GLabel 6300 3950 0 50 Input ~ 0
RAM_A14
Text GLabel 6300 3850 0 50 Input ~ 0
RAM_A13
Text GLabel 6300 3750 0 50 Input ~ 0
RAM_A12
Text GLabel 6300 3650 0 50 Input ~ 0
RAM_A11
Text GLabel 6300 3550 0 50 Input ~ 0
RAM_A10
Text GLabel 6300 3450 0 50 Input ~ 0
RAM_A9
Text GLabel 6300 3350 0 50 Input ~ 0
RAM_A8
Text GLabel 6300 3250 0 50 Input ~ 0
RAM_A7
Text GLabel 6300 3150 0 50 Input ~ 0
RAM_A6
Text GLabel 6300 3050 0 50 Input ~ 0
RAM_A5
Text GLabel 6300 2950 0 50 Input ~ 0
RAM_A4
Text GLabel 6300 2850 0 50 Input ~ 0
RAM_A3
Text GLabel 6300 2750 0 50 Input ~ 0
RAM_A2
Text GLabel 6300 2650 0 50 Input ~ 0
RAM_A1
Text GLabel 6300 2550 0 50 Input ~ 0
RAM_A0
Text GLabel 4750 4150 2 50 Input ~ 0
ROM_/UB
Text GLabel 4750 4050 2 50 Input ~ 0
ROM_/LB
Text GLabel 4750 3750 2 50 BiDi ~ 0
ROM_DQ15
Text GLabel 4750 3650 2 50 BiDi ~ 0
ROM_DQ14
Text GLabel 4750 3550 2 50 BiDi ~ 0
ROM_DQ13
Text GLabel 4750 3450 2 50 BiDi ~ 0
ROM_DQ12
Text GLabel 4750 3350 2 50 BiDi ~ 0
ROM_DQ11
Text GLabel 4750 3250 2 50 BiDi ~ 0
ROM_DQ10
Text GLabel 4750 3150 2 50 BiDi ~ 0
ROM_DQ9
Text GLabel 4750 3050 2 50 BiDi ~ 0
ROM_DQ8
Text GLabel 4750 2850 2 50 BiDi ~ 0
ROM_DQ7
Text GLabel 4750 2750 2 50 BiDi ~ 0
ROM_DQ6
Text GLabel 4750 2650 2 50 BiDi ~ 0
ROM_DQ5
Text GLabel 4750 2550 2 50 BiDi ~ 0
ROM_DQ4
Text GLabel 4750 2450 2 50 BiDi ~ 0
ROM_DQ3
Text GLabel 4750 2350 2 50 BiDi ~ 0
ROM_DQ2
Text GLabel 4750 2250 2 50 BiDi ~ 0
ROM_DQ1
Text GLabel 4750 2150 2 50 BiDi ~ 0
ROM_DQ0
Text GLabel 2050 4350 0 50 Input ~ 0
ROM_A22
Text GLabel 2050 4250 0 50 Input ~ 0
ROM_A21
Text GLabel 2050 4150 0 50 Input ~ 0
ROM_A20
Text GLabel 2050 4050 0 50 Input ~ 0
ROM_A19
Text GLabel 2050 3950 0 50 Input ~ 0
ROM_A18
Text GLabel 2050 3850 0 50 Input ~ 0
ROM_A17
Text GLabel 2050 3750 0 50 Input ~ 0
ROM_A16
Text GLabel 2050 3650 0 50 Input ~ 0
ROM_A15
Text GLabel 2050 3550 0 50 Input ~ 0
ROM_A14
Text GLabel 2050 3450 0 50 Input ~ 0
ROM_A13
Text GLabel 2050 3350 0 50 Input ~ 0
ROM_A12
Text GLabel 2050 3250 0 50 Input ~ 0
ROM_A11
Text GLabel 2050 3150 0 50 Input ~ 0
ROM_A10
Text GLabel 2050 3050 0 50 Input ~ 0
ROM_A9
Text GLabel 2050 2950 0 50 Input ~ 0
ROM_A8
Text GLabel 2050 2850 0 50 Input ~ 0
ROM_A7
Text GLabel 2050 2750 0 50 Input ~ 0
ROM_A6
Text GLabel 2050 2650 0 50 Input ~ 0
ROM_A5
Text GLabel 2050 2550 0 50 Input ~ 0
ROM_A4
Text GLabel 2050 2450 0 50 Input ~ 0
ROM_A3
Text GLabel 2050 2350 0 50 Input ~ 0
ROM_A2
Text GLabel 2050 2250 0 50 Input ~ 0
ROM_A1
Text GLabel 2050 2150 0 50 Input ~ 0
ROM_A0
NoConn ~ 4250 4550
$Comp
L GND #PWR036
U 1 1 4BCA30BF
P 4750 5400
F 0 "#PWR036" H 4750 5400 30 0001 C CNN
F 1 "GND" H 4750 5330 30 0001 C CNN
1 4750 5400
1 0 0 -1
$EndComp
Text GLabel 2050 4750 0 50 Input ~ 0
ROM_/WE
Text GLabel 2050 4650 0 50 Input ~ 0
ROM_/OE
$Comp
L C C502
U 1 1 4BAD3D55
P 3550 7000
F 0 "C502" H 3600 7100 50 0000 L CNN
F 1 "100n" H 3600 6900 50 0000 L CNN
F 2 "SM0805_FIXEDMASK" H 3550 7000 60 0001 C CNN
1 3550 7000
1 0 0 -1
$EndComp
$Comp
L C C511
U 1 1 4BAD3D53
P 10150 2000
F 0 "C511" H 10200 2100 50 0000 L CNN
F 1 "100n" H 10200 1900 50 0000 L CNN
F 2 "SM0805_FIXEDMASK" H 10150 2000 60 0001 C CNN
1 10150 2000
0 -1 1 0
$EndComp
$Comp
L C C501
U 1 1 4BAD3D47
P 3250 7000
F 0 "C501" H 3300 7100 50 0000 L CNN
F 1 "100n" H 3300 6900 50 0000 L CNN
F 2 "SM0805_FIXEDMASK" H 3250 7000 60 0001 C CNN
1 3250 7000
1 0 0 -1
$EndComp
$Comp
L GND #PWR037
U 1 1 4BAD3D2B
P 3550 7300
F 0 "#PWR037" H 3550 7300 30 0001 C CNN
F 1 "GND" H 3550 7230 30 0001 C CNN
1 3550 7300
1 0 0 -1
$EndComp
$Comp
L +1.8V #PWR038
U 1 1 4BAD3D27
P 3550 6700
F 0 "#PWR038" H 3550 6840 20 0001 C CNN
F 1 "+1.8V" H 3550 6810 30 0000 C CNN
1 3550 6700
1 0 0 -1
$EndComp
$Comp
L GND #PWR039
U 1 1 4BAD3D20
P 3250 7300
F 0 "#PWR039" H 3250 7300 30 0001 C CNN
F 1 "GND" H 3250 7230 30 0001 C CNN
1 3250 7300
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR040
U 1 1 4BAD3D0B
P 3250 6700
F 0 "#PWR040" H 3250 6660 30 0001 C CNN
F 1 "+3.3V" H 3250 6810 30 0000 C CNN
1 3250 6700
1 0 0 -1
$EndComp
$Comp
L GND #PWR041
U 1 1 4BAD33A7
P 3400 5400
F 0 "#PWR041" H 3400 5400 30 0001 C CNN
F 1 "GND" H 3400 5330 30 0001 C CNN
1 3400 5400
1 0 0 -1
$EndComp
$Comp
L GND #PWR042
U 1 1 4BAD339F
P 7650 5000
F 0 "#PWR042" H 7650 5000 30 0001 C CNN
F 1 "GND" H 7650 4930 30 0001 C CNN
1 7650 5000
1 0 0 -1
$EndComp
$Comp
L +1.8V #PWR043
U 1 1 4BAD32D2
P 3300 1550
F 0 "#PWR043" H 3300 1690 20 0001 C CNN
F 1 "+1.8V" H 3300 1660 30 0000 C CNN
1 3300 1550
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR044
U 1 1 4BAD32BE
P 3500 1550
F 0 "#PWR044" H 3500 1510 30 0001 C CNN
F 1 "+3.3V" H 3500 1660 30 0000 C CNN
1 3500 1550
1 0 0 -1
$EndComp
Text Notes 6300 5700 0 60 ~ 0
4Mbits 45ns SRAM (battery RAM + custom chip work RAM)
Text Notes 2650 5700 0 60 ~ 0
128Mbits 70ns PSRAM (ROM area)
$Comp
L MT45W8MW16 U501
U 1 1 4B868602
P 3400 3450
F 0 "U501" H 3400 3550 60 0000 C CNN
F 1 "MT45W8MW16" H 3400 3450 60 0000 C CNN
F 2 "VFBGA54" H 3400 3450 60 0001 C CNN
1 3400 3450
1 0 0 -1
$EndComp
$EndSCHEMATC

17
pcb/kicad/RevE2/padreduce.sh Executable file
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@@ -0,0 +1,17 @@
cp "$1" "$1".bak
sed -e 's/^%ADD\(..\)R/%ADD\1O/g' < "$1" > "$1".tmp1
grep ^%ADD..O "$1".tmp1 | while read ln; do LS=${ln:0:8}; X=${ln:8:8}; Y=${ln:17:8}; X2=`echo $X-.001 | bc -l`; Y2=`echo $Y-.001 | bc -l`; echo $LS`printf '%01.6f' $X2`X`printf '%01.6f' $Y2`*%; done > "$1".tmp2
grep ^%ADD..C "$1".tmp1 | while read ln; do LS=${ln:0:8}; X=${ln:8:8}; X2=`echo $X-.001 | bc -l`; echo $LS`printf '%01.6f' $X2`*%; done >> "$1".tmp2
while read ln; do echo "$ln" | grep '^%ADD' >/dev/null && break; echo "$ln"; done < "$1".tmp1 > "$1"
cat "$1".tmp2 >> "$1"
grep -A100000 'G04 APERTURE END LIST\*' "$1".tmp1 >> "$1"
rm "$1".tmp1 "$1".tmp2

1197
pcb/kicad/RevE2/pwr_misc.sch Normal file

File diff suppressed because it is too large Load Diff

35739
pcb/kicad/RevE2/sd2snes.brd Normal file

File diff suppressed because it is too large Load Diff

1067
pcb/kicad/RevE2/sd2snes.cmp Normal file

File diff suppressed because it is too large Load Diff

1901
pcb/kicad/RevE2/sd2snes.net Normal file

File diff suppressed because it is too large Load Diff

117
pcb/kicad/RevE2/sd2snes.pro Normal file
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@@ -0,0 +1,117 @@
update=Sat 25 Feb 2012 11:51:50 PM CET
version=1
last_client=pcbnew
[general]
version=1
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=../../kicad
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=50
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
LibName31=libs/snescart
LibName32=libs/misc-74
LibName33=libs/vreg
LibName34=libs/lpc1754
LibName35=libs/sd_card
LibName36=libs/cy62148ev30
LibName37=libs/mt45w8mw16
LibName38=libs/cs4344
LibName39=libs/double_sch_kcom
LibName40=libs/usb_minib
LibName41=libs/mic23250
[pcbnew]
version=1
PadDrlX=0
PadDimH=197
PadDimV=276
BoardThickness=630
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=40
DrawLar=70
EdgeLar=40
TxtLar=120
MSegLar=79
LastNetListRead=sd2snes.net
[pcbnew/libraries]
LibDir=../../kicad
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=libcms
LibName7=display
LibName8=valves
LibName9=led
LibName10=dip_sockets
LibName11=libs/mypackages
LibName12=libs/snescart
LibName13=libs/sdcard
LibName14=libs/snail
LibName15=libs/snail2

View File

@@ -0,0 +1,94 @@
EESchema Schematic File Version 2 date Mon 02 Jan 2012 11:27:18 PM CET
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:snescart
LIBS:misc-74
LIBS:vreg
LIBS:lpc1754
LIBS:sd_card
LIBS:cy62148ev30
LIBS:mt45w8mw16
LIBS:cs4344
LIBS:double_sch_kcom
LIBS:usb_minib
LIBS:mic23250
LIBS:sd2snes-cache
EELAYER 25 0
EELAYER END
$Descr A4 11700 8267
encoding utf-8
Sheet 1 6
Title "sd2snes Mark II"
Date "2 jan 2012"
Rev "E2"
Comp "Maximilian Rehkopf"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Wire Notes Line
3650 4200 6150 4200
Text Notes 3300 3250 0 100 ~ 0
Changes from Rev.A / TODO:\n [x] remove FPGA from JTAG chain\n [x] remove SNES IRQ_DIR+IRQ, replace with IRQ_OE. IRQ is unidirectional cart -> console\n (replace 1gate w/ transistor)\n [x] disconnect P2.10 from FPGA, using a different GPIO for IRQ / INIT_B\n [x] add pullup to P2.10\n [ ] add JTAG pullups\n [x] add series resistor for CPU_CLK\n [x] add a jumper in PIC MCLR line to MCU\n [x] change PIC to DIP8 type for easier preprogramming\n [x] change "P1" to "P401" in pin description in silk screen\n [x] filter CIC data lines\n [x] rearrange SD card interface/LEDs on MCU\n [x] RAs for SNES signals?\n [x] reroute/add decoupling capacitors\n [x] filter SNES control signals (RD, WR, PARD, PAWR, CPU_CLK, IRQ)\n [x] replace 4Mbit SRAM with much cheaper TSOP-II type\n [x] add inverse polarity protection\n [x] separate GND plane for DAC\n [ ] separate JTAG pads for FPGA\n [x] add USE_BATT jumper\n [x] move PROG_B to P1.15
$Sheet
S 1250 1250 1700 1250
U 4B6E16F2
F0 "SNES Slot" 60
F1 "snesslot.sch" 60
$EndSheet
Text Notes 750 7700 0 500 ~ 100
sd2snes Mark II
$Sheet
S 1250 3300 1600 1150
U 4BAA6ABD
F0 "Memory" 60
F1 "memory.sch" 60
$EndSheet
$Sheet
S 8050 1250 1600 1250
U 4B6ED75B
F0 "MCU" 60
F1 "mcu.sch" 60
$EndSheet
$Sheet
S 5900 1250 1600 1250
U 4B6EC9C3
F0 "Power Supply / Misc." 60
F1 "pwr_misc.sch" 60
$EndSheet
$Sheet
S 3650 1250 1650 1250
U 4B6E18FC
F0 "FPGA" 60
F1 "fpga.sch" 60
$EndSheet
$EndSCHEMATC

2059
pcb/kicad/RevE2/snesslot.sch Normal file

File diff suppressed because it is too large Load Diff

View File

@@ -1,17 +1,21 @@
PCBNEW-LibModule-V1 Wed 14 Sep 2011 12:39:55 AM CEST
PCBNEW-LibModule-V1 Sun 26 Feb 2012 12:35:43 AM CET
# encoding utf-8
$INDEX
BT_KEYSTONE_1059_20MM
CP_TANTAL_SMD_D
DIP-36
HC49US
HRS-DM1AA
LED-3MM-FIXED
LQFP80-.5
L_4.2X4.2
PAD_1x1mm
PQFP208_ALTPADS
QFN10-2x2
QFN10-2x2_LONGPADS
R_PACK_0804
R_PACK_0804_LONGPADS
R_PACK_1206
SM0805_FIXEDMASK
SM1210L
SM1210L_NEW
@@ -23,8 +27,11 @@ TSOP40
TSOPII-32
TSOPII-44
TSSOP10
TSSOP10_LONGPADS
TSSOP48
TSSOP48_LONGPADS
USB-MINIB-THT
USB_MINIB_SMT
VFBGA36
VFBGA48
VFBGA54
@@ -4107,41 +4114,6 @@ Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE SM1210L_NEW
$MODULE LED-3MM-FIXED
Po 0 0 0 15 4D251EA9 00000000 ~~
Li LED-3MM-FIXED
Cd LED 3mm - Lead pitch 100mil (2,54mm)
Kw LED led 3mm 3MM 100mil 2,54mm
Sc 00000000
AR /4B6ED75B/4C0DA78D
Op 0 0 0
At VIRTUAL
T0 -300 -2125 320 320 0 70 N V 21 N"D403"
T1 25 3575 320 320 2700 70 N V 21 N"LED_2mA_1.7V,_red"
DS 669 669 669 394 80 21
DS 669 -669 669 -394 80 21
DA 0 0 669 669 2700 80 21
$PAD
Sh "1" C 660 660 0 0 0
Dr 400 0 0
At STD N 00E8FFFF
Ne 1 "+3.3V"
Po -500 0
$EndPAD
$PAD
Sh "2" C 660 660 0 0 0
Dr 400 0 0
At STD N 00E8FFFF
Ne 2 "N-000262"
Po 500 0
$EndPAD
$SHAPE3D
Na "libs/led3_vertical_red.wrl"
Sc 1.000000 1.000000 1.000000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE LED-3MM-FIXED
$MODULE HC49US
Po 0 0 0 15 4D2590A9 00000000 ~~
Li HC49US
@@ -5668,4 +5640,878 @@ Ne 33 "N-000035"
Po -3828 1870
$EndPAD
$EndMODULE TSOP40
$MODULE R_PACK_1206
Po 0 0 0 15 4EF2E0E8 00000000 ~~
Li R_PACK_1206
Sc 00000000
AR R_PACK_1206
Op 0 0 0
T0 0 0 600 600 0 120 N V 21 N "R_PACK_1206"
T1 0 0 600 600 0 120 N V 21 N "VAL**"
DS -866 -827 866 -827 79 21
DS 866 -827 866 827 79 21
DS 866 827 -866 827 79 21
DS -866 827 -866 -827 79 21
$PAD
Sh "1" R 248 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -510 384
$EndPAD
$PAD
Sh "2" R 173 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -157 384
$EndPAD
$PAD
Sh "3" R 173 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 157 384
$EndPAD
$PAD
Sh "4" R 248 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 510 384
$EndPAD
$PAD
Sh "5" R 248 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 510 -384
$EndPAD
$PAD
Sh "6" R 173 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 157 -384
$EndPAD
$PAD
Sh "7" R 173 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -157 -384
$EndPAD
$PAD
Sh "8" R 248 453 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -510 -384
$EndPAD
$EndMODULE R_PACK_1206
$MODULE TSSOP10_LONGPADS
Po 0 0 0 15 4EF2E58B 00000000 ~~
Li TSSOP10_LONGPADS
Sc 00000000
AR
Op 0 0 0
T0 0 0 600 600 0 120 N V 21 N "Test"
T1 0 0 600 600 0 120 N V 21 N "VAL**"
DC -394 394 -315 394 60 21
DS -590 -590 590 -590 60 21
DS 590 -590 590 590 60 21
DS -590 590 590 590 60 21
DS -590 -590 -590 590 60 21
$PAD
Sh "1" R 118 551 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -393 965
$EndPAD
$PAD
Sh "2" R 118 551 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -196 965
$EndPAD
$PAD
Sh "3" R 118 551 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 0 965
$EndPAD
$PAD
Sh "4" R 118 551 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 196 965
$EndPAD
$PAD
Sh "5" R 118 551 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 393 965
$EndPAD
$PAD
Sh "6" R 118 551 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 393 -965
$EndPAD
$PAD
Sh "7" R 118 551 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 196 -965
$EndPAD
$PAD
Sh "8" R 118 551 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 0 -965
$EndPAD
$PAD
Sh "9" R 118 551 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -196 -965
$EndPAD
$PAD
Sh "10" R 118 551 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -393 -965
$EndPAD
$EndMODULE TSSOP10_LONGPADS
$MODULE L_4.2X4.2
Po 0 0 0 15 4EF777D2 00000000 ~~
Li L_4.2X4.2
Sc 00000000
AR
Op 0 0 0
T0 0 0 600 600 0 120 N V 21 N "L_4.2X4.2"
T1 0 0 600 600 0 120 N V 21 N "VAL**"
DS -1024 -984 1024 -984 79 21
DS 1024 -984 1024 984 79 21
DS 1024 984 -1024 984 79 21
DS -1024 984 -1024 -984 79 21
$PAD
Sh "1" R 591 1654 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -571 0
$EndPAD
$PAD
Sh "2" R 591 1654 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 571 0
$EndPAD
$EndMODULE L_4.2X4.2
$MODULE LED-3MM-FIXED
Po 0 0 0 15 4EF9035D 00000000 ~~
Li LED-3MM-FIXED
Cd LED 3mm - Lead pitch 100mil (2,54mm)
Kw LED led 3mm 3MM 100mil 2,54mm
Sc 00000000
AR /4B6ED75B/4C0DA78D
Op 0 0 0
At VIRTUAL
T0 -300 -2125 320 320 0 70 N V 21 N "D403"
T1 25 3575 320 320 2700 70 N V 21 N "LED_2mA_1.7V,_red"
DS 669 669 669 394 80 21
DS 669 -669 669 -394 80 21
DA 0 0 669 669 2700 80 21
$PAD
Sh "1" C 660 660 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 1 "+3.3V"
Po -500 0
$EndPAD
$PAD
Sh "2" C 660 660 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 2 "N-000262"
Po 500 0
$EndPAD
$SHAPE3D
Na "libs/led3_vertical_red.wrl"
Sc 1.000000 1.000000 1.000000
Of 0.000000 0.000000 0.000000
Ro 0.000000 0.000000 0.000000
$EndSHAPE3D
$EndMODULE LED-3MM-FIXED
$MODULE USB_MINIB_SMT
Po 0 0 0 15 4F34EE0A 00000000 ~~
Li USB_MINIB_SMT
Sc 00000000
AR /4B6ED75B/4BF00175
Op 0 0 0
T0 -2553 -147 320 320 0 70 N V 21 N "J421"
T1 0 0 320 320 0 80 N I 21 N "USB_Mini-B_SMT"
DS -1516 2047 1516 2047 79 21
DS 1516 2047 1516 -1575 79 21
DS 1516 -1575 -1516 -1575 79 21
DS -1516 -1575 -1516 2047 79 21
$PAD
Sh "6" R 787 1299 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "GND"
Po -1752 -1161
$EndPAD
$PAD
Sh "7" R 787 1299 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "GND"
Po 1752 -1161
$EndPAD
$PAD
Sh "6" R 787 984 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "GND"
Po -1752 1161
$EndPAD
$PAD
Sh "7" R 787 984 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "GND"
Po 1752 1161
$EndPAD
$PAD
Sh "" C 354 354 0 0 0
Dr 354 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po -866 0
$EndPAD
$PAD
Sh "" C 354 354 0 0 0
Dr 354 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po 866 0
$EndPAD
$PAD
Sh "3" R 197 1496 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 3 "N-000315"
Po 0 -1418
$EndPAD
$PAD
Sh "4" R 197 1496 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 315 -1418
$EndPAD
$PAD
Sh "5" R 197 1496 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "GND"
Po 630 -1418
$EndPAD
$PAD
Sh "1" R 197 1496 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 4 "N-000328"
Po -630 -1418
$EndPAD
$PAD
Sh "2" R 197 1496 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "N-000310"
Po -315 -1418
$EndPAD
$EndMODULE USB_MINIB_SMT
$MODULE HRS-DM1AA
Po 0 0 0 15 4F34F118 00000000 ~~
Li HRS-DM1AA
Sc 00000000
AR /4B6ED75B/4BAA6A9C
Op 0 0 0
T0 -5000 -6425 320 320 0 70 N V 21 N "J411"
T1 0 0 320 320 0 70 N V 21 N "Hirose_DM1AA"
DS 4134 -5984 5512 -5984 120 21
DS 5512 6024 -5512 6024 120 21
DS -5512 -5984 -4685 -5984 120 21
DS -5512 4685 -5512 6024 120 21
DS 5511 6025 5511 4686 120 21
DS 5511 -2637 5511 3584 120 21
DS 5511 -5983 5511 -3779 120 21
DS 4133 -5511 3779 -5511 120 21
DS -4686 -5511 -4529 -5511 120 21
DS -5512 2521 -5512 2796 120 21
DS -5512 -983 -5512 1773 120 21
DS -5512 -2637 -5512 -1731 120 21
DS -5512 -5983 -5512 -3779 120 21
DS -4686 -5983 -4686 -5511 120 21
DS 4133 -5511 4133 -5983 120 21
$PAD
Sh "" C 512 512 0 0 0
Dr 512 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po -4686 -4999
$EndPAD
$PAD
Sh "" C 512 512 0 0 0
Dr 512 0 0
At HOLE N 00E0FFFF
Ne 0 ""
Po 4133 -4999
$EndPAD
$PAD
Sh "1" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 10 "SD_DAT3"
Po 2391 -5865
$EndPAD
$PAD
Sh "2" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 6 "SD_CMD"
Po 1407 -5865
$EndPAD
$PAD
Sh "3" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "GND"
Po 422 -5865
$EndPAD
$PAD
Sh "4" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "+3.3V"
Po -562 -5865
$EndPAD
$PAD
Sh "5" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 5 "SD_CLK"
Po -1546 -5865
$EndPAD
$PAD
Sh "6" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "GND"
Po -2530 -5865
$EndPAD
$PAD
Sh "7" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "SD_DAT0"
Po -3485 -5865
$EndPAD
$PAD
Sh "8" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 8 "SD_DAT1"
Po -4155 -5865
$EndPAD
$PAD
Sh "9" R 433 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 9 "SD_DAT2"
Po 3375 -5865
$EndPAD
$PAD
Sh "GND1" R 787 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "GND"
Po 5708 -3208
$EndPAD
$PAD
Sh "GND1" R 787 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "GND"
Po 5708 4135
$EndPAD
$PAD
Sh "GND1" R 787 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "GND"
Po -5710 -3208
$EndPAD
$PAD
Sh "GND1" R 787 787 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "GND"
Po -5710 4135
$EndPAD
$PAD
Sh "DT" R 787 394 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 4 "N-000318"
Po -5552 -1377
$EndPAD
$PAD
Sh "WP" R 787 394 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 3 "N-000295"
Po -5552 2147
$EndPAD
$PAD
Sh "GND2" R 787 394 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "GND"
Po -5552 3170
$EndPAD
$EndMODULE HRS-DM1AA
$MODULE R_PACK_0804_LONGPADS
Po 0 0 0 15 4F496244 00000000 ~~
Li R_PACK_0804_LONGPADS
Sc 00000000
AR /4B6E16F2/4D96310E
Op 0 0 0
T0 325 750 320 320 0 70 N V 21 N "RA105"
T1 0 0 320 320 0 70 N V 21 N "100"
DS -551 -472 -551 472 79 21
DS 551 -472 551 472 79 21
DS -551 -472 551 -472 79 21
DS 551 472 -551 472 79 21
$PAD
Sh "7" R 118 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 5 "N-000012"
Po -98 -236
$EndPAD
$PAD
Sh "6" R 118 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000143"
Po 98 -236
$EndPAD
$PAD
Sh "2" R 118 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "/SNES_Slot/SNES_EXT_/RD"
Po -98 236
$EndPAD
$PAD
Sh "3" R 118 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 3 "/SNES_Slot/SNES_EXT_/ROMSEL"
Po 98 236
$EndPAD
$PAD
Sh "8" R 197 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 8 "N-000147"
Po -335 -236
$EndPAD
$PAD
Sh "5" R 197 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 6 "N-000038"
Po 335 -236
$EndPAD
$PAD
Sh "4" R 197 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 4 "/SNES_Slot/SNES_EXT_A23"
Po 335 236
$EndPAD
$PAD
Sh "1" R 197 276 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "/SNES_Slot/SNES_EXT_/IRQ"
Po -335 236
$EndPAD
$EndMODULE R_PACK_0804_LONGPADS
$MODULE TSSOP48_LONGPADS
Po 0 0 0 15 4F497040 00000000 ~~
Li TSSOP48_LONGPADS
Sc 00000000
AR
Op 0 0 0
T0 0 -551 320 320 0 70 N V 21 N "Test"
T1 0 630 320 320 0 70 N V 21 N "VAL**"
DS -2461 1161 -2461 -1161 79 21
DS 2461 -1161 2461 1161 79 21
DC -2205 906 -2087 906 79 21
DS -2460 -1160 2460 -1160 79 21
DS -2460 1160 2460 1160 79 21
$PAD
Sh "1" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -2263 1614
$EndPAD
$PAD
Sh "2" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -2066 1614
$EndPAD
$PAD
Sh "3" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1870 1614
$EndPAD
$PAD
Sh "4" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1673 1614
$EndPAD
$PAD
Sh "5" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1476 1614
$EndPAD
$PAD
Sh "6" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1279 1614
$EndPAD
$PAD
Sh "7" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1082 1614
$EndPAD
$PAD
Sh "8" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -885 1614
$EndPAD
$PAD
Sh "9" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -688 1614
$EndPAD
$PAD
Sh "10" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -492 1614
$EndPAD
$PAD
Sh "11" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -295 1614
$EndPAD
$PAD
Sh "12" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -98 1614
$EndPAD
$PAD
Sh "13" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 98 1614
$EndPAD
$PAD
Sh "14" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 295 1614
$EndPAD
$PAD
Sh "15" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 492 1614
$EndPAD
$PAD
Sh "16" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 688 1614
$EndPAD
$PAD
Sh "17" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 885 1614
$EndPAD
$PAD
Sh "18" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1082 1614
$EndPAD
$PAD
Sh "19" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1279 1614
$EndPAD
$PAD
Sh "20" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1476 1614
$EndPAD
$PAD
Sh "21" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1673 1614
$EndPAD
$PAD
Sh "22" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1870 1614
$EndPAD
$PAD
Sh "23" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 2066 1614
$EndPAD
$PAD
Sh "24" R 118 630 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 2263 1614
$EndPAD
$PAD
Sh "25" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 2263 -1614
$EndPAD
$PAD
Sh "26" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 2066 -1614
$EndPAD
$PAD
Sh "27" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1870 -1614
$EndPAD
$PAD
Sh "28" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1673 -1614
$EndPAD
$PAD
Sh "29" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1476 -1614
$EndPAD
$PAD
Sh "30" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1279 -1614
$EndPAD
$PAD
Sh "31" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 1082 -1614
$EndPAD
$PAD
Sh "32" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 885 -1614
$EndPAD
$PAD
Sh "33" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 688 -1614
$EndPAD
$PAD
Sh "34" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 492 -1614
$EndPAD
$PAD
Sh "35" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 295 -1614
$EndPAD
$PAD
Sh "36" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 98 -1614
$EndPAD
$PAD
Sh "37" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -98 -1614
$EndPAD
$PAD
Sh "38" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -295 -1614
$EndPAD
$PAD
Sh "39" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -492 -1614
$EndPAD
$PAD
Sh "40" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -688 -1614
$EndPAD
$PAD
Sh "41" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -885 -1614
$EndPAD
$PAD
Sh "42" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1082 -1614
$EndPAD
$PAD
Sh "43" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1279 -1614
$EndPAD
$PAD
Sh "44" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1476 -1614
$EndPAD
$PAD
Sh "45" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1673 -1614
$EndPAD
$PAD
Sh "46" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -1870 -1614
$EndPAD
$PAD
Sh "47" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -2066 -1614
$EndPAD
$PAD
Sh "48" R 118 630 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po -2263 -1614
$EndPAD
$EndMODULE TSSOP48_LONGPADS
$EndLIBRARY

View File

@@ -1,7 +1,8 @@
PCBNEW-LibModule-V1 Mon 26 Jul 2010 02:13:00 PM CEST
PCBNEW-LibModule-V1 Tue 27 Dec 2011 12:52:27 PM CET
# encoding utf-8
$INDEX
SD-RSMT-2-MQ-WF
HRS-DM1AA
SD-RSMT-2-MQ-WF
$EndINDEX
$MODULE SD-RSMT-2-MQ-WF
Po 0 0 0 15 4C4D74E3 00000000 ~~
@@ -124,40 +125,39 @@ Po 3740 709
$EndPAD
$EndMODULE SD-RSMT-2-MQ-WF
$MODULE HRS-DM1AA
Po 0 0 0 15 4C4D706D 00000000 ~~
Po 0 0 0 15 4EF9108C 00000000 ~~
Li HRS-DM1AA
Sc 00000000
AR
AR HRS-DM1AA
Op 0 0 0
T0 0 0 300 300 0 60 N V 21 N"HRS-DM1AA"
T1 0 0 300 300 0 60 N V 21 N"VAL**"
DS -5906 4725 -5906 4686 120 21
DS 5905 6025 5905 4686 120 21
DS 5905 -2637 5905 3584 120 21
DS 5905 -5983 5905 -3779 120 21
T0 0 0 300 300 0 60 N V 21 N "HRS-DM1AA"
T1 0 0 300 300 0 60 N V 21 N "VAL**"
DS 4134 -5984 5512 -5984 120 21
DS 5512 6024 -5512 6024 120 21
DS -5512 -5984 -4685 -5984 120 21
DS -5512 4685 -5512 6024 120 21
DS 5511 6025 5511 4686 120 21
DS 5511 -2637 5511 3584 120 21
DS 5511 -5983 5511 -3779 120 21
DS 4133 -5511 3779 -5511 120 21
DS -4686 -5511 -4529 -5511 120 21
DS -5906 6025 -5906 4725 120 21
DS -5906 2521 -5906 2796 120 21
DS -5906 -983 -5906 1773 120 21
DS -5906 -2637 -5906 -1731 120 21
DS -5906 -5983 -5906 -3779 120 21
DS -5906 -5983 -4686 -5983 120 21
DS -5512 2521 -5512 2796 120 21
DS -5512 -983 -5512 1773 120 21
DS -5512 -2637 -5512 -1731 120 21
DS -5512 -5983 -5512 -3779 120 21
DS -4686 -5983 -4686 -5511 120 21
DS 4133 -5511 4133 -5983 120 21
DS 4133 -5983 5905 -5983 120 21
DS 5905 6025 -5906 6025 120 21
$PAD
Sh "~" C 512 512 0 0 0
Dr 512 0 0
At STD N 00E0FFFF
At STD N 0000FFFF
Ne 0 ""
Po -4686 -4999
$EndPAD
$PAD
Sh "~" C 512 512 0 0 0
Dr 512 0 0
At STD N 00E0FFFF
At STD N 0000FFFF
Ne 0 ""
Po 4133 -4999
$EndPAD

View File

@@ -1,7 +1,8 @@
PCBNEW-LibModule-V1 Mon 26 Jul 2010 09:33:33 PM CEST
PCBNEW-LibModule-V1 Sun 26 Feb 2012 12:17:38 AM CET
# encoding utf-8
$INDEX
SD-RSMT-2-MQ-WF
HRS-DM1AA
SD-RSMT-2-MQ-WF
$EndINDEX
$MODULE SD-RSMT-2-MQ-WF
Po 0 0 0 15 4C4D74E3 00000000 ~~
@@ -124,13 +125,13 @@ Po 3740 709
$EndPAD
$EndMODULE SD-RSMT-2-MQ-WF
$MODULE HRS-DM1AA
Po 0 0 0 15 4C4DE307 00000000 ~~
Po 0 0 0 15 4F496C0E 00000000 ~~
Li HRS-DM1AA
Sc 00000000
AR
AR HRS-DM1AA
Op 0 0 0
T0 0 0 300 300 0 60 N V 21 N"HRS-DM1AA"
T1 0 0 300 300 0 60 N V 21 N"VAL**"
T0 0 0 300 300 0 60 N V 21 N "HRS-DM1AA"
T1 0 0 300 300 0 60 N V 21 N "VAL**"
DS 4134 -5984 5512 -5984 120 21
DS 5512 6024 -5512 6024 120 21
DS -5512 -5984 -4685 -5984 120 21
@@ -147,16 +148,16 @@ DS -5512 -5983 -5512 -3779 120 21
DS -4686 -5983 -4686 -5511 120 21
DS 4133 -5511 4133 -5983 120 21
$PAD
Sh "~" C 512 512 0 0 0
Sh "" C 512 512 0 0 0
Dr 512 0 0
At STD N 00E0FFFF
At HOLE N 00E0FFFF
Ne 0 ""
Po -4686 -4999
$EndPAD
$PAD
Sh "~" C 512 512 0 0 0
Sh "" C 512 512 0 0 0
Dr 512 0 0
At STD N 00E0FFFF
At HOLE N 00E0FFFF
Ne 0 ""
Po 4133 -4999
$EndPAD

View File

@@ -1,4 +1,4 @@
PCBNEW-LibModule-V1 Mon 04 Jul 2011 12:35:33 AM CEST
PCBNEW-LibModule-V1 Thu 09 Feb 2012 09:51:59 PM CET
# encoding utf-8
$INDEX
SNESCART_EXT
@@ -537,7 +537,7 @@ Po 14331 -3780
$EndPAD
$EndMODULE SNESCART_EXT
$MODULE SNESCART_EXT2
Po 0 0 0 15 4E0F6C87 00000000 ~~
Po 0 0 0 15 4F3431E9 00000000 ~~
Li SNESCART_EXT2
Sc 00000000
AR /4B6E16F2/4B6E1766
@@ -546,6 +546,18 @@ Op 0 0 0
.SolderPaste -4
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
DS -20039 -5000 -20039 -8898 39 28
DS -18465 -4016 -18465 -5000 39 28
DS -19449 -2402 -19449 -4016 39 28
DS -17717 -2402 -17717 1693 39 28
DS 17717 -2402 17717 1693 39 28
DS 19921 -4094 19921 -2402 39 28
DS 19291 -29252 19291 -27756 39 28
DS -19488 -29252 -19488 -27756 39 28
DS -8524 -30709 -8524 -29252 39 28
DS 8622 -29252 8622 -30709 39 28
DS -20039 -24409 -20039 -12244 39 28
DS -19488 -27087 -19488 -24409 39 28
DC 1142 -11378 1929 -11378 79 20
DC 1142 -11378 1929 -11339 79 21
DS 19921 -24409 19921 -8976 39 28
@@ -556,46 +568,33 @@ DS 19291 -8189 19291 -6890 39 28
DS 18307 -8189 19291 -8189 39 28
DS 18307 -8976 18307 -8189 39 28
DS 19921 -8976 18307 -8976 39 28
DS -20039 -4803 -20039 -8898 39 28
DS -20039 -24528 -20039 -12244 39 28
DS -18465 -12244 -20039 -12244 39 28
DS -18465 -11457 -18465 -12244 39 28
DS -19449 -11457 -18465 -11457 39 28
DS -19449 -8898 -19449 -11457 39 28
DS -20039 -8898 -19449 -8898 39 28
DS -19488 -27087 -19488 -24528 39 28
DA -17441 1693 -17441 1969 900 39 28
DA -13071 1693 -12795 1693 900 39 28
DA -11535 1693 -11535 1969 900 39 28
DA 11535 1693 11811 1693 900 39 28
DA 13071 1693 13071 1969 900 39 28
DA 17441 1693 17717 1693 900 39 28
DS 8622 -29331 19291 -29331 40 28
DS 8622 -29252 19291 -29252 40 28
DS -8524 -30709 8622 -30709 40 28
DS -19488 -29331 -8524 -29331 40 28
DS -19488 -29252 -8524 -29252 40 28
DC 2796 -17047 3583 -17047 75 20
DC 2795 -17047 3582 -17047 75 21
DS 8622 -29331 8622 -30709 40 28
DS -8524 -30709 -8524 -29331 40 28
DS -19488 -29331 -19488 -27756 40 28
DS -19488 -27756 -18504 -27756 40 28
DS -18504 -27756 -18504 -27087 40 28
DS -18504 -27087 -19488 -27087 40 28
DS -19488 -24528 -20039 -24528 40 28
DS -20039 -4803 -18465 -4803 40 28
DS -18465 -4803 -18465 -4016 40 28
DS -19488 -24409 -20039 -24409 40 28
DS -20039 -5000 -18465 -5000 40 28
DS -18465 -4016 -19449 -4016 40 28
DS -19449 -4016 -19449 -2205 40 28
DS -19449 -2205 -17717 -2205 40 28
DS -17717 -2205 -17717 -2165 40 28
DS -19449 -2402 -17717 -2402 40 28
DS 19291 -27087 18307 -27087 40 28
DS 18307 -27087 18307 -27756 40 28
DS 18307 -27756 19291 -27756 40 28
DS 19291 -27756 19291 -29331 40 28
DS 17717 1693 17717 -2165 40 28
DS 17717 -2165 17717 -2205 40 28
DS 17717 -2205 19921 -2205 40 28
DS 19921 -2205 19921 -4094 40 28
DS 17717 -2402 19921 -2402 40 28
DS 19921 -4094 19291 -4094 40 28
DS 19291 -4094 19291 -6102 40 28
DS 19291 -6102 18307 -6102 40 28
@@ -604,7 +603,6 @@ DS 13071 1969 17441 1969 40 28
DS 11811 1693 11811 -2480 40 28
DS 11811 -2480 12795 -2480 40 28
DS 12795 -2480 12795 1693 40 28
DS -17717 1693 -17717 -2165 40 28
DS -13071 1969 -17441 1969 40 28
DS -11811 1693 -11811 -2480 40 28
DS -11811 -2480 -12795 -2480 40 28
@@ -864,6 +862,7 @@ Dr 0 0 0
At CONN N 00000001
Ne 0 ""
Po -16732 197
Le -65794
$EndPAD
$PAD
Sh "33" R 591 2756 0 0 0
@@ -871,6 +870,7 @@ Dr 0 0 0
At CONN N 00000001
Ne 49 "/SNES_Slot/SNES_EXT_REFRESH"
Po -15748 197
Le -197380
$EndPAD
$PAD
Sh "34" R 591 2756 0 0 0

View File

@@ -1,8 +1,9 @@
PCBNEW-LibModule-V1 Mon 04 Jul 2011 12:37:18 AM CEST
PCBNEW-LibModule-V1 Fri 10 Feb 2012 10:51:00 AM CET
# encoding utf-8
$INDEX
SNESCART_EXT
SNESCART_EXT2
SNESCART_EXT2_SMTUSB
$EndINDEX
$MODULE SNESCART_EXT
Po 0 0 0 15 4D200467 00000000 ~~
@@ -537,7 +538,7 @@ Po 14331 -3780
$EndPAD
$EndMODULE SNESCART_EXT
$MODULE SNESCART_EXT2
Po 0 0 0 15 4E10EF0E 00000000 ~~
Po 0 0 0 15 4F3431E9 00000000 ~~
Li SNESCART_EXT2
Sc 00000000
AR /4B6E16F2/4B6E1766
@@ -546,6 +547,16 @@ Op 0 0 0
.SolderPaste -4
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
DS -20039 -5000 -20039 -8898 39 28
DS -18465 -4016 -18465 -5000 39 28
DS -19449 -2402 -19449 -4016 39 28
DS -17717 -2402 -17717 1693 39 28
DS 17717 -2402 17717 1693 39 28
DS 19921 -4094 19921 -2402 39 28
DS 19291 -29252 19291 -27756 39 28
DS -19488 -29252 -19488 -27756 39 28
DS -8524 -30709 -8524 -29252 39 28
DS 8622 -29252 8622 -30709 39 28
DS -20039 -24409 -20039 -12244 39 28
DS -19488 -27087 -19488 -24409 39 28
DC 1142 -11378 1929 -11378 79 20
@@ -558,7 +569,6 @@ DS 19291 -8189 19291 -6890 39 28
DS 18307 -8189 19291 -8189 39 28
DS 18307 -8976 18307 -8189 39 28
DS 19921 -8976 18307 -8976 39 28
DS -20039 -4803 -20039 -8898 39 28
DS -18465 -12244 -20039 -12244 39 28
DS -18465 -11457 -18465 -12244 39 28
DS -19449 -11457 -18465 -11457 39 28
@@ -570,32 +580,22 @@ DA -11535 1693 -11535 1969 900 39 28
DA 11535 1693 11811 1693 900 39 28
DA 13071 1693 13071 1969 900 39 28
DA 17441 1693 17717 1693 900 39 28
DS 8622 -29331 19291 -29331 40 28
DS 8622 -29252 19291 -29252 40 28
DS -8524 -30709 8622 -30709 40 28
DS -19488 -29331 -8524 -29331 40 28
DS -19488 -29252 -8524 -29252 40 28
DC 2796 -17047 3583 -17047 75 20
DC 2795 -17047 3582 -17047 75 21
DS 8622 -29331 8622 -30709 40 28
DS -8524 -30709 -8524 -29331 40 28
DS -19488 -29331 -19488 -27756 40 28
DS -19488 -27756 -18504 -27756 40 28
DS -18504 -27756 -18504 -27087 40 28
DS -18504 -27087 -19488 -27087 40 28
DS -19488 -24409 -20039 -24409 40 28
DS -20039 -4803 -18465 -4803 40 28
DS -18465 -4803 -18465 -4016 40 28
DS -20039 -5000 -18465 -5000 40 28
DS -18465 -4016 -19449 -4016 40 28
DS -19449 -4016 -19449 -2205 40 28
DS -19449 -2205 -17717 -2205 40 28
DS -17717 -2205 -17717 -2165 40 28
DS -19449 -2402 -17717 -2402 40 28
DS 19291 -27087 18307 -27087 40 28
DS 18307 -27087 18307 -27756 40 28
DS 18307 -27756 19291 -27756 40 28
DS 19291 -27756 19291 -29331 40 28
DS 17717 1693 17717 -2165 40 28
DS 17717 -2165 17717 -2205 40 28
DS 17717 -2205 19921 -2205 40 28
DS 19921 -2205 19921 -4094 40 28
DS 17717 -2402 19921 -2402 40 28
DS 19921 -4094 19291 -4094 40 28
DS 19291 -4094 19291 -6102 40 28
DS 19291 -6102 18307 -6102 40 28
@@ -604,7 +604,6 @@ DS 13071 1969 17441 1969 40 28
DS 11811 1693 11811 -2480 40 28
DS 11811 -2480 12795 -2480 40 28
DS 12795 -2480 12795 1693 40 28
DS -17717 1693 -17717 -2165 40 28
DS -13071 1969 -17441 1969 40 28
DS -11811 1693 -11811 -2480 40 28
DS -11811 -2480 -12795 -2480 40 28
@@ -1147,4 +1146,614 @@ Po 14331 -3780
Le 23484672
$EndPAD
$EndMODULE SNESCART_EXT2
$MODULE SNESCART_EXT2_SMTUSB
Po 0 0 0 15 4F34E870 00000000 ~~
Li SNESCART_EXT2_SMTUSB
Sc 00000000
AR /4B6E16F2/4B6E1766
Op 0 0 0
.SolderMask 4
.SolderPaste -4
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
DS 8858 -29252 19291 -29252 39 28
DS 8622 -30709 8858 -30709 39 28
DS -20039 -5000 -20039 -8898 39 28
DS -18465 -4016 -18465 -5000 39 28
DS -19449 -2402 -19449 -4016 39 28
DS -17717 -2402 -17717 1693 39 28
DS 17717 -2402 17717 1693 39 28
DS 19921 -4094 19921 -2402 39 28
DS 19291 -29252 19291 -27756 39 28
DS -19488 -29252 -19488 -27756 39 28
DS -8524 -30709 -8524 -29252 39 28
DS 8858 -29252 8858 -30709 39 28
DS -20039 -24409 -20039 -12244 39 28
DS -19488 -27087 -19488 -24409 39 28
DC 1142 -11378 1929 -11378 79 20
DC 1142 -11378 1929 -11339 79 21
DS 19921 -24409 19921 -8976 39 28
DS 19291 -27087 19291 -24409 39 28
DS 19291 -24409 19921 -24409 39 28
DS 18307 -6890 19291 -6890 39 28
DS 19291 -8189 19291 -6890 39 28
DS 18307 -8189 19291 -8189 39 28
DS 18307 -8976 18307 -8189 39 28
DS 19921 -8976 18307 -8976 39 28
DS -18465 -12244 -20039 -12244 39 28
DS -18465 -11457 -18465 -12244 39 28
DS -19449 -11457 -18465 -11457 39 28
DS -19449 -8898 -19449 -11457 39 28
DS -20039 -8898 -19449 -8898 39 28
DA -17441 1693 -17441 1969 900 39 28
DA -13071 1693 -12795 1693 900 39 28
DA -11535 1693 -11535 1969 900 39 28
DA 11535 1693 11811 1693 900 39 28
DA 13071 1693 13071 1969 900 39 28
DA 17441 1693 17717 1693 900 39 28
DS -8524 -30709 8622 -30709 40 28
DS -19488 -29252 -8524 -29252 40 28
DC 2796 -17047 3583 -17047 75 20
DC 2795 -17047 3582 -17047 75 21
DS -19488 -27756 -18504 -27756 40 28
DS -18504 -27756 -18504 -27087 40 28
DS -18504 -27087 -19488 -27087 40 28
DS -19488 -24409 -20039 -24409 40 28
DS -20039 -5000 -18465 -5000 40 28
DS -18465 -4016 -19449 -4016 40 28
DS -19449 -2402 -17717 -2402 40 28
DS 19291 -27087 18307 -27087 40 28
DS 18307 -27087 18307 -27756 40 28
DS 18307 -27756 19291 -27756 40 28
DS 17717 -2402 19921 -2402 40 28
DS 19921 -4094 19291 -4094 40 28
DS 19291 -4094 19291 -6102 40 28
DS 19291 -6102 18307 -6102 40 28
DS 18307 -6102 18307 -6890 40 28
DS 13071 1969 17441 1969 40 28
DS 11811 1693 11811 -2480 40 28
DS 11811 -2480 12795 -2480 40 28
DS 12795 -2480 12795 1693 40 28
DS -13071 1969 -17441 1969 40 28
DS -11811 1693 -11811 -2480 40 28
DS -11811 -2480 -12795 -2480 40 28
DS -12795 -2480 -12795 1693 40 28
DS -11535 1969 11535 1969 40 28
$PAD
Sh "1" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 50 "/SNES_Slot/SNES_EXT_SYS_CLK"
Po -16732 197
Le 19
$EndPAD
$PAD
Sh "2" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 0 ""
Po -15748 197
Le 86
$EndPAD
$PAD
Sh "3" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 47 "/SNES_Slot/SNES_EXT_PA6"
Po -14764 197
Le 98
$EndPAD
$PAD
Sh "4" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 3 "/SNES_Slot/SNES_EXT_/PARD"
Po -13780 197
Le 353
$EndPAD
$PAD
Sh "5" R 787 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 57 "GND"
Po -10925 197
Le 46326
$EndPAD
$PAD
Sh "6" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 11 "/SNES_Slot/SNES_EXT_A11"
Po -9843 197
Le 41840
$EndPAD
$PAD
Sh "7" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 10 "/SNES_Slot/SNES_EXT_A10"
Po -8858 197
Le 33
$EndPAD
$PAD
Sh "8" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 31 "/SNES_Slot/SNES_EXT_A9"
Po -7874 197
Le 10
$EndPAD
$PAD
Sh "9" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 30 "/SNES_Slot/SNES_EXT_A8"
Po -6890 197
Le 40686
$EndPAD
$PAD
Sh "10" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 29 "/SNES_Slot/SNES_EXT_A7"
Po -5906 197
Le 32
$EndPAD
$PAD
Sh "11" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 28 "/SNES_Slot/SNES_EXT_A6"
Po -4921 197
Le 26720752
$EndPAD
$PAD
Sh "12" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 27 "/SNES_Slot/SNES_EXT_A5"
Po -3937 197
Le 44474
$EndPAD
$PAD
Sh "13" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 26 "/SNES_Slot/SNES_EXT_A4"
Po -2953 197
Le 41300
$EndPAD
$PAD
Sh "14" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 25 "/SNES_Slot/SNES_EXT_A3"
Po -1969 197
Le 26690192
$EndPAD
$PAD
Sh "15" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 20 "/SNES_Slot/SNES_EXT_A2"
Po -984 197
Le 778140282
$EndPAD
$PAD
Sh "16" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 9 "/SNES_Slot/SNES_EXT_A1"
Po 0 197
Le 45976
$EndPAD
$PAD
Sh "17" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 8 "/SNES_Slot/SNES_EXT_A0"
Po 984 197
Le 26692384
$EndPAD
$PAD
Sh "18" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 2 "/SNES_Slot/SNES_EXT_/IRQ"
Po 1969 197
Le 33
$EndPAD
$PAD
Sh "19" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 33 "/SNES_Slot/SNES_EXT_D0"
Po 2953 197
Le 101
$EndPAD
$PAD
Sh "20" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 34 "/SNES_Slot/SNES_EXT_D1"
Po 3937 197
Le 72
$EndPAD
$PAD
Sh "21" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 35 "/SNES_Slot/SNES_EXT_D2"
Po 4921 197
Le 1362898584
$EndPAD
$PAD
Sh "22" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 36 "/SNES_Slot/SNES_EXT_D3"
Po 5906 197
Le 193
$EndPAD
$PAD
Sh "23" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 5 "/SNES_Slot/SNES_EXT_/RD"
Po 6890 197
Le 1
$EndPAD
$PAD
Sh "24" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 56 "EXT_CIC_DATA1"
Po 7874 197
Le -268371600
$EndPAD
$PAD
Sh "25" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 54 "CIC_RESET"
Po 8858 197
Le 44216
$EndPAD
$PAD
Sh "26" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 58 "SNES_/RESET"
Po 9843 197
Le 26710224
$EndPAD
$PAD
Sh "27" R 787 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 1 "+5VL"
Po 10925 197
Le -268358496
$EndPAD
$PAD
Sh "28" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 41 "/SNES_Slot/SNES_EXT_PA0"
Po 13780 197
Le 40657
$EndPAD
$PAD
Sh "29" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 43 "/SNES_Slot/SNES_EXT_PA2"
Po 14764 197
Le 42
$EndPAD
$PAD
Sh "30" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 45 "/SNES_Slot/SNES_EXT_PA4"
Po 15748 197
Le 27776368
$EndPAD
$PAD
Sh "31" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00008000
Ne 51 "AUDIO_L"
Po 16732 197
Le 1376453976
$EndPAD
$PAD
Sh "32" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 0 ""
Po -16732 197
Le -65794
$EndPAD
$PAD
Sh "33" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 49 "/SNES_Slot/SNES_EXT_REFRESH"
Po -15748 197
Le -197380
$EndPAD
$PAD
Sh "34" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 48 "/SNES_Slot/SNES_EXT_PA7"
Po -14764 197
Le 26706208
$EndPAD
$PAD
Sh "35" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 4 "/SNES_Slot/SNES_EXT_/PAWR"
Po -13780 197
Le 48
$EndPAD
$PAD
Sh "36" R 787 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 57 "GND"
Po -10925 197
Le 26698352
$EndPAD
$PAD
Sh "37" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 12 "/SNES_Slot/SNES_EXT_A12"
Po -9843 197
Le 26703872
$EndPAD
$PAD
Sh "38" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 13 "/SNES_Slot/SNES_EXT_A13"
Po -8858 197
Le 2513
$EndPAD
$PAD
Sh "39" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 14 "/SNES_Slot/SNES_EXT_A14"
Po -7874 197
Le 48
$EndPAD
$PAD
Sh "40" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 15 "/SNES_Slot/SNES_EXT_A15"
Po -6890 197
Le 14164224
$EndPAD
$PAD
Sh "41" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 16 "/SNES_Slot/SNES_EXT_A16"
Po -5906 197
Le 14319616
$EndPAD
$PAD
Sh "42" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 17 "/SNES_Slot/SNES_EXT_A17"
Po -4921 197
Le 14154752
$EndPAD
$PAD
Sh "43" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 18 "/SNES_Slot/SNES_EXT_A18"
Po -3937 197
Le 192512
$EndPAD
$PAD
Sh "44" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 19 "/SNES_Slot/SNES_EXT_A19"
Po -2953 197
Le 39524
$EndPAD
$PAD
Sh "45" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 21 "/SNES_Slot/SNES_EXT_A20"
Po -1969 197
Le 1077956333
$EndPAD
$PAD
Sh "46" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 22 "/SNES_Slot/SNES_EXT_A21"
Po -984 197
Le 39959
$EndPAD
$PAD
Sh "47" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 23 "/SNES_Slot/SNES_EXT_A22"
Po 0 197
Le 1077938791
$EndPAD
$PAD
Sh "48" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 24 "/SNES_Slot/SNES_EXT_A23"
Po 984 197
Le 40274
$EndPAD
$PAD
Sh "49" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 6 "/SNES_Slot/SNES_EXT_/ROMSEL"
Po 1969 197
Le 40357
$EndPAD
$PAD
Sh "50" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 37 "/SNES_Slot/SNES_EXT_D4"
Po 2953 197
Le 40449
$EndPAD
$PAD
Sh "51" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 38 "/SNES_Slot/SNES_EXT_D5"
Po 3937 197
Le 1077956333
$EndPAD
$PAD
Sh "52" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 39 "/SNES_Slot/SNES_EXT_D6"
Po 4921 197
Le 23484672
$EndPAD
$PAD
Sh "53" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 40 "/SNES_Slot/SNES_EXT_D7"
Po 5906 197
Le 23484672
$EndPAD
$PAD
Sh "54" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 7 "/SNES_Slot/SNES_EXT_/WR"
Po 6890 197
Le 23484672
$EndPAD
$PAD
Sh "55" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 55 "EXT_CIC_DATA0"
Po 7874 197
Le 23484672
$EndPAD
$PAD
Sh "56" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 53 "CIC_CLK"
Po 8858 197
Le 23484672
$EndPAD
$PAD
Sh "57" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 32 "/SNES_Slot/SNES_EXT_CPU_CLK"
Po 9843 197
Le 23484672
$EndPAD
$PAD
Sh "58" R 787 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 1 "+5VL"
Po 10925 197
Le 23484672
$EndPAD
$PAD
Sh "59" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 42 "/SNES_Slot/SNES_EXT_PA1"
Po 13780 197
Le 23484672
$EndPAD
$PAD
Sh "60" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 44 "/SNES_Slot/SNES_EXT_PA3"
Po 14764 197
Le 23484672
$EndPAD
$PAD
Sh "61" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 46 "/SNES_Slot/SNES_EXT_PA5"
Po 15748 197
Le 1077941145
$EndPAD
$PAD
Sh "62" R 591 2756 0 0 0
Dr 0 0 0
At CONN N 00000001
Ne 52 "AUDIO_R"
Po 16732 197
Le 23484672
$EndPAD
$PAD
Sh "" R 4921 3150 0 0 0
Dr 0 0 0
At CONN N 00C00000
Ne 0 ""
Po -15256 394
Le 23484672
$EndPAD
$PAD
Sh "" R 4921 3150 0 0 0
Dr 0 0 0
At CONN N 00C00000
Ne 0 ""
Po 15256 394
Le 23484672
$EndPAD
$PAD
Sh "" R 23622 3150 0 0 0
Dr 0 0 0
At CONN N 00C00000
Ne 0 ""
Po 0 394
Le 23484672
$EndPAD
$PAD
Sh "" R 2362 1969 0 0 0
Dr 0 0 0
At CONN N 00400000
Ne 0 ""
Po -10945 -3819
Le 23484672
$EndPAD
$PAD
Sh "" R 2283 2362 0 0 0
Dr 0 0 0
At CONN N 00400000
Ne 0 ""
Po 14331 -3780
Le 23484672
$EndPAD
$EndMODULE SNESCART_EXT2_SMTUSB
$EndLIBRARY

File diff suppressed because it is too large Load Diff

View File

@@ -1,19 +1,23 @@
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 menu.o65 pad.o65 time.o65 mainmenu.o65 # gfx.o65 # vars.o65
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 menu.o65 pad.o65 time.o65 mainmenu.o65 sysinfo.o65 # gfx.o65 # vars.o65
all: menu.bin
all: clean menu.bin map
smc: menu.bin
cat menu.bin sd2snes.rom > menu.smc
map: menu.bin
utils/mkmap.sh $(OBJS)
menu.bin: $(OBJS)
sneslink -fsmc -o $@ $^
sneslink -fsmc -o $@ $^ 2>&1 | tee link.log
# Generic rule to create .o65 out from .a65
%.o65: %.a65
snescom -J -Wall -o $@ $<
snescom -J -Wall -o $@ $< 2>&1 | tee $@.log
# Generic rule to create .ips out from .a65
%.ips: %.a65
snescom -I -J -Wall -o $@ $<
snescom -I -J -Wall -o $@ $< 2>&1 | tee $@.log
clean:
rm -f *.ips *.o65 *~ menu.bin

View File

@@ -3,7 +3,7 @@ zero .word 0
bg2tile .byt $20
hdma_pal_src .byt 44
.byt $60, $2d
.byt 14
.byt 10
.byt $00, $00
.byt 2
.byt $60, $2d
@@ -29,7 +29,7 @@ hdma_pal_src .byt 44
.byt $20, $25
.byt 11
.byt $40, $29
.byt 31
.byt 29
.byt $60, $2d
.byt 2
.byt $20, $04
@@ -69,11 +69,11 @@ hdma_cg_addr_src
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00
hdma_mode_src .byt 64, $03, $01, $05, $00
hdma_scroll_src .byt 64
.byt $00, $00, $ff, $0f
hdma_mode_src .byt 56, $03, $01, $05, $00
hdma_scroll_src .byt 56
.byt $00, $00, $ff, $03
.byt $01
.byt $fc, $00, $05, $00
.byt $fc, $00, $1f, $03
.byt $00
; colors:
; upper border: + #547fff -> 10,15,31
@@ -93,30 +93,31 @@ hdma_math_src .byt 1 ; these are filled in...
.byt $00, $e0
.byt 0
oam_data_l .byt 75, 56, 31, $0e
.byt 83, 56, 1, $0e
.byt 91, 56, 2, $0e
.byt 99, 56, 3, $0e
.byt 107, 56, 4, $0e
.byt 115, 56, 5, $0e
.byt 123, 56, 6, $0e
.byt 131, 56, 7, $0e
.byt 75, 64, 8, $0e
.byt 83, 64, 9, $0e
.byt 91, 64, 10, $0e
.byt 99, 64, 11, $0e
.byt 107, 64, 12, $0e
.byt 115, 64, 13, $0e
.byt 123, 64, 14, $0e
.byt 131, 64, 15, $0e
.byt 75, 72, 16, $0e
.byt 83, 72, 17, $0e
.byt 91, 72, 18, $0e
.byt 99, 72, 19, $0e
.byt 75, 80, 24, $0e
.byt 83, 80, 25, $0e
.byt 91, 80, 26, $0e
oam_data_h .byt 0, 0, 0, 0, 0, 0, 0, 0
oam_data_l .byt 88, 56, 0, $08
.byt 96, 56, 1, $08
.byt 104, 56, 2, $08
.byt 112, 56, 3, $08
.byt 120, 56, 4, $08
.byt 128, 56, 5, $08
.byt 136, 56, 6, $08
.byt 88, 64, 7, $08
.byt 96, 64, 8, $08
.byt 104, 64, 9, $08
.byt 112, 64, 10, $08
.byt 88, 72, 14, $08
.byt 96, 72, 15, $08
.byt 157, 56, 21, $0a
.byt 171, 56, 22, $0c
.byt 179, 56, 23, $0c
.byt 171, 64, 24, $0c
.byt 171, 72, 26, $0c
.byt 171, 80, 28, $0c
.byt 171, 88, 30, $0c
.byt 171, 96, 32, $0c
.byt 193, 56, 34, $0e
.byt 193, 64, 35, $0e
.byt 193, 72, 36, $0e
oam_data_h .byt 0, 0, 0, 0, 0, 0, 0, 0, 0
space64 .byt $20, $20, $20, $20, $20, $20, $20, $20
.byt $20, $20, $20, $20, $20, $20, $20, $20
@@ -136,8 +137,10 @@ window_nh .byt 24
window_sh .byt 25
window_wv .byt 26
window_ev .byt 27
text_clkset .byt 28,"Please set the clock.", 29,0
text_buttonB .byt "Dpad: sel/chg, B: OK", 0
window_tl .byt 28
window_tr .byt 29
text_clkset .byt "Please set the clock.", 0
text_buttonB .byt "Dpad: sel/chg, A: OK", 0
time_win_x .byt 18
time_win_y .byt 15
time_win_w .byt 27
@@ -146,7 +149,15 @@ main_win_x .byt 18
main_win_y .byt 11
main_win_w .byt 27
main_win_h .byt 13
text_mainmenu .byt 28,"Main Menu", 29, 0
text_mainmenu .byt "Main Menu", 0
sysinfo_win_x .byt 10
sysinfo_win_y .byt 9
sysinfo_win_w .byt 43
sysinfo_win_h .byt 17
last_win_x .byt 2
last_win_y .byt 12
last_win_w .byt 60
last_win_h .byt 5
text_mm_file .byt "File Browser", 0
text_mm_last .byt "Run last game", 0
@@ -154,5 +165,7 @@ text_mm_time .byt "Set Clock", 0
text_mm_scic .byt "Enable SuperCIC", 0
text_mm_vmode_menu .byt "Menu video mode", 0
text_mm_vmode_game .byt "Game video mode", 0
text_mm_sysinfo .byt "System Information", 0
text_statusbar_keys .byt "A:Select B:Back X:Menu", 0
text_last .byt "Run previous ROM: Press Start again to confirm", 0
text_statusbar_keys .byt "B:Select A:Back X:Menu", 0

View File

@@ -1,3 +1,4 @@
*=$7E0000
.data
;don't anger the stack!
dirptr_addr .word 0
@@ -13,6 +14,8 @@ dirent_bank .word 0
dirent_type .byt 0
dirend_onscreen .byt 0
dirlog_idx .byt 0,0,0 ; long ptr
direntry_fits_idx
.byt 0,0
;----------parameters for text output----------
print_x .byt 0 ;x coordinate
@@ -25,7 +28,8 @@ print_pal .word 0 ;palette number for text output
print_temp .word 0 ;work variable
print_count .byt 0 ;how many characters may be printed?
print_count_tmp .byt 0 ;work variable
print_done .word 0 ;how many characters were printed?
print_done .word 0 ;how many characters were printed?
print_over .byt 0 ;was the string printed incompletely?
;----------parameters for dma----------
dma_a_bank .byt 0
dma_a_addr .word 0
@@ -77,6 +81,7 @@ time_y10 .byt 0
time_y100 .byt 0
time_sel .byt 0
time_exit .byt 0
time_cancel .byt 0
time_ptr .byt 0
time_tmp .byt 0
;--
@@ -169,5 +174,14 @@ dirlog .word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
direntry_fits
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
direntry_xscroll_state
.word 0
direntry_xscroll
.word 0
direntry_xscroll_wait
.word 0
infloop .byt 0,0 ; to be filled w/ 80 FE
wram_fadeloop .byt 0

File diff suppressed because it is too large Load Diff

View File

@@ -1,6 +1,16 @@
; This file is part of the snescom-asm demo - a demo of how to build a SNES program.
; This file is a modified version of the header.a65 file from:
; snescom-asm demo - a demo of how to build a SNES program.
; See http://bisqwit.iki.fi/source/snescom.html for details.
; fill whole area beforehand so the linker does not create multiple
; objects from it. (necessary for map creation)
*= $C0FF00
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
; Begin assembling to this address.
*= $C0FF00

File diff suppressed because it is too large Load Diff

View File

@@ -1,80 +1,69 @@
logospr .byt $00, $00, $00, $00, $00, $00, $00, $00
logospr .byt $50, $2f, $75, $2a, $7e, $21, $4a, $14
.byt $6f, $3e, $5b, $1b, $60, $20, $54, $00
.byt $10, $0f, $15, $0a, $1f, $00, $3e, $01
.byt $1e, $01, $3a, $05, $01, $1e, $21, $1f
.byt $f4, $8f, $fc, $83, $7f, $84, $fe, $05
.byt $fe, $07, $fb, $07, $fe, $02, $fe, $00
.byt $0c, $8b, $08, $0f, $03, $04, $83, $80
.byt $03, $00, $07, $04, $00, $01, $01, $01
.byt $0f, $f8, $4f, $b8, $f7, $00, $b7, $58
.byt $af, $e0, $ff, $f0, $0f, $10, $df, $e0
.byt $08, $f8, $40, $b8, $f8, $08, $f8, $08
.byt $e0, $10, $f0, $10, $00, $e0, $c0, $c0
.byt $ff, $00, $fb, $00, $f9, $00, $f8, $00
.byt $f8, $00, $f0, $00, $f0, $00, $f0, $00
.byt $00, $01, $03, $03, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $ff, $00, $7f, $fe, $61, $eb, $0a
.byt $7f, $00, $1f, $00, $00, $00, $00, $00
.byt $00, $ff, $00, $ff, $3f, $40, $35, $39
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $0f, $e0, $1f, $c0, $bf, $c0, $ff, $00
.byt $ff, $00, $fe, $00, $70, $00, $00, $00
.byt $10, $e0, $60, $80, $c0, $c0, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $f0, $00, $e0, $00, $e0, $00, $c0, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $7f, $2b, $5e, $1f, $7e, $3f, $6b, $2b
.byt $4f, $0f, $da, $1a, $c0, $22, $c0, $35
.byt $0a, $1e, $3e, $1e, $00, $1e, $14, $0a
.byt $30, $20, $25, $25, $1d, $1d, $0a, $0a
.byt $ff, $00, $ff, $00, $ff, $00, $ff, $00
.byt $ff, $00, $ff, $00, $ff, $00, $ff, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $00, $ff, $00, $83, $00, $00, $00
.byt $80, $00, $80, $00, $80, $00, $80, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $e0, $00, $e0, $00, $80, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $e0, $a0, $a1, $a0, $41, $80, $01, $c0
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $de, $3f, $9e, $7f, $bf, $7f, $bf, $7f
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $ff, $fe, $ff, $01, $fe, $00, $fe
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $00, $ff, $00, $ff, $00, $fe, $01
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $80, $80, $00, $80, $80, $80
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $7f, $7f, $7f, $7f, $7f, $7f, $ff
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $2f, $07, $13, $07, $11, $02, $48, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $df, $d8, $cb, $cc, $cd, $ce, $87, $86
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $ff, $ff, $ff, $00, $ff, $c5, $3b
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $00, $ff, $00, $ff, $00, $7f, $83
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $c0, $e0, $a0, $e0, $00, $00, $80, $80
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $0f, $ff, $3f, $7f, $bf, $7f, $ff
.byt $c0, $3f, $d5, $2a, $ff, $00, $7f, $00
.byt $7f, $00, $7f, $00, $3f, $00, $0f, $00
.byt $3f, $3f, $3f, $3f, $3f, $3f, $1e, $1e
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $04, $00, $08, $00, $10, $00, $10, $00
.byt $ff, $00, $ff, $00, $ff, $00, $ff, $00
.byt $ff, $00, $ff, $00, $fe, $00, $fc, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $f8, $f8, $f0, $f0, $e0, $e0, $e0, $e0
.byt $7f, $20, $7f, $20, $60, $00, $00, $20
.byt $00, $3f, $c0, $3f, $ff, $40, $ff, $00
.byt $3f, $20, $3f, $20, $20, $3f, $40, $7f
.byt $5f, $7f, $1f, $3f, $20, $7f, $20, $3f
.byt $c1, $01, $80, $00, $01, $01, $40, $40
.byt $00, $c0, $40, $c0, $c0, $40, $c0, $40
.byt $ff, $7f, $ff, $3e, $7e, $be, $3f, $bf
.byt $bf, $bf, $bf, $ff, $3f, $ff, $3f, $ff
.byt $ff, $00, $ff, $00, $01, $01, $01, $81
.byt $80, $fc, $5c, $4c, $00, $00, $18, $00
.byt $fe, $01, $ff, $01, $01, $ff, $00, $fe
.byt $3f, $fd, $bb, $db, $ff, $ff, $e7, $e7
.byt $00, $00, $00, $00, $00, $00, $c0, $c0
.byt $80, $80, $00, $00, $01, $00, $03, $00
.byt $ff, $ff, $ff, $ff, $ff, $ff, $3f, $ff
.byt $7f, $ff, $ff, $ff, $fe, $fe, $fc, $fc
.byt $46, $00, $41, $00, $40, $00, $40, $00
.byt $40, $00, $80, $00, $80, $00, $00, $00
.byt $81, $81, $80, $80, $80, $80, $80, $80
.byt $80, $80, $00, $00, $00, $00, $00, $00
.byt $44, $44, $00, $00, $78, $00, $03, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $bb, $83, $ff, $ff, $07, $07, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $03, $00, $fc, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $ff, $ff, $ff, $ff, $fc, $fc, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $60, $00, $c0, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $80, $80, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $e0, $5f, $a0, $5f, $bf, $40, $bf, $60
.byt $bf, $7f, $bf, $7f, $80, $40, $00, $40
.byt $20, $7f, $20, $3f, $3f, $3f, $3f, $3f
.byt $3f, $3f, $3f, $3f, $3f, $00, $bf, $80
.byt $00, $80, $10, $c0, $c0, $40, $e0, $40
.byt $c0, $c0, $e0, $e0, $60, $60, $00, $40
.byt $7f, $ff, $2f, $af, $bf, $bf, $9f, $9f
.byt $bf, $bf, $9f, $bf, $9f, $3f, $bf, $3f
.byt $13, $00, $10, $00, $10, $00, $08, $00
.byt $08, $00, $08, $00, $08, $00, $00, $00
.byt $e0, $e0, $e0, $e0, $e0, $e0, $f0, $f0
.byt $f0, $f0, $f0, $f0, $f0, $f0, $f8, $f8
.byt $fc, $00, $00, $00, $00, $00, $00, $00
.byt $80, $00, $80, $00, $80, $00, $80, $00
.byt $80, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
@@ -93,36 +82,67 @@ logospr .byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $3f, $7f, $3f, $7f, $c0, $7f, $80, $3f
.byt $3f, $3f, $1f, $1f, $00, $00, $00, $00
.byt $80, $80, $80, $80, $00, $40, $40, $40
.byt $40, $7f, $60, $7f, $3f, $3f, $1f, $1f
.byt $80, $c0, $80, $c0, $00, $c0, $40, $c0
.byt $80, $80, $00, $00, $00, $00, $00, $00
.byt $3f, $3f, $3f, $3f, $3f, $3f, $3f, $7f
.byt $7f, $ff, $ff, $ff, $ff, $ff, $ff, $ff
.byt $08, $00, $08, $00, $08, $00, $00, $00
.byt $00, $00, $00, $00, $20, $00, $40, $00
.byt $f0, $f0, $f0, $f0, $f0, $f0, $f0, $f0
.byt $f0, $f0, $e0, $e0, $c0, $c0, $80, $80
.byt $00, $20, $c0, $00, $80, $40, $c0, $40
.byt $00, $80, $40, $c0, $c0, $c0, $40, $00
.byt $00, $20, $40, $00, $40, $00, $40, $00
.byt $00, $40, $40, $00, $40, $00, $00, $40
.byt $7b, $06, $3a, $47, $3e, $43, $4c, $41
.byt $0f, $00, $1f, $10, $0f, $10, $1f, $10
.byt $06, $01, $06, $01, $02, $01, $30, $03
.byt $08, $02, $05, $00, $0b, $00, $05, $00
.byt $fc, $02, $d8, $7c, $80, $00, $80, $00
.byt $80, $40, $c0, $40, $80, $80, $00, $00
.byt $00, $00, $00, $40, $40, $00, $40, $40
.byt $80, $00, $00, $00, $00, $80, $80, $00
.byt $07, $19, $0e, $10, $14, $1a, $18, $16
.byt $10, $0e, $02, $1c, $00, $1e, $10, $1e
.byt $0e, $08, $0e, $00, $0e, $0a, $0e, $06
.byt $1e, $1e, $0e, $0c, $0e, $0e, $0e, $0e
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $0b, $1f, $15, $1e, $1e, $1e, $06, $1e
.byt $0f, $1f, $1f, $0f, $0f, $0f, $0f, $0f
.byt $04, $0e, $0b, $0f, $01, $0f, $09, $0e
.byt $09, $0f, $14, $1f, $0a, $0f, $05, $0f
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $0f, $1f, $0f, $0f, $05, $05, $0a, $0a
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $0f, $0f, $1f, $1f, $1f, $05, $1f, $0a
.byt $1f, $08, $1f, $00, $1f, $0a, $1f, $15
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $02, $00, $10
.byt $00, $0e, $00, $15, $10, $0f, $10, $0f
.byt $1f, $1f, $1f, $1f, $1d, $1d, $0f, $0f
.byt $11, $11, $0a, $0a, $10, $10, $10, $10
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $0a, $05, $05, $0a, $0f, $00, $0f, $00
.byt $0f, $0a, $07, $05, $00, $00, $00, $00
.byt $0a, $0a, $05, $05, $0f, $0f, $0f, $0f
.byt $05, $05, $02, $02, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $5f, $2f, $5f, $2f, $70, $2f, $40, $1f
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $1f, $00, $1f, $00, $1f, $00, $3f, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $09, $00, $01, $08, $0f, $08, $05, $00
.byt $03, $05, $07, $05, $00, $02, $06, $00
.byt $07, $00, $07, $00, $05, $02, $03, $00
.byt $04, $03, $05, $02, $00, $06, $00, $02
.byt $00, $06, $02, $04, $06, $04, $00, $02
.byt $02, $00, $00, $02, $02, $00, $02, $00
.byt $00, $02, $00, $02, $02, $06, $04, $06
.byt $06, $06, $04, $06, $06, $06, $06, $06
.byt $02, $04, $00, $06, $02, $04, $00, $06
.byt $06, $06, $04, $06, $00, $04, $00, $00
.byt $06, $06, $06, $06, $06, $06, $06, $06
.byt $06, $06, $06, $04, $04, $02, $00, $06

View File

@@ -97,15 +97,8 @@ setup_gfx:
sta $2183
DMA0(#$08, #0, #^zero, #!zero, #$80)
;copy 2bpp font (can be used as 4-bit lores font!)
ldx #$4000
stx $2116
DMA0(#$01, #$2000, #^font2, #!font2, #$18)
;copy 4bpp font
ldx #$0000
stx $2116
DMA0(#$01, #$4000, #^font4, #!font4, #$18)
;generate fonts
jsr genfonts
;clear BG1 tilemap
ldx #BG1_TILE_BASE
@@ -127,23 +120,28 @@ setup_gfx:
stx $2116
DMA0(#$01, #$4000, #^logo, #!logo, #$18)
;copy logo tilemap
;generate logo tilemap
ldx #BG1_TILE_BASE
stx $2116
DMA0(#$01, #$280, #^logomap, #!logomap, #$18)
ldx #$0100
- stx $2118
inx
cpx #$01e0
bne -
;copy sprites tiles
ldx #OAM_TILE_BASE
stx $2116
DMA0(#$01, #$400, #^logospr, #!logospr, #$18)
DMA0(#$01, #$500, #^logospr, #!logospr, #$18)
;set OAM tables
ldx #$0000
stx $2102
DMA0(#$00, #$5C, #^oam_data_l, #!oam_data_l, #$04)
DMA0(#$00, #$60, #^oam_data_l, #!oam_data_l, #$04)
ldx #$0100
stx $2102
DMA0(#$00, #$08, #^oam_data_h, #!oam_data_h, #$04)
DMA0(#$00, #$09, #^oam_data_h, #!oam_data_h, #$04)
;set palette
stz $2121
@@ -232,7 +230,7 @@ tests:
lda #9
sta bar_yl
rts
snes_init:
sep #$20 : .as ;8-bit accumulator
rep #$10 : .xl ;16-bit index
@@ -283,7 +281,7 @@ snes_init:
stz $2113 ;
stz $2114 ;
stz $2114 ;
lda #$80
lda #$80
sta $2115 ;
stz $2116 ;
stz $2117 ;
@@ -387,3 +385,59 @@ fadeloop_start
fadeloop_end:
.byt $ff
genfonts:
php
rep #$10 : .xl
sep #$20 : .as
;clear VRAM font areas
ldx #$0000
stx $2116
DMA0(#$09, #$4000, #^zero, #!zero, #$18)
ldx #$4000
stx $2116
DMA0(#$09, #$2000, #^zero, #!zero, #$18)
sep #$10 : .xs
rep #$20 : .al
stz $2116
ldx #$01
stx $4300
ldx #^font
stx $4304
lda #!font
sta $4302
lda #$0010
sta $4305
ldx #$18
stx $4301
lda #$0000
- sta $2116
ldx #$10
stx $4305
ldx #$01
stx $420b
clc
adc #$20
cmp #$2000
bne -
ldx #^font
stx $4304
lda #!font
sta $4302
lda #$4000
- sta $2116
ldx #$10
stx $4305
ldx #$01
stx $420b
clc
adc #$10
cmp #$5000
bne -
plp
rts

View File

@@ -1,6 +1,6 @@
#include "memmap.i65"
;number of menu entries
main_entries .byt 1
main_entries .byt 2
;menu entry data
main_enttab ;Set Clock
.word !text_mm_time
@@ -8,6 +8,11 @@ main_enttab ;Set Clock
.word !time_init-1
.byt ^time_init
.byt 1, 0
;System Information
.word !text_mm_sysinfo
.byt ^text_mm_sysinfo
.word !show_sysinfo-1
.byt ^show_sysinfo
;SuperCIC
.word !text_mm_scic
.byt ^text_mm_scic
@@ -115,13 +120,13 @@ mm_menuloop
and pad1trig+1
bne mmkey_b
bra mm_menuloop
mmkey_a
mmkey_b
jsr restore_screen
plp
rts
mmkey_b
jsr mmkey_b_2
mmkey_a
jsr mmkey_a_2
jmp mm_redraw
mmkey_down
@@ -151,10 +156,10 @@ mmkey_up_2
+
rts
mmkey_b_2
mmkey_a_2
jsr restore_screen
phk ; push return bank for subroutine
per mmkey_b_2_return-1 ; push return addr for subroutine
per mmkey_a_2_return-1 ; push return addr for subroutine
xba
lda #$00
xba
@@ -170,7 +175,7 @@ mmkey_b_2
pha ; push subroutine addr
sep #$20 : .as
rtl ; jump to subroutine
mmkey_b_2_return
mmkey_a_2_return
rts
mm_do_refresh

View File

@@ -20,5 +20,10 @@
#define AVR_CMD $307000
#define AVR_PARAM $307004
#define RTC_STATUS $307100
#define LAST_STATUS $307101
#define SYSINFO_BLK $307200
#define LAST_GAME $307420
#define ROOT_DIR $C10000
#define CMD_SYSINFO $03

View File

@@ -23,6 +23,8 @@ menu_init:
ldx #$0000
stx dirptr_idx
stx menu_sel
stx direntry_xscroll
stx direntry_xscroll_state
lda #$01
sta menu_dirty
rep #$20 : .al
@@ -47,6 +49,7 @@ menuloop_s1
lda menu_dirty ;is there ANY reason to redraw the menu?
cmp #$01
beq menuloop_redraw ;then do
jsr scroll_direntry
bra menuloop_s1
menuloop_redraw
stz menu_dirty
@@ -126,6 +129,9 @@ menu_updates:
lda #$80
and pad1trig+1
bne key_b
lda #$10
and pad1trig+1
bne key_start
lda #$20
and pad1trig+1
bne key_select
@@ -157,10 +163,12 @@ key_a
key_x
jsr menu_key_x
bra menuupd_out
key_select
jsr menu_key_select
bra menuupd_out
key_start
jsr menu_key_start
bra menuupd_out
menuupd_out
lda #$09
@@ -179,6 +187,7 @@ menu_redraw_out
redraw_filelist
ldy #$0000
sty dirptr_idx
sty direntry_fits_idx
stz dirend_idx
stz dirend_onscreen
redraw_filelist_loop
@@ -206,15 +215,17 @@ redraw_filelist_loop
sta @dirent_type
sty dirptr_idx
jsr print_direntry
inc direntry_fits_idx
bra redraw_filelist_loop
redraw_filelist_dirend
dey ; recover last valid direntry number
dey ; (we had 2x iny of the direntry pointer above,
beq +
dey ; so account for those too)
dey
dey
dey
sty dirend_idx ; dirend_idx <- last valid directory entry.
+ sty dirend_idx ; dirend_idx <- last valid directory entry.
lda #$01 ; encountered during redraw, so must be on screen
sta dirend_onscreen
bra redraw_filelist_out
@@ -283,6 +294,8 @@ dirent_type_cont
txa
clc
adc @fd_fnoff
clc
adc @direntry_xscroll
sta @fd_fnoff
plb
@@ -297,12 +310,14 @@ dirent_type_cont
lda dirent_bank
sta print_bank
jsr hiprint
lda cursor_x
clc
adc print_done
sta print_x
lda print_over
ldy direntry_fits_idx
sta !direntry_fits, y
lda #54
sec
sbc print_done
@@ -338,6 +353,7 @@ dirent_type_cont_2
rts
menu_key_down:
jsr scroll_direntry_clean
lda listdisp
dec
cmp menu_sel
@@ -371,6 +387,7 @@ down_out
rts
menu_key_up:
jsr scroll_direntry_clean
lda menu_sel
bne up_noscroll
lda #$01
@@ -393,6 +410,7 @@ up_out
rts
menuupd_lastcursor
jsr scroll_direntry_clean
lda dirend_idx
lsr
lsr
@@ -401,6 +419,8 @@ menuupd_lastcursor
; go back one page
menu_key_left:
stz direntry_xscroll
stz direntry_xscroll_state
lda #$01 ; must redraw afterwards
sta menu_dirty
rep #$20 : .al
@@ -426,6 +446,8 @@ menu_key_left:
; go forth one page
menu_key_right:
stz direntry_xscroll
stz direntry_xscroll_state
sep #$20 : .as
lda dirend_onscreen
bne menuupd_lastcursor
@@ -441,29 +463,26 @@ menu_key_right:
sep #$20 : .as
rts
menu_key_b:
menu_key_a:
jsr select_item
rts
menu_key_select:
lda barstep
beq do_setup448
do_setup224
jsr setup_224
rts
do_setup448
jsr setup_448
rts
menu_key_a:
menu_key_start:
jsr select_last_file
rts
menu_key_b:
rep #$20 : .al
lda dirstart_addr
beq skip_key_a
beq skip_key_b
sta dirptr_addr
lda #$0000
sta menu_sel
bra select_item
skip_key_a
skip_key_b
sep #$20 : .as
rts
@@ -513,6 +532,7 @@ select_file:
sep #$20 : .as
lda #$01
sta @AVR_CMD
select_file_fade:
lda #$00
sta @$4200
sei
@@ -631,10 +651,10 @@ setup_224_adjsel
+
lda #18*64
sta textdmasize
lda #$0007
lda #$000b
sta hdma_scroll+8
sep #$20 : .as
lda #$07
lda #$0b
sta $2110
lda #$00
sta $2110
@@ -666,32 +686,6 @@ setup_224_adjsel
plp
rts
setup_448:
php
rep #$30 : .xl : .al
lda #36
sta listdisp
lda #36*64
sta textdmasize
lda #$ffc6
sta hdma_scroll+8
sep #$20 : .as
lda #$c6
sta $2110
lda #$ff
sta $2110
lda #$01
sta barstep
ora #$08
sta $2133
lda #$04
sta hdma_math_selection
lda #$01
sta vidmode
sta menu_dirty
plp
rts
menu_statusbar
pha
phx
@@ -722,3 +716,141 @@ menu_statusbar
pla
rts
select_last_file:
php
sep #$20 : .as
rep #$10 : .xl
lda @LAST_STATUS
bne +
plp
rts
+ jsr backup_screen
lda #^text_last
sta window_tbank
ldx #!text_last
stx window_taddr
lda @last_win_x
sta window_x
inc
inc
sta bar_xl
pha
lda @last_win_y
sta window_y
inc
sta bar_yl
inc
pha
lda @last_win_w
sta window_w
lda @last_win_h
sta window_h
jsr draw_window
stz print_pal
lda #^LAST_GAME
ldx #!LAST_GAME
sta print_bank
stx print_src
stz print_pal
pla
sta print_y
pla
sta print_x
lda #56
sta bar_wl
sta print_count
jsr hiprint
- lda isr_done
lsr
bcc -
jsr printtime
jsr read_pad
lda #$80
and pad1trig+1
bne +
lda #$10
and pad1trig+1
beq -
lda #$04
sta @AVR_CMD
jmp select_file_fade
+ jsr restore_screen
plp
rts
scroll_direntry_clean:
lda #$01
sta direntry_xscroll_state
stz direntry_xscroll
stz direntry_xscroll_wait
jsr scroll_direntry
stz direntry_xscroll_state
stz direntry_xscroll
rts
scroll_direntry:
ldy menu_sel
lda direntry_xscroll_state
bne +
lda direntry_fits, y
bne scroll_direntry_enter
; stz direntry_xscroll_state
rts
scroll_direntry_enter
lda #$01
sta direntry_xscroll_state
stz direntry_xscroll_wait
+ lda direntry_xscroll_wait
beq +
dec direntry_xscroll_wait
rts
+ lda direntry_xscroll
bne scroll_direntry_scrollfast
lda #$28
bra +
scroll_direntry_scrollfast
lda #$10
+ sta direntry_xscroll_wait
tya
clc
adc #$09
sta cursor_y
lda #$02
sta cursor_x
rep #$20 : .al
lda menu_sel
asl
asl
tay
lda [dirptr_addr], y
sta @dirent_addr
iny
iny
sep #$20 : .as
lda [dirptr_addr], y ; load fileinfo bank
clc
adc #$c0 ; add $C0 for memory map
sta @dirent_bank ; store as current bank
iny
lda [dirptr_addr], y
iny
sta @dirent_type
ldy menu_sel
sty direntry_fits_idx
phy
jsr print_direntry
ply
lda direntry_fits, y
bne +
lda #$ff
sta direntry_xscroll_state
lda #$28
sta direntry_xscroll_wait
+ lda direntry_xscroll_state
adc direntry_xscroll
sta direntry_xscroll
bne +
lda #$01
sta direntry_xscroll_state
+ rts

View File

@@ -1,77 +1,64 @@
palette
;8bit palette; 4bit palette0; 2bit palette0
.byt $42, $08, $ff, $7f, $c6, $18, $18, $63
;2bit palette1
.byt $42, $08, $ff, $43, $c6, $0c, $18, $63
;2bit palette2
.byt $42, $08, $f0, $43, $c0, $0c, $18, $63
;2bit palette3
palette .byt $1f, $7c, $ff, $7f, $c6, $18, $18, $63
.byt $00, $00, $ff, $43, $c6, $0c, $18, $33
.byt $00, $00, $f0, $43, $c3, $0c, $0c, $33
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $00, $00, $ff, $43, $c6, $0c, $18, $33
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $00, $00, $f0, $43, $c3, $0c, $0c, $33
.byt $40, $08, $60, $0c, $80, $10, $80, $0c
.byt $80, $14, $a0, $14, $05, $21, $30, $42
.byt $0f, $3e, $cd, $3d, $c1, $18, $52, $4a
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $d6, $5a, $6b, $2d, $39, $67, $7a, $6b
.byt $ce, $39, $46, $29, $94, $52, $ad, $35
.byt $a2, $14, $aa, $35, $c0, $18, $18, $63
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $e0, $1c, $a0, $18, $c3, $18, $29, $25
.byt $4a, $29, $ff, $7f, $21, $04, $bd, $73
.byt $fe, $7b, $e7, $18, $42, $08, $00, $00
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $a5, $14, $79, $7b, $e6, $1c, $63, $0c
.byt $de, $7f, $bd, $7f, $08, $21, $8c, $31
.byt $6a, $2d, $08, $25, $61, $29, $00, $21
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $c4, $45, $45, $5a, $a5, $6e, $e6, $7e
.byt $c7, $10, $b4, $66, $82, $35, $27, $35
.byt $8b, $3d, $66, $59, $85, $69, $6f, $76
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $83, $75, $37, $7f, $46, $45, $0a, $7a
.byt $9b, $7f, $d2, $7a, $15, $7f, $c0, $3c
.byt $08, $11, $21, $25, $86, $52, $0e, $25
.byt $d9, $1c, $f1, $1c, $9e, $14, $ef, $1c
.byt $ca, $18, $9d, $14, $36, $29, $d3, $72
.byt $50, $5a, $81, $28, $cd, $49, $6a, $26
.byt $c7, $15, $63, $25, $4f, $23, $ac, $1e
.byt $05, $0d, $0e, $2b, $25, $0d, $c4, $08
.byt $62, $04, $e7, $29, $b2, $18, $6c, $0c
.byt $82, $04, $ce, $19, $31, $1a, $ff, $17
.byt $dd, $1b, $7b, $1f, $4a, $11, $d6, $1a
.byt $29, $73, $4d, $63, $50, $4f, $d3, $26
.byt $b8, $37, $26, $08, $fe, $20, $94, $3f
.byt $a3, $04, $10, $42, $10, $42, $10, $42
.byt $10, $42, $10, $42, $10, $42, $10, $42
;4bit palette1; 2bit palette4
.byt $42, $08, $ff, $43, $c6, $0c, $18, $63
;2bit palette5
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
.byt $1f, $74, $00, $00, $08, $21, $8c, $31
.byt $ce, $39, $bd, $77, $7b, $6f, $39, $67
.byt $d6, $5a, $94, $52, $ff, $7f, $10, $42
.byt $4a, $29, $84, $10, $c6, $18, $52, $4a
.byt $1f, $74, $45, $11, $e3, $10, $a1, $0c
.byt $e8, $19, $4f, $27, $0e, $23, $ed, $22
.byt $2e, $23, $09, $1a, $cc, $22, $24, $11
.byt $10, $42, $10, $42, $10, $42, $10, $42
;2bit palette6
.byt $10, $42, $10, $42, $10, $42, $10, $42
;2bit palette7
.byt $10, $42, $10, $42, $10, $42, $10, $42
;4bit palette2
.byt $10, $42, $f0, $43, $c0, $0c, $18, $63
;logo
.byt $00, $00, $00, $00, $20, $04, $20, $00
.byt $20, $00, $21, $00, $21, $08, $40, $08
.byt $40, $04, $42, $04, $42, $0c, $60, $0c
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $62, $0c, $61, $0c, $62, $00, $63, $0c
.byt $63, $10, $62, $08, $80, $10, $64, $0c
.byt $a0, $14, $84, $10, $a2, $0c, $a4, $0c
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $a4, $10, $c0, $18, $a4, $14, $a6, $14
.byt $a5, $14, $89, $14, $e0, $1c, $c5, $10
.byt $c6, $18, $e3, $0c, $e5, $1c, $00, $21
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $04, $0d, $ca, $18, $04, $11, $e7, $1c
.byt $20, $25, $21, $1d, $5d, $0c, $08, $15
.byt $40, $29, $08, $21, $5e, $10, $5d, $10
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $cf, $20, $7b, $10, $7e, $14, $27, $25
.byt $60, $31, $28, $25, $44, $29, $61, $29
.byt $46, $29, $29, $25, $62, $2d, $f3, $1c
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $66, $15, $d6, $18, $63, $31, $d8, $18
.byt $0e, $25, $80, $35, $48, $29, $bb, $18
.byt $4a, $29, $66, $2d, $4b, $29, $a3, $2d
.byt $a0, $39, $f6, $20, $6a, $15, $6a, $19
.byt $32, $21, $a1, $39, $a1, $41, $31, $29
.byt $4e, $31, $a2, $39, $c0, $3d, $6b, $2d
.byt $8a, $31, $6d, $2d, $c8, $19, $00, $42
.byt $8c, $31, $e3, $3d, $ac, $19, $e3, $45
.byt $ad, $15, $e3, $49, $02, $42, $e6, $2d
.byt $20, $42, $ad, $35, $24, $46, $24, $4e
.byt $28, $2e, $42, $46, $ee, $39, $45, $4a
.byt $2a, $16, $48, $2e, $0f, $1e, $46, $56
.byt $64, $4a, $44, $5e, $0f, $3e, $64, $4e
.byt $65, $5a, $83, $4e, $67, $4e, $30, $42
.byt $86, $4e, $32, $46, $6d, $2e, $52, $1a
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $00, $00, $00, $00, $00, $00, $00, $00
.byt $8b, $22, $a5, $56, $51, $46, $ab, $1a
.byt $a5, $6a, $a5, $6e, $c1, $76, $c7, $5a
.byt $93, $16, $e0, $7a, $72, $4a, $cc, $26
.byt $b0, $2a, $93, $4e, $e5, $7e, $e8, $5e
.byt $b5, $1e, $ed, $1e, $e6, $7e, $b5, $16
.byt $95, $52, $b3, $56, $b5, $56, $0a, $63
.byt $2d, $1b, $29, $67, $2f, $23, $f4, $2a
.byt $d6, $5a, $17, $1b, $4a, $6b, $4d, $67
.byt $f7, $5e, $f8, $62, $39, $1f, $18, $63
.byt $6c, $73, $78, $23, $39, $67, $7b, $1b
.byt $5a, $6b, $7b, $6f, $de, $17, $9c, $73
.byt $bd, $77, $ff, $13, $de, $7b, $ff, $7f
;sprite palette 7
.byt $3f, $7c, $20, $08, $84, $0c, $a5, $14
.byt $08, $21, $5a, $6b, $bc, $73, $fe, $7b
.byt $f7, $5e, $73, $4e, $10, $42, $42, $08
.byt $00, $00, $ad, $35, $b5, $56, $6b, $2d
.byt $1f, $74, $df, $17, $47, $15, $c3, $0c
.byt $0e, $12, $7b, $13, $b9, $33, $06, $7f
.byt $2c, $63, $75, $3b, $72, $4f, $93, $16
.byt $aa, $15, $24, $15, $17, $13, $50, $16
.byt $1f, $74, $0e, $21, $54, $29, $a6, $14
.byt $7e, $14, $5a, $2d, $10, $21, $0d, $25
.byt $eb, $20, $9c, $14, $99, $14, $37, $29
.byt $f6, $1c, $96, $14, $d3, $1c, $f1, $1c

View File

@@ -39,6 +39,8 @@ NMI_ROUTINE:
php
txa
dec
dec
dec
plp
bne small_bar
asl

91
snes/sysinfo.a65 Normal file
View File

@@ -0,0 +1,91 @@
#include "memmap.i65"
; sysinfo.a65: display sysinfo text block
.byt "===SHOW_SYSINFO==="
show_sysinfo:
php
sep #$20 : .as
rep #$10 : .xl
stz bar_wl
dec bar_wl
stz bar_xl
dec bar_xl
stz bar_yl
dec bar_yl
jsr backup_screen
lda #^text_mm_sysinfo
sta window_tbank
ldx #!text_mm_sysinfo
stx window_taddr
lda @sysinfo_win_x
sta window_x
inc
inc
pha
stz print_x+1
lda @sysinfo_win_y
sta window_y
inc
inc
pha
stz print_y+1
lda @sysinfo_win_w
sta window_w
lda @sysinfo_win_h
sta window_h
jsr draw_window
stz print_pal
sysinfo_printloop:
sep #$20 : .as
rep #$10 : .xl
lda #CMD_SYSINFO
sta @AVR_CMD
lda #^SYSINFO_BLK
ldx #!SYSINFO_BLK
sta print_bank
stx print_src
stz print_pal
pla
sta print_y
pla
sta print_x
lda #40
sta print_count
lda #13
- pha
jsr hiprint
inc print_y
rep #$20 : .al
lda print_src
clc
adc #40
sta print_src
sep #$20 : .as
pla
dec
bne -
- lda isr_done
lsr
bcc -
jsr printtime
jsr read_pad
lda #$80
and pad1trig
bne +
lda #$80
and pad1trig+1
bne +
lda @sysinfo_win_x
inc
inc
pha
lda @sysinfo_win_y
inc
inc
pha
jmp sysinfo_printloop
+ plp
jsr restore_screen
lda #$00
sta @AVR_CMD
rtl

17
snes/tests/Makefile Normal file
View File

@@ -0,0 +1,17 @@
OBJS = header.ips reset.o65 tests.o65
all: test.bin
test.bin: $(OBJS)
sneslink -fsmc -o $@ $^
# Generic rule to create .o65 out from .a65
%.o65: %.a65
snescom -J -Wall -o $@ $<
# Generic rule to create .ips out from .a65
%.ips: %.a65
snescom -I -J -Wall -o $@ $<
clean:
rm -f *.ips *.o65 *~ test.bin

121
snes/tests/header.a65 Normal file
View File

@@ -0,0 +1,121 @@
; This file is part of the snescom-asm demo - a demo of how to build a SNES program.
; See http://bisqwit.iki.fi/source/snescom.html for details.
; Begin assembling to this address.
*= $C0F000
LINETEST:
sei
clc
xce
- lda $0000
lda $2100
sta $2100
bra -
*= $C0F100
IRQTEST:
sei
clc
xce
cli
sep #$20 : .as
rep #$10 : .xl
lda #$0f
sta $2100
lda #$ff
sta $4209
lda #$ff
sta $420a
lda #$ff
sta $4200
lda #$01
- sta @$002222
bra -
*= $C0F200
BANKTEST:
sei
clc
xce
sep #$20 : .as
lda #$01
sta @$0055aa
- bra -
*= $C0FF00
RESET:
sei
clc
xce
rep #$20 : .al
lda #$1fff
tcs
lda #$00
sta @$003333
jmp @GAME_MAIN
NMI_16bit:
php
rep #$30 : .al : .xl
pha: phx: phy: phd: phb
jsl @NMI_ROUTINE
rep #$30 : .al : .xl
int_exit:
plb: pld: ply: plx: pla
plp
rti
IRQ_16bit:
ABT_8bit: ABT_16bit:
php
rep #$30 : .al : .xl
pha: phx: phy: phd: phb
jsl @IRQ_ROUTINE
rep #$30 : .al : .xl
bra int_exit
;error vectors
BRK_8bit: BRK_16bit:
COP_8bit: COP_16bit:
IRQ_8bit:
NMI_8bit:
- wai: lda $ABCDEF : bra -
*= $C0FFB0
; Zero the area from $FFB0 - $FFFF
; to ensure that the linker won't get clever
; and fill it with small pieces of code.
.word 0,0,0,0, 0,0,0,0
.word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0
.word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0
*= $C0FFB0
.byt "MR" ;2 bytes - company id
.byt "TEST" ;4 bytes - rom id
*= $C0FFC0
.byt "SD2SNES TESTS "
;123456789012345678901; - max 21 chars
*= $C0FFD5 .byt $31 ;rom speed
*= $C0FFD6 .byt $02 ;rom type
*= $C0FFD7 .byt $06 ;rom size 64 kByte
*= $C0FFD8 .byt $03 ;sram size 8 kBit
*= $C0FFD9 .byt $09 ;rom region 4 = Finland
*= $C0FFDA .byt $33 ;company id flag
*= $C0FFDC .word 0,0 ;checksums
*= $C0FFE4 .word COP_16bit
*= $C0FFE6 .word BRK_16bit
*= $C0FFE8 .word ABT_16bit
*= $C0FFEA .word NMI_16bit
*= $C0FFEE .word IRQ_16bit
*= $C0FFF4 .word COP_8bit
*= $C0FFF8 .word ABT_8bit
*= $C0FFFA .word NMI_8bit
*= $C0FFFC .word RESET
*= $C0FFFE .word BRK_8bit
*= $C0FFFE .word IRQ_8bit

29
snes/tests/reset.a65 Normal file
View File

@@ -0,0 +1,29 @@
; This file is part of the snescom-asm demo - a demo of how to build a SNES program.
; See http://bisqwit.iki.fi/source/snescom.html for details.
; NMI - called on VBlank
NMI_ROUTINE:
sep #$20 : .as
rep #$10 : .xl
lda #$00
pha
plb
lda $4210 ; ack interrupt
rtl
; IRQ - called when triggered
IRQ_ROUTINE:
sep #$20 : .as
lda $4211 ;Acknowledge irq
lda #$00
sta @$002121
lda #$ff
sta @$002122
lda #$01
sta @$002122
lda #$5A
sta @$F00000
rtl

564
snes/tests/tests.a65 Normal file
View File

@@ -0,0 +1,564 @@
GAME_MAIN:
sep #$20 : .as
stz $4200 ; inhibit VBlank NMI
lda #$01
sta $420d ; fast cpu
jsr killdma
jsr waitblank
lda #$00
sta @$f00000
sta @$f00001
sta @$f00002
sta @$f00003
lda #$00
sta @$f01fff
jsr snes_init
jsr video_init
jsr linetest
jsr batest
jsr snes_init
jsr video_init
jsr copy_memtest
jsr irqtest
jsl $7e1800
- bra -
copy_memtest:
rep #$30 : .al : .xl
lda #$0300
ldx #!memtest
ldy #$1800
mvn $7e, ^memtest
rts
linetest
sep #$20 : .as
lda #$00
pha
plb
- lda $0000
lda $2100
sta $21ff
lda @$f01fff
cmp #$01
bne -
rts
irqtest:
cli
sep #$20 : .as
rep #$10 : .xl
lda #$0f
sta $2100
lda #$ff
sta $4209
lda #$ff
sta $420a
lda #$ff
sta $4200
sta @$f00000
lda #$01
sta @$002222
rts
batest:
sei
sep #$20 : .as
rep #$10 : .xl
lda #$00
ldx #$2100
- sta !$0, x
inx
inc
bne -
lda #$e0
pha
plb
lda #$00
ldx #$0000
- cmp !$0, x
bne batest_fail
inx
inc
bne -
lda #$5a
sta @$f00002
lda #$00
pha
plb
rts
batest_fail:
lda #$ff
sta @$f00002
lda #$00
pha
plb
rts
memtest:
; test 4 areas: 00-3f:8000-ffff
; 40-7d:0000-ffff
; 80-bf:8000-ffff
; 80-ff:0000-ffff
sep #$20 : .as
rep #$10 : .xl
lda #$01
sta @$003333 ; switch to linear memory mode
ldx #$8000
stx $00
ldx #$8000
stx $10
lda #$00
sta $03 ; bank no.
mem0_writeloop0:
; switch bank
pha
plb
lda #$01
sta @$003333
- lda $03
clc
adc $01
clc
adc $00
sta !$0000, x
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
cmp #$40
bne mem0_writeloop0
ldx #$0000
stx $10
mem0_writeloop1:
; switch bank
lda #$01
sta @$003333
lda $03
pha
plb
- lda $03
clc
adc $01
clc
adc $00
sta !$0000, x
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
cmp #$7e
bne mem0_writeloop1
ldx #$8000
stx $10
lda #$80
sta $03 ; bank no.
mem0_writeloop2:
; switch bank
lda #$01
sta @$003333
lda $03
pha
plb
- lda $03
clc
adc $01
clc
adc $00
sta !$0000, x
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
cmp #$c0
bne mem0_writeloop2
ldx #$0000
stx $10
mem0_writeloop3:
; switch bank
lda #$01
sta @$003333
lda $03
pha
plb
- lda $03
clc
adc $01
clc
adc $00
sta !$0000, x
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
bne mem0_writeloop3
lda #$00
sta @$002121
lda #$ff
sta @$002122
lda #$03
sta @$002122
ldx #$8000
stx $00
ldx #$8000
stx $10
lda #$00
sta $03 ; bank no.
mem0_verifyloop0:
; switch bank
lda #$01
sta @$f00001
lda #$01
sta @$003333
lda $03
pha
plb
- lda $03
clc
adc $01
clc
adc $00
cmp !$0000, x
bne mem0_fail
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
cmp #$40
bne mem0_verifyloop0
ldx #$0000
stx $10
mem0_verifyloop1:
; switch bank
lda #$01
sta @$003333
lda $03
pha
plb
- lda $03
clc
adc $01
clc
adc $00
cmp !$0000, x
bne mem0_fail
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
cmp #$7e
bne mem0_verifyloop1
ldx #$8000
stx $10
lda #$80
sta $03 ; bank no.
bra mem0_verifyloop2
mem0_fail:
lda #$00
pha
plb
sta @$003333
rep #$20 : .al
lda $00
sta @$f00004
sep #$20 : .as
lda $03
sta @$f00006
lda #$ff
sta @$f00001
rtl
mem0_verifyloop2:
; switch bank
lda #$01
sta @$003333
lda $03
pha
plb
- lda $03
clc
adc $01
clc
adc $00
cmp !$0000, x
bne mem0_fail
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
cmp #$c0
bne mem0_verifyloop2
ldx #$0000
stx $10
mem0_verifyloop3:
; switch bank
lda #$01
sta @$003333
lda $03
pha
plb
- lda $03
clc
adc $01
clc
adc $00
cmp !$0000, x
bne mem0_fail
inx
stx $00
bne -
ldx $10
inc $03
lda #$00
sta @$003333
lda $03
sta @$f00003
bne mem0_verifyloop3
lda #$00
sta @$002121
lda #$e0
sta @$002122
lda #$03
sta @$002122
lda #$00
pha
plb
sta @$003333
lda #$5a
sta @$f00001
rtl
rtl
rtl
rtl
rtl
rtl
killdma:
stz $420b
stz $420c
stz $4310
stz $4311
stz $4312
stz $4313
stz $4314
stz $4320
stz $4321
stz $4322
stz $4323
stz $4324
stz $4330
stz $4331
stz $4332
stz $4333
stz $4334
stz $4340
stz $4341
stz $4342
stz $4343
stz $4344
stz $4350
stz $4351
stz $4352
stz $4353
stz $4354
stz $4360
stz $4361
stz $4362
stz $4363
stz $4364
rts
waitblank:
- lda $4212
and #$80
bne -
- lda $4212
and #$80
beq -
rts
video_init:
sep #$20 : .as ;8-bit accumulator
rep #$10 : .xl ;16-bit index
lda #$03 ;mode 3, mode 5 via HDMA :D
sta $2105
lda #$58 ;Tilemap addr 0xB000
ora #$02 ;SC size 32x64
sta $2107 ;for BG1
lda #$50 ;Tilemap addr 0xA000
ora #$02 ;SC size 32x64
sta $2108 ;for BG2
lda #$40 ;chr base addr:
sta $210b ;BG1=0x0000, BG2=0x8000
lda #$01 ;cut off leftmost subscreen pixel garbage
sta $2126
lda #$fe
sta $2127
lda #$10
sta $2130
lda #$1f
sta $212e
sta $212f
stz $2121
lda #$0f
sta $2100 ;screen on, full brightness
stz $2121
lda #$1f ;red background
sta $2122
stz $2122
rts
snes_init:
sep #$20 : .as ;8-bit accumulator
rep #$10 : .xl ;16-bit index
stz $4200 ;
lda #$ff
sta $4201 ;
stz $4202 ;
stz $4203 ;
stz $4204 ;
stz $4205 ;
stz $4206 ;
stz $4207 ;
stz $4208 ;
stz $4209 ;
stz $420a ;
stz $420b ;
stz $420c ;
lda #$8f
sta $2100 ;INIDISP: force blank
lda #$03 ; 8x8+16x16; name=0; base=3
sta $2101 ;
stz $2102 ;
stz $2103 ;
; stz $2104 ; (OAM Data?!)
; stz $2104 ; (OAM Data?!)
stz $2105 ;
stz $2106 ;
stz $2107 ;
stz $2108 ;
stz $2109 ;
stz $210a ;
stz $210b ;
stz $210c ;
stz $210d ;
stz $210d ;
stz $210e ;
stz $210e ;
stz $210f ;
stz $210f ;
lda #$05
sta $2110 ;
stz $2110 ;
stz $2111 ;
stz $2111 ;
stz $2112 ;
stz $2112 ;
stz $2113 ;
stz $2113 ;
stz $2114 ;
stz $2114 ;
lda #$80
sta $2115 ;
stz $2116 ;
stz $2117 ;
; stz $2118 ;(VRAM Data?!)
; stz $2119 ;(VRAM Data?!)
stz $211a ;
stz $211b ;
lda #$01
sta $211b ;
stz $211c ;
stz $211c ;
stz $211d ;
stz $211d ;
stz $211e ;
sta $211e ;
stz $211f ;
stz $211f ;
stz $2120 ;
stz $2120 ;
stz $2121 ;
; stz $2122 ; (CG Data?!)
; stz $2122 ; (CG Data?!)
stz $2123 ;
stz $2124 ;
stz $2125 ;
stz $2126 ;
stz $2127 ;
stz $2128 ;
stz $2129 ;
stz $212a ;
stz $212b ;
stz $212c ;
stz $212d ;
stz $212e ;
stz $212f ;
lda #$30
sta $2130 ;
stz $2131 ;
lda #$e0
sta $2132 ;
stz $2133 ;
;clear WRAM lower page
; ldx #$0200
; stx $2181
; lda #$00
; sta $2183
; DMA0(#$08, #$FF00, #^zero, #!zero, #$80)
; ldx #$0000
; stx $2181
; lda #$00
; sta $2183
; DMA0(#$08, #$1e0, #^zero, #!zero, #$80)
rts

View File

@@ -1,9 +1,11 @@
.text
#include "memmap.i65"
.byt "===HIPRINT==="
hiprint:
sep #$20 : .as
lda print_count
sta print_count_tmp
stz print_over
rep #$30 : .xl : .al
stz print_done
lda print_x
@@ -53,7 +55,9 @@ print_loop
phx ; source addr
print_loop_inner
lda !0,x
asl
bne +
jmp print_end2
+ asl
sta @$2180
lda @print_pal
asl
@@ -81,6 +85,7 @@ print_loop2
lda @print_count
dec
sta @print_count_tmp
beq print_end2
lda #$00
pha
plb
@@ -100,7 +105,9 @@ print_loop2
plb
print_loop2_inner
lda !0,x
asl
bne +
jmp print_end
+ asl
sta @$2180
lda @print_pal
asl
@@ -114,17 +121,23 @@ print_loop2_inner
inx
lda !0,x
beq print_end
inx
lda !0,x
beq print_end
lda @print_count_tmp
dec
dec
sta @print_count_tmp
beq print_end
bmi print_end
inx
lda !0,x
beq print_end
bra print_loop2_inner
print_end2 ; clean up the stack (6 bytes)
ply
ply
ply
print_end
lda !0,x
sta @print_over
lda #$00
pha
plb
@@ -157,7 +170,7 @@ loprint:
sta $2183
ldx !print_src
lda !print_bank
pha
pha
plb
loprint_loop_inner
lda !0,x
@@ -257,16 +270,39 @@ draw_window:
jsr hiprint
; print window title
lda print_x
pha
inc print_x
inc print_x
lda #^window_tl
sta print_bank
ldx #!window_tl
stx print_src
lda #$01
sta print_count
jsr hiprint
inc print_x
lda window_tbank
sta print_bank
ldx window_taddr
stx print_src
lda window_w
sta print_count
jsr hiprint
dec print_x
dec print_x
lda print_done
adc print_x
sta print_x
lda #^window_tr
sta print_bank
ldx #!window_tr
stx print_src
lda #$01
sta print_count
jsr hiprint
lda window_w
sta print_count
pla
sta print_x
; draw left+right borders + space inside window
lda #^stringbuf
sta print_bank

View File

@@ -2,7 +2,7 @@
#include "dma.i65"
timebox_data
; string offset, selection width, bcdtime offset, 1s limit, 10s limit
; string offset, selection width, bcdtime offset
.byt 0, 4, 9
.byt 5, 2, 8
.byt 8, 2, 6
@@ -46,6 +46,7 @@ time_init:
jsr gettime
stz time_sel
stz time_exit
stz time_cancel
lda #^text_buttonB
sta print_bank
ldx #!text_buttonB
@@ -85,7 +86,7 @@ time_update
lda #$00
xba
tax
lda !timebox_data, x
lda @timebox_data, x
clc
adc #$04
adc @time_win_x
@@ -94,10 +95,10 @@ time_update
adc #$02
sta bar_yl
inx
lda !timebox_data, x
lda @timebox_data, x
sta bar_wl
inx
lda !timebox_data, x
lda @timebox_data, x
sta time_ptr
timeloop1
lda isr_done
@@ -120,17 +121,29 @@ timeloop1
lda #$80
and pad1trig+1
bne tkey_b
lda #$80
and pad1trig
bne tkey_a
; do stuff
lda time_exit
beq timeloop1
bne timesave
; set clock
lda time_cancel
bne timenosave
beq timeloop1
timesave
jsr settime
timenosave
; restore text area
jsr restore_screen
plp
rtl
tkey_b
inc time_cancel
jmp time_update
tkey_a
inc time_exit
jmp time_update
@@ -250,12 +263,12 @@ time_inc_day
lda #$00
xba
tax
lda !time_month, x
lda @time_month, x
cmp time_d10
bne time_inc_day_normal
inx
jsr is_leapyear_feb
lda !time_month, x
lda @time_month, x
dec
adc #$00
cmp time_d1
@@ -296,13 +309,13 @@ time_adjust_mon
xba
tax
lda time_d10
cmp !time_month, x
cmp @time_month, x
bcs time_mon_adjust
rts
time_mon_adjust
php
inx
lda !time_month, x
lda @time_month, x
pha
jsr is_leapyear_feb ; c=1 -> a leapyear february
pla
@@ -314,7 +327,7 @@ time_mon_adjust
time_mon_doadjust
sta time_d1
dex
lda !time_month, x
lda @time_month, x
sta time_d10
+
rts
@@ -433,10 +446,10 @@ time_dec_cont
asl
ldx #$0000
tax
lda !time_month, x
lda @time_month, x
sta time_d10
inx
lda !time_month, x
lda @time_month, x
pha
jsr is_leapyear_feb
pla
@@ -697,8 +710,6 @@ printtime:
lda listdisp
clc
adc #$0a
clc
adc vidmode
sta print_y
lda #$2b
sta print_x

24
snes/utils/mkmap.sh Executable file
View File

@@ -0,0 +1,24 @@
#!/bin/bash
args=("$@")
objcount=0
grep object_ link.log | \
sed -e 's/object_//g; s/_code//g; s/_data//g' | \
while read obj; do
objcount=$((objcount+1))
read base idx <<< "$obj"
base="0x${base}"
fn=${args[$idx-1]}
echo ======$fn, base=$base====== > ${fn%%.*}.map
sed -e '/^Externs/,$d;/^Labels/d' < $fn.log | \
while read line; do
read addr label <<< "$line"
addr="0x$addr"
decaddr=`printf "%d" $addr`
[ "$decaddr" -gt "65535" ] && base=0
ea=`printf "%X" $((base+addr))`
echo $ea $label >> ${fn%%.*}.map
done
done

View File

@@ -55,7 +55,7 @@ TARGET = $(OBJDIR)/sd2snes
# List C source files here. (C dependencies are automatically generated.)
SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c crc32.c cic.c cli.c xmodem.c irq.c rle.c sdnative.c msu1.c crc16.c
SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c crc32.c cic.c cli.c xmodem.c irq.c rle.c sdnative.c msu1.c crc16.c sysinfo.c cfg.c
# usbcontrol.c usb_hid.c usbhw_lpc.c usbinit.c usbstdreq.c

View File

@@ -213,6 +213,8 @@ sym: $(TARGET).sym
# utils/lpcchksum $(TARGET).bin
fresh: erase program
program: bin
openocd -f openocd-usb.cfg -f lpc1754.cfg -f flash.cfg

View File

@@ -14,8 +14,8 @@ void clock_disconnect() {
void clock_init() {
/* set flash access time to 5 clks (80<f<=100MHz) */
setFlashAccessTime(5);
/* set flash access time to 6 clks (safe setting) */
setFlashAccessTime(6);
/* setup PLL0 for ~44100*256*8 Hz
Base clock: 12MHz

View File

@@ -1,7 +1,7 @@
#ifndef _CONFIG_H
#define _CONFIG_H
//#define DEBUG_BL
// #define DEBUG_BL
// #define DEBUG_SD
// #define DEBUG_IRQ
@@ -56,7 +56,7 @@
#define CONFIG_UART_PCLKDIV 1
#define CONFIG_UART_TX_BUF_SHIFT 8
#define CONFIG_UART_BAUDRATE 921600
//#define CONFIG_UART_DEADLOCKABLE
#define CONFIG_UART_DEADLOCKABLE
#define SSP_CLK_DIVISOR_FAST 2
#define SSP_CLK_DIVISOR_SLOW 250

View File

@@ -14,7 +14,7 @@
/ Function and Buffer Configurations
/----------------------------------------------------------------------------*/
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
#define _FS_TINY 1 /* 0:Normal or 1:Tiny */
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
/ object instead of the sector buffer in the individual file object for file
/ data transfer. This reduces memory consumption 512 bytes each file object. */
@@ -57,7 +57,7 @@
/ Locale and Namespace Configurations
/----------------------------------------------------------------------------*/
#define _CODE_PAGE 1252
#define _CODE_PAGE 1
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure.
/

View File

@@ -72,10 +72,12 @@ FLASH_RES check_flash() {
}
IAP_RES iap_wrap(uint32_t *iap_cmd, uint32_t *iap_res) {
NVIC_DisableIRQ(RIT_IRQn);
NVIC_DisableIRQ(UART_IRQ);
// NVIC_DisableIRQ(RIT_IRQn);
// NVIC_DisableIRQ(UART_IRQ);
for(volatile int i=0; i<2048; i++);
iap_entry(iap_cmd, iap_res);
NVIC_EnableIRQ(UART_IRQ);
for(volatile int i=0; i<2048; i++);
// NVIC_EnableIRQ(UART_IRQ);
return iap_res[0];
}
@@ -153,12 +155,16 @@ FLASH_RES flash_file(uint8_t *filename) {
writeled(1);
DBG_BL printf("erasing flash...\n");
DBG_UART uart_putc('P');
if((res = iap_prepare_for_write(FW_START / 0x1000, FLASH_SECTORS)) != CMD_SUCCESS) {
DBG_BL printf("error %ld while preparing for erase\n", res);
DBG_UART uart_putc('X');
return ERR_FLASHPREP;
};
DBG_UART uart_putc('E');
if((res = iap_erase(FW_START / 0x1000, FLASH_SECTORS)) != CMD_SUCCESS) {
DBG_BL printf("error %ld while erasing\n", res);
DBG_UART uart_putc('X');
return ERR_FLASHERASE;
}
DBG_BL printf("writing... @%08lx\n", flash_addr);
@@ -174,18 +180,23 @@ FLASH_RES flash_file(uint8_t *filename) {
DBG_BL printf("current_sec=%d flash_addr=%08lx\n", current_sec, flash_addr);
DBG_UART uart_putc('.');
if(current_sec < (FW_START / 0x1000)) return ERR_FLASH;
DBG_UART uart_putc(current_sec["0123456789ABCDEFGH"]);
DBG_UART uart_putc('p');
if((res = iap_prepare_for_write(current_sec, current_sec)) != CMD_SUCCESS) {
DBG_BL printf("error %ld while preparing sector %d for write\n", res, current_sec);
DBG_UART uart_putc('X');
return ERR_FLASH;
}
DBG_UART uart_putc('w');
if((res = iap_ram2flash(flash_addr, file_buf, 512)) != CMD_SUCCESS) {
DBG_BL printf("error %ld while writing to address %08lx (sector %d)\n", res, flash_addr, current_sec);
DBG_UART uart_putc('X');
return ERR_FLASH;
}
}
if(total_read != (file_header.size + 0x100)) {
DBG_BL printf("wrote less data than expected! (%08lx vs. %08lx)\n", total_read, file_header.size);
DBG_UART uart_putc('X');
// DBG_UART uart_putc('X');
return ERR_FILECHK;
}
writeled(0);

View File

@@ -23,7 +23,7 @@ int i;
volatile enum diskstates disk_state;
extern volatile tick_t ticks;
int (*chain)(void) = (void*)(FW_START+0x000001c5);
int (*chain)(void);
int main(void) {
SNES_CIC_PAIR_REG->FIODIR = BV(SNES_CIC_PAIR_BIT);
@@ -86,6 +86,16 @@ DBG_BL printf("PCONP=%lx\n", LPC_SC->PCONP);
NVIC_DisableIRQ(UART_IRQ);
SCB->VTOR=FW_START+0x00000100;
chain = (void*)(*((uint32_t*)(FW_START+0x00000104)));
uart_putc("0123456789abcdef"[((uint32_t)chain>>28)&15]);
uart_putc("0123456789abcdef"[((uint32_t)chain>>24)&15]);
uart_putc("0123456789abcdef"[((uint32_t)chain>>20)&15]);
uart_putc("0123456789abcdef"[((uint32_t)chain>>16)&15]);
uart_putc("0123456789abcdef"[((uint32_t)chain>>12)&15]);
uart_putc("0123456789abcdef"[((uint32_t)chain>>8)&15]);
uart_putc("0123456789abcdef"[((uint32_t)chain>>4)&15]);
uart_putc("0123456789abcdef"[((uint32_t)chain)&15]);
uart_putc('\n');
chain();
while(1);
}

View File

@@ -18,32 +18,6 @@ extern volatile int sd_changed;
volatile tick_t ticks;
volatile int wokefromrit;
void __attribute__((weak,noinline)) SysTick_Hook(void) {
/* Empty function for hooking the systick handler */
}
/* Systick interrupt handler */
void SysTick_Handler(void) {
ticks++;
static uint16_t sdch_state = 0;
sdch_state = (sdch_state << 1) | SDCARD_DETECT | 0xe000;
if((sdch_state == 0xf000) || (sdch_state == 0xefff)) {
sd_changed = 1;
}
sdn_changed();
SysTick_Hook();
}
void __attribute__((weak,noinline)) RIT_Hook(void) {
}
void RIT_IRQHandler(void) {
LPC_RIT->RICTRL = BV(RITINT);
NVIC_ClearPendingIRQ(RIT_IRQn);
wokefromrit = 1;
RIT_Hook();
}
void timer_init(void) {
/* turn on power to RIT */
BITBAND(LPC_SC->PCONP, PCRIT) = 1;
@@ -54,8 +28,6 @@ void timer_init(void) {
/* PCLK = CCLK */
BITBAND(LPC_SC->PCLKSEL1, 26) = 1;
BITBAND(LPC_SC->PCLKSEL1, PCLK_TIMER3) = 1;
/* enable SysTick */
SysTick_Config((SysTick->CALIB & SysTick_CALIB_TENMS_Msk));
}
void delay_us(unsigned int time) {
@@ -84,21 +56,3 @@ void delay_ms(unsigned int time) {
LPC_RIT->RICTRL = 0;
}
void sleep_ms(unsigned int time) {
wokefromrit = 0;
/* Prepare RIT */
LPC_RIT->RICOUNTER = 0;
LPC_RIT->RICOMPVAL = (CONFIG_CPU_FREQUENCY / 1000) * time;
LPC_RIT->RICTRL = BV(RITEN) | BV(RITINT);
NVIC_EnableIRQ(RIT_IRQn);
/* Wait until RIT signals an interrupt */
//uart_putc(';');
while(!wokefromrit) {
__WFI();
}
NVIC_DisableIRQ(RIT_IRQn);
/* Disable RIT */
LPC_RIT->RICTRL = BV(RITINT);
}

View File

@@ -74,65 +74,14 @@
}
}
*/
static char txbuf[1 << CONFIG_UART_TX_BUF_SHIFT];
//static char txbuf[1 << CONFIG_UART_TX_BUF_SHIFT];
static volatile unsigned int read_idx,write_idx;
void UART_HANDLER(void) {
int iir = UART_REGS->IIR;
if (!(iir & 1)) {
/* Interrupt is pending */
switch (iir & 14) {
#if CONFIG_UART_NUM == 1
case 0: /* modem status */
(void) UART_REGS->MSR; // dummy read to clear
break;
#endif
case 2: /* THR empty - send */
if (read_idx != write_idx) {
int maxchars = 16;
while (read_idx != write_idx && --maxchars > 0) {
UART_REGS->THR = (unsigned char)txbuf[read_idx];
read_idx = (read_idx+1) & (sizeof(txbuf)-1);
}
if (read_idx == write_idx) {
/* buffer empty - turn off THRE interrupt */
BITBAND(UART_REGS->IER, 1) = 0;
}
}
break;
case 12: /* RX timeout */
case 4: /* data received - not implemented yet */
(void) UART_REGS->RBR; // dummy read to clear
break;
case 6: /* RX error */
(void) UART_REGS->LSR; // dummy read to clear
default: break;
}
}
}
void uart_putc(char c) {
if (c == '\n')
uart_putc('\r');
unsigned int tmp = (write_idx+1) & (sizeof(txbuf)-1) ;
if (read_idx == write_idx && (BITBAND(UART_REGS->LSR, 5))) {
/* buffer empty, THR empty -> send immediately */
UART_REGS->THR = (unsigned char)c;
} else {
#ifdef CONFIG_UART_DEADLOCKABLE
while (tmp == read_idx) ;
#endif
BITBAND(UART_REGS->IER, 1) = 0; // turn off UART interrupt
txbuf[write_idx] = c;
write_idx = tmp;
BITBAND(UART_REGS->IER, 1) = 1;
}
while(!(UART_REGS->LSR & (0x20)));
UART_REGS->THR = c;
}
/* Polling version only */
@@ -183,10 +132,6 @@ void uart_init(void) {
/* reset and enable FIFO */
UART_REGS->FCR = BV(0);
/* enable transmit interrupt */
BITBAND(UART_REGS->IER, 1) = 1;
NVIC_EnableIRQ(UART_IRQ);
UART_REGS->THR = '?';
}

View File

@@ -5,11 +5,16 @@
#include "cic.h"
char *cicstatenames[4] = { "CIC_OK", "CIC_FAIL", "CIC_PAIR", "CIC_SCIC" };
char *cicstatefriendly[4] = {"Original or no CIC", "Original CIC(failed)", "SuperCIC enhanced", "SuperCIC detected, not used"};
void print_cic_state() {
printf("CIC state: %s\n", get_cic_statename(get_cic_state()));
}
inline char *get_cic_statefriendlyname(enum cicstates state) {
return cicstatefriendly[state];
}
inline char *get_cic_statename(enum cicstates state) {
return cicstatenames[state];
}

View File

@@ -13,6 +13,7 @@ enum cic_region { CIC_NTSC = 0, CIC_PAL };
void print_cic_state(void);
char *get_cic_statename(enum cicstates state);
char *get_cic_statefriendlyname(enum cicstates state);
enum cicstates get_cic_state(void);
void cic_init(int allow_pairmode);

View File

@@ -134,7 +134,7 @@ static int8_t parse_wordlist(char *wordlist) {
do {
// If current word list character is \0: No match found
if (c == 0) {
printf("Unknown word: %s\n",curchar);
printf("Unknown word: %s\n(use ? for help)",curchar);
return -1;
}

View File

@@ -1,4 +1,4 @@
CONFIG_VERSION=0.1.0
#FWVER=000100
CONFIG_FWVER=256
CONFIG_VERSION="0.1.3"
#FWVER=00010300
CONFIG_FWVER=66304
CONFIG_MCU_FOSC=12000000

View File

@@ -1,12 +1,13 @@
#ifndef _CONFIG_H
#define _CONFIG_H
#include "autoconf.h"
// #define DEBUG_FS
// #define DEBUG_SD
// #define DEBUG_IRQ
// #define DEBUG_MSU1
#define VER "0.0.1(NSFW)"
#define IN_AHBRAM __attribute__ ((section(".ahbram")))
#define SD_DT_INT_SETUP() do {\
@@ -66,7 +67,7 @@
#define FPGA_MCU_RDY_BIT 9
#define QSORT_MAXELEM 2048
#define CLTBL_SIZE 100
#define SSP_REGS LPC_SSP0
#define SSP_PCLKREG PCLKSEL1
// 1: PCLKSEL0

View File

@@ -2639,8 +2639,16 @@ FRESULT f_lseek (
fp->flag &= ~FA__DIRTY;
}
#endif
if (disk_read(fp->fs->drv, fp->buf, dsc, 1) != RES_OK)
ABORT(fp->fs, FR_DISK_ERR);
if(!ff_sd_offload) {
sd_offload_partial=0;
if (disk_read(fp->fs->drv, fp->buf, dsc, 1) != RES_OK)
ABORT(fp->fs, FR_DISK_ERR);
} else {
sd_offload_partial=1;
sd_offload_partial_start = fp->fptr % SS(fp->fs);
}
// if (disk_read(fp->fs->drv, fp->buf, dsc, 1) != RES_OK)
// ABORT(fp->fs, FR_DISK_ERR);
#endif
fp->dsect = dsc;
}

View File

@@ -36,7 +36,7 @@
/ 3: f_lseek is removed in addition to 2. */
#define _USE_STRFUNC 0 /* 0:Disable or 1/2:Enable */
#define _USE_STRFUNC 1 /* 0:Disable or 1/2:Enable */
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
@@ -48,7 +48,7 @@
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
#define _USE_FASTSEEK 1 /* 0:Disable or 1:Enable */
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */

View File

@@ -55,7 +55,7 @@ void file_open_by_filinfo(FILINFO* fno) {
file_res = l_openfilebycluster(&fatfs, &file_handle, (TCHAR*)"", fno->clust, fno->fsize);
}
void file_open(uint8_t* filename, BYTE flags) {
void file_open(const uint8_t* filename, BYTE flags) {
if (disk_state == DISK_CHANGED) {
file_reinit();
newcard = 1;

View File

@@ -40,7 +40,7 @@ uint16_t file_block_off, file_block_max;
enum filestates file_status;
void file_init(void);
void file_open(uint8_t* filename, BYTE flags);
void file_open(const uint8_t* filename, BYTE flags);
FRESULT dir_open_by_filinfo(DIR* dir, FILINFO* fno_param);
void file_open_by_filinfo(FILINFO* fno);
void file_close(void);

View File

@@ -66,6 +66,8 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
static uint32_t parent_tgt;
static uint32_t dir_end = 0;
static uint8_t was_empty = 0;
static uint16_t num_files_total = 0;
static uint16_t num_dirs_total = 0;
uint32_t dir_tgt;
uint16_t numentries;
uint32_t dirsize;
@@ -91,13 +93,14 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
numentries=0;
for(pass = 0; pass < 2; pass++) {
if(pass) {
num_dirs_total++;
dirsize = 4*(numentries);
next_subdir_tgt += dirsize + 4;
if(parent_tgt) next_subdir_tgt += 4;
if(next_subdir_tgt > dir_end) {
dir_end = next_subdir_tgt;
}
// printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt);
DBG_FS printf("path=%s depth=%d ptr=%lx entries=%d parent=%lx next subdir @%lx\n", path, depth, db_tgt, numentries, parent_tgt, next_subdir_tgt);
if(mkdb) {
// printf("d=%d Saving %lx to Address %lx [end]\n", depth, 0L, next_subdir_tgt - 4);
sram_writelong(0L, next_subdir_tgt - 4);
@@ -180,6 +183,7 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
} else {
SNES_FTYPE type = determine_filetype((char*)fn);
if(type != TYPE_UNKNOWN) {
num_files_total++;
numentries++;
if(pass) {
if(mkdb) {
@@ -247,9 +251,11 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
}
} else uart_putc(0x30+res);
}
// printf("db_tgt=%lx dir_end=%lx\n", db_tgt, dir_end);
DBG_FS printf("db_tgt=%lx dir_end=%lx\n", db_tgt, dir_end);
sram_writelong(db_tgt, SRAM_DB_ADDR+4);
sram_writelong(dir_end, SRAM_DB_ADDR+8);
sram_writeshort(num_files_total, SRAM_DB_ADDR+12);
sram_writeshort(num_dirs_total, SRAM_DB_ADDR+14);
return crc;
}

View File

@@ -102,6 +102,10 @@ void fpga_pgm(uint8_t* filename) {
i=0;
timeout = getticks() + 100;
fpga_set_prog_b(0);
if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
printf("PROGB is stuck high!\n");
led_panic();
}
uart_putc('P');
fpga_set_prog_b(1);
while(!fpga_get_initb()){
@@ -110,6 +114,10 @@ void fpga_pgm(uint8_t* filename) {
led_panic();
}
};
if(fpga_get_done()) {
printf("DONE is stuck high!\n");
led_panic();
}
LPC_GPIO2->FIOMASK1 = ~(BV(0));
uart_putc('p');
@@ -160,6 +168,10 @@ void fpga_rompgm() {
led_panic();
}
};
if(fpga_get_done()) {
printf("DONE is stuck high!\n");
led_panic();
}
LPC_GPIO2->FIOMASK1 = ~(BV(0));
uart_putc('p');

View File

@@ -47,9 +47,15 @@
s: Bit 2 = partial, Bit 1:0 = target
target: see above
60 sssseeee set SD DMA partial transfer start+end
ssss = start offset (msb first)
eeee = end offset (msb first)
60 xsssyeee set SD DMA partial transfer parameters
x: 0 = read from sector start (skip until
start offset reached)
8 = assume mid-sector position and read
immediately
sss = start offset (msb first)
y: 0 = skip rest of SD sector
8 = stop mid-sector if end offset reached
eee = end offset (msb first)
8p - read (RAM only)
p: 0 = no increment after read
@@ -80,6 +86,7 @@
EB - put DSP into reset
EC - release DSP from reset
ED - set feature enable bits (see below)
EE - set $213f override value (0=NTSC, 1=PAL)
F0 - receive test token (to see if FPGA is alive)
F1 - receive status (16bit, MSB first), see below
@@ -97,7 +104,7 @@
15 SD DMA busy (0=idle, 1=busy)
14 DAC read pointer MSB
13 MSU read pointer MSB
12 [TODO SD DMA CRC status (0=ok, 1=error); valid after bit 15 -> 0]
12 reserved (0)
11 reserved (0)
10 reserved (0)
9 reserved (0)
@@ -117,7 +124,7 @@
7 -
6 -
5 -
4 -
4 enable $213F override
3 enable MSU1 registers
2 enable SRTC registers
1 enable ST0010 mapping
@@ -238,7 +245,7 @@ void fpga_sddma(uint8_t tgt, uint8_t partial) {
}
DBG_SD printf("...complete\n");
FPGA_DESELECT();
if(test<5)printf("loopy: %ld %02x\n", test, status);
// if(test<5)printf("loopy: %ld %02x\n", test, status);
BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 1;
}
@@ -411,3 +418,11 @@ void fpga_set_features(uint8_t feat) {
FPGA_DESELECT();
}
void fpga_set_213f(uint8_t data) {
printf("set 213f: %d\n", data);
FPGA_SELECT();
FPGA_TX_BYTE(0xee);
FPGA_TX_BYTE(data);
FPGA_DESELECT();
}

View File

@@ -50,12 +50,14 @@
#define FPGA_SPI_FAST() spi_set_speed(SPI_SPEED_FPGA_FAST)
#define FPGA_SPI_SLOW() spi_set_speed(SPI_SPEED_FPGA_SLOW)
#define FEAT_CX4 (1 << 4)
#define FEAT_213F (1 << 4)
#define FEAT_MSU1 (1 << 3)
#define FEAT_SRTC (1 << 2)
#define FEAT_ST0010 (1 << 1)
#define FEAT_DSPX (1 << 0)
#define FEAT_CX4 (1 << 4)
#define FPGA_WAIT_RDY() do {while(BITBAND(SSP_REGS->SR, SSP_BSY)); while(!BITBAND(FPGA_MCU_RDY_REG->FIOPIN, FPGA_MCU_RDY_BIT));} while (0)
void fpga_spi_init(void);
@@ -90,4 +92,5 @@ void fpga_write_dspx_pgm(uint32_t data);
void fpga_write_dspx_dat(uint16_t data);
void fpga_dspx_reset(uint8_t reset);
void fpga_set_features(uint8_t feat);
void fpga_set_213f(uint8_t data);
#endif

View File

@@ -86,13 +86,16 @@ void toggle_write_led() {
}
void led_panic() {
led_std();
while(1) {
LPC_GPIO2->FIODIR |= BV(4) | BV(5);
LPC_GPIO1->FIODIR |= BV(23);
delay_ms(350);
LPC_GPIO2->FIODIR &= ~(BV(4) | BV(5));
LPC_GPIO1->FIODIR &= ~BV(23);
delay_ms(350);
rdyled(1);
readled(1);
writeled(1);
delay_ms(100);
rdyled(0);
readled(0);
writeled(0);
delay_ms(100);
cli_entrycheck();
}
}

View File

@@ -26,6 +26,8 @@
#include "smc.h"
#include "msu1.h"
#include "rtc.h"
#include "sysinfo.h"
#include "cfg.h"
#define EMC0TOGGLE (3<<4)
#define MR0R (1<<1)
@@ -34,6 +36,8 @@ int i;
int sd_offload = 0, ff_sd_offload = 0, sd_offload_tgt = 0;
int sd_offload_partial = 0;
int sd_offload_start_mid = 0;
int sd_offload_end_mid = 0;
uint16_t sd_offload_partial_start = 0;
uint16_t sd_offload_partial_end = 0;
@@ -42,8 +46,11 @@ extern volatile tick_t ticks;
extern snes_romprops_t romprops;
extern volatile int reset_changed;
extern volatile cfg_t CFG;
enum system_states {
SYS_RTC_STATUS = 0
SYS_RTC_STATUS = 0,
SYS_LAST_STATUS = 1
};
int main(void) {
@@ -75,7 +82,7 @@ int main(void) {
LPC_PINCON->PINSEL0 |= BV(20) | BV(21); /* MAT3.0 (FPGA clock) */
led_pwm();
sdn_init();
printf("\n\nsd2snes mk.2\n============\nfw ver.: " VER "\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
printf("\n\nsd2snes mk.2\n============\nfw ver.: " CONFIG_VERSION "\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
printf("PCONP=%lx\n", LPC_SC->PCONP);
file_init();
@@ -135,6 +142,11 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
readled(0);
writeled(0);
cfg_load();
cfg_save();
sram_writebyte(cfg_is_last_game_valid(), SRAM_STATUS_ADDR+SYS_LAST_STATUS);
cfg_get_last_game(file_lfn);
sram_writeblock(strrchr((const char*)file_lfn, '/')+1, SRAM_LASTGAME_ADDR, 256);
*fs_path=0;
uint32_t saved_dir_id;
get_db_id(&saved_dir_id);
@@ -208,7 +220,7 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
sram_writebyte(0x00, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
set_fpga_time(get_bcdtime());
}
sram_memset(SRAM_SYSINFO_ADDR, 13*40, 0x20);
printf("SNES GO!\n");
snes_reset(1);
delay_ms(1);
@@ -235,6 +247,9 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
case SNES_CMD_LOADROM:
get_selected_name(file_lfn);
printf("Selected name: %s\n", file_lfn);
cfg_save_last_game(file_lfn);
cfg_set_last_game_valid(1);
cfg_save();
filesize = load_rom(file_lfn, SRAM_ROM_ADDR, LOADROM_WITH_SRAM | LOADROM_WITH_RESET);
break;
case SNES_CMD_SETRTC:
@@ -243,8 +258,18 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
/* set RTC */
set_bcdtime(btime);
set_fpga_time(btime);
cmd=0; /* stay in loop */
cmd=0; /* stay in menu loop */
break;
case SNES_CMD_SYSINFO:
/* go to sysinfo loop */
sysinfo_loop();
cmd=0; /* stay in menu loop */
break;
case SNES_CMD_LOADLAST:
cfg_get_last_game(file_lfn);
printf("Selected name: %s\n", file_lfn);
filesize = load_rom(file_lfn, SRAM_ROM_ADDR, LOADROM_WITH_SRAM | LOADROM_WITH_RESET);
break;
default:
printf("unknown cmd: %d\n", cmd);
cmd=0; /* unknown cmd: stay in loop */

View File

@@ -281,7 +281,9 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
printf("done\n");
romprops.fpga_features |= FEAT_SRTC;
romprops.fpga_features |= FEAT_213F;
fpga_set_213f(romprops.region);
fpga_set_features(romprops.fpga_features);
if(flags & LOADROM_WITH_RESET) {

View File

@@ -30,19 +30,21 @@
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include "smc.h"
#define SRAM_ROM_ADDR (0x000000L)
#define SRAM_SAVE_ADDR (0xE00000L)
#define SRAM_ROM_ADDR (0x000000L)
#define SRAM_SAVE_ADDR (0xE00000L)
#define SRAM_MENU_ADDR (0xE00000L)
#define SRAM_DB_ADDR (0xE40000L)
#define SRAM_DIR_ADDR (0xE10000L)
#define SRAM_CMD_ADDR (0xFF1000L)
#define SRAM_PARAM_ADDR (0xFF1004L)
#define SRAM_STATUS_ADDR (0xFF1100L)
#define SRAM_MENU_SAVE_ADDR (0xFF0000L)
#define SRAM_SCRATCHPAD (0xFFFF00L)
#define SRAM_DIRID (0xFFFFF0L)
#define SRAM_RELIABILITY_SCORE (0x100)
#define SRAM_MENU_ADDR (0xE00000L)
#define SRAM_DB_ADDR (0xE40000L)
#define SRAM_DIR_ADDR (0xE10000L)
#define SRAM_CMD_ADDR (0xFF1000L)
#define SRAM_PARAM_ADDR (0xFF1004L)
#define SRAM_STATUS_ADDR (0xFF1100L)
#define SRAM_SYSINFO_ADDR (0xFF1200L)
#define SRAM_LASTGAME_ADDR (0xFF1420L)
#define SRAM_MENU_SAVE_ADDR (0xFF0000L)
#define SRAM_SCRATCHPAD (0xFFFF00L)
#define SRAM_DIRID (0xFFFFF0L)
#define SRAM_RELIABILITY_SCORE (0x100)
#define LOADROM_WITH_SRAM (1)
#define LOADROM_WITH_RESET (2)

View File

@@ -13,6 +13,9 @@
#include "smc.h"
FIL msufile;
DWORD msu_cltbl[CLTBL_SIZE] IN_AHBRAM;
DWORD pcm_cltbl[CLTBL_SIZE] IN_AHBRAM;
extern snes_romprops_t romprops;
int msu1_check_reset(void) {
@@ -40,6 +43,11 @@ int msu1_check(uint8_t* filename) {
printf("MSU datafile not found\n");
return 0;
}
msufile.cltbl = msu_cltbl;
msu_cltbl[0] = CLTBL_SIZE;
if(f_lseek(&msufile, CREATE_LINKMAP)) {
printf("Error creating FF linkmap for MSU file!\n");
}
romprops.fpga_features |= FEAT_MSU1;
return 1;
}
@@ -119,18 +127,21 @@ int msu1_loop() {
/* get trackno */
msu_track = get_msu_track();
printf("Audio requested! Track=%d\n", msu_track);
DBG_MSU1 printf("Audio requested! Track=%d\n", msu_track);
/* open file, fill buffer */
f_close(&file_handle);
snprintf(suffix, sizeof(suffix), "-%d.pcm", msu_track);
strcpy((char*)file_buf, (char*)file_lfn);
strcpy(strrchr((char*)file_buf, (int)'.'), suffix);
printf("filename: %s\n", file_buf);
DBG_MSU1 printf("filename: %s\n", file_buf);
f_open(&file_handle, (const TCHAR*)file_buf, FA_READ);
file_handle.cltbl = pcm_cltbl;
pcm_cltbl[0] = CLTBL_SIZE;
f_lseek(&file_handle, CREATE_LINKMAP);
f_lseek(&file_handle, 4L);
f_read(&file_handle, &msu_loop_point, 4, &bytes_read);
printf("loop point: %ld samples\n", msu_loop_point);
DBG_MSU1 printf("loop point: %ld samples\n", msu_loop_point);
ff_sd_offload=1;
sd_offload_tgt=1;
f_lseek(&file_handle, 8L);
@@ -148,12 +159,12 @@ int msu1_loop() {
if(fpga_status_now & 0x0010) {
/* get address */
msu_offset=get_msu_offset();
printf("Data requested! Offset=%08lx page1=%08lx page2=%08lx\n", msu_offset, msu_page1_start, msu_page2_start);
DBG_MSU1 printf("Data requested! Offset=%08lx page1=%08lx page2=%08lx\n", msu_offset, msu_page1_start, msu_page2_start);
if( ((msu_offset < msu_page1_start)
|| (msu_offset >= msu_page1_start + msu_page_size))
&& ((msu_offset < msu_page2_start)
|| (msu_offset >= msu_page2_start + msu_page_size))) {
printf("offset %08lx out of range (%08lx-%08lx, %08lx-%08lx), reload\n", msu_offset, msu_page1_start,
DBG_MSU1 printf("offset %08lx out of range (%08lx-%08lx, %08lx-%08lx), reload\n", msu_offset, msu_page1_start,
msu_page1_start+msu_page_size-1, msu_page2_start, msu_page2_start+msu_page_size-1);
/* "cache miss" */
/* fill buffer */
@@ -209,19 +220,19 @@ int msu1_loop() {
if(fpga_status_now & 0x0004) {
msu_repeat = 1;
set_msu_status(0x04, 0x01); /* set bit 2, reset bit 0 */
printf("Repeat set!\n");
DBG_MSU1 printf("Repeat set!\n");
} else {
msu_repeat = 0;
set_msu_status(0x00, 0x05); /* set no bits, reset bit 0+2 */
printf("Repeat clear!\n");
DBG_MSU1 printf("Repeat clear!\n");
}
if(fpga_status_now & 0x0002) {
printf("PLAY!\n");
DBG_MSU1 printf("PLAY!\n");
set_msu_status(0x02, 0x01); /* set bit 0, reset bit 1 */
dac_play();
} else {
printf("PAUSE!\n");
DBG_MSU1 printf("PAUSE!\n");
set_msu_status(0x00, 0x03); /* set no bits, reset bit 1+0 */
dac_pause();
}
@@ -234,7 +245,7 @@ int msu1_loop() {
ff_sd_offload=0;
sd_offload=0;
if(msu_repeat) {
printf("loop\n");
DBG_MSU1 printf("loop\n");
ff_sd_offload=1;
sd_offload_tgt=1;
f_lseek(&file_handle, 8L+msu_loop_point*4);
@@ -243,6 +254,7 @@ int msu1_loop() {
f_read(&file_handle, file_buf, (MSU_DAC_BUFSIZE / 2) - bytes_read, &bytes_read);
} else {
set_msu_status(0x00, 0x02); /* clear play bit */
dac_pause();
}
bytes_read = MSU_DAC_BUFSIZE;
}

View File

@@ -12,6 +12,7 @@
#include "fileops.h"
#include "bits.h"
#include "fpga_spi.h"
#include "memory.h"
#define MAX_CARDS 1
@@ -111,14 +112,17 @@
uint8_t cmd[6]={0,0,0,0,0,0};
uint8_t rsp[17];
uint8_t csd[17];
uint8_t cid[17];
diskinfo0_t di;
uint8_t ccs=0;
uint32_t rca;
enum trans_state { TRANS_NONE = 0, TRANS_READ, TRANS_WRITE };
enum trans_state { TRANS_NONE = 0, TRANS_READ, TRANS_WRITE, TRANS_MID };
enum cmd_state { CMD_RSP = 0, CMD_RSPDAT, CMD_DAT };
int during_blocktrans = TRANS_NONE;
uint32_t last_block = 0;
uint16_t last_offset = 0;
volatile int sd_changed;
@@ -158,6 +162,17 @@ static uint32_t getbits(void *buffer, uint16_t start, int8_t bits) {
return result;
}
void sdn_checkinit(BYTE drv) {
if(disk_state == DISK_CHANGED) {
disk_initialize(drv);
}
}
uint8_t* sdn_getcid() {
sdn_checkinit(0);
return cid;
}
static inline void wiggle_slow_pos(uint16_t times) {
while(times--) {
delay_us(2);
@@ -347,7 +362,7 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
default:
rsplen = 6;
}
if(dat && (buf==NULL)) {
if(dat && (buf==NULL) && !sd_offload) {
printf("send_command_fast error: buf is null but data transfer expected.\n");
return 0;
}
@@ -374,7 +389,7 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 0;
if(rsplen) {
uint32_t timeout=2000000;
uint32_t timeout=200000;
/* wait for response */
while((BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN)) && --timeout) {
wiggle_fast_neg1();
@@ -383,7 +398,6 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
printf("CMD%d timed out\n", cmdno);
return 0; /* no response within timeout */
}
i=rsplen;
uint8_t cmddata=0, datdata=0;
while(i--) { /* process response */
@@ -448,20 +462,31 @@ int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
state=CMD_DAT;
j=datcnt;
datshift=8;
timeout=2000000;
DBG_SD printf("response over, waiting for data...\n");
/* wait for data start bit on DAT0 */
while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
wiggle_fast_neg1();
}
DBG_SD if(!timeout) printf("timed out!\n");
// printf("%ld\n", timeout);
if(!timeout) printf("timed out!\n");
wiggle_fast_neg1(); /* eat the start bit */
if(sd_offload) {
if(sd_offload_partial) {
if(sd_offload_partial_start != 0) {
if(during_blocktrans == TRANS_MID) sd_offload_partial_start |= 0x8000;
}
if(sd_offload_partial_end != 512) {
sd_offload_partial_end |= 0x8000;
}
DBG_SD printf("new partial %d - %d\n", sd_offload_partial_start, sd_offload_partial_end);
fpga_set_sddma_range(sd_offload_partial_start, sd_offload_partial_end);
fpga_sddma(sd_offload_tgt, 1);
sd_offload_partial=0;
// sd_offload_partial=0;
last_offset=sd_offload_partial_end;
} else {
fpga_sddma(sd_offload_tgt, 0);
last_offset=0;
}
state=CMD_RSP;
return rsplen;
@@ -578,12 +603,6 @@ int acmd_fast(uint8_t cmd, uint32_t param, uint8_t crc, uint8_t* dat, uint8_t* r
return cmd_fast(cmd, param, crc, dat, rsp);
}
void sdn_checkinit(BYTE drv) {
if(disk_state == DISK_CHANGED) {
disk_initialize(drv);
}
}
int stream_datablock(uint8_t *buf) {
// uint8_t datshift=8;
int j=512;
@@ -591,17 +610,24 @@ int stream_datablock(uint8_t *buf) {
uint32_t timeout=1000000;
DBG_SD printf("stream_datablock: wait for ready...\n");
while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
wiggle_fast_neg1();
if(during_blocktrans != TRANS_MID) {
while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
wiggle_fast_neg1();
}
DBG_SD if(!timeout) printf("timeout!\n");
wiggle_fast_neg1(); /* eat the start bit */
}
DBG_SD if(!timeout) printf("timeout!\n");
wiggle_fast_neg1(); /* eat the start bit */
if(sd_offload) {
if(sd_offload_partial) {
if(sd_offload_partial_start != 0) {
if(during_blocktrans == TRANS_MID) sd_offload_partial_start |= 0x8000;
}
if(sd_offload_partial_end != 512) {
sd_offload_partial_end |= 0x8000;
}
DBG_SD printf("str partial %d - %d\n", sd_offload_partial_start, sd_offload_partial_end);
fpga_set_sddma_range(sd_offload_partial_start, sd_offload_partial_end);
fpga_sddma(sd_offload_tgt, 1);
sd_offload_partial=0;
} else {
fpga_sddma(sd_offload_tgt, 0);
}
@@ -753,6 +779,7 @@ void send_datablock(uint8_t *buf) {
}
void read_block(uint32_t address, uint8_t *buf) {
DBG_SD printf("read_block addr=%08lx last_addr=%08lx offld=%d/%d offst=%04x offed=%04x last_off=%04x\n", address, last_block, sd_offload, sd_offload_partial, sd_offload_partial_start, sd_offload_partial_end, last_offset);
if(during_blocktrans == TRANS_READ && (last_block == address-1)) {
//uart_putc('r');
#ifdef CONFIG_SD_DATACRC
@@ -766,7 +793,21 @@ void read_block(uint32_t address, uint8_t *buf) {
#else
stream_datablock(buf);
#endif
last_block=address;
last_block = address;
last_offset = sd_offload_partial_end & 0x1ff;
if(sd_offload_partial && sd_offload_partial_end != 512) {
during_blocktrans = TRANS_MID;
}
sd_offload_partial = 0;
} else if (during_blocktrans == TRANS_MID
&& last_block == address
&& last_offset == sd_offload_partial_start
&& sd_offload_partial) {
sd_offload_partial_start |= 0x8000;
stream_datablock(buf);
during_blocktrans = TRANS_READ;
last_offset = sd_offload_partial_end & 0x1ff;
sd_offload_partial = 0;
} else {
if(during_blocktrans) {
// uart_putc('_');
@@ -774,7 +815,8 @@ void read_block(uint32_t address, uint8_t *buf) {
/* send STOP_TRANSMISSION to end an open READ/WRITE_MULTIPLE_BLOCK */
cmd_fast(STOP_TRANSMISSION, 0, 0x61, NULL, rsp);
}
last_block=address;
during_blocktrans = TRANS_READ;
last_block = address;
if(!ccs) {
address <<= 9;
}
@@ -786,8 +828,9 @@ void read_block(uint32_t address, uint8_t *buf) {
#else
cmd_fast(READ_MULTIPLE_BLOCK, address, 0, buf, rsp);
#endif
during_blocktrans = TRANS_READ;
sd_offload_partial = 0;
}
// printf("trans state = %d\n", during_blocktrans);
}
void write_block(uint32_t address, uint8_t* buf) {
@@ -887,7 +930,11 @@ DRESULT sdn_initialize(BYTE drv) {
}
/* record CSD for getinfo */
cmd_slow(SEND_CSD, rca, 0, NULL, rsp);
cmd_slow(SEND_CSD, rca, 0, NULL, csd);
sdn_getinfo(drv, 0, &di);
/* record CID */
cmd_slow(SEND_CID, rca, 0, NULL, cid);
/* select the card */
if(cmd_slow(SELECT_CARD, rca, 0, NULL, rsp)) {
@@ -927,6 +974,7 @@ void sdn_init(void) {
BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 1;
BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 1;
BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN) = 1;
LPC_PINCON->PINMODE0 &= ~(BV(14) | BV(15));
LPC_GPIO2->FIOPIN0 = 0x00;
LPC_GPIO2->FIOMASK0 = ~0xf;
}
@@ -1013,3 +1061,55 @@ void sdn_changed() {
}
}
/* measure sd access time */
void sdn_gettacc(uint32_t *tacc_max, uint32_t *tacc_avg) {
uint32_t sec1 = 0;
uint32_t sec2 = 0;
uint32_t time, time_max = 0;
uint32_t time_avg = 0LL;
uint32_t numread = 16384;
int i;
int sec_step = di.sectorcount / numread - 1;
if(disk_state == DISK_REMOVED) return;
sdn_checkinit(0);
for (i=0; i < 128; i++) {
sd_offload_tgt=2;
sd_offload=1;
sdn_read(0, NULL, 0, 1);
sd_offload_tgt=2;
sd_offload=1;
sdn_read(0, NULL, i*sec_step, 1);
}
for (i=0; i < numread && sram_readbyte(SRAM_CMD_ADDR) != 0x00 && disk_state != DISK_REMOVED; i++) {
/* reset timer */
LPC_RIT->RICTRL = 0;
sd_offload_tgt=2;
sd_offload=1;
sdn_read(0, NULL, sec1, 2);
sec1 += 2;
/* start timer */
LPC_RIT->RICOUNTER = 0;
LPC_RIT->RICTRL = BV(RITEN);
sd_offload_tgt=2;
sd_offload=1;
sdn_read(0, NULL, sec2, 1);
/* read timer */
time = LPC_RIT->RICOUNTER;
/* sd_offload_tgt=2;
sd_offload=1;
sdn_read(0, NULL, sec2, 15);*/
time_avg += time/16;
if(time > time_max) {
time_max = time;
}
sec2 += sec_step;
}
time_avg = time_avg / (i+1) * 16;
sd_offload=0;
LPC_RIT->RICTRL = 0;
if(disk_state != DISK_REMOVED) {
*tacc_max = time_max/(CONFIG_CPU_FREQUENCY / 1000000)-114;
*tacc_avg = time_avg/(CONFIG_CPU_FREQUENCY / 1000000)-114;
}
}

View File

@@ -24,6 +24,7 @@ DRESULT sdn_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count);
DRESULT sdn_getinfo(BYTE drv, BYTE page, void *buffer);
void sdn_changed(void);
uint8_t* sdn_getcid(void);
void sdn_gettacc(uint32_t *tacc_max, uint32_t *tacc_avg);
#endif

134
src/smc.c
View File

@@ -34,28 +34,6 @@
snes_romprops_t romprops;
uint32_t hdr_addr[6] = {0xffb0, 0x101b0, 0x7fb0, 0x81b0, 0x40ffb0, 0x4101b0};
uint8_t countAllASCII(uint8_t* data, int size) {
uint8_t res = 0;
do {
size--;
if(data[size] >= 0x20 && data[size] <= 0x7e) {
res++;
}
} while (size);
return res;
}
uint8_t countAllJISX0201(uint8_t* data, int size) {
uint8_t res = 0;
do {
size--;
if((data[size] >= 0x20 && data[size] <= 0x7e)
||(data[size] >= 0xa1 && data[size] <= 0xdf)) {
res++;
}
} while (size);
return res;
}
uint8_t isFixed(uint8_t* data, int size, uint8_t value) {
uint8_t res = 1;
@@ -72,7 +50,7 @@ uint8_t checkChksum(uint16_t cchk, uint16_t chk) {
uint32_t sum = cchk + chk;
uint8_t res = 0;
if(sum==0x0000ffff) {
res = 0x10;
res = 1;
}
return res;
}
@@ -87,32 +65,13 @@ void smc_id(snes_romprops_t* props) {
props->fpga_features = 0;
props->fpga_conf = NULL;
for(uint8_t num = 0; num < 6; num++) {
if(!file_readblock(header, hdr_addr[num], sizeof(snes_header_t))
|| file_res) {
score = 0;
} else {
score = smc_headerscore(header)/(1+(num&1));
if((file_handle.fsize & 0x2ff) == 0x200) {
if(num&1) {
score+=20;
} else {
score=0;
}
} else {
if(!(num&1)) {
score+=20;
} else {
score=0;
}
}
}
//printf("%d: offset = %lX; score = %d\n", num, hdr_addr[num], score); // */
score = smc_headerscore(hdr_addr[num], header);
printf("%d: offset = %lX; score = %d\n", num, hdr_addr[num], score); // */
if(score>=maxscore) {
score_idx=num;
maxscore=score;
}
}
if(score_idx & 1) {
props->offset = 0x200;
} else {
@@ -163,7 +122,7 @@ void smc_id(snes_romprops_t* props) {
(header->map == 0x30 && header->carttype == 0x05 && header->licensee != 0xb2)) {
props->has_dspx = 1;
props->fpga_features |= FEAT_DSPX;
// Pilotwings uses DSP1 instead of DSP1B
/* Pilotwings uses DSP1 instead of DSP1B */
if(!memcmp(header->name, "PILOTWINGS", 10)) {
props->dsp_fw = DSPFW_1;
} else {
@@ -236,17 +195,86 @@ void smc_id(snes_romprops_t* props) {
if(props->ramsize_bytes > 32768 || props->ramsize_bytes < 2048) {
props->ramsize_bytes = 0;
}
props->region = (header->destcode <= 1 || header->destcode >= 13) ? 0 : 1;
/*dprintf("ramsize_bytes: %ld\n", props->ramsize_bytes); */
}
uint8_t smc_headerscore(snes_header_t* header) {
uint8_t score=0;
score += countAllASCII(header->maker, sizeof(header->maker));
score += countAllASCII(header->gamecode, sizeof(header->gamecode));
score += isFixed(header->fixed_00, sizeof(header->fixed_00), 0x00);
score += countAllJISX0201(header->name, sizeof(header->name));
score += 3*isFixed(&header->licensee, sizeof(header->licensee), 0x33);
score += checkChksum(header->cchk, header->chk);
uint8_t smc_headerscore(uint32_t addr, snes_header_t* header) {
int score=0;
uint8_t reset_inst;
uint16_t header_offset;
if((addr & 0xfff) == 0x1b0) {
header_offset = 0x200;
} else {
header_offset = 0;
}
if((file_readblock(header, addr, sizeof(snes_header_t)) < sizeof(snes_header_t))
|| file_res) {
return 0;
}
uint8_t mapper = header->map & ~0x10;
uint16_t resetvector = header->vect_reset; /* not endian safe! */
uint32_t file_addr = (((addr - header_offset) & ~0x7fff) | (resetvector & 0x7fff)) + header_offset;
if(resetvector < 0x8000) return 0;
score += 2*isFixed(&header->licensee, sizeof(header->licensee), 0x33);
score += 4*checkChksum(header->cchk, header->chk);
if(header->carttype < 0x08) score++;
if(header->romsize < 0x10) score++;
if(header->ramsize < 0x08) score++;
if(header->destcode < 0x0e) score++;
if((addr-header_offset) == 0x007fc0 && mapper == 0x20) score += 2;
if((addr-header_offset) == 0x00ffc0 && mapper == 0x21) score += 2;
if((addr-header_offset) == 0x007fc0 && mapper == 0x22) score += 2;
if((addr-header_offset) == 0x40ffc0 && mapper == 0x25) score += 2;
file_readblock(&reset_inst, file_addr, 1);
switch(reset_inst) {
case 0x78: /* sei */
case 0x18: /* clc */
case 0x38: /* sec */
case 0x9c: /* stz abs */
case 0x4c: /* jmp abs */
case 0x5c: /* jml abs */
score += 8;
break;
case 0xc2: /* rep */
case 0xe2: /* sep */
case 0xad: /* lda abs */
case 0xae: /* ldx abs */
case 0xac: /* ldy abs */
case 0xaf: /* lda abs long */
case 0xa9: /* lda imm */
case 0xa2: /* ldx imm */
case 0xa0: /* ldy imm */
case 0x20: /* jsr abs */
case 0x22: /* jsl abs */
score += 4;
break;
case 0x40: /* rti */
case 0x60: /* rts */
case 0x6b: /* rtl */
case 0xcd: /* cmp abs */
case 0xec: /* cpx abs */
case 0xcc: /* cpy abs */
score -= 4;
break;
case 0x00: /* brk */
case 0x02: /* cop */
case 0xdb: /* stp */
case 0x42: /* wdm */
case 0xff: /* sbc abs long indexed */
score -= 8;
break;
}
if(score && addr > 0x400000) score += 4;
if(score < 0) score = 0;
return score;
}

View File

@@ -54,6 +54,19 @@ typedef struct _snes_header {
uint8_t ver; /* 0xDB */
uint16_t cchk; /* 0xDC */
uint16_t chk; /* 0xDE */
uint32_t pad1; /* 0xE0 */
uint16_t vect_cop16; /* 0xE4 */
uint16_t vect_brk16; /* 0xE6 */
uint16_t vect_abt16; /* 0xE8 */
uint16_t vect_nmi16; /* 0xEA */
uint16_t vect_irq16; /* 0xEE */
uint16_t pad2; /* 0xF0 */
uint16_t vect_cop8; /* 0xF4 */
uint32_t pad3; /* 0xF6 */
uint16_t vect_abt8; /* 0xF8 */
uint16_t vect_nmi8; /* 0xFA */
uint16_t vect_reset; /* 0xFC */
uint16_t vect_brk8; /* 0xFE */
} snes_header_t;
typedef struct _snes_romprops {
@@ -66,14 +79,15 @@ typedef struct _snes_romprops {
const uint8_t* dsp_fw; /* DSP (NEC / Hitachi) ROM filename */
const uint8_t* fpga_conf; /* FPGA config file to load (default: base) */
uint8_t has_dspx; /* DSP[1-4] presence flag */
uint8_t has_st0010; /* st0010 presence flag (additional to dspx)*/
uint8_t has_st0010; /* st0010 presence flag (additional to dspx) */
uint8_t has_msu1; /* MSU1 presence flag */
uint8_t has_cx4; /* CX4 presence flag */
uint8_t fpga_features; /* feature/peripheral enable bits*/
uint8_t region; /* game region (derived from destination code) */
snes_header_t header; /* original header from ROM image */
} snes_romprops_t;
void smc_id(snes_romprops_t*);
uint8_t smc_headerscore(snes_header_t*);
uint8_t smc_headerscore(uint32_t addr, snes_header_t* header);
#endif

View File

@@ -44,6 +44,7 @@ uint32_t saveram_crc, saveram_crc_old;
extern snes_romprops_t romprops;
volatile int reset_changed;
volatile int reset_pressed;
void prepare_reset() {
snes_reset(1);

View File

@@ -29,6 +29,8 @@
#define SNES_CMD_LOADROM (1)
#define SNES_CMD_SETRTC (2)
#define SNES_CMD_SYSINFO (3)
#define SNES_CMD_LOADLAST (4)
#define MENU_ERR_OK (0)
#define MENU_ERR_NODSP (1)

318
src/tests/Makefile Normal file
View File

@@ -0,0 +1,318 @@
# Hey Emacs, this is a -*- makefile -*-
#----------------------------------------------------------------------------
# WinAVR Makefile Template written by Eric B. Weddington, Joerg Wunsch, et al.
#
# Released to the Public Domain
#
# Additional material for this makefile was written by:
# Peter Fleury
# Tim Henigan
# Colin O'Flynn
# Reiner Patommel
# Markus Pfaff
# Sander Pool
# Frederik Rouleau
# Carlos Lamas
#
#
# Extensively modified for sd2iec and later adapted for ARM by Ingo Korb
#
# To rebuild project do "make clean" then "make all".
#----------------------------------------------------------------------------
# Read configuration file
ifdef CONFIG
CONFIGSUFFIX = $(CONFIG:config%=%)
else
CONFIG = config
CONFIGSUFFIX =
endif
# Enable verbose compilation with "make V=1"
ifdef V
Q :=
E := @:
else
Q := @
E := @echo
endif
# Include the configuration file
include $(CONFIG)
# Directory for all generated files
OBJDIR := obj$(CONFIGSUFFIX)
# Output format. (can be srec, ihex, binary)
FORMAT = binary
# Linker script
LINKERSCRIPT = lpc1754.ld
# Target file name (without extension).
TARGET = $(OBJDIR)/sd2snes
# List C source files here. (C dependencies are automatically generated.)
SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c crc32.c cic.c cli.c xmodem.c irq.c rle.c sdnative.c msu1.c tests.c
# usbcontrol.c usb_hid.c usbhw_lpc.c usbinit.c usbstdreq.c
# List Assembler source files here.
# Make them always end in a capital .S. Files ending in a lowercase .s
# will not be considered source files but generated files (assembler
# output from the compiler), and will be deleted upon "make clean"!
# Even though the DOS/Win* filesystem matches both .s and .S the same,
# it will preserve the spelling of the filenames, and gcc itself does
# care about how the name is spelled on its command-line.
ASRC = startup.S crc.S
# Optimization level, can be [0, 1, 2, 3, s].
# 0 = turn off optimization. s = optimize for size.
# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
# Use s -mcall-prologues when you really need size...
#OPT = 2
OPT = 2
# Debugging format.
DEBUG = dwarf-2
# List any extra directories to look for include files here.
# Each directory must be seperated by a space.
# Use forward slashes for directory separators.
# For a directory that has spaces, enclose it in quotes.
EXTRAINCDIRS =
# Compiler flag to set the C Standard level.
# c89 = "ANSI" C
# gnu89 = c89 plus GCC extensions
# c99 = ISO C99 standard (not yet fully implemented)
# gnu99 = c99 plus GCC extensions
CSTANDARD = -std=gnu99
# Place -D or -U options here
CDEFS = -DF_OSC=$(CONFIG_MCU_FOSC)UL
# Place -I options here
CINCS =
# CPU-specific flags
ifndef CPUFLAGS
CPUFLAGS := -mthumb -mcpu=cortex-m3
endif
ifndef ARCH
ARCH := arm-none-eabi
endif
# Define programs and commands.
# CC must be defined here to generate the correct CFLAGS
SHELL = sh
CC = $(ARCH)-gcc
OBJCOPY = $(ARCH)-objcopy
OBJDUMP = $(ARCH)-objdump
SIZE = $(ARCH)-size
NM = $(ARCH)-nm
REMOVE = rm -f
COPY = cp
AWK = awk
#---------------- Compiler Options ----------------
# -g*: generate debugging information
# -O*: optimization level
# -f...: tuning, see GCC manual and avr-libc documentation
# -Wall...: warning level
# -Wa,...: tell GCC to pass this to the assembler.
# -adhlns...: create assembler listing
CFLAGS = -g$(DEBUG)
CFLAGS += $(CDEFS) $(CINCS)
CFLAGS += -O$(OPT)
CFLAGS += $(CPUFLAGS) -nostartfiles
#CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
CFLAGS += -Wall -Wstrict-prototypes -Werror
CFLAGS += -Wa,-adhlns=$(OBJDIR)/$(<:.c=.lst)
CFLAGS += -I$(OBJDIR)
CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
CFLAGS += $(CSTANDARD)
CFLAGS += -ffunction-sections -fdata-sections
#---------------- Assembler Options ----------------
# -Wa,...: tell GCC to pass this to the assembler.
# -ahlms: create listing
# -gstabs: have the assembler create line number information; note that
# for use in COFF files, additional information about filenames
# and function names needs to be present in the assembler source
# files -- see avr-libc docs [FIXME: not yet described there]
ASFLAGS = $(CPUFLAGS) -Wa,-adhlns=$(OBJDIR)/$(<:.S=.lst),-gstabs -I$(OBJDIR)
#---------------- Linker Options ----------------
# -Wl,...: tell GCC to pass this to linker.
# -Map: create map file
# --cref: add cross reference to map file
LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
LDFLAGS += -T$(LINKERSCRIPT)
LDFLAGS += -Wl,--gc-sections
ifeq ($(CONFIG_LINKER_RELAX),y)
LDFLAGS += -Wl,-O9,--relax
endif
#============================================================================
# De-dupe the list of C source files
CSRC := $(sort $(SRC))
# Define all object files.
OBJ := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.o) $(ASRC:.S=.o))
# Define all listing files.
LST := $(patsubst %,$(OBJDIR)/%,$(CSRC:.c=.lst) $(ASRC:.S=.lst))
# Compiler flags to generate dependency files.
GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d
# Combine all necessary flags and optional flags.
# Add target processor to flags.
ALL_CFLAGS = -I. $(CFLAGS) $(GENDEPFLAGS)
ALL_ASFLAGS = -I. -x assembler-with-cpp $(ASFLAGS) $(CDEFS)
# Default target.
all: build
build: elf bin hex
$(E) " SIZE $(TARGET).elf"
$(Q)$(ELFSIZE)|grep -v debug
cp $(TARGET).bin $(OBJDIR)/firmware.img
utils/genhdr $(OBJDIR)/firmware.img SNSD $(CONFIG_FWVER)
elf: $(TARGET).elf
bin: $(TARGET).bin
hex: $(TARGET).hex
eep: $(TARGET).eep
lss: $(TARGET).lss
sym: $(TARGET).sym
# # A little helper target for the maintainer =)
# copy2card:
# cp $(TARGET).bin /mbed/hw_LPC1768.bin
program: build
utils/lpcchksum $(TARGET).bin
openocd -f openocd-usb.cfg -f lpc1754.cfg -f flash.cfg
debug: build
openocd -f openocd-usb.cfg -f lpc1754.cfg
reset:
openocd -f openocd-usb.cfg -f lpc1754.cfg -f reset.cfg
# Display size of file.
HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
ELFSIZE = $(SIZE) -A $(TARGET).elf
# Generate autoconf.h from config
.PRECIOUS : $(OBJDIR)/autoconf.h
$(OBJDIR)/autoconf.h: $(CONFIG) | $(OBJDIR)
$(E) " CONF2H $(CONFIG)"
$(Q)$(AWK) -f conf2h.awk $(CONFIG) > $(OBJDIR)/autoconf.h
# Create final output files from ELF output file.
$(OBJDIR)/%.bin: $(OBJDIR)/%.elf
$(E) " BIN $@"
$(Q)$(OBJCOPY) -O binary $< $@
$(OBJDIR)/%.hex: $(OBJDIR)/%.elf
$(E) " HEX $@"
$(Q)$(OBJCOPY) -O $(FORMAT) $< $@
# Create extended listing file from ELF output file.
$(OBJDIR)/%.lss: $(OBJDIR)/%.elf
$(E) " LSS $<"
$(Q)$(OBJDUMP) -h -S $< > $@
# Create a symbol table from ELF output file.
$(OBJDIR)/%.sym: $(OBJDIR)/%.elf
$(E) " SYM $<"
$(E)$(NM) -n $< > $@
# Link: create ELF output file from object files.
.SECONDARY : $(TARGET).elf
.PRECIOUS : $(OBJ)
$(TARGET).elf : $(OBJ)
$(E) " LINK $@"
$(Q)$(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS)
# Compile: create object files from C source files.
$(OBJDIR)/%.o : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
$(E) " CC $<"
$(Q)$(CC) -c $(ALL_CFLAGS) $< -o $@
# Compile: create assembler files from C source files.
$(OBJDIR)/%.s : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
$(CC) -S $(ALL_CFLAGS) $< -o $@
# Assemble: create object files from assembler source files.
$(OBJDIR)/%.o : %.S | $(OBJDIR) $(OBJDIR)/autoconf.h
$(E) " AS $<"
$(Q)$(CC) -c $(ALL_ASFLAGS) $< -o $@
# Create preprocessed source for use in sending a bug report.
$(OBJDIR)/%.i : %.c | $(OBJDIR) $(OBJDIR)/autoconf.h
$(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@
# Create the output directory
$(OBJDIR) :
$(E) " MKDIR $(OBJDIR)"
$(Q)mkdir $(OBJDIR)
# Target: clean project.
clean: begin clean_list end
clean_list :
$(E) " CLEAN"
$(Q)$(REMOVE) $(TARGET).hex
$(Q)$(REMOVE) $(TARGET).bin
$(Q)$(REMOVE) $(TARGET).elf
$(Q)$(REMOVE) $(TARGET).map
$(Q)$(REMOVE) $(TARGET).sym
$(Q)$(REMOVE) $(TARGET).lss
$(Q)$(REMOVE) $(OBJ)
$(Q)$(REMOVE) $(OBJDIR)/autoconf.h
$(Q)$(REMOVE) $(OBJDIR)/*.bin
$(Q)$(REMOVE) $(LST)
$(Q)$(REMOVE) $(CSRC:.c=.s)
$(Q)$(REMOVE) $(CSRC:.c=.d)
$(Q)$(REMOVE) .dep/*
-$(Q)rmdir $(OBJDIR)
# Include the dependency files.
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# Listing of phony targets.
.PHONY : all begin finish end sizebefore sizeafter \
build elf hex lss sym clean clean_list

21
src/tests/bits.h Normal file
View File

@@ -0,0 +1,21 @@
#ifndef _ARM_BITS_H
#define _ARM_BITS_H
/* The classic macro */
#define BV(x) (1<<(x))
/* CM3 bit-band access macro - no error checks! */
#define BITBAND(addr,bit) \
(*((volatile unsigned long *)( \
((unsigned long)&(addr) & 0x01ffffff)*32 + \
(bit)*4 + 0x02000000 + ((unsigned long)&(addr) & 0xfe000000) \
)))
#define BITBAND_OFF(addr,offset,bit) \
(*((volatile unsigned long *)( \
(((unsigned long)&(addr) + offset) & 0x01ffffff)*32 + \
(bit)*4 + 0x02000000 + (((unsigned long)&(addr) + offset) & 0xfe000000) \
)))
#endif

540
src/tests/ccsbcs.c Normal file
View File

@@ -0,0 +1,540 @@
/*------------------------------------------------------------------------*/
/* Unicode - Local code bidirectional converter (C)ChaN, 2009 */
/* (SBCS code pages) */
/*------------------------------------------------------------------------*/
/* 437 U.S. (OEM)
/ 720 Arabic (OEM)
/ 1256 Arabic (Windows)
/ 737 Greek (OEM)
/ 1253 Greek (Windows)
/ 1250 Central Europe (Windows)
/ 775 Baltic (OEM)
/ 1257 Baltic (Windows)
/ 850 Multilingual Latin 1 (OEM)
/ 852 Latin 2 (OEM)
/ 1252 Latin 1 (Windows)
/ 855 Cyrillic (OEM)
/ 1251 Cyrillic (Windows)
/ 866 Russian (OEM)
/ 857 Turkish (OEM)
/ 1254 Turkish (Windows)
/ 858 Multilingual Latin 1 + Euro (OEM)
/ 862 Hebrew (OEM)
/ 1255 Hebrew (Windows)
/ 874 Thai (OEM, Windows)
/ 1258 Vietnam (OEM, Windows)
*/
#include "../ff.h"
#if _CODE_PAGE == 437
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 720
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 737
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 775
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 850
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 852
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 855
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 857
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 858
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 862
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 866
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 874
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
};
#elif _CODE_PAGE == 1250
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
};
#elif _CODE_PAGE == 1251
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
};
#elif _CODE_PAGE == 1252
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
};
#elif _CODE_PAGE == 1253
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
};
#elif _CODE_PAGE == 1254
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
};
#elif _CODE_PAGE == 1255
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
};
#elif _CODE_PAGE == 1256
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
}
#elif _CODE_PAGE == 1257
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
};
#elif _CODE_PAGE == 1258
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
};
#endif
#if !_TBLDEF || !_USE_LFN
#error This file is not needed in current configuration. Remove from the project.
#endif
WCHAR ff_convert ( /* Converted character, Returns zero on error */
WCHAR src, /* Character code to be converted */
UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
)
{
WCHAR c;
if (src < 0x80) { /* ASCII */
c = src;
} else {
if (dir) { /* OEMCP to Unicode */
c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
} else { /* Unicode to OEMCP */
for (c = 0; c < 0x80; c++) {
if (src == Tbl[c]) break;
}
c = (c + 0x80) & 0xFF;
}
}
return c;
}
WCHAR ff_wtoupper ( /* Upper converted character */
WCHAR chr /* Input character */
)
{
static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
int i;
for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
return tbl_lower[i] ? tbl_upper[i] : chr;
}

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#include <arm/NXP/LPC17xx/LPC17xx.h>
#include "bits.h"
#include "config.h"
#include "uart.h"
#include "cic.h"
char *cicstatenames[4] = { "CIC_OK", "CIC_FAIL", "CIC_PAIR", "CIC_SCIC" };
void print_cic_state() {
printf("CIC state: %s\n", get_cic_statename(get_cic_state()));
}
inline char *get_cic_statename(enum cicstates state) {
return cicstatenames[state];
}
enum cicstates get_cic_state() {
uint32_t count;
uint32_t togglecount = 0;
uint8_t state, state_old;
state_old = BITBAND(SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT);
/* this loop samples at ~10MHz */
for(count=0; count<CIC_SAMPLECOUNT; count++) {
state = BITBAND(SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT);
if(state != state_old) {
togglecount++;
}
state_old = state;
}
/* CIC_TOGGLE_THRESH_PAIR > CIC_TOGGLE_THRESH_SCIC */
if(togglecount > CIC_TOGGLE_THRESH_PAIR) {
return CIC_PAIR;
} else if(togglecount > CIC_TOGGLE_THRESH_SCIC) {
return CIC_SCIC;
} else if(state) {
return CIC_OK;
} else return CIC_FAIL;
}
void cic_init(int allow_pairmode) {
BITBAND(SNES_CIC_PAIR_REG->FIODIR, SNES_CIC_PAIR_BIT) = 1;
if(allow_pairmode) {
BITBAND(SNES_CIC_PAIR_REG->FIOCLR, SNES_CIC_PAIR_BIT) = 1;
} else {
BITBAND(SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT) = 1;
}
BITBAND(SNES_CIC_D0_REG->FIODIR, SNES_CIC_D0_BIT) = 0;
BITBAND(SNES_CIC_D1_REG->FIODIR, SNES_CIC_D1_BIT) = 0;
}
/* prepare GPIOs for pair mode + set initial modes */
void cic_pair(int init_vmode, int init_d4) {
cic_videomode(init_vmode);
cic_d4(init_d4);
BITBAND(SNES_CIC_D0_REG->FIODIR, SNES_CIC_D0_BIT) = 1;
BITBAND(SNES_CIC_D1_REG->FIODIR, SNES_CIC_D1_BIT) = 1;
}
void cic_videomode(int value) {
if(value) {
BITBAND(SNES_CIC_D0_REG->FIOSET, SNES_CIC_D0_BIT) = 1;
} else {
BITBAND(SNES_CIC_D0_REG->FIOCLR, SNES_CIC_D0_BIT) = 1;
}
}
void cic_d4(int value) {
if(value) {
BITBAND(SNES_CIC_D1_REG->FIOSET, SNES_CIC_D1_BIT) = 1;
} else {
BITBAND(SNES_CIC_D1_REG->FIOCLR, SNES_CIC_D1_BIT) = 1;
}
}

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#ifndef _CIC_H
#define _CIC_H
#define CIC_SAMPLECOUNT (100000)
#define CIC_TOGGLE_THRESH_PAIR (2500)
#define CIC_TOGGLE_THRESH_SCIC (10)
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include "bits.h"
enum cicstates { CIC_OK = 0, CIC_FAIL, CIC_PAIR, CIC_SCIC };
enum cic_region { CIC_NTSC = 0, CIC_PAL };
void print_cic_state(void);
char *get_cic_statename(enum cicstates state);
enum cicstates get_cic_state(void);
void cic_init(int allow_pairmode);
void cic_pair(int init_vmode, int init_d4);
void cic_videomode(int value);
void cic_d4(int value);
#endif

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/* tapplay - TAP file playback for sd2iec hardware
Copyright (C) 2009 Ingo Korb <ingo@akana.de>
Inspiration and low-level SD/MMC access based on code from MMC2IEC
by Lars Pontoppidan et al., see sdcard.c|h and config.h.
FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; version 2 of the License only.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
cli.c: The command line interface
*/
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include <arm/bits.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <errno.h>
#include <string.h>
#include <stdint.h>
#include <stdlib.h>
#include "config.h"
#include "diskio.h"
#include "ff.h"
#include "timer.h"
#include "uart.h"
#include "fileops.h"
#include "memory.h"
#include "snes.h"
#include "fpga.h"
#include "fpga_spi.h"
#include "cic.h"
#include "xmodem.h"
#include "rtc.h"
#include "cli.h"
#define MAX_LINE 250
/* Variables */
static char cmdbuffer[MAX_LINE+1];
static char *curchar;
/* Word lists */
static char command_words[] =
"cd\0reset\0sreset\0dir\0ls\0test\0resume\0loadrom\0loadraw\0saveraw\0put\0rm\0d4\0vmode\0mapper\0settime\0time\0setfeature\0hexdump\0w8\0w16\0memsel\0";
enum { CMD_CD = 0, CMD_RESET, CMD_SRESET, CMD_DIR, CMD_LS, CMD_TEST, CMD_RESUME, CMD_LOADROM, CMD_LOADRAW, CMD_SAVERAW, CMD_PUT, CMD_RM, CMD_D4, CMD_VMODE, CMD_MAPPER, CMD_SETTIME, CMD_TIME, CMD_SETFEATURE, CMD_HEXDUMP, CMD_W8, CMD_W16, CMD_MEMSEL };
/* ------------------------------------------------------------------------- */
/* Parse functions */
/* ------------------------------------------------------------------------- */
/* Skip spaces at curchar */
static uint8_t skip_spaces(void) {
uint8_t res = (*curchar == ' ' || *curchar == 0);
while (*curchar == ' ')
curchar++;
return res;
}
/* Parse the string in curchar for an integer with bounds [lower,upper] */
static int32_t parse_unsigned(uint32_t lower, uint32_t upper, uint8_t base) {
char *end;
uint32_t result;
if (strlen(curchar) == 1 && *curchar == '?') {
printf("Number between %ld[0x%lx] and %ld[0x%lx] expected\n",lower,lower,upper,upper);
return -2;
}
result = strtoul(curchar, &end, base);
if ((*end != ' ' && *end != 0) || errno != 0) {
printf("Invalid numeric argument\n");
return -1;
}
curchar = end;
skip_spaces();
if (result < lower || result > upper) {
printf("Numeric argument out of range (%ld..%ld)\n",lower,upper);
return -1;
}
return result;
}
/* Parse the string starting with curchar for a word in wordlist */
static int8_t parse_wordlist(char *wordlist) {
uint8_t i, matched;
char *cur, *ptr;
char c;
i = 0;
ptr = wordlist;
// Command list on "?"
if (strlen(curchar) == 1 && *curchar == '?') {
printf("Commands available: \n ");
while (1) {
c = *ptr++;
if (c == 0) {
if (*ptr == 0) {
printf("\n");
return -2;
} else {
printf("\n ");
}
} else
uart_putc(c);
}
}
while (1) {
cur = curchar;
matched = 1;
c = *ptr;
do {
// If current word list character is \0: No match found
if (c == 0) {
printf("Unknown word: %s\n",curchar);
return -1;
}
if (tolower(c) != tolower(*cur)) {
// Check for end-of-word
if (cur != curchar && (*cur == ' ' || *cur == 0)) {
// Partial match found, return that
break;
} else {
matched = 0;
break;
}
}
ptr++;
cur++;
c = *ptr;
} while (c != 0);
if (matched) {
char *tmp = curchar;
curchar = cur;
// Return match only if whitespace or end-of-string follows
// (avoids mismatching partial words)
if (skip_spaces()) {
return i;
} else {
printf("Unknown word: %s\n(use ? for help)\n",tmp);
return -1;
}
} else {
// Try next word in list
i++;
while (*ptr++ != 0) ;
}
}
}
/* Read a line from serial, uses cmdbuffer as storage */
static char *getline(char *prompt) {
int i=0;
char c;
printf("\n%s",prompt);
memset(cmdbuffer,0,sizeof(cmdbuffer));
while (1) {
c = uart_getc();
if (c == 13)
break;
if (c == 27 || c == 3) {
printf("\\\n%s",prompt);
i = 0;
memset(cmdbuffer,0,sizeof(cmdbuffer));
continue;
}
if (c == 127 || c == 8) {
if (i > 0) {
i--;
uart_putc(8); // backspace
uart_putc(' '); // erase character
uart_putc(8); // backspace
} else
continue;
} else {
if (i < sizeof(cmdbuffer)-1) {
cmdbuffer[i++] = c;
uart_putc(c);
}
}
}
cmdbuffer[i] = 0;
return cmdbuffer;
}
/* ------------------------------------------------------------------------- */
/* Command functions */
/* ------------------------------------------------------------------------- */
/* Reset */
static void cmd_reset(void) {
/* force watchdog reset */
LPC_WDT->WDTC = 256; // minimal timeout
LPC_WDT->WDCLKSEL = BV(31); // internal RC, lock register
LPC_WDT->WDMOD = BV(0) | BV(1); // enable watchdog and reset-by-watchdog
LPC_WDT->WDFEED = 0xaa;
LPC_WDT->WDFEED = 0x55; // initial feed to really enable WDT
}
/* Show the contents of the current directory */
static void cmd_show_directory(void) {
FRESULT res;
DIR dh;
FILINFO finfo;
uint8_t *name;
f_getcwd((TCHAR*)file_lfn, 255);
res = f_opendir(&dh, (TCHAR*)file_lfn);
if (res != FR_OK) {
printf("f_opendir failed, result %d\n",res);
return;
}
finfo.lfname = (TCHAR*)file_lfn;
finfo.lfsize = 255;
do {
/* Read the next entry */
res = f_readdir(&dh, &finfo);
if (res != FR_OK) {
printf("f_readdir failed, result %d\n",res);
return;
}
/* Abort if none was found */
if (!finfo.fname[0])
break;
/* Skip volume labels */
if (finfo.fattrib & AM_VOL)
continue;
/* Select between LFN and 8.3 name */
if (finfo.lfname[0])
name = (uint8_t*)finfo.lfname;
else {
name = (uint8_t*)finfo.fname;
strlwr((char *)name);
}
printf("%s",name);
/* Directory indicator (Unix-style) */
if (finfo.fattrib & AM_DIR)
uart_putc('/');
printf("\n");
} while (finfo.fname[0]);
}
static void cmd_loadrom(void) {
uint32_t address = 0;
uint8_t flags = LOADROM_WITH_SRAM | LOADROM_WITH_RESET;
load_rom((uint8_t*)curchar, address, flags);
}
static void cmd_loadraw(void) {
uint32_t address = parse_unsigned(0,16777216,16);
load_sram((uint8_t*)curchar, address);
}
static void cmd_saveraw(void) {
uint32_t address = parse_unsigned(0,16777216,16);
uint32_t length = parse_unsigned(0,16777216,16);
save_sram((uint8_t*)curchar, length, address);
}
static void cmd_d4(void) {
int32_t hz;
if(get_cic_state() != CIC_PAIR) {
printf("not in pair mode\n");
} else {
hz = parse_unsigned(50,60,10);
if(hz==50) {
cic_d4(CIC_PAL);
} else {
cic_d4(CIC_NTSC);
}
printf("ok\n");
}
}
static void cmd_vmode(void) {
int32_t hz;
if(get_cic_state() != CIC_PAIR) {
printf("not in pair mode\n");
} else {
hz = parse_unsigned(50,60,10);
if(hz==50) {
cic_videomode(CIC_PAL);
} else {
cic_videomode(CIC_NTSC);
}
printf("ok\n");
}
}
void cmd_put(void) {
if(*curchar != 0) {
file_open((uint8_t*)curchar, FA_CREATE_ALWAYS | FA_WRITE);
if(file_res) {
printf("FAIL: error opening file %s\n", curchar);
} else {
printf("OK, start xmodem transfer now.\n");
xmodem_rxfile(&file_handle);
}
file_close();
} else {
printf("Usage: put <filename>\n");
}
}
void cmd_rm(void) {
FRESULT res = f_unlink(curchar);
if(res) printf("Error %d removing %s\n", res, curchar);
}
void cmd_mapper(void) {
int32_t mapper;
mapper = parse_unsigned(0,7,10);
set_mapper((uint8_t)mapper & 0x7);
printf("mapper set to %ld\n", mapper);
}
void cmd_sreset(void) {
if(*curchar != 0) {
int32_t resetstate;
resetstate = parse_unsigned(0,1,10);
snes_reset(resetstate);
} else {
snes_reset(1);
delay_ms(20);
snes_reset(0);
}
}
void cmd_settime(void) {
struct tm time;
if(strlen(curchar) != 4+2+2 + 2+2+2) {
printf("invalid time format (need YYYYMMDDhhmmss)\n");
} else {
time.tm_sec = atoi(curchar+4+2+2+2+2);
curchar[4+2+2+2+2] = 0;
time.tm_min = atoi(curchar+4+2+2+2);
curchar[4+2+2+2] = 0;
time.tm_hour = atoi(curchar+4+2+2);
curchar[4+2+2] = 0;
time.tm_mday = atoi(curchar+4+2);
curchar[4+2] = 0;
time.tm_mon = atoi(curchar+4);
curchar[4] = 0;
time.tm_year = atoi(curchar);
set_rtc(&time);
}
}
void cmd_time(void) {
struct tm time;
read_rtc(&time);
printf("%04d-%02d-%02d %02d:%02d:%02d\n", time.tm_year, time.tm_mon,
time.tm_mday, time.tm_hour, time.tm_min, time.tm_sec);
}
void cmd_setfeature(void) {
uint8_t feat = parse_unsigned(0, 255, 16);
fpga_set_features(feat);
}
void cmd_hexdump(void) {
uint32_t offset = parse_unsigned(0, 16777215, 16);
uint32_t len = parse_unsigned(0, 16777216, 16);
sram_hexdump(offset, len);
}
void cmd_w8(void) {
uint32_t offset = parse_unsigned(0, 16777215, 16);
uint8_t val = parse_unsigned(0, 255, 16);
sram_writebyte(val, offset);
}
void cmd_w16(void) {
uint32_t offset = parse_unsigned(0, 16777215, 16);
uint16_t val = parse_unsigned(0, 65535, 16);
sram_writeshort(val, offset);
}
void cmd_memsel(void) {
uint8_t unit = parse_unsigned(0,1,10);
fpga_select_mem(unit);
}
/* ------------------------------------------------------------------------- */
/* CLI interface functions */
/* ------------------------------------------------------------------------- */
void cli_init(void) {
}
void cli_entrycheck() {
if(uart_gotc() && uart_getc() == 27) {
printf("*** BREAK\n");
cli_loop();
}
}
void cli_loop(void) {
snes_reset(1);
while (1) {
curchar = getline(">");
printf("\n");
/* Process medium changes before executing the command */
if (disk_state != DISK_OK && disk_state != DISK_REMOVED) {
FRESULT res;
printf("Medium changed... ");
res = f_mount(0,&fatfs);
if (res != FR_OK) {
printf("Failed to mount new medium, result %d\n",res);
} else {
printf("Ok\n");
}
}
/* Remove whitespace */
while (*curchar == ' ') curchar++;
while (strlen(curchar) > 0 && curchar[strlen(curchar)-1] == ' ')
curchar[strlen(curchar)-1] = 0;
/* Ignore empty lines */
if (strlen(curchar) == 0)
continue;
/* Parse command */
int8_t command = parse_wordlist(command_words);
if (command < 0)
continue;
FRESULT res;
switch (command) {
case CMD_CD:
#if _FS_RPATH
if (strlen(curchar) == 0) {
f_getcwd((TCHAR*)file_lfn, 255);
printf("%s\n",file_lfn);
break;
}
res = f_chdir((const TCHAR *)curchar);
if (res != FR_OK) {
printf("chdir %s failed with result %d\n",curchar,res);
} else {
printf("Ok.\n");
}
#else
printf("cd not supported.\n");
res;
#endif
break;
case CMD_RESET:
cmd_reset();
break;
case CMD_SRESET:
cmd_sreset();
break;
case CMD_DIR:
case CMD_LS:
cmd_show_directory();
break;
case CMD_RESUME:
return;
break;
case CMD_LOADROM:
cmd_loadrom();
break;
case CMD_LOADRAW:
cmd_loadraw();
break;
case CMD_SAVERAW:
cmd_saveraw();
break;
case CMD_RM:
cmd_rm();
break;
case CMD_D4:
cmd_d4();
break;
case CMD_VMODE:
cmd_vmode();
break;
case CMD_PUT:
cmd_put();
break;
case CMD_MAPPER:
cmd_mapper();
break;
case CMD_SETTIME:
cmd_settime();
break;
case CMD_TIME:
cmd_time();
break;
case CMD_TEST:
testbattery();
break;
case CMD_SETFEATURE:
cmd_setfeature();
break;
case CMD_HEXDUMP:
cmd_hexdump();
break;
case CMD_W8:
cmd_w8();
break;
case CMD_W16:
cmd_w16();
break;
case CMD_MEMSEL:
cmd_memsel();
break;
}
}
}

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/* tapplay - TAP file playback for sd2iec hardware
Copyright (C) 2009 Ingo Korb <ingo@akana.de>
Inspiration and low-level SD/MMC access based on code from MMC2IEC
by Lars Pontoppidan et al., see sdcard.c|h and config.h.
FAT filesystem access based on code from ChaN and Jim Brain, see ff.c|h.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; version 2 of the License only.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
cli.h: Definitions for cli.c
*/
#ifndef CLI_H
#define CLI_H
void cli_init(void);
void cli_loop(void);
void cli_entrycheck(void);
#endif

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/* ___DISCLAIMER___ */
/* clock.c: PLL, CCLK, PCLK controls */
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include "clock.h"
#include "bits.h"
#include "uart.h"
void clock_disconnect() {
disconnectPLL0();
disablePLL0();
}
void clock_init() {
/* set flash access time to 5 clks (80<f<=100MHz) */
setFlashAccessTime(5);
/* setup PLL0 for ~44100*256*8 Hz
Base clock: 12MHz
Multiplier: 429
Pre-Divisor: 19
Divisor: 6
(want: 90316800, get: 90315789.47)
-> DAC freq = 44099.5 Hz
-> FPGA freq = 11289473.7Hz
First, disable and disconnect PLL0.
*/
// clock_disconnect();
/* PLL is disabled and disconnected. setup PCLK NOW as it cannot be changed
reliably with PLL0 connected.
see:
http://ics.nxp.com/support/documents/microcontrollers/pdf/errata.lpc1754.pdf
*/
/* continue with PLL0 setup:
enable the xtal oscillator and wait for it to become stable
set the oscillator as clk source for PLL0
set PLL0 multiplier+predivider
enable PLL0
set CCLK divider
wait for PLL0 to lock
connect PLL0
done
*/
enableMainOsc();
setClkSrc(CLKSRC_MAINOSC);
// XXX setPLL0MultPrediv(429, 19);
// XXX setPLL0MultPrediv(23, 2);
setPLL0MultPrediv(12, 1);
enablePLL0();
setCCLKDiv(3);
connectPLL0();
}
void setFlashAccessTime(uint8_t clocks) {
LPC_SC->FLASHCFG=FLASHTIM(clocks);
}
void setPLL0MultPrediv(uint16_t mult, uint8_t prediv) {
LPC_SC->PLL0CFG=PLL_MULT(mult) | PLL_PREDIV(prediv);
PLL0feed();
}
void enablePLL0() {
LPC_SC->PLL0CON |= PLLE0;
PLL0feed();
}
void disablePLL0() {
LPC_SC->PLL0CON &= ~PLLE0;
PLL0feed();
}
void connectPLL0() {
while(!(LPC_SC->PLL0STAT&PLOCK0));
LPC_SC->PLL0CON |= PLLC0;
PLL0feed();
}
void disconnectPLL0() {
LPC_SC->PLL0CON &= ~PLLC0;
PLL0feed();
}
void setCCLKDiv(uint8_t div) {
LPC_SC->CCLKCFG=CCLK_DIV(div);
}
void enableMainOsc() {
LPC_SC->SCS=OSCEN;
while(!(LPC_SC->SCS&OSCSTAT));
}
void disableMainOsc() {
LPC_SC->SCS=0;
}
void PLL0feed() {
LPC_SC->PLL0FEED=0xaa;
LPC_SC->PLL0FEED=0x55;
}
void setClkSrc(uint8_t src) {
LPC_SC->CLKSRCSEL=src;
}

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#ifndef _CLOCK_H
#define _CLOCK_H
#define PLL_MULT(x) ((x-1)&0x7fff)
#define PLL_PREDIV(x) (((x-1)<<16)&0xff0000)
#define CCLK_DIV(x) ((x-1)&0xff)
#define CLKSRC_MAINOSC (1)
#define PLLE0 (1<<0)
#define PLLC0 (1<<1)
#define PLOCK0 (1<<26)
#define OSCEN (1<<5)
#define OSCSTAT (1<<6)
#define FLASHTIM(x) (((x-1)<<12)|0x3A)
#define PCLK_CCLK(x) (1<<(x))
#define PCLK_CCLK4(x) (0)
#define PCLK_CCLK8(x) (3<<(x))
#define PCLK_CCLK2(x) (2<<(x))
/* shift values for use with PCLKSEL0 */
#define PCLK_WDT (0)
#define PCLK_TIMER0 (2)
#define PCLK_TIMER1 (4)
#define PCLK_UART0 (6)
#define PCLK_UART1 (8)
#define PCLK_PWM1 (12)
#define PCLK_I2C0 (14)
#define PCLK_SPI (16)
#define PCLK_SSP1 (20)
#define PCLK_DAC (22)
#define PCLK_ADC (24)
#define PCLK_CAN1 (26)
#define PCLK_CAN2 (28)
#define PCLK_ACF (30)
/* shift values for use with PCLKSEL1 */
#define PCLK_QEI (0)
#define PCLK_GPIOINT (2)
#define PCLK_PCB (4)
#define PCLK_I2C1 (6)
#define PCLK_SSP0 (10)
#define PCLK_TIMER2 (12)
#define PCLK_TIMER3 (14)
#define PCLK_UART2 (16)
#define PCLK_UART3 (18)
#define PCLK_I2C2 (20)
#define PCLK_I2S (22)
#define PCLK_RIT (26)
#define PCLK_SYSCON (28)
#define PCLK_MC (30)
void clock_disconnect(void);
void clock_init(void);
void setFlashAccessTime(uint8_t clocks);
void setPLL0MultPrediv(uint16_t mult, uint8_t prediv);
void enablePLL0(void);
void disablePLL0(void);
void connectPLL0(void);
void disconnectPLL0(void);
void setCCLKDiv(uint8_t div);
void enableMainOsc(void);
void disableMainOsc(void);
void PLL0feed(void);
void setClkSrc(uint8_t src);
#endif

29
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#! /usr/bin/gawk -f
# Trivial little script to convert from a makefile-style configuration
# file to a C header. No copyright claimed.
BEGIN {
print "// autoconf.h generated from " ARGV[1] " at " strftime() "\n" \
"#ifndef AUTOCONF_H\n" \
"#define AUTOCONF_H"
}
/^#/ { sub(/^#/,"//") }
/^CONFIG_.*=/ {
if (/=n$/) {
sub(/^/,"// ");
} else {
sub(/^/,"#define ")
if (/=y$/) {
sub(/=.*$/,"")
} else {
sub(/=/," ")
}
}
}
{ print }
END { print "#endif" }

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CONFIG_VERSION=0.0.1
CONFIG_FWVER=16777214
#CONFIG_FWVER=1146310227
CONFIG_MCU_FOSC=12000000

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#ifndef _CONFIG_H
#define _CONFIG_H
// #define DEBUG_FS
// #define DEBUG_SD
// #define DEBUG_IRQ
// #define DEBUG_MSU1
#define VER "0.0.1(NSFW)"
#define IN_AHBRAM __attribute__ ((section(".ahbram")))
#define SD_DT_INT_SETUP() do {\
BITBAND(LPC_GPIOINT->IO2IntEnR, SD_DT_BIT) = 1;\
BITBAND(LPC_GPIOINT->IO2IntEnF, SD_DT_BIT) = 1;\
} while(0)
#define SD_CHANGE_DETECT (BITBAND(LPC_GPIOINT->IO2IntStatR, SD_DT_BIT)\
|BITBAND(LPC_GPIOINT->IO2IntStatF, SD_DT_BIT))
#define SD_CHANGE_CLR() do {LPC_GPIOINT->IO2IntClr = BV(SD_DT_BIT);} while(0)
#define SD_DT_REG LPC_GPIO0
#define SD_DT_BIT 8
#define SD_WP_REG LPC_GPIO0
#define SD_WP_BIT 6
#define SDCARD_DETECT (!(BITBAND(SD_DT_REG->FIOPIN, SD_DT_BIT)))
#define SDCARD_WP (BITBAND(SD_WP_REG->FIOPIN, SD_WP_BIT))
#define SD_SUPPLY_VOLTAGE (1L<<21) /* 3.3V - 3.4V */
#define CONFIG_SD_BLOCKTRANSFER 1
#define CONFIG_SD_AUTO_RETRIES 10
// #define SD_CHANGE_VECT
// #define CONFIG_SD_DATACRC 1
#define CONFIG_UART_NUM 3
// #define CONFIG_CPU_FREQUENCY 90315789
#define CONFIG_CPU_FREQUENCY 96000000
//#define CONFIG_CPU_FREQUENCY 46000000
#define CONFIG_UART_PCLKDIV 1
#define CONFIG_UART_TX_BUF_SHIFT 8
#define CONFIG_UART_BAUDRATE 921600
#define CONFIG_UART_DEADLOCKABLE
#define SSP_CLK_DIVISOR_FAST 2
#define SSP_CLK_DIVISOR_SLOW 250
#define SSP_CLK_DIVISOR_FPGA_FAST 6
#define SSP_CLK_DIVISOR_FPGA_SLOW 20
#define SNES_RESET_REG LPC_GPIO1
#define SNES_RESET_BIT 26
#define SNES_CIC_D0_REG LPC_GPIO0
#define SNES_CIC_D0_BIT 1
#define SNES_CIC_D1_REG LPC_GPIO0
#define SNES_CIC_D1_BIT 0
#define SNES_CIC_STATUS_REG LPC_GPIO1
#define SNES_CIC_STATUS_BIT 29
#define SNES_CIC_PAIR_REG LPC_GPIO1
#define SNES_CIC_PAIR_BIT 25
#define FPGA_MCU_RDY_REG LPC_GPIO2
#define FPGA_MCU_RDY_BIT 9
#define QSORT_MAXELEM 2048
#define SSP_REGS LPC_SSP0
#define SSP_PCLKREG PCLKSEL1
// 1: PCLKSEL0
#define SSP_PCLKBIT 10
// 1: 20
#define SSP_DMAID_TX 0
// 1: 2
#define SSP_DMAID_RX 1
// 1: 3
#define SSP_DMACH LPC_GPDMACH0
#define SD_CLKREG LPC_GPIO0
#define SD_CMDREG LPC_GPIO0
#define SD_DAT0REG LPC_GPIO2
#define SD_DAT1REG LPC_GPIO2
#define SD_DAT2REG LPC_GPIO2
#define SD_DAT3REG LPC_GPIO2
#define SD_CLKPIN (7)
#define SD_CMDPIN (9)
#define SD_DAT0PIN (0)
#define SD_DAT1PIN (1)
#define SD_DAT2PIN (2)
#define SD_DAT3PIN (3)
#define SD_DAT (LPC_GPIO2->FIOPIN0)
#endif

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/* CRC-7/CRC-16 (XModem) implementation for Cortex M3
*
* Written 2010 by Ingo Korb
*/
.syntax unified
.section .text
/* uint8_t crc7update(uint8_t crc, const uint8_t data) */
.global crc7update
.thumb_func
crc7update:
mov r2, #8 // number of bits to process
lsl r1, r1, #24 // pre-shift data byte to top of word
loop:
lsl r0, r0, #1 // shift CRC
lsls r1, r1, #1 // shift data byte (highest bit now in C)
bcc 0f // jump if bit was 0
eor r0, r0, #0x80 // invert top bit of CRC if not
0: tst r0, #0x80 // test top bit of CRC
beq 1f // skip if top bit is clear
eor r0, r0, #0x09 // apply polinomial
1: subs r2, r2, #1 // decrememt bit cointer
bne loop // loop for next bit
uxtb r0, r0 // clear top bits of result
bx lr // return
/* uint16_t crc_xmodem_block(uint16_t crc, uint8_t *data, uint32_t len) */
.global crc_xmodem_block
.thumb_func
crc_xmodem_block:
adr r12, crc_table // load address of crc table
blockloop:
ldrb.w r3, [r1], #1 // read data byte
eor r3, r3, r0, lsr #8 // EOR data byte
ldrh r3, [r12, r3, lsl #1] // load value from CRC table
eor r0, r3, r0, lsl #8 // update CRC
uxth r0, r0 // clear top bits of result
subs r2, r2, #1 // decrement length
bne blockloop // loop while length > 0
bx lr // return
/* uint16_t crc_xmodem_block(uint16_t crc, uint8_t *data, uint32_t len) */
.global crc_xmodem_update
.thumb_func
crc_xmodem_update:
adr r2, crc_table // load address of crc table
eor r1, r1, r0, lsr #8 // EOR data byte
ldrh r3, [r2, r1, lsl #1] // load value from CRC table
eor r0, r3, r0, lsl #8 // update CRC
uxth r0, r0 // clear top bits of result
bx lr // return
crc_table:
.short 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7
.short 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef
.short 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6
.short 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de
.short 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485
.short 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d
.short 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4
.short 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc
.short 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823
.short 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b
.short 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12
.short 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a
.short 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41
.short 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49
.short 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70
.short 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78
.short 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f
.short 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067
.short 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e
.short 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256
.short 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d
.short 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405
.short 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c
.short 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634
.short 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab
.short 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3
.short 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a
.short 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92
.short 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9
.short 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1
.short 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8
.short 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
.end

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#ifndef CRC_H
#define CRC_H
uint8_t crc7update(uint8_t crc, uint8_t data);
uint16_t crc_xmodem_update(uint16_t crc, uint8_t data);
uint16_t crc_xmodem_block(uint16_t crc, const uint8_t *data, uint32_t length);
// AVR-libc compatibility
#define _crc_xmodem_update(crc,data) crc_xmodem_update(crc,data)
#endif

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/**
* \file crc32.c
* Functions and types for CRC checks.
*
* Generated on Sat Sep 25 18:06:34 2010,
* by pycrc v0.7.1, http://www.tty1.net/pycrc/
* using the configuration:
* Width = 32
* Poly = 0x04c11db7
* XorIn = 0xffffffff
* ReflectIn = True
* XorOut = 0xffffffff
* ReflectOut = True
* Algorithm = table-driven
* Direct = True
*****************************************************************************/
#include "crc32.h"
#include "config.h"
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include <stdlib.h>
/**
* Static table used for the table_driven implementation.
*****************************************************************************/
static const uint32_t crc32_table[256] = {
0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
};
/**
* Update the crc value with new data.
*
* \param crc The current crc value.
* \param data Pointer to a buffer of \a data_len bytes.
* \param data_len Number of bytes in the \a data buffer.
* \return The updated crc value.
*****************************************************************************/
uint32_t crc32_update(uint32_t crc, const unsigned char data)
{
unsigned int tbl_idx;
tbl_idx = (crc ^ data) & 0xff;
crc = (crc32_table[tbl_idx] ^ (crc >> 8)) & 0xffffffff;
return crc & 0xffffffff;
}

68
src/tests/crc32.h Normal file
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@@ -0,0 +1,68 @@
/**
* \file crc32.h
* Functions and types for CRC checks.
*
* Generated on Sat Sep 25 18:06:37 2010,
* by pycrc v0.7.1, http://www.tty1.net/pycrc/
* using the configuration:
* Width = 32
* Poly = 0x04c11db7
* XorIn = 0xffffffff
* ReflectIn = True
* XorOut = 0xffffffff
* ReflectOut = True
* Algorithm = table-driven
* Direct = True
*****************************************************************************/
#ifndef __CRC___H__
#define __CRC___H__
#include <arm/NXP/LPC17xx/LPC17xx.h>
#include <stdlib.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* The definition of the used algorithm.
*****************************************************************************/
#define CRC_ALGO_TABLE_DRIVEN 1
/**
* Calculate the initial crc value.
*
* \return The initial crc value.
*****************************************************************************/
static inline uint32_t crc_init(void)
{
return 0xffffffff;
}
/**
* Update the crc value with new data.
*
* \param crc The current crc value.
* \param data Pointer to a buffer of \a data_len bytes.
* \param data_len Number of bytes in the \a data buffer.
* \return The updated crc value.
*****************************************************************************/
uint32_t crc32_update(uint32_t crc, const unsigned char data);
/**
* Calculate the final crc value.
*
* \param crc The current crc value.
* \return The final crc value.
*****************************************************************************/
static inline uint32_t crc32_finalize(uint32_t crc)
{
return crc ^ 0xffffffff;
}
#ifdef __cplusplus
} /* closing brace for extern "C" */
#endif
#endif /* __CRC___H__ */

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