revyos_defconfig: enable nfs kernel server support

riscv: dts: add lpi4a laptop device tree
riscv: dts: add cluster device tree
2026-06-21 17:22:24 +02:00 · 2023-09-11 20:15:56 +08:00 · 2023-09-11 18:35:35 +08:00 · 2023-09-11 18:35:18 +08:00 · 2023-09-06 12:31:53 +08:00 · 2023-09-04 17:15:41 +08:00
995 changed files with 399635 additions and 9304 deletions
--- a/.github/workflows/kernel.yml
+++ b/.github/workflows/kernel.yml
@@ -0,0 +1,103 @@
+name: revyos-kernel-build
+
+on:
+  push:
+  pull_request:
+  workflow_dispatch:
+  schedule:
+    - cron: "0 2 * * *"
+
+env:
+  xuetie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1663142514282
+  toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.6.1-20220906.tar.gz
+  ARCH: riscv
+  board: lpi4a
+
+jobs:
+  kernel:
+    strategy:
+      fail-fast: false
+      matrix:
+        include:
+          - name: thead-gcc
+            toolchain_tripe: riscv64-unknown-linux-gnu-
+          - name: gcc-12
+            toolchain_tripe: riscv64-linux-gnu-
+
+    runs-on: ubuntu-22.04
+    env:
+      CROSS_COMPILE: ${{ matrix.toolchain_tripe }}
+
+    steps:
+      - name: Install software
+        run: |
+              sudo apt update && \
+              sudo apt install -y gdisk dosfstools g++-12-riscv64-linux-gnu build-essential \
+                                  libncurses-dev gawk flex bison openssl libssl-dev tree \
+                                  dkms libelf-dev libudev-dev libpci-dev libiberty-dev autoconf device-tree-compiler \
+                                  devscripts
+              sudo update-alternatives --install \
+                  /usr/bin/riscv64-linux-gnu-gcc riscv64-gcc /usr/bin/riscv64-linux-gnu-gcc-12 10
+              sudo update-alternatives --install \
+                  /usr/bin/riscv64-linux-gnu-g++ riscv64-g++ /usr/bin/riscv64-linux-gnu-g++-12 10
+
+      - name: Checkout kernel
+        uses: actions/checkout@v3
+        with:
+            path: 'kernel'
+
+      - name: Configure toolchains
+        run: |
+              mkdir rootfs && mkdir rootfs/boot
+              if [ x"${{ matrix.name }}" = x"thead-gcc" ]; then
+                wget ${xuetie_toolchain}/${toolchain_file_name}
+                tar -xvf ${toolchain_file_name} -C /opt
+              fi
+
+      - name: Compile Kernel && Install
+        run: |
+              export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.6.1/bin:$PATH"
+
+              pushd kernel
+                make revyos_defconfig
+                export KDEB_PKGVERSION="$(date "+%Y.%m.%d.%H.%M")+$(git rev-parse --short HEAD)"
+                if [ x"${{ matrix.name }}" = x"gcc-12" ]; then
+                  echo "CONFIG_THEAD_ISA=n" >> .config
+                elif [ x"${{ matrix.name }}" = x"thead-gcc" ]; then
+                  echo "CONFIG_THEAD_ISA=y" >> .config
+                fi
+                make -j$(nproc) bindeb-pkg LOCALVERSION="-${board}"
+                make -j$(nproc) dtbs
+                # if [ x"$(cat .config | grep CONFIG_MODULES=y)" = x"CONFIG_MODULES=y" ]; then
+                #   sudo make INSTALL_MOD_PATH=${GITHUB_WORKSPACE}/rootfs/ modules_install -j$(nproc)
+                # fi
+                # sudo make INSTALL_PATH=${GITHUB_WORKSPACE}/rootfs/boot install -j$(nproc)
+
+                # Copy deb
+                sudo dcmd cp -v ../*.changes ${GITHUB_WORKSPACE}/rootfs/
+
+                # build perf & install
+                # make LDFLAGS=-static NO_LIBELF=1 NO_JVMTI=1 VF=1 -C tools/perf/
+                # sudo mkdir -p ${GITHUB_WORKSPACE}/rootfs/sbin/
+                # sudo cp -v tools/perf/perf ${GITHUB_WORKSPACE}/rootfs/sbin/perf-thead
+
+                # Install Kernel
+                # sudo cp -v arch/riscv/boot/Image ${GITHUB_WORKSPACE}/rootfs/boot/
+
+                # record commit-id
+                git rev-parse HEAD > kernel-commitid
+                sudo cp -v kernel-commitid ${GITHUB_WORKSPACE}/rootfs/boot/
+
+                # Install DTB
+                sudo cp -v arch/riscv/boot/dts/thead/{light-lpi4a.dtb,light-lpi4a-16gb.dtb} ${GITHUB_WORKSPACE}/rootfs/boot/
+              popd
+
+      - name: compress
+        run: tar -zcvf thead-kernel-${{ matrix.name }}.tar.gz rootfs
+
+      - name: 'Upload Artifact'
+        uses: actions/upload-artifact@v3
+        with:
+          name: thead-kernel-${{ matrix.name }}.tar.gz
+          path: thead-kernel-${{ matrix.name }}.tar.gz
+          retention-days: 30
--- a/Documentation/devicetree/bindings/arm/idle-states.yaml
+++ b/Documentation/devicetree/bindings/arm/idle-states.yaml
@@ -1,30 +1,25 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/cpu/idle-states.yaml#
+$id: http://devicetree.org/schemas/arm/idle-states.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#

-title: Idle states binding description
+title: ARM idle states binding description

 maintainers:
  - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-  - Anup Patel <anup@brainfault.org>

 description: |+
  ==========================================
  1 - Introduction
  ==========================================

-  ARM and RISC-V systems contain HW capable of managing power consumption
-  dynamically, where cores can be put in different low-power states (ranging
-  from simple wfi to power gating) according to OS PM policies. The CPU states
-  representing the range of dynamic idle states that a processor can enter at
-  run-time, can be specified through device tree bindings representing the
-  parameters required to enter/exit specific idle states on a given processor.
-
-  ==========================================
-  2 - ARM idle states
-  ==========================================
+  ARM systems contain HW capable of managing power consumption dynamically,
+  where cores can be put in different low-power states (ranging from simple wfi
+  to power gating) according to OS PM policies. The CPU states representing the
+  range of dynamic idle states that a processor can enter at run-time, can be
+  specified through device tree bindings representing the parameters required to
+  enter/exit specific idle states on a given processor.

  According to the Server Base System Architecture document (SBSA, [3]), the
  power states an ARM CPU can be put into are identified by the following list:
@@ -48,23 +43,8 @@ description: |+
  The device tree binding definition for ARM idle states is the subject of this
  document.

-  ==========================================
-  3 - RISC-V idle states
-  ==========================================
-
-  On RISC-V systems, the HARTs (or CPUs) [6] can be put in platform specific
-  suspend (or idle) states (ranging from simple WFI, power gating, etc). The
-  RISC-V SBI v0.3 (or higher) [7] hart state management extension provides a
-  standard mechanism for OS to request HART state transitions.
-
-  The platform specific suspend (or idle) states of a hart can be either
-  retentive or non-rententive in nature. A retentive suspend state will
-  preserve HART registers and CSR values for all privilege modes whereas
-  a non-retentive suspend state will not preserve HART registers and CSR
-  values.
-
  ===========================================
-  4 - idle-states definitions
+  2 - idle-states definitions
  ===========================================

  Idle states are characterized for a specific system through a set of
@@ -231,10 +211,10 @@ description: |+
  properties specification that is the subject of the following sections.

  ===========================================
-  5 - idle-states node
+  3 - idle-states node
  ===========================================

-  The processor idle states are defined within the idle-states node, which is
+  ARM processor idle states are defined within the idle-states node, which is
  a direct child of the cpus node [1] and provides a container where the
  processor idle states, defined as device tree nodes, are listed.

@@ -243,7 +223,7 @@ description: |+
  just supports idle_standby, an idle-states node is not required.

  ===========================================
-  6 - References
+  4 - References
  ===========================================

  [1] ARM Linux Kernel documentation - CPUs bindings
@@ -258,15 +238,9 @@ description: |+
  [4] ARM Architecture Reference Manuals
      http://infocenter.arm.com/help/index.jsp

-  [5] ARM Linux Kernel documentation - Booting AArch64 Linux
+  [6] ARM Linux Kernel documentation - Booting AArch64 Linux
      Documentation/arm64/booting.rst

-  [6] RISC-V Linux Kernel documentation - CPUs bindings
-      Documentation/devicetree/bindings/riscv/cpus.yaml
-
-  [7] RISC-V Supervisor Binary Interface (SBI)
-      http://github.com/riscv/riscv-sbi-doc/riscv-sbi.adoc
-
 properties:
  $nodename:
    const: idle-states
@@ -279,7 +253,7 @@ properties:
      On ARM 32-bit systems this property is optional

      This assumes that the "enable-method" property is set to "psci" in the cpu
-      node[5] that is responsible for setting up CPU idle management in the OS
+      node[6] that is responsible for setting up CPU idle management in the OS
      implementation.
    const: psci

@@ -291,8 +265,8 @@ patternProperties:
      as follows.

      The idle state entered by executing the wfi instruction (idle_standby
-      SBSA,[3][4]) is considered standard on all ARM and RISC-V platforms and
-      therefore must not be listed.
+      SBSA,[3][4]) is considered standard on all ARM platforms and therefore
+      must not be listed.

      In addition to the properties listed above, a state node may require
      additional properties specific to the entry-method defined in the
@@ -301,27 +275,7 @@ patternProperties:

    properties:
      compatible:
-        enum:
-          - arm,idle-state
-          - riscv,idle-state
-
-      arm,psci-suspend-param:
-        $ref: /schemas/types.yaml#/definitions/uint32
-        description: |
-          power_state parameter to pass to the ARM PSCI suspend call.
-
-          Device tree nodes that require usage of PSCI CPU_SUSPEND function
-          (i.e. idle states node with entry-method property is set to "psci")
-          must specify this property.
-
-      riscv,sbi-suspend-param:
-        $ref: /schemas/types.yaml#/definitions/uint32
-        description: |
-          suspend_type parameter to pass to the RISC-V SBI HSM suspend call.
-
-          This property is required in idle state nodes of device tree meant
-          for RISC-V systems. For more details on the suspend_type parameter
-          refer the SBI specifiation v0.3 (or higher) [7].
+        const: arm,idle-state

      local-timer-stop:
        description:
@@ -363,8 +317,6 @@ patternProperties:
        description:
          A string used as a descriptive name for the idle state.

-    additionalProperties: false
-
    required:
      - compatible
      - entry-latency-us
@@ -706,150 +658,4 @@ examples:
        };
    };

-  - |
-    // Example 3 (RISC-V 64-bit, 4-cpu systems, two clusters):
-
-    cpus {
-        #size-cells = <0>;
-        #address-cells = <1>;
-
-        cpu@0 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x0>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0
-                            &CLUSTER_RET_0 &CLUSTER_NONRET_0>;
-
-            cpu_intc0: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        cpu@1 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x1>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0
-                            &CLUSTER_RET_0 &CLUSTER_NONRET_0>;
-
-            cpu_intc1: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        cpu@10 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x10>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0
-                            &CLUSTER_RET_1 &CLUSTER_NONRET_1>;
-
-            cpu_intc10: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        cpu@11 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x11>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0
-                            &CLUSTER_RET_1 &CLUSTER_NONRET_1>;
-
-            cpu_intc11: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        idle-states {
-            CPU_RET_0_0: cpu-retentive-0-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x10000000>;
-                entry-latency-us = <20>;
-                exit-latency-us = <40>;
-                min-residency-us = <80>;
-            };
-
-            CPU_NONRET_0_0: cpu-nonretentive-0-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x90000000>;
-                entry-latency-us = <250>;
-                exit-latency-us = <500>;
-                min-residency-us = <950>;
-            };
-
-            CLUSTER_RET_0: cluster-retentive-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x11000000>;
-                local-timer-stop;
-                entry-latency-us = <50>;
-                exit-latency-us = <100>;
-                min-residency-us = <250>;
-                wakeup-latency-us = <130>;
-            };
-
-            CLUSTER_NONRET_0: cluster-nonretentive-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x91000000>;
-                local-timer-stop;
-                entry-latency-us = <600>;
-                exit-latency-us = <1100>;
-                min-residency-us = <2700>;
-                wakeup-latency-us = <1500>;
-            };
-
-            CPU_RET_1_0: cpu-retentive-1-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x10000010>;
-                entry-latency-us = <20>;
-                exit-latency-us = <40>;
-                min-residency-us = <80>;
-            };
-
-            CPU_NONRET_1_0: cpu-nonretentive-1-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x90000010>;
-                entry-latency-us = <250>;
-                exit-latency-us = <500>;
-                min-residency-us = <950>;
-            };
-
-            CLUSTER_RET_1: cluster-retentive-1 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x11000010>;
-                local-timer-stop;
-                entry-latency-us = <50>;
-                exit-latency-us = <100>;
-                min-residency-us = <250>;
-                wakeup-latency-us = <130>;
-            };
-
-            CLUSTER_NONRET_1: cluster-nonretentive-1 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x91000010>;
-                local-timer-stop;
-                entry-latency-us = <600>;
-                exit-latency-us = <1100>;
-                min-residency-us = <2700>;
-                wakeup-latency-us = <1500>;
-            };
-        };
-    };
-
 ...
--- a/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt
@@ -81,4 +81,4 @@ Example:
 		};
 	};

-[1]. Documentation/devicetree/bindings/cpu/idle-states.yaml
+[1]. Documentation/devicetree/bindings/arm/idle-states.yaml
--- a/Documentation/devicetree/bindings/arm/psci.yaml
+++ b/Documentation/devicetree/bindings/arm/psci.yaml
@@ -101,7 +101,7 @@ properties:
      bindings in [1]) must specify this property.

      [1] Kernel documentation - ARM idle states bindings
-        Documentation/devicetree/bindings/cpu/idle-states.yaml
+        Documentation/devicetree/bindings/arm/idle-states.yaml

 patternProperties:
  "^power-domain-":
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -87,12 +87,6 @@ properties:
      - compatible
      - interrupt-controller

-  cpu-idle-states:
-    $ref: '/schemas/types.yaml#/definitions/phandle-array'
-    description: |
-      List of phandles to idle state nodes supported
-      by this hart (see ./idle-states.yaml).
-
 required:
  - riscv,isa
  - interrupt-controller
--- a/14
+++ b/14
@@ -4614,20 +4614,6 @@ S:	Supported
 F:	drivers/cpuidle/cpuidle-psci.h
 F:	drivers/cpuidle/cpuidle-psci-domain.c

-CPUIDLE DRIVER - DT IDLE PM DOMAIN
-M:	Ulf Hansson <ulf.hansson@linaro.org>
-L:	linux-pm@vger.kernel.org
-S:	Supported
-F:	drivers/cpuidle/dt_idle_genpd.c
-F:	drivers/cpuidle/dt_idle_genpd.h
-
-CPUIDLE DRIVER - RISC-V SBI
-M:	Anup Patel <anup@brainfault.org>
-L:	linux-pm@vger.kernel.org
-L:	linux-riscv@lists.infradead.org
-S:	Maintained
-F:	drivers/cpuidle/cpuidle-riscv-sbi.c
-
 CRAMFS FILESYSTEM
 M:	Nicolas Pitre <nico@fluxnic.net>
 S:	Maintained
--- a/3
+++ b/3
@@ -480,6 +480,8 @@ LZ4		= lz4
 XZ		= xz
 ZSTD		= zstd

+PAHOLE_FLAGS	= $(shell PAHOLE=$(PAHOLE) $(srctree)/scripts/pahole-flags.sh)
+
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
 		  -Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
 NOSTDINC_FLAGS :=
@@ -534,6 +536,7 @@ export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE
 export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE
 export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE
 export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
+export PAHOLE_FLAGS

 # Files to ignore in find ... statements

--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -42,7 +42,7 @@ config RISCV
 	select CLONE_BACKWARDS
 	select CLINT_TIMER if !MMU
 	select COMMON_CLK
-	select CPU_PM if CPU_IDLE || HIBERNATION
+	select CPU_PM if (SUSPEND || CPU_IDLE)
 	select COMPAT_BINFMT_ELF if BINFMT_ELF && COMPAT
 	select EDAC_SUPPORT
 	select DMA_DIRECT_REMAP
@@ -393,42 +393,14 @@ config FPU
 	  If you don't know what to do here, say Y.

 config VECTOR
-	bool "VECTOR support"
-	default n
-
-choice VECTOR_VERSION
-	prompt "Vector Version"
-	depends on VECTOR
-	default VECTOR_1_0
-
-config VECTOR_1_0
-	bool "VECTOR 1.0 support"
-	help
-	  Say N here if you want to disable all vector 1.0 related procedure
-	  in the kernel.
-
-	  If you don't know what to do here, say Y.
-
-config VECTOR_0_7
 	bool "VECTOR 0.7 support"
+	default y
 	help
 	  Say N here if you want to disable all vector 0.7 related procedure
 	  in the kernel.

 	  If you don't know what to do here, say Y.

-endchoice
-
-config VLEN_256
-	bool "VECTOR VLEN 256"
-	depends on VECTOR
-	default n
-
-config VECTOR_EMU
-	bool "VECTOR e64 emulate for c906 v1"
-	depends on VECTOR
-	default n
-
 config THEAD_ISA
 	bool "T-HEAD extension ISA in AFLAGS with -march=_xtheadc"
 	default n
@@ -573,18 +545,6 @@ source "kernel/power/Kconfig"
 config ARCH_SUSPEND_POSSIBLE
 	def_bool y

-config ARCH_HIBERNATION_POSSIBLE
-	def_bool y
-
-config ARCH_HIBERNATION_HEADER
-	def_bool HIBERNATION
-
-endmenu
-
-menu "CPU Power Management"
-
-source "drivers/cpuidle/Kconfig"
-
 endmenu

 source "arch/riscv/kvm/Kconfig"
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -19,9 +19,6 @@ config SOC_VIRT
 	select GOLDFISH
 	select RTC_DRV_GOLDFISH if RTC_CLASS
 	select SIFIVE_PLIC
-	select PM_GENERIC_DOMAINS if PM
-	select PM_GENERIC_DOMAINS_OF if PM && OF
-	select RISCV_SBI_CPUIDLE if CPU_IDLE
 	help
 	  This enables support for QEMU Virt Machine.

--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -48,25 +48,20 @@ endif
 endif

 # ISA string setting
+riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
+riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
+riscv-march-$(CONFIG_FPU)			:= $(riscv-march-y)fd
+riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
+riscv-march-$(CONFIG_VECTOR)		:= $(riscv-march-y)v0p7
+riscv-march-$(CONFIG_THEAD_ISA)		:= $(riscv-march-y)_xtheadc
+
 # Newer binutils versions default to ISA spec version 20191213 which moves some
 # instructions from the I extension to the Zicsr and Zifencei extensions.
 toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
 riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei

-riscv-march-cflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-cflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-cflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-cflags-y)c
-
-riscv-march-aflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-aflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-aflags-$(CONFIG_FPU)		:= $(riscv-march-aflags-y)fd
-riscv-march-aflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-aflags-y)c
-riscv-march-aflags-$(CONFIG_VECTOR_1_0)		:= $(riscv-march-aflags-y)v
-riscv-march-aflags-$(CONFIG_VECTOR_0_7)		:= $(riscv-march-aflags-y)v0p7
-riscv-march-aflags-$(CONFIG_THEAD_ISA)		:= $(riscv-march-aflags-y)_xtheadc
-
-KBUILD_CFLAGS += -march=$(riscv-march-cflags-y) -Wa,-march=$(riscv-march-aflags-y)
-KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
+KBUILD_CFLAGS += -march=$(subst _xtheadc,,$(subst v0p7,,$(subst fd,,$(riscv-march-y))))
+KBUILD_AFLAGS += -march=$(riscv-march-y)

 KBUILD_CFLAGS += -mno-save-restore
 KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
@@ -124,7 +119,7 @@ endif
 ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_KENDRYTE),yy)
 KBUILD_IMAGE := $(boot)/loader.bin
 else
-KBUILD_IMAGE := $(boot)/Image.gz
+KBUILD_IMAGE := $(boot)/Image
 endif
 BOOT_TARGETS := Image Image.gz loader loader.bin

--- a/arch/riscv/boot/dts/thead/Makefile
+++ b/arch/riscv/boot/dts/thead/Makefile
@@ -1,51 +1,44 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_THEAD_ICE) += ice.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_MPW) += th1520_mpw.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-npu-fce.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-gpu.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-dsp.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-audio.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-hdmi.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-dsi0-hdmi.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val.dtb th1520-a-val-sec.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-crash.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-i2s-8ch.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-tdm.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-spdif.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-hdmi.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-dsi1.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-sv.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-ddr2G.dtb th1520-a-val-ddr1G.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-npu-fce.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-iso7816.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-nand.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-dsi0.dtb th1520-a-val-dsi1.dtb th1520-a-val-hdmi.dtb th1520-a-val-dsi0-hdmi-audio.dtb th1520-a-val-dpi0.dtb th1520-a-val-dpi0-dpi1.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-wcn.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-gpio-keys.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-khv.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-miniapp-hdmi.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_PRD) += th1520-a-product.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-full.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-ref.dtb th1520-a-ref-dsi0.dtb th1520-a-ref-dsi0-hdmi.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-b-product.dtb th1520-b-product-sec.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-b-product-crash.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-b-product-ddr1G.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-b-product-miniapp-hdmi.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-b-ref.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-b-power.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_ANT) += th1520-ant-ref.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_ANT) += th1520-ant-ref-crash.dtb th1520-ant-discrete-crash.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-ant-discrete.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-beagle.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-product.dtb th1520-lpi4a-product-sec.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-product-crash.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-camera-tuning.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-hx8279.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-dsi0.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-lpi4a-ddr2G.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_ANDROID) += th1520-a-val-android.dtb
-dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu.dtb fire-emu-crash.dtb
-dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb
-dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu-soc-base-sec.dtb
+dtb-$(CONFIG_SOC_THEAD) += ice.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu.dtb light_mpw.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-npu-fce.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-gpu.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsp.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb light-a-val-audio-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsi0-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val.dtb light-a-val-sv.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-ddr2G.dtb light-a-val-ddr1G.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-npu-fce.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-iso7816.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-nand.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio.dtb light-a-val-audio-i2s-8ch.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-tdm.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-spdif.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0.dtb light-a-val-dsi1.dtb light-a-val-hdmi.dtb light-a-val-dsi0-dsi1.dtb light-a-val-dsi0-hdmi.dtb light-a-val-dsi0-hdmi-audio.dtb light-a-val-dpi0.dtb light-a-val-dpi0-dpi1.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-wcn.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-gpio-keys.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-khv.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-sec.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-miniapp-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-product.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-product.dtb light-b-product-sec.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-product-ddr1G.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-product-miniapp-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-full.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-ant-ref.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-ant-discrete.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-ddr2G.dtb light-lpi4a-16gb.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-cluster.dtb light-lpi4a-cluster-16gb.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-ref.dtb light-a-ref-dsi0.dtb light-a-ref-dsi0-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-ref.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-crash.dtb light-b-product-crash.dtb light-ant-ref-crash.dtb light-ant-discrete-crash.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-power.dtb
+
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-android.dtb
+
+dtb-$(CONFIG_SOC_THEAD) += fire-emu.dtb fire-emu-crash.dtb
+dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb
+dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base-sec.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-laptop.dtb
--- a/arch/riscv/boot/dts/thead/fire-crash.dts
+++ b/arch/riscv/boot/dts/thead/fire-crash.dts
@@ -0,0 +1,856 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "light-vi-devices.dtsi"
+
+/ {
+	model = "T-HEAD fire fpga board";
+	compatible = "thead,fire-emu", "thead,fire";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlycon";
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		status = "disabled";
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+	};
+
+	display-subsystem {
+		status = "okay";
+	};
+
+	lcd0_backlight: pwm-backlight@0 {
+		status = "disabled";
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	light_iopmp: iopmp {
+		status = "disabled";
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		status = "disabled";
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <1>;
+		compatible = "linux,bt-sco";
+		status = "okay";
+	};
+
+
+	wcn_wifi: wireless-wlan {
+		compatible = "wlan-platdata";
+		clock-names = "clk_wifi";
+		ref-clock-frequency = <24000000>;
+		keep_wifi_power_on;
+		pinctrl-names = "default";
+		wifi_chip_type = "rtl8723ds";
+		WIFI,poweren_gpio = <&gpio2_porta 26 0>;
+		WIFI,reset_n = <&gpio2_porta 28 0>;
+		status = "disabled";
+	};
+
+	wcn_bt: wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		pinctrl-names = "default", "rts_gpio";
+		BT,power_gpio    = <&gpio2_porta 29 0>;
+		status = "disabled";
+	};
+
+	gpio_keys: gpio_keys{
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		status = "disabled";
+		key-volumedown {
+			label = "Volume Down Key";
+			linux,code = <KEY_1>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
+		};
+		key-volumeup {
+			label = "Volume Up Key";
+			linux,code = <KEY_2>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	aon: light-aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+			status = "disabled";
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic";
+			status = "disabled";
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "disabled";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+			status = "disabled";
+		};
+	};
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+    vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};
+
+};
+
+&clk {
+	status = "disabled";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
+       touch@5d {
+               #gpio-cells = <2>;
+               compatible = "goodix,gt911";
+			   status = "disabled";
+               reg = <0x5d>;
+               interrupt-parent = <&gpio1_porta>;
+               interrupts = <8 0>;
+               irq-gpios = <&gpio1_porta 8 0>;
+               reset-gpios = <&gpio1_porta 7 0>;
+               touchscreen-size-x = <800>;
+               touchscreen-size-y = <1280>;
+       };
+};
+
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "disabled";
+
+       es8156_audio_codec: es8156@8 {
+               #sound-dai-cells = <0>;
+               compatible = "everest,es8156";
+               reg = <0x08>;
+       };
+
+        es7210_audio_codec: es7210@40 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x40>;
+        };
+};
+
+&i2c1 {
+        clock-frequency = <400000>;
+        status = "disabled";
+        touch1@5d {
+                #gpio-cells = <2>;
+                compatible = "goodix,gt911";
+                reg = <0x5d>;
+                interrupt-parent = <&gpio1_porta>;
+                interrupts = <12 0>;
+                irq-gpios = <&gpio1_porta 12 0>;
+                reset-gpios = <&gpio1_porta 11 0>;
+                touchscreen-size-x = <800>;
+                touchscreen-size-y = <1280>;
+        };
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "okay";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+		status = "disabled";
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&qspi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>;
+	rx-sample-dly = <4>;
+	status = "disabled";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi1";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&qspi1 {
+	num-cs = <1>;
+	cs-gpios = <&gpio0_porta 1 0>;
+	status = "disabled";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <66000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi2";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&gmac0 {
+	phy-mode = "rgmii-id";
+	rx-clk-delay = <0x00>; /* for RGMII */
+	tx-clk-delay = <0x00>; /* for RGMII */
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x1>;
+		};
+
+		phy_88E1111_1: ethernet-phy@1 {
+			reg = <0x2>;
+		};
+	};
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	mmc-hs400-1_8v;
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "okay";
+};
+
+&sdhci1 {
+	max-frequency = <100000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	wakeup-source;
+	status = "disabled";
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart0: uart0grp {
+				thead,pins = <
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
+				>;
+			};
+
+			pinctrl_qspi0: qspi0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x0    0x20f
+					FM_QSPI0_CSN0    0x3    0x20f
+					FM_QSPI0_CSN1    0x0    0x20f
+					FM_QSPI0_D0_MOSI 0x0    0x23f
+					FM_QSPI0_D1_MISO 0x0    0x23f
+					FM_QSPI0_D2_WP   0x0    0x23f
+					FM_QSPI0_D3_HOLD 0x0    0x23f
+				>;
+			};
+
+			pinctrl_light_i2s0: i2s0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x2    0x208
+					FM_QSPI0_CSN0    0x2    0x238
+					FM_QSPI0_CSN1    0x2    0x208
+					FM_QSPI0_D0_MOSI 0x2    0x238
+					FM_QSPI0_D1_MISO 0x2    0x238
+					FM_QSPI0_D2_WP   0x2    0x238
+					FM_QSPI0_D3_HOLD 0x2    0x238
+				>;
+			};
+
+			pinctrl_pwm: pwmgrp {
+				thead,pins = <
+					FM_GPIO3_2	0x1	0x208	/* pwm0 */
+					FM_GPIO3_3	0x1	0x208	/* pwm1 */
+				>;
+			};
+		};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
+			pinctrl_qspi1: qspi1grp {
+				thead,pins = <
+					FM_QSPI1_SCLK    0x0    0x20a
+					FM_QSPI1_CSN0    0x3    0x20a
+					FM_QSPI1_D0_MOSI 0x0    0x23a
+					FM_QSPI1_D1_MISO 0x0    0x23a
+					FM_QSPI1_D2_WP   0x0    0x23a
+					FM_QSPI1_D3_HOLD 0x0    0x23a
+				>;
+			};
+
+
+			pinctrl_iso7816: iso7816grp {
+				thead,pins = <
+					FM_QSPI1_SCLK		0x1	0x208
+					FM_QSPI1_D0_MOSI	0x1	0x238
+					FM_QSPI1_D1_MISO	0x1	0x238
+					FM_QSPI1_D2_WP		0x1	0x238
+					FM_QSPI1_D3_HOLD	0x1	0x238
+				>;
+			};
+
+		};
+};
+
+&i2c2 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c3 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c4 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	pcal6408ahk_a: gpio@20 {
+		compatible = "nxp,pcal9554b";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+&isp0 {
+	status = "disabled";
+};
+
+&isp1 {
+	status = "disabled";
+};
+
+&isp_ry0 {
+	status = "disabled";
+};
+
+&dewarp {
+	status = "disabled";
+};
+
+&dec400_isp0 {
+	status = "disabled";
+};
+
+&dec400_isp1 {
+	status = "disabled";
+};
+
+&dec400_isp2 {
+	status = "disabled";
+};
+
+&bm_visys {
+	status = "disabled";
+};
+
+&bm_csi0 {
+	status = "disabled";
+};
+
+&bm_csi1 {
+	status = "disabled";
+};
+
+&bm_csi2 {
+	status = "disabled";
+};
+
+&vi_pre {
+	//vi_pre_irq_en = <1>;
+	status = "disabled";
+};
+
+&xtensa_dsp {
+	status = "disabled";
+};
+
+&xtensa_dsp0 {
+	status = "disabled";
+    memory-region = <&dsp0_mem>;
+};
+
+&xtensa_dsp1{
+    status = "disabled";
+    memory-region = <&dsp1_mem>;
+};
+
+&vvcam_flash_led0{
+    flash_led_name = "aw36413_aw36515";
+	floodlight_i2c_bus = /bits/ 8 <2>;
+	floodlight_en_pin = <&gpio1_porta 25 0>;
+	//projection_i2c_bus = /bits/ 8 <2>;
+	flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
+	status = "disabled";
+};
+
+&vvcam_sensor1 {
+	status = "disabled";
+};
+
+&vvcam_sensor2 {
+	status = "disabled";
+};
+
+&vvcam_sensor3 {
+	status = "disabled";
+};
+
+&vvcam_sensor4 {
+    status = "disabled";
+};
+
+&vvcam_sensor5 {
+    status = "disabled";
+};
+
+&video0{
+	status = "disabled";
+};
+
+
+&video1{
+	status = "disabled";
+};
+
+&video2{
+	status = "disabled";
+};
+
+&video3{
+	status = "disabled";
+};
+
+&video4{
+	status = "disabled";
+};
+
+&video5{
+	status = "disabled";
+};
+
+&video6{
+	status = "disabled";
+};
+
+&video7{
+	status = "disabled";
+};
+
+
+&video8{
+	status = "disabled";
+};
+
+&video9{
+	status = "disabled";
+};
+
+
+&video10{
+	status = "disabled";
+};
+
+&video11{
+	status = "disabled";
+};
+
+&video12{
+	status = "disabled";
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "disabled";
+};
+
+&vdec {
+	status = "disabled";
+};
+
+&venc {
+	status = "disabled";
+};
+
+&isp_venc_shake {
+	status = "disabled";
+};
+
+&vidmem {
+	status = "disabled";
+};
+
+&gpu {
+	status = "disabled";
+};
+
+&dpu_enc0 {
+	status = "disabled";
+};
+
+&dpu_enc1 {
+	status = "disabled";
+};
+
+&dpu {
+        status = "disabled";
+};
+
+&dsi0 {
+        status = "disabled";
+};
+
+&dhost_0 {
+	status = "disabled";
+};
+
+&disp1_out {
+	status = "disabled";
+};
+
+&hdmi_tx {
+	status = "disabled";
+};
+
+&lightsound {
+        status = "disabled";
+};
+
+&light_i2s {
+        status = "disabled";
+};
+
+&i2s0 {
+        status = "disabled";
+};
+
+&i2s1 {
+        status = "disabled";
+};
+
+&i2s3 {
+        status = "disabled";
+};
+
+&khvhost {
+	status = "disabled";
+};
--- a/arch/riscv/boot/dts/thead/fire-emu-crash.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-crash.dts
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "fire-crash.dts"
+
+&aon {
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic";
+		status = "disabled";
+
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1500000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	};
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_2: cpu@2 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+	c910_3: cpu@3 {
+
+		operating-points = <
+			/* kHz    uV */
+			300000	600000
+			800000	700000
+			1500000	800000
+			1848000 1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000 1000000
+		>;
+	};
+};
--- a/arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts
@@ -0,0 +1,107 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&gpu {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+	status = "okay";
+};
+
+
+&dsi0 {
+	status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "hlt,hpk070h275";
+		reg = <0>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&aon {
+	status = "okay";
+};
+
+&mbox_910t {
+	status = "okay";
+};
+
+&mbox_910t_client1 {
+	status = "okay";
+};
+
+&mbox_910t_client2 {
+	status = "okay";
+};
+
+&dmac1 {
+	status = "okay";
+};
+
+&lightsound {
+	status = "okay";
+};
+
+&dmac2 {
+    status = "disabled";
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-soc-base-sec.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-soc-base-sec.dts
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+/* #include "fire-emu.dts" */
+#include "fire-emu-soc-base.dts"
+
+&light_iopmp {
+        status = "disabled";
+};
--- a/arch/riscv/boot/dts/thead/fire-emu-soc-base.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-soc-base.dts
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&sdhci0 {
+	status = "okay";
+};
+
+&usb3_drd {
+	status = "okay";
+};
+
+&usb {
+	status = "okay";
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "okay";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+		status = "okay";
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&qspi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>;
+	rx-sample-dly = <4>;
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi1";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&qspi1 {
+	num-cs = <1>;
+	cs-gpios = <&gpio0_porta 1 0>;
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <66000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi2";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&c910_2 {
+	status = "okay";
+};
+
+&c910_3 {
+	status = "okay";
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&vi_pre {
+	status = "okay";
+};
+
+&dewarp {
+	status = "okay";
+};
+
+&xtensa_dsp {
+	status = "okay";
+};
+
+&xtensa_dsp0 {
+	status = "okay";
+};
+
+&xtensa_dsp1 {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+};
+
+&dsi0 {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&vi_pre {
+	status = "okay";
+};
+
+&dewarp {
+	status = "okay";
+};
+
+&venc {
+	status = "okay";
+};
+
+&vdec {
+	status = "okay";
+};
+
+&g2d {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dsi0 {
+	status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "hlt,hpk070h275";
+		reg = <0>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&dpu_enc1 {
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu.dts
@@ -0,0 +1,885 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "light-vi-devices.dtsi"
+
+/ {
+	model = "T-HEAD fire fpga board";
+	compatible = "thead,fire-emu", "thead,fire";
+
+	chosen {
+		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+	};
+
+	lcd0_backlight: pwm-backlight@0 {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	lcd1_backlight: pwm-backlight@1 {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 1 5000000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	light_iopmp: iopmp {
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		status = "disabled";
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <1>;
+		compatible = "linux,bt-sco";
+		status = "okay";
+	};
+
+
+	wcn_wifi: wireless-wlan {
+		compatible = "wlan-platdata";
+		clock-names = "clk_wifi";
+		ref-clock-frequency = <24000000>;
+		keep_wifi_power_on;
+		pinctrl-names = "default";
+		wifi_chip_type = "rtl8723ds";
+		WIFI,poweren_gpio = <&gpio2_porta 26 0>;
+		WIFI,reset_n = <&gpio2_porta 28 0>;
+		status = "disabled";
+	};
+
+	wcn_bt: wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		pinctrl-names = "default", "rts_gpio";
+		BT,power_gpio    = <&gpio2_porta 29 0>;
+		status = "disabled";
+	};
+
+	gpio_keys: gpio_keys{
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		status = "disabled";
+		key-volumedown {
+			label = "Volume Down Key";
+			linux,code = <KEY_1>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
+		};
+		key-volumeup {
+			label = "Volume Up Key";
+			linux,code = <KEY_2>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	aon: light-aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+			status = "disabled";
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic";
+			status = "disabled";
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "disabled";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+			status = "disabled";
+		};
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+    vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};
+
+};
+
+&clk {
+	status = "disabled";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
+       touch@5d {
+               #gpio-cells = <2>;
+               compatible = "goodix,gt911";
+			   status = "disabled";
+               reg = <0x5d>;
+               interrupt-parent = <&gpio1_porta>;
+               interrupts = <8 0>;
+               irq-gpios = <&gpio1_porta 8 0>;
+               reset-gpios = <&gpio1_porta 7 0>;
+               touchscreen-size-x = <800>;
+               touchscreen-size-y = <1280>;
+       };
+};
+
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "disabled";
+
+        es8156_audio_codec: es8156@8 {
+               #sound-dai-cells = <0>;
+               compatible = "everest,es8156";
+               reg = <0x08>;
+               status = "disabled";
+        };
+
+        es7210_audio_codec: es7210@40 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x40>;
+                status = "disabled";
+        };
+};
+
+&i2c1 {
+        clock-frequency = <400000>;
+        status = "disabled";
+        touch1@5d {
+                #gpio-cells = <2>;
+                compatible = "goodix,gt911";
+                reg = <0x5d>;
+                interrupt-parent = <&gpio1_porta>;
+                interrupts = <12 0>;
+                irq-gpios = <&gpio1_porta 12 0>;
+                reset-gpios = <&gpio1_porta 11 0>;
+                touchscreen-size-x = <800>;
+                touchscreen-size-y = <1280>;
+        };
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "okay";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+		status = "disabled";
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&qspi0 {
+	status = "disabled";
+};
+
+&qspi1 {
+	status = "disabled";
+};
+&gmac0 {
+	max-speed = <100>;
+	phy-mode = "mii";
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+
+	};
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	/*mmc-hs400-1_8v;*/
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "disabled";
+};
+
+&sdhci1 {
+	max-frequency = <100000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	wakeup-source;
+	status = "disabled";
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart0: uart0grp {
+				thead,pins = <
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
+				>;
+			};
+
+			pinctrl_qspi0: qspi0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x0    0x20f
+					FM_QSPI0_CSN0    0x3    0x20f
+					FM_QSPI0_CSN1    0x0    0x20f
+					FM_QSPI0_D0_MOSI 0x0    0x23f
+					FM_QSPI0_D1_MISO 0x0    0x23f
+					FM_QSPI0_D2_WP   0x0    0x23f
+					FM_QSPI0_D3_HOLD 0x0    0x23f
+				>;
+			};
+
+			pinctrl_light_i2s0: i2s0grp {
+				thead,pins = <
+					FM_QSPI0_SCLK    0x2    0x208
+					FM_QSPI0_CSN0    0x2    0x238
+					FM_QSPI0_CSN1    0x2    0x208
+					FM_QSPI0_D0_MOSI 0x2    0x238
+					FM_QSPI0_D1_MISO 0x2    0x238
+					FM_QSPI0_D2_WP   0x2    0x238
+					FM_QSPI0_D3_HOLD 0x2    0x238
+				>;
+			};
+
+			pinctrl_pwm: pwmgrp {
+				thead,pins = <
+					FM_GPIO3_2	0x1	0x208	/* pwm0 */
+					FM_GPIO3_3	0x1	0x208	/* pwm1 */
+				>;
+			};
+		};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
+			pinctrl_qspi1: qspi1grp {
+				thead,pins = <
+					FM_QSPI1_SCLK    0x0    0x20a
+					FM_QSPI1_CSN0    0x3    0x20a
+					FM_QSPI1_D0_MOSI 0x0    0x23a
+					FM_QSPI1_D1_MISO 0x0    0x23a
+					FM_QSPI1_D2_WP   0x0    0x23a
+					FM_QSPI1_D3_HOLD 0x0    0x23a
+				>;
+			};
+
+
+			pinctrl_iso7816: iso7816grp {
+				thead,pins = <
+					FM_QSPI1_SCLK		0x1	0x208
+					FM_QSPI1_D0_MOSI	0x1	0x238
+					FM_QSPI1_D1_MISO	0x1	0x238
+					FM_QSPI1_D2_WP		0x1	0x238
+					FM_QSPI1_D3_HOLD	0x1	0x238
+				>;
+			};
+
+		};
+};
+
+&i2c2 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c3 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+};
+
+&i2c4 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	pcal6408ahk_a: gpio@20 {
+		compatible = "nxp,pcal9554b";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+&isp0 {
+	status = "disabled";
+};
+
+&isp1 {
+	status = "disabled";
+};
+
+&isp_ry0 {
+	status = "disabled";
+};
+
+&dewarp {
+	status = "disabled";
+};
+
+&dec400_isp0 {
+	status = "disabled";
+};
+
+&dec400_isp1 {
+	status = "disabled";
+};
+
+&dec400_isp2 {
+	status = "disabled";
+};
+
+&bm_visys {
+	status = "disabled";
+};
+
+&bm_csi0 {
+	status = "disabled";
+};
+
+&bm_csi1 {
+	status = "disabled";
+};
+
+&bm_csi2 {
+	status = "disabled";
+};
+
+&vi_pre {
+	//vi_pre_irq_en = <1>;
+	status = "disabled";
+};
+
+&xtensa_dsp {
+	status = "disabled";
+};
+
+&xtensa_dsp0 {
+	status = "disabled";
+    memory-region = <&dsp0_mem>;
+};
+
+&xtensa_dsp1{
+    status = "disabled";
+    memory-region = <&dsp1_mem>;
+};
+
+&vvcam_flash_led0{
+    flash_led_name = "aw36413_aw36515";
+	floodlight_i2c_bus = /bits/ 8 <2>;
+	floodlight_en_pin = <&gpio1_porta 25 0>;
+	//projection_i2c_bus = /bits/ 8 <2>;
+	flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
+	status = "disabled";
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "okay";
+};
+
+&vdec {
+	status = "disabled";
+};
+
+&venc {
+	status = "disabled";
+};
+
+&isp_venc_shake {
+	status = "disabled";
+};
+
+&vidmem {
+	status = "okay";
+	memory-region = <&vi_mem>;
+};
+
+&gpu {
+	status = "disabled";
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+	c910_1: cpu@1 {
+		status = "disabled";
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+	c910_2: cpu@2 {
+		status = "disabled";
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+	c910_3: cpu@3 {
+		status = "disabled";
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+};
+
+&thermal_zones {
+	cpu-thermal-zone {
+		status = "disabled";
+	};
+};
+
+&dummy_clock_apb {
+	clock-frequency = <50000000>;
+};
+
+&uart0 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart1 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart2 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart3 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart4 {
+	clocks = <&dummy_clock_apb>;
+};
+&uart5 {
+	clocks = <&dummy_clock_apb>;
+};
+
+&usb3_drd {
+	status = "disabled";
+};
+
+&usb {
+	status = "disabled";
+};
+
+&dspsys_reg {
+	status = "disabled";
+};
+
+&audio_ioctrl {
+	status = "disabled";
+};
+
+&audio_cpr {
+	status = "disabled";
+};
+
+&timer0 {
+	clock-frequency = <50000000>;
+};
+
+&timer1 {
+	clock-frequency = <50000000>;
+};
+
+&timer2 {
+	clock-frequency = <50000000>;
+};
+
+&timer3 {
+	clock-frequency = <50000000>;
+};
+
+&g2d {
+	status = "disabled";
+};
+
+&vosys_reg {
+	status = "disabled";
+};
+
+&dmac2 {
+    status = "disabled";
+};
+
+&sdhci1 {
+	status = "disabled";
+};
+
+&pvt {
+	status = "disabled";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&csia_reg {
+	status = "disabled";
+};
+
+&visys_clk_gate { /* VI_SYSREG_R */
+	status = "disabled";
+};
+
+&vpsys_clk_gate { /* VP_SYSREG_R */
+	status = "disabled";
+};
+
+&vosys_clk_gate { /* VO_SYSREG_R */
+	status = "disabled";
+};
+
+&dspsys_clk_gate {
+	status = "disabled";
+};
+
+&watchdog0 {
+	status = "disabled";
+};
+
+&watchdog1 {
+	status = "disabled";
+};
+
--- a/arch/riscv/boot/dts/thead/fire.dtsi
+++ b/arch/riscv/boot/dts/thead/fire.dtsi
--- a/arch/riscv/boot/dts/thead/ice.dts
+++ b/arch/riscv/boot/dts/thead/ice.dts
@@ -0,0 +1,399 @@
+/dts-v1/;
+/ {
+	model = "T-HEAD c910 ice";
+	compatible = "thead,c910_ice";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	memory@0 {
+		device_type = "memory";
+		/*
+		 * Total memory size: 4GB (0x00000000 0x100000000)
+		 * 0x00200000 - 0x0e0000000: 3407MB for Linux system
+		 * 0xe0000000 - 0x100000000:  512MB for GPU
+		 */
+		reg = <0x0 0x200000 0x0 0xdfe00000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <3000000>;
+		cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcsu";
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.2Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "2MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu@1 {
+			device_type = "cpu";
+			reg = <1>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcsu";
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.2Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "2MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			cpu1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		ranges;
+
+		reset: reset-sample {
+			compatible = "thead,reset-sample";
+			plic-delegate = <0x3 0xf01ffffc>;
+			using-csr-reset;
+			csr-copy = <
+				0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
+				0x3b0 0x3b1 0x3b2 0x3b3
+				0x3b4 0x3b5 0x3b6 0x3b7
+				0x3a0
+				>;
+		};
+
+		clint0: clint@3f4000000 {
+			compatible = "riscv,clint0";
+			interrupts-extended = <
+				&cpu0_intc  3 &cpu0_intc  7
+				&cpu1_intc  3 &cpu1_intc  7
+				>;
+			reg = <0x3 0xf4000000 0x0 0x04000000>;
+			clint,has-no-64bit-mmio;
+		};
+
+		intc: interrupt-controller@3f0000000 {
+			#interrupt-cells = <1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <
+				&cpu0_intc  0xffffffff &cpu0_intc  9
+				&cpu1_intc  0xffffffff &cpu1_intc  9
+				>;
+			reg = <0x3 0xf0000000 0x0 0x04000000>;
+			reg-names = "control";
+			riscv,max-priority = <7>;
+			riscv,ndev = <80>;
+		};
+
+		dummy_apb: apb-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <62500000>;
+			clock-output-names = "dummy_apb";
+			#clock-cells = <0>;
+		};
+
+		dummy_ahb: ahb-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <250000000>;
+			clock-output-names = "dummy_ahb";
+			#clock-cells = <0>;
+		};
+
+		dummy_axi: axi-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <500000000>;
+			clock-output-names = "dummy_axi";
+			#clock-cells = <0>;
+		};
+
+		dummy_gmac: gmac-clock {
+			compatible = "fixed-clock";
+			clock-frequency = <1000000000>;
+			clock-output-names = "dummy_gmac";
+			#clock-cells = <0>;
+		};
+
+		dummy_clk_sdio: dummy-clk-sdio {
+			compatible = "fixed-clock";
+			clock-frequency = <150000000>;
+			clock-output-names = "dummy_clk_sdio";
+			#clock-cells = <0>;
+		};
+
+		usb: dwc3@3fff10000 {
+			compatible = "snps,dwc3";
+			reg = <0x3 0xfff10000 0x0 0x10000>;
+			interrupt-parent = <&intc>;
+			interrupts = <44>;
+			clocks = <&dummy_ahb>, <&dummy_ahb>, <&dummy_ahb>;
+			clock-names = "ref", "bus_early", "suspend";
+			maximum-speed = "super-speed";
+			dr_mode = "peripheral";
+			snps,usb3_lpm_capable;
+			snps,dis_u3_susphy_quirk;
+		};
+
+		gpio0: gpio@3fff71000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0x3 0xfff71000 0x0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			/* GPIO0[0-31] */
+			gpio0_porta: gpio0-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				interrupt-parent = <&intc>;
+				interrupts = <27>;
+			};
+
+			/* GPIO0[32-63] */
+			gpio0_portb: gpio0-controller@1 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <1>;
+			};
+		};
+
+		gpio1: gpio@3fff72000 {
+			compatible = "snps,dw-apb-gpio";
+			reg = <0x3 0xfff72000 0x0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			/* GPIO1[0-31] */
+			gpio1_porta: gpio1-controller@0 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <0>;
+			};
+
+			/* GPIO1[32-63] */
+			gpio1_portb: gpio1-controller@1 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <1>;
+			};
+
+			/* GPIO1[64-95] */
+			gpio1_portc: gpio1-controller@2 {
+				compatible = "snps,dw-apb-gpio-port";
+				gpio-controller;
+				#gpio-cells = <2>;
+				snps,nr-gpios = <32>;
+				reg = <2>;
+			};
+		};
+
+		gpio-leds {
+			compatible = "gpio-leds";
+
+			led0 { /* GPIO0[11] - UART2_TXD */
+				label = "led0";
+				gpios = <&gpio0_porta 11 1>;
+				default-state = "off";
+			};
+		};
+
+		gpio-keys {
+			compatible = "gpio-keys";
+			/* autorepeat; */
+
+			key_0 { /* GPIO0[10] - UART2_RXD */
+				gpios = <&gpio0_porta 10 1>;
+				linux,code = <59>;
+				label = "key_0";
+			};
+		};
+
+		i2c@3fff74000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "snps,designware-i2c-ice";
+			reg = <0x3 0xfff74000 0x0 0x1000>;
+			interrupts = <21>;
+			interrupt-parent = <&intc>;
+			clocks = <&dummy_apb>;
+			clock-frequency = <400000>;
+
+			eeprom@50 {
+				compatible = "atmel,24c64";
+				reg = <0x50>;
+				pagesize = <32>;
+			};
+
+			goodix_ts@14 {
+				#gpio-cells = <2>;
+				compatible = "goodix,gt917s";
+				reg = <0x14>;
+				interrupt-parent = <&gpio0_porta>;
+				interrupts = <31 0>;
+				irq-gpios = <&gpio0_porta 31 0>;
+				reset-gpios = <&gpio0_porta 30 0>;
+				touchscreen-size-x = <720>;
+				touchscreen-size-y = <1280>;
+			};
+		};
+
+		serial@3fff73000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x3 0xfff73000 0x0 0x400>;
+			interrupt-parent = <&intc>;
+			interrupts = <23>;
+			clocks = <&dummy_apb>;
+			clock-names = "baudclk";
+			reg-shift = <2>;
+			reg-io-width = <4>;
+		};
+
+		pmu: pmu {
+			interrupt-parent = <&cpu0_intc>;
+			interrupts = <17>;
+			compatible = "riscv,c910_pmu";
+		};
+
+		dmac0: dmac@3fffd0000 {
+			compatible = "snps,axi-dma-1.01a";
+			reg = <0x3 0xfffd0000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <65>;
+			clocks = <&dummy_axi>, <&dummy_ahb>;
+			clock-names = "core-clk", "cfgr-clk";
+
+			dma-channels = <8>;
+			snps,block-size = <65536 65536 65536 65536 65536 65536 65536 65536>;
+			snps,priority = <0 1 2 3 4 5 6 7>;
+			snps,dma-masters = <1>;
+			snps,data-width = <4>;
+			snps,axi-max-burst-len = <16>;
+
+			status = "disabled";
+		};
+
+		sdhc0: sdhc0@3fffb0000 {
+			compatible = "snps,dw-mshc";
+			reg = <0x3 0xfffb0000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <37>;
+			clocks = <&dummy_clk_sdio>, <&dummy_clk_sdio>;
+			clock-names = "ciu", "biu";
+			num-slots = <1>;
+			card-detect-delay = <200>;
+			cap-mmc-highspeed;
+			cap-cmd23;
+			non-removable;
+			bus-width = <8>;
+		};
+
+		sdhc1: sdhc1@3fffa0000 {
+			compatible = "snps,dw-mshc";
+			reg = <0x3 0xfffa0000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <38>;
+			clocks = <&dummy_clk_sdio>, <&dummy_clk_sdio>;
+			clock-names = "ciu", "biu";
+			num-slots = <1>;
+			card-detect-delay = <200>;
+			cap-sd-highspeed;
+			bus-width = <4>;
+		};
+
+		stmmac_axi_setup: stmmac-axi-config {
+			snps,wr_osr_lmt = <3>;
+			snps,rd_osr_lmt = <3>;
+			snps,blen = <16 8 4 0 0 0 0>;
+		};
+
+		gmac: ethernet@3fffc0000 {
+			compatible = "thead,dwmac";
+			reg = < 0x3 0xfffc0000 0x0 0x2000
+				0x3 0xfe83025c 0x0 0x4
+				0x3 0xfe83031c 0x0 0x4
+				0x3 0xfff770c0 0x0 0x1c>;
+			reg-names = "gmac", "phy_if_reg", "txclk_dir_reg", "clk_mgr_reg";
+			interrupt-parent = <&intc>;
+			interrupts = <40>;
+			interrupt-names = "macirq";
+			clocks = <&dummy_ahb>, <&dummy_gmac>;
+			clock-names = "stmmaceth", "gmac_pll_clk";
+			snps,pbl = <32>;
+			snps,fixed-burst;
+			snps,axi-config = <&stmmac_axi_setup>;
+
+			phy-mode = "rgmii-id";
+			rx-clk-delay = <0x1f>; /* for RGMII */
+			tx-clk-delay = <0x1f>; /* for RGMII */
+
+			phy-handle = <&eth_phy_0>;
+			mdio0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				eth_phy_0: ethernet-phy@0 {
+					reg = <0>;
+				};
+			};
+		};
+
+		gpu: gpu@3fff27000 {
+			compatible = "verisilicon,gc8000ul";
+			reg = <0x3 0xfff27000 0x0 0x1000>;
+			interrupt-parent = <&intc>;
+			interrupts = <63>;
+			contiguous-base = <0x0 0xe0000000>;
+			contiguous-size = <0x0 0x20000000>;
+		};
+
+		watchdog: watchdog@3fffe3000 {
+			compatible = "ice,ice-wdt";
+			reg = <0x3 0xfffe3000 0x0 0x1000>;
+			interrupts = <20>;
+		};
+
+		dpu: dpu@3fff28000 {
+			compatible = "verisilicon,dc8000-fb";
+			reg = <0x3 0xfff28000 0x0 0x8000>;
+			interrupt-parent = <&intc>;
+			interrupts = <64>;
+		};
+	};
+
+	chosen {
+		/* bootargs = "console=ttyS0,115200 crashkernel=256M-:128M c910_mmu_v1"; */
+		/* linux,initrd-start = <0x2000000>; */
+		/* linux,initrd-end = <0x17000000>; */
+		bootargs = "console=ttyS0,115200 rdinit=/sbin/init root=/dev/mmcblk0p4 rw rootfstype=ext4 blkdevparts=mmcblk0:2M(table),2M(dtb),60M(kernel),-(rootfs) clk_ignore_unused loglevel=7 rootwait crashkernel=256M-:128M c910_mmu_v1";
+		stdout-path = "serial0@3fff73000:115200";
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-a-product-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-product-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-product.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-product.dts
+++ b/arch/riscv/boot/dts/thead/light-a-product.dts
--- a/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-hdmi.dts
@@ -5,7 +5,7 @@

 /dts-v1/;

-#include "th1520-a-val-dsi0.dts"
+#include "light-a-ref-dsi0.dts"

 &dpu_enc1 {
        ports {
--- a/arch/riscv/boot/dts/thead/th1520-a-val-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-dsi0.dts
@@ -5,7 +5,7 @@

 /dts-v1/;

-#include "th1520-a-val.dtsi"
+#include "light-a-ref.dts"

 / {
 	display-subsystem {
--- a/arch/riscv/boot/dts/thead/light-a-ref.dts
+++ b/arch/riscv/boot/dts/thead/light-a-ref.dts
@@ -0,0 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+#include "light-a-val.dts"
--- a/arch/riscv/boot/dts/thead/light-a-val-android.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-android.dts
@@ -0,0 +1,111 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-dsi0.dts"
+
+&dpu_enc1 {
+        ports {
+                /delete-node/ port@0;
+        };
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+&sdhci1 {
+	status = "okay";
+};
+
+&wcn_bt {
+	status = "okay";
+};
+
+&wcn_wifi {
+	status = "okay";
+};
+
+&lightsound {
+	status = "okay";
+	
+	simple-audio-card,widgets =
+		"Microphone", "Mic Jack",
+		"Speaker", "Speaker",
+		"Headphone", "Headphone Jack";
+	simple-audio-card,routing =
+		"Headphone Jack", "HP_L",
+		"Headphone Jack", "HP_R",
+		"Speaker", "SPK_LP",
+		"Speaker", "SPK_LN",
+		"Speaker", "SPK_RP",
+		"Speaker", "SPK_RN",
+		"Mic Jack","MICB",
+		"LINPUT1", "Mic Jack",
+		"LINPUT3", "Mic Jack";
+
+	simple-audio-card,dai-link@0 {          /* I2S - CODEC */
+		reg = <0>;
+		format = "i2s";
+		cpu {
+			sound-dai = <&light_i2s 0>;
+		};
+		codec {
+			sound-dai = <&codec>;
+		};
+	};
+	simple-audio-card,dai-link@1 {          /* I2S - HDMI */
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&light_i2s 1>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+    };
+};
+
+&light_i2s {
+        status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+/ {
+       firmware {
+               android {
+                       compatible = "android,firmware";
+                       boot_devices = "soc/ffe7080000.sdhci";
+                       fstab {
+                               compatible = "android,fstab";
+                               system {
+                                       compatible = "android,system";
+                                       dev = "/dev/block/platform/soc/ffe7080000.sdhci/by-name/system";
+                                       type = "ext4";
+                                       mnt_flags = "ro,barrier=1";
+                                       fsmgr_flags = "wait";
+                               };
+                               vendor {
+                                       compatible = "android,vendor";
+                                       dev = "/dev/block/platform/soc/ffe7080000.sdhci/by-name/vendor";
+                                       type = "ext4";
+                                       mnt_flags = "ro,barrier=1";
+                                       fsmgr_flags = "wait";
+                               };
+                       };
+               };
+       };
+};
+
--- a/arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts
@@ -5,7 +5,7 @@

 /dts-v1/;

-#include "th1520-a-val-audio.dts"
+#include "light-a-val-audio.dts"

 / {
 	display-subsystem {
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio-i2s-8ch.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio-i2s-8ch.dts
@@ -3,7 +3,7 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

-#include "th1520-a-val-audio.dts"
+#include "light-a-val-audio.dts"

 / {
 	model = "T-HEAD Light FM Audio VAL board";
@@ -18,7 +18,7 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s_8ch_sd2>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
                        mclk-fs = <512>;
@@ -30,7 +30,7 @@
                reg = <2>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s_8ch_sd3>;
+                        sound-dai = <&i2s_8ch_sd3 3>;
                };
                codec {
                        mclk-fs = <512>;
@@ -42,7 +42,7 @@
                reg = <3>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s_8ch_sd0>;
+                        sound-dai = <&i2s_8ch_sd0 0>;
                };
                codec {
                        mclk-fs = <512>;
@@ -54,7 +54,7 @@
                reg = <4>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s_8ch_sd1>;
+                        sound-dai = <&i2s_8ch_sd1 1>;
                };
                codec {
                        mclk-fs = <512>;
--- a/arch/riscv/boot/dts/thead/light-a-val-audio-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-audio-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-audio.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio-spdif.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio-spdif.dts
@@ -3,7 +3,7 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

-#include "th1520-a-val.dtsi"
+#include "light-a-val.dts"

 &spdif0 {
        pinctrl-names = "default";
@@ -39,4 +39,4 @@
                        sound-dai = <&dummy_codec>;
                };
        };
-};
+};
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio-tdm.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio-tdm.dts
@@ -3,7 +3,7 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

-#include "th1520-a-val.dtsi"
+#include "light-a-val.dts"

 &tdm_slot1 {
        pinctrl-names = "default";
--- a/arch/riscv/boot/dts/thead/th1520-a-val-audio.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-audio.dts
@@ -3,7 +3,7 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

-#include "th1520-a-val.dtsi"
+#include "light-a-val.dts"

 / {
 	model = "T-HEAD Light FM Audio VAL board";
--- a/arch/riscv/boot/dts/thead/th1520-a-val-crash.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-crash.dts
@@ -3,7 +3,7 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

-#include "th1520-crash.dtsi"
+#include "light-crash.dts"

 &aon {
 	aon_reg_dialog: light-dialog-reg {
--- a/arch/riscv/boot/dts/thead/light-a-val-ddr1G-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-ddr1G-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-ddr1G.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-ddr1G.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-ddr1G.dts
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-ddr2G.dts"
+
+/ {
+	model = "T-HEAD Light VAL configuration for 1GB DDR board";
+	compatible = "thead,light-val", "thead,light-val-ddr1G", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0x3fe00000>;
+	};
+};
+
+&cmamem {
+	size = <0 0x8c00000>; // 140MB by default
+	alloc-ranges = <0 0x02000000 0 0x0cc00000>; // [0x0600_0000 ~ 0x0EC0_0000]
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-ddr2G-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-ddr2G-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-ddr2G.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-ddr2G.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-ddr2G.dts
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+/ {
+	model = "T-HEAD Light VAL configuration for 2GB DDR board";
+	compatible = "thead,light-val", "thead,light-val-ddr2G", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0x64000000 0 0x14000000>; // [0x6400_0000 ~ 0x7800_0000]
+};
+
+&facelib_mem {
+	reg = <0x0 0x22000000 0 0x02000000>;
+	no-map;
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-dpi0-dpi1-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dpi0-dpi1-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-dpi0-dpi1.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-dpi0-dpi1.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dpi0-dpi1.dts
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-dpi0.dts"
+
+/ {
+	dpi_panel1: dpi-panel@1 {
+		compatible = "light,dummy-panel";
+
+		port {
+			dpi1_in: endpoint {
+				remote-endpoint = <&enc1_out>;
+			};
+		};
+	};
+};
+
+&dpu_enc1 {
+	compatible = "verisilicon,dpi-encoder";
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc1_out: endpoint {
+				remote-endpoint = <&dpi1_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-dpi0-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dpi0-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-dpi0.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-dpi0.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dpi0.dts
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+
+	dpi_panel0: dpi-panel@0 {
+		compatible = "light,dummy-panel";
+
+		port {
+			dpi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+	};
+};
+
+&dpu_enc0 {
+	compatible = "verisilicon,dpi-encoder";
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dpi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi0-dsi1-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi0-dsi1-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-dsi0-dsi1.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-dsi1.dts
+++ b/arch/riscv/boot/dts/thead/th1520-a-val-dsi0-dsi1.dts
@@ -5,7 +5,7 @@

 /dts-v1/;

-#include "th1520-a-val-dsi0.dts"
+#include "light-a-val-dsi0.dts"

 &dpu_enc1 {
 	status = "okay";
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-audio.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-audio.dts
@@ -1,17 +1,43 @@
-/* SPDX-License-Identifier: GPL-2.0 */	
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

 /dts-v1/;

-#include "th1520-lpi4a-dsi0.dts"
+#include "light-a-val-dsi0-hdmi.dts"

 &lightsound {
        status = "okay";
-        simple-audio-card,dai-link@0 {          /* I2S - HDMI*/
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                reg = <0>;
                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+        simple-audio-card,dai-link@2 {          /* I2S - HDMI */
+                reg = <2>;
+                format = "i2s";
                cpu {
                        sound-dai = <&light_i2s 1>;
                };
@@ -19,32 +45,20 @@
                        sound-dai = <&dummy_codec>;
                };
        };
-        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
-                reg = <1>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s1 0>;
-                };
-                codec {
-                        sound-dai = <&es7210_audio_codec>;
-                };
-        };
-        simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 8156*/
-                reg = <2>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s1 0>;
-                };
-                codec {
-                        sound-dai = <&es8156_audio_codec>;
-                };
-        };
 };

-&dpu_enc0 {
-        status = "disabled";
+&light_i2s {
+	status = "okay";
 };

-&dsi0 {
-        status = "disabled";
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
 };
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-dsi0-hdmi.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi.dts
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-dsi0.dts"
+
+&dpu_enc1 {
+        ports {
+                /delete-node/ port@0;
+        };
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi0-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi0-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-dsi0.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi0.dts
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "txd,dy800qwxpab";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&gpio1_porta 5 1>; /* active low */
+		vdd1v8-supply = <&lcd0_1v8>;
+		vspn5v7-supply = <&lcd0_5v7>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi1-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi1-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-dsi1.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-dsi1.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi1.dts
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc1 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc1_out: endpoint {
+				remote-endpoint = <&dsi1_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi1 {
+        status = "okay";
+};
+
+&dhost_1 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi1_in: endpoint {
+				remote-endpoint = <&enc1_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi1_out: endpoint {
+				remote-endpoint = <&panel1_in>;
+			};
+		};
+	};
+
+	panel1@0 {
+		compatible = "txd,dy800qwxpab";
+		reg = <0>;
+		backlight = <&lcd1_backlight>;
+		reset-gpio = <&gpio1_porta 9 1>;		/* active low */
+		vdd1v8-supply = <&lcd1_1v8>;
+		vspn5v7-supply = <&lcd1_5v7>;
+
+		port {
+			panel1_in: endpoint {
+				remote-endpoint = <&dsi1_out>;
+			};
+		};
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-dsp0-dsp1-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsp0-dsp1-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-dsp0-dsp1.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-dsp0-dsp1.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsp0-dsp1.dts
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+
+&xtensa_dsp1 {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-full-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-full-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-full.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-full.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-full.dts
@@ -0,0 +1,169 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu_enc1 {
+        ports {
+                /delete-node/ port@0;
+        };
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "txd,dy800qwxpab";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&gpio1_porta 5 1>; /* active low */
+		vdd1v8-supply = <&lcd0_1v8>;
+		vspn5v7-supply = <&lcd0_5v7>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+};
+
+&light_i2s {
+	status = "okay";
+};
+
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+ 
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
+
+&qspi0 {
+	status = "okay";
+};
+
+
+&qspi1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&sdhci1 {
+	status = "okay";
+};
+
+&wcn_bt {
+	status = "okay";
+};
+
+&wcn_wifi {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-gpio-keys.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-gpio-keys.dts
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+/ {
+	model = "T-HEAD Light FM GPIO-KEYS VAL board";
+	compatible = "thead,light-val-gpio-keys", "thead,light";
+};
+
+&gpio_keys {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-hdmi-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-hdmi-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-hdmi.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-hdmi.dts
@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc1 {
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&lightsound {
+	status = "okay";
+
+	simple-audio-card,dai-link@1 {          /* I2S - HDMI */
+		reg = <1>;
+		format = "i2s";
+		cpu {
+			sound-dai = <&light_i2s 1>;
+		};
+		codec {
+			sound-dai = <&dummy_codec>;
+		};
+	};
+};
+
+&light_i2s {
+        status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-iso7816-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-iso7816-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-iso7816.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-iso7816.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-iso7816.dts
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+&iso7816 {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-khv-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-khv-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-khv.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-khv.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-khv.dts
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+&resmem {
+        #address-cells = <2>;
+        #size-cells = <2>;
+        ranges;
+
+	/* 512M for guest memory */
+	guestmem: memory@50000000 {
+		reg = <0x0 0x50000000 0x0 0x20000000>;
+	};
+};
+
+&khvhost {
+	memory-region = <&guestmem>;
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-miniapp-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-miniapp-dsi0.dts
@@ -0,0 +1,149 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "txd,dy800qwxpab";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&gpio1_porta 5 1>; /* active low */
+		vdd1v8-supply = <&lcd0_1v8>;
+		vspn5v7-supply = <&lcd0_5v7>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&padctrl_audiosys {
+	status = "okay";
+
+	light-audio-padctrl {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+
+			pinctrl_audio_i2s_8ch: audio_i2s_8ch_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA0	  0x2 0x008
+					FM_AUDIO_IO_PA2	  0x2 0x008
+					FM_AUDIO_IO_PA3   0x2 0x008
+					FM_AUDIO_IO_PA8   0x2 0x008
+				>;
+			};
+	};
+};
+
+&lightsound {
+	status = "okay";
+
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+};
+
+&light_i2s {
+	status = "okay";
+};
+
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
+
+&sdhci1 {
+	status = "okay";
+};
+
+&wcn_bt {
+	status = "okay";
+};
+
+&wcn_wifi {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-miniapp-hdmi.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi.dts
@@ -0,0 +1,94 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc1 {
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&lightsound {
+	status = "okay";
+
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+};
+
+
+&light_i2s {
+	status = "okay";
+};
+
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
+
+&sdhci1 {
+	status = "okay";
+};
+
+&wcn_bt {
+	status = "okay";
+};
+
+&wcn_wifi {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-nand-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-nand-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-nand.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-nand.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-nand.dts
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+&qspi0 {
+	status = "okay";
+};
+
+&qspi1 {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-npu-fce-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-npu-fce-powergate.dts
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-npu-fce.dts"
+#include "light-powergate.dts"
+
+&npu {
+	power-domains = <&pd LIGHT_AON_NPU_PD>;
+};
+
--- a/arch/riscv/boot/dts/thead/light-a-val-npu-fce.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-npu-fce.dts
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+/ {
+	model = "T-HEAD Light FM NPU&FCE on VAL board";
+	compatible = "thead,light-val-npu-fce", "thead,light";
+
+};
+
+&facelib_mem {
+	reg = <0x0 0xd0000000 0 0x20000000>;
+	no-map;
+};
+
+&npu {
+	vha_clk_rate = <1000000000>;
+	status = "okay";
+};
+
+&fce {
+	memory-region = <&facelib_mem>;
+	status = "okay";
+};
+
--- a/arch/riscv/boot/dts/thead/light-a-val-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-sec-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-sec-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-sec.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-sec.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-sec.dts
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-audio-hdmi.dts"
+
+
+&light_iopmp {
+        status = "disabled";
+};
+&qspi1 {
+        status = "disabled";
+};
+
--- a/arch/riscv/boot/dts/thead/light-a-val-sv-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-sv-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-sv.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-sv.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-sv.dts
--- a/arch/riscv/boot/dts/thead/light-a-val-wcn-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-wcn-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-wcn.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/light-a-val-wcn.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-wcn.dts
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val.dts"
+
+&sdhci1 {
+	status = "okay";
+};
+
+&wcn_bt {
+	status = "okay";
+};
+
+&wcn_wifi {
+	status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/th1520-a-val.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-a-val.dtsi
@@ -5,10 +5,10 @@

 /dts-v1/;

-#include "th1520.dtsi"
+#include "light.dtsi"
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
-#include "th1520-vi-devices.dtsi"
+#include "light-vi-devices.dtsi"

 / {
 	model = "T-HEAD Light val board";
@@ -16,7 +16,7 @@

 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
-		stdout-path = "serial0";
+		stdout-path = "serial0:115200n8";
 	};

 	leds {
@@ -165,14 +165,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};

 	mbox_910t_client1: mbox_910t_client1 {
@@ -330,14 +322,12 @@
 		status = "disabled";
 		key-volumedown {
 			label = "Volume Down Key";
-			wakeup-source;
 			linux,code = <KEY_1>;
 			debounce-interval = <2>;
 			gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
 		};
 		key-volumeup {
 			label = "Volume Up Key";
-			wakeup-source;
 			linux,code = <KEY_2>;
 			debounce-interval = <2>;
 			gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
@@ -422,12 +412,6 @@
 				regulator-always-on;
 			};

-			soc_dvdd08_ap_reg: soc_dvdd08_ap {
-				regulator-name = "soc_dvdd08_ap";
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
 			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
 				regulator-name = "soc_avdd08_mipi_hdmi";
 				regulator-boot-on;
@@ -533,7 +517,7 @@
 	#address-cells = <2>;
 	#size-cells = <2>;
 	ranges;
-	//Note: with "no-map" reserv mem not saved in hibernation
+
 	tee_mem: memory@1a000000 {
 		reg = <0x0 0x1a000000 0 0x4000000>;
 		no-map;
@@ -543,14 +527,14 @@
 		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
 		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
 		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
-		//no-map;
+		no-map;
 	};
 	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
 		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
 		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
 		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
 		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
-		//no-map;
+		no-map;
 	};
    vi_mem: framebuffer@0f800000 {
 		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
@@ -560,15 +544,15 @@
 	};
 	facelib_mem: memory@22000000 {
 		reg = <0x0 0x22000000 0x0 0x10000000>;
-		//no-map;
+		no-map;
 	};
    audio_mem: memory@32000000 {
 		reg = <0x0 0x32000000 0x0 0x6400000>;
-		//no-map;
+		no-map;
    };
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
-		//no-map;
+		no-map;
 	};
 };

@@ -580,14 +564,22 @@
 &i2c0 {
 	clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c0>;
+
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
 		pagesize = <32>;
 	};

+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
       touch@5d {
               #gpio-cells = <2>;
               compatible = "goodix,gt911";
@@ -679,8 +671,6 @@
 &i2c1 {
        clock-frequency = <400000>;
        status = "okay";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c1>;
        touch1@5d {
                #gpio-cells = <2>;
                compatible = "goodix,gt911";
@@ -699,9 +689,9 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
+	status = "okay";

 	spi_norflash@0 {
-		status = "okay";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
@@ -711,48 +701,23 @@
 	};

 	spidev@1 {
-		status = "disable";
 		compatible = "spidev";
 		#address-cells = <0x1>;
 		#size-cells = <0x1>;
 		reg = <0x1>;
 		spi-max-frequency = <50000000>;
 	};
-
-	tpm_tis@0 {
-		status = "disable";
- 		compatible = "tcg,tpm_tis-spi";
-		reg = <0>;
- 		spi-max-frequency = <10000000>;
-	};
 };

 &uart0 {
 	clock-frequency = <100000000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart0>;
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart1>;
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-};
-
-&uart4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart4>;
 };

 &qspi0 {
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 3 0>;
-	rx-sample-dly = <5>;
-	status = "okay";
+	rx-sample-dly = <4>;
+	status = "disabled";

 	spi-flash@0 {
 		#address-cells = <1>;
@@ -773,8 +738,7 @@
 &qspi1 {
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
-	rx-sample-dly = <5>;
-	status = "okay";
+	status = "disabled";

 	spi-flash@0 {
 		#address-cells = <1>;
@@ -797,8 +761,6 @@
 	rx-clk-delay = <0x00>; /* for RGMII */
 	tx-clk-delay = <0x00>; /* for RGMII */
 	phy-handle = <&phy_88E1111_0>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gmac0>;
 	status = "okay";

 	mdio0 {
@@ -821,8 +783,6 @@
 	rx-clk-delay = <0x00>; /* for RGMII */
 	tx-clk-delay = <0x00>; /* for RGMII */
 	phy-handle = <&phy_88E1111_1>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gmac1>;
 	status = "okay";
 };

@@ -844,8 +804,6 @@
 	bus-width = <4>;
 	pull_up;
 	wprtn_ignore;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_sdio0>;
 	status = "okay";
 };

@@ -861,6 +819,7 @@
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
+	keep-power-in-suspend;
 	wakeup-source;
 	status = "disabled";
 };
@@ -873,8 +832,17 @@
 			 */
 			pinctrl_uart0: uart0grp {
 				thead,pins = <
-					FM_UART0_TXD	0x0	0x234
-					FM_UART0_RXD	0x0	0x234
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
 				>;
 			};

@@ -902,87 +870,12 @@
 				>;
 			};

-			pinctrl_i2c2: i2c2grp {
-				thead,pins = <
-					FM_I2C2_SCL	0x0	0x204
-					FM_I2C2_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c3: i2c3grp {
-				thead,pins = <
-					FM_I2C3_SCL	0x0	0x204
-					FM_I2C3_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_spi0: spi0grp {
-				thead,pins = <
-					FM_SPI_CSN	0x3	0x20a
-					FM_SPI_SCLK	0x0	0x20a
-					FM_SPI_MISO	0x0	0x23a
-					FM_SPI_MOSI	0x0	0x23a
-				>;
-			};
-
-			pinctrl_gmac1: gmac1grp {
-				thead,pins = <
-					FM_GPIO2_18	0x1	0x20f	/*	GMAC1_TX_CLK  */
-					FM_GPIO2_19	0x1	0x20f	/*	GMAC1_RX_CLK  */
-					FM_GPIO2_20	0x1	0x20f	/*	GMAC1_TXEN  */
-					FM_GPIO2_21	0x1	0x20f	/*	GMAC1_TXD0  */
-					FM_GPIO2_22	0x1	0x20f	/*	GMAC1_TXD1  */
-					FM_GPIO2_23	0x1	0x20f	/*	GMAC1_TXD2  */
-					FM_GPIO2_24	0x1	0x20f	/*	GMAC1_TXD3  */
-					FM_GPIO2_25	0x1	0x20f	/*	GMAC1_RXDV  */
-					FM_GPIO2_30	0x1	0x20f	/*	GMAC1_RXD0  */
-					FM_GPIO2_31	0x1	0x20f	/*	GMAC1_RXD1  */
-					FM_GPIO3_0	0x1	0x20f	/*	GMAC1_RXD2  */
-					FM_GPIO3_1	0x1	0x20f	/*	GMAC1_RXD3  */
-				>;
-			};
-
-			pinctrl_sdio0: sdio0grp {
-				thead,pins = <
-					FM_SDIO0_DETN	0x0	0x208	
-				>;
-			};
-
 			pinctrl_pwm: pwmgrp {
 				thead,pins = <
 					FM_GPIO3_2	0x1	0x208	/* pwm0 */
 					FM_GPIO3_3	0x1	0x208	/* pwm1 */
 				>;
 			};
-
-			pinctrl_hdmi: hdmigrp {
-				thead,pins = <
-					FM_HDMI_SCL	0x0	0x208	
-					FM_HDMI_SDA	0x0	0x208	
-					FM_HDMI_CEC	0x0	0x208
-				>;
-			};
-
-			pinctrl_gmac0: gmac0grp {
-				thead,pins = <
-					FM_GMAC0_TX_CLK	0x0	0x20f	/*	GMAC0_TX_CLK  */
-					FM_GMAC0_RX_CLK	0x0	0x20f	/*	GMAC0_RX_CLK  */
-					FM_GMAC0_TXEN	0x0	0x20f	/*	GMAC0_TXEN  */
-					FM_GMAC0_TXD0	0x0	0x20f	/*	GMAC0_TXD0  */
-					FM_GMAC0_TXD1	0x0	0x20f	/*	GMAC0_TXD1  */
-					FM_GMAC0_TXD2	0x0	0x20f	/*	GMAC0_TXD2  */
-					FM_GMAC0_TXD3	0x0	0x20f	/*	GMAC0_TXD3  */
-					FM_GMAC0_RXDV	0x0	0x20f	/*	GMAC0_RXDV  */
-					FM_GMAC0_RXD0	0x0	0x20f	/*	GMAC0_RXD0  */
-					FM_GMAC0_RXD1	0x0	0x20f	/*	GMAC0_RXD1  */
-					FM_GMAC0_RXD2	0x0	0x20f	/*	GMAC0_RXD2  */
-					FM_GMAC0_RXD3	0x0	0x20f	/*	GMAC0_RXD3  */
-					FM_GMAC0_MDC	0x0 0x208	/*	GMAC0_MDC  */
-					FM_GMAC0_MDIO	0x0 0x208	/*	GMAC0_MDIO  */
-					FM_GMAC0_COL	0x3	0x232	/*	PHY0_nRST  */
-					FM_GMAC0_CRS	0x3	0x232	/*	PHY0_nINT  */
-				>;
-			};
 		};
 };

@@ -992,6 +885,22 @@
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
 			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
 			pinctrl_qspi1: qspi1grp {
 				thead,pins = <
 					FM_QSPI1_SCLK    0x0    0x20a
@@ -1003,6 +912,7 @@
 				>;
 			};

+
 			pinctrl_iso7816: iso7816grp {
 				thead,pins = <
 					FM_QSPI1_SCLK		0x1	0x208
@@ -1013,51 +923,6 @@
 				>;
 			};

-			pinctrl_i2c0: i2c0grp {
-				thead,pins = <
-					FM_I2C0_SCL	0x0	0x204
-					FM_I2C0_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c1: i2c1grp {
-				thead,pins = <
-					FM_I2C1_SCL	0x0	0x204
-					FM_I2C1_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_uart1: uart1grp {
- 				thead,pins = <
-					FM_UART1_TXD	0x0	0x234
-					FM_UART1_RXD	0x0	0x234
-				>;
-			};
-
-			pinctrl_uart4: uart4grp {
-				thead,pins = <
-					FM_UART4_TXD	0x0	0x208
-					FM_UART4_RXD	0x0	0x208
-					FM_UART4_CTSN	0x0	0x208
-					FM_UART4_RTSN	0x0	0x208
-				>;
-			};
-
-			pinctrl_uart3: uart3grp {
-				thead,pins = <
-					FM_UART3_TXD	0x1	0x202
-					FM_UART3_RXD	0x1	0x202
-					FM_GPIO0_20		0x2	0x202	/*	UART3_IR_OUT  */
-					FM_GPIO0_21		0x2	0x202	/*	UART3_IR_IN  */
-				>;
-			};
-
-			pinctrl_i2c4: i2c4grp {
-				thead,pins = <
-					FM_GPIO0_18	0x1	0x204	/*	I2C4_SCL  */
-					FM_GPIO0_19	0x1	0x204	/*	I2C4_SDA  */
-				>;
-			};
 		};
 };

@@ -1221,8 +1086,6 @@
 &i2c2 {
    clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c2>;
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
@@ -1233,8 +1096,6 @@
 &i2c3 {
    clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c3>;
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
@@ -1245,8 +1106,6 @@
 &i2c4 {
    clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c4>;
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
@@ -1469,7 +1328,7 @@
    DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
    DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
    AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-    i2c_reg_width = /bits/ 8 <2>;
+	i2c_reg_width = /bits/ 8 <2>;
    i2c_data_width = /bits/ 8 <1>;
    i2c_addr = /bits/ 8 <0x1a>;
    i2c_bus = /bits/ 8 <3>;
@@ -1477,7 +1336,6 @@
 };

 &video0{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1564,7 +1422,6 @@


 &video1{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1668,7 +1525,6 @@
 };

 &video2{
-	status = "okay";
    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1761,7 +1617,6 @@
 };

 &video3{
-	status = "okay";
    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1865,7 +1720,6 @@
 };

 &video4{
-	status = "okay";
    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -2017,7 +1871,6 @@
 };

 &video5{
-	status = "okay";
 	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -2187,7 +2040,6 @@
 };

 &video6{
-	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
 	channel0 {
 		sensor0 {
@@ -2228,7 +2080,6 @@
 };

 &video7{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2398,7 +2249,6 @@


 &video8{
-	status = "okay";
    vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
 	channel0 {
 		sensor0 {
@@ -2430,7 +2280,6 @@
 };

 &video9{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2452,7 +2301,6 @@


 &video10{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2474,7 +2322,6 @@
 };

 &video11{
-	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -2501,7 +2348,6 @@
 };

 &video12{ // TUNINGTOOL
-	status = "okay";
 	channel0 { // CSI2
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2522,35 +2368,6 @@
 	};
 };

-&video15{
-	status = "okay";
-	vi_mem_pool_region = <0>;
-	channel0 {
-		channel_id = <0>;
-		status = "okay";
-        sensor0 {
-			subdev_name = "vivcam";
-			idx = <0>; //<0>=vivcam0 :2310 
-			csi_idx = <0>; //<0>=CSI2
-			flash_led_idx = <0>;
-			mode_idx = <1>;
-			path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
-		};
-		sensor1 {
-            subdev_name = "vivcam";
-            idx = <7>; //imx334
-            csi_idx = <0>; //<0>=CSI2
-            mode_idx = <0>;
-            path_type = "SENSOR_3840x2180_RAW12_LINER";
-        };
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_DDR";
-		};
-	};
-};
-
 &trng {
 	status = "disabled";
 };
@@ -2696,8 +2513,3 @@
 		>;
 	};
 };
-
-&hdmi_tx {
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_hdmi>;
-};
--- a/arch/riscv/boot/dts/thead/light-ant-discrete-crash.dts
+++ b/arch/riscv/boot/dts/thead/light-ant-discrete-crash.dts
@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-crash.dts"
+
+&aon {
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic-ant";
+		status = "okay";
+
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	};
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+	c910_2: cpu@2 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+	c910_3: cpu@3 {
+		operating-points = <
+			/* kHz    uV */
+			300000	720000
+			800000	720000
+			1500000	820000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	770000
+			800000	820000
+			1500000	820000
+		>;
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-ant-discrete.dts
+++ b/arch/riscv/boot/dts/thead/light-ant-discrete.dts
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-product-crash.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-product-crash.dts
@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Copyright (C) 2023 Alibaba Group Holding Limited.
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
 */

-#include "th1520-crash.dtsi"
+#include "light-crash.dts"

 &aon {
 	aon_reg_dialog: light-dialog-reg {
@@ -32,67 +32,59 @@
 	c910_0: cpu@0 {
 		operating-points = <
 			/* kHz    uV */
-			300000	600000
+			300000	650000
 			800000	700000
 			1500000	800000
-			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
-			1848000 1000000
 		>;
 	};
 	c910_1: cpu@1 {
 		operating-points = <
 			/* kHz    uV */
-			300000	600000
+			300000	650000
 			800000	700000
 			1500000	800000
-			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
-			1848000 1000000
 		>;
 	};
 	c910_2: cpu@2 {

 		operating-points = <
 			/* kHz    uV */
-			300000	600000
+			300000	650000
 			800000	700000
 			1500000	800000
-			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
-			1848000 1000000
 		>;
 	};
 	c910_3: cpu@3 {

 		operating-points = <
 			/* kHz    uV */
-			300000	600000
+			300000	650000
 			800000	700000
 			1500000	800000
-			1848000 1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
-			1848000 1000000
 		>;
 	};
 };
--- a/arch/riscv/boot/dts/thead/th1520-b-product-sec.dts
+++ b/arch/riscv/boot/dts/thead/th1520-b-product-sec.dts
@@ -5,7 +5,7 @@

 /dts-v1/;

-#include "th1520-b-product.dts"
+#include "light-ant-ref.dts"



@@ -13,6 +13,8 @@
        status = "disabled";
 };

-&eip_28 {
+&qspi1 {
        status = "disabled";
 };
+
+
--- a/arch/riscv/boot/dts/thead/light-ant-ref.dts
+++ b/arch/riscv/boot/dts/thead/light-ant-ref.dts
--- a/arch/riscv/boot/dts/thead/light-b-audio-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-b-audio-hdmi.dts
@@ -5,10 +5,10 @@

 /dts-v1/;

-#include "th1520.dtsi"
+#include "light.dtsi"
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
-#include "th1520-vi-devices.dtsi"
+#include "light-vi-devices.dtsi"
 / {
 	model = "T-HEAD Light val board";
 	compatible = "thead,light-val", "thead,light";
@@ -166,14 +166,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};

 	mbox_910t_client1: mbox_910t_client1 {
@@ -266,14 +258,12 @@
 		pinctrl-names = "default";
 		key-volumedown {
 			label = "Volume Down Key";
-			wakeup-source;
 			linux,code = <KEY_VOLUMEDOWN>;
 			debounce-interval = <1>;
 			gpios = <&ao_gpio_porta 11 0x1>;
 		};
 		key-volumeup {
 			label = "Volume Up Key";
-			wakeup-source;
 			linux,code = <KEY_VOLUMEUP>;
 			debounce-interval = <1>;
 			gpios = <&ao_gpio_porta 10 0x1>;
@@ -579,14 +569,14 @@
               0x0 0x20280000 0x0 0x00001000   /* DSP communication area 4K*/ 
               0x0 0x20281000 0x0 0x00007000  /* Panic/log page 28K */
               0x0 0x20288000 0x0 0x00178000>;  /* DSP shared memory 1.5M-32K*/
-		//no-map;
+		no-map;
 	};
    dsp1_mem: memory@20400000 {             /**0x2040_0000~0x2080_0000 4M**/
        reg = <0x0 0x20400000 0x0 0x00280000  /* DSP FW code&data section */ 
               0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
               0x0 0x20681000 0x0 0x00007000    /* Panic/log page*/ 
               0x0 0x20688000 0x0 0x00178000>;  /* DSP shared memory */
-        //no-map;
+        no-map;
    };
 	vi_mem: framebuffer@10000000 {
 		reg = <0x0 0x10000000 0x0 0x02C00000	/* vi_mem_pool_region[0]  44 MB (default) */
@@ -597,16 +587,16 @@

 	facelib_mem: memory@17000000 {
 		reg = <0x0 0x17000000 0 0x02000000>;
-		//no-map;
+		no-map;
 	};

 	audio_mem: memory@32000000 {
 		reg = <0x0 0x32000000 0x0 0x6400000>;
-		//no-map;
+		no-map;
    };
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
-		//no-map;
+		no-map;
 	};

 };
--- a/arch/riscv/boot/dts/thead/light-b-power.dts
+++ b/arch/riscv/boot/dts/thead/light-b-power.dts
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-b-product.dts"
+
+&aon {
+	/delete-node/light-ricoh-reg;
+
+       	soc_vdd18_lcd0_bk_en_reg: soc_vdd18_lcd0_bk_en {
+		compatible = "regulator-fixed";
+		regulator-name = "soc_vdd18_lcd0_bk_en";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio1_porta 9 1>;
+		enable-active-high;
+	};
+
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic-ant";
+		status = "okay";
+	
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_aon_reg: soc_dvdd18_aon {
+			regulator-name = "soc_dvdd18_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+			regulator-name = "soc_avdd33_usb3";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_aon_reg: soc_dvdd08_aon {
+			regulator-name = "soc_dvdd08_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+			regulator-name = "soc_dvdd08_ddr";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+			regulator-name = "soc_vdd_ddr_1v8";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+			regulator-name = "soc_vdd_ddr_1v1";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+			regulator-name = "soc_vdd_ddr_0v6";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_ap_reg: soc_dvdd18_ap {
+			regulator-name = "soc_dvdd18_ap";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+			regulator-name = "soc_avdd08_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+			regulator-name = "soc_avdd18_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd33_emmc_reg: soc_vdd33_emmc {
+			regulator-name = "soc_vdd33_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd18_emmc_reg: soc_vdd18_emmc {
+			regulator-name = "soc_vdd18_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+#if 0	
+		soc_dovdd18_scan_reg: soc_dovdd18_scan {
+			regulator-name = "soc_dovdd18_scan";
+		};
+	
+		soc_dvdd12_scan_reg: soc_dvdd12_scan {
+			regulator-name = "soc_dvdd12_scan";
+		};
+	
+		soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+			regulator-name = "soc_avdd28_scan_en";
+		};
+#endif
+	
+	};
+};
+
+
+&panel0 {
+
+	vdd1v8-supply = <&soc_vdd18_lcd0_bk_en_reg>;
+};
--- a/arch/riscv/boot/dts/thead/th1520-b-product-crash.dts
+++ b/arch/riscv/boot/dts/thead/th1520-b-product-crash.dts
@@ -3,7 +3,7 @@
 * Copyright (C) 2021 Alibaba Group Holding Limited.
 */

-#include "th1520-crash.dtsi"
+#include "light-crash.dts"

 &aon {
 	aon_reg_ricoh: light-ricoh-reg {
--- a/arch/riscv/boot/dts/thead/light-b-product-ddr1G-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product-ddr1G-powergate.dts
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-b-product-ddr1G.dts"
+#include "light-powergate.dts"
+
+&soc_vdd18_lcd0_en_reg {
+	/delete-property/regulator-always-on;
+};
+&soc_lcd0_bias_en_reg {
+	/delete-property/regulator-always-on;
+};
--- a/arch/riscv/boot/dts/thead/light-b-product-ddr1G.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product-ddr1G.dts
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-b-product.dts"
+
+/ {
+	model = "T-HEAD Light-B VAL configuration for 1GB DDR board";
+	compatible = "thead,light-val", "thead,light-val-ddr1G", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0x3fe00000>;
+	};
+};
+
+&cmamem {
+	size = <0 0x8c00000>; // 140MB by default
+	alloc-ranges = <0 0x02000000 0 0x0cc000000>; // [0x0600_0000 ~ 0x0EC0_0000]
+};
--- a/arch/riscv/boot/dts/thead/light-b-product-miniapp-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product-miniapp-hdmi.dts
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-b-product.dts"
+
+&dpu_enc0 {
+        status = "disabled";
+};
+
+&dsi0 {
+        status = "disabled";
+};
+
+&dhost_0 {
+        status = "disabled";
+};
+
+&wcn_bt {
+        status = "okay";
+};
+
+&wcn_wifi {
+        status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-b-product-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product-powergate.dts
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-b-product.dts"
+#include "light-powergate.dts"
+
+
+&soc_vdd18_lcd0_en_reg {
+	/delete-property/regulator-always-on;
+};
+
+&soc_lcd0_bias_en_reg {
+	/delete-property/regulator-always-on;
+};
--- a/arch/riscv/boot/dts/thead/light-b-product-sec-powergate.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product-sec-powergate.dts
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-b-product-sec.dts"
+#include "light-powergate.dts"
+
--- a/arch/riscv/boot/dts/thead/th1520-lpi4a-product-sec.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lpi4a-product-sec.dts
@@ -5,13 +5,14 @@

 /dts-v1/;

-#include "th1520-lpi4a-product.dts"
+#include "light-b-audio-hdmi.dts"
+


 &light_iopmp {
        status = "disabled";
 };

-&eip_28 {
+&qspi1 {
        status = "disabled";
 };
--- a/arch/riscv/boot/dts/thead/light-b-product.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product.dts
--- a/arch/riscv/boot/dts/thead/light-b-ref.dts
+++ b/arch/riscv/boot/dts/thead/light-b-ref.dts
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-b-product.dts"
+
+&aon {
+	/delete-node/light-ricoh-reg;
+
+       	soc_vdd18_lcd0_bk_en_reg: soc_vdd18_lcd0_bk_en {
+		compatible = "regulator-fixed";
+		regulator-name = "soc_vdd18_lcd0_bk_en";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio1_porta 9 1>;
+		enable-active-high;
+	};
+
+	aon_reg_dialog: light-dialog-reg {
+		compatible = "thead,light-dialog-pmic-ant";
+		status = "okay";
+	
+		dvdd_cpu_reg: appcpu_dvdd {
+			regulator-name = "appcpu_dvdd";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		dvddm_cpu_reg: appcpu_dvddm {
+			regulator-name = "appcpu_dvddm";
+			regulator-min-microvolt = <300000>;
+			regulator-max-microvolt = <1570000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_aon_reg: soc_dvdd18_aon {
+			regulator-name = "soc_dvdd18_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+			regulator-name = "soc_avdd33_usb3";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_aon_reg: soc_dvdd08_aon {
+			regulator-name = "soc_dvdd08_aon";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+			regulator-name = "soc_dvdd08_ddr";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+			regulator-name = "soc_vdd_ddr_1v8";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+			regulator-name = "soc_vdd_ddr_1v1";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+			regulator-name = "soc_vdd_ddr_0v6";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_dvdd18_ap_reg: soc_dvdd18_ap {
+			regulator-name = "soc_dvdd18_ap";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+			regulator-name = "soc_avdd08_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+			regulator-name = "soc_avdd18_mipi_hdmi";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd33_emmc_reg: soc_vdd33_emmc {
+			regulator-name = "soc_vdd33_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+	
+		soc_vdd18_emmc_reg: soc_vdd18_emmc {
+			regulator-name = "soc_vdd18_emmc";
+			regulator-boot-on;
+			regulator-always-on;
+		};
+#if 0	
+		soc_dovdd18_scan_reg: soc_dovdd18_scan {
+			regulator-name = "soc_dovdd18_scan";
+		};
+	
+		soc_dvdd12_scan_reg: soc_dvdd12_scan {
+			regulator-name = "soc_dvdd12_scan";
+		};
+	
+		soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+			regulator-name = "soc_avdd28_scan_en";
+		};
+#endif
+	
+	};
+};
+
+
+&panel0 {
+
+	vdd1v8-supply = <&soc_vdd18_lcd0_bk_en_reg>;
+};
--- a/arch/riscv/boot/dts/thead/light-beagle-ref.dts
+++ b/arch/riscv/boot/dts/thead/light-beagle-ref.dts
--- a/arch/riscv/boot/dts/thead/light-beagle.dts
+++ b/arch/riscv/boot/dts/thead/light-beagle.dts
@@ -0,0 +1,705 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-beagle-ref.dts"
+
+&vvcam_sensor4 { // beagle board J5 CSI0 connector
+	sensor_name = "IMX219";
+	sensor_pdn = <&gpio2_porta 23 0>; //powerdown pin / shutdown pin 
+	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
+	i2c_addr = /bits/ 8 <0x10>;
+	i2c_bus = /bits/ 8 <1>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	status = "okay";
+};
+
+&vvcam_sensor5 { // beagle board J4 CSI1 connector
+	sensor_name = "IMX219";
+	sensor_pdn = <&gpio2_porta 24 0>; //powerdown pin / shutdown pin 
+	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
+	i2c_addr = /bits/ 8 <0x10>;
+	i2c_bus = /bits/ 8 <3>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	status = "okay";
+};
+
+/*
+sensor imx219 mounted on beagle board J4 CSI1 (=light CSI2X2_A+CSI2X2_B   /   CSI2X2_A only)
+video0: sensor-vipre-isp0
+video1: sensor-vipre-isp0-dw
+video7: sensor-vipre-isp0-dsp1-ry-dw
+video10: tuningtool
+
+sensor imx219 mounted on beagle board J5 CSI0 (=light CSI2)
+video2: sensor-vipre-isp1   
+video3: sensor-vipre-isp1-dw   
+video4: sensor-vipre-isp1-dsp0-ry
+video5: sensor-vipre-isp1-dsp0-ry-dw
+video12: tuningtool
+*/
+
+&video0{
+    vi_mem_pool_region = <0xFFFFFFFF>;	// vi_mem: framebuffer, region[2]
+    channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video2 {
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	status = "okay";
+	channel0 {
+		channel_id = <0>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		channel_id = <1>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		channel_id = <2>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video3{
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE0";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE1";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE2";
+			dw_dst_depth = <2>;
+		};
+	};
+};
+
+&video4{
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video5{
+	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE0";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE1";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE2";
+			dw_dst_depth = <2>;
+		};
+	};
+};
--- a/arch/riscv/boot/dts/thead/th1520-crash.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-crash.dtsi
@@ -5,10 +5,10 @@

 /dts-v1/;

-#include "th1520.dtsi"
+#include "light.dtsi"
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
-#include "th1520-vi-devices.dtsi"
+#include "light-vi-devices.dtsi"
 / {
 	model = "T-HEAD Light val board";
 	compatible = "thead,light-val", "thead,light";
@@ -163,14 +163,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};

 	mbox_910t_client1: mbox_910t_client1 {
@@ -297,14 +289,14 @@
               0x0 0x20280000 0x0 0x00001000   /* DSP communication area 4K*/ 
               0x0 0x20281000 0x0 0x00007000  /* Panic/log page 28K */
               0x0 0x20288000 0x0 0x00178000>;  /* DSP shared memory 1.5M-32K*/
-		//no-map;
+		no-map;
 	};
    dsp1_mem: memory@20400000 {             /**0x2040_0000~0x2080_0000 4M**/
        reg = <0x0 0x20400000 0x0 0x00280000  /* DSP FW code&data section */ 
               0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
               0x0 0x20681000 0x0 0x00007000    /* Panic/log page*/ 
               0x0 0x20688000 0x0 0x00178000>;  /* DSP shared memory */
-        //no-map;
+        no-map;
    };
 	vi_mem: framebuffer@10000000 {
 		reg = <0x0 0x10000000 0x0 0x02C00000	/* vi_mem_pool_region[0]  44 MB (default) */
@@ -314,7 +306,7 @@
 	};
 	facelib_mem: memory@17000000 {
 		reg = <0x0 0x17000000 0 0x02000000>;
-		//no-map;
+		no-map;
 	};
 };

--- a/arch/riscv/boot/dts/thead/light-emu.dtsi
+++ b/arch/riscv/boot/dts/thead/light-emu.dtsi
--- a/arch/riscv/boot/dts/thead/light-evb.dtsi
+++ b/arch/riscv/boot/dts/thead/light-evb.dtsi
--- a/arch/riscv/boot/dts/thead/light-fm-emu-audio.dts
+++ b/arch/riscv/boot/dts/thead/light-fm-emu-audio.dts
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-fm-emu.dts"
+
+/ {
+	model = "T-HEAD Light FM EMP Audio FPGA board";
+	compatible = "thead,light-fm-emu-audio", "thead,light";
+};
+
+&lightsound {
+	status = "okay";
+};
+
+&light_i2s {
+	status = "okay";
+};
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Lu Hui	052b22ef8b	revyos_defconfig: enable nfs kernel server support	2023-09-11 20:15:56 +08:00
Lu Hui	cc197e94ce	riscv: dts: add lpi4a laptop device tree	2023-09-11 18:35:35 +08:00
Lu Hui	46e0a824e1	riscv: dts: add cluster device tree	2023-09-11 18:35:18 +08:00
Mingzheng Xing	f72e7cd077	feat: update gpu to Linux_SDK_V1.2.1 This version update involves a lot of content, so the previous version has been deleted and the new version has been re-merged into the kernel. The configuration file for the GPU driver originates from a previous version. Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>	2023-09-06 12:31:53 +08:00
Lu Hui	807db9d981	Revert "revyos_defconfig: enable usb uas driver" This reverts commit `07167b855f`. this commit cause some usb stroage device not working,disable this driver from being compiled into the kernel until the cause of the device not working is found.	2023-09-04 17:15:41 +08:00
Lu Hui	07167b855f	revyos_defconfig: enable usb uas driver	2023-08-28 11:31:23 +08:00
Lu Hui	342da2ebbd	revyos_defconfig: enable TCP congestion control	2023-08-28 11:31:23 +08:00
Han Gao	0504ee67e5	fix: revert es7210&es8156 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-19 15:26:40 +08:00
Han Gao	4d36214794	chore: sync sdk v1.2.1 config Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-19 15:26:40 +08:00
Han Gao	8e0c3eb23d	chore: sync sdk v1.2.1 es7210&es8156 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-19 15:26:40 +08:00
Han Gao	3e585776f5	chore: sync sdk v1.2.1 dts Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-19 15:26:40 +08:00
thead_admin	afef388b8e	Linux_SDK_V1.2.1 Signed-off-by: thead_admin <occ_thead@service.alibaba.com>	2023-08-19 15:26:40 +08:00
Martin Rodriguez Reboredo	a26b2d282c	kbuild: Add skip_encoding_btf_enum64 option to pahole New pahole (version 1.24) generates by default new BTF_KIND_ENUM64 BTF tag, which is not supported by stable kernel. As a result the kernel with CONFIG_DEBUG_INFO_BTF option will fail to compile with following error: BTFIDS vmlinux FAILED: load BTF from vmlinux: Invalid argument New pahole provides --skip_encoding_btf_enum64 option to skip BTF_KIND_ENUM64 generation and produce BTF supported by stable kernel. Adding this option to scripts/pahole-flags.sh. This change does not have equivalent commit in linus tree, because linus tree has support for BTF_KIND_ENUM64 tag, so it does not need to be disabled. Signed-off-by: Martin Rodriguez Reboredo <yakoyoku@gmail.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>	2023-08-17 14:14:35 +08:00
Jiri Olsa	0bd99ce376	kbuild: Unify options for BTF generation for vmlinux and modules commit 9741e07ece7c247dd65e1aa01e16b683f01c05a8 upstream. [skipped --btf_gen_floats option in pahole-flags.sh, skipped Makefile.modfinal change, because there's no BTF kmod support, squashing in 'exit 0' change from merge commit fc02cb2b37fe] Using new PAHOLE_FLAGS variable to pass extra arguments to pahole for both vmlinux and modules BTF data generation. Adding new scripts/pahole-flags.sh script that detect and prints pahole options. [ fixed issues found by kernel test robot ] Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20211029125729.70002-1-jolsa@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>	2023-08-17 14:14:35 +08:00
Andrii Nakryiko	3ddef5a969	kbuild: skip per-CPU BTF generation for pahole v1.18-v1.21 commit a0b8200d06ad6450c179407baa5f0f52f8cfcc97 upstream. [small context changes due to missing floats support in 5.10] Commit "mm/page_alloc: convert per-cpu list protection to local_lock" will introduce a zero-sized per-CPU variable, which causes pahole to generate invalid BTF. Only pahole versions 1.18 through 1.21 are impacted, as before 1.18 pahole doesn't know anything about per-CPU variables, and 1.22 contains the proper fix for the issue. Luckily, pahole 1.18 got --skip_encoding_btf_vars option disabling BTF generation for per-CPU variables in anticipation of some unanticipated problems. So use this escape hatch to disable per-CPU var BTF info on those problematic pahole versions. Users relying on availability of per-CPU var BTFs would need to upgrade to pahole 1.22+, but everyone won't notice any regressions. Link: https://lkml.kernel.org/r/20210530002536.3193829-1-andrii@kernel.org Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Mel Gorman <mgorman@techsingularity.net> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Hao Luo <haoluo@google.com> Cc: Michal Suchanek <msuchanek@suse.de> Cc: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>	2023-08-17 14:14:35 +08:00
Javier Martinez Canillas	8b0b779b76	kbuild: Quote OBJCOPY var to avoid a pahole call break the build commit ff2e6efda0d5c51b33e2bcc0b0b981ac0a0ef214 upstream. [backported for dependency, skipped Makefile.modfinal change, because module BTF is not supported in 5.10] The ccache tool can be used to speed up cross-compilation, by calling the compiler and binutils through ccache. For example, following should work: $ export ARCH=arm64 CROSS_COMPILE="ccache aarch64-linux-gnu-" $ make M=drivers/gpu/drm/rockchip/ but pahole fails to extract the BTF info from DWARF, breaking the build: CC [M] drivers/gpu/drm/rockchip//rockchipdrm.mod.o LD [M] drivers/gpu/drm/rockchip//rockchipdrm.ko BTF [M] drivers/gpu/drm/rockchip//rockchipdrm.ko aarch64-linux-gnu-objcopy: invalid option -- 'J' Usage: aarch64-linux-gnu-objcopy [option(s)] in-file [out-file] Copies a binary file, possibly transforming it in the process ... make[1]: * [scripts/Makefile.modpost:156: __modpost] Error 2 make: * [Makefile:1866: modules] Error 2 this fails because OBJCOPY is set to "ccache aarch64-linux-gnu-copy" and later pahole is executed with the following command line: LLVM_OBJCOPY=$(OBJCOPY) $(PAHOLE) -J --btf_base vmlinux $@ which gets expanded to: LLVM_OBJCOPY=ccache aarch64-linux-gnu-objcopy pahole -J ... instead of: LLVM_OBJCOPY="ccache aarch64-linux-gnu-objcopy" pahole -J ... Fixes: 5f9ae91f7c0d ("kbuild: Build kernel module BTFs if BTF is enabled and pahole supports it") Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com> Link: https://lore.kernel.org/bpf/20210526215228.3729875-1-javierm@redhat.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>	2023-08-17 14:14:35 +08:00
Ilya Leoshkevich	c70e925ac5	bpf: Generate BTF_KIND_FLOAT when linking vmlinux commit db16c1fe92d7ba7d39061faef897842baee2c887 upstream. [backported for dependency only extra_paholeopt variable setup and usage, we don't want floats generated in 5.10] pahole v1.21 supports the --btf_gen_floats flag, which makes it generate the information about the floating-point types [1]. Adjust link-vmlinux.sh to pass this flag to pahole in case it's supported, which is determined using a simple version check. [1] https://lore.kernel.org/dwarves/YHRiXNX1JUF2Az0A@kernel.org/ Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20210413190043.21918-1-iii@linux.ibm.com Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>	2023-08-17 14:14:35 +08:00
NekoRouter	c130cdb21f	Add USB Modem (CDC ACM) support	2023-08-07 18:20:20 +08:00
NekoRouter	765b9ada52	Add usb-serial defconfig	2023-08-07 18:20:20 +08:00
Han Gao	8631d2c44f	chore: dtb_install in /boot Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-02 03:02:54 +08:00
Icenowy Zheng	c56347a43e	add lpi4a 16g dtb Co-authored-by: Han Gao <gaohan@iscas.ac.cn> Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-02 03:02:54 +08:00
Han Gao	827be31621	feat: update gpu sdk1.2.0 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-02 02:42:20 +08:00
Han Gao	8eac2d9ff9	fix: revert lpi4a dts for Speaker Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-02 01:27:02 +08:00
Han Gao	d2d4e58f6d	fix: revert es7210.c/h es8156.c Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-02 01:27:02 +08:00
Han Gao	3360d12ccb	feat: sync light kernel config Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-02 01:27:02 +08:00
jianghai	c99828ab6f	eth: gmac: adapt to support DMA 32-bit in skb	2023-08-02 01:27:02 +08:00
Han Gao	7d38ead3b4	feat: update SDK1.2.0 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-08-02 01:27:02 +08:00
Han Gao	66f9d7c397	chore: fixed version rule of kernel Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-07-19 17:01:53 +08:00
Mingzheng Xing	9e49618e75	driver: add npu-ax3386-gpl Add a new driver npu-ax3386-gpl, default compile as module. The default generated modules are: - vha.ko - img_mem.ko - vha_info.ko Signed-off-by: Mingzheng Xing <xingmingzheng@iscas.ac.cn>	2023-07-19 02:15:19 +08:00
Han Gao	6324bd2198	feat: build linux-perf-thead Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-07-19 00:09:24 +08:00
Han Gao	16fdf152d1	feat: package deb Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-07-19 00:09:24 +08:00
Han Gao	0683ead841	feat: remove compression for riscv Image Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-07-14 20:33:46 +08:00
Han Gao	1dd9935a28	fix: remove p2p0 ifname Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-07-14 00:58:41 +08:00
Han Gao	b989adf3aa	fix: remove debug config Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-07-14 00:58:41 +08:00
Mingzheng Xing	8cf226ab71	Kernel: Enable binfmt_misc module Enable binfmt_misc module as the kernel module.	2023-07-11 00:49:19 +08:00
忘怀	42de796933	Input: joystick - fix Kconfig warning for JOYSTICK_ADC [ Upstream commit 6100a19c4fcfe154dd32f8a8ef4e8c0b1f607c75 ] Fix a Kconfig warning for JOYSTICK_ADC by also selecting IIO_BUFFER. WARNING: unmet direct dependencies detected for IIO_BUFFER_CB Depends on [n]: IIO [=y] && IIO_BUFFER [=n] Selected by [y]: - JOYSTICK_ADC [=y] && INPUT [=y] && INPUT_JOYSTICK [=y] && IIO [=y] Fixes: 2c2b364fddd5 ("Input: joystick - add ADC attached joystick driver.") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20221104201238.31628-1-rdunlap@infradead.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org>	2023-07-04 15:20:54 +08:00
Han Gao	387b686325	chore: remove CONFIG_VECTOR_0_7 for workflow Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-26 16:02:44 +08:00
Han Gao	7a3658a807	chore: remove CONFIG_VECTOR_0_7 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-26 16:02:44 +08:00
Han Gao	7feb2daff6	feat: riscv: vector: No need T-head toolchain to build kernel with CONFIG_VECTOR from: `bced4a86e6` Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-26 16:02:44 +08:00
Han Gao	0a18500133	chore: restore only support v0p7 Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-26 16:02:44 +08:00
Han Gao	87260fc991	chore: remove img_module in workflow Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-25 23:04:18 +08:00
Mingzheng Xing	772a291a5a	Kernel: Add new driver configs Add kernel configs for the following drivers: - vpu-vc8000d-kernel - vpu-vc8000e-kernel - video_memory - gpu_bxm_4_64-kernel	2023-06-25 23:04:18 +08:00
Mingzheng Xing	77c3f5c0d0	Kernel: Add gpu_bxm img-rogue driver	2023-06-25 23:04:18 +08:00
Mingzheng Xing	3eeff2b39d	Kernel: Add video memory driver	2023-06-25 23:04:18 +08:00
Mingzheng Xing	06b8b8d9f0	Kernel: Add vc8000d and vc8000e driver	2023-06-25 23:04:18 +08:00
Han Gao	9c58afc7ad	fix: gpu-viv build failed in gcc-13 fix _QuerySignal function signature Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-24 19:48:34 +08:00
Han Gao	ded657fd09	fix: fix perf build Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-24 18:18:46 +08:00
Han Gao	93e7aec675	fix: fix ci kernel config Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-24 18:18:46 +08:00
Han Gao	231409c0ed	fix: fix build for binutils 2.38 or later Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-24 18:18:46 +08:00
Han Gao	1c1a707b48	feat: add maintain toolchains compile Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-06-24 18:18:46 +08:00
NekoRouter	7a1ebd4adb	Add HDMI I2S config From Sipeed, This should enable HDMI Audio	2023-06-14 19:20:55 +08:00
NekoRouter	b4474f7737	Add exfat config	2023-05-23 19:13:47 +08:00
Han Gao	bb4691fe55	chore: rename perf to perf-thead Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-05-10 16:56:06 +08:00
Han Gao	0fcd24710d	chore: add commit-id Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-05-10 16:31:59 +08:00
Han Gao	e495db816c	feat: ci build perf Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-05-10 16:31:59 +08:00
Icenowy Zheng	0b23488d7c	riscv: dts: thead: lpi4a: change fan PWM frequency The fan PWM is originally running at 1kHz, which leads to some annoying noise. Lower it to 100Hz now. Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2023-05-10 14:51:02 +08:00
Icenowy Zheng	f158bc369f	drm: verisilicon: fix fbcon Always map the GEM object, because it may expect different page attributes than the fixed map by kernel. Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2023-05-08 18:06:22 +08:00
Icenowy Zheng	a396c98059	drm/dc8200: disable gamma lut now It seems to have dependency issue. Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2023-05-08 18:06:22 +08:00
Han Gao	ca43e11e3d	fix: fix iotop not working Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-05-08 16:28:01 +08:00
Icenowy Zheng	135fd54dd3	riscv: dts: thead: lpi4a: really remove mipi screen The previous patch wrongly added again the code to be removed instead of really removing them. Fix this. Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2023-05-02 01:51:09 +08:00
Icenowy Zheng	493de61386	ci: run on pull requests Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2023-05-02 01:51:09 +08:00
Icenowy Zheng	3d7b6b56c3	riscv: defconfig: revyos: enable kernel PWM fan Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2023-05-02 01:51:09 +08:00
Icenowy Zheng	5d620ffde0	riscv: dts: thead: lpi4a: add PWM Fan Two trip points at 50C and 60C are added, for enabling the fan and making the fan full. Signed-off-by: Icenowy Zheng <uwu@icenowy.me>	2023-05-02 01:51:09 +08:00
Han Gao	2a5d72be62	Add kernel build ci Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-04-28 22:11:12 +08:00
Han Gao	8688f6fac3	remove mipi screen Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-04-28 21:20:45 +08:00
Mingzheng Xing	fba465199e	RISC-V: Enable container related kernel configs A new revyos_defconfig has been added to the arch riscv, enabling the kernel to support containers. All kernel configs have been verified through the testing script[1] provided by Docker. [1] https://github.com/moby/moby/blob/master/contrib/check-config.sh	2023-04-28 20:42:03 +08:00
Han Gao	7b352f5ac2	set cpu_max_frq 1.848GHz Signed-off-by: Han Gao <gaohan@iscas.ac.cn>	2023-04-12 03:05:33 +00:00
t61230	3a0e6fabe8	set cpu_max_frq 1.992GHz	2023-04-06 13:28:10 +08:00
t61230	5e2a0b4b3a	8G ddr	2023-04-06 13:28:05 +08:00
t61230	d01df48030	sync audio patch	2023-04-06 13:27:59 +08:00
t61230	29f55ef165	remove audio pcal9554b	2023-04-06 13:27:53 +08:00
t61230	3024960f77	cpufreq to 2GHz	2023-04-06 13:27:48 +08:00
t61230	e042a6fabe	pca9557	2023-04-06 13:27:42 +08:00