107 Commits

Author SHA1 Message Date
nekorouter
ac3b305def configs/light_lpi4a_cluster_16g_defconfig: fix typo
16gb -> 16g

Signed-off-by: nekorouter <nekorouter@outlook.com>
2025-09-03 19:07:53 +08:00
nekorouter
57fa274f6d ci: remove build mainline binarys command
since the only difference from "default build" and "mainline build" is the devicetree name,
and the devicetree name in default build has been updated, this is not needed.

Signed-off-by: nekorouter <nekorouter@outlook.com>
2025-08-13 16:32:47 +08:00
nekorouter
c1a95ddefe configs: update devicetree names
update devicetree filename to mainline-like format.

Signed-off-by: nekorouter <nekorouter@outlook.com>
2025-08-13 16:32:47 +08:00
SkyRain
93ff49d9f5 enable fan in uboot for meles 2025-03-17 05:54:24 +08:00
SkyRain
6278bac553 enable PWM fan in uboot for LPi4A 2025-03-17 05:54:24 +08:00
Han Gao
b5ee6e549a ci: update to actions/upload-artifact@v4
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
2025-02-05 13:32:07 +08:00
Han Gao
3d877f3648 Revert "Linux_SDK_V2.0.2"
This reverts commit 8942b2dce6.
2025-01-10 17:54:03 +08:00
LevitatingBusinessMan (Rein Fernhout)
68565d2855 use 0 instead of NULL in function returning int 2024-12-23 15:41:01 +08:00
LevitatingBusinessMan (Rein Fernhout)
72c738e9ce use cmd_tbl_t type 2024-12-23 15:41:01 +08:00
Lindsay Zhou
a46c283102 fix: implicit conversion and implicit function declaration errors on gcc14 2024-12-23 15:41:01 +08:00
Han Gao
71bb3b069e fix: set initrd_high for initrd size too big
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
2024-12-23 15:40:00 +08:00
devops_admin
8942b2dce6 Linux_SDK_V2.0.2
Signed-off-by: devops_admin <devops_admin@alibabacloud.com>
2024-12-23 15:40:00 +08:00
Han Gao
fc9575fa63 feat: add 8g emmc lpi4a som support
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
2024-07-21 02:01:37 +08:00
钦峰
4ca0f76729 add single/dual rank support
Change-Id: I633daa4a871f93c5b4d897b1d60ed23bcc198912
2024-07-21 00:29:20 +08:00
NekoRouter
660cb1b920 env: Add boot from usb 2024-07-21 00:19:51 +08:00
NekoRouter
f0e5c60169 ci: Add build for laptop4a and pocket4a 2024-07-16 21:25:44 +08:00
Lu
0248804ead configs: add plastic & pocket config file 2024-07-16 18:31:21 +08:00
Lu
7ce2d43f6b xhci: allow trans data on 0x0 2024-07-16 18:31:21 +08:00
Lu
dd138c76f8 th1520: enable usb host support 2024-07-16 18:31:21 +08:00
Haaland Chen
197c6cdccd ci: enable ci for DDR-16GB meles
Signed-off-by: Haaland Chen <haaland@milkv.io>
2024-07-06 19:14:03 +08:00
Haaland Chen
2a2c5264a5 configs: add DDR-16GB meles board
Signed-off-by: Haaland Chen <haaland@milkv.io>
2024-07-06 19:14:03 +08:00
Han Gao
96627087db meles: add aon config
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-05-29 16:21:44 +08:00
Han Gao
da9c7240ac Revert "fastboot: clean hibernate image when update uboot/kernel/rootfs partition"
This reverts commit 3a7b5088ee.
2024-05-29 16:21:44 +08:00
Han Gao
e6d25986dd ci: update toolchains
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-05-29 16:21:44 +08:00
xianbing Zhu
d2c6528890 fastboot: clean hibernate image when update uboot/kernel/rootfs partition
When update version,this commit erase normal hibernate image
and fastresume image.Before this,only fastresume image is erased.
This may caused issue when hibernate image saved before
update version.

Update one of uboot/kernel/rootfs will clean hibernate image.

Signed-off-by: xianbing Zhu <xianbing.zhu@linux.alibaba.com>
Change-Id: I92cd9ccda83f8d1e215e0f8d75e7cf34380a6201
2024-05-29 16:21:44 +08:00
钦峰
cefbf1d0ea 1:fix compile warning 2:add aon set magic
Change-Id: I511dc51ff71ae9567dcc0b6b91f6bcac1ae61f3b
2024-05-29 16:21:44 +08:00
Han Gao
c7e455caf5 th1520: SPL_TEXT_BASE=0xffe0000000 for nosign spl
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-05-29 16:21:44 +08:00
Han Gao
905fa2e762 sync config
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-05-29 16:21:44 +08:00
thead_admin
2674ac70e4 Linux_SDK_V1.5.4
Signed-off-by: thead_admin <occ_thead@service.alibaba.com>
2024-05-29 16:21:44 +08:00
Han Gao
e0247b8a62 fix: run gpt_partition failed
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-03-28 11:00:40 +00:00
Haaland Chen
2fc52cbb27 include: light-c910.h: add fdtoverlay_addr_r
Signed-off-by: Haaland Chen <haaland@milkv.io>
2024-03-27 04:06:40 -05:00
Han Gao
ce1890d0dc fix: remove find partuuid
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-03-24 06:57:04 -05:00
Han Gao
9893f1a2c0 feat: add sdcard boot first
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-03-24 06:57:04 -05:00
Haaland Chen
f80c918aa2 configs: meles: use new fdt default name
Since T-HEAD Linux SDK V1.4.2, modified the kernel device tree
naming rules, starting with th1520.

Signed-off-by: Haaland Chen <haaland@milkv.io>
2024-03-21 04:16:26 -05:00
Han Gao
69d7d3cda0 feat: add format swap partition for resume
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-31 20:52:36 +08:00
Han Gao
4529d8d50f Revert "fix(c9xx): don't flush dcache when invalidating"
This reverts commit adec30ace4.
2024-01-31 16:19:17 +08:00
Han Gao
74eca2553e feat: enable load str firmware
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-31 16:19:17 +08:00
Han Gao
f14addebf4 Add tag publish firmware
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-27 11:11:02 +00:00
Han Gao
9d7cb33654 fix error to written eth1addr
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-24 00:15:25 +08:00
Han Gao
5dd8bce935 ci: add lc4a mainline dt name support
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-24 00:00:18 +08:00
Han Gao
de8dcffdd9 ci: add mainline dt name support
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-24 00:00:18 +08:00
Han Gao
0060af48c1 workaround: add delay
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-22 15:55:16 +08:00
Han Gao
6935c50d54 config: enable BOARD_RNG_SEED
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-22 15:55:16 +08:00
Han Gao
5bd86ffd9d config: update ROW16 to DDP
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2024-01-22 15:55:16 +08:00
thead_admin
abe41ba65e Linux_SDK_V1.4.2
Signed-off-by: thead_admin <occ_thead@service.alibaba.com>
2024-01-22 15:55:16 +08:00
thead_admin
3e564f9f0c Linux_SDK_V1.3.3
Signed-off-by: thead_admin <occ_thead@service.alibaba.com>
2024-01-22 15:55:16 +08:00
Han Gao
34dd739d4c ci: add build for lcon4a & lc4a
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-12-26 17:08:20 +08:00
Lu Hui
1f45edb0fc defconfig: add light_lpi4a_[cluster|console]_defconfig 2023-12-26 17:08:20 +08:00
Lu Hui
f79d320ffa drivers: video: ilitek-ili9881c.c: add long delay panel reset 2023-12-26 17:08:20 +08:00
Lu Hui
e66283f0d5 arch: dts: light-lpi4a: allow pane0 ref by other dts 2023-12-26 17:08:20 +08:00
Lu Hui
d43b44b9a0 drivers: panel: add panel-mingjun-070bi30ia2 2023-12-26 17:08:20 +08:00
Han Gao
a455494040 ci: update toolchains
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-12-15 23:35:53 +08:00
Gilbert Gilb's
adec30ace4 fix(c9xx): don't flush dcache when invalidating
The data cache invalidation function for c9xx CPUs uses `dcache.cipa`
instruction. According to T-Head extension specification[1] section
3.1.5, this instruction also performs a cache clean along with the
invalidation.

On top of being incorrect, this leads to a serious issue on the
designware ethernet driver, where stalled cache may get flushed each
time we handle a new received packet[2]. As a result, received packet
are randomly corrupted with old cached data. This can easily be
reproduced by sending an ARP request to the device during a TFTP
transfer. The last TFTP block is treated as the ARP reply we just sent,
which makes U-Boot hang on the block.

Always use `dcache.ipa` instruction to invalidate dcache. Replace
existing usages of `dcache.ipa` with our implementation.

Note that this fix is slightly intrusive as it changes the cache
invalidation behavior in all drivers. However, I have not noticed any
side-effect during my tests.

[1] https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.3.0/xthead-2023-11-10-2.3.0.pdf

[2] 918a8c89e0/drivers/net/designware.c (L475)
2023-12-15 23:35:31 +08:00
Haaland Chen
7632089652 board: light-c910: update milkv meles iopin initialization status
Signed-off-by: Haaland Chen <haaland@milkv.io>
2023-12-13 14:04:27 +08:00
Han Gao
e76acfd716 ci: enable ci for meles 4g/8g
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-12-03 11:32:41 +08:00
Han Gao
0e64ba274e fix: set fdt_default_name for meles 4g/8g
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-12-03 11:32:41 +08:00
Haaland Chen
119bb8eaed configs: add milkv-meles singlerank ddr and dualrank ddr defconfig
Signed-off-by: Haaland Chen <haaland@milkv.io>
2023-12-03 11:32:41 +08:00
Haaland Chen
078bfd152e riscv: dts: milkv-meles: turn on blue user led
Signed-off-by: Haaland Chen <haaland@milkv.io>
2023-12-03 11:32:41 +08:00
Haaland Chen
b604779862 light-c910: set CONFIG_MISC_INIT_R
Signed-off-by: Haaland Chen <haaland@milkv.io>
2023-12-03 11:32:41 +08:00
Haaland Chen
253adbc8e9 board: light-c910: add function light_c910_set_gpio_output_high
Signed-off-by: Haaland Chen <haaland@milkv.io>
2023-12-03 11:32:41 +08:00
Haaland Chen
985e884b0b add Milk-V Meles board
Signed-off-by: Haaland Chen <haaland@milkv.io>
2023-12-03 11:32:41 +08:00
Han Gao
918a8c89e0 configs: fix default dtb file name
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-10-26 02:52:22 +08:00
Han Gao
79454e91bc chore: enable ci for beagle-ahead
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-10-20 13:38:37 +08:00
Han Gao
491776f3c1 chore: sync lpi4a config
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-10-20 13:38:37 +08:00
Deepak Khatri
24498fc55d Update cape header GPIO pinmuxing 2023-10-20 13:38:37 +08:00
Baozhu Zuo
146c2c2031 Modify GPIO default status for Beagle Bluetooth uart4 module 2023-10-20 13:38:37 +08:00
Deepak Khatri
bb72cf3a29 Fix SD boot button issue 2023-10-20 13:38:37 +08:00
Deepak Khatri
b24d63765c Update default mikroBus pinmuxing 2023-10-20 13:38:37 +08:00
Deepak Khatri
c7f2155100 Update debug port pinmux
To check if low drive strength is causing problem.
2023-10-20 13:38:37 +08:00
Deepak Khatri
3e7fb26cb0 Pinmux update: PullDown pins 2023-10-20 13:38:37 +08:00
Deepak Khatri
ce871ac516 Update BeagleV Ahead pinmuxing 2023-10-20 13:38:37 +08:00
Robert Nelson
798af1f1c5 backport of: [PATCH] cmd: pxe: add support for FDT overlays
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
2023-10-20 13:38:37 +08:00
Kory Maincent
cccf006cae pytest: add sandbox test for "extension" command
This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-20 13:38:37 +08:00
Kory Maincent
c86cc5402a cmd: add support for a new "extension" command
This patch adds a new "extension" command, which aims at detecting
extension boards connected to the hardware platform, and apply the
Device Tree overlays that describe the hardware present on those
extension boards.

In order to enable this mechanism, board-specific code must implement
the extension_board_scan() function that fills in a linked list of
"struct extension", each describing one extension board. In addition,
the board-specific code must select the SUPPORT_EXTENSION_SCAN Kconfig
boolean.

Based on this:

 - "extension scan" makes the generic code call the board-specific
   extension_board_scan() function to retrieve the list of detected
   extension boards.

 - "extension list" allows to list the detected extension boards.

 - "extension apply <number>|all" allows to apply the Device Tree
   overlay(s) corresponding to one, or all, extension boards

The latter requires two environment variables to exist and set one variable
to run:

 - extension_overlay_addr: the RAM address where to load the Device
   Tree overlays

 - extension_overlay_cmd: the U-Boot command to load one overlay.
   Indeed, the location and mechanism to load DT overlays is very setup
   specific.

 - extension_overlay_name: set by the command: the name of the DT which
   will be load during the execution.

When calling the command described in the extension_overlay_cmd
variable, the variable extension_overlay_name will be defined. So a
typical extension_overlay_cmd will look like this:

  extension_overlay_cmd=load mmc 0:1 $extension_overlay_addr /boot/$extension_overlay_name

Here is an example on how to use it:
=> run loadfdt
=> fdt addr $fdtaddr
=> setenv extension_overlay_addr 0x1000
=> setenv extension_overlay_cmd 'load mmc 0:1 ${extension_overlay_addr} /boot/${extension_overlay_name}'
=> extension scan
Found 1 extension board(s).
=> extension apply 0
519 bytes read in 3 ms (168.9 KiB/s)

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
2023-10-20 13:38:37 +08:00
Kory Maincent
5468ecbaf0 fdt_support: move fdt_valid from cmd_fdt.c to fdt_support.c
Move the fdt_valid function to fdt_support.
This changes allow to be able to test the validity of a devicetree in
other c files.

Update code syntax.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
2023-10-20 13:38:37 +08:00
Robert Nelson
4f8a362580 light_beagle_defconfig: enable CONFIG_OF_LIBFDT_OVERLAY=y
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
2023-10-20 13:38:37 +08:00
Robert Nelson
e6972d40e0 Modify_GPIO_default_status_for_Beagle_WIFI_BLE_module
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
2023-10-20 13:38:37 +08:00
Robert Nelson
44d2f2e746 light_beagle_defconfig: run savedefconfig
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
2023-10-20 13:38:37 +08:00
Han Gao
620420ad19 fix: ensure flashing img not to lose mac address
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-10-19 01:55:10 +08:00
Sean Anderson
a9ee746687 fastboot: Fix overflow when calculating chunk size
If a chunk was larger than 4GiB, then chunk_data_sz would overflow and
blkcnt would not be calculated correctly. Upgrade it to a u64 and cast
its multiplicands as well. Also fix bytes_written while we're at it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-10-19 00:15:40 +08:00
Lu Hui
8640db84b8 include: configs: light-c910.h: allow boot partition use other filesystem type 2023-09-03 01:40:15 +08:00
thead_admin
329e2581fe Linux_SDK_V1.2.1
Signed-off-by: thead_admin <occ_thead@service.alibaba.com>
2023-08-19 02:17:24 +08:00
Nekorouter
8337ee75f4 Update dtb name: add vendor name path to CONFIG_DEFAULT_FDT_FILE 2023-08-08 14:26:28 +08:00
Han Gao
a1d4fb05b7 chore: add ums gadget for light-val-a
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-08-02 02:58:25 +08:00
Han Gao
5de93f1630 chore: add 16g ci & modify SYS_PROMPT
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-08-02 02:58:25 +08:00
Icenowy Zheng
54c4a8493c add default fdt filenames
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Co-Authored-By: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-08-02 02:58:25 +08:00
Icenowy Zheng
5742f1a0d7 fix 16g dram print
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-08-02 02:58:25 +08:00
Icenowy Zheng
1957dccb60 add config for 16G board
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-08-02 02:58:25 +08:00
Icenowy Zheng
32c42cd31c add row16 option
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-08-02 02:58:25 +08:00
Han Gao
6fb1286862 fix: disable custom logo
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-30 04:05:47 +08:00
Han Gao
ea605b77cf feat: update SDK1.2.0
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-30 03:57:28 +08:00
Spacefish
abc7bb33e3 Typo in spl.c
Small typo in comment
2023-07-25 10:05:19 +08:00
Alexandre Ghiti
5316611f0d riscv: Fix build against binutils 2.38
The following description is copied from the equivalent patch for the
Linux Kernel proposed by Aurelien Jarno:

>From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei. As the kernel uses those instruction,
this causes the following build failure:

arch/riscv/cpu/mtrap.S: Assembler messages:
arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause'
arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc'
arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval'
arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0'

Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Christian Stewart <christian@paral.in>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-07-24 06:14:09 +08:00
Han Gao
a75631c2e3 fix: unknown CSR 'mhcr' (arch/riscv/cpu/c9xx/cpu.c)
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-24 06:14:09 +08:00
Han Gao
5532ffee67 feat: add gcc-12 build
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-24 06:14:09 +08:00
Han Gao
94a1ac2308 fix: save mac address
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-14 20:30:10 +08:00
Han Gao
0cc8176254 feat: update slogan
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-13 01:33:27 +08:00
Han Gao
b69e053b49 feat: add extlinux boot
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-12 21:57:40 +08:00
Han Gao
3e234eecd6 feat: add ruyisdk logo
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-12 03:54:52 +08:00
Han Gao
f81b413992 fix: repair check mac vaild timing
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-07-12 02:52:40 +08:00
chainsx
d43b782d70 fix: fix and add ums gadget(usb mass storage gadget) 2023-07-07 11:55:19 +08:00
wu-yue-yu
d6c9182f62 fix: fix the problem of wrong overwritten mac address 2023-06-28 01:15:58 +08:00
ztd
b5768043c2 fix: set fixed mac addrs (#1)
* fix: set fixed mac addr
2023-05-15 19:19:21 +08:00
Han Gao
57dbac41bd feat: add ci build
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-05-10 02:36:47 +08:00
Han Gao
403553d697 fix: ftbfs
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-05-10 02:25:53 +08:00
Han Gao
0fd098d190 fix: fix bootargs
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
2023-05-10 02:23:55 +08:00
t61230
09e2c3f93f ENV_SETTINGS 2023-04-06 13:34:05 +08:00
152 changed files with 4430 additions and 19646 deletions

135
.github/workflows/build.yml vendored Normal file
View File

@@ -0,0 +1,135 @@
name: thead-u-boot-build
on:
push:
tags:
- '*'
branches:
- '*'
pull_request:
workflow_dispatch:
schedule:
- cron: "0 2 * * *"
env:
xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395627867
toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1-20240115.tar.gz
mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2024.04.12
mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2024.04.12-nightly.tar.gz
wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
ARCH: riscv
CROSS_COMPILE: riscv64-unknown-linux-gnu-
jobs:
build:
strategy:
fail-fast: false
matrix:
name: [thead-gcc, gcc-13]
runs-on: ubuntu-22.04
steps:
- name: Install software
run: |
sudo apt update && \
sudo apt install -y gdisk dosfstools g++-12-riscv64-linux-gnu build-essential \
libncurses-dev gawk flex bison openssl libssl-dev tree \
dkms libelf-dev libudev-dev libpci-dev libiberty-dev autoconf device-tree-compiler
- name: Checkout uboot
uses: actions/checkout@v4
- name: uboot compile
run: |
mkdir output
if [[ ${{ matrix.name }} = "thead-gcc" ]]; then
${wget_alias} ${xuantie_toolchain}/${toolchain_file_name}
tar -xvf ${toolchain_file_name} -C /opt
export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1/bin:$PATH"
else
${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
tar -xvf ${mainline_toolchain_file_name} -C /opt
export PATH="/opt/riscv/bin:$PATH"
fi
${CROSS_COMPILE}gcc -v
pushd $PWD
make light_lpi4a_16g_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a-16g.bin
make clean
make light_lpi4a_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a.bin
make clean
make light_lpi4a_console_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lcon4a.bin
make clean
make light_lpi4a_console_16g_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lcon4a-16g.bin
make clean
make light_lpi4a_plastic_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-laptop4a.bin
make clean
make light_lpi4a_plastic_16g_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-laptop4a-16g.bin
make clean
make light_lpi4a_pocket_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-pocket4a.bin
make clean
make light_lpi4a_cluster_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lc4a.bin
make clean
make light_lpi4a_cluster_16g_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lc4a-16g.bin
make clean
make light_beagle_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-beagle.bin
make clean
make light_a_val_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-vala.bin
make clean
make light_milkv_meles_16g_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles-16g.bin
make clean
make light_milkv_meles_dualrank_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles.bin
make clean
make light_milkv_meles_singlerank_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-meles-4g.bin
# 8g emmc support
sed -i 's/name=swap,size=4096MiB,type=swap/name=swap,size=2MiB,type=swap/' include/configs/light-c910.h
make clean
make light_lpi4a_defconfig
make -j$(nproc)
find . -name "u-boot-with-spl.bin" | xargs -I{} cp -av {} ${GITHUB_WORKSPACE}/output/u-boot-with-spl-lpi4a_8gemmc.bin
popd
tree ${GITHUB_WORKSPACE}/output
- name: 'Upload Artifact'
uses: actions/upload-artifact@v4
with:
name: thead-u-uboot-${{ matrix.name }}
path: output/*.bin
retention-days: 30
- name: 'Create release by tag'
uses: softprops/action-gh-release@v1
if: ${{ startsWith(github.ref, 'refs/tags/') && matrix.name == 'thead-gcc' }}
with:
files: output/*.bin
token: ${{ secrets.GITHUB_TOKEN }}

View File

@@ -727,7 +727,6 @@ UBOOTINCLUDE := \
-I$(srctree)/arch/$(ARCH)/thumb1/include),) \
-I$(srctree)/arch/$(ARCH)/include \
$(if $(CONFIG_TARGET_LIGHT_C910), -I$(srctree)/lib/sec_library/include) \
$(if $(CONFIG_TARGET_LIGHT_C910), -I$(srctree)/lib/sec_library/include/soft_crypto) \
-include $(srctree)/include/linux/kconfig.h
NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
@@ -758,8 +757,6 @@ libs-y += drivers/net/phy/
libs-y += drivers/power/ \
drivers/power/domain/ \
drivers/power/fuel_gauge/ \
drivers/power/charge/ \
drivers/mcu/ \
drivers/power/mfd/ \
drivers/power/pmic/ \
drivers/power/battery/ \

View File

@@ -119,6 +119,7 @@ config SANDBOX
select SPI
select SUPPORT_OF_CONTROL
select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
select SUPPORT_EXTENSION_SCAN
imply BITREVERSE
select BLOBLIST
imply CMD_DM
@@ -152,6 +153,7 @@ config SANDBOX
imply PHYLIB
imply DM_MDIO
imply DM_MDIO_MUX
imply CMD_EXTENSION
config SH
bool "SuperH architecture"

View File

@@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
CMODEL = medany
endif
ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
# Newer binutils versions default to ISA spec version 20191213 which moves some
# instructions from the I extension to the Zicsr and Zifencei extensions.
toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
ifeq ($(toolchain-need-zicsr-zifencei),y)
RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
endif
ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
-mcmodel=$(CMODEL)
PLATFORM_CPPFLAGS += $(ARCH_FLAGS)

View File

@@ -125,10 +125,11 @@ void icache_enable(void)
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_SPL_RISCV_MMODE
#ifdef CONFIG_TARGET_LIGHT_C910
// mhcr is 0x7c1
asm volatile (
"csrr x29, mhcr\n\t"
"csrr x29, 0x7c1\n\t"
"ori x28, x29, 0x1\n\t"
"csrw mhcr, x28\n\t"
"csrw 0x7c1, x28\n\t"
);
#endif
#endif
@@ -141,9 +142,9 @@ void dcache_enable(void)
#ifdef CONFIG_SPL_RISCV_MMODE
#ifdef CONFIG_TARGET_LIGHT_C910
asm volatile (
"csrr x29, mhcr\n\t"
"ori x28, x29, 0x2\n\t"
"csrw mhcr, x28\n\t"
"csrr x29, 0x7c1\n\t"
"ori x28, x29, 0x2\n\t"
"csrw 0x7c1, x28\n\t"
);
#endif
#endif

View File

@@ -5,7 +5,8 @@ dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
dtb-$(CONFIG_TARGET_ICE_C910) += ice-c910.dtb
dtb-$(CONFIG_TARGET_LIGHT_EVB_MPW_C910) += light-evb-mpw-c910.dtb
dtb-$(CONFIG_TARGET_LIGHT_FPGA_FM_C910) += light-fpga-fm-c910.dtb
dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb th1520-rvbook.dtb
dtb-$(CONFIG_TARGET_LIGHT_C910) += light-a-ref.dtb light-b-ref.dtb light-a-val.dtb light-b-product.dtb light-a-product.dtb light-ant-ref.dtb light-beagle.dtb light-b-power.dtb light-lpi4a.dtb light-milkv-meles.dtb
dtb-$(CONFIG_TARGET_LIGHT_C910) += light-lpi4a-laptop.dtb
targets += $(dtb-y)

View File

@@ -312,7 +312,7 @@
tpm@0{
compatible = "z32h330tc,z32h330tc-spi";
reg = <0>;
spi-max-frequency = <20000000>;
spi-max-frequency = <40000000>;
};
};

View File

@@ -0,0 +1,46 @@
#include "light-lpi4a.dts"
/ {
};
&i2c1 {
clock-frequency = <400000>;
status = "okay";
pcal6408ahk_c: gpio@20 {
compatible = "nxp,pca9557";
reg = <0x18>;
gpio-controller;
#gpio-cells = <2>;
};
};
&i2c3 {
clock-frequency = <400000>;
status = "okay";
pcal6408ahk_d: gpio@20 {
compatible = "nxp,pca9557";
reg = <0x18>;
gpio-controller;
#gpio-cells = <2>;
};
};
&lcd_backlight {
pwms = <&pwm 0 50000>;
brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
default-brightness-level = <2>;
};
&panel0 {
compatible = "ilitek,ili9881c";
status = "okay";
backlight = <&lcd_backlight>;
// 5v power cycle
// TODO: move into regulator
reset-gpios = <&pcal6408ahk_c 0 0>; /* active low */
/delete-property/ lcd-en-gpios;
/delete-property/ lcd-bias-en-gpios;
};

View File

@@ -8,6 +8,10 @@
#address-cells = <2>;
#size-cells = <2>;
config {
huben-gpio = <&gpio1_porta 16 0>;
};
memory@0 {
device_type = "memory";
reg = <0x0 0xc0000000 0x0 0x40000000>;
@@ -489,7 +493,7 @@
default-brightness-level = <7>;
};
jadard_jd9365da {
panel0: dsi_panel0 {
compatible = "jadard,jd9365da-h3";
backlight = <&lcd_backlight>;
reset-gpio = <&pcal6408ahk_d 7 0>;

View File

@@ -0,0 +1,655 @@
/dts-v1/;
#include <dt-bindings/pmic/light_pmic.h>
/ {
model = "Milk-V Meles";
compatible = "milkv,meles", "thead,c910_light";
#address-cells = <2>;
#size-cells = <2>;
config {
select-gpio = <&gpio1_porta 16 0>; // Enable the blue LED on Milk-V Meles
fan-gpio = <&gpio2_porta 4 0>; // Enable the fan on Milk-V Meles, see schematic for details
};
memory@0 {
device_type = "memory";
reg = <0x0 0xc0000000 0x0 0x40000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
timebase-frequency = <3000000>;
u-boot,dm-pre-reloc;
cpu@0 {
device_type = "cpu";
reg = <0>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcvsu";
mmu-type = "riscv,sv39";
u-boot,dm-pre-reloc;
};
};
soc {
#address-cells = <2>;
#size-cells = <2>;
compatible = "simple-bus";
ranges;
u-boot,dm-pre-reloc;
intc: interrupt-controller@ffd8000000 {
compatible = "riscv,plic0";
reg = <0xff 0xd8000000 0x0 0x04000000>;
status = "disabled";
};
dummy_apb: apb-clock {
compatible = "fixed-clock";
clock-frequency = <62500000>;
clock-output-names = "dummy_apb";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_ahb: ahb-clock {
compatible = "fixed-clock";
clock-frequency = <250000000>;
clock-output-names = "core";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_spi: spi-clock {
compatible = "fixed-clock";
clock-frequency = <396000000>;
clock-output-names = "dummy_spi";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_qspi0: qspi0-clock {
compatible = "fixed-clock";
clock-frequency = <792000000>;
clock-output-names = "dummy_qspi0";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_uart_sclk: uart-sclk-clock {
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "dummy_uart_sclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_i2c_icclk: i2c-icclk-clock {
compatible = "fixed-clock";
clock-frequency = <50000000>;
clock-output-names = "dummy_i2c_icclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_dpu_pixclk: dpu-pix-clock {
compatible = "fixed-clock";
clock-frequency = <74250000>;
clock-output-names = "dummy_dpu_pixclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_dphy_refclk: dphy-ref-clock {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "dummy_dpu_refclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
serial@ffe7014000 {
compatible = "snps,dw-apb-uart";
reg = <0xff 0xe7014000 0x0 0x400>;
clocks = <&dummy_uart_sclk>;
clock-frequency = <100000000>;
clock-names = "baudclk";
reg-shift = <2>;
reg-io-width = <4>;
u-boot,dm-pre-reloc;
};
gmac0: ethernet@ffe7070000 {
compatible = "snps,dwmac";
reg = <0xff 0xe7070000 0x0 0x2000>;
clocks = <&dummy_apb>;
clock-names = "stmmaceth";
snps,pbl = <32>;
snps,fixed-burst;
phy-mode = "rgmii-id";
phy-handle = <&phy_88E1111_a>;
status = "okay";
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy_88E1111_a: ethernet-phy@1 {
reg = <0x1>;
};
};
};
emmc: sdhci@ffe7080000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7080000 0x0 0x10000>;
index = <0x0>;
clocks = <&dummy_ahb>;
clock-frequency = <198000000>;
clock-names = "core";
max-frequency = <198000000>;
sdhci-caps-mask = <0x0 0x1000000>;
mmc-hs400-1_8v;
non-removable;
no-sdio;
no-sd;
bus-width = <8>;
voltage= "1.8v";
pull_up;
io_fixed_1v8;
fifo-mode;
u-boot,dm-pre-reloc;
};
sdhci0: sd@ffe7090000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7090000 0x0 0x10000>;
index = <0x1>;
clocks = <&dummy_ahb>;
clock-frequency = <198000000>;
max-frequency = <198000000>;
sd-uhs-sdr104;
pull_up;
clock-names = "core";
bus-width = <4>;
voltage= "3.3v";
};
gpio2: gpio@ffe7f34000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f34000 0x0 0x1000>;
clocks = <&dummy_apb>;
#address-cells = <1>;
#size-cells = <0>;
gpio2_porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <32>;
reg = <0>;
};
};
gpio0: gpio@ffec005000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec005000 0x0 0x1000>;
clocks = <&dummy_apb>;
#address-cells = <1>;
#size-cells = <0>;
gpio0_porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <32>;
reg = <0>;
};
};
gpio1: gpio@ffec006000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec006000 0x0 0x1000>;
clocks = <&dummy_apb>;
#address-cells = <1>;
#size-cells = <0>;
gpio1_porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <32>;
reg = <0>;
};
};
axiscr {
compatible = "thead,axiscr";
reg = <0xff 0xff004000 0x0 0x1000>;
lock-read = "okay";
lock-write = "okay";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
axiscr0: axisrc@0 {
device_type = "axiscr";
region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
axiscr1: axisrc@1 {
device_type = "axiscr";
region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
axiscr2: axisrc@2 {
device_type = "axiscr";
region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
};
axiparity {
compatible = "thead,axiparity";
reg = <0xff 0xff00c000 0x0 0x1000>;
lock = "okay";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
axiparity0: axiparity@0 {
device_type = "axiparity";
region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
axiparity1: axiparity@1 {
device_type = "axiparity";
region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
};
aon {
compatible = "thead,light-aon";
status = "okay";
wakeup-by-gpio-on;
wakeup-by-rtc-on;
pd: light-aon-pd {
compatible = "thead,light-aon-pd";
#power-domain-cells = <1>;
};
light-regu-reg {
compatible = "thead,light-dialog-pmic";
status = "okay";
soc_dvdd18_aon_reg: soc_dvdd18_aon {
regulator-name = "soc_dvdd18_aon";
regulator-boot-on;
regulator-always-on;
};
soc_avdd33_usb3_reg: soc_avdd33_usb3 {
regulator-name = "soc_avdd33_usb3";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_aon_reg: soc_dvdd08_aon {
regulator-name = "soc_dvdd08_aon";
regulator-boot-on;
regulator-always-on;
};
soc_apcpu_dvdd_dvddm_reg: soc_apcpu_dvdd_dvddm {
regulator-name = "soc_apcpu_dvdd_dvddm";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1570000>;
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
regulator-name = "soc_dvdd08_ddr";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
regulator-name = "soc_vdd_ddr_1v8";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
regulator-name = "soc_vdd_ddr_1v1";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
regulator-name = "soc_vdd_ddr_0v6";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd18_ap_reg: soc_dvdd18_ap {
regulator-name = "soc_dvdd18_ap";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_ap_reg: soc_dvdd08_ap {
regulator-name = "soc_dvdd08_ap";
regulator-boot-on;
regulator-always-on;
};
soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
regulator-name = "soc_avdd08_mipi_hdmi";
regulator-boot-on;
regulator-always-on;
};
soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
regulator-name = "soc_avdd18_mipi_hdmi";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
regulator-name = "soc_dvdd33_emmc";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
regulator-name = "soc_vdd18_emmc";
regulator-boot-on;
regulator-always-on;
};
soc_dovdd18_scan_reg: soc_dovdd18_scan {
regulator-name = "soc_dovdd18_scan";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
soc_vext_2v8_reg: soc_vext_2v8 {
regulator-name = "soc_vext_2v8";
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dvdd12_scan_reg: soc_dvdd12_scan {
regulator-name = "soc_dvdd12_scan";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
regulator-name = "soc_avdd28_scan_en";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
soc_avdd28_rgb_reg: soc_avdd28_rgb {
regulator-name = "soc_avdd28_rgb";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <3475000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
regulator-name = "soc_dovdd18_rgb";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
regulator-name = "soc_dvdd12_rgb";
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1675000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_avdd25_ir_reg: soc_avdd25_ir {
regulator-name = "soc_avdd25_ir";
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <3475000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dovdd18_ir_reg: soc_dovdd18_ir {
regulator-name = "soc_dovdd18_ir";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
soc_dvdd12_ir_reg: soc_dvdd12_ir {
regulator-name = "soc_dvdd12_ir";
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1675000>;
regulator-boot-on;
regulator-always-on;
status = "disabled";
};
};
aon_pmic_config {
compatible = "thead,light-pmic-conf";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
iic-config = <0 0 2>;
pmic_dev_0: pmic-dev@0 {
pmic-name = "dialog,da9063,v1";
pmic-addr = <0x5a 0x5b>;
pmic_wdt_on;
status = "okay";
};
pmic_dev_1: pmic-dev@1 {
pmic-name = "dialog,da9121,v1";
pmic-addr = <0x68>;
status = "okay";
};
regu_config_0 {
reg_info = <&soc_dvdd18_aon_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO3>;
};
};
regu_config_1 {
reg_info = <&soc_avdd33_usb3_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO9>;
};
};
regu_config_2 {
reg_info = <&soc_dvdd08_aon_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO2>;
};
};
regu_config_3 {
reg_info = <&soc_apcpu_dvdd_dvddm_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE1>;
auto_on_info = <0 0 800000>;
};
regu_id@1 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE2>;
auto_on_info = <1 0 800000>;
};
regu_id@2 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKIO>;
auto_on_info = <2 0 800000>;
};
coupling_info@0 {
negative-min;
info = <0 2 5 30>;
};
coupling_info@1 {
negative-min;
info = <1 2 5 30>;
};
};
regu_config_4 {
reg_info = <&soc_dvdd08_ddr_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPERI>;
};
};
regu_config_5 {
reg_info = <&soc_vdd_ddr_1v8_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO4>;
};
};
regu_config_6 {
reg_info = <&soc_vdd_ddr_1v1_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKMEM>;
};
};
regu_config_7 {
reg_info = <&soc_vdd_ddr_0v6_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPRO>;
};
};
regu_config_8 {
reg_info = <&soc_dvdd18_ap_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO11>;
};
};
regu_config_9 {
reg_info = <&soc_avdd08_mipi_hdmi_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO1>;
};
};
regu_config_10 {
reg_info = <&soc_avdd18_mipi_hdmi_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO5>;
};
};
regu_config_11 {
reg_info = <&soc_dvdd33_emmc_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO10>;
};
};
regu_config_12 {
reg_info = <&soc_dovdd18_scan_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO6>;
auto_on_info = <3 1 1800000>;
auto_off_info = <1 1>;
};
};
regu_config_13 {
reg_info = <&soc_dvdd12_scan_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO8>;
auto_on_info = <4 1 1200000>;
auto_off_info = <2 1>;
};
};
regu_config_14 {
reg_info = <&soc_avdd28_scan_en_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO7>;
auto_on_info = <5 1 2800000>;
auto_off_info = <0 1>;
};
};
regu_config_15 {
reg_info = <&soc_dvdd08_ap_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_1 DA9121_ID_BUCK1>;
parent_pmic_dev = <&pmic_dev_0 2 0>;
};
};
regu_config_16 {
reg_info = <&soc_dvdd18_emmc_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_GPIO7>;
parent_pmic_dev = <&pmic_dev_0 7 0>;
};
};
};
};
};
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = "/soc/serial@ffe7014000:115200";
};
};

View File

@@ -1,947 +0,0 @@
/dts-v1/;
#include <dt-bindings/usb/pd.h>
#include <dt-bindings/pmic/light_pmic.h>
/ {
model = "T-HEAD c910 light";
compatible = "thead,c910_light";
#address-cells = <2>;
#size-cells = <2>;
charge-animation {
compatible = "rockchip,uboot-charge";
uboot-low-power-voltage = <7300>;
powerkey-gpio= <&ao_gpio_porta 6 0>;
status = "okay";
};
leds {
status = "okay";
compatible = "gpio-leds";
red-led {
gpios = <&gpio1_porta 14 0>; // GPIO_ACTIVE_HIGH: 0
label = "battery_charging";
default-state = "off";
};
green-led {
gpios = <&gpio1_porta 13 0>; // GPIO_ACTIVE_HIGH: 0
label = "battery_full";
default-state = "off";
};
blue-led {
gpios = <&gpio1_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
label = "battery_start";
default-state = "off";
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0xc0000000 0x0 0x40000000>;
};
aliases {
spi0 = &spi0;
spi1 = &qspi0;
spi2 = &qspi1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
timebase-frequency = <3000000>;
u-boot,dm-pre-reloc;
cpu@0 {
device_type = "cpu";
reg = <0>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcvsu";
mmu-type = "riscv,sv39";
u-boot,dm-pre-reloc;
};
};
soc {
#address-cells = <2>;
#size-cells = <2>;
compatible = "simple-bus";
ranges;
u-boot,dm-pre-reloc;
intc: interrupt-controller@ffd8000000 {
compatible = "riscv,plic0";
reg = <0xff 0xd8000000 0x0 0x04000000>;
status = "disabled";
};
dummy_apb: apb-clock {
compatible = "fixed-clock";
clock-frequency = <62500000>;
clock-output-names = "dummy_apb";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_ahb: ahb-clock {
compatible = "fixed-clock";
clock-frequency = <250000000>;
clock-output-names = "core";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_spi: spi-clock {
compatible = "fixed-clock";
clock-frequency = <396000000>;
clock-output-names = "dummy_spi";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_qspi0: qspi0-clock {
compatible = "fixed-clock";
clock-frequency = <792000000>;
clock-output-names = "dummy_qspi0";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_uart_sclk: uart-sclk-clock {
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "dummy_uart_sclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_i2c_icclk: i2c-icclk-clock {
compatible = "fixed-clock";
clock-frequency = <50000000>;
clock-output-names = "dummy_i2c_icclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_dpu_pixclk: dpu-pix-clock {
compatible = "fixed-clock";
clock-frequency = <74250000>;
clock-output-names = "dummy_dpu_pixclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
dummy_dphy_refclk: dphy-ref-clock {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "dummy_dpu_refclk";
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
i2c0: i2c@ffe7f20000 {
compatible = "snps,designware-i2c";
reg = <0xff 0xe7f20000 0x0 0x4000>;
clocks = <&dummy_i2c_icclk>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
usbc0: husb311_0@4e {
compatible = "hynetek,husb311";
int-n-gpios = <&gpio3_porta 10 1>;
reg = <0x4e>;
status = "okay";
usb_con0: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
sink-pdos =
<PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
PDO_FIXED(9000, 3000, PDO_FIXED_USB_COMM)
PDO_FIXED(12000, 3000, PDO_FIXED_USB_COMM)>;
op-sink-microwatt = <10000000>;
};
};
cw2015@62 {
clock-frequency = <100000>;
status = "okay";
compatible = "cellwise,cw2015";
reg = <0x62>;
cellwise,battery-profile = /bits/ 8
<0x17 0x67 0x66 0x65 0x64 0x63 0x61 0x5E
0x52 0x6D 0x4D 0x58 0x5B 0x51 0x44 0x3B
0x33 0x2C 0x26 0x23 0x24 0x29 0x34 0x42
0x49 0x16 0x0E 0xB8 0x3D 0x5D 0x68 0x7D
0x78 0x75 0x7B 0x7A 0x3F 0x18 0x82 0x48
0x09 0x4A 0x1A 0x47 0x86 0x93 0x97 0x15
0x49 0x71 0x9A 0xC3 0x80 0x41 0x4F 0xCB
0x2F 0x00 0x64 0xA5 0xB5 0x0D 0xB8 0x91>;
cellwise,monitor-interval-ms = <5000>;
cellwise,dual-cell = <1>;
};
bq25703: bq25703@6b {
status = "okay";
compatible = "ti,bq25703";
reg = <0x6b>;
typec0-enable-gpios = <&gpio3_porta 13 0>; //CHG_PATH_SEL0_180
typec1-enable-gpios = <&gpio3_porta 12 0>; //CHG_PATH_SEL1_180
ti,charge-current = <2500000>;
ti,max-input-voltage = <5000000>;
ti,input-current = <2000000>;
};
};
i2c1: i2c@ffe7f24000{
compatible = "snps,designware-i2c";
reg = <0xff 0xe7f24000 0x0 0x4000>;
clocks = <&dummy_i2c_icclk>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
mcu_hc32fx:mcu-hc32fx@0x4c {
status = "okay";
compatible = "mcu_hc32fx";
reg = <0x4c>;
};
usbc1: husb311_1@4e {
compatible = "hynetek,husb311";
int-n-gpios = <&gpio1_porta 5 1>;
reg = <0x4e>;
status = "okay";
usb_con1: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
sink-pdos =
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
PDO_FIXED(9000, 3000, PDO_FIXED_USB_COMM)
PDO_FIXED(12000, 3000, PDO_FIXED_USB_COMM)>;
op-sink-microwatt = <10000000>;
};
};
};
i2c2: i2c@ffec00c000{
compatible = "snps,designware-i2c";
reg = <0xff 0xec00c000 0x0 0x4000>;
clocks = <&dummy_i2c_icclk>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c3: i2c@ffec014000{
compatible = "snps,designware-i2c";
reg = <0xff 0xec014000 0x0 0x4000>;
clocks = <&dummy_i2c_icclk>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c4: i2c@ffe7f28000{
compatible = "snps,designware-i2c";
reg = <0xff 0xe7f28000 0x0 0x4000>;
clocks = <&dummy_i2c_icclk>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
pcal6408ahk_a: gpio@20 {
compatible = "nxp,pca9554";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
};
};
i2c5: i2c@fff7f2c000{
compatible = "snps,designware-i2c";
reg = <0xff 0xf7f2c000 0x0 0x4000>;
clocks = <&dummy_i2c_icclk>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
};
serial@ffe7014000 {
compatible = "snps,dw-apb-uart";
reg = <0xff 0xe7014000 0x0 0x400>;
clocks = <&dummy_uart_sclk>;
clock-frequency = <100000000>;
clock-names = "baudclk";
reg-shift = <2>;
reg-io-width = <4>;
u-boot,dm-pre-reloc;
};
gmac0: ethernet@ffe7070000 {
compatible = "snps,dwmac";
reg = <0xff 0xe7070000 0x0 0x2000>;
clocks = <&dummy_apb>;
clock-names = "stmmaceth";
snps,pbl = <32>;
snps,fixed-burst;
phy-mode = "rgmii-id";
phy-handle = <&phy_88E1111_a>;
status = "disabled";
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy_88E1111_a: ethernet-phy@1 {
reg = <0x1>;
};
phy_88E1111_b: ethernet-phy@2 {
reg = <0x2>;
};
};
};
gmac1: ethernet@ffe7060000 {
compatible = "snps,dwmac";
reg = <0xff 0xe7060000 0x0 0x2000>;
clocks = <&dummy_apb>;
clock-names = "stmmaceth";
snps,pbl = <32>;
snps,fixed-burst;
phy-mode = "rgmii-id";
phy-handle = <&phy_88E1111_b>;
status = "disabled";
};
emmc: sdhci@ffe7080000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7080000 0x0 0x10000>;
index = <0x0>;
clocks = <&dummy_ahb>;
clock-frequency = <198000000>;
clock-names = "core";
max-frequency = <198000000>;
sdhci-caps-mask = <0x0 0x1000000>;
mmc-hs400-1_8v;
non-removable;
no-sdio;
no-sd;
bus-width = <8>;
voltage= "1.8v";
pull_up;
io_fixed_1v8;
fifo-mode;
u-boot,dm-pre-reloc;
};
sdhci0: sd@ffe7090000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xff 0xe7090000 0x0 0x10000>;
index = <0x1>;
clocks = <&dummy_ahb>;
clock-frequency = <198000000>;
max-frequency = <198000000>;
sd-uhs-sdr104;
pull_up;
clock-names = "core";
bus-width = <4>;
voltage= "3.3v";
};
qspi0: spi@ffea000000 {
compatible = "snps,dw-apb-ssi-quad";
reg = <0xff 0xea000000 0x0 0x1000>;
clocks = <&dummy_qspi0>;
num-cs = <1>;
cs-gpio = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
spi-max-frequency = <100000000>;
#address-cells = <1>;
#size-cells =<0>;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
reg = <0>;
};
};
qspi1: spi@fff8000000 {
compatible = "snps,dw-apb-ssi-quad";
reg = <0xff 0xf8000000 0x0 0x1000>;
clocks = <&dummy_spi>;
num-cs = <1>;
cs-gpio = <&gpio0_porta 1 0>; // GPIO_ACTIVE_HIGH: 0
spi-max-frequency = <66000000>;
#address-cells = <1>;
#size-cells =<0>;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
reg = <0>;
};
};
spi0: spi@ffe700c000 {
compatible = "snps,dw-apb-ssi";
reg = <0xff 0xe700c000 0x0 0x1000>;
clocks = <&dummy_spi>;
cs-gpio = <&gpio2_porta 15 0>;
spi-max-frequency = <100000000>;
#address-cells = <1>;
#size-cells = <0>;
tpm@0{
compatible = "z32h330tc,z32h330tc-spi";
reg = <0>;
spi-max-frequency = <22000000>;
};
};
gpio2: gpio@ffe7f34000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f34000 0x0 0x1000>;
clocks = <&dummy_apb>;
#address-cells = <1>;
#size-cells = <0>;
gpio2_porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <32>;
reg = <0>;
};
};
gpio3: gpio@ffe7f38000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f38000 0x0 0x1000>;
clocks = <&dummy_apb>;
#address-cells = <1>;
#size-cells = <0>;
gpio3_porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <32>;
reg = <0>;
};
};
gpio0: gpio@ffec005000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec005000 0x0 0x1000>;
clocks = <&dummy_apb>;
#address-cells = <1>;
#size-cells = <0>;
gpio0_porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <32>;
reg = <0>;
};
};
ao_gpio: gpio@fffff41000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff41000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
ao_gpio_porta: ao_gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
nr-gpios-snps = <32>;
reg = <0>;
};
};
gpio1: gpio@ffec006000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec006000 0x0 0x1000>;
clocks = <&dummy_apb>;
#address-cells = <1>;
#size-cells = <0>;
gpio1_porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <32>;
reg = <0>;
};
};
pwm: pwm@ffec01c000 {
compatible = "thead,pwm-light";
reg = <0xff 0xec01c000 0x0 0x4000>;
#pwm-cells = <2>;
};
dsi_regs: dsi-controller@ffef500000 {
compatible = "thead,light-dsi-regs", "syscon";
reg = <0xff 0xef500000 0x0 0x10000>;
status = "okay";
};
vosys_regs: vosys@ffef528000 {
compatible = "thead,light-vo-subsys", "syscon";
reg = <0xff 0xef528000 0x0 0x1000>;
status = "okay";
};
dpu: dc8200@ffef600000 {
compatible = "verisilicon,dc8200";
reg = <0xff 0xef600000 0x0 0x100>;
};
axiscr {
compatible = "thead,axiscr";
reg = <0xff 0xff004000 0x0 0x1000>;
lock-read = "okay";
lock-write = "okay";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
axiscr0: axisrc@0 {
device_type = "axiscr";
region = <0x00 0x00000000 0x00 0x80000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
axiscr1: axisrc@1 {
device_type = "axiscr";
region = <0x00 0x80000000 0x00 0x80000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
axiscr2: axisrc@2 {
device_type = "axiscr";
region = <0x01 0x00000000 0x00 0x80000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
};
axiparity {
compatible = "thead,axiparity";
reg = <0xff 0xff00c000 0x0 0x1000>;
lock = "okay";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
axiparity0: axiparity@0 {
device_type = "axiparity";
region = <0x00 0x00000000 0x01 0x0000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
axiparity1: axiparity@1 {
device_type = "axiparity";
region = <0x01 0x00000000 0x01 0x00000000>; // 4KB align
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
};
};
dsi_bridge: dsi-bridge {
compatible = "thead,light-dsi-bridge";
clocks = <&dummy_dpu_pixclk>;
clock-names = "pix-clk";
phys = <&dsi_dphy>;
phy-names = "dphy";
};
dsi_host: dsi-host {
compatible = "synopsys,dw-mipi-dsi";
regmap = <&dsi_regs>;
status = "okay";
};
dsi_dphy: dsi-dphy {
compatible = "synopsys,dw-dphy";
regmap = <&dsi_regs>;
vosys-regmap = <&vosys_regs>;
clocks = <&dummy_dpu_pixclk>, <&dummy_dphy_refclk>;
clock-names = "pix-clk", "ref-clk";
#phy-cells = <0>;
status = "okay";
};
lcd_backlight: pwm-backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
};
ili9881c_panel {
status = "disabled";
compatible = "ilitek,ili9881c";
backlight = <&lcd_backlight>;
reset-gpios = <&gpio1_porta 5 1>; /* active low */
lcd-en-gpios = <&pcal6408ahk_a 2 0>; /* active high */
lcd-bias-en-gpios = <&pcal6408ahk_a 4 0>;/* active high */
};
aon {
compatible = "thead,light-aon";
status = "okay";
wakeup-by-gpio-on;
wakeup-by-rtc-on;
pd: light-aon-pd {
compatible = "thead,light-aon-pd";
#power-domain-cells = <1>;
};
light-regu-reg {
compatible = "thead,light-dialog-pmic";
status = "okay";
soc_dvdd18_aon_reg: soc_dvdd18_aon {
regulator-name = "soc_dvdd18_aon";
regulator-boot-on;
regulator-always-on;
};
soc_avdd33_usb3_reg: soc_avdd33_usb3 {
regulator-name = "soc_avdd33_usb3";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_aon_reg: soc_dvdd08_aon {
regulator-name = "soc_dvdd08_aon";
regulator-boot-on;
regulator-always-on;
};
soc_apcpu_dvdd_dvddm_reg: soc_apcpu_dvdd_dvddm {
regulator-name = "soc_apcpu_dvdd_dvddm";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1570000>;
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
regulator-name = "soc_dvdd08_ddr";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
regulator-name = "soc_vdd_ddr_1v8";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
regulator-name = "soc_vdd_ddr_1v1";
regulator-boot-on;
regulator-always-on;
};
soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
regulator-name = "soc_vdd_ddr_0v6";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd18_ap_reg: soc_dvdd18_ap {
regulator-name = "soc_dvdd18_ap";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd08_ap_reg: soc_dvdd08_ap {
regulator-name = "soc_dvdd08_ap";
regulator-boot-on;
regulator-always-on;
};
soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
regulator-name = "soc_avdd08_mipi_hdmi";
regulator-boot-on;
regulator-always-on;
};
soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
regulator-name = "soc_avdd18_mipi_hdmi";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
regulator-name = "soc_dvdd33_emmc";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
regulator-name = "soc_vdd18_emmc";
regulator-boot-on;
regulator-always-on;
};
soc_dovdd18_scan_reg: soc_dovdd18_scan {
regulator-name = "soc_dovdd18_scan";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
soc_vext_2v8_reg: soc_vext_2v8 {
regulator-name = "soc_vext_2v8";
regulator-boot-on;
regulator-always-on;
};
soc_dvdd12_scan_reg: soc_dvdd12_scan {
regulator-name = "soc_dvdd12_scan";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
regulator-name = "soc_avdd28_scan_en";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
aon_pmic_config {
compatible = "thead,light-pmic-conf";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
iic-config = <0 0 2>;
pmic_dev_0: pmic-dev@0 {
pmic-name = "dialog,da9063,v1";
pmic-addr = <0x5a 0x5b>;
pmic_wdt_on;
status = "okay";
};
pmic_dev_1: pmic-dev@1 {
pmic-name = "dialog,da9121,v1";
pmic-addr = <0x68>;
status = "okay";
};
regu_config_0 {
reg_info = <&soc_dvdd18_aon_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO3>;
};
};
regu_config_1 {
reg_info = <&soc_avdd33_usb3_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO9>;
};
};
regu_config_2 {
reg_info = <&soc_dvdd08_aon_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO2>;
};
};
regu_config_3 {
reg_info = <&soc_apcpu_dvdd_dvddm_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE1>;
auto_on_info = <0 0 800000>;
};
regu_id@1 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BCORE2>;
auto_on_info = <1 0 800000>;
};
regu_id@2 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKIO>;
auto_on_info = <2 0 800000>;
};
coupling_info@0 {
negative-min;
info = <0 2 5 30>;
};
coupling_info@1 {
negative-min;
info = <1 2 5 30>;
};
};
regu_config_4 {
reg_info = <&soc_dvdd08_ddr_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPERI>;
};
};
regu_config_5 {
reg_info = <&soc_vdd_ddr_1v8_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO4>;
};
};
regu_config_6 {
reg_info = <&soc_vdd_ddr_1v1_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKMEM>;
};
};
regu_config_7 {
reg_info = <&soc_vdd_ddr_0v6_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_BUCKPRO>;
};
};
regu_config_8 {
reg_info = <&soc_dvdd18_ap_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO11>;
};
};
regu_config_9 {
reg_info = <&soc_dvdd08_ap_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_1 DA9121_ID_BUCK1>;
parent_pmic_dev = <&pmic_dev_0 2 0>;
};
};
regu_config_10 {
reg_info = <&soc_avdd08_mipi_hdmi_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO1>;
};
};
regu_config_11 {
reg_info = <&soc_avdd18_mipi_hdmi_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO5>;
};
};
regu_config_12 {
reg_info = <&soc_dvdd33_emmc_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO10>;
};
};
regu_config_13 {
reg_info = <&soc_dvdd18_emmc_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_GPIO7>;
parent_pmic_dev = <&pmic_dev_0 7 0>;
};
};
regu_config_14 {
reg_info = <&soc_dovdd18_scan_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO6>;
auto_on_info = <2 1 1800000>;
auto_off_info = <7 1>;
};
};
regu_config_15 {
reg_info = <&soc_vext_2v8_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO7>;
auto_on_info = <3 1 2800000>;
auto_off_info = <8 1>;
};
};
regu_config_16 {
reg_info = <&soc_dvdd12_scan_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_LDO8>;
auto_on_info = <4 1 1200000>;
auto_off_info = <9 1>;
};
};
regu_config_17 {
reg_info = <&soc_avdd28_scan_en_reg>;
status = "okay";
regu_id@0 {
pmic_dev = <&pmic_dev_0 DA9063_ID_GPIO4>;
};
};
};
};
};
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = "/soc/serial@ffe7014000:115200";
};
};

View File

@@ -90,6 +90,16 @@ static inline int __test_and_clear_bit(int nr, void *addr)
return retval;
}
static inline int test_and_clear_bit(int nr, volatile void * addr)
{
unsigned long flags = 0;
int out;
out = __test_and_clear_bit(nr, addr);
return out;
}
static inline int __test_and_change_bit(int nr, void *addr)
{
int mask, retval;

View File

@@ -110,7 +110,7 @@ void next_stage(void)
bool has_reset_sample(ulong dtb_addr)
{
int node_offset;
node_offset = fdt_path_offset(dtb_addr, "/soc/reset-sample");
node_offset = fdt_path_offset((void *)dtb_addr, "/soc/reset-sample");
if (node_offset < 0) {
printf("## fdt has no reset_sample\n");
return false;
@@ -160,8 +160,8 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
announce_and_cleanup(fake);
_load_start = kernel;
_dtb_addr = images->ft_addr;
_load_start = (ulong)kernel;
_dtb_addr = (ulong)(images->ft_addr);
_dyn_info_addr = (ulong)&opensbi_info;
if (!has_reset_sample(_dtb_addr)) {
opensbi_info.magic = FW_DYNAMIC_INFO_MAGIC_VALUE;

View File

@@ -6,6 +6,7 @@ else
dtb-$(CONFIG_SANDBOX) += sandbox.dtb
endif
dtb-$(CONFIG_UT_DM) += test.dtb
dtb-$(CONFIG_CMD_EXTENSION) += overlay0.dtbo overlay1.dtbo
targets += $(dtb-y)

View File

@@ -0,0 +1,9 @@
/dts-v1/;
/plugin/;
&{/buttons} {
btn3 {
gpios = <&gpio_a 5 0>;
label = "button3";
};
};

View File

@@ -0,0 +1,9 @@
/dts-v1/;
/plugin/;
&{/buttons} {
btn4 {
gpios = <&gpio_a 5 0>;
label = "button4";
};
};

View File

@@ -12,6 +12,9 @@
#include <os.h>
#include <asm/test.h>
#include <asm/u-boot-sandbox.h>
#include <malloc.h>
#include <extension_board.h>
/*
* Pointer to initial global data area
@@ -58,6 +61,26 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_CMD_EXTENSION
int extension_board_scan(struct list_head *extension_list)
{
struct extension *extension;
int i;
for (i = 0; i < 2; i++) {
extension = calloc(1, sizeof(struct extension));
snprintf(extension->overlay, sizeof(extension->overlay), "overlay%d.dtbo", i);
snprintf(extension->name, sizeof(extension->name), "extension board %d", i);
snprintf(extension->owner, sizeof(extension->owner), "sandbox");
snprintf(extension->version, sizeof(extension->version), "1.1");
snprintf(extension->other, sizeof(extension->other), "Fictionnal extension board");
list_add_tail(&extension->list, extension_list);
}
return i;
}
#endif
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{

View File

@@ -86,10 +86,6 @@ config LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A
bool "light lpi4a security boot with verification"
default n
config LIGHT_SEC_BOOT_WITH_VERIFY_RVBOOK
bool "light lpi4a security boot with verification"
default n
config TARGET_LIGHT_FPGA_FM_C910
bool "light fullmask FPGA board"
default n
@@ -130,21 +126,21 @@ config TARGET_LIGHT_FM_C910_LPI4A
bool "light fullmask for Lichee Pi 4A board "
default n
config TARGET_LIGHT_FM_C910_RVBOOK
bool "light fullmask for RVBOOK board "
default n
config TARGET_LIGHT_FM_C910_B_POWER
bool "light fullmask for light-b-power board "
default n
config TARGET_LIGHT_FM_C910_MILKV_MELES
bool "light fullmask for Milk-V Meles board "
default n
config SYS_TEXT_BASE
default 0xc0000000 if RISCV_MMODE
default 0x00200000 if RISCV_SMODE
config SPL_TEXT_BASE
hex
default 0xffe0000800
default 0xffe0000000
config SPL_MAX_SIZE
hex

View File

@@ -7,10 +7,6 @@ DDR_SRC_PATH=lpddr4/src
DDR_REGU_SRC=lpddr-regu
DDR_FW_PATH=$(DDR_SRC_PATH)/ddr_phy_fw
ifdef CONFIG_RV_BOOK
obj-y += sys_clk.o
endif
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
obj-y += sys_clk.o

View File

@@ -10,6 +10,7 @@
#include <usb.h>
#include <usb/xhci.h>
#include <cpu_func.h>
#include <asm/gpio.h>
#include <abuf.h>
#include "sec_library.h"
@@ -21,11 +22,7 @@
#ifdef CONFIG_USB_DWC3
static struct dwc3_device dwc3_device_data = {
#ifdef CONFIG_RV_BOOK
.maximum_speed = USB_SPEED_HIGH,
#else
.maximum_speed = USB_SPEED_SUPER,
#endif
.dr_mode = USB_DR_MODE_PERIPHERAL,
.index = 0,
};
@@ -57,8 +54,6 @@ int board_usb_cleanup(int index, enum usb_init_type init)
int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
{
int ret = board_usb_init(index, USB_INIT_HOST);
if (ret != 0) {
puts("Failed to initialize board for USB\n");
@@ -249,6 +244,40 @@ int do_bootslave(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
}
#endif
static void light_c910_set_gpio_output_high(const char* gpio_name)
{
ofnode node;
struct gpio_desc select_gpio;
printf("%s: trying to set gpio output high\n", __func__);
node = ofnode_path("/config");
if (!ofnode_valid(node)) {
printf("%s: no /config node?\n", __func__);
return;
}
if (gpio_request_by_name_nodev(node, gpio_name, 0,
&select_gpio, GPIOD_IS_OUT)) {
printf("%s: could not find a /config/%s\n", __func__, gpio_name);
return;
}
dm_gpio_set_value(&select_gpio, 1);
}
int misc_init_r(void)
{
// Enable blue LED
light_c910_set_gpio_output_high("select-gpio");
// Enable fan on some boards(currently only on Meles)
// For LPi4A, the fan is controlled by PWM, see lpi4a_fan_pwm_config() in light.c
light_c910_set_gpio_output_high("fan-gpio");
return 0;
}
#ifdef CONFIG_BOARD_RNG_SEED
const char pre_gen_seed[128] = {211, 134, 226, 116, 1, 13, 224, 196, 88, 213, 188, 219, 128, 41, 231, 228, 129, 123, 173, 234, 219, 79, 152, 154, 169, 27, 183, 166, 52, 21, 118, 7, 155, 89, 124, 156, 102, 92, 96, 190, 49, 28, 154, 177, 69, 129, 149, 199, 253, 66, 177, 216, 146, 73, 114, 59, 100, 41, 225, 152, 62, 88, 160, 217, 177, 28, 117, 23, 120, 213, 213, 169, 242, 111, 90, 55, 241, 239, 254, 238, 50, 175, 198, 196, 248, 56, 255, 92, 97, 224, 245, 160, 56, 149, 121, 233, 177, 239, 0, 41, 196, 214, 210, 182, 69, 44, 238, 54, 27, 236, 36, 77, 156, 234, 17, 148, 34, 16, 241, 132, 241, 230, 36, 41, 123, 157, 19, 44};
/* Use hardware rng to seed Linux random. */

View File

@@ -15,7 +15,6 @@
#include "../../../lib/sec_library/include/sec_crypto_sha.h"
#include "../../../lib/sec_library/include/kdf.h"
#include "../../../lib/sec_library/include/sec_crypto_mac.h"
#include "fastboot.h"
#if CONFIG_IS_ENABLED(LIGHT_SEC_UPGRADE)
@@ -25,14 +24,6 @@
/* The macro is used to enable uboot version in efuse */
#define LIGHT_UBOOT_VERSION_IN_ENV 1
/* The macro is used to enable secimg version in env */
#define LIGHT_SECIMG_VERSION_IN_ENV 1
/* vimage return value */
#define VIMAGE_UPGRADE_NOT_REQUIRED 1
#define VIMAGE_BREAK_VERSION_RULE_ERROR 2
#define VIMAGE_SIGNATRE_VERIFICATION_FAILED 3
/* The macro is used to enble RPMB ACCESS KEY from KDF */
//#define LIGHT_KDF_RPMB_KEY 1
@@ -47,8 +38,7 @@ static const unsigned char emmc_rpmb_key_sample[32] = {0x33, 0x22, 0x11, 0x00, 0
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
#endif
static unsigned int upgrade_image_version = 0;
static char *current_slot = "a";
static char *update_slot = "b";
#define RPMB_EMMC_CID_SIZE 16
#define RPMB_CID_PRV_OFFSET 9
#define RPMB_CID_CRC_OFFSET 15
@@ -56,8 +46,8 @@ static char *update_slot = "b";
static int tee_rpmb_key_gen(uint8_t* key, uint32_t * length)
{
uint32_t data[RPMB_EMMC_CID_SIZE / 4];
uint8_t huk[32];
uint32_t huk_len;
uint8_t huk[32];
uint32_t huk_len;
struct mmc *mmc = find_mmc_device(0);
int i;
sc_mac_t mac_handle;
@@ -82,14 +72,14 @@ static int tee_rpmb_key_gen(uint8_t* key, uint32_t * length)
memset((void *)((uint64_t)data + RPMB_CID_PRV_OFFSET), 0, 1);
memset((void *)((uint64_t)data + RPMB_CID_CRC_OFFSET), 0, 1);
/* Step1: Derive HUK from KDF function */
/* Step1: Derive HUK from KDF function */
ret = csi_kdf_gen_hmac_key(huk, &huk_len);
if (ret) {
printf("kdf gen hmac key faild[%d]\r\n", ret);
return -1;
}
/* Step2: Using HUK and data to generate RPMB key */
/* Step2: Using HUK and data to generate RPMB key */
ret = sc_mac_init(&mac_handle, 0);
if (ret) {
printf("mac init faild[%d]\r\n", ret);
@@ -162,25 +152,22 @@ int csi_rpmb_write_access_key(void)
int csi_tf_get_image_version(unsigned int *ver)
{
int ret = 0;
#if !LIGHT_SECIMG_VERSION_IN_ENV
char runcmd[64] = {0};
unsigned char blkdata[256];
int ret = 0;
/* tf version reside in RPMB block#0, offset#16*/
sprintf(runcmd, "mmc rpmb read 0x%lx 0 1", (unsigned long)blkdata);
ret = run_command(runcmd, 0);
if (ret == 0) {
*ver = (blkdata[16] << 8) + blkdata[17];
}
#else
*ver = env_get_hex("tf_version", 0);
#endif
return ret;
}
int csi_tf_set_image_version(unsigned int ver)
{
#if !LIGHT_SECIMG_VERSION_IN_ENV
char runcmd[64] = {0};
unsigned char blkdata[256];
unsigned long *temp_rpmb_key_addr = NULL;
@@ -207,9 +194,7 @@ int csi_tf_set_image_version(unsigned int ver)
sprintf(runcmd, "mmc rpmb write 0x%lx 0 1 0x%lx", (unsigned long)blkdata, (unsigned long)temp_rpmb_key_addr);
run_command(runcmd, 0);
#else
env_set_hex("tf_version", ver);
#endif
return 0;
}
@@ -220,19 +205,17 @@ int csi_tf_set_upgrade_version(void)
int csi_tee_get_image_version(unsigned int *ver)
{
int ret = 0;
#if !LIGHT_SECIMG_VERSION_IN_ENV
char runcmd[64] = {0};
unsigned char blkdata[256];
int ret = 0;
/* tf version reside in RPMB block#0, offset#0*/
sprintf(runcmd, "mmc rpmb read 0x%lx 0 1", (unsigned long)blkdata);
ret = run_command(runcmd, 0);
if (ret == 0) {
*ver = (blkdata[0] << 8) + blkdata[1];
}
#else
*ver = env_get_hex("tee_version", 0);
#endif
return ret;
}
@@ -251,7 +234,6 @@ int csi_kernel_get_image_version(unsigned int *ver)
int csi_tee_set_image_version(unsigned int ver)
{
#if !LIGHT_SECIMG_VERSION_IN_ENV
char runcmd[64] = {0};
unsigned char blkdata[256];
unsigned long *temp_rpmb_key_addr = NULL;
@@ -277,9 +259,7 @@ int csi_tee_set_image_version(unsigned int ver)
#endif
sprintf(runcmd, "mmc rpmb write 0x%lx 0 1 0x%lx", (unsigned long)blkdata, (unsigned long)temp_rpmb_key_addr);
run_command(runcmd, 0);
#else
env_set_hex("tee_version", ver);
#endif
return 0;
}
@@ -290,25 +270,22 @@ int csi_tee_set_upgrade_version(void)
int csi_sbmeta_get_image_version(unsigned int *ver)
{
int ret = 0;
#if !LIGHT_SECIMG_VERSION_IN_ENV
char runcmd[64] = {0};
unsigned char blkdata[256];
int ret = 0;
/* sbmeta version reside in RPMB block#0, offset#48*/
sprintf(runcmd, "mmc rpmb read 0x%lx 0 1", (unsigned long)blkdata);
ret = run_command(runcmd, 0);
if (ret == 0) {
*ver = (blkdata[48] << 8) + blkdata[49];
}
#else
*ver = env_get_hex("sbmeta_version", 0);
#endif
return ret;
}
int csi_sbmeta_set_image_version(unsigned int ver)
{
#if !LIGHT_SECIMG_VERSION_IN_ENV
char runcmd[64] = {0};
unsigned char blkdata[256];
unsigned long *temp_rpmb_key_addr = NULL;
@@ -333,9 +310,7 @@ int csi_sbmeta_set_image_version(unsigned int ver)
#endif
sprintf(runcmd, "mmc rpmb write 0x%lx 0 1 0x%lx", (unsigned long)blkdata, (unsigned long)temp_rpmb_key_addr);
run_command(runcmd, 0);
#else
env_set_hex("sbmeta_version", ver);
#endif
return 0;
}
@@ -463,13 +438,13 @@ int verify_image_version_rule(unsigned int new_ver, unsigned int cur_ver)
/* This is unsecure function */
if ((new_ver_y - cur_ver_y) == 0) {
printf("New version is equal to Current version, upgrade process terminates \n\n\n");
return VIMAGE_UPGRADE_NOT_REQUIRED;
return -1;
}
printf("This is unsecure function upgrade, going on uprade anyway\n");
} else if ((new_ver_x - cur_ver_x) != 1) {
/* Check the seure version rule */
printf("The upgrade version(X) breaks against the rule\n\n\n");
return VIMAGE_BREAK_VERSION_RULE_ERROR;
return -1;
}
printf("check image verison rule pass\n\n\n");
@@ -585,7 +560,7 @@ int light_vimage(int argc, char *const argv[])
unsigned long vimage_addr = 0;
unsigned int new_img_version = 0;
unsigned int cur_img_version = 0;
char imgname[32] = {0};
char imgname[32] = {0};
if (argc < 3)
return CMD_RET_USAGE;
@@ -600,43 +575,35 @@ int light_vimage(int argc, char *const argv[])
printf("get new img version fail\n");
return CMD_RET_FAILURE;
}
if (strcmp(imgname, UBOOT_PART_NAME) == 0) {
new_img_version = (((new_img_version & 0xff )+1) << 8) | ((new_img_version & 0xff00)>>8);
}
if (strcmp(imgname, UBOOT_PART_NAME) == 0) {
new_img_version = (((new_img_version & 0xff )+1) << 8) | ((new_img_version & 0xff00)>>8);
}
printf("Get new image version from image header: v%d.%d\n", (new_img_version & 0xff00)>>8, new_img_version & 0xff);
/* Check image version for ROLLBACK resisance */
/* Check image version for ROLLBACK resisance */
if (strcmp(imgname, TF_PART_NAME) == 0) {
ret = csi_tf_get_image_version(&cur_img_version);
if (ret != 0) {
printf("Get tf img version fail\n");
return CMD_RET_FAILURE;
}
#if LIGHT_NON_COT_BOOT
/* if in non-cot mode, tf and tee will not be signed at first */
if (image_have_head(vimage_addr) == 0 && ((cur_img_version & 0xFF00) >> 8 == 0)) {
return VIMAGE_UPGRADE_NOT_REQUIRED;
}
#endif
} else if (strcmp(imgname, TEE_PART_NAME) == 0){
ret = csi_tee_get_image_version(&cur_img_version);
if (ret != 0) {
printf("Get tee img version fail\n");
return CMD_RET_FAILURE;
}
#if LIGHT_NON_COT_BOOT
/* if in non-cot mode, tf and tee will not be signed at first */
if (image_have_head(vimage_addr) == 0 && ((cur_img_version & 0xFF00) >> 8 == 0)) {
return VIMAGE_UPGRADE_NOT_REQUIRED;
}
#endif
} else if (strcmp(imgname, KERNEL_PART_NAME) == 0){
ret = csi_kernel_get_image_version(&cur_img_version);
if (ret != 0) {
printf("Get kernel img version fail\n");
return CMD_RET_FAILURE;
}
} else if (strcmp(imgname, SBMETA_PART_NAME) == 0){
ret = csi_sbmeta_get_image_version(&cur_img_version);
if (ret != 0) {
printf("Get sbmeta img version fail\n");
@@ -659,13 +626,13 @@ int light_vimage(int argc, char *const argv[])
printf("unsupport image file\n");
return CMD_RET_FAILURE;
}
/* Verify image version rule */
ret = verify_image_version_rule(new_img_version, cur_img_version);
if (ret != 0) {
return ret;
return CMD_RET_FAILURE;
}
/* Save new image version to allow caller upgrade image version */
upgrade_image_version = new_img_version;
@@ -679,27 +646,27 @@ int light_vimage(int argc, char *const argv[])
if (strcmp(imgname, TF_PART_NAME) == 0) {
ret = verify_customer_image(T_TF, vimage_addr);
if (ret != 0) {
return VIMAGE_SIGNATRE_VERIFICATION_FAILED;
return CMD_RET_FAILURE;
}
} else if (strcmp(imgname, TEE_PART_NAME) == 0) {
ret = verify_customer_image(T_TEE, vimage_addr);
if (ret != 0) {
return VIMAGE_SIGNATRE_VERIFICATION_FAILED;
return CMD_RET_FAILURE;
}
} else if (strcmp(imgname, KERNEL_PART_NAME) == 0) {
ret = verify_customer_image(T_KRLIMG, vimage_addr);
if (ret != 0) {
return VIMAGE_SIGNATRE_VERIFICATION_FAILED;
return CMD_RET_FAILURE;
}
} else if (strcmp(imgname, UBOOT_PART_NAME) == 0) {
ret = verify_customer_image(T_UBOOT, vimage_addr);
if (ret != 0) {
return VIMAGE_SIGNATRE_VERIFICATION_FAILED;
return CMD_RET_FAILURE;
}
} else if (strcmp(imgname, SBMETA_PART_NAME) == 0) {
ret = verify_customer_image(T_SBMETA, vimage_addr);
if (ret != 0) {
return VIMAGE_SIGNATRE_VERIFICATION_FAILED;
return CMD_RET_FAILURE;
}
} else {
printf("Error: unknow image name\n");
@@ -720,8 +687,8 @@ int light_secboot(int argc, char * const argv[])
printf("\n\n");
printf("Now, we start to verify all trust firmware before boot kernel !\n");
/* Enject RPMB KEY directly in startup */
csi_rpmb_write_access_key();
/* Enject RPMB KEY directly in startup */
csi_rpmb_write_access_key();
/* Initialize secure basis of functions */
ret = csi_sec_init();
@@ -858,317 +825,273 @@ void sec_firmware_version_dump(void)
printf("\n\n");
}
struct sec_img_upgrade_entry {
const char* filename;
const char* imgtype;
int (*set_version_func)(void);
const char *part_str;
};
static struct sec_img_upgrade_entry sec_img_list[] = {
{"sbmeta.bin", "sbmeta", csi_sbmeta_set_upgrade_version, "sbmeta"},
{"trust_firmware.bin", "tf", csi_tf_set_upgrade_version, "tee"},
{"tee.bin", "tee", csi_tee_set_upgrade_version, "tee"},
{NULL, NULL, NULL, NULL},
};
static struct blk_desc *dev_desc;
static int ab_get_blk(void)
{
struct disk_partition part_info;
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (dev_desc == NULL) {
printf("Failed to find MMC device\n");
return -1;
}
return 0;
}
static int ab_get_sec_part(const char *part_str, int update_part)
{
struct disk_partition part_info;
char partname[10] = {0};
int part = 0;
if (update_part) {
sprintf(partname, "%s_%s", part_str, update_slot);
} else {
sprintf(partname, "%s_%s", part_str, current_slot);
}
part = part_get_info_by_name(dev_desc, partname, &part_info);
if (part < 0) {
printf("Failed to find MMC device\n");
}
return part;
}
static int single_img_upgrade(struct sec_img_upgrade_entry *sec_img_entry)
void sec_upgrade_thread(void)
{
const unsigned long temp_addr=0x200000;
char runcmd[80];
uint8_t * image_buffer = NULL;
uint8_t * image_malloc_buffer = NULL;
unsigned int upgrade_file_size = 0;
const char *filename = NULL;
int update_part = 0;
int current_part = 0;
uint8_t * image_buffer = NULL;
uint8_t * image_malloc_buffer = NULL;
int ret = 0;
char *argv[3] = {"vimage", NULL, NULL};
if (sec_img_entry == NULL) {
return -1;
}
update_part = ab_get_sec_part(sec_img_entry->part_str, 1);
if (update_part < 0) {
return -1;
}
filename = sec_img_entry->filename;
/* STEP 1: read upgrade image from storage */
printf("read upgrade image (%s) from storage \n", filename);
sprintf(runcmd, "ext4load mmc ${mmcdev}:%x 0x%p %s", update_part, (void *)temp_addr, filename);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("%s upgrade process is terminated due to some reason\n", filename);
return -1;
}
/* Fetch the total file size after read out operation end */
upgrade_file_size = env_get_hex("filesize", 0);
printf("upgrade file size: %d\n", upgrade_file_size);
/*store image to temp buffer as temp_addr may be decrypted*/
image_malloc_buffer = malloc(upgrade_file_size);
if (image_malloc_buffer == NULL) {
image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
} else {
image_buffer = image_malloc_buffer;
}
memcpy(image_buffer, (void*)temp_addr, upgrade_file_size);
/* STEP 2: verify secure image */
sprintf(runcmd, "0x%lx", temp_addr);
argv[1] = runcmd;
argv[2] = sec_img_entry->imgtype;
ret = light_vimage(3, argv);
if (ret == VIMAGE_UPGRADE_NOT_REQUIRED) {
printf("%s Image may not need upgrade\n", sec_img_entry->imgtype);
return 0;
} else if (ret != 0) {
return -1;
}
/* STEP 3: update partition image in another slot */
current_part = ab_get_sec_part(sec_img_entry->part_str, 0);
if (current_part < 0) {
return -1;
}
printf("write upgrade image (%s) into another slot \n", filename);
sprintf(runcmd, "ext4write mmc 0:%x 0x%p /%s 0x%x", current_part, (void *)image_buffer, filename, upgrade_file_size);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("%s upgrade process is terminated due to some reason\n", filename);
return -1;
}
/* STEP 4: update secure image version */
sec_img_entry->set_version_func();
printf("\n\n%s image ugprade process is successful\n\n", filename);
return 0;
}
static int sec_img_upgrade(void)
{
int ret = 0;
struct sec_img_upgrade_entry *sec_img_entry = sec_img_list;
ab_get_blk();
while (sec_img_entry->filename != NULL) {
ret = single_img_upgrade(sec_img_entry);
if (ret) {
printf("Fail to upgrade image\n");
return -1;
}
sec_img_entry++;
}
return 0;
}
extern int hibernate_image_cleaned_flag;
extern void clean_hibernate_image_header(char *response);
static char *response[FASTBOOT_RESPONSE_LEN] = {0};
void sec_upgrade_thread(void)
{
const unsigned long temp_addr=0x200000;
char runcmd[80];
int ret = 0;
unsigned int sec_upgrade_flag = 0;
unsigned int upgrade_file_size = 0;
sec_upgrade_flag = env_get_hex("sec_upgrade_mode", 0);
current_slot = env_get("slot_suffix");
update_slot = strcmp(current_slot, "a") == 0 ? "b" : "a";
if (sec_upgrade_flag == 0) {
return;
}
clean_hibernate_image_header(response);
printf("bootstrap: sec_upgrade_flag: %x\n", sec_upgrade_flag);
if (sec_upgrade_flag == UBOOT_SEC_UPGRADE_FLAG) {
unsigned int block_cnt;
struct blk_desc *dev_desc;
const unsigned long uboot_temp_addr=0x80000000;
#define BLOCK_SIZE 512
#define PUBKEY_HEADER_SIZE 0x1000
/* STEP 1: read upgrade image (u-boot-with-spl.bin) from stash partition */
printf("read upgrade image (u-boot-with-spl.bin) from stash partition \n");
sprintf(runcmd, "ext4load mmc 0:4 0x%p u-boot-with-spl.bin", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("UBOOT Upgrade process is terminated due to some reason\n");
goto _upgrade_uboot_exit;
}
/* Fetch the total file size after read out operation end */
upgrade_file_size = env_get_hex("filesize", 0);
printf("uboot upgrade file size: %d\n", upgrade_file_size);
/* STEP 2: verify its authentiticy here */
memmove((void *)uboot_temp_addr, (const void *)temp_addr, upgrade_file_size);
sprintf(runcmd, "vimage 0x%p uboot", (void *)(uboot_temp_addr+PUBKEY_HEADER_SIZE));
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("UBOOT Image verification fail and upgrade process terminates\n");
goto _upgrade_uboot_exit;
}
/* STEP 3: update uboot partition */
printf("write upgrade image (u-boot-with-spl.bin) into uboot partition \n");
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
printf("Invalid mmc device\n");
goto _upgrade_uboot_exit;
}
block_cnt = upgrade_file_size / BLOCK_SIZE;
if (upgrade_file_size % BLOCK_SIZE) {
block_cnt = block_cnt +1;
}
run_command("mmc partconf 0 1 0 1", 0);
sprintf(runcmd, "mmc write 0x%p 0 %x", (void *)temp_addr, block_cnt);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
run_command("mmc partconf 0 1 0 0", 0);
if (ret != 0) {
printf("UBOOT upgrade process is terminated due to some reason\n");
goto _upgrade_uboot_exit;
}
/* STEP 4: update tee version */
ret = csi_uboot_set_upgrade_version();
if (ret != 0) {
printf("Set uboot upgrade version fail\n");
goto _upgrade_uboot_exit;
}
printf("\n\nUBOOT image ugprade process is successful\n\n");
_upgrade_uboot_exit:
/* set secure upgrade flag to 0 that indicate upgrade over */
run_command("env set sec_upgrade_mode 0", 0);
run_command("saveenv", 0);
run_command("reset", 0);
} else if ((sec_upgrade_flag >> 16) == SEC_IMG_UPGRADE_FLAG) {
ret = sec_img_upgrade();
if (ret) {
printf("secure image upgrade failed\n");
/* if failed, clear upgrade flag, terminate upgradation */
sec_upgrade_flag = 0;
} else {
/* if succeed, clear secure flag */
sec_upgrade_flag = sec_upgrade_flag & 0x0000FFFF;
/* if boot need not update, switch current slot to update slot */
if ((sec_upgrade_flag & 0xFF00) != BOOT_IMG_UPGRADE_FLAG) {
sprintf(runcmd, "env set slot_suffix %s", update_slot);
run_command(runcmd, 0);
}
}
/* set upgrade flag */
sprintf(runcmd, "env set sec_upgrade_mode %x", sec_upgrade_flag);
run_command(runcmd, 0);
run_command("saveenv", 0);
run_command("reset", 0);
} else if (((sec_upgrade_flag & 0xFF00) != BOOT_IMG_UPGRADE_FLAG) &&
((sec_upgrade_flag & 0xFF) != ROOT_IMG_UPGRADE_FLAG)) {
printf("Unknown bootstrap, Force sysem reboot\n");
run_command("env set sec_upgrade_mode 0", 0);
run_command("saveenv", 0);
run_command("reset", 0);
}
}
void nonsec_upgrade_thread(void)
{
unsigned int sec_upgrade_flag;
unsigned long retries;
char runcmd[32] = {0};
unsigned int sec_upgrade_flag = 0;
unsigned int upgrade_file_size = 0;
sec_upgrade_flag = env_get_hex("sec_upgrade_mode", 0);
retries = env_get_ulong("retries", 10, 5);
if (sec_upgrade_flag == 0) {
if (retries < 5 && retries > 0) {
printf("boot upgradation is successful!\n");
run_command("env set retries 5", 0);
run_command("env save", 0);
if (sec_upgrade_flag == 0)
return;
printf("bootstrap: sec_upgrade_flag: %x\n", sec_upgrade_flag);
if (sec_upgrade_flag == TF_SEC_UPGRADE_FLAG) {
/* STEP 1: read upgrade image (trust_firmware.bin) from stash partition */
printf("read upgrade image (trust_firmware.bin) from stash partition \n");
sprintf(runcmd, "ext4load mmc 0:4 0x%p trust_firmware.bin", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("TF upgrade process is terminated due to some reason\n");
goto _upgrade_tf_exit;
}
return;
/* Fetch the total file size after read out operation end */
upgrade_file_size = env_get_hex("filesize", 0);
printf("upgrade file size: %d\n", upgrade_file_size);
/*store image to temp buffer as temp_addr may be decrypted*/
image_malloc_buffer = malloc(upgrade_file_size);
if ( image_malloc_buffer == NULL ) {
image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
} else {
image_buffer = image_malloc_buffer;
}
memcpy(image_buffer, (void*)temp_addr, upgrade_file_size);
/* when sec_upgrade_mode != 0 and the first time try to boot. switch current slot to update slot*/
if (retries == 5) {
printf("upgrade images are in slot %s...\n", update_slot);
sprintf(runcmd, "env set slot_suffix %s", update_slot);
run_command(runcmd, 0);
}
/* if ROOT image need upgrade, clear flag */
if ((sec_upgrade_flag & 0xFF) == ROOT_IMG_UPGRADE_FLAG) {
printf("in root image upgrade process...\n");
sec_upgrade_flag = sec_upgrade_flag & 0xFF00;
sprintf(runcmd, "env set sec_upgrade_mode %X", sec_upgrade_flag);
run_command(runcmd, 0);
}
/* if boot image need upgrade, decrement retries */
if ((sec_upgrade_flag & 0xFF00) == BOOT_IMG_UPGRADE_FLAG) {
printf("in boot image upgrade process...\n");
retries--;
printf("remaining retry times: %ld\n", retries);
if (retries == 0 || retries > 5) {
/*
* upgrade failed. Now updated images are in current slot
* switch to original slot
*/
printf("boot images upgrade failed. switch slot to %s...\n", update_slot);
sprintf(runcmd, "env set slot_suffix %s", update_slot);
run_command(runcmd, 0);
run_command("env set sec_upgrade_mode 0", 0);
retries = 5;
/* STEP 2: verify its authentiticy here */
sprintf(runcmd, "vimage 0x%p tf", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("TF Image verification fail and upgrade process terminates\n");
goto _upgrade_tf_exit;
}
sprintf(runcmd, "env set retries %ld", retries);
run_command(runcmd, 0);
run_command("env save", 0);
/* STEP 3: update tf partition */
printf("read upgrade image (trust_firmware.bin) into tf partition \n");
sprintf(runcmd, "ext4write mmc 0:3 0x%p /trust_firmware.bin 0x%x", (void *)image_buffer, upgrade_file_size);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("TF upgrade process is terminated due to some reason\n");
goto _upgrade_tf_exit;
}
/* STEP 4: update tf version */
ret = csi_tf_set_upgrade_version();
if (ret != 0) {
printf("Set trustfirmware upgrade version fail\n");
goto _upgrade_tf_exit;
}
printf("\n\nTF image ugprade process is successful\n\n");
_upgrade_tf_exit:
/* set secure upgrade flag to 0 that indicate upgrade over */
run_command("env set sec_upgrade_mode 0", 0);
run_command("saveenv", 0);
run_command("reset", 0);
if ( image_malloc_buffer != NULL ) {
free(image_malloc_buffer);
image_malloc_buffer = NULL;
}
} else if (sec_upgrade_flag == TEE_SEC_UPGRADE_FLAG) {
/* STEP 1: read upgrade image (tee.bin) from stash partition */
printf("read upgrade image (tee.bin) from stash partition \n");
sprintf(runcmd, "ext4load mmc 0:4 0x%p tee.bin", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("TEE Upgrade process is terminated due to some reason\n");
goto _upgrade_tee_exit;
}
/* Fetch the total file size after read out operation end */
upgrade_file_size = env_get_hex("filesize", 0);
printf("TEE upgrade file size: %d\n", upgrade_file_size);
/*store image to temp buffer as temp_addr may be decrypted*/
image_malloc_buffer = malloc(upgrade_file_size);
if ( image_malloc_buffer == NULL ) {
image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
} else {
image_buffer = image_malloc_buffer;
}
memcpy(image_buffer, (void*)temp_addr, upgrade_file_size);
/* STEP 2: verify its authentiticy here */
sprintf(runcmd, "vimage 0x%p tee", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("TEE Image verification fail and upgrade process terminates\n");
goto _upgrade_tee_exit;
}
/* STEP 3: update tee partition */
printf("read upgrade image (tee.bin) into sbmeta partition \n");
sprintf(runcmd, "ext4write mmc 0:3 0x%p /tee.bin 0x%x", (void *)image_buffer, upgrade_file_size);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("TEE upgrade process is terminated due to some reason\n");
goto _upgrade_tee_exit;
}
/* STEP 4: update tee version */
ret = csi_tee_set_upgrade_version();
if (ret != 0) {
printf("Set tee upgrade version fail\n");
goto _upgrade_tee_exit;
}
printf("\n\nTEE image ugprade process is successful\n\n");
_upgrade_tee_exit:
/* set secure upgrade flag to 0 that indicate upgrade over */
run_command("env set sec_upgrade_mode 0", 0);
run_command("saveenv", 0);
run_command("reset", 0);
if ( image_malloc_buffer != NULL ) {
free(image_malloc_buffer);
image_malloc_buffer = NULL;
}
} else if (sec_upgrade_flag == SBMETA_SEC_UPGRADE_FLAG) {
/* STEP 1: read upgrade image (sbmeta.bin) from stash partition */
printf("read upgrade image (sbmeta.bin) from stash partition \n");
sprintf(runcmd, "ext4load mmc 0:4 0x%p sbmeta.bin", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("SBMETA Upgrade process is terminated due to some reason\n");
goto _upgrade_sbmeta_exit;
}
/* Fetch the total file size after read out operation end */
upgrade_file_size = env_get_hex("filesize", 0);
printf("SBMETA upgrade file size: %d\n", upgrade_file_size);
/*store image to temp buffer as temp_addr may be decrypted*/
image_malloc_buffer = malloc(upgrade_file_size);
if ( image_malloc_buffer == NULL ) {
image_buffer = (uint8_t*)temp_addr + upgrade_file_size;
} else {
image_buffer = image_malloc_buffer;
}
memcpy(image_buffer, (void*)temp_addr, upgrade_file_size);
/* STEP 2: verify its authentiticy here */
sprintf(runcmd, "vimage 0x%p sbmeta", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("SBMETA Image verification fail and upgrade process terminates\n");
goto _upgrade_sbmeta_exit;
}
/* STEP 3: update sbmeta partition */
printf("read upgrade image (SBMETA.bin) into sbmeta partition \n");
sprintf(runcmd, "ext4write mmc 0:3 0x%p /sbmeta.bin 0x%x", (void *)image_buffer, upgrade_file_size);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("SBMETA upgrade process is terminated due to some reason\n");
goto _upgrade_sbmeta_exit;
}
/* STEP 4: update sbmeta version */
ret = csi_sbmeta_set_upgrade_version();
if (ret != 0) {
printf("Set sbmeta upgrade version fail\n");
goto _upgrade_sbmeta_exit;
}
printf("\n\nSBMETA image ugprade process is successful\n\n");
_upgrade_sbmeta_exit:
/* set secure upgrade flag to 0 that indicate upgrade over */
run_command("env set sec_upgrade_mode 0", 0);
run_command("saveenv", 0);
run_command("reset", 0);
if ( image_malloc_buffer != NULL ) {
free(image_malloc_buffer);
image_malloc_buffer = NULL;
}
} else if (sec_upgrade_flag == UBOOT_SEC_UPGRADE_FLAG) {
unsigned int block_cnt;
struct blk_desc *dev_desc;
const unsigned long uboot_temp_addr=0x80000000;
#define BLOCK_SIZE 512
#define PUBKEY_HEADER_SIZE 0x1000
/* STEP 1: read upgrade image (u-boot-with-spl.bin) from stash partition */
printf("read upgrade image (u-boot-with-spl.bin) from stash partition \n");
sprintf(runcmd, "ext4load mmc 0:4 0x%p u-boot-with-spl.bin", (void *)temp_addr);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("UBOOT Upgrade process is terminated due to some reason\n");
goto _upgrade_uboot_exit;
}
/* Fetch the total file size after read out operation end */
upgrade_file_size = env_get_hex("filesize", 0);
printf("uboot upgrade file size: %d\n", upgrade_file_size);
/* STEP 2: verify its authentiticy here */
memmove((void *)uboot_temp_addr, (const void *)temp_addr, upgrade_file_size);
sprintf(runcmd, "vimage 0x%p uboot", (void *)(uboot_temp_addr+PUBKEY_HEADER_SIZE));
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
if (ret != 0) {
printf("UBOOT Image verification fail and upgrade process terminates\n");
goto _upgrade_uboot_exit;
}
/* STEP 3: update uboot partition */
printf("write upgrade image (u-boot-with-spl.bin) into boot partition \n");
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
printf("Invalid mmc device\n");
goto _upgrade_uboot_exit;
}
block_cnt = upgrade_file_size / BLOCK_SIZE;
if (upgrade_file_size % BLOCK_SIZE) {
block_cnt = block_cnt +1;
}
run_command("mmc partconf 0 1 0 1", 0);
sprintf(runcmd, "mmc write 0x%p 0 %x", (void *)temp_addr, block_cnt);
printf("runcmd:%s\n", runcmd);
ret = run_command(runcmd, 0);
run_command("mmc partconf 0 1 0 0", 0);
if (ret != 0) {
printf("UBOOT upgrade process is terminated due to some reason\n");
goto _upgrade_uboot_exit;
}
/* STEP 4: update tee version */
ret = csi_uboot_set_upgrade_version();
if (ret != 0) {
printf("Set uboot upgrade version fail\n");
goto _upgrade_uboot_exit;
}
printf("\n\nUBOOT image ugprade process is successful\n\n");
_upgrade_uboot_exit:
/* set secure upgrade flag to 0 that indicate upgrade over */
run_command("env set sec_upgrade_mode 0", 0);
run_command("saveenv", 0);
run_command("reset", 0);
} else {
printf("Unknown bootstrap, Force sysem reboot\n");
run_command("reset", 0);
}
}
#endif

View File

@@ -1146,7 +1146,7 @@ void ap_mipi_dsi1_clk_endisable(bool en)
writel(cfg1, (void __iomem *)AP_DPU1_PLL_CFG1);
}
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
static void ap_multimedia_div_num_set(enum multimedia_div_type type, unsigned int div_num)
{
unsigned long div_reg;
@@ -1305,7 +1305,7 @@ int clk_config(void)
/* The boards other than the LightA board perform the bus down-speed operation */
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B)
#if defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_DISCRETE) || defined (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_POWER) || defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_B) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
ap_multimedia_div_num_set(VI_MIPI_CSI0_DIV, 12); /* Input frquency: 2376MHZ */
ap_multimedia_div_num_set(VI_ISP0_CORE_DIV, 12); /* Input frquency: 2376MHZ */
ap_multimedia_div_num_set(VI_ISP1_CORE_DIV, 12); /* Input frquency: 2376MHZ */

File diff suppressed because it is too large Load Diff

View File

@@ -136,7 +136,7 @@ static const struct regulator_t g_apcpu_regu_id_list[] = {
REGU_ID_DEF(IIC_IDX_AONIIC,APCPU_REGU_VDDM,0x31,0x39,0,1,800000,600000,3500000,12500,1),
},
};
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined(CONFIG_TARGET_LIGHT_FM_C910_RVBOOK)
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF) || (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
/**
* board for ant-ref
*
@@ -955,7 +955,7 @@ int pmic_reset_apcpu_voltage(void)
return ret;
return 0;
}
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined(CONFIG_TARGET_LIGHT_FM_C910_RVBOOK)
#elif defined (CONFIG_TARGET_LIGHT_FM_C910_VAL_ANT_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_A_REF) || defined (CONFIG_TARGET_LIGHT_FM_C910_B_REF)|| (CONFIG_TARGET_LIGHT_FM_C910_BEAGLE) || defined (CONFIG_TARGET_LIGHT_FM_C910_LPI4A) || defined (CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES)
int pmic_reset_apcpu_voltage(void)
{
int ret = -1;

View File

@@ -3,6 +3,7 @@
#include "../include/common_lib.h"
#include "../include/ddr_common_func.h"
#include "../include/ddr_retention.h"
#include "../include/pinmux.h"
DDR_SYSREG_REG_SW_REG_S ddr_sysreg;
@@ -48,7 +49,7 @@ int get_ddr_rank_number() {
#ifdef CONFIG_DDR_MSG
DDR_DEBUG("unsupported ddr rank type!!!\n");
#endif
return NULL;
return 0;
#endif
}
@@ -994,7 +995,7 @@ if(bits==64) {
}
}
#define MEMSIZE_MIN_MB (1*1024)
#define MEMSIZE_MIN_MB (2*1024)
#define MEMSIZE_MAX_MB (16*1024)
#define UNIT_MB (1024*1024)
int lpddr4_query_boundary(enum DDR_TYPE type, int rank_num, int speed,
@@ -1007,29 +1008,35 @@ int lpddr4_query_boundary(enum DDR_TYPE type, int rank_num, int speed,
if (bits == DDR_BITWIDTH_32) {// only phy0
if (rank_num == 2) {
if (size == 0x80000000) //2GB
goto ret_ok;
goto err_ret;
else if (size == 0x100000000) //4GB
goto ret_ok;
else if (size == 0x200000000) //8GB
goto ret_ok;
else if (size == 0x400000000) //16GB
goto err_ret;
else
goto err_ret;
}
else { // single rank
if (size == 0x40000000) //1GB
goto ret_ok;
else if (size == 0x80000000) //2GB
if (size == 0x80000000) //2GB
goto ret_ok;
else if (size == 0x100000000) //4GB
goto ret_ok;
goto err_ret;
else if (size == 0x200000000) //8GB
goto err_ret;
else if (size == 0x400000000) //16GB
goto err_ret;
else
goto err_ret;
}
}
else if (bits == DDR_BITWIDTH_64) { // phy0+phy1
if (rank_num == 2) {
if (size == 0x100000000) //4GB
goto ret_ok;
if (size == 0x80000000) //2GB
goto err_ret;
else if (size == 0x100000000) //4GB
goto err_ret;
else if (size == 0x200000000) //8GB
goto ret_ok;
else if (size == 0x400000000) //16GB
@@ -1039,11 +1046,13 @@ int lpddr4_query_boundary(enum DDR_TYPE type, int rank_num, int speed,
}
else { // single rank
if (size == 0x80000000) //2GB
goto ret_ok;
goto err_ret;
else if (size == 0x100000000) //4GB
goto ret_ok;
else if (size == 0x200000000) //8GB
goto ret_ok;
goto err_ret;
else if (size == 0x400000000) //16GB
goto err_ret;
else
goto err_ret;
}
@@ -1067,70 +1076,36 @@ int adjust_ddr_addrmap(enum DDR_TYPE type, int rank_num, int speed,
if (bits == DDR_BITWIDTH_32) {// only phy0
if (rank_num == 2) {
if (size == 0x80000000) {//2GB
wr(ADDRMAP0,0x001f0016); // cs_bit0: HIF[28]
wr(ADDRMAP6,0x0f070707); // row15: NULL
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x100000000) {//4GB
if (size == 0x100000000) {//4GB
wr(ADDRMAP0,0x001f0017); // cs_bit0: HIF[29]
wr(ADDRMAP6,0x07070707); // row15: HIF[28]
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x200000000) {//8GB
wr(ADDRMAP0,0x001f0018); // cs_bit0: HIF[30]
wr(ADDRMAP6,0x07070707); // row15: HIF[28]
wr(ADDRMAP7,0x00000f07); // row16: HIF[29]
}
}
else { // single rank
wr(ADDRMAP0,0x001f001f); // cs_bit0: NULL
if (size == 0x40000000) {//1GB
wr(ADDRMAP6,0x0f070707); // row15: NULL
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x80000000) {//2GB
wr(ADDRMAP6,0x07070707); // row15: HIF[28]
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x100000000) {//4GB
wr(ADDRMAP6,0x07070707); // row15: HIF[28]
wr(ADDRMAP7,0x00000f07); // row16: HIF[29]
}
if (size == 0x80000000) //2GB
wr(ADDRMAP0,0x001f001f); // cs_bit0: NULL
}
}
else if (bits == DDR_BITWIDTH_64) { // phy0+phy1
if (rank_num == 2) {
if (size == 0x100000000) {//4GB
wr(ADDRMAP0,0x00040017); // cs_bit0: HIF[29]
wr(ADDRMAP6,0x0f080808); // row15: NULL
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x200000000) {//8GB
if (size == 0x200000000) {//8GB
wr(ADDRMAP0,0x00040018); // cs_bit0: HIF[30]
wr(ADDRMAP6,0x08080808); // row15: HIF[29]
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x400000000) {//16GB
wr(ADDRMAP0,0x00040019); // cs_bit0: HIF[31]
wr(ADDRMAP6,0x08080808); // row15: HIF[29]
wr(ADDRMAP7,0x00000f08); // row16: HIF[30]
}
}
else { // single rank
wr(ADDRMAP0,0x0004001f); // cs_bit0: NULL
if (size == 0x80000000) {//2GB
wr(ADDRMAP6,0x0f080808); // row15: NULL
if (size == 0x100000000) {//4GB
wr(ADDRMAP0,0x0004001f); // cs_bit0: NULL
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x100000000) {//4GB
wr(ADDRMAP6,0x08080808); // row15: HIF[29]
wr(ADDRMAP7,0x00000f0f); // row16: NULL
}
else if (size == 0x200000000) {//8GB
wr(ADDRMAP6,0x08080808); // row15: HIF[29]
wr(ADDRMAP7,0x00000f08); // row16: HIF[30]
}
}
}
else {

View File

@@ -1,6 +1,7 @@
#include "../include/common_lib.h"
#include "../include/ddr_common_func.h"
#include "../include/ddr_retention.h"
#include "../include/pinmux.h"
/*
/// data structure to store register address, value pairs

View File

@@ -29,7 +29,7 @@
#define DMSG(fmt, args...) trace_printer("", fmt, ##args)
#endif
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_RVBOOK)
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
#if CONFIG_IS_ENABLED(LIGHT_SEC_UPGRADE)
/* digest_size corresponding to digest_scheme specified in sbmeta_info_t */
static const int digest_size[] = {0, 20, 16, 28, 32, 48, 64, 32};
@@ -62,8 +62,7 @@ typedef struct {
char filename[MAX_NAME_SIZE];
uint8_t digest[MAX_DIGEST_SIZE];
uint32_t relocated_addr;
uint8_t security_level;
uint8_t reserved[15];
uint32_t reserved[4];
} sbmeta_info_t;
static int is_sbmeta_info(uint32_t entry_src_addr)
@@ -108,11 +107,6 @@ static int dump_sbmeta_info(sbmeta_info_t *sbmeta_info)
IMSG("Image has been loaded\r\n");
}
if (sbmeta_info->security_level > SBMETA_SECURITY_LEVEL_SIGN || sbmeta_info->security_level < SBMETA_SECURITY_LEVEL_NONE) {
EMSG("security level is invalid\n");
return CMD_RET_FAILURE;
}
/* dump sbmeta_info_t */
DMSG("image medium type: %d\n", sbmeta_info->medium_type);
DMSG("image load part: mmc %d:%d\n", sbmeta_info->dev, sbmeta_info->part);
@@ -142,10 +136,6 @@ static int sbmeta_field_verify(sbmeta_info_t *sbmeta_info, unsigned long img_src
return CMD_RET_FAILURE;
}
if (sbmeta_info->security_level < SBMETA_SECURITY_LEVEL_SIGN) {
return 0;
}
/* if image has secure header, check with sbmeta field */
if (image_have_head(img_src_addr)) {
phead = (img_header_t *)img_src_addr;
@@ -231,7 +221,7 @@ static int sbmeta_verify_image(uint32_t image_load_addr, sbmeta_info_t *sbmeta_i
uint8_t checksum_scheme = sbmeta_info->checksum_scheme;
uint8_t *digest = sbmeta_info->digest;
uint8_t is_encrypted = sbmeta_info->isencrypted;
uint32_t security_level = sbmeta_info->security_level;
uint32_t security_level = env_get_hex("sbmeta_security_level", 3);
uint32_t filesize = 0;
char buf[64] = {0};
@@ -263,11 +253,11 @@ static int sbmeta_verify_image(uint32_t image_load_addr, sbmeta_info_t *sbmeta_i
/* start verifying images */
IMSG("Process %s image verification ...\n", image_name);
if (security_level == SBMETA_SECURITY_LEVEL_SIGN || is_encrypted != 0) {
if (security_level == 3 || is_encrypted != 0) {
if (verify_customer_image(image_type, image_load_addr) != 0) {
return CMD_RET_FAILURE;
}
} else if (security_level == SBMETA_SECURITY_LEVEL_HASH) {
} else if (security_level == 2) {
if (memcmp(digest, buf, 64) == 0) {
EMSG("sbmeta info doesn't specify digest value in security level 2\r\n");
return CMD_RET_FAILURE;
@@ -319,8 +309,7 @@ static int light_sbmetaboot(int argc, char *const argv[])
sbmeta_info_t *sbmeta_info = NULL;
/* Load sbmeta image to memory */
snprintf(cmd, sizeof(cmd), "ext4load mmc ${mmcdev}:${mmcsbmetapart} 0x%x %s", (void *)(uintptr_t)LIGHT_SBMETA_ADDR, SBMETA_FILENAME);
printf("%s\n",cmd);
snprintf(cmd, sizeof(cmd), "ext4load mmc $mmcdev:%x 0x%p %s", SBMETA_PART, (void *)(uintptr_t)LIGHT_SBMETA_ADDR, SBMETA_FILENAME);
if (run_command(cmd, 0) != 0) {
/* if sbmeta doesn't exist, do secboot by default */
IMSG("SBMETA doesn't exist, go to verify tf/tee\r\n");
@@ -335,6 +324,7 @@ static int light_sbmetaboot(int argc, char *const argv[])
return 0;
}
/* initialize crypto algorithm interfaces */
if (csi_sec_init() != 0) {
return CMD_RET_FAILURE;

View File

@@ -14,9 +14,10 @@
#define MAX_DIGEST_SIZE 64
#define SBMETA_MAGIC 0x544D4253 /* = {'S', 'B', 'M', 'T'} */
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_RVBOOK)
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
#define LIGHT_SBMETA_ADDR 0x10000000
#endif
#define SBMETA_PART 5
#define ENTRY_SIZE 128
#define PLAIN_SBMETA_TEXT 4096
#define SBMETA_SIZE 4736 /* 4K SMBETA image + 640 footer */
@@ -26,8 +27,8 @@
#define SIGN_TYPE_NUM 6
#define SBMETA_FILENAME "sbmeta.bin"
#define SBMETA_SECURITY_LEVEL_SIGN 3 /* verify signature and hash */
#define SBMETA_SECURITY_LEVEL_HASH 2 /* verify checksum */
#define SBMETA_SECURITY_LEVEL_NONE 1 /* no verification */
#define SBMETA_SECURITY_LEVEL_H 3 /* verify signature and hash */
#define SBMETA_SECURITY_LEVEL_M 2 /* verify checksum */
#define SBMETA_SECURITY_LEVEL_L 1 /* no verification */
#endif

View File

@@ -75,7 +75,7 @@ void designware_get_mac_from_fuse(unsigned char *mac)
}
}
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_RVBOOK)
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
/* Secure function for image verificaiton here */
int get_image_version(unsigned long img_src_addr)
{

View File

@@ -338,37 +338,37 @@ int boundary_verify(unsigned long boundary) {
phys_addr_t verify_addr4 = (phys_addr_t)boundary + CONFIG_SYS_SDRAM_BASE;
// verify data accessing result firstly
writel(MAGIC_DATA2, verify_addr);
writel(MAGIC_DATA2, (void *)verify_addr);
invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
if (readl(verify_addr) != MAGIC_DATA2) {
if (readl((void *)verify_addr) != MAGIC_DATA2) {
printf("ddr rw test failed\n");
return -1;
}
writel(MAGIC_DATA, verify_addr); // writing at beginning
writel(MAGIC_DATA, (void *)verify_addr); // writing at beginning
invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
if (readl(verify_addr) != MAGIC_DATA) {
if (readl((void *)verify_addr) != MAGIC_DATA) {
printf("ddr rw test failed\n");
return -1;
}
writel(MAGIC_DATA2, verify_addr2); // writing at one-quarter addr
writel(MAGIC_DATA3, verify_addr3); // writing at half addr
writel(MAGIC_DATA2, (void *)verify_addr2); // writing at one-quarter addr
writel(MAGIC_DATA3, (void *)verify_addr3); // writing at half addr
invalidate_dcache_range(verify_addr, verify_addr + CONFIG_SYS_CACHELINE_SIZE);
invalidate_dcache_range(verify_addr2, verify_addr2 + CONFIG_SYS_CACHELINE_SIZE);
invalidate_dcache_range(verify_addr3, verify_addr3 + CONFIG_SYS_CACHELINE_SIZE);
if (boundary == (unsigned long)MAXIMAL_DDR_DENSITY_MB * UNIT_MB) { // boundary by design
if ((readl(verify_addr) == MAGIC_DATA) &&
(readl(verify_addr2) == MAGIC_DATA2) &&
(readl(verify_addr3) == MAGIC_DATA3))
if ((readl((void *)verify_addr) == MAGIC_DATA) &&
(readl((void *)verify_addr2) == MAGIC_DATA2) &&
(readl((void *)verify_addr3) == MAGIC_DATA3))
return 0;
}
else {
writel(MAGIC_DATA4, verify_addr4); // writing out of boundary
writel(MAGIC_DATA4, (void *)verify_addr4); // writing out of boundary
invalidate_dcache_range(verify_addr4, verify_addr4 + CONFIG_SYS_CACHELINE_SIZE);
if ((readl(verify_addr) == MAGIC_DATA4) && // overwrite by verify_addr4
(readl(verify_addr2) == MAGIC_DATA2) &&
(readl(verify_addr3) == MAGIC_DATA3) &&
(readl(verify_addr4) == MAGIC_DATA4))
if ((readl((void *)verify_addr) == MAGIC_DATA4) && // overwrite by verify_addr4
(readl((void *)verify_addr2) == MAGIC_DATA2) &&
(readl((void *)verify_addr3) == MAGIC_DATA3) &&
(readl((void *)verify_addr4) == MAGIC_DATA4))
return 0;
}
@@ -420,14 +420,14 @@ void cpu_performance_enable(void)
#define CSR_MHINT2_E 0x7cc
#define CSR_MHINT4 0x7ce
csr_write(CSR_SMPEN, 0x1);
csr_write(CSR_MCCR2, 0xe2490009);
csr_write(CSR_MXSTATUS, 0x638000);
csr_write(CSR_MHINT, 0x6e30c | (1<<21) | (1<<22)); // set bit21 & bit 22 to close tlb & fence broadcast
// FIXME: Clear bit[12] to disable L0BTB.
csr_write(CSR_MHCR, 0x17f); // clear bit7 to disable indirect brantch prediction
// FIXME set mhint2[22] to enable core icg en
csr_write(CSR_MHINT2_E, csr_read(CSR_MHINT2_E) | 0x420000);
csr_write(CSR_MHINT4, csr_read(CSR_MHINT4) | 0x410);
csr_write(CSR_MCCR2, 0xe2490009);
// FIXME: Clear bit[12] to disable L0BTB.
csr_write(CSR_MHCR, 0x17f); // clear bit7 to disable indirect brantch prediction
csr_write(CSR_MHINT, 0x6e30c | (1<<21) | (1<<22)); // set bit21 & bit 22 to close tlb & fence broadcast
mdelay(50); // workaround
}
static int bl1_img_have_head(unsigned long img_src_addr)
@@ -508,11 +508,7 @@ void board_init_f(ulong dummy)
}
#endif
ddr_clk_config(0);
#ifdef CONFIG_RV_BOOK
cpu_clk_config(750000000);
#else
cpu_clk_config(0);
#endif
init_ddr();
setup_ddr_scramble();

View File

@@ -20,106 +20,12 @@
#define LIGHT_APSYS_RSTGEN_ADDRBASE 0xffff015000
#define LIGHT_DPU_CLOCK_GATING_CTRL0 0xffef601A28
#define LIGHT_DPU_CLOCK_GATING_CTRL1 0xffef601A2C
#ifdef CONFIG_RV_BOOK
#define LIGHT_CPU_PLL_IDX(x) (x)
#endif
void show_sys_clk(void)
{
/* Do nothing for FPGA */
}
#ifdef CONFIG_RV_BOOK
static int _light_get_pllid(void)
{
unsigned int val;
int ret;
val = readl((void *)LIGHT_APCLK_ADDRBASE + 0x100);
if(val & 0x1)
ret = LIGHT_CPU_PLL_IDX(1);
else
ret = LIGHT_CPU_PLL_IDX(0);
return ret;
}
void update_cpu_freq(uint32_t val)
{
if(_light_get_pllid() == LIGHT_CPU_PLL_IDX(0))
{
/* update cpupll1*/
writel(0x20000000, (void *)LIGHT_APCLK_ADDRBASE + 0x14);
writel(val, (void *)LIGHT_APCLK_ADDRBASE + 0x10);
writel(0x23000000, (void *)LIGHT_APCLK_ADDRBASE + 0x14);
udelay(3);
writel(0x03000000, (void *)LIGHT_APCLK_ADDRBASE + 0x14);
readl((void *)LIGHT_APCLK_ADDRBASE + 0x80);
readl((void *)LIGHT_APCLK_ADDRBASE + 0x80);
while(!(readl((void *)LIGHT_APCLK_ADDRBASE + 0x80) & 0x10));
udelay(11);
}else{
/* update cpupll0*/
writel(0x20000000, (void *)LIGHT_APCLK_ADDRBASE + 0x04);
writel(val, (void *)LIGHT_APCLK_ADDRBASE + 0x00);
writel(0x23000000, (void *)LIGHT_APCLK_ADDRBASE + 0x04);
udelay(3);
writel(0x03000000, (void *)LIGHT_APCLK_ADDRBASE + 0x04);
readl((void *)LIGHT_APCLK_ADDRBASE + 0x80);
readl((void *)LIGHT_APCLK_ADDRBASE + 0x80);
while(!(readl((void *)LIGHT_APCLK_ADDRBASE + 0x80) & 0x02));
udelay(11);
}
}
void cpu_clk_config(int32_t cpu_freq)
{
#ifndef CONFIG_TARGET_LIGHT_FPGA_FM_C910 /* for sillicon */
unsigned int tmp;
switch(cpu_freq){
case 750000000:
{
/* 4. update c910_cclk to 750Mhz */
update_cpu_freq(0x1407d01);
/* config bus: cpu clk ratio to 1:1 */
writel((readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) & (~(0x7<<8))) | (0x0<<8), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // ratio=0
writel(readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) & (~(0x1<<11)), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=0
writel(readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) | (0x1<<11), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=1
printf("cpu frequency to 750\n");
}
break;
case 1500000000:
{
/* 4. update c910_cclk to 1.5Ghz */
update_cpu_freq(0x01207d01);
/* config bus: cpu clk ratio to 1:2 */
writel((readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) & (~(0x7<<8))) | (0x1<<8), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // ratio=0
writel(readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) & (~(0x1<<11)), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=0
writel(readl((const volatile void __iomem *)(LIGHT_APCLK_ADDRBASE + 0x100)) | (0x1<<11), (void *)(LIGHT_APCLK_ADDRBASE + 0x100)); // sync=1
printf("cpu frequency to 1500\n");
}
break;
default:
return;
}
if(_light_get_pllid() == LIGHT_CPU_PLL_IDX(0))
{
/* switch c910_cclk to cpu_pll1_foutpostdiv */
tmp = readl((void *)LIGHT_APCLK_ADDRBASE + 0x100);
tmp |= 0x1;
writel(tmp, (void *)LIGHT_APCLK_ADDRBASE + 0x100);
}else
{
/* switch c910_cclk to cpu_pll0_foutpostdiv */
tmp = readl((void *)LIGHT_APCLK_ADDRBASE + 0x100);
tmp &= ~0x1;
writel(tmp, (void *)LIGHT_APCLK_ADDRBASE + 0x100);
}
udelay(1);
#endif
}
#else
void cpu_clk_config(uint32_t cpu_freq)
{
#ifndef CONFIG_TARGET_LIGHT_FPGA_FM_C910 /* for sillicon */
@@ -148,7 +54,6 @@ void cpu_clk_config(uint32_t cpu_freq)
udelay(1);
#endif
}
#endif
void sys_clk_config(void)
{
@@ -431,24 +336,6 @@ void sys_clk_config(void)
#endif
}
#ifndef CONFIG_SPL_BUILD
static int cpu_switch_freq(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
cpu_clk_config(1500000000);
return 0;
}
U_BOOT_CMD(
cpufreq_switch,
2,
0,
cpu_switch_freq,
"switch cpu freq to highest",
""
);
#endif
void ddr_clk_config(int ddr_freq)
{
/* Do nothing for FPGA */

View File

@@ -375,6 +375,18 @@ config CMD_FDT
help
Do FDT related setup before booting into the Operating System.
config SUPPORT_EXTENSION_SCAN
bool
config CMD_EXTENSION
bool "Extension board management command"
select CMD_FDT
depends on SUPPORT_EXTENSION_SCAN
help
Enables the "extension" command, which allows to detect
extension boards connected to the system, and apply
corresponding Device Tree overlays.
config CMD_GO
bool "go"
default y

View File

@@ -48,6 +48,7 @@ ifdef CONFIG_POST
obj-$(CONFIG_CMD_DIAG) += diag.o
endif
obj-$(CONFIG_CMD_DTIMG) += dtimg.o
obj-$(CONFIG_CMD_EXTENSION) += extension_board.o
obj-$(CONFIG_CMD_ECHO) += echo.o
obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
obj-$(CONFIG_CMD_EEPROM) += eeprom.o
@@ -137,7 +138,6 @@ obj-$(CONFIG_CMD_TPM) += tpm-common.o
obj-$(CONFIG_CMD_TPM_V1) += tpm-v1.o
obj-$(CONFIG_CMD_TPM_TEST) += tpm_test.o
obj-$(CONFIG_CMD_TPM_V2) += tpm-v2.o
obj-$(CONFIG_CMD_MEASURED_BOOT) += mboot.o
obj-$(CONFIG_CMD_CROS_EC) += cros_ec.o
obj-$(CONFIG_CMD_TSI148) += tsi148.o
obj-$(CONFIG_CMD_UBI) += ubi.o

View File

@@ -237,15 +237,9 @@ static int prepare_data_from_vendor_boot(struct andr_img_hdr *hdr, int dtb_start
if (ramdisk_entry->ramdisk_type != VENDOR_RAMDISK_TYPE_RECOVERY) {
continue;
}
printf("find recovery from ramdisk table.\n");
printf("find recovery from ramdisk table.");
int ramdisk_start = env_get_hex(ENV_RAMDISK_ADDR, DEFAULT_RAMDISK_ADDR);
int recovery_ramdisk_offset = vendor_boot_pagesize * o + ramdisk_entry->ramdisk_offset;
printf("ramdisk_start:%x, ramdisk_size:%x, dtb_start:%x\n", ramdisk_start, ramdisk_entry->ramdisk_size, dtb_start);
if (ramdisk_start + ramdisk_entry->ramdisk_size > dtb_start) {
printf("ramdisk space are overlaped !!!\n");
}
memcpy((void *)(uint64_t)ramdisk_start, vendor_boot_data + recovery_ramdisk_offset,
ramdisk_entry->ramdisk_size);//ramdisk
//get bootconfig form vendor_boot.img and append bootconfig to ramdisk
@@ -298,10 +292,10 @@ static void prepare_loaded_parttion_data(const uint8_t* data, bool isRecovery)
printf("Boot image kernel_start:%x, kernel_offset:%x, kernel_size:%d\n", kernel_start, kernel_offset, hdr->kernel_size);
printf("Boot image ramdisk_start:%x, ramdisk_offset:%x, ramdisk_size:%d\n", ramdisk_start, ramdisk_offset, hdr->ramdisk_size);
printf("Boot image page_size:%d\n", hdr->page_size);
printf("dtb_start:%x, dtb_offset:%x, dtb_size:%d\n", dtb_start, dtb_offset, hdr->dtb_size);
printf("dtb_offset:%x, dtb_size:%d\n", dtb_offset, hdr->dtb_size);
if (kernel_start + hdr->kernel_size > ramdisk_start || kernel_start + hdr->kernel_size > dtb_start || ramdisk_start + hdr->ramdisk_size > dtb_start) {
printf("boot.img kernel space and ramdisk space are overlaped !!!\n");
if (kernel_start + hdr->kernel_size > ramdisk_start || kernel_start + hdr->kernel_size > dtb_start) {
printf("boot.img kernel space and ramdis space are overlaped !!!\n");
} else {
memcpy((void *)(uint64_t)kernel_start, data + kernel_offset, hdr->kernel_size);
if (!isRecovery) {

View File

@@ -118,7 +118,7 @@ U_BOOT_CMD(
#endif
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_RVBOOK)
#if CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_A) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_VAL_B) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_ANT_REF) || CONFIG_IS_ENABLED(LIGHT_SEC_BOOT_WITH_VERIFY_LPI4A)
#if CONFIG_IS_ENABLED(LIGHT_SEC_UPGRADE)
extern int light_secboot(int argc, char * const argv[]);
#endif
@@ -137,91 +137,6 @@ U_BOOT_CMD(
"vimage addr imgname[[tee/tf] - verify specifed image resides in addr\n"
);
/* check whether partition numbers are consistent with the slot suffix */
static int do_light_bootab(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
char *slot_suffix = env_get("slot_suffix");
int teepart = env_get_hex("mmcteepart", 3);
struct disk_partition part_info;
struct blk_desc *dev_desc;
int part = 0;
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (dev_desc == NULL) {
printf("Failed to find MMC device\n");
return 1;
}
if ((strcmp(slot_suffix, "a") == 0) && (teepart != 3)) {
part = part_get_info_by_name(dev_desc, "boot_a", &part_info);
if (part < 0) {
printf("Failed to find MMC device\n");
return 1;
}
env_set_hex("mmcbootpart", part);
part = part_get_info_by_name(dev_desc, "tee_a", &part_info);
if (part < 0) {
printf("Failed to find MMC device\n");
return 1;
}
env_set_hex("mmcteepart", part);
part = part_get_info_by_name(dev_desc, "sbmeta_a", &part_info);
if (part < 0) {
printf("Failed to find MMC device\n");
return 1;
}
env_set_hex("mmcsbmetapart", part);
part = part_get_info_by_name(dev_desc, "root_a", &part_info);
if (part < 0) {
printf("root AB partition is not enabled\n");
} else {
env_set_hex("mmcpart", part);
}
run_command("env save", 0);
} else if ((strcmp(slot_suffix, "b") == 0) && (teepart != 10)) {
part = part_get_info_by_name(dev_desc, "boot_b", &part_info);
if (part < 0) {
printf("Failed to find MMC device\n");
return 1;
}
env_set_hex("mmcbootpart", part);
part = part_get_info_by_name(dev_desc, "tee_b", &part_info);
if (part < 0) {
printf("Failed to find MMC device\n");
return 1;
}
env_set_hex("mmcteepart", part);
part = part_get_info_by_name(dev_desc, "sbmeta_b", &part_info);
if (part < 0) {
printf("Failed to find MMC device\n");
return 1;
}
env_set_hex("mmcsbmetapart", part);
part = part_get_info_by_name(dev_desc, "root_b", &part_info);
if (part < 0) {
printf("root AB partition is not enabled\n");
} else {
env_set_hex("mmcpart", part);
}
run_command("env save", 0);
}
printf("current active slot is:%s\n", slot_suffix);
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
light_bootab, CONFIG_SYS_MAXARGS, 1, do_light_bootab,
"Light A/B updates",
NULL
);
#endif
#endif

167
cmd/extension_board.c Normal file
View File

@@ -0,0 +1,167 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2021
* Köry Maincent, Bootlin, <kory.maincent@bootlin.com>
*/
#include <common.h>
#include <command.h>
#include <malloc.h>
#include <extension_board.h>
#include <mapmem.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
static LIST_HEAD(extension_list);
static int extension_apply(struct extension *extension)
{
char *overlay_cmd;
ulong extrasize, overlay_addr;
struct fdt_header *blob;
if (!working_fdt) {
printf("No FDT memory address configured. Please configure\n"
"the FDT address via \"fdt addr <address>\" command.\n");
return CMD_RET_FAILURE;
}
overlay_cmd = env_get("extension_overlay_cmd");
if (!overlay_cmd) {
printf("Environment extension_overlay_cmd is missing\n");
return CMD_RET_FAILURE;
}
overlay_addr = env_get_hex("extension_overlay_addr", 0);
if (!overlay_addr) {
printf("Environment extension_overlay_addr is missing\n");
return CMD_RET_FAILURE;
}
env_set("extension_overlay_name", extension->overlay);
if (run_command(overlay_cmd, 0) != 0)
return CMD_RET_FAILURE;
extrasize = env_get_hex("filesize", 0);
if (!extrasize)
return CMD_RET_FAILURE;
fdt_shrink_to_minimum(working_fdt, extrasize);
blob = map_sysmem(overlay_addr, 0);
if (!fdt_valid(&blob))
return CMD_RET_FAILURE;
/* apply method prints messages on error */
if (fdt_overlay_apply_verbose(working_fdt, blob))
return CMD_RET_FAILURE;
return CMD_RET_SUCCESS;
}
static int do_extension_list(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[])
{
int i = 0;
struct extension *extension;
if (list_empty(&extension_list)) {
printf("No extension registered - Please run \"extension scan\"\n");
return CMD_RET_SUCCESS;
}
list_for_each_entry(extension, &extension_list, list) {
printf("Extension %d: %s\n", i++, extension->name);
printf("\tManufacturer: \t\t%s\n", extension->owner);
printf("\tVersion: \t\t%s\n", extension->version);
printf("\tDevicetree overlay: \t%s\n", extension->overlay);
printf("\tOther information: \t%s\n", extension->other);
}
return CMD_RET_SUCCESS;
}
static int do_extension_scan(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[])
{
struct extension *extension, *next;
int extension_num;
list_for_each_entry_safe(extension, next, &extension_list, list) {
list_del(&extension->list);
free(extension);
}
extension_num = extension_board_scan(&extension_list);
if (extension_num < 0)
return CMD_RET_FAILURE;
printf("Found %d extension board(s).\n", extension_num);
return CMD_RET_SUCCESS;
}
static int do_extension_apply(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[])
{
struct extension *extension = NULL;
struct list_head *entry;
int i = 0, extension_id, ret;
if (argc < 2)
return CMD_RET_USAGE;
if (strcmp(argv[1], "all") == 0) {
list_for_each_entry(extension, &extension_list, list) {
ret = extension_apply(extension);
if (ret != CMD_RET_SUCCESS)
break;
}
} else {
extension_id = simple_strtol(argv[1], NULL, 10);
list_for_each(entry, &extension_list) {
if (i == extension_id) {
extension = list_entry(entry, struct extension, list);
break;
}
i++;
}
if (!extension) {
printf("Wrong extension number\n");
return CMD_RET_FAILURE;
}
ret = extension_apply(extension);
}
return ret;
}
static struct cmd_tbl cmd_extension[] = {
U_BOOT_CMD_MKENT(scan, 1, 1, do_extension_scan, "", ""),
U_BOOT_CMD_MKENT(list, 1, 0, do_extension_list, "", ""),
U_BOOT_CMD_MKENT(apply, 2, 0, do_extension_apply, "", ""),
};
static int do_extensionops(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
struct cmd_tbl *cp;
/* Drop the extension command */
argc--;
argv++;
cp = find_cmd_tbl(argv[0], cmd_extension, ARRAY_SIZE(cmd_extension));
if (cp)
return cp->cmd(cmdtp, flag, argc, argv);
return CMD_RET_USAGE;
}
U_BOOT_CMD(extension, 3, 1, do_extensionops,
"Extension board management sub system",
"scan - scan plugged extension(s) board(s)\n"
"extension list - lists available extension(s) board(s)\n"
"extension apply <extension number|all> - applies DT overlays corresponding to extension boards\n"
);

View File

@@ -27,7 +27,6 @@
*/
DECLARE_GLOBAL_DATA_PTR;
static int fdt_valid(struct fdt_header **blobp);
static int fdt_parse_prop(char *const*newval, int count, char *data, int *len);
static int fdt_print(const char *pathp, char *prop, int depth);
static int is_printable_string(const void *data, int len);
@@ -732,54 +731,6 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
/****************************************************************************/
/**
* fdt_valid() - Check if an FDT is valid. If not, change it to NULL
*
* @blobp: Pointer to FDT pointer
* @return 1 if OK, 0 if bad (in which case *blobp is set to NULL)
*/
static int fdt_valid(struct fdt_header **blobp)
{
const void *blob = *blobp;
int err;
if (blob == NULL) {
printf ("The address of the fdt is invalid (NULL).\n");
return 0;
}
err = fdt_check_header(blob);
if (err == 0)
return 1; /* valid */
if (err < 0) {
printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
/*
* Be more informative on bad version.
*/
if (err == -FDT_ERR_BADVERSION) {
if (fdt_version(blob) <
FDT_FIRST_SUPPORTED_VERSION) {
printf (" - too old, fdt %d < %d",
fdt_version(blob),
FDT_FIRST_SUPPORTED_VERSION);
}
if (fdt_last_comp_version(blob) >
FDT_LAST_SUPPORTED_VERSION) {
printf (" - too new, fdt %d > %d",
fdt_version(blob),
FDT_LAST_SUPPORTED_VERSION);
}
}
printf("\n");
*blobp = NULL;
return 0;
}
return 1;
}
/****************************************************************************/
/*
* Parse the user's input, partially heuristic. Valid formats:
* <0x00112233 4 05> - an array of cells. Numbers follow standard

View File

@@ -1,122 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2018 Bootlin
* Author: Miquel Raynal <miquel.raynal@bootlin.com>
*/
#include <common.h>
#include <dm.h>
#include <log.h>
#include <mapmem.h>
#include <tpm-common.h>
#include <tpm-v2.h>
#include <env.h>
#include <env_internal.h>
#include "tpm-user-utils.h"
#include "sec_library.h"
enum mboot_type {
UBOOT_IMAGE = 0,
KERNEL_IMAGE,
PARTITIONS_STR,
MBOOT_TYPE_MAX,
};
enum pcr_index {
PCR_0 = 0,
PCR_1,
PCR_2,
PCR_3,
PCR_4,
PCR_5,
PCR_6,
PCR_7,
};
static uint8_t image_digest[32] __attribute__((aligned(64))) = { 0 };
#define CHECK_RET_WITH_RET(x, ret) \
do { \
if (!(x)) { \
return ret; \
} \
} while (0)
static uint32_t hash_image_sha256(long image_addr, size_t size, void *digest, uint32_t *digest_len)
{
uint32_t ret;
sc_sha_t sha;
sc_sha_context_t ctx;
CHECK_RET_WITH_RET(ret = csi_sec_library_init(), ret);
CHECK_RET_WITH_RET(ret = sc_sha_init(&sha, 0), ret);
CHECK_RET_WITH_RET(ret = sc_sha_start(&sha, &ctx, SC_SHA_MODE_256), ret);
CHECK_RET_WITH_RET(ret = sc_sha_trans_config(&sha, &ctx, SC_SHA_DMA_MODE), ret);
CHECK_RET_WITH_RET(ret = sc_sha_update(&sha, &ctx, (void *)image_addr, size), ret);
CHECK_RET_WITH_RET(ret = sc_sha_finish(&sha, &ctx, digest, digest_len), ret);
return SC_OK;
}
static int do_measured_boot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
struct udevice *dev;
struct tpm_chip_priv *priv;
uint32_t index, type;
uint32_t rc;
int ret;
long image_addr = 0;
size_t image_size = 0;
uint32_t image_digest_len = 0;
char *partitions_str = NULL;
if (argc != 1)
return CMD_RET_USAGE;
ret = get_tpm(&dev);
if (ret)
return ret;
tpm_init(dev); /* Initialization TPM2 chip */
rc = tpm2_startup(dev, TPM2_SU_CLEAR); /* Startup TPM2 chip with mode TPM_ST_CLEAR*/
if (rc)
report_return_code(rc);
priv = dev_get_uclass_priv(dev);
if (!priv)
return -EINVAL;
for (type = UBOOT_IMAGE; type < MBOOT_TYPE_MAX; type++) {
if (type == UBOOT_IMAGE) { /*U-BOOT Image */
index = PCR_0;
image_addr = CONFIG_SPL_TEXT_BASE;
image_size = CONFIG_SPL_MAX_SIZE+CONFIG_SYS_MONITOR_LEN;
} else if (type == KERNEL_IMAGE) { /* KERNEL Image */
index = PCR_0;
image_addr = 0x00200000;
if (fs_set_blk_dev("mmc", "0:2", 2))
return -EINVAL;
if (fs_size("Image", &image_size) < 0)
return -EINVAL;
} else if (type == PARTITIONS_STR) { /* PARTITIONS */
index = PCR_5;
partitions_str = env_get("partitions");
image_addr = (long)partitions_str;
image_size = strlen(partitions_str);
}
rc = hash_image_sha256(image_addr, image_size, image_digest, &image_digest_len);
if (rc)
return -EINVAL;
rc = tpm2_pcr_extend(dev, index, image_digest);
if (rc)
break;
}
return report_return_code(rc);
}
U_BOOT_CMD(
measured_boot, CONFIG_SYS_MAXARGS, 1, do_measured_boot,
"extend hash(u-boot), hash(kernel), hash(partitions str) to pcr0 and pcr5",
""
);

View File

@@ -9,6 +9,8 @@
#include <malloc.h>
#include <mapmem.h>
#include <lcd.h>
#include <fdt_support.h>
#include <linux/libfdt.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <errno.h>
@@ -279,6 +281,9 @@ static void label_destroy(struct pxe_label *label)
if (label->fdtdir)
free(label->fdtdir);
if (label->fdtoverlays)
free(label->fdtoverlays);
free(label);
}
@@ -326,6 +331,92 @@ static int label_localboot(struct pxe_label *label)
return run_command_list(localcmd, strlen(localcmd), 0);
}
/*
* Loads fdt overlays specified in 'fdtoverlays'.
*/
#ifdef CONFIG_OF_LIBFDT_OVERLAY
static void label_boot_fdtoverlay(cmd_tbl_t *cmdtp, struct pxe_label *label)
{
char *fdtoverlay = label->fdtoverlays;
struct fdt_header *working_fdt;
char *fdtoverlay_addr_env;
ulong fdtoverlay_addr;
ulong fdt_addr;
int err;
/* Get the main fdt and map it */
fdt_addr = simple_strtoul(env_get("fdt_addr_r"), NULL, 16);
working_fdt = map_sysmem(fdt_addr, 0);
err = fdt_check_header(working_fdt);
if (err)
return;
/* Get the specific overlay loading address */
fdtoverlay_addr_env = env_get("fdtoverlay_addr_r");
if (!fdtoverlay_addr_env) {
printf("Invalid fdtoverlay_addr_r for loading overlays\n");
return;
}
fdtoverlay_addr = simple_strtoul(fdtoverlay_addr_env, NULL, 16);
/* Cycle over the overlay files and apply them in order */
do {
struct fdt_header *blob;
char *overlayfile;
char *end;
int len;
/* Drop leading spaces */
while (*fdtoverlay == ' ')
++fdtoverlay;
/* Copy a single filename if multiple provided */
end = strstr(fdtoverlay, " ");
if (end) {
len = (int)(end - fdtoverlay);
overlayfile = malloc(len + 1);
strncpy(overlayfile, fdtoverlay, len);
overlayfile[len] = '\0';
} else
overlayfile = fdtoverlay;
if (!strlen(overlayfile))
goto skip_overlay;
/* Load overlay file */
err = get_relfile_envaddr(cmdtp, overlayfile,
"fdtoverlay_addr_r");
if (err < 0) {
printf("Failed loading overlay %s\n", overlayfile);
goto skip_overlay;
}
/* Resize main fdt */
fdt_shrink_to_minimum(working_fdt, 8192);
blob = map_sysmem(fdtoverlay_addr, 0);
err = fdt_check_header(blob);
if (err) {
printf("Invalid overlay %s, skipping\n",
overlayfile);
goto skip_overlay;
}
err = fdt_overlay_apply_verbose(working_fdt, blob);
if (err) {
printf("Failed to apply overlay %s, skipping\n",
overlayfile);
goto skip_overlay;
}
skip_overlay:
if (end)
free(overlayfile);
} while ((fdtoverlay = strstr(fdtoverlay, " ")));
}
#endif
/*
* Boot according to the contents of a pxe_label.
*
@@ -520,6 +611,11 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
label->name);
goto cleanup;
}
#ifdef CONFIG_OF_LIBFDT_OVERLAY
if (label->fdtoverlays)
label_boot_fdtoverlay(cmdtp, label);
#endif
} else {
bootm_argv[3] = NULL;
}
@@ -577,6 +673,7 @@ enum token_type {
T_INCLUDE,
T_FDT,
T_FDTDIR,
T_FDTOVERLAYS,
T_ONTIMEOUT,
T_IPAPPEND,
T_BACKGROUND,
@@ -611,6 +708,7 @@ static const struct token keywords[] = {
{"fdt", T_FDT},
{"devicetreedir", T_FDTDIR},
{"fdtdir", T_FDTDIR},
{"fdtoverlays", T_FDTOVERLAYS},
{"ontimeout", T_ONTIMEOUT,},
{"ipappend", T_IPAPPEND,},
{"background", T_BACKGROUND,},
@@ -1043,6 +1141,11 @@ static int parse_label(char **c, struct pxe_menu *cfg)
err = parse_sliteral(c, &label->fdtdir);
break;
case T_FDTOVERLAYS:
if (!label->fdtoverlays)
err = parse_sliteral(c, &label->fdtoverlays);
break;
case T_LOCALBOOT:
label->localboot = 1;
err = parse_integer(c, &label->localboot_val);

View File

@@ -43,6 +43,7 @@ struct pxe_label {
char *initrd;
char *fdt;
char *fdtdir;
char *fdtoverlays;
int ipappend;
int attempted;
int localboot;

View File

@@ -1822,3 +1822,49 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto)
return err;
}
#endif
/**
* fdt_valid() - Check if an FDT is valid. If not, change it to NULL
*
* @blobp: Pointer to FDT pointer
* @return 1 if OK, 0 if bad (in which case *blobp is set to NULL)
*/
int fdt_valid(struct fdt_header **blobp)
{
const void *blob = *blobp;
int err;
if (!blob) {
printf("The address of the fdt is invalid (NULL).\n");
return 0;
}
err = fdt_check_header(blob);
if (err == 0)
return 1; /* valid */
if (err < 0) {
printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
/*
* Be more informative on bad version.
*/
if (err == -FDT_ERR_BADVERSION) {
if (fdt_version(blob) <
FDT_FIRST_SUPPORTED_VERSION) {
printf(" - too old, fdt %d < %d",
fdt_version(blob),
FDT_FIRST_SUPPORTED_VERSION);
}
if (fdt_last_comp_version(blob) >
FDT_LAST_SUPPORTED_VERSION) {
printf(" - too new, fdt %d > %d",
fdt_version(blob),
FDT_LAST_SUPPORTED_VERSION);
}
}
printf("\n");
*blobp = NULL;
return 0;
}
return 1;
}

View File

@@ -735,6 +735,30 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
jump_to_image_no_args(&spl_image);
}
static void print_ruyisdk_logo(void)
{
// _____ _ _____ _____ _ __
// | __ \ (_)/ ____| __ \| |/ /
// | |__) | _ _ _ _| (___ | | | | ' /
// | _ / | | | | | | |\___ \| | | | <
// | | \ \ |_| | |_| | |____) | |__| | . \
// |_| \_\__,_|\__, |_|_____/|_____/|_|\_\
// __/ |
// |___/
printf("-----------------------------------------\n");
printf(" _____ _ _____ _____ _ __\n");
printf(" | __ \\ (_)/ ____| __ \\| |/ /\n");
printf(" | |__) | _ _ _ _| (___ | | | | ' / \n");
printf(" | _ / | | | | | | |\\___ \\| | | | < \n");
printf(" | | \\ \\ |_| | |_| | |____) | |__| | . \\ \n");
printf(" |_| \\_\\__,_|\\__, |_|_____/|_____/|_|\\_\\\n");
printf(" __/ | \n");
printf(" |___/ \n");
printf(" -- Presented by ISCAS\n");
printf("-----------------------------------------\n");
}
#ifdef CONFIG_SPL_SERIAL_SUPPORT
/*
* This requires UART clocks to be enabled. In order for this to work the
@@ -748,6 +772,8 @@ void preloader_console_init(void)
gd->have_console = 1;
print_ruyisdk_logo();
#if CONFIG_IS_ENABLED(BANNER_PRINT)
puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "
U_BOOT_TIME " " U_BOOT_TZ ")\n");

View File

@@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_VAL_A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
@@ -17,7 +18,7 @@ CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="C910 Light# "
CONFIG_SYS_PROMPT="Light VAL-A# "
CONFIG_DDR_LP4X_3733_SINGLERANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
@@ -63,6 +64,7 @@ CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
@@ -85,9 +87,11 @@ CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_BOOT_FORCE_SEQ is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="light-a-val.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
@@ -107,5 +111,6 @@ CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -25,7 +25,6 @@ CONFIG_FIXUP_MEMORY_REGION=y
# CONFIG_CMD_TPM_V2 is not set
# CONFIG_CMD_TPM is not set
# CONFIG_CMD_TPM_TEST is not set
# CONFIG_CMD_MEASURED_BOOT is not set
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
@@ -115,5 +114,3 @@ CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
# CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION is not set
# CONFIG_FASTBOOT_ECIES_AUTH is not set

View File

@@ -107,5 +107,3 @@ CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
# CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION is not set
# CONFIG_FASTBOOT_ECIES_AUTH is not set

View File

@@ -6,39 +6,41 @@ CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_TARGET_LIGHT_FM_C910_BEAGLE=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_DDR_LP4X_3733_SINGLERANK=y
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-beaglev-ahead.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="C910 Light# "
CONFIG_DDR_LP4X_3733_SINGLERANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_SYS_PROMPT="Light AHead# "
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
CONFIG_CMD_BMP=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-a-val"
CONFIG_DEFAULT_DEVICE_TREE="light-beagle"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
@@ -47,11 +49,12 @@ CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
@@ -59,19 +62,21 @@ CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
@@ -82,25 +87,18 @@ CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -1,4 +1,3 @@
CONFIG_RV_BOOK=y
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
@@ -7,7 +6,7 @@ CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_RVBOOK=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
@@ -19,11 +18,11 @@ CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="C910 Light# "
CONFIG_SYS_PROMPT="Light LPI4A 16G# "
CONFIG_DDR_LP4X_3733_DUALRANK=y
CONFIG_DDR_DDP=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
@@ -38,7 +37,7 @@ CONFIG_DDR_PRBS_TEST=n
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="th1520-rvbook"
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
@@ -65,6 +64,7 @@ CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
@@ -84,9 +84,11 @@ CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lichee-pi-4a-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
@@ -98,7 +100,6 @@ CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
@@ -107,24 +108,7 @@ CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_TPM=y
CONFIG_TPM_V2=y
CONFIG_TPM_Z32H330TC_SPI=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_V2=y
CONFIG_CMD_TPM_TEST=y
CONFIG_DM_CHARGE_DISPLAY=y
CONFIG_CHARGE_ANIMATION=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_CW201X=y
CONFIG_CHARGER_BQ25700=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_DM_MCU=y
CONFIG_MCU_HC32fX=y
CONFIG_DM_POWER_DELIVERY=y
CONFIG_TYPEC_TCPM=y
CONFIG_TYPEC_TCPCI=y
CONFIG_TYPEC_HUSB311=y
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -19,7 +19,7 @@ CONFIG_SYS_PROMPT="C910 Light# "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_FIXUP_MEMORY_REGION=n
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
@@ -93,7 +93,7 @@ CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_JD9365DA=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y

View File

@@ -0,0 +1,114 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheeCluster4A 16G # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
CONFIG_DDR_DDP=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-cluster-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -0,0 +1,113 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheeCluster4A # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-cluster.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -0,0 +1,119 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheeConsole4A 16G # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
CONFIG_DDR_DDP=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-console-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -0,0 +1,118 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheeConsole4A # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-console.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -18,7 +18,7 @@ CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="C910 Light# "
CONFIG_SYS_PROMPT="Light LPI4A# "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
@@ -63,6 +63,7 @@ CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
@@ -85,9 +86,11 @@ CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lichee-pi-4a.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
@@ -101,7 +104,7 @@ CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=n
CONFIG_VIDEO_LCD_JD9365DA=y
CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
#CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
@@ -110,6 +113,6 @@ CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -1,4 +1,3 @@
CONFIG_RV_BOOK=y
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
@@ -7,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
@@ -18,11 +18,10 @@ CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="C910 Light# "
CONFIG_SYS_PROMPT="LicheeLaptop4A 16G # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
@@ -37,7 +36,7 @@ CONFIG_DDR_PRBS_TEST=n
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="th1520-rvbook"
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
@@ -64,6 +63,7 @@ CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
@@ -83,11 +83,11 @@ CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
CONFIG_LIGHT_SEC_BOOT_WITH_VERIFY_RVBOOK=y
CONFIG_LIGHT_SEC_UPGRADE=y
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-plastic-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
@@ -99,7 +99,6 @@ CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
@@ -108,25 +107,13 @@ CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_TPM=y
CONFIG_TPM_V2=y
CONFIG_TPM_Z32H330TC_SPI=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_V2=y
CONFIG_CMD_TPM_TEST=y
CONFIG_DM_CHARGE_DISPLAY=y
CONFIG_CHARGE_ANIMATION=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_CW201X=y
CONFIG_CHARGER_BQ25700=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_DM_MCU=y
CONFIG_MCU_HC32fX=y
CONFIG_DM_POWER_DELIVERY=y
CONFIG_TYPEC_TCPM=y
CONFIG_TYPEC_TCPCI=y
CONFIG_TYPEC_HUSB311=y
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -0,0 +1,119 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheeLaptop4A # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a-laptop"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-plastic.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -0,0 +1,119 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_TARGET_LIGHT_FM_C910_LPI4A=y
# CONFIG_THEAD_PLIC is not set
# CONFIG_THEAD_LIGHT_TIMER is not set
# CONFIG_THEAD_LIGHT_DIGITAL_SENSOR is not set
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="LicheePocket4A # "
CONFIG_DDR_LP4X_3733_DUALRANK=y
# CONFIG_DDR_LP4_3733_DUALRANK is not set
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MTD=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_DDR_PRBS_TEST=n
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-lpi4a"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_DWAPB_GPIO=y
# CONFIG_MMC_SPI is not set
CONFIG_MMC_VERBOSE=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MMC_RPMB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_USB_FUNCTION_MASS_STORAGE=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_LIGHT_SEC_BOOT is not set
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lpi4a-pocket.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_VIDEO=y
CONFIG_PHY=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CMD_BMP=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_DDR_REGU_0V6=600000
CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_DOS_PARTITION is not set
CONFIG_CMD_USB=y

View File

@@ -102,7 +102,7 @@ CONFIG_DM_PCA953X=y
CONFIG_VIDEO_VS_DPU=y
CONFIG_VIDEO_LCD_ILITEK_ILI9881C=n
CONFIG_VIDEO_LCD_JD9365DA=y
CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
#CONFIG_VIDEO_LCD_CUSTOM_LOGO=y
CONFIG_VIDEO_DW_DSI_LIGHT=y
CONFIG_VIDEO_DW_DPHY=y
CONFIG_VIDEO_DW_DSI_HOST=y
@@ -113,5 +113,3 @@ CONFIG_DDR_REGU_0V8=800000
CONFIG_DDR_REGU_1V1=1100000
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y
# CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION is not set
# CONFIG_FASTBOOT_ECIES_AUTH is not set

View File

@@ -0,0 +1,94 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
CONFIG_DDR_LP4X_3733_DUALRANK=y
CONFIG_DDR_DDP=y
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles-16g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="Milk-V Meles 16G# "
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC_SPI is not set
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -0,0 +1,89 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
CONFIG_DDR_LP4X_3733_SINGLERANK=y
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="Milk-V Meles# "
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC_SPI is not set
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set

View File

@@ -0,0 +1,93 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
CONFIG_DDR_LP4X_3733_DUALRANK=y
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="Milk-V Meles# "
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC_SPI is not set
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -0,0 +1,93 @@
CONFIG_RISCV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xe0000
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_SMP=y
CONFIG_TARGET_LIGHT_C910=y
CONFIG_PMIC_VOL_INIT=y
CONFIG_TARGET_LIGHT_FM_C910_MILKV_MELES=y
CONFIG_DDR_LP4X_3733_SINGLERANK=y
CONFIG_DDR_BOARD_CONFIG=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DEFAULT_FDT_FILE="thead/th1520-milkv-meles-4g.dtb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SYS_PROMPT="Milk-V Meles 4G# "
CONFIG_CMD_BOOT_SLAVE=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_DDR_SCAN=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_EMBED=y
CONFIG_DEFAULT_DEVICE_TREE="light-milkv-meles"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC_SPI is not set
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_SNPS=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_RTL8211X_PHY_FORCE_MASTER=y
CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_DESIGNWARE_QSPI=y
CONFIG_USB=y
CONFIG_USB_DWC3=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="U-Boot-THEAD"
CONFIG_USB_GADGET_VENDOR_NUM=0x1234
CONFIG_USB_GADGET_PRODUCT_NUM=0x8888
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set
CONFIG_BOARD_RNG_SEED=y
CONFIG_FIXUP_MEMORY_REGION=y
CONFIG_MISC=y
CONFIG_LIGHT_AON_CONF=y

View File

@@ -6,6 +6,7 @@ CONFIG_FIT_SIGNATURE=y
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXTENSION is not set
# CONFIG_CMD_DATE is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_HOSTFILE=y

View File

@@ -89,6 +89,9 @@ pxe boot
fdt_addr - the location of a fdt blob. 'fdt_addr' will be passed to bootm
command if it is set and 'fdt_addr_r' is not passed to bootm command.
fdtoverlay_addr_r - location in RAM at which 'pxe boot' will temporarily store
fdt overlay(s) before applying them to the fdt blob stored at 'fdt_addr_r'.
pxe file format
===============
The pxe file format is nearly a subset of the PXELINUX file format; see
@@ -148,6 +151,12 @@ kernel <path> - if this label is chosen, use tftp to retrieve the kernel
It useful for overlay selection in pxe file
(see: doc/uImage.FIT/overlay-fdt-boot.txt)
fdtoverlays <path> [...] - if this label is chosen, use tftp to retrieve the DT
overlay(s) at <path>. it will be temporarily stored at the
address indicated in the fdtoverlay_addr_r environment variable,
and then applied in the load order to the fdt blob stored at the
address indicated in the fdt_addr_r environment variable.
append <string> - use <string> as the kernel command line when booting this
label.

111
doc/usage/extension.rst Normal file
View File

@@ -0,0 +1,111 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2021, Kory Maincent <kory.maincent@bootlin.com>
U-Boot extension board usage (CONFIG_EXTENSION)
===============================================
Synopsis
--------
::
extension scan
extension list
extension apply <extension number|all>
Description
-----------
The "extension" command proposes a generic U-Boot mechanism to detect
extension boards connected to the HW platform, and apply the appropriate
Device Tree overlays depending on the detected extension boards.
The "extension" command comes with three sub-commands:
- "extension scan" makes the generic code call the board-specific
extension_board_scan() function to retrieve the list of detected
extension boards.
- "extension list" allows to list the detected extension boards.
- "extension apply <number>|all" allows to apply the Device Tree
overlay(s) corresponding to one, or all, extension boards
The latter requires two environment variables to exist:
- extension_overlay_addr: the RAM address where to load the Device
Tree overlays
- extension_overlay_cmd: the U-Boot command to load one overlay.
Indeed, the location and mechanism to load DT overlays is very setup
specific.
In order to enable this mechanism, board-specific code must implement
the extension_board_scan() function that fills in a linked list of
"struct extension", each describing one extension board. In addition,
the board-specific code must select the SUPPORT_EXTENSION_SCAN Kconfig
boolean.
Usage example
-------------
1. Make sure your devicetree is loaded and set as the working fdt tree.
::
=> run loadfdt
=> fdt addr $fdtaddr
2. Prepare the environment variables
::
=> setenv extension_overlay_addr 0x88080000
=> setenv extension_overlay_cmd 'load mmc 0:1 ${extension_overlay_addr} /boot/${extension_overlay_name}'
3. Detect the plugged extension board
::
=> extension scan
4. List the plugged extension board information and the devicetree
overlay name
::
=> extension list
5. Apply the appropriate devicetree overlay
For apply the selected overlay:
::
=> extension apply 0
For apply all the overlays:
::
=> extension apply all
Simple extension_board_scan function example
--------------------------------------------
.. code-block:: c
int extension_board_scan(struct list_head *extension_list)
{
struct extension *extension;
extension = calloc(1, sizeof(struct extension));
snprintf(extension->overlay, sizeof(extension->overlay), "overlay.dtbo");
snprintf(extension->name, sizeof(extension->name), "extension board");
snprintf(extension->owner, sizeof(extension->owner), "sandbox");
snprintf(extension->version, sizeof(extension->version), "1.1");
snprintf(extension->other, sizeof(extension->other), "Extension board information");
list_add_tail(&extension->list, extension_list);
return 1;
}

View File

@@ -130,8 +130,6 @@ source "drivers/w1-eeprom/Kconfig"
source "drivers/watchdog/Kconfig"
source "drivers/mcu/Kconfig"
config PHYS_TO_BUS
bool "Custom physical to bus address mapping"
help

View File

@@ -85,9 +85,6 @@ obj-y += misc/
obj-$(CONFIG_MMC) += mmc/
obj-$(CONFIG_NVME) += nvme/
obj-$(CONFIG_PCI_ENDPOINT) += pci_endpoint/
ifdef CONFIG_RV_BOOK
obj-$(CONFIG_DM_POWER_DELIVERY) += power/power_delivery/
endif
obj-y += dfu/
obj-$(CONFIG_PCH) += pch/
obj-y += phy/allwinner/

View File

@@ -135,14 +135,6 @@ config FASTBOOT_CMD_OEM_FORMAT
relies on the env variable partitions to contain the list of
partitions as required by the gpt command.
config FASTBOOT_CMD_OEM_NV_OPERATION
bool "Enable the 'oem nv get/set' command"
help
Add support for the "oem get/set" command from a client.
config FASTBOOT_ECIES_AUTH
bool "Enabled ecies fastboot auth"
endif # FASTBOOT
endmenu

View File

@@ -3,7 +3,5 @@
obj-y += fb_common.o
obj-y += fb_getvar.o
obj-y += fb_command.o
obj-$(CONFIG_FASTBOOT_ECIES_AUTH) += fb_ecies.o
obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fb_mmc.o
obj-$(CONFIG_FASTBOOT_FLASH_NAND) += fb_nand.o
obj-$(CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION) += fb_nv_operation.o

View File

@@ -45,19 +45,6 @@ static void oem_format(char *, char *);
static void oem_command(char *, char *);
int image_have_head(unsigned long img_src_addr);
#if CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION
void oem_nv_get_proccess(char *cmd_parameter, char *response);
void oem_nv_set_proccess(char *cmd_parameter, char *response);
void oem_nv_factory_recovery_process(char *cmd_parameter, char *response);
static void oem_nv_get(char *cmd_parameter, char *response);
static void oem_nv_set(char *cmd_parameter, char *response);
static void oem_fcty(char *cmd_parameter, char *response);
#endif
#ifdef CONFIG_FASTBOOT_ECIES_AUTH
int ecies_process_data(uint8_t * data, int data_size,char *response);
#endif
static const struct {
const char *command;
void (*dispatch)(char *cmd_parameter, char *response);
@@ -110,20 +97,6 @@ static const struct {
.command = "oem command",
.dispatch = oem_command,
},
#if CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION
[FASTBOOT_COMMAND_OEM_NV_GET] = {
.command = "oem nv get",
.dispatch = oem_nv_get,
},
[FASTBOOT_COMMAND_OEM_NV_SET] = {
.command = "oem nv set",
.dispatch = oem_nv_set,
},
[FASTBOOT_COMMAND_OEM_FCTY] = {
.command = "oem fcty",
.dispatch = oem_fcty,
},
#endif
};
/**
@@ -321,90 +294,7 @@ int check_image_board_id(uint8_t *image_data)
return 0;
}
int hibernate_image_cleaned_flag = 0;
void clean_hibernate_image_header(char *response)
{
struct blk_desc *dev_desc;
disk_partition_t info;
if(0x03 == hibernate_image_cleaned_flag) //already erased all
{
return;
}
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
fastboot_fail("invalid mmc device", response);
return;
}
char * buf = memalign(CONFIG_SYS_CACHELINE_SIZE,4096);
if(!buf) {
printf(" mem alloc for hibernate partition header failed!\n");
return;
}
/* if fastresume partition exists, earse the old image header */
if(part_get_info_by_name(dev_desc, "fastresume", &info)) {
printf(" find fastresume partition , erase the header:\n");
memset(buf,0xff,4096);
if(blk_dwrite(dev_desc, info.start, 4096/info.blksz, buf) != 4096/info.blksz)
{
printf(" fastresume header write failed!\n");
hibernate_image_cleaned_flag = 0;
}
else
{
hibernate_image_cleaned_flag |= 0x1;
}
}
/* if swap partition exists, earse the old image header */
if(part_get_info_by_name(dev_desc, "swap", &info)) {
printf(" find swap partition , erase the header:\n");
memset(buf,0xff,4096);
if(blk_dwrite(dev_desc, info.start, 4096/info.blksz, buf) != 4096/info.blksz)
{
printf(" swap header write failed!\n");
hibernate_image_cleaned_flag = 0;
}
else
{
hibernate_image_cleaned_flag |= 0x2;
}
}
free(buf);
}
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
void fasboot_uboot_write_process(void *buf, char *response)
{
char cmdbuf[32];
u32 block_cnt;
struct blk_desc *dev_desc;
int ret = 0;
disk_partition_t info;
ret = check_image_board_id(buf);
if (ret != 0) {
fastboot_fail("U-BOOT image does not match the type of BOARD", response);
return;
}
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
fastboot_fail("invalid mmc device", response);
return;
}
run_command("mmc partconf 0 1 0 1", 0);
block_cnt = image_size / BLOCK_SIZE;
if (image_size % BLOCK_SIZE) {
block_cnt = block_cnt +1;
}
sprintf(cmdbuf, "mmc write 0x%p 0 %x", buf, block_cnt);
run_command(cmdbuf, 0);
run_command("mmc partconf 0 1 0 0", 0);
}
/**
* flash() - write the downloaded image to the indicated partition.
*
@@ -418,10 +308,36 @@ static void flash(char *cmd_parameter, char *response)
{
#ifdef THEAD_LIGHT_FASTBOOT
char cmdbuf[32];
u32 block_cnt;
struct blk_desc *dev_desc;
disk_partition_t info;
int ret = 0;
if (strcmp(cmd_parameter, "uboot") == 0) {
fasboot_uboot_write_process(fastboot_buf_addr, response);
ret = check_image_board_id(fastboot_buf_addr);
if (ret != 0) {
fastboot_fail("U-BOOT image does not match the type of BOARD", response);
return;
}
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
fastboot_fail("invalid mmc device", response);
return;
}
run_command("mmc partconf 0 1 0 1", 0);
block_cnt = image_size / BLOCK_SIZE;
if (image_size % BLOCK_SIZE) {
block_cnt = block_cnt +1;
}
sprintf(cmdbuf, "mmc write 0x%p 0 %x", fastboot_buf_addr, block_cnt);
run_command(cmdbuf, 0);
run_command("mmc partconf 0 1 0 0", 0);
} else if ((strcmp(cmd_parameter, "fw") == 0)) {
memcpy((void *)LIGHT_FW_ADDR, fastboot_buf_addr, image_size);
} else if ((strcmp(cmd_parameter, "uImage") == 0)) {
@@ -436,15 +352,13 @@ static void flash(char *cmd_parameter, char *response)
memcpy((void *)LIGHT_TF_FW_ADDR, fastboot_buf_addr, image_size);
} else if ((strcmp(cmd_parameter, TEE_PART_NAME) == 0)) {
memcpy((void *)LIGHT_TEE_FW_ADDR, fastboot_buf_addr, image_size);
}
#ifdef CONFIG_RV_BOOK
else if ((strcmp(cmd_parameter, "boot") == 0)) {
} else if ((strcmp(cmd_parameter, "boot") == 0)) {
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
fastboot_fail("invalid mmc device", response);
return;
}
/* if fastresume partition exists, earse the old image header */
fastboot_fail("invalid mmc device", response);
return;
}
/* if fastresume partition exists, earse the old image header */
if(part_get_info_by_name(dev_desc, "fastresume", &info)) {
printf(" find fastresume partition , erase the header:\n");
char * buf = memalign(CONFIG_SYS_CACHELINE_SIZE,4096);
@@ -457,22 +371,6 @@ static void flash(char *cmd_parameter, char *response)
free(buf);
}
}
#endif
#ifdef CONFIG_FASTBOOT_ECIES_AUTH
else if ((strcmp(cmd_parameter, "ecies") == 0)) {
ecies_process_data(fastboot_buf_addr, image_size,response);
return;
}
#endif
//If version is updated, hibernate image may not compatible with current,erase it.
if ((strcmp(cmd_parameter, "boot") == 0)
|| (strcmp(cmd_parameter, "uboot") == 0)
|| (strcmp(cmd_parameter, "root") == 0)) {
clean_hibernate_image_header(response);
}
if(strcmp(cmd_parameter, "uboot") == 0 || (strcmp(cmd_parameter, "fw") == 0) ||
(strcmp(cmd_parameter, "uImage") == 0) || (strcmp(cmd_parameter, "dtb") == 0) ||
(strcmp(cmd_parameter, "rootfs") == 0) || (strcmp(cmd_parameter, "aon") == 0)) {
@@ -482,7 +380,54 @@ static void flash(char *cmd_parameter, char *response)
#endif
#if CONFIG_IS_ENABLED(LIGHT_SEC_UPGRADE)
if (strcmp(cmd_parameter, UBOOT_IMG_UPD_NAME) == 0) {
if(strcmp(cmd_parameter, TF_IMG_UPD_NAME) == 0) {
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)
/* tee/tf/uboot image must be written into stash partition */
sprintf(cmdbuf, "%s", STASH_PART_NAME);
fastboot_mmc_flash_write(cmdbuf, fastboot_buf_addr, image_size, response);
#endif
/* Send ACK to host */
fastboot_okay(NULL, response);
/* set secure upgrade flag to indicate it is TF image upgrade*/
sprintf(cmdbuf,"env set sec_upgrade_mode 0x%x", TF_SEC_UPGRADE_FLAG);
run_command(cmdbuf, 0);
run_command("saveenv", 0);
run_command("reset", 0);
return;
} else if (strcmp(cmd_parameter, TEE_IMG_UPD_NAME) == 0) {
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)
/* tee/tf/uboot image must be written into stash partition */
sprintf(cmdbuf, "%s", STASH_PART_NAME);
fastboot_mmc_flash_write(cmdbuf, fastboot_buf_addr, image_size, response);
#endif
/* Send ACK to host */
fastboot_okay(NULL, response);
/* set secure upgrade flag to indicate it is TEE image upgrade*/
sprintf(cmdbuf,"env set sec_upgrade_mode 0x%x", TEE_SEC_UPGRADE_FLAG);
run_command(cmdbuf, 0);
run_command("saveenv", 0);
run_command("reset", 0);
return;
} else if (strcmp(cmd_parameter, SBMETA_IMG_UPD_NAME) == 0) {
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)
/* tee/tf/uboot image must be written into stash partition */
sprintf(cmdbuf, "%s", STASH_PART_NAME);
fastboot_mmc_flash_write(cmdbuf, fastboot_buf_addr, image_size, response);
#endif
/* Send ACK to host */
fastboot_okay(NULL, response);
/* set secure upgrade flag to indicate it is TEE image upgrade*/
sprintf(cmdbuf,"env set sec_upgrade_mode 0x%x", SBMETA_SEC_UPGRADE_FLAG);
run_command(cmdbuf, 0);
run_command("saveenv", 0);
run_command("reset", 0);
return;
} else if (strcmp(cmd_parameter, UBOOT_IMG_UPD_NAME) == 0) {
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)
env_set_hex("ubootupdsize", image_size);
@@ -585,38 +530,3 @@ static void oem_command(char *cmd_parameter, char *response)
else
fastboot_okay(NULL, response);
}
#if CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION
/**
* oem_nv_get() - Execute the OEM NV GET command
*
* @cmd_parameter: Pointer to command parameter
* @response: Pointer to fastboot response buffer
*/
static void oem_nv_get(char *cmd_parameter, char *response)
{
oem_nv_get_proccess(cmd_parameter,response);
}
/**
* oem_nv_set() - Execute the OEM NV Set command
*
* @cmd_parameter: Pointer to command parameter
* @response: Pointer to fastboot response buffer
*/
static void oem_nv_set(char *cmd_parameter, char *response)
{
oem_nv_set_proccess(cmd_parameter,response);
}
/**
* oem_fcty() - Execute the OEM fcty command
*
* @cmd_parameter: Pointer to command parameter
* @response: Pointer to fastboot response buffer
*/
static void oem_fcty(char *cmd_parameter, char *response)
{
oem_nv_factory_recovery_process(cmd_parameter,response);
}
#endif

View File

@@ -1,198 +0,0 @@
#include <sec_ecies_session.h>
#include <common.h>
#include <command.h>
#include <env.h>
#include <fastboot.h>
#include <fastboot-internal.h>
#include <fb_mmc.h>
#include <fb_nand.h>
#include <part.h>
#include <stdlib.h>
#include <csi_sec_img_verify.h>
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
extern void fasboot_uboot_write_process(void *buf, char *response);
#define MAX_ECIES_IMAGE_SIZE (9*1024*1024)
#define ECIES_MALLOC_START (MAX_ECIES_IMAGE_SIZE * 2)
typedef struct {
uint32_t magic;
uint32_t file_size;
char partition_name[64];
} __attribute__((__packed__)) send_file_info_t;
static uint32_t ecies_file_pos = 0;
static int slave_init = 0;
static int current_pos = 0;
void *csi_ecies_malloc(uint32_t size)
{
void * ptr = NULL;
if (current_pos + size >= CONFIG_FASTBOOT_BUF_SIZE) {
current_pos = 0;
}
ptr = (void *)(long)(CONFIG_FASTBOOT_BUF_ADDR + ECIES_MALLOC_START + current_pos);
current_pos += size;
return ptr;
};
void csi_ecies_free(void *buffer)
{
return;
};
static int ecies_data_write(uint8_t *buf,uint8_t *data,int data_len)
{
char response[FASTBOOT_RESPONSE_LEN];
if (data_len == 0 || buf == NULL || data == NULL) {
return -1;
}
memcpy(buf + ecies_file_pos,data,data_len);
ecies_file_pos += data_len;
if (ecies_file_pos == sizeof(send_file_info_t) + ((send_file_info_t *)buf)->file_size) {
if (strcmp(((send_file_info_t *)buf)->partition_name, TEE_PART_NAME) == 0) {
memcpy((void *)LIGHT_TEE_FW_ADDR, buf + sizeof(send_file_info_t), ((send_file_info_t *)buf)->file_size);
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)
fastboot_mmc_flash_write(((send_file_info_t *)buf)->partition_name, buf + sizeof(send_file_info_t), ((send_file_info_t *)buf)->file_size,
response);
#endif
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND)
fastboot_nand_flash_write(((send_file_info_t *)buf)->partition_name, buf + sizeof(send_file_info_t), ((send_file_info_t *)buf)->file_size,
response);
#endif
} else if (strcmp(((send_file_info_t *)buf)->partition_name, UBOOT_PART_NAME) == 0) {
fasboot_uboot_write_process(buf + sizeof(send_file_info_t),response);
} else {
printf("unknown partition name\n");
return -2;
}
ecies_file_pos = 0;
} else if(ecies_file_pos > sizeof(send_file_info_t) + ((send_file_info_t *)buf)->file_size) {
return -3;
}
return 0;
}
static void hex_to_str(char *dest, const uint8_t *src, int len)
{
char ddl = 0;
char ddh = 0;
int i = 0;
for (i = 0; i < len; i++) {
ddh = 48 + src[i] / 16;
ddl = 48 + src[i] % 16;
if (ddh > 57) {
ddh = ddh + 7;
}
if (ddl > 57) {
ddl = ddl + 7;
}
dest[i * 2] = ddh;
dest[i * 2 + 1] = ddl;
}
dest[len * 2] = '\0';
}
int ecies_process_data(uint8_t * data, int data_size,char *response)
{
static ecies_session_t ss_slave;
char apduResponse[ECIES_INIT_RESPONSE_LEN] = {0};
uint8_t *plaintext = csi_ecies_malloc(MAX_ECIES_IMAGE_SIZE);
uint32_t plaintextLen = 0;
uint32_t apduResponseLen = 0;
int ret = 0;
uint8_t cla = 0;
uint8_t errcode = 0;
if (plaintext == NULL) {
ret = -1;
goto end;
}
if (!slave_init) {
csi_sec_library_init();
ret = hal_ecies_slave_init(&ss_slave);
if (ret != 0) {
strcpy(response,"hal_ecies_slave_init ERROR");
ret = -2;
goto end;
}
}
ret = hal_ecies_slave_session_comm(&ss_slave, data, data_size, (uint8_t *)apduResponse, &apduResponseLen, plaintext, &plaintextLen);
if (ret != 0) {
ret = hal_ecies_status_get((uint8_t *)apduResponse, apduResponseLen, &cla, &errcode);
if (ret != 0) {
strcpy(response,"hal_ecies_errcode_get ERROR");
ret = -3;
goto end;
}
if (cla == ECIES_CLA_INITIALIZE_UPDATE_RESPONSE && errcode == ECIES_RESPONSE_SESSION_OPENED_ERROR) {
slave_init = 0;
ecies_file_pos = 0;
hal_ecies_slave_uninit(&ss_slave);
ret = hal_ecies_slave_init(&ss_slave);
if (ret != 0) {
strcpy(response,"hal_ecies_slave_init ERROR");
ret = -4;
goto end;
}
ret = hal_ecies_slave_session_comm(&ss_slave, data, data_size, (uint8_t*)apduResponse, &apduResponseLen, plaintext, &plaintextLen);
if (ret != 0) {
strcpy(response,"hal_ecies_slave_session_comm ERROR");
ret = -5;
goto end;
}
} else if(errcode != ECIES_RESPONSE_OK) {
if (errcode == ECIES_CLA_SDATA_SEND_RESPONSE) {
strcpy(response,"ECIES_CLA_SDATA_SEND_RESPONSE ERROR");
ret = -6;
goto end;
} else if (errcode == ECIES_CLA_SESSION_CLOSE) {
strcpy(response,"ECIES_CLA_SESSION_CLOSE ERROR");
ret = -7;
goto end;
} else if (errcode == ECIES_CLA_INITIALIZE_UPDATE) {
strcpy(response,"ECIES_CLA_INITIALIZE_UPDATE ERROR");
ret = -8;
goto end;
}
}
}
if (slave_init && plaintextLen) {
ret = ecies_data_write((uint8_t*)(long)(CONFIG_FASTBOOT_BUF_ADDR + MAX_ECIES_IMAGE_SIZE),plaintext,plaintextLen);
if (ret != 0) {
strcpy(response,"ecies_data_write ERROR");
ret = -8;
goto end;
}
}
slave_init = 1;
strcpy(response,"SUCCESS:");
hex_to_str(response + strlen(response),(uint8_t*)apduResponse,apduResponseLen);
ret = 0;
end:
if (plaintext) {
csi_ecies_free(plaintext);
plaintext = NULL;
}
return ret;
}
#endif

View File

@@ -1,342 +0,0 @@
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <common.h>
#include <fb_mmc.h>
#include <command.h>
#include <asm/io.h>
#include <asm/types.h>
#include <configs/light-c910.h>
#include <thead/clock_config.h>
#include <linux/bitops.h>
#include <asm/arch-thead/light-iopmp.h>
#include "../lib/sec_library/include/soc.h"
#define MAX_NV_NUMBER_SIZE 32
#define MAX_NV_DATA_SIZE 128
#define NV_BLOCK_SIZE 512
extern int32_t wj_efuse_get_lc(long unsigned int, int *lc);
typedef enum {
FB_SYS_ACTION_FACTORY_RECOVER,
FB_SYS_ACTION_READ_EFUSE,
} fb_sys_action_t;
static int nv_get(uint8_t *data,int offset,int data_len)
{
struct blk_desc *dev_desc;
struct disk_partition part_info;
ulong block_start;
uint8_t data_nv[NV_BLOCK_SIZE] = {0};
int ret;
int n;
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (dev_desc == NULL) {
return -1;
}
ret = part_get_info_by_name(dev_desc, NV_PARTITION_NAME, &part_info);
if (ret < 0) {
return -2;
}
if(NV_BLOCK_SIZE != dev_desc->blksz) {
return -4;
}
block_start = part_info.start + offset / dev_desc->blksz;
n = blk_dread(dev_desc, block_start, 1, data_nv);
if (n != 1) {
return -5;
}
memcpy(data,data_nv + offset % NV_BLOCK_SIZE,data_len);
return 0;
}
static int nv_set(uint8_t *data,int offset,int data_len)
{
struct blk_desc *dev_desc;
struct disk_partition part_info;
ulong block_start;
uint8_t data_nv[NV_BLOCK_SIZE] = {0};
int ret;
int n;
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (dev_desc == NULL) {
return -1;
}
ret = part_get_info_by_name(dev_desc, NV_PARTITION_NAME, &part_info);
if (ret < 0) {
return -2;
}
if (NV_BLOCK_SIZE != dev_desc->blksz) {
return -3;
}
block_start = part_info.start + offset / dev_desc->blksz;
n = blk_dread(dev_desc, block_start, 1, data_nv);
if (n != 1) {
return -4;
}
memcpy(data_nv + offset % NV_BLOCK_SIZE,data,data_len);
n = blk_dwrite(dev_desc, block_start, 1, data_nv);
if (n != 1) {
return -5;
}
return 0;
}
static int factory_recovery(char *response)
{
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)
fastboot_mmc_erase("metadata", response);
if (strcmp(response, "OKAY") != 0) {
return -1;
}
fastboot_mmc_erase("misc", response);
if (strcmp(response, "OKAY") != 0) {
return -2;
}
#endif
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND)
fastboot_nand_erase("metadata", response);
if (strcmp(response, "OKAY") != 0) {
return -3;
}
fastboot_nand_erase("misc", response);
if (strcmp(response, "OKAY") != 0) {
return -4;
}
#endif
strcpy(response,"OKAY");
return 0;
}
static int read_efuse_status(char *response)
{
int ret;
int lc = 0;
ret = wj_efuse_get_lc(WJ_EFUSE_BASE, &lc);
if (ret) {
return -1;
}
if(lc == 0) {
strcpy(response,"LC_INIT");
} else {
strcpy(response,"LC_BLOWNED");
}
return 0;
}
static int sys_action(int flag,char *response)
{
if (flag == FB_SYS_ACTION_FACTORY_RECOVER) {
return factory_recovery(response);
} else if (flag == FB_SYS_ACTION_READ_EFUSE) {
return read_efuse_status(response);
} else {
return -1;
}
return 0;
}
static int toupper(int c)
{
if (c >= 'a' && c <= 'z') {
return c - 32;
}
return c;
}
static void str_to_hex(uint8_t *dest, const char *src, int len)
{
char h1, h2;
unsigned char s1, s2;
for (int i = 0; i < len; i++) {
h1 = src[2 * i];
h2 = src[2 * i + 1];
s1 = toupper(h1) - 48;
s2 = toupper(h2) - 48;
if (s1 > 9) {
s1 = s1 - 7;
}
if (s2 > 9) {
s2 = s2 - 7;
}
dest[i] = s1 * 16 + s2;
}
}
static void hex_to_str(char *dest, const uint8_t *src, int len)
{
char ddl = 0;
char ddh = 0;
int i = 0;
for (i = 0; i < len; i++) {
ddh = 48 + src[i] / 16;
ddl = 48 + src[i] % 16;
if (ddh > 57) {
ddh = ddh + 7;
}
if (ddl > 57) {
ddl = ddl + 7;
}
dest[i * 2] = ddh;
dest[i * 2 + 1] = ddl;
}
dest[len * 2] = '\0';
}
static int char_to_int(char *data,int *out)
{
*out = 0;
while(*data) {
if(*data < '0' || *data > '9')
return -1;
*out = *out * 10 + (*data - '0');
++data;
}
return 0;
}
#if CONFIG_FASTBOOT_CMD_OEM_NV_OPERATION
void oem_nv_factory_recovery_process(char *cmd_parameter, char *response)
{
int ret = 0;
int flag = 0;
ret = char_to_int(cmd_parameter,&flag);
if (ret != 0) {
strcpy(response,"ERROR FLAG INVALID");
return;
}
ret = sys_action(flag,response);
if (ret != 0) {
strcpy(response,"ERROR SYS ACTION FAILED");
return;
}
}
void oem_nv_get_proccess(char *cmd_parameter, char *response)
{
char *sep = NULL;
char offset[MAX_NV_NUMBER_SIZE] = {0};
char len[MAX_NV_NUMBER_SIZE] = {0};
int sep_pos = 0;
uint8_t nv_data[MAX_NV_DATA_SIZE + 32] = {0};
char nv_data_str[MAX_NV_DATA_SIZE * 2 + 1] = {0};
int ret;
int offset_int = 0;
int len_int = 0;
sep = strstr(cmd_parameter, ":");
if (sep == NULL) {
strcpy(response,"ERROR INVALID PARAM");
return;
}
sep_pos = sep - cmd_parameter;
memcpy(offset,cmd_parameter,sep - cmd_parameter);
memcpy(len,cmd_parameter + (sep - cmd_parameter) + 1,strlen(cmd_parameter) - sep_pos - 1);
ret = char_to_int(offset,&offset_int);
if (ret != 0) {
strcpy(response,"ERROR OFFSET INVALID");
return;
}
ret = char_to_int(len,&len_int);
if (ret != 0) {
strcpy(response,"ERROR LEN INVALID");
return;
}
if (len_int > MAX_NV_DATA_SIZE) {
strcpy(response,"ERROR NV SIZE TOO LARGE");
return;
}
ret = nv_get(nv_data, offset_int, len_int);
if (ret != 0) {
printf("nv_get failed:%d\n",ret);
strcpy(response,"ERROR NV GET FAILED");
return;
}
hex_to_str(nv_data_str,nv_data,len_int);
strcpy(response,"SUCCESS:");
strcat(response,nv_data_str);
}
void oem_nv_set_proccess(char *cmd_parameter, char *response)
{
char *sep = NULL;
char offset[MAX_NV_NUMBER_SIZE] = {0};
uint8_t nv_data[MAX_NV_DATA_SIZE + 32] = {0};
char *nv_data_str;
int data_len;
int ret;
int offset_int = 0;
sep = strstr(cmd_parameter, ":");
if (sep == NULL) {
strcpy(response,"ERROR INVALID PARAM");
return;
}
memcpy(offset,cmd_parameter,sep - cmd_parameter);
nv_data_str = cmd_parameter + (sep - cmd_parameter) + 1;
data_len = strlen(nv_data_str) / 2;
ret = char_to_int(offset,&offset_int);
if (ret != 0) {
strcpy(response,"ERROR OFFSET INVALID");
return;
}
if (data_len > MAX_NV_DATA_SIZE) {
strcpy(response,"ERROR NV SIZE TOO LARGE");
return;
}
str_to_hex(nv_data,nv_data_str,data_len);
ret = nv_set(nv_data, offset_int, data_len);
if (ret != 0) {
strcpy(response,"ERROR NV SET FAILED");
return;
}
strcpy(response,"OKAY");
}
#endif

View File

@@ -1,15 +0,0 @@
menu "MCU Support"
config DM_MCU
bool "Enable driver model for mcu device support"
depends on DM
help
This adds a simple uclass for mcu device.
config MCU_HC32fX
bool "Enable HC32fX MCU support"
depends on DM_MCU
help
This adds a driver for the HC32fX MCU support.
endmenu

View File

@@ -1,9 +0,0 @@
#
# Copyright (c) 2015 Google, Inc
# Written by Simon Glass <sjg@chromium.org>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_DM_MCU) += mcu-uclass.o
obj-$(CONFIG_MCU_HC32fX) += mcu_hc32fx.o

View File

@@ -1,65 +0,0 @@
/*
* Copyright (c) 2015 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <mcu/mcu-uclass.h>
#include <dm/root.h>
#include <dm/uclass-internal.h>
int _mcu_shutdown(struct udevice *dev)
{
struct mcu_ops *ops = dev_get_driver_ops(dev);
if (!ops->shutdown)
return -ENOSYS;
return ops->shutdown(dev);
}
int _mcu_poweron(struct udevice *dev)
{
struct mcu_ops *ops = dev_get_driver_ops(dev);
if (!ops->poweron)
return -ENOSYS;
return ops->poweron(dev);
}
int mcu_poweron(void)
{
struct udevice *mcu;
int ret;
ret = uclass_get_device(UCLASS_MCU, 0, &mcu);
if (ret) {
printf("Get UCLASS_MCU failed, ret=%d\n", ret);
return ret;
}
return _mcu_poweron(mcu);
}
int mcu_shutdown(void)
{
struct udevice *mcu;
int ret;
ret = uclass_get_device(UCLASS_MCU, 0, &mcu);
if (ret) {
printf("Get charge display failed, ret=%d\n", ret);
return ret;
}
return _mcu_shutdown(mcu);
}
UCLASS_DRIVER(mcu) = {
.id = UCLASS_MCU,
.name = "mcu",
};

View File

@@ -1,97 +0,0 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <mcu/mcu-uclass.h>
#include <dm/lists.h>
DECLARE_GLOBAL_DATA_PTR;
#define HC32FX_POWEROFF_20 0x20
#define HC32FX_POWERON_30 0x30
#define POWER_OFF 0x55
#define POWER_ON 0x01
struct hc32fx_info {
struct udevice *dev;
};
static u8 hc32fx_read(struct hc32fx_info *hc32fx, u8 reg)
{
u8 val;
int ret;
ret = dm_i2c_read(hc32fx->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
hc32fx->dev, reg);
return ret;
}
return val;
}
static int hc32fx_write(struct hc32fx_info *hc32fx, u8 reg, u8 val)
{
int ret;
ret = dm_i2c_write(hc32fx->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
hc32fx->dev, reg);
return ret;
}
return 0;
}
static int mcu_hc32fx_poweron(struct udevice *dev)
{
struct hc32fx_info *hc32fx = dev_get_priv(dev);
int ret;
ret = hc32fx_write(hc32fx, HC32FX_POWERON_30, POWER_ON);
if(ret)
printf("set mcu POWERON fail\n");
return ret;
}
static int mcu_hc32fx_shutdown(struct udevice *dev)
{
struct hc32fx_info *hc32fx = dev_get_priv(dev);
int ret;
ret = hc32fx_write(hc32fx, HC32FX_POWEROFF_20, POWER_OFF);
if(ret)
printf("set mcu POWEROFF fail\n");
return ret;
}
static int mcu_gpio_probe(struct udevice *dev)
{
struct hc32fx_info *priv = dev_get_priv(dev);
priv->dev = dev;
return 0;
}
static const struct mcu_ops mcu_hc32fx_ops = {
.poweron = mcu_hc32fx_poweron,
.shutdown = mcu_hc32fx_shutdown,
};
static const struct udevice_id hc32fx_ops_ids[] = {
{ .compatible = "mcu_hc32fx" },
{ }
};
U_BOOT_DRIVER(mcu_gpio) = {
.name = "hc32fx-mcu",
.id = UCLASS_MCU,
.of_match = hc32fx_ops_ids,
.ops = &mcu_hc32fx_ops,
.priv_auto_alloc_size = sizeof(struct hc32fx_info),
.probe = mcu_gpio_probe,
};

View File

@@ -2,22 +2,10 @@ menu "Power"
source "drivers/power/domain/Kconfig"
source "drivers/power/fuel_gauge/Kconfig"
source "drivers/power/pmic/Kconfig"
source "drivers/power/regulator/Kconfig"
source "drivers/power/charge/Kconfig"
source "drivers/power/power_delivery/Kconfig"
config DM_CHARGE_DISPLAY
bool "Enable driver model for charge display support"
depends on DM
help
This adds a simple uclass for charge display.
choice
prompt "Select Sunxi PMIC Variant"
depends on ARCH_SUNXI
@@ -84,13 +72,6 @@ config SY8106A_POWER
endchoice
config CHARGE_ANIMATION
bool "Enable charge animation"
depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
select ARM_CPU_SUSPEND
help
This adds a simple function for charge animation display.
config AXP_DCDC1_VOLT
int "axp pmic dcdc1 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER

View File

@@ -3,13 +3,11 @@
# Copyright (c) 2009 Wind River Systems, Inc.
# Tom Rix <Tom.Rix at windriver.com>
obj-$(CONFIG_DM_CHARGE_DISPLAY) += charge-display-uclass.o
obj-$(CONFIG_AXP152_POWER) += axp152.o
obj-$(CONFIG_AXP209_POWER) += axp209.o
obj-$(CONFIG_AXP221_POWER) += axp221.o
obj-$(CONFIG_AXP809_POWER) += axp809.o
obj-$(CONFIG_AXP818_POWER) += axp818.o
obj-$(CONFIG_CHARGE_ANIMATION) += charge_animation.o
obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o
obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o
obj-$(CONFIG_SY8106A_POWER) += sy8106a.o

View File

@@ -1,40 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <command.h>
#include <common.h>
#include <dm.h>
#include <power/charge_display.h>
int charge_display_show(struct udevice *dev)
{
const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->show)
return -ENOSYS;
return ops->show(dev);
}
int charge_display(void)
{
struct udevice *dev;
struct udevice *fg_dev;
int ret;
ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
if (ret) {
debug("Get charge display failed, ret=%d\n", ret);
return ret;
}
return charge_display_show(dev);
}
UCLASS_DRIVER(charge_display) = {
.id = UCLASS_CHARGE_DISPLAY,
.name = "charge_display",
};

View File

@@ -1,5 +0,0 @@
config CHARGER_BQ25700
bool "BQ25700 charger support"
depends on DM_FUEL_GAUGE
help
This adds support for BQ25700 charger support.

View File

@@ -1,7 +0,0 @@
#
# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_CHARGER_BQ25700) += bq25700_charger.o

View File

@@ -1,334 +0,0 @@
/*
* (C) Copyright 2019 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/gpio.h>
#include <dm/device.h>
#include <dm/uclass.h>
#include <power/fuel_gauge.h>
#include <power/pmic.h>
#include <power/power_delivery/power_delivery.h>
DECLARE_GLOBAL_DATA_PTR;
#define BQ25700_ID 0x25700
#define BQ25703_ID 0x25703
#define COMPAT_BQ25700 "ti,bq25700"
#define COMPAT_BQ25703 "ti,bq25703"
#define BQ25700_I2C_SPEED 100000
#define BQ25700_CHARGE_CURRENT_1500MA 0x5C0
#define BQ25700_SDP_INPUT_CURRENT_500MA 0xA00
#define BQ25700_DCP_INPUT_CURRENT_1500MA 0x1E00
#define BQ25700_DCP_INPUT_CURRENT_2000MA 0x2800
#define BQ25700_DCP_INPUT_CURRENT_3000MA 0x3C00
#define WATCHDOG_ENSABLE (0x03 << 13)
#define BQ25700_CHARGEOPTION0_REG 0x12
#define BQ25700_CHARGECURREN_REG 0x14
#define BQ25700_CHARGERSTAUS_REG 0x20
#define BQ25700_INPUTVOLTAGE_REG 0x3D
#define BQ25700_INPUTCURREN_REG 0x3F
#define BQ25703_CHARGEOPTION0_REG 0x00
#define BQ25703_CHARGECURREN_REG 0x02
#define BQ25703_CHARGERSTAUS_REG 0x20
#define BQ25703_INPUTVOLTAGE_REG 0x0A
#define BQ25703_INPUTCURREN_REG 0x0E
#define PD_MUN 2
#define TYPEC0_I2C "i2c@ffe7f20000"
#define TYPEC1_I2C "i2c@ffe7f24000"
enum bq25700_table_ids {
/* range tables */
TBL_ICHG,
TBL_CHGMAX,
TBL_INPUTVOL,
TBL_INPUTCUR,
TBL_SYSVMIN,
TBL_OTGVOL,
TBL_OTGCUR,
TBL_EXTCON,
};
struct bq25700 {
struct udevice *dev;
u32 ichg;
u32 chip_id;
struct udevice *pd[PD_MUN];
};
struct bq25700_range {
u32 min;
u32 max;
u32 step;
};
static int bq25700_read(struct bq25700 *charger, uint reg)
{
u16 val;
int ret;
ret = dm_i2c_read(charger->dev, reg, (u8 *)&val, 2);
if (ret) {
printf("write error to device: %p register: %#x!",
charger->dev, reg);
return ret;
}
return val;
}
static int bq25700_write(struct bq25700 *charger, uint reg, u16 val)
{
int ret;
ret = dm_i2c_write(charger->dev, reg, (u8 *)&val, 2);
if (ret) {
printf("write error to device: %p register: %#x!",
charger->dev, reg);
return ret;
}
return 0;
}
static const union {
struct bq25700_range rt;
} bq25700_tables[] = {
/* range tables */
[TBL_ICHG] = {.rt = {0, 8128000, 64000}},
/* uV */
[TBL_CHGMAX] = {.rt = {0, 19200000, 16000}},
/* uV max charge voltage*/
[TBL_INPUTVOL] = {.rt = {3200000, 19520000, 64000}},
/* uV input charge voltage*/
[TBL_INPUTCUR] = {.rt = {0, 6350000, 50000}},
/*uA input current*/
[TBL_SYSVMIN] = {.rt = {1024000, 16182000, 256000}},
/* uV min system voltage*/
[TBL_OTGVOL] = {.rt = {4480000, 20800000, 64000}},
/*uV OTG volage*/
[TBL_OTGCUR] = {.rt = {0, 6350000, 50000}},
};
static u32 bq25700_find_idx(u32 value, enum bq25700_table_ids id)
{
const struct bq25700_range *rtbl = &bq25700_tables[id].rt;
u32 rtbl_size;
u32 idx;
rtbl_size = (rtbl->max - rtbl->min) / rtbl->step + 1;
for (idx = 1;
idx < rtbl_size && (idx * rtbl->step + rtbl->min <= value);
idx++)
;
return idx - 1;
}
static bool bq25700_charger_status(struct bq25700 *charger)
{
int state_of_charger;
u16 value;
value = bq25700_read(charger, BQ25700_CHARGERSTAUS_REG);
state_of_charger = value >> 15;
return state_of_charger;
}
static bool bq25703_charger_status(struct bq25700 *charger)
{
int state_of_charger;
u16 value;
value = bq25700_read(charger, BQ25703_CHARGERSTAUS_REG);
state_of_charger = value >> 15;
return state_of_charger;
}
static bool bq257xx_charger_status(struct udevice *dev)
{
struct bq25700 *charger = dev_get_priv(dev);
if (charger->chip_id == BQ25700_ID)
return bq25700_charger_status(charger);
else
return bq25703_charger_status(charger);
}
static int bq25700_charger_capability(struct udevice *dev)
{
return FG_CAP_CHARGER;
}
static int bq25700_get_usb_type(void)
{
#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
return rockchip_chg_get_type();
#else
return 0;
#endif
}
static int bq25700_get_pd_output_val(struct bq25700 *charger,
int *vol, int *cur)
{
struct power_delivery_data pd_data;
int ret;
if (!charger->pd[0] && !charger->pd[1]) {
return -EINVAL;
}
memset(&pd_data, 0, sizeof(pd_data));
int i = 0;
for (i = 0; i < PD_MUN; i++) {
if (!charger->pd[i]) {
continue;
}
ret = power_delivery_get_data(charger->pd[i], &pd_data);
if (ret) {
continue;
}
if (!pd_data.online || !pd_data.voltage || !pd_data.current) {
continue;
}
*vol = pd_data.voltage;
*cur = pd_data.current;
printf("voltage is %d current is %d\n", *vol, *cur);
goto end;
}
return -EINVAL;
end:
return 0;
}
static void bq25703_charger_current_init(struct bq25700 *charger)
{
u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
int pd_inputvol, pd_inputcurrent;
u16 vol_idx = 0, cur_idx;
u16 temp;
temp = bq25700_read(charger, BQ25703_CHARGEOPTION0_REG);
temp &= (~WATCHDOG_ENSABLE);
bq25700_write(charger, BQ25703_CHARGEOPTION0_REG, temp);
if (!bq25700_get_pd_output_val(charger, &pd_inputvol,
&pd_inputcurrent)) {
if (pd_inputvol > 5000000) {
vol_idx = bq25700_find_idx(pd_inputvol - 1280000 - 3200000,
TBL_INPUTVOL);
vol_idx = vol_idx << 6;
}
cur_idx = bq25700_find_idx(pd_inputcurrent,
TBL_INPUTCUR);
cur_idx = cur_idx << 8;
if (pd_inputcurrent != 0)
{
bq25700_write(charger, BQ25703_INPUTCURREN_REG,
cur_idx);
if (vol_idx)
bq25700_write(charger, BQ25703_INPUTVOLTAGE_REG,
vol_idx);
charge_current = bq25700_find_idx(pd_inputcurrent,
TBL_ICHG);
charge_current = charge_current << 6;
}
} else {
bq25700_write(charger, BQ25703_INPUTCURREN_REG,
dcp_inputcurrent);
}
if (bq25703_charger_status(charger)) {
bq25700_write(charger, BQ25703_CHARGECURREN_REG,
charge_current);
}
}
static int bq25700_ofdata_to_platdata(struct udevice *dev)
{
struct bq25700 *charger = dev_get_priv(dev);
const void *blob = gd->fdt_blob;
int node, node1;
charger->dev = dev;
node = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25700);
node1 = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25703);
if ((node < 0) && (node1 < 0)) {
printf("Can't find dts node for charger bq25700\n");
return -ENODEV;
}
if (node < 0) {
node = node1;
charger->chip_id = BQ25703_ID;
} else {
charger->chip_id = BQ25700_ID;
}
return 0;
}
static int bq25700_probe(struct udevice *dev)
{
struct bq25700 *charger = dev_get_priv(dev);
int ret;
struct udevice *pd_tmp;
struct udevice *dev_tmp;
for (uclass_first_device(UCLASS_PD, &pd_tmp);
pd_tmp;
uclass_next_device(&pd_tmp))
{
dev_tmp = dev_get_parent(pd_tmp);
if (!strncmp(TYPEC0_I2C, dev_tmp->name, strlen(TYPEC0_I2C))) { // Ensure that typec0 has the highest priority
charger->pd[0] = pd_tmp;
} else if (!strncmp(TYPEC1_I2C, dev_tmp->name, strlen(TYPEC1_I2C))) {
charger->pd[1] = pd_tmp;
}
}
if (charger->chip_id == BQ25703_ID) {
bq25703_charger_current_init(charger);
}
return 0;
}
static const struct udevice_id charger_ids[] = {
{.compatible = "ti,bq25700"},
{.compatible = "ti,bq25703"},
{},
{ },
};
static struct dm_fuel_gauge_ops charger_ops = {
.get_chrg_online = bq257xx_charger_status,
.capability = bq25700_charger_capability,
};
U_BOOT_DRIVER(bq25700_charger) = {
.name = "bq25700_charger",
.id = UCLASS_FG,
.probe = bq25700_probe,
.of_match = charger_ids,
.ops = &charger_ops,
.ofdata_to_platdata = bq25700_ofdata_to_platdata,
.priv_auto_alloc_size = sizeof(struct bq25700),
};

View File

@@ -1,366 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/io.h>
#include <asm/gpio.h>
#include <common.h>
#include <console.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
#include <rtc.h>
#include <pwm.h>
#include <power/charge_display.h>
#include <power/charge_animation.h>
#include <power/fuel_gauge.h>
#include <power/pmic.h>
#include <mcu/mcu-uclass.h>
#ifdef CONFIG_IRQ
#include <irq-generic.h>
#include <rk_timer_irq.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
#define IMAGE_RECALC_IDX -1
#define IMAGE_SOC_100_IDX(n) ((n) - 2)
#define IMAGE_LOWPOWER_IDX(n) ((n) - 1)
#define SYSTEM_SUSPEND_DELAY_MS 5000
#define FUEL_GAUGE_POLL_MS 1000
#define LED_CHARGING_NAME "battery_charging"
#define LED_CHARGING_FULL_NAME "battery_full"
#define LED_CHARGING_START_NAME "battery_start"
struct charge_image {
const char *name;
int soc;
int period; /* ms */
};
struct charge_animation_priv {
struct udevice *fg;
struct udevice *charger;
struct udevice *mcu;
#ifdef CONFIG_LED
struct udevice *led_charging;
struct udevice *led_full;
struct udevice *led_start;
#endif
const struct charge_image *image;
int image_num;
int auto_wakeup_key_state;
ulong auto_screen_off_timeout; /* ms */
ulong suspend_delay_timeout; /* ms */
};
struct gpio_desc powerkey_gpio;
static int leds_switch = 0;
#ifdef CONFIG_LED
static int leds_update(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
static int old_soc = -1;
int ret, ledst;
if (old_soc == soc)
return 0;
old_soc = soc;
if (priv->led_charging) {
ledst = (soc < 100) ? LEDST_ON : LEDST_OFF;
ret = led_set_state(priv->led_charging, ledst);
if (ret) {
printf("set charging led %s failed, ret=%d\n",
(ledst == LEDST_ON) ? "ON" : "OFF", ret);
return ret;
}
}
if (priv->led_full) {
ledst = (soc == 100) ? LEDST_ON : LEDST_OFF;
ret = led_set_state(priv->led_full, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
}
return 0;
}
static int leds_charge_on(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, ledst;
ledst = LEDST_ON;
ret = led_set_state(priv->led_full, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
return 0;
}
static int leds_charge_off(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, ledst;
ledst = LEDST_OFF;
ret = led_set_state(priv->led_charging, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
ret = led_set_state(priv->led_full, ledst);
if (ret) {
printf("set charging full led %s failed, ret=%d\n",
ledst == LEDST_ON ? "ON" : "OFF", ret);
return ret;
}
return 0;
}
static int leds_charge_update(struct udevice *dev, int soc)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, ledst;
if (leds_switch > 5){
leds_charge_on(dev, soc);
} else {
leds_charge_off(dev, soc);
}
leds_switch++;
if (leds_switch > 10)
leds_switch = 0;
return 0;
}
#else
static int leds_update(struct udevice *dev, int soc) { return 0; }
static int leds_charge_on(struct udevice *dev, int soc) { return 0; }
static int leds_charge_off(struct udevice *dev, int soc) { return 0; }
static int leds_charge_update(struct udevice *dev, int soc) { return 0; }
#endif
static int charge_animation_ofdata_to_platdata(struct udevice *dev)
{
struct charge_animation_pdata *pdata = dev_get_platdata(dev);
pdata->low_power_voltage =
dev_read_u32_default(dev, "uboot-low-power-voltage", 0);
return 0;
}
static int fg_charger_get_chrg_online(struct udevice *dev)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
struct udevice *charger;
charger = priv->charger ? : priv->fg;
return fuel_gauge_get_chrg_online(charger);
}
static int get_reboot_state(void){
const char *var_name = "battery_charge";
char *value = env_get(var_name);
if (value)
if (strcmp(value, "0") == 0) {
env_set(var_name, "1");
env_save();
return 0;
}
env_set(var_name, "1");
env_save();
return 1;
}
static int charge_animation_show(struct udevice *dev)
{
int soc, voltage, ret, charging = 0;
struct charge_animation_priv *priv = dev_get_priv(dev);
struct charge_animation_pdata *pdata = dev_get_platdata(dev);
struct udevice *fg = priv->fg;
struct udevice *mcu = priv->mcu;
voltage = fuel_gauge_get_voltage(fg);
if (voltage < 0)
return -EINVAL;
while (voltage < pdata->low_power_voltage + 50) {
soc = fuel_gauge_update_get_soc(fg);
if (soc < 0 || soc > 100) {
printf("get soc failed: %d\n", soc);
continue;
} else if (soc >= 1) {
printf("soc is: %d\n", soc);
break;
}
voltage = fuel_gauge_get_voltage(fg);
if (voltage < 0) {
printf("get voltage failed: %d\n", voltage);
continue;
}
ret = leds_update(dev, soc);
if (ret)
printf("update led failed: %d\n", ret);
printf("soc is: %d voltage is :%d\n", soc, voltage);
charging = fg_charger_get_chrg_online(dev);
if (charging <= 0) {
mcu_shutdown(); // shutdown system power
}
mdelay(100);
};
leds_charge_off(dev, soc);
ret = get_reboot_state();
charging = fg_charger_get_chrg_online(dev);
if (!(charging <= 0) && ret != 0)
while(1){
ret = dm_gpio_get_value(&powerkey_gpio);
if (ret == 0){
break;
}
charging = fg_charger_get_chrg_online(dev);
if (charging <= 0) {
mcu_shutdown(); // shutdown system power
}
soc = fuel_gauge_update_get_soc(fg);
if (soc == 100){
leds_charge_on(dev, soc);
}else if (soc < 100){
leds_charge_update(dev, soc);
}
mdelay(300);
}
leds_charge_off(dev, soc);
ret = led_set_state(priv->led_start, LEDST_ON);
if (!ret)
printf("Found Charging-Start LED\n");
return 0;
}
static int fg_charger_get_device(struct udevice **fuel_gauge,
struct udevice **charger)
{
struct udevice *dev;
struct uclass *uc;
int ret, cap;
*fuel_gauge = NULL,
*charger = NULL;
ret = uclass_get(UCLASS_FG, &uc);
if (ret)
return ret;
for (uclass_first_device(UCLASS_FG, &dev);
dev;
uclass_next_device(&dev)) {
cap = fuel_gauge_capability(dev);
if (cap == (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE)) {
*fuel_gauge = dev;
*charger = NULL;
} else if (cap == FG_CAP_FUEL_GAUGE) {
*fuel_gauge = dev;
} else if (cap == FG_CAP_CHARGER) {
*charger = dev;
}
}
return (*fuel_gauge) ? 0 : -ENODEV;
}
static const struct dm_charge_display_ops charge_animation_ops = {
.show = charge_animation_show,
};
static int charge_animation_probe(struct udevice *dev)
{
struct charge_animation_priv *priv = dev_get_priv(dev);
int ret, soc;
/* Get PMIC: used for power off system */
ret = uclass_get_device(UCLASS_MCU, 0, &priv->mcu);
if (ret) {
if (ret == -ENODEV)
printf("Can't find MCU\n");
else
printf("Get UCLASS MCU failed: %d\n", ret);
}
/* Get fuel gauge and charger(If need) */
ret = fg_charger_get_device(&priv->fg, &priv->charger);
if (ret) {
if (ret == -ENODEV)
debug("Can't find FG\n");
else
debug("Get UCLASS FG failed: %d\n", ret);
// return ret;
}
#ifdef CONFIG_LED
ret = led_get_by_label(LED_CHARGING_NAME, &priv->led_charging);
if (!ret)
printf("Found Charging LED \n");
ret = led_get_by_label(LED_CHARGING_FULL_NAME, &priv->led_full);
if (!ret)
printf("Found Charging-Full LED\n");
ret = led_get_by_label(LED_CHARGING_START_NAME, &priv->led_start);
if (!ret)
printf("Found Charging-Start LED\n");
#endif
ret = gpio_request_by_name(dev, "powerkey-gpio", 0, &powerkey_gpio, 0);
if (dm_gpio_is_valid(&powerkey_gpio)) {
dm_gpio_set_dir_flags(&powerkey_gpio, GPIOD_IS_IN);
}
printf("Enable charge animation display\n");
return 0;
}
static const struct udevice_id charge_animation_ids[] = {
{ .compatible = "rockchip,uboot-charge" },
{ },
};
U_BOOT_DRIVER(charge_animation) = {
.name = "charge-animation",
.id = UCLASS_CHARGE_DISPLAY,
.probe = charge_animation_probe,
.of_match = charge_animation_ids,
.ops = &charge_animation_ops,
.ofdata_to_platdata = charge_animation_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct charge_animation_pdata),
.priv_auto_alloc_size = sizeof(struct charge_animation_priv),
};

View File

@@ -1,11 +0,0 @@
config DM_FUEL_GAUGE
bool "Enable driver model fuel gauge support"
depends on DM
help
This adds a simple uclass for fuel gauge.
config POWER_FG_CW201X
bool "CW201X Fuel gauge support"
depends on DM_FUEL_GAUGE
help
This adds support for CW201X fuel gauge support.

View File

@@ -2,6 +2,5 @@
#
# Copyright (C) 2012 Samsung Electronics
# Lukasz Majewski <l.majewski@samsung.com>
obj-$(CONFIG_$(SPL_)DM_FUEL_GAUGE) += fuel_gauge_uclass.o
obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o

View File

@@ -1,415 +0,0 @@
/*
* (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/gpio.h>
#include <dm.h>
#include <dm/device.h>
#include <errno.h>
#include <fdtdec.h>
#include <i2c.h>
// #include <linux/usb/phy-rockchip-usb2.h>
#include <malloc.h>
#include <power/battery.h>
#include <power/fuel_gauge.h>
// #include <power/pmic.h>
#include "fg_regs.h"
DECLARE_GLOBAL_DATA_PTR;
#define COMPAT_ROCKCHIP_CW201X "cw201x"
#define REG_VERSION 0x0
#define REG_VCELL 0x2
#define REG_SOC 0x4
#define REG_RRT_ALERT 0x6
#define REG_CONFIG 0x8
#define REG_MODE 0xA
#define REG_BATINFO 0x10
#define MODE_SLEEP_MASK (0x3 << 6)
#define MODE_SLEEP (0x3 << 6)
#define MODE_NORMAL (0x0 << 6)
#define MODE_QUICK_START (0x3 << 4)
#define MODE_RESTART (0xf << 0)
#define CONFIG_UPDATE_FLG (0x1 << 1)
#define ATHD (0x0 << 3)
enum charger_type {
CHARGER_TYPE_NO = 0,
CHARGER_TYPE_USB,
CHARGER_TYPE_AC,
CHARGER_TYPE_DC,
CHARGER_TYPE_UNDEF,
};
struct cw201x_info {
struct udevice *dev;
int capacity;
u32 *cw_bat_config_info;
int divider_res1;
int divider_res2;
int hw_id_check;
struct gpio_desc hw_id0;
struct gpio_desc hw_id1;
int support_dc_adp;
struct gpio_desc dc_det_gpio;
int dc_det_flag;
bool dual_cell;
};
static u8 cw201x_read(struct cw201x_info *cw201x, u8 reg)
{
u8 val;
int ret;
ret = dm_i2c_read(cw201x->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
cw201x->dev, reg);
return ret;
}
return val;
}
static int cw201x_write(struct cw201x_info *cw201x, u8 reg, u8 val)
{
int ret;
ret = dm_i2c_write(cw201x->dev, reg, &val, 1);
if (ret) {
printf("write error to device: %p register: %#x!",
cw201x->dev, reg);
return ret;
}
return 0;
}
static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
{
u8 vall, valh;
u16 val;
valh = cw201x_read(cw201x, reg);
vall = cw201x_read(cw201x, reg + 1);
val = ((u16)valh << 8) | vall;
return val;
}
static int cw201x_parse_config_info(struct cw201x_info *cw201x)
{
int ret;
int i, len, size;
const u8 *info;
struct udevice *dev = cw201x->dev;
if (dev_read_prop(dev, "bat_config_info", &len)) {
len /= sizeof(u32);
size = sizeof(*cw201x->cw_bat_config_info) * len;
cw201x->cw_bat_config_info = calloc(size, 1);
if (!cw201x->cw_bat_config_info) {
printf("calloc cw_bat_config_info fail\n");
return -EINVAL;
}
ret = dev_read_u32_array(dev, "bat_config_info",
cw201x->cw_bat_config_info, len);
if (ret) {
printf("fdtdec_get cw_bat_config_info fail\n");
return -EINVAL;
}
return 0;
}
if (!dev_read_prop(dev, "cellwise,battery-profile", &len))
return -EINVAL;
size = sizeof(*cw201x->cw_bat_config_info) * len;
cw201x->cw_bat_config_info = calloc(size, 1);
if (!cw201x->cw_bat_config_info) {
printf("calloc cw_bat_config_info fail\n");
return -EINVAL;
}
info = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", len);
if (!info) {
printf("fdtdec_get battery profile fail\n");
return -EINVAL;
}
for (i = 0; i < len; i++) {
cw201x->cw_bat_config_info[i] = info[i];
printf("%#x ", cw201x->cw_bat_config_info[i]);
if ((i+1) % 8 == 0)
printf("\n");
}
return 0;
}
static int cw201x_ofdata_to_platdata(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
int ret;
int hw_id0_val, hw_id1_val;
cw201x->dev = dev;
ret = cw201x_parse_config_info(cw201x);
if (ret)
return ret;
cw201x->dual_cell = dev_read_bool(dev, "cellwise,dual-cell");
ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
0, &cw201x->dc_det_gpio, GPIOD_IS_IN);
if (!ret) {
cw201x->support_dc_adp = 1;
printf("DC is valid\n");
} else {
printf("DC is invalid, ret=%d\n", ret);
}
cw201x->hw_id_check = dev_read_u32_default(dev, "hw_id_check", 0);
if (cw201x->hw_id_check) {
ret = gpio_request_by_name_nodev(dev_ofnode(dev),
"hw_id0_gpio", 0,
&cw201x->hw_id0, GPIOD_IS_IN);
if (ret)
return -EINVAL;
hw_id0_val = dm_gpio_get_value(&cw201x->hw_id0);
ret = gpio_request_by_name_nodev(dev_ofnode(dev),
"hw_id1_gpio", 0,
&cw201x->hw_id1, GPIOD_IS_IN);
if (ret)
return -EINVAL;
hw_id1_val = dm_gpio_get_value(&cw201x->hw_id1);
/* ID1 = 0, ID0 = 1 : Battery */
if (!hw_id0_val || hw_id1_val)
return -EINVAL;
}
cw201x->divider_res1 = dev_read_u32_default(dev, "divider_res1", 0);
cw201x->divider_res2 = dev_read_u32_default(dev, "divider_res2", 0);
return 0;
}
static int cw201x_get_vol(struct cw201x_info *cw201x)
{
u16 value16, value16_1, value16_2, value16_3;
int voltage;
int res1, res2;
int retry = 0;
__retry:
value16 = cw201x_read_half_word(cw201x, REG_VCELL);
if (value16 < 0)
return -1;
value16_1 = cw201x_read_half_word(cw201x, REG_VCELL);
if (value16_1 < 0)
return -1;
value16_2 = cw201x_read_half_word(cw201x, REG_VCELL);
if (value16_2 < 0)
return -1;
if (value16 > value16_1) {
value16_3 = value16;
value16 = value16_1;
value16_1 = value16_3;
}
if (value16_1 > value16_2) {
value16_3 = value16_1;
value16_1 = value16_2;
value16_2 = value16_3;
}
if (value16 > value16_1) {
value16_3 = value16;
value16 = value16_1;
value16_1 = value16_3;
}
voltage = value16_1 * 312 / 1024;
if (voltage <= 0 && retry < 10) {
retry++;
mdelay(20);
goto __retry;
}
if (cw201x->divider_res1 &&
cw201x->divider_res2) {
res1 = cw201x->divider_res1;
res2 = cw201x->divider_res2;
voltage = voltage * (res1 + res2) / res2;
}
if (cw201x->dual_cell)
voltage *= 2;
// printf("the cw201x voltage=%d\n", voltage);
return voltage;
}
static int cw201x_dwc_otg_check_dpdm(void)
{
#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
return rockchip_chg_get_type();
#else
printf("rockchip_chg_get_type() is not implement\n");
return CHARGER_TYPE_NO;
#endif
}
static int cw201x_get_usb_state(struct cw201x_info *cw201x)
{
int charger_type;
switch (cw201x_dwc_otg_check_dpdm()) {
case 0:
charger_type = CHARGER_TYPE_NO;
break;
case 1:
case 3:
charger_type = CHARGER_TYPE_USB;
break;
case 2:
charger_type = CHARGER_TYPE_AC;
break;
default:
charger_type = CHARGER_TYPE_NO;
break;
}
return charger_type;
}
static bool cw201x_get_dc_state(struct cw201x_info *cw201x)
{
if (dm_gpio_get_value(&cw201x->dc_det_gpio))
return true;
return false;
}
static bool cw201x_check_charge(struct cw201x_info *cw201x)
{
if (cw201x_get_usb_state(cw201x) != CHARGER_TYPE_NO)
return true;
if (cw201x_get_dc_state(cw201x))
return true;
return false;
}
static int cw201x_get_soc(struct cw201x_info *cw201x)
{
int cap, i = 0;
while (i < 10) {
mdelay(30);
cap = cw201x_read(cw201x, REG_SOC);
if ((cap < 0) || (cap > 100))
cap = cw201x->capacity;
i++;
if (cap)
break;
}
cw201x->capacity = cap;
return cw201x->capacity;
}
static int cw201x_update_get_soc(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
return cw201x_get_soc(cw201x);
}
static int cw201x_update_get_voltage(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
return cw201x_get_vol(cw201x);
}
static int cw201x_update_get_current(struct udevice *dev)
{
return 0;
}
static bool cw201x_update_get_chrg_online(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
return cw201x_check_charge(cw201x);
}
static int cw201x_capability(struct udevice *dev)
{
return FG_CAP_FUEL_GAUGE;
}
static struct dm_fuel_gauge_ops cw201x_fg_ops = {
.capability = cw201x_capability,
.get_soc = cw201x_update_get_soc,
.get_voltage = cw201x_update_get_voltage,
.get_current = cw201x_update_get_current,
.get_chrg_online = cw201x_update_get_chrg_online,
};
static int cw201x_fg_cfg(struct cw201x_info *cw201x)
{
u8 val = MODE_SLEEP;
int i;
if ((val & MODE_SLEEP_MASK) == MODE_SLEEP) {
val = MODE_NORMAL;
cw201x_write(cw201x, REG_MODE, val);
}
for (i = 0; i < 64; i++) {
cw201x_write(cw201x, REG_BATINFO + i,
(u8)cw201x->cw_bat_config_info[i]);
}
return 0;
}
static int cw201x_fg_probe(struct udevice *dev)
{
struct cw201x_info *cw201x = dev_get_priv(dev);
cw201x->dev = dev;
cw201x_fg_cfg(cw201x);
printf("vol: %d, soc: %d\n",
cw201x_get_vol(cw201x), cw201x_get_soc(cw201x));
return 0;
}
static const struct udevice_id cw201x_ids[] = {
{ .compatible = "cw201x" },
{ .compatible = "cellwise,cw2015" },
{ }
};
U_BOOT_DRIVER(cw201x_fg) = {
.name = "cw201x_fg",
.id = UCLASS_FG,
.of_match = cw201x_ids,
.probe = cw201x_fg_probe,
.ofdata_to_platdata = cw201x_ofdata_to_platdata,
.ops = &cw201x_fg_ops,
.priv_auto_alloc_size = sizeof(struct cw201x_info),
};

View File

@@ -1,95 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _FG_RK8XX_H_
#define _FG_RK8XX_H_
/* register definition */
#define SECONDS_REG 0X00
#define VB_MON_REG 0x21
#define THERMAL_REG 0x22
#define SUP_STS_REG 0xA0
#define USB_CTRL_REG 0xA1
#define CHRG_CTRL_REG1 0xA3
#define CHRG_CTRL_REG2 0xA4
#define CHRG_CTRL_REG3 0xA5
#define BAT_CTRL_REG 0xA6
#define BAT_HTS_TS_REG 0xA8
#define BAT_LTS_TS_REG 0xA9
#define TS_CTRL_REG 0xAC
#define ADC_CTRL_REG 0xAD
#define GGCON_REG 0xB0
#define GGSTS_REG 0xB1
#define ZERO_CUR_ADC_REGH 0xB2
#define ZERO_CUR_ADC_REGL 0xB3
#define GASCNT_CAL_REG3 0xB4
#define GASCNT_CAL_REG2 0xB5
#define GASCNT_CAL_REG1 0xB6
#define GASCNT_CAL_REG0 0xB7
#define GASCNT_REG3 0xB8
#define GASCNT_REG2 0xB9
#define GASCNT_REG1 0xBA
#define GASCNT_REG0 0xBB
#define BAT_CUR_AVG_REGH 0xBC
#define BAT_CUR_AVG_REGL 0xBD
#define TS_ADC_REGH 0xBE
#define TS_ADC_REGL 0xBF
#define RK818_TS2_ADC_REGH 0xC0
#define RK818_TS2_ADC_REGL 0xC1
#define RK816_USB_ADC_REGH 0xC0
#define RK816_USB_ADC_REGL 0xC1
#define BAT_OCV_REGH 0xC2
#define BAT_OCV_REGL 0xC3
#define BAT_VOL_REGH 0xC4
#define BAT_VOL_REGL 0xC5
#define RELAX_ENTRY_THRES_REGH 0xC6
#define RELAX_ENTRY_THRES_REGL 0xC7
#define RELAX_EXIT_THRES_REGH 0xC8
#define RELAX_EXIT_THRES_REGL 0xC9
#define RELAX_VOL1_REGH 0xCA
#define RELAX_VOL1_REGL 0xCB
#define RELAX_VOL2_REGH 0xCC
#define RELAX_VOL2_REGL 0xCD
#define RELAX_CUR1_REGH 0xCE
#define RELAX_CUR1_REGL 0xCF
#define RELAX_CUR2_REGH 0xD0
#define RELAX_CUR2_REGL 0xD1
#define CAL_OFFSET_REGH 0xD2
#define CAL_OFFSET_REGL 0xD3
#define NON_ACT_TIMER_CNT_REG 0xD4
#define VCALIB0_REGH 0xD5
#define VCALIB0_REGL 0xD6
#define VCALIB1_REGH 0xD7
#define VCALIB1_REGL 0xD8
#define FCC_GASCNT_REG3 0xD9
#define FCC_GASCNT_REG2 0xDA
#define FCC_GASCNT_REG1 0xDB
#define FCC_GASCNT_REG0 0xDC
#define IOFFSET_REGH 0xDD
#define IOFFSET_REGL 0xDE
#define SLEEP_CON_SAMP_CUR_REG 0xDF
#define SOC_REG 0xE0
#define REMAIN_CAP_REG3 0xE1
#define REMAIN_CAP_REG2 0xE2
#define REMAIN_CAP_REG1 0xE3
#define REMAIN_CAP_REG0 0xE4
#define UPDAT_LEVE_REG 0xE5
#define NEW_FCC_REG3 0xE6
#define NEW_FCC_REG2 0xE7
#define NEW_FCC_REG1 0xE8
#define NEW_FCC_REG0 0xE9
#define NON_ACT_TIMER_CNT_SAVE_REG 0xEA
#define OCV_VOL_VALID_REG 0xEB
#define REBOOT_CNT_REG 0xEC
#define POFFSET_REG 0xED
#define MISC_MARK_REG 0xEE
#define HALT_CNT_REG 0xEF
#define DATA15_REG 0xEF
#define DATA16_REG 0xF0
#define DATA17_REG 0xF1
#define DATA18_REG 0xF2
#endif

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@@ -1,136 +0,0 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <errno.h>
#include <dm.h>
#include <power/fuel_gauge.h>
DECLARE_GLOBAL_DATA_PTR;
int fuel_gauge_capability(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->capability)
return (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE);
return ops->capability(dev);
}
int fuel_gauge_bat_is_exist(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->bat_is_exist)
return -ENOSYS;
return ops->bat_is_exist(dev);
}
int fuel_gauge_get_current(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_current)
return -ENOSYS;
return ops->get_current(dev);
}
int fuel_gauge_get_voltage(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_voltage)
return -ENOSYS;
return ops->get_voltage(dev);
}
int fuel_gauge_update_get_soc(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_soc)
return -ENOSYS;
return ops->get_soc(dev);
}
bool fuel_gauge_get_chrg_online(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_chrg_online)
return -ENOSYS;
return ops->get_chrg_online(dev);
}
int fuel_gauge_get_temperature(struct udevice *dev, int *temp)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_temperature)
return -ENOSYS;
return ops->get_temperature(dev, temp);
}
int charger_set_charger_voltage(struct udevice *dev, int uV)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_voltage)
return -ENOSYS;
return ops->set_charger_voltage(dev, uV);
}
int charger_set_current(struct udevice *dev, int ichrg_uA)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_current)
return -ENOSYS;
return ops->set_charger_current(dev, ichrg_uA);
}
int charger_set_iprechg_current(struct udevice *dev, int iprechrg_uA)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_iprechg_current)
return -ENOSYS;
return ops->set_iprechg_current(dev, iprechrg_uA);
}
int charger_set_enable(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_enable)
return -ENOSYS;
return ops->set_charger_enable(dev);
}
int charger_set_disable(struct udevice *dev)
{
const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_charger_disable)
return -ENOSYS;
return ops->set_charger_disable(dev);
}
UCLASS_DRIVER(fuel_guage) = {
.id = UCLASS_FG,
.name = "fuel_gauge",
};

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@@ -1,45 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config DM_POWER_DELIVERY
bool "Enable driver model power delivery support"
depends on DM
help
This adds a simple uclass for power delivery.
config TYPEC_TCPM
tristate "USB Type-C Port Controller Manager"
depends on DM && DM_POWER_DELIVERY
help
The Type-C Port Controller Manager provides a USB PD and USB Type-C
state machine for use with Type-C Port Controllers.
config TYPEC_TCPCI
tristate "Type-C Port Controller Interface driver"
depends on DM && DM_POWER_DELIVERY && DM_I2C
help
Type-C Port Controller driver for TCPCI-compliant controller.
config RV_BOOK
tristate "RV Book Type-C support"
help
Enable support for rvbook device's Type-C Port Controller.
if TYPEC_TCPCI
config TYPEC_HUSB311
tristate "Hynetek HUSB311 Type-C chip driver"
depends on DM && DM_POWER_DELIVERY && DM_I2C
help
Hynetek HUSB311 Type-C chip driver that works with
Type-C Port Controller Manager to provide USB PD and USB
Type-C functionalities.
endif # TYPEC_TCPCI
config TYPEC_FUSB302
tristate "Fairchild FUSB302 Type-C chip driver"
depends on DM && DM_POWER_DELIVERY && DM_I2C
help
The Fairchild FUSB302 Type-C chip driver that works with
Type-C Port Controller Manager to provide USB PD and USB
Type-C functionalities.

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@@ -1,7 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_$(SPL_)DM_POWER_DELIVERY) += power_delivery_uclass.o
obj-$(CONFIG_TYPEC_TCPM) += tcpm.o
obj-$(CONFIG_TYPEC_FUSB302) += fusb302.o
obj-$(CONFIG_TYPEC_TCPCI) += tcpci.o
obj-$(CONFIG_TYPEC_HUSB311) += tcpci_husb311.o

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@@ -1,31 +0,0 @@
/*
* (C) Copyright 2022 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <errno.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <power/power_delivery/power_delivery.h>
DECLARE_GLOBAL_DATA_PTR;
int power_delivery_get_data(struct udevice *dev, struct power_delivery_data *pd_data)
{
const struct dm_power_delivery_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_current || !ops->get_voltage || !ops->get_online)
return -ENOSYS;
pd_data->voltage = ops->get_voltage(dev);
pd_data->current = ops->get_current(dev);
pd_data->online = ops->get_online(dev);
return 0;
}
UCLASS_DRIVER(power_delivery) = {
.id = UCLASS_PD,
.name = "power_delivery",
};

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@@ -1,778 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015-2017 Google, Inc
*
* USB Type-C Port Controller Interface.
*/
#include <dm.h>
#include <i2c.h>
#include <asm/gpio.h>
#include <power/power_delivery/pd.h>
#include <power/power_delivery/tcpm.h>
#include <power/power_delivery/typec.h>
#include <power/power_delivery/power_delivery.h>
#include "tcpci.h"
#define PD_RETRY_COUNT 3
#define tcpc_presenting_cc1_rd(reg) \
(!(TCPC_ROLE_CTRL_DRP & (reg)) && \
(((reg) & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) == \
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT)))
#define tcpc_presenting_cc2_rd(reg) \
(!(TCPC_ROLE_CTRL_DRP & (reg)) && \
(((reg) & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) == \
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT)))
struct tcpci {
struct udevice *dev;
struct tcpm_port *port;
bool controls_vbus;
bool gpio_cc_int_present;
struct tcpc_dev tcpc;
struct tcpci_data *data;
struct gpio_desc gpio_cc_int;
};
struct tcpci_chip {
struct udevice *udev;
struct tcpci *tcpci;
struct tcpci_data data;
};
static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
{
return container_of(tcpc, struct tcpci, tcpc);
}
static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val)
{
int ret = 0;
u8 buffer[2];
ret = dm_i2c_read(tcpci->dev, reg, buffer, 2);
if (ret) {
printf("%s: cannot read %02x, ret=%d\n",
__func__, reg, ret);
return ret;
}
*val = ((buffer[1] << 8) & 0xFF00) | (buffer[0] & 0xFF);
return ret;
}
static int tcpci_block_read(struct tcpci *tcpci, unsigned int reg,
u8 *data, u8 length)
{
int ret = 0;
ret = dm_i2c_read(tcpci->dev, reg, data, length);
if (ret)
printf("%s: cannot block read 0x%02x, len=%d, ret=%d\n",
__func__, reg, length, ret);
return ret;
}
static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
{
int ret = 0;
u8 buffer[2];
buffer[0] = val & 0xFF;
buffer[1] = (val >> 8) & 0xFF;
ret = dm_i2c_write(tcpci->dev, reg, buffer, 2);
if (ret)
printf("%s: cannot write 0x%02x, ret=%d\n",
__func__, reg, ret);
return ret;
}
static int tcpci_block_write(struct tcpci *tcpci, unsigned int reg,
u8 *data, u8 length)
{
int ret = 0;
ret = dm_i2c_write(tcpci->dev, reg, data, length);
if (ret)
printf("%s: cannot block write 0x%02x, len=%d, ret=%d\n",
__func__, reg, length, ret);
return ret;
}
static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
switch (cc) {
case TYPEC_CC_RA:
reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
case TYPEC_CC_RD:
reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
case TYPEC_CC_RP_DEF:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_DEF <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_1_5:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_1_5 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_3_0:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_3_0 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_OPEN:
default:
reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
}
ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
if (ret)
return ret;
return 0;
}
static int tcpci_start_toggling(struct tcpc_dev *tcpc,
enum typec_port_type port_type,
enum typec_cc_status cc)
{
int ret;
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg = TCPC_ROLE_CTRL_DRP;
if (port_type != TYPEC_PORT_DRP)
return -EOPNOTSUPP;
/* Handle vendor drp toggling */
if (tcpci->data->start_drp_toggling) {
ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc);
if (ret < 0)
return ret;
}
switch (cc) {
default:
case TYPEC_CC_RP_DEF:
reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_1_5:
reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_3_0:
reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
}
if (cc == TYPEC_CC_RD)
reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
else
reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
if (ret < 0)
return ret;
return dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_LOOK4CONNECTION);
}
static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
{
switch (cc) {
case 0x1:
return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
case 0x2:
return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
case 0x3:
if (sink)
return TYPEC_CC_RP_3_0;
/* fall through */
case 0x0:
default:
return TYPEC_CC_OPEN;
}
}
static int tcpci_get_cc(struct tcpc_dev *tcpc,
enum typec_cc_status *cc1, enum typec_cc_status *cc2)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg, role_control;
role_control = dm_i2c_reg_read(tcpci->dev, TCPC_ROLE_CTRL);
if (role_control < 0)
return role_control;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_CC_STATUS);
if (reg < 0)
return reg;
*cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
TCPC_CC_STATUS_CC1_MASK,
reg & TCPC_CC_STATUS_TERM ||
tcpc_presenting_cc1_rd(role_control));
*cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
TCPC_CC_STATUS_CC2_MASK,
reg & TCPC_CC_STATUS_TERM ||
tcpc_presenting_cc2_rd(role_control));
return 0;
}
static int tcpci_set_polarity(struct tcpc_dev *tcpc,
enum typec_cc_polarity polarity)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
enum typec_cc_status cc1, cc2;
/* Obtain Rp setting from role control */
reg = dm_i2c_reg_read(tcpci->dev, TCPC_ROLE_CTRL);
if (reg < 0)
return reg;
ret = tcpci_get_cc(tcpc, &cc1, &cc2);
if (ret < 0)
return ret;
/*
* When port has drp toggling enabled, ROLE_CONTROL would only have the initial
* terminations for the toggling and does not indicate the final cc
* terminations when ConnectionResult is 0 i.e. drp toggling stops and
* the connection is resolbed. Infer port role from TCPC_CC_STATUS based on the
* terminations seen. The port role is then used to set the cc terminations.
*/
if (reg & TCPC_ROLE_CTRL_DRP) {
/* Disable DRP for the OPEN setting to take effect */
reg = reg & ~TCPC_ROLE_CTRL_DRP;
if (polarity == TYPEC_POLARITY_CC2) {
reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
/* Local port is source */
if (cc2 == TYPEC_CC_RD)
/* Role control would have the Rp setting when DRP was enabled */
reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT;
else
reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT;
} else {
reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
/* Local port is source */
if (cc1 == TYPEC_CC_RD)
/* Role control would have the Rp setting when DRP was enabled */
reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT;
else
reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT;
}
}
if (polarity == TYPEC_POLARITY_CC2)
reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT;
else
reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_ROLE_CTRL, reg);
if (ret < 0)
return ret;
return dm_i2c_reg_write(tcpci->dev, TCPC_TCPC_CTRL,
(polarity == TYPEC_POLARITY_CC2) ?
TCPC_TCPC_CTRL_ORIENTATION : 0);
}
static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
int ret;
unsigned int reg;
/* Handle vendor set vconn */
if (tcpci->data->set_vconn) {
ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable);
if (ret < 0)
return ret;
}
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_CTRL);
if (reg)
return reg;
reg &= ~TCPC_POWER_CTRL_VCONN_ENABLE;
reg |= enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0;
return dm_i2c_reg_write(tcpci->dev, TCPC_POWER_CTRL, reg);
}
static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
enum typec_role role, enum typec_data_role data)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
if (role == TYPEC_SOURCE)
reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
if (data == TYPEC_HOST)
reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_MSG_HDR_INFO, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg = 0;
int ret;
if (enable)
reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_RX_DETECT, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_get_vbus(struct tcpc_dev *tcpc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS);
if (reg < 0)
return reg;
return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
}
static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
int ret;
/* Disable both source and sink first before enabling anything */
if (!source) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_DISABLE_SRC_VBUS);
if (ret < 0)
return ret;
}
if (!sink) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_DISABLE_SINK_VBUS);
if (ret < 0)
return ret;
}
if (source) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_SRC_VBUS_DEFAULT);
if (ret < 0)
return ret;
}
if (sink) {
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_SINK_VBUS);
if (ret < 0)
return ret;
}
return 0;
}
static int tcpci_pd_transmit(struct tcpc_dev *tcpc,
enum tcpm_transmit_type type,
const struct pd_message *msg,
unsigned int negotiated_rev)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
u16 header = msg ? le16_to_cpu(msg->header) : 0;
unsigned int reg, cnt;
int ret;
cnt = msg ? pd_header_cnt(header) * 4 : 0;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_TX_BYTE_CNT, cnt + 2);
if (ret < 0)
return ret;
ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
if (ret < 0)
return ret;
if (cnt > 0) {
ret = tcpci_block_write(tcpci, TCPC_TX_DATA,
(u8 *)&msg->payload, cnt);
if (ret < 0)
return ret;
}
reg = (PD_RETRY_COUNT << TCPC_TRANSMIT_RETRY_SHIFT) |
(type << TCPC_TRANSMIT_TYPE_SHIFT);
ret = dm_i2c_reg_write(tcpci->dev, TCPC_TRANSMIT, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_init(struct tcpc_dev *tcpc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int timeout = 0; /* XXX */
unsigned int reg;
int ret;
while (timeout < 100) {
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS);
if (reg < 0)
return reg;
if (!(reg & TCPC_POWER_STATUS_UNINIT))
break;
timeout++;
udelay(200);
}
if (timeout >= 100)
return -ETIMEDOUT;
/* Handle vendor init */
if (tcpci->data->init) {
ret = tcpci->data->init(tcpci, tcpci->data);
if (ret < 0)
return ret;
}
/* Clear all events */
ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
if (ret < 0)
return ret;
if (tcpci->controls_vbus)
reg = TCPC_POWER_STATUS_VBUS_PRES;
else
reg = 0;
ret = dm_i2c_reg_write(tcpci->dev, TCPC_POWER_STATUS_MASK, reg);
if (ret < 0)
return ret;
/* Enable Vbus detection */
ret = dm_i2c_reg_write(tcpci->dev, TCPC_COMMAND,
TCPC_CMD_ENABLE_VBUS_DETECT);
if (ret < 0)
return ret;
reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
if (tcpci->controls_vbus)
reg |= TCPC_ALERT_POWER_STATUS;
return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
}
static void tcpci_poll_event(struct tcpc_dev *tcpc)
{
u16 status;
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
tcpci_read16(tcpci, TCPC_ALERT, &status);
/*
* Clear alert status for everything except RX_STATUS, which shouldn't
* be cleared until we have successfully retrieved message.
*/
if (status & ~TCPC_ALERT_RX_STATUS)
tcpci_write16(tcpci, TCPC_ALERT,
status & ~TCPC_ALERT_RX_STATUS);
if (status & TCPC_ALERT_CC_STATUS)
tcpm_cc_change(tcpci->port);
if (status & TCPC_ALERT_POWER_STATUS) {
unsigned int reg;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_POWER_STATUS_MASK);
if (reg < 0)
return;
/*
* If power status mask has been reset, then the TCPC
* has reset.
*/
if (reg == 0xff)
tcpm_tcpc_reset(tcpci->port);
else
tcpm_vbus_change(tcpci->port);
}
if (status & TCPC_ALERT_RX_STATUS) {
struct pd_message msg;
unsigned int cnt, payload_cnt;
u16 header;
cnt = dm_i2c_reg_read(tcpci->dev, TCPC_RX_BYTE_CNT);
if (cnt < 0)
return;
/*
* 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14
* of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is
* defined in table 4-36 as one greater than the number of
* bytes received. And that number includes the header. So:
*/
if (cnt > 3)
payload_cnt = cnt - (1 + sizeof(msg.header));
else
payload_cnt = 0;
tcpci_read16(tcpci, TCPC_RX_HDR, &header);
msg.header = cpu_to_le16(header);
if ((payload_cnt > sizeof(msg.payload)))
payload_cnt = sizeof(msg.payload);
if (payload_cnt > 0)
tcpci_block_read(tcpci, TCPC_RX_DATA,
(u8 *)&msg.payload, payload_cnt);
/* Read complete, clear RX status alert bit */
tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
tcpm_pd_receive(tcpci->port, &msg);
}
if (status & TCPC_ALERT_RX_HARD_RST)
tcpm_pd_hard_reset(tcpci->port);
if (status & TCPC_ALERT_TX_SUCCESS)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
else if (status & TCPC_ALERT_TX_DISCARDED)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
else if (status & TCPC_ALERT_TX_FAILED)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
}
static int tcpci_enter_low_power_mode(struct tcpc_dev *tcpc,
bool attached, bool pd_capable)
{
int ret;
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
/* Disable chip interrupts before unregistering port */
ret = tcpci_write16(tcpci, TCPC_ALERT_MASK, 0);
if (ret < 0)
return ret;
reg = dm_i2c_reg_read(tcpci->dev, TCPC_BMCIO_CTRL);
if (reg < 0)
return reg;
/*
* For Type-C devices with PD capability, Only disable VBUS detect,
* do not diable 24M oscillator for BMC communication. Otherwise,
* data packets cannot be received.
*/
if (attached && pd_capable)
reg &= ~TCPC_BMCIO_VBUS_DETECT_MASK;
else
reg &= ~(TCPC_BMCIO_VBUS_DETECT_MASK | TCPC_BMCIO_24M_OSC_MASK);
return dm_i2c_reg_write(tcpci->dev, TCPC_BMCIO_CTRL, reg);
}
static int tcpci_parse_config(struct tcpci *tcpci)
{
tcpci->controls_vbus = true; /* XXX */
tcpci->tcpc.connector_node = dev_read_subnode(tcpci->dev, "connector");
if (!ofnode_valid(tcpci->tcpc.connector_node)) {
printf("%s: 'connector' node is not found\n", __func__);
return -EINVAL;
}
return 0;
}
struct tcpci *tcpci_register_port(struct udevice *dev, struct tcpci_data *data)
{
struct tcpci *tcpci;
int err;
tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL);
if (!tcpci)
return ERR_PTR(-ENOMEM);
err = gpio_request_by_name(dev, "int-n-gpios", 0, &tcpci->gpio_cc_int, GPIOD_IS_IN);
if (err) {
printf("%s: fail to get int GPIO: err=%d\n", __func__, err);
tcpci->gpio_cc_int_present = false;
} else {
printf("%s: success to get int GPIO: err=%d\n", __func__, err);
tcpci->gpio_cc_int_present = true;
}
tcpci->dev = dev;
tcpci->data = data;
tcpci->tcpc.init = tcpci_init;
tcpci->tcpc.get_vbus = tcpci_get_vbus;
tcpci->tcpc.set_vbus = tcpci_set_vbus;
tcpci->tcpc.set_cc = tcpci_set_cc;
tcpci->tcpc.get_cc = tcpci_get_cc;
tcpci->tcpc.set_polarity = tcpci_set_polarity;
tcpci->tcpc.set_vconn = tcpci_set_vconn;
tcpci->tcpc.start_toggling = tcpci_start_toggling;
tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
tcpci->tcpc.set_roles = tcpci_set_roles;
tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
tcpci->tcpc.poll_event = tcpci_poll_event;
tcpci->tcpc.enter_low_power_mode = tcpci_enter_low_power_mode;
err = tcpci_parse_config(tcpci);
if (err < 0)
return ERR_PTR(err);
tcpci->port = tcpm_port_init(tcpci->dev, &tcpci->tcpc);
if (IS_ERR(tcpci->port)) {
printf("%s: failed to tcpm port init\n", __func__);
return ERR_CAST(tcpci->port);
}
// tcpm_tcpc_reset(tcpci->port);
tcpm_poll_event(tcpci->port);
return tcpci;
}
EXPORT_SYMBOL_GPL(tcpci_register_port);
void tcpci_unregister_port(struct tcpci *tcpci)
{
tcpm_uninit_port(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_unregister_port);
int tcpci_get_voltage_fun(struct tcpci *tcpci)
{
return tcpm_get_voltage(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_get_voltage_fun);
int tcpci_get_current_fun(struct tcpci *tcpci)
{
return tcpm_get_current(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_get_current_fun);
int tcpci_get_online_fun(struct tcpci *tcpci)
{
return tcpm_get_online(tcpci->port);
}
EXPORT_SYMBOL_GPL(tcpci_get_online_fun);
static int tcpci_probe(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
int err;
u16 val = 0;
chip->udev = dev;
/* Disable chip interrupts before requesting irq */
err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, val);
if (err < 0)
return err;
chip->tcpci = tcpci_register_port(chip->udev, &chip->data);
if (IS_ERR(chip->tcpci))
return PTR_ERR(chip->tcpci);
return 0;
}
static int tcpci_remove(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
int err;
/* Disable chip interrupts before unregistering port */
err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
if (err < 0)
return err;
tcpci_unregister_port(chip->tcpci);
return 0;
}
static int tcpci_get_voltage(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
return tcpm_get_voltage(chip->tcpci->port);
}
static int tcpci_get_current(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
return tcpm_get_current(chip->tcpci->port);
}
static int tcpci_get_online(struct udevice *dev)
{
struct tcpci_chip *chip = dev_get_priv(dev);
return tcpm_get_online(chip->tcpci->port);
}
static struct dm_power_delivery_ops tcpci_ops = {
.get_voltage = tcpci_get_voltage,
.get_current = tcpci_get_current,
.get_online = tcpci_get_online,
};
static const struct udevice_id tcpci_ids[] = {
{ .compatible = "nxp,ptn5110", },
{},
};
U_BOOT_DRIVER(tcpci) = {
.name = "tcpci",
.id = UCLASS_PD,
.of_match = tcpci_ids,
.ops = &tcpci_ops,
.probe = tcpci_probe,
.remove = tcpci_remove,
.priv_auto_alloc_size = sizeof(struct tcpci_chip),
}
MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
MODULE_LICENSE("GPL");

View File

@@ -1,150 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2015-2017 Google, Inc
*
* USB Type-C Port Controller Interface.
*/
#ifndef __LINUX_USB_TCPCI_H
#define __LINUX_USB_TCPCI_H
#define TCPC_VENDOR_ID 0x0
#define TCPC_PRODUCT_ID 0x2
#define TCPC_BCD_DEV 0x4
#define TCPC_TC_REV 0x6
#define TCPC_PD_REV 0x8
#define TCPC_PD_INT_REV 0xa
#define TCPC_ALERT 0x10
#define TCPC_ALERT_VBUS_DISCNCT BIT(11)
#define TCPC_ALERT_RX_BUF_OVF BIT(10)
#define TCPC_ALERT_FAULT BIT(9)
#define TCPC_ALERT_V_ALARM_LO BIT(8)
#define TCPC_ALERT_V_ALARM_HI BIT(7)
#define TCPC_ALERT_TX_SUCCESS BIT(6)
#define TCPC_ALERT_TX_DISCARDED BIT(5)
#define TCPC_ALERT_TX_FAILED BIT(4)
#define TCPC_ALERT_RX_HARD_RST BIT(3)
#define TCPC_ALERT_RX_STATUS BIT(2)
#define TCPC_ALERT_POWER_STATUS BIT(1)
#define TCPC_ALERT_CC_STATUS BIT(0)
#define TCPC_ALERT_MASK 0x12
#define TCPC_POWER_STATUS_MASK 0x14
#define TCPC_FAULT_STATUS_MASK 0x15
#define TCPC_CONFIG_STD_OUTPUT 0x18
#define TCPC_TCPC_CTRL 0x19
#define TCPC_TCPC_CTRL_ORIENTATION BIT(0)
#define TCPC_ROLE_CTRL 0x1a
#define TCPC_ROLE_CTRL_DRP BIT(6)
#define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4
#define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3
#define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0
#define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1
#define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2
#define TCPC_ROLE_CTRL_CC2_SHIFT 2
#define TCPC_ROLE_CTRL_CC2_MASK 0x3
#define TCPC_ROLE_CTRL_CC1_SHIFT 0
#define TCPC_ROLE_CTRL_CC1_MASK 0x3
#define TCPC_ROLE_CTRL_CC_RA 0x0
#define TCPC_ROLE_CTRL_CC_RP 0x1
#define TCPC_ROLE_CTRL_CC_RD 0x2
#define TCPC_ROLE_CTRL_CC_OPEN 0x3
#define TCPC_FAULT_CTRL 0x1b
#define TCPC_POWER_CTRL 0x1c
#define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0)
#define TCPC_CC_STATUS 0x1d
#define TCPC_CC_STATUS_TOGGLING BIT(5)
#define TCPC_CC_STATUS_TERM BIT(4)
#define TCPC_CC_STATUS_CC2_SHIFT 2
#define TCPC_CC_STATUS_CC2_MASK 0x3
#define TCPC_CC_STATUS_CC1_SHIFT 0
#define TCPC_CC_STATUS_CC1_MASK 0x3
#define TCPC_POWER_STATUS 0x1e
#define TCPC_POWER_STATUS_UNINIT BIT(6)
#define TCPC_POWER_STATUS_VBUS_DET BIT(3)
#define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
#define TCPC_FAULT_STATUS 0x1f
#define TCPC_COMMAND 0x23
#define TCPC_CMD_WAKE_I2C 0x11
#define TCPC_CMD_DISABLE_VBUS_DETECT 0x22
#define TCPC_CMD_ENABLE_VBUS_DETECT 0x33
#define TCPC_CMD_DISABLE_SINK_VBUS 0x44
#define TCPC_CMD_SINK_VBUS 0x55
#define TCPC_CMD_DISABLE_SRC_VBUS 0x66
#define TCPC_CMD_SRC_VBUS_DEFAULT 0x77
#define TCPC_CMD_SRC_VBUS_HIGH 0x88
#define TCPC_CMD_LOOK4CONNECTION 0x99
#define TCPC_CMD_RXONEMORE 0xAA
#define TCPC_CMD_I2C_IDLE 0xFF
#define TCPC_DEV_CAP_1 0x24
#define TCPC_DEV_CAP_2 0x26
#define TCPC_STD_INPUT_CAP 0x28
#define TCPC_STD_OUTPUT_CAP 0x29
#define TCPC_MSG_HDR_INFO 0x2e
#define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3)
#define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0)
#define TCPC_MSG_HDR_INFO_REV_SHIFT 1
#define TCPC_MSG_HDR_INFO_REV_MASK 0x3
#define TCPC_RX_DETECT 0x2f
#define TCPC_RX_DETECT_HARD_RESET BIT(5)
#define TCPC_RX_DETECT_SOP BIT(0)
#define TCPC_RX_BYTE_CNT 0x30
#define TCPC_RX_BUF_FRAME_TYPE 0x31
#define TCPC_RX_HDR 0x32
#define TCPC_RX_DATA 0x34 /* through 0x4f */
#define TCPC_TRANSMIT 0x50
#define TCPC_TRANSMIT_RETRY_SHIFT 4
#define TCPC_TRANSMIT_RETRY_MASK 0x3
#define TCPC_TRANSMIT_TYPE_SHIFT 0
#define TCPC_TRANSMIT_TYPE_MASK 0x7
#define TCPC_TX_BYTE_CNT 0x51
#define TCPC_TX_HDR 0x52
#define TCPC_TX_DATA 0x54 /* through 0x6f */
#define TCPC_VBUS_VOLTAGE 0x70
#define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72
#define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74
#define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76
#define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78
#define TCPC_BMCIO_CTRL 0x90
#define TCPC_BMCIO_VBUS_DETECT_MASK BIT(1)
#define TCPC_BMCIO_VBUS_DETECT_ENABLE BIT(1)
#define TCPC_BMCIO_VBUS_DETECT_DISABLE 0
#define TCPC_BMCIO_24M_OSC_MASK BIT(0)
#define TCPC_BMCIO_ENABLE_24M_OSC BIT(0)
#define TCPC_BMCIO_DISABLE_24M_OSC 0
struct tcpci;
struct tcpci_data {
struct regmap *regmap;
int (*init)(struct tcpci *tcpci, struct tcpci_data *data);
int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data,
bool enable);
int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
enum typec_cc_status cc);
};
struct tcpci *tcpci_register_port(struct udevice *dev, struct tcpci_data *data);
void tcpci_unregister_port(struct tcpci *tcpci);
int tcpci_get_voltage_fun(struct tcpci *tcpci);
int tcpci_get_current_fun(struct tcpci *tcpci);
int tcpci_get_online_fun(struct tcpci *tcpci);
irqreturn_t tcpci_irq(struct tcpci *tcpci);
#endif /* __LINUX_USB_TCPCI_H */

View File

@@ -1,229 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2021 Rockchip Co.,Ltd.
* Author: Wang Jie <dave.wang@rock-chips.com>
*
* Hynetek Husb311 Type-C Chip Driver
*/
#include <dm.h>
#include <i2c.h>
#include <asm/gpio.h>
#include <power/power_delivery/tcpm.h>
#include <power/power_delivery/power_delivery.h>
#include "tcpci.h"
#define HUSB311_VID 0x2E99
#define HUSB311_PID 0x0311
#define HUSB311_TCPC_I2C_RESET 0x9E
#define HUSB311_TCPC_SOFTRESET 0xA0
#define HUSB311_TCPC_FILTER 0xA1
#define HUSB311_TCPC_TDRP 0xA2
#define HUSB311_TCPC_DCSRCDRP 0xA3
#define HUSB311_I2C_RETRY_MAX_CNT 3
struct husb311_chip {
struct udevice *udev;
struct tcpci_data data;
struct tcpci *tcpci;
};
static int husb311_read16(struct husb311_chip *chip, unsigned int reg)
{
int ret = 0;
u8 buffer[2];
ret = dm_i2c_read(chip->udev, reg, buffer, 2);
if (ret < 0) {
printf("%s: cannot read %02x, ret=%d\n",
__func__, reg, ret);
return ret;
}
ret = ((buffer[1] << 8) & 0xFF00) + (buffer[0] & 0xFF);
return ret;
}
static int husb311_write8(struct husb311_chip *chip, unsigned int reg, u8 val)
{
int ret = 0;
int i;
for (i = 0; i < HUSB311_I2C_RETRY_MAX_CNT; i++) {
ret = dm_i2c_write(chip->udev, reg, &val, 1);
if (!ret)
break;
else
udelay(200);
}
if (ret)
printf("%s: cannot write 0x%02x to 0x%02x, ret=%d\n",
__func__, val, reg, ret);
return ret;
}
static int husb311_write16(struct husb311_chip *chip, unsigned int reg, u16 val)
{
int ret = 0;
u8 buffer[2];
buffer[0] = val & 0xFF;
buffer[1] = (val >> 8) & 0xFF;
ret = dm_i2c_write(chip->udev, reg, buffer, 2);
if (ret)
printf("%s: cannot write 0x%02x, len=%d, ret=%d\n",
__func__, reg, 2, ret);
return ret;
}
static struct husb311_chip *tdata_to_husb311(struct tcpci_data *tdata)
{
return container_of(tdata, struct husb311_chip, data);
}
static int husb311_sw_reset(struct husb311_chip *chip)
{
/* soft reset */
return husb311_write8(chip, HUSB311_TCPC_SOFTRESET, 0x01);
}
static int husb311_init(struct tcpci *tcpci, struct tcpci_data *tdata)
{
int ret;
struct husb311_chip *chip = tdata_to_husb311(tdata);
/* I2C reset : (val + 1) * 12.5ms */
ret = husb311_write8(chip, HUSB311_TCPC_I2C_RESET, 0x8F);
/* tTCPCfilter : (26.7 * val) us */
ret |= husb311_write8(chip, HUSB311_TCPC_FILTER, 0x0F);
/* tDRP : (51.2 + 6.4 * val) ms */
ret |= husb311_write8(chip, HUSB311_TCPC_TDRP, 0x04);
/* dcSRC.DRP : 33% */
ret |= husb311_write16(chip, HUSB311_TCPC_DCSRCDRP, 330);
if (ret)
printf("%s: fail to init registers(%d)\n", __func__, ret);
return ret;
}
static int husb311_check_revision(struct husb311_chip *chip)
{
int ret;
ret = husb311_read16(chip, TCPC_VENDOR_ID);
if (ret < 0) {
printf("%s: fail to read Vendor id(%d)\n", __func__, ret);
return ret;
}
if (ret != HUSB311_VID) {
printf("%s: vid is not correct, 0x%04x\n", __func__, ret);
return -ENODEV;
}
ret = husb311_read16(chip, TCPC_PRODUCT_ID);
if (ret < 0) {
printf("%s: fail to read Product id(%d)\n", __func__, ret);
return ret;
}
if (ret != HUSB311_PID) {
printf("%s: pid is not correct, 0x%04x\n", __func__, ret);
return -ENODEV;
}
return 0;
}
static int husb311_probe(struct udevice *dev)
{
int ret;
struct husb311_chip *chip = dev_get_priv(dev);
chip->udev = dev;
ret = husb311_check_revision(chip);
if (ret < 0) {
printf("%s: check vid/pid fail(%d)\n", __func__, ret);
return ret;
}
ret = husb311_sw_reset(chip);
if (ret) {
printf("%s: fail to soft reset, ret = %d\n", __func__, ret);
return ret;
}
chip->data.init = husb311_init;
chip->tcpci = tcpci_register_port(chip->udev, &chip->data);
if (IS_ERR(chip->tcpci))
return PTR_ERR(chip->tcpci);
return 0;
}
static int husb311_remove(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
int ret = 0;
printf("PD chip husb311 remove\n");
/* Disable chip interrupts before unregistering port */
ret = husb311_write16(chip, TCPC_ALERT_MASK, 0);
if (ret < 0)
return ret;
tcpci_unregister_port(chip->tcpci);
return 0;
}
static int husb311_get_voltage(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
return tcpci_get_voltage_fun(chip->tcpci);
}
static int husb311_get_current(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
return tcpci_get_current_fun(chip->tcpci);
}
static int husb311_get_online(struct udevice *dev)
{
struct husb311_chip *chip = dev_get_priv(dev);
return tcpci_get_online_fun(chip->tcpci);
}
static struct dm_power_delivery_ops husb311_ops = {
.get_voltage = husb311_get_voltage,
.get_current = husb311_get_current,
.get_online = husb311_get_online,
};
static const struct udevice_id husb311_ids[] = {
{ .compatible = "hynetek,husb311" },
{},
};
U_BOOT_DRIVER(husb311) = {
.name = "husb311",
.id = UCLASS_PD,
.of_match = husb311_ids,
.ops = &husb311_ops,
.probe = husb311_probe,
.remove = husb311_remove,
.priv_auto_alloc_size = sizeof(struct husb311_chip),
};
MODULE_AUTHOR("Wang Jie <dave.wang@rock-chips.com>");
MODULE_DESCRIPTION("Husb311 USB Type-C Port Controller Interface Driver");
MODULE_LICENSE("GPL v2");

File diff suppressed because it is too large Load Diff

View File

@@ -145,18 +145,6 @@ config TPM2_TIS_SPI
to the device using the standard TPM Interface Specification (TIS)
protocol.
config TPM_Z32H330TC_SPI
bool "STMicroelectronics Z32H330TC SPI TPM"
depends on TPM_V2 && DM_SPI
---help---
This driver supports STMicroelectronics TPM devices connected on the SPI bus.
The usual tpm operations and the 'tpm' command can be used to talk
to the device using the standard TPM Interface Specification (TIS)
protocol
config CMD_MEASURED_BOOT
bool "Enable support for measured_boot to bootcmd"
endif # TPM_V2
endmenu

View File

@@ -34,7 +34,10 @@
*/
void xhci_flush_cache(uintptr_t addr, u32 len)
{
BUG_ON((void *)addr == NULL || len == 0);
// th1520 will load fw_dymaic.bin into 0x0
// so disable it
// load usb 0:2 0x0 fw_dynamic.bin
//BUG_ON((void *)addr == NULL || len == 0);
flush_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));
@@ -49,7 +52,10 @@ void xhci_flush_cache(uintptr_t addr, u32 len)
*/
void xhci_inval_cache(uintptr_t addr, u32 len)
{
BUG_ON((void *)addr == NULL || len == 0);
// th1520 will load fw_dymaic.bin into 0x0
// so disable it
// load usb 0:2 0x0 fw_dynamic.bin
//BUG_ON((void *)addr == NULL || len == 0);
invalidate_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));

View File

@@ -351,16 +351,24 @@ config VIDEO_LCD_ILITEK_ILI9881C
Say Y here if you want to enable support for ILITEK ILI9881C
800x1280 DSI video mode panel.
config VIDEO_LCD_MINGJUN_070BI30IA2
bool "MingJun 070BI30IA2 DSI LCD panel support"
depends on DM_VIDEO
select VIDEO_MIPI_DSI
help
Say Y here if you want to enable support for Mingjun 070BI30IA2
800x1280 DSI video mode panel.
config VIDEO_LCD_JD9365DA
bool "JD9365DA DSI LCD panel support"
depends on DM_VIDEO
select VIDEO_MIPI_DSI
help
Say Y here if you want to enable support for JD9365DA
800x1280 DSI video mode panel.
config VIDEO_LCD_CUSTOM_LOGO
bool "LCD CUSTOM logo support"
default n
help
Say Y here if you want to enable support for custom logo.

View File

@@ -55,6 +55,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
obj-$(CONFIG_VIDEO_LCD_ILITEK_ILI9881C) += ilitek-ili9881c.o
obj-$(CONFIG_VIDEO_LCD_MINGJUN_070BI30IA2) += mingjun-070bi30ia2.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
obj-${CONFIG_VIDEO_MESON} += meson/

View File

@@ -368,12 +368,12 @@ static int ili9881c_panel_prepare(struct udevice *panel)
ret = dm_gpio_set_value(&priv->reset, true);
if (ret)
return ret;
mdelay(1);
mdelay(500);
ret = dm_gpio_set_value(&priv->reset, false);
if (ret)
return ret;
mdelay(10);
mdelay(100);
return 0;
}
@@ -464,6 +464,20 @@ static int ili9881c_panel_ofdata_to_platdata(struct udevice *dev)
dev_err(dev, "Warning: cannot get reset GPIO\n");
if (ret != -ENOENT)
return ret;
} else {
/* not a bug, but uboot's regulator is buggy,
I haven't more time to fix it, so put it here
*/
/* reset panel */
ret = dm_gpio_set_value(&priv->reset, false);
if (ret)
return ret;
mdelay(100);
ret = dm_gpio_set_value(&priv->reset, true);
if (ret)
return ret;
mdelay(100);
}
/* power gpios */

View File

@@ -0,0 +1,490 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <mipi_dsi.h>
#include <panel.h>
#include <asm/gpio.h>
struct mingjun_panel_cmd {
char cmdlen;
char cmddata[0x40];
};
static const struct mingjun_panel_cmd mingjun_on_cmds[] = {
// { .cmdlen = 4, .cmddata = {0xB9, 0xFF, 0x83, 0x94} },
// { .cmdlen = 11, .cmddata = {0xB1, 0x48, 0x0A, 0x6A, 0x09, 0x33, 0x54,
// 0x71, 0x71, 0x2E, 0x45} },
// { .cmdlen = 7, .cmddata = {0xBA, 0x63, 0x03, 0x68, 0x6B, 0xB2, 0xC0} },
// { .cmdlen = 7, .cmddata = {0xB2, 0x00, 0x80, 0x64, 0x0C, 0x06, 0x2F} },
// { .cmdlen = 22, .cmddata = {0xB4, 0x1C, 0x78, 0x1C, 0x78, 0x1C, 0x78, 0x01,
// 0x0C, 0x86, 0x75, 0x00, 0x3F, 0x1C, 0x78, 0x1C,
// 0x78, 0x1C, 0x78, 0x01, 0x0C, 0x86} },
// { .cmdlen = 34, .cmddata = {0xD3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
// 0x08, 0x32, 0x10, 0x05, 0x00, 0x05, 0x32, 0x13,
// 0xC1, 0x00, 0x01, 0x32, 0x10, 0x08, 0x00, 0x00,
// 0x37, 0x03, 0x07, 0x07, 0x37, 0x05, 0x05, 0x37,
// 0x0C, 0x40} },
// { .cmdlen = 45, .cmddata = {0xD5, 0x18, 0x18, 0x18, 0x18, 0x22, 0x23, 0x20,
// 0x21, 0x04, 0x05, 0x06, 0x07, 0x00, 0x01, 0x02,
// 0x03, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
// 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
// 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
// 0x18, 0x19, 0x19, 0x19, 0x19} },
// { .cmdlen = 45, .cmddata = {0xD6, 0x18, 0x18, 0x19, 0x19, 0x21, 0x20, 0x23,
// 0x22, 0x03, 0x02, 0x01, 0x00, 0x07, 0x06, 0x05,
// 0x04, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
// 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
// 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
// 0x18, 0x19, 0x19, 0x18, 0x18} },
// { .cmdlen = 59, .cmddata = {0xE0, 0x07, 0x08, 0x09, 0x0D, 0x10, 0x14, 0x16,
// 0x13, 0x24, 0x36, 0x48, 0x4A, 0x58, 0x6F, 0x76,
// 0x80, 0x97, 0xA5, 0xA8, 0xB5, 0xC6, 0x62, 0x63,
// 0x68, 0x6F, 0x72, 0x78, 0x7F, 0x7F, 0x00, 0x02,
// 0x08, 0x0D, 0x0C, 0x0E, 0x0F, 0x10, 0x24, 0x36,
// 0x48, 0x4A, 0x58, 0x6F, 0x78, 0x82, 0x99, 0xA4,
// 0xA0, 0xB1, 0xC0, 0x5E, 0x5E, 0x64, 0x6B, 0x6C,
// 0x73, 0x7F, 0x7F} },
// { .cmdlen = 2, .cmddata = {0xCC, 0x03} },
// { .cmdlen = 3, .cmddata = {0xC0, 0x1F, 0x73} },
// { .cmdlen = 3, .cmddata = {0xB6, 0x90, 0x90} },
// { .cmdlen = 2, .cmddata = {0xD4, 0x02} },
// { .cmdlen = 2, .cmddata = {0xBD, 0x01} },
// { .cmdlen = 2, .cmddata = {0xB1, 0x00} },
// { .cmdlen = 2, .cmddata = {0xBD, 0x00} },
// { .cmdlen = 8, .cmddn bata = {0xBF, 0x40, 0x81, 0x50, 0x00, 0x1A, 0xFC, 0x01} },
// { .cmdlen = 2, .cmddata = {0x36, 0x02} },
{ .cmdlen =4, .cmddata = {0xFF,0x98,0x81,0x03} },
{ .cmdlen = 2, .cmddata = {0x01,0x00} },
{ .cmdlen = 2, .cmddata = {0x02,0x00} },
{ .cmdlen = 2, .cmddata = {0x03,0x73} },
{ .cmdlen = 2, .cmddata = {0x04,0x13} },
{ .cmdlen = 2, .cmddata = {0x05,0x00} },
{ .cmdlen = 2, .cmddata = {0x06,0x0A} },
{ .cmdlen = 2, .cmddata = {0x07,0x05} },
{ .cmdlen = 2, .cmddata = {0x11,0x00} },
{ .cmdlen = 2, .cmddata = {0x09,0x28} },
{ .cmdlen = 2, .cmddata = {0x0A,0x00} },
{ .cmdlen = 2, .cmddata = {0x0B,0x00} },
{ .cmdlen = 2, .cmddata = {0x0C,0x00} },
{ .cmdlen = 2, .cmddata = {0x0D,0x28} },
{ .cmdlen = 2, .cmddata = {0x0E,0x00} },
{ .cmdlen = 2, .cmddata = {0x0F,0x28} },
{ .cmdlen = 2, .cmddata = {0x10,0x28} },
{ .cmdlen = 2, .cmddata = {0x11,0x00} },
{ .cmdlen = 2, .cmddata = {0x12,0x00} },
{ .cmdlen = 2, .cmddata = {0x13,0x00} },
{ .cmdlen = 2, .cmddata = {0x14,0x00} },
{ .cmdlen = 2, .cmddata = {0x15,0x00} },
{ .cmdlen = 2, .cmddata = {0x16,0x00} },
{ .cmdlen = 2, .cmddata = {0x17,0x00} },
{ .cmdlen = 2, .cmddata = {0x18,0x00} },
{ .cmdlen = 2, .cmddata = {0x19,0x00} },
{ .cmdlen = 2, .cmddata = {0x1A,0x00} },
{ .cmdlen = 2, .cmddata = {0x1B,0x00} },
{ .cmdlen = 2, .cmddata = {0x1C,0x00} },
{ .cmdlen = 2, .cmddata = {0x1D,0x00} },
{ .cmdlen = 2, .cmddata = {0x1E,0x40} },
{ .cmdlen = 2, .cmddata = {0x1F,0x80} },
{ .cmdlen = 2, .cmddata = {0x20,0x06} },
{ .cmdlen = 2, .cmddata = {0x21,0x01} },
{ .cmdlen = 2, .cmddata = {0x22,0x00} },
{ .cmdlen = 2, .cmddata = {0x23,0x00} },
{ .cmdlen = 2, .cmddata = {0x24,0x00} },
{ .cmdlen = 2, .cmddata = {0x25,0x00} },
{ .cmdlen = 2, .cmddata = {0x26,0x00} },
{ .cmdlen = 2, .cmddata = {0x27,0x00} },
{ .cmdlen = 2, .cmddata = {0x28,0x33} },
{ .cmdlen = 2, .cmddata = {0x29,0x33} },
{ .cmdlen = 2, .cmddata = {0x2A,0x00} },
{ .cmdlen = 2, .cmddata = {0x2B,0x00} },
{ .cmdlen = 2, .cmddata = {0x2C,0x04} },
{ .cmdlen = 2, .cmddata = {0x2D,0x0C} },
{ .cmdlen = 2, .cmddata = {0x2E,0x05} },
{ .cmdlen = 2, .cmddata = {0x2F,0x05} },
{ .cmdlen = 2, .cmddata = {0x30,0x00} },
{ .cmdlen = 2, .cmddata = {0x31,0x00} },
{ .cmdlen = 2, .cmddata = {0x32,0x31} },
{ .cmdlen = 2, .cmddata = {0x33,0x00} },
{ .cmdlen = 2, .cmddata = {0x34,0x00} },
{ .cmdlen = 2, .cmddata = {0x35,0x0A} },
{ .cmdlen = 2, .cmddata = {0x36,0x00} },
{ .cmdlen = 2, .cmddata = {0x37,0x08} },
{ .cmdlen = 2, .cmddata = {0x70,0x00} },
{ .cmdlen = 2, .cmddata = {0x39,0x00} },
{ .cmdlen = 2, .cmddata = {0x3A,0x00} },
{ .cmdlen = 2, .cmddata = {0x3B,0x00} },
{ .cmdlen = 2, .cmddata = {0x3C,0x00} },
{ .cmdlen = 2, .cmddata = {0x3D,0x00} },
{ .cmdlen = 2, .cmddata = {0x3E,0x00} },
{ .cmdlen = 2, .cmddata = {0x3F,0x00} },
{ .cmdlen = 2, .cmddata = {0x40,0x00} },
{ .cmdlen = 2, .cmddata = {0x41,0x00} },
{ .cmdlen = 2, .cmddata = {0x42,0x00} },
{ .cmdlen = 2, .cmddata = {0x43,0x08} },
{ .cmdlen = 2, .cmddata = {0x44,0x00} },
{ .cmdlen = 2, .cmddata = {0xA0,0x02} },
{ .cmdlen = 2, .cmddata = {0x51,0x23} },
{ .cmdlen = 2, .cmddata = {0x52,0x44} },
{ .cmdlen = 2, .cmddata = {0x53,0x67} },
{ .cmdlen = 2, .cmddata = {0x54,0x89} },
{ .cmdlen = 2, .cmddata = {0x55,0xAB} },
{ .cmdlen = 2, .cmddata = {0x56,0x01} },
{ .cmdlen = 2, .cmddata = {0x57,0x23} },
{ .cmdlen = 2, .cmddata = {0x58,0x45} },
{ .cmdlen = 2, .cmddata = {0x59,0x67} },
{ .cmdlen = 2, .cmddata = {0x5A,0x89} },
{ .cmdlen = 2, .cmddata = {0x5B,0xAB} },
{ .cmdlen = 2, .cmddata = {0x5C,0xCD} },
{ .cmdlen = 2, .cmddata = {0x5D,0xEF} },
{ .cmdlen = 2, .cmddata = {0x5E,0x11} },
{ .cmdlen = 2, .cmddata = {0x5F,0x02} },
{ .cmdlen = 2, .cmddata = {0x60,0x08} },
{ .cmdlen = 2, .cmddata = {0x61,0x0E} },
{ .cmdlen = 2, .cmddata = {0x62,0x0F} },
{ .cmdlen = 2, .cmddata = {0x63,0x0C} },
{ .cmdlen = 2, .cmddata = {0x64,0x0D} },
{ .cmdlen = 2, .cmddata = {0x65,0x17} },
{ .cmdlen = 2, .cmddata = {0x66,0x01} },
{ .cmdlen = 2, .cmddata = {0x67,0x01} },
{ .cmdlen = 2, .cmddata = {0x68,0x02} },
{ .cmdlen = 2, .cmddata = {0x69,0x02} },
{ .cmdlen = 2, .cmddata = {0x6A,0x00} },
{ .cmdlen = 2, .cmddata = {0x6B,0x00} },
{ .cmdlen = 2, .cmddata = {0x6C,0x02} },
{ .cmdlen = 2, .cmddata = {0x6D,0x02} },
{ .cmdlen = 2, .cmddata = {0x6E,0x16} },
{ .cmdlen = 2, .cmddata = {0x6F,0x16} },
{ .cmdlen = 2, .cmddata = {0x70,0x06} },
{ .cmdlen = 2, .cmddata = {0x71,0x06} },
{ .cmdlen = 2, .cmddata = {0x72,0x07} },
{ .cmdlen = 2, .cmddata = {0x73,0x07} },
{ .cmdlen = 2, .cmddata = {0x74,0x02} },
{ .cmdlen = 2, .cmddata = {0x75,0x02} },
{ .cmdlen = 2, .cmddata = {0x76,0x08} },
{ .cmdlen = 2, .cmddata = {0x77,0x0E} },
{ .cmdlen = 2, .cmddata = {0x78,0x0F} },
{ .cmdlen = 2, .cmddata = {0x79,0x0C} },
{ .cmdlen = 2, .cmddata = {0x7A,0x0D} },
{ .cmdlen = 2, .cmddata = {0x7B,0x17} },
{ .cmdlen = 2, .cmddata = {0x7C,0x01} },
{ .cmdlen = 2, .cmddata = {0x7D,0x01} },
{ .cmdlen = 2, .cmddata = {0x7E,0x02} },
{ .cmdlen = 2, .cmddata = {0x7F,0x02} },
{ .cmdlen = 2, .cmddata = {0x80,0x00} },
{ .cmdlen = 2, .cmddata = {0x81,0x00} },
{ .cmdlen = 2, .cmddata = {0x82,0x02} },
{ .cmdlen = 2, .cmddata = {0x83,0x02} },
{ .cmdlen = 2, .cmddata = {0x84,0x16} },
{ .cmdlen = 2, .cmddata = {0x85,0x16} },
{ .cmdlen = 2, .cmddata = {0x86,0x06} },
{ .cmdlen = 2, .cmddata = {0x87,0x06} },
{ .cmdlen = 2, .cmddata = {0x88,0x07} },
{ .cmdlen = 2, .cmddata = {0x89,0x07} },
{ .cmdlen = 2, .cmddata = {0x8A,0x02} },
{ .cmdlen = 4, .cmddata = {0xFF,0x98,0x81,0x04} },
{ .cmdlen = 2, .cmddata = {0x6E,0x1A} },
{ .cmdlen = 2, .cmddata = {0x6F,0x37} },
{ .cmdlen = 2, .cmddata = {0x3A,0xA4} },
{ .cmdlen = 2, .cmddata = {0x8D,0x1F} },
{ .cmdlen = 2, .cmddata = {0x87,0xBA} },
{ .cmdlen = 2, .cmddata = {0xB2,0xD1} },
{ .cmdlen = 2, .cmddata = {0x88,0x0B} },
{ .cmdlen = 2, .cmddata = {0x38,0x01} },
{ .cmdlen = 2, .cmddata = {0x39,0x00} },
{ .cmdlen = 2, .cmddata = {0xB5,0x02} },
{ .cmdlen = 2, .cmddata = {0x31,0x25} },
{ .cmdlen = 2, .cmddata = {0x3B,0x98} },
{ .cmdlen = 4, .cmddata = {0xFF,0x98,0x81,0x01} },
{ .cmdlen = 2, .cmddata = {0x22,0x0A} },
{ .cmdlen = 2, .cmddata = {0x31,0x00} },
{ .cmdlen = 2, .cmddata = {0xA6,0xA6} },
{ .cmdlen = 2, .cmddata = {0x55,0x3D} },
{ .cmdlen = 2, .cmddata = {0x50,0x9E} },
{ .cmdlen = 2, .cmddata = {0x51,0x99} },
{ .cmdlen = 2, .cmddata = {0x60,0x06} },
{ .cmdlen = 2, .cmddata = {0x62,0x20} },
{ .cmdlen = 2, .cmddata = {0xA0,0x00} },
{ .cmdlen = 2, .cmddata = {0xA1,0x17} },
{ .cmdlen = 2, .cmddata = {0xA2,0x26} },
{ .cmdlen = 2, .cmddata = {0xA3,0x13} },
{ .cmdlen = 2, .cmddata = {0xA4,0x16} },
{ .cmdlen = 2, .cmddata = {0xA5,0x29} },
{ .cmdlen = 2, .cmddata = {0xA6,0x1E} },
{ .cmdlen = 2, .cmddata = {0xA7,0x1F} },
{ .cmdlen = 2, .cmddata = {0xA8,0x8B} },
{ .cmdlen = 2, .cmddata = {0xA9,0x1D} },
{ .cmdlen = 2, .cmddata = {0xAA,0x2A} },
{ .cmdlen = 2, .cmddata = {0xAB,0x7B} },
{ .cmdlen = 2, .cmddata = {0xAC,0x1A} },
{ .cmdlen = 2, .cmddata = {0xAD,0x19} },
{ .cmdlen = 2, .cmddata = {0xAE,0x4E} },
{ .cmdlen = 2, .cmddata = {0xAF,0x24} },
{ .cmdlen = 2, .cmddata = {0xB0,0x29} },
{ .cmdlen = 2, .cmddata = {0xB1,0x4F} },
{ .cmdlen = 2, .cmddata = {0xB2,0x5C} },
{ .cmdlen = 2, .cmddata = {0xB3,0x3E} },
{ .cmdlen = 2, .cmddata = {0xC0,0x00} },
{ .cmdlen = 2, .cmddata = {0xC1,0x17} },
{ .cmdlen = 2, .cmddata = {0xC2,0x26} },
{ .cmdlen = 2, .cmddata = {0xC3,0x13} },
{ .cmdlen = 2, .cmddata = {0xC4,0x16} },
{ .cmdlen = 2, .cmddata = {0xC5,0x29} },
{ .cmdlen = 2, .cmddata = {0xC6,0x1E} },
{ .cmdlen = 2, .cmddata = {0xC7,0x1F} },
{ .cmdlen = 2, .cmddata = {0xC8,0x8B} },
{ .cmdlen = 2, .cmddata = {0xC9,0x1D} },
{ .cmdlen = 2, .cmddata = {0xCA,0x2A} },
{ .cmdlen = 2, .cmddata = {0xCB,0x7B} },
{ .cmdlen = 2, .cmddata = {0xCC,0x1A} },
{ .cmdlen = 2, .cmddata = {0xCD,0x19} },
{ .cmdlen = 2, .cmddata = {0xCE,0x4E} },
{ .cmdlen = 2, .cmddata = {0xCF,0x24} },
{ .cmdlen = 2, .cmddata = {0xD0,0x29} },
{ .cmdlen = 2, .cmddata = {0xD1,0x4D} },
{ .cmdlen = 2, .cmddata = {0xD2,0x5C} },
{ .cmdlen = 2, .cmddata = {0xD3,0x3E} },
{ .cmdlen = 4, .cmddata = {0xFF,0x98,0x81,0x00} },
{ .cmdlen = 2, .cmddata = {0x11,0x00} },
{ .cmdlen = 2, .cmddata = {0x29,0x00} },
{ .cmdlen = 2, .cmddata = {0x35,0x00} },
{ .cmdlen = 2, .cmddata = {0x00,0x00} },
};
struct mj070bi30ia2_desc {
const struct mingjun_panel_cmd *on_cmds;
unsigned int on_cmds_num;
const struct display_timing *timing;
};
struct mj070bi30ia2_panel_priv {
struct udevice *backlight;
struct gpio_desc reset;
const struct mj070bi30ia2_desc *desc;
};
static const struct display_timing mj070bi30ia2_timing = {
.pixelclock.typ = 75750000,
.hactive.typ = 800,
.hfront_porch.typ = 48,
.hback_porch.typ = 80,
.hsync_len.typ = 32,
.vactive.typ = 1280,
.vfront_porch.typ = 3,
.vback_porch.typ = 24,
.vsync_len.typ = 10,
.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
};
static int mingjun_send_mipi_cmds(struct udevice *panel,
struct mingjun_panel_cmd *cmds)
{
struct mipi_dsi_panel_plat *plat = dev_get_platdata(panel);
struct mipi_dsi_device *dsi = plat->device;
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
int ret;
int i;
for (i = 0; i < priv->desc->on_cmds_num; i++) {
ret = mipi_dsi_dcs_write_buffer(dsi,
&(cmds[i].cmddata[0]), cmds[i].cmdlen);
if (ret < 0)
return ret;
}
dev_info(dsi->dev, "%s: send initial instruction\n", __func__);
return 0;
}
static int mj070bi30ia2_panel_setup(struct udevice *panel)
{
int ret;
u8 power_mode;
const struct mj070bi30ia2_instr *instr;
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
struct mipi_dsi_panel_plat *plat = dev_get_platdata(panel);
struct mipi_dsi_device *dsi = plat->device;
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
/* sanity test for connection */
ret = mipi_dsi_dcs_get_power_mode(dsi, &power_mode);
if (ret) {
dev_warn(dsi->dev, "%s: failed to get power mode: %d\n", __func__, ret);
return ret;
}
return 0;
}
static int mj070bi30ia2_panel_prepare(struct udevice *panel)
{
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
int ret;
/* reset panel */
ret = dm_gpio_set_value(&priv->reset, true);
if (ret)
return ret;
mdelay(1);
ret = dm_gpio_set_value(&priv->reset, false);
if (ret)
return ret;
mdelay(10);
return 0;
}
static int mj070bi30ia2_panel_enable(struct udevice *panel)
{
int ret;
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
struct mipi_dsi_panel_plat *plat = dev_get_platdata(panel);
struct mipi_dsi_device *dsi = plat->device;
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
ret = mingjun_send_mipi_cmds(panel, priv->desc->on_cmds);
if (ret < 0) {
dev_err(panel->dev, "failed to send DCS Init Code: %d\n", ret);
return ret;
}
ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
if (ret)
return ret;
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
if (ret)
return ret;
mdelay(10);
ret = mipi_dsi_dcs_set_display_on(dsi);
if (ret)
return ret;
#if 0
ret = backlight_enable(priv->backlight);
if (ret)
return ret;
#endif
return 0;
}
static int mj070bi30ia2_panel_enable_backlight(struct udevice *dev)
{
int ret;
struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
struct mipi_dsi_device *device = plat->device;
ret = mipi_dsi_attach(device);
if (ret < 0)
return ret;
ret = mj070bi30ia2_panel_setup(dev);
if (ret)
return ret;
ret = mj070bi30ia2_panel_enable(dev);
if (ret)
return ret;
return 0;
}
static int mj070bi30ia2_panel_get_display_timing(struct udevice *dev,
struct display_timing *timings)
{
struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev);
struct mipi_dsi_device *device = plat->device;
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(dev);
memcpy(timings, priv->desc->timing, sizeof(*timings));
device->lanes = 4;
device->format = MIPI_DSI_FMT_RGB888;
device->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST;
return 0;
}
static int mj070bi30ia2_panel_ofdata_to_platdata(struct udevice *dev)
{
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(dev);
int ret;
ret = gpio_request_by_name(dev, "reset-gpios", 0,
&priv->reset, GPIOD_IS_OUT);
if (ret) {
dev_err(dev, "Warning: cannot get reset GPIO\n");
return ret;
}
ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
"backlight", &priv->backlight);
if (ret) {
dev_err(dev, "Cannot get backlight: ret=%d\n", ret);
}
/* TODO: get lanes, format and mode from dtb */
return 0;
}
static int mj070bi30ia2_panel_probe(struct udevice *panel)
{
int ret;
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
priv->desc = (const struct mj070bi30ia2_desc *)dev_get_driver_data(panel);
/* prepare_panel */
ret = mj070bi30ia2_panel_prepare(panel);
if (ret) {
dev_err(panel, "failed to prepare panel : %d\n", ret);
return ret;
}
return 0;
}
static int mj070bi30ia2_panel_remove(struct udevice *panel)
{
struct mj070bi30ia2_panel_priv *priv = dev_get_priv(panel);
return dm_gpio_set_value(&priv->reset, true);
}
static const struct mj070bi30ia2_desc mj070bi30ia2_desc = {
.on_cmds = mingjun_on_cmds,
.on_cmds_num = ARRAY_SIZE(mingjun_on_cmds),
.timing = &mj070bi30ia2_timing,
};
static const struct panel_ops mj070bi30ia2_panel_ops = {
.enable_backlight = mj070bi30ia2_panel_enable_backlight,
.get_display_timing = mj070bi30ia2_panel_get_display_timing,
};
static const struct udevice_id mj070bi30ia2_panel_ids[] = {
{ .compatible = "mingjun,mj070bi30ia2", .data = (ulong)&mj070bi30ia2_desc },
{ /* sentinel */ }
};
U_BOOT_DRIVER(mj070bi30ia2_panel) = {
.name = "mj070bi30ia2_panel",
.id = UCLASS_PANEL,
.of_match = mj070bi30ia2_panel_ids,
.ops = &mj070bi30ia2_panel_ops,
.ofdata_to_platdata = mj070bi30ia2_panel_ofdata_to_platdata,
.probe = mj070bi30ia2_panel_probe,
.remove = mj070bi30ia2_panel_remove,
.platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat),
.priv_auto_alloc_size = sizeof(struct mj070bi30ia2_panel_priv),
};

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