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33 Commits

Author SHA1 Message Date
Godzil
0ea53495b0 Merge branch 'develop' into merging
Conflicts:
	src/bootldr/fileops.h
	src/bootldr/iap.c
	src/fpga_spi.c
	src/memory.c
	src/smc.c
	verilog/sd2snes/address.v
2014-01-16 22:16:51 +00:00
Maximilian Rehkopf
3cc8af1753 Menu: rename menu labels to "filesel", minor tweaks/fixes 2013-10-18 15:35:41 +02:00
Maximilian Rehkopf
c8b24a9618 Firmware: fix loading of partial-size BS dumps 2013-10-18 15:32:42 +02:00
Maximilian Rehkopf
c380ce9503 Adjust OpenOCD configuration for more recent versions 2013-10-18 15:31:25 +02:00
Maximilian Rehkopf
a734ae1ec5 pamper the compiler 2013-10-18 15:30:08 +02:00
Maximilian Rehkopf
f7d393451a Firmware: timeouts for FPGA configuration; LED flash codes for various FPGA related errors 2013-10-18 14:43:02 +02:00
Maximilian Rehkopf
28949ac307 Firmware: preparations for USB 2013-10-18 14:40:20 +02:00
Maximilian Rehkopf
4ff823078f Bootloader: fix flash buffer alignment 2013-10-18 14:37:36 +02:00
Maximilian Rehkopf
988d84954b Bootloader: change baud rate from 921600 to more common 115200 2013-10-18 14:37:12 +02:00
Maximilian Rehkopf
3f2e4e37db menu: rename menu.a65 to filesel.a65; add required library to README 2013-10-18 14:20:19 +02:00
Maximilian Rehkopf
39b07df47e Correct LoROM SRAM mapping for smaller ROMs
SRAM is sometimes mapped not just to 70:0000-7fff but also to
70:8000-ffff if ROM size permits it (i.e. the ROM is small enough
to avoid overlap).
Map SRAM to 8000-ffff if the ROM mask denotes a ROM <= 16 MBits.
2013-06-30 23:42:28 +02:00
Maximilian Rehkopf
78beed80d7 FPGA: fix BSX PSRAM mapping 2013-06-26 10:44:57 +02:00
Maximilian Rehkopf
f7aa9832c6 update changelog 2012-11-18 21:01:39 +01:00
Maximilian Rehkopf
7233278db2 Firmware: fix FPGA DMA call 2012-11-18 20:12:19 +01:00
Maximilian Rehkopf
443f7b138c Firmware: update version number to 0.1.5 2012-11-18 20:11:46 +01:00
Maximilian Rehkopf
e92ad06f38 FPGA/Cx4: slow down bus timing 2012-11-18 20:10:29 +01:00
Maximilian Rehkopf
fa1e09d867 FPGA: fix large SRAM mapping 2012-11-18 17:18:26 +01:00
Maximilian Rehkopf
e504079e5d FPGA: slow down bus timing 2012-11-07 22:32:33 +01:00
Maximilian Rehkopf
1f5af01bc0 FPGA: add BS-X "hole" (regs 09-0b) 2012-11-07 22:31:28 +01:00
Maximilian Rehkopf
648569d900 Firmware: fix big SRAM handling 2012-11-07 22:29:38 +01:00
Maximilian Rehkopf
b91b598758 Firmware: fix MSU1 main loop behaviour 2012-11-07 11:06:56 +01:00
Maximilian Rehkopf
04c3cbc7a2 Firmware: [debug] log file size after loading 2012-11-07 11:06:29 +01:00
Maximilian Rehkopf
c204aa9a0b Firmware/FPGA: replace magic numbers with constants 2012-11-07 11:03:58 +01:00
Maximilian Rehkopf
605fc2dfb1 Firmware: remove unused file sdcard.h 2012-11-07 09:54:30 +01:00
Maximilian Rehkopf
b67e2a5c77 Firmware: clean up clock/timer init 2012-11-07 09:44:50 +01:00
Maximilian Rehkopf
fee97e5016 Firmware/CLI: list short file name and file size in ls command; print file name when saving SRAM 2012-11-07 09:31:33 +01:00
Maximilian Rehkopf
ce23ff6954 Firmware/CLI: add memset command, rename 'resume' to 'exit' 2012-11-07 09:27:00 +01:00
Maximilian Rehkopf
83b18cc447 Firmware: fix compile errors with newer gccs 2012-11-07 09:23:50 +01:00
Maximilian Rehkopf
e33fbdf77f menu: Ignore input from non-standard controllers (resolve #29) 2012-09-30 00:24:48 +02:00
Maximilian Rehkopf
9287d637d1 FPGA: properly map large SRAM (LoROM > 32kB, HiROM > 8kB) 2012-09-24 22:52:05 +02:00
Maximilian Rehkopf
13c24bea9d FPGA: more accurate BS-X memory map 2012-09-24 22:49:54 +02:00
Maximilian Rehkopf
791b688f40 menu: fix #26: first note cut off on S-APU SNESes 2012-09-24 22:37:39 +02:00
Maximilian Rehkopf
5939b6e581 Firmware: sort by entire filename, not just first 20 characters 2012-08-25 19:36:24 +02:00
25 changed files with 297 additions and 253 deletions

View File

@ -1,4 +1,4 @@
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 menu.o65 pad.o65 time.o65 mainmenu.o65 sysinfo.o65 spc700.o65 spcplay.o65 # gfx.o65 # vars.o65 OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 filesel.o65 pad.o65 time.o65 mainmenu.o65 sysinfo.o65 spc700.o65 spcplay.o65 # gfx.o65 # vars.o65
all: clean menu.bin map all: clean menu.bin map

View File

@ -45,9 +45,9 @@ bar_x .byt 0 ; pixel x position of select bar
bar_y .byt 0 ; pixel y position of select bar bar_y .byt 0 ; pixel y position of select bar
bar_w .byt 0 ; bar width bar_w .byt 0 ; bar width
bar_wl .byt 0 ; bar width bar_wl .byt 0 ; bar width
menu_state .byt 0 ; menu state (0=file select) filesel_state .byt 0 ; menu state (0=file select)
menu_dirty .byt 0 ; menu dirty (e.g. after state change or when redraw is needed) filesel_dirty .byt 0 ; menu dirty (e.g. after state change or when redraw is needed)
menu_sel .word 0 ; selected item # filesel_sel .word 0 ; selected item #
cursor_x .byt 0 ; current cursor position (x) cursor_x .byt 0 ; current cursor position (x)
cursor_y .byt 0 ; current cursor position (y) cursor_y .byt 0 ; current cursor position (y)
fd_addr .word 0 ; address of current "file descriptor" fd_addr .word 0 ; address of current "file descriptor"
@ -96,6 +96,8 @@ barstep .byt 0 ; step size for bar
;-misc ;-misc
testvar .word 0,0,0,0 testvar .word 0,0,0,0
;menu system
menu_stack .word 0,0,0,0,0,0,0,0
;----------hdma tables in WRAM (must be stable when cartridge is cut off) ;----------hdma tables in WRAM (must be stable when cartridge is cut off)
hdma_pal .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 hdma_pal .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

View File

@ -1,7 +1,7 @@
#include "memmap.i65" #include "memmap.i65"
#include "dma.i65" #include "dma.i65"
menu_init: filesel_init:
sep #$20 : .as sep #$20 : .as
rep #$10 : .xl rep #$10 : .xl
lda #^ROOT_DIR lda #^ROOT_DIR
@ -10,7 +10,7 @@ menu_init:
stx dirptr_addr stx dirptr_addr
sta dirstart_bank sta dirstart_bank
stx dirstart_addr stx dirstart_addr
stz menu_state stz filesel_state
stz dirend_onscreen stz dirend_onscreen
lda #$02 lda #$02
sta cursor_x sta cursor_x
@ -22,11 +22,11 @@ menu_init:
sta bar_wl sta bar_wl
ldx #$0000 ldx #$0000
stx dirptr_idx stx dirptr_idx
stx menu_sel stx filesel_sel
stx direntry_xscroll stx direntry_xscroll
stx direntry_xscroll_state stx direntry_xscroll_state
lda #$01 lda #$01
sta menu_dirty sta filesel_dirty
rep #$20 : .al rep #$20 : .al
lda #!dirlog lda #!dirlog
sta dirlog_idx sta dirlog_idx
@ -35,39 +35,39 @@ menu_init:
sta dirlog_idx+2 sta dirlog_idx+2
rts rts
menuloop: fileselloop:
menuloop_s1 fileselloop_s1
sep #$20 : .as sep #$20 : .as
rep #$10 : .xl rep #$10 : .xl
lda isr_done lda isr_done
lsr lsr
bcc menuloop_s1 bcc fileselloop_s1
stz isr_done stz isr_done
jsr printtime jsr printtime
jsr menu_updates ;update stuff, check keys etc jsr filesel_updates ;update stuff, check keys etc
lda menu_dirty ;is there ANY reason to redraw the menu? lda filesel_dirty ;is there ANY reason to redraw the menu?
cmp #$01 cmp #$01
beq menuloop_redraw ;then do beq fileselloop_redraw ;then do
jsr scroll_direntry jsr scroll_direntry
bra menuloop_s1 bra fileselloop_s1
menuloop_redraw fileselloop_redraw
stz menu_dirty stz filesel_dirty
jsr menu_statusbar jsr filesel_statusbar
jsr menu_redraw jsr filesel_redraw
jsr menu_cleanup ;update phase 2 jsr filesel_cleanup ;update phase 2
bra menuloop_s1 bra fileselloop_s1
rts rts
menu_cleanup: filesel_cleanup:
sep #$20 : .as sep #$20 : .as
rep #$10 : .xl rep #$10 : .xl
lda dirend_onscreen ;end of file list on screen? lda dirend_onscreen ;end of file list on screen?
beq menu_cleanup_out ; beq filesel_cleanup_out ;
lda dirend_idx lda dirend_idx
lsr lsr
lsr lsr
pha pha
menu_cleanup_loop ;pad rest of screen with empty lines filesel_cleanup_loop ;pad rest of screen with empty lines
cmp listdisp ;end of screen reached? cmp listdisp ;end of screen reached?
beq + ;then leave beq + ;then leave
pha pha
@ -86,24 +86,24 @@ menu_cleanup_loop ;pad rest of screen with empty lines
jsr hiprint jsr hiprint
pla pla
inc inc
bra menu_cleanup_loop bra filesel_cleanup_loop
+ +
pla pla
cmp menu_sel cmp filesel_sel
beq menu_cleanup_out beq filesel_cleanup_out
bpl menu_cleanup_out bpl filesel_cleanup_out
sta menu_sel sta filesel_sel
menu_cleanup_out filesel_cleanup_out
rts rts
menu_updates: filesel_updates:
;update selection, scroll etc ;update selection, scroll etc
lda menu_sel lda filesel_sel
asl asl
asl asl
sta dirptr_idx sta dirptr_idx
lda menu_sel lda filesel_sel
clc clc
adc #$08 adc #$08
sta bar_yl sta bar_yl
@ -140,47 +140,47 @@ menu_updates:
lda #$40 lda #$40
and pad1trig and pad1trig
bne key_x bne key_x
bra menuupd_out bra fileselupd_out
key_down key_down
jsr menu_key_down jsr filesel_key_down
bra menuupd_out bra fileselupd_out
key_up key_up
jsr menu_key_up jsr filesel_key_up
bra menuupd_out bra fileselupd_out
key_right key_right
jsr menu_key_right jsr filesel_key_right
bra menuupd_out bra fileselupd_out
key_left key_left
jsr menu_key_left jsr filesel_key_left
bra menuupd_out bra fileselupd_out
key_b key_b
jsr menu_key_b jsr filesel_key_b
bra menuupd_out bra fileselupd_out
key_a key_a
jsr menu_key_a jsr filesel_key_a
bra menuupd_out bra fileselupd_out
key_x key_x
jsr menu_key_x jsr filesel_key_x
bra menuupd_out bra fileselupd_out
key_select key_select
jsr menu_key_select jsr filesel_key_select
bra menuupd_out bra fileselupd_out
key_start key_start
jsr menu_key_start jsr filesel_key_start
bra menuupd_out bra fileselupd_out
menuupd_out fileselupd_out
lda #$09 lda #$09
sta cursor_y sta cursor_y
rts rts
menu_redraw: filesel_redraw:
lda menu_state lda filesel_state
beq redraw_filelist beq redraw_filelist
; cmp 1 ; cmp 1
; beq redraw_main ; beq redraw_main
menu_redraw_out filesel_redraw_out
rts rts
redraw_filelist redraw_filelist
@ -236,7 +236,7 @@ redraw_filelist_last ;check if next offscreen item is end of dir
redraw_filelist_out redraw_filelist_out
ldx #$0000 ldx #$0000
stx dirptr_idx stx dirptr_idx
brl menu_redraw_out brl filesel_redraw_out
print_direntry: print_direntry:
lda cursor_y lda cursor_y
@ -355,14 +355,14 @@ dirent_type_cont_2
rts rts
menu_key_down: filesel_key_down:
jsr scroll_direntry_clean jsr scroll_direntry_clean
lda listdisp lda listdisp
dec dec
cmp menu_sel cmp filesel_sel
bne down_noscroll bne down_noscroll
lda #$01 lda #$01
sta menu_dirty sta filesel_dirty
lda dirend_onscreen lda dirend_onscreen
bne down_out bne down_out
rep #$20 : .al rep #$20 : .al
@ -380,21 +380,21 @@ down_noscroll
lda dirend_idx lda dirend_idx
lsr lsr
lsr lsr
cmp menu_sel cmp filesel_sel
beq menuupd_lastcursor beq fileselupd_lastcursor
bcc menuupd_lastcursor bcc fileselupd_lastcursor
+ lda menu_sel + lda filesel_sel
inc inc
sta menu_sel sta filesel_sel
down_out down_out
rts rts
menu_key_up: filesel_key_up:
jsr scroll_direntry_clean jsr scroll_direntry_clean
lda menu_sel lda filesel_sel
bne up_noscroll bne up_noscroll
lda #$01 lda #$01
sta menu_dirty sta filesel_dirty
rep #$20 : .al rep #$20 : .al
lda dirptr_addr lda dirptr_addr
cmp dirstart_addr cmp dirstart_addr
@ -407,25 +407,25 @@ menu_key_up:
bra up_out bra up_out
up_noscroll up_noscroll
dec dec
sta menu_sel sta filesel_sel
up_out up_out
sep #$20 : .as sep #$20 : .as
rts rts
menuupd_lastcursor fileselupd_lastcursor
jsr scroll_direntry_clean jsr scroll_direntry_clean
lda dirend_idx lda dirend_idx
lsr lsr
lsr lsr
sta menu_sel sta filesel_sel
rts rts
; go back one page ; go back one page
menu_key_left: filesel_key_left:
stz direntry_xscroll stz direntry_xscroll
stz direntry_xscroll_state stz direntry_xscroll_state
lda #$01 ; must redraw afterwards lda #$01 ; must redraw afterwards
sta menu_dirty sta filesel_dirty
rep #$20 : .al rep #$20 : .al
lda dirptr_addr ; get current direntry pointer lda dirptr_addr ; get current direntry pointer
beq + ; special case: if 0, we are at the first entry in memory beq + ; special case: if 0, we are at the first entry in memory
@ -444,18 +444,18 @@ menu_key_left:
sep #$20 : .as sep #$20 : .as
rts rts
+ lda dirstart_addr ; reset pointer to start of directory + lda dirstart_addr ; reset pointer to start of directory
stz menu_sel ; reset the selection cursor too stz filesel_sel ; reset the selection cursor too
bra - bra -
; go forth one page ; go forth one page
menu_key_right: filesel_key_right:
stz direntry_xscroll stz direntry_xscroll
stz direntry_xscroll_state stz direntry_xscroll_state
sep #$20 : .as sep #$20 : .as
lda dirend_onscreen lda dirend_onscreen
bne menuupd_lastcursor bne fileselupd_lastcursor
lda #$01 lda #$01
sta menu_dirty sta filesel_dirty
rep #$20 : .al rep #$20 : .al
lda listdisp lda listdisp
asl asl
@ -466,18 +466,18 @@ menu_key_right:
sep #$20 : .as sep #$20 : .as
rts rts
menu_key_a: filesel_key_a:
jsr select_item jsr select_item
rts rts
menu_key_select: filesel_key_select:
rts rts
menu_key_start: filesel_key_start:
jsr select_last_file jsr select_last_file
rts rts
menu_key_b: filesel_key_b:
stz direntry_xscroll stz direntry_xscroll
stz direntry_xscroll_state stz direntry_xscroll_state
rep #$20 : .al rep #$20 : .al
@ -485,7 +485,7 @@ menu_key_b:
beq skip_key_b beq skip_key_b
sta dirptr_addr sta dirptr_addr
lda #$0000 lda #$0000
sta menu_sel sta filesel_sel
bra select_item bra select_item
skip_key_b skip_key_b
sep #$20 : .as sep #$20 : .as
@ -493,7 +493,7 @@ skip_key_b
select_item: select_item:
rep #$20 : .al rep #$20 : .al
lda menu_sel lda filesel_sel
and #$00ff and #$00ff
asl asl
asl asl
@ -568,7 +568,7 @@ select_dir:
lda @dirptr_bank lda @dirptr_bank
sta [dirlog_idx], y sta [dirlog_idx], y
iny iny
lda @menu_sel lda @filesel_sel
sta [dirlog_idx], y sta [dirlog_idx], y
lda @dirlog_idx lda @dirlog_idx
clc clc
@ -604,12 +604,12 @@ select_dir:
sta @dirptr_addr sta @dirptr_addr
sta @dirstart_addr sta @dirstart_addr
lda #$0000 lda #$0000
sta @menu_sel sta @filesel_sel
sta @direntry_xscroll sta @direntry_xscroll
sta @direntry_xscroll_state sta @direntry_xscroll_state
sep #$20 : .as sep #$20 : .as
lda #$01 lda #$01
sta @menu_dirty sta @filesel_dirty
plb plb
rts rts
@ -638,11 +638,11 @@ select_parent:
sta @dirptr_bank sta @dirptr_bank
iny iny
rep #$20 : .al rep #$20 : .al
lda [dirlog_idx], y ; load menu_sel lda [dirlog_idx], y ; load filesel_sel
sta @menu_sel sta @filesel_sel
sep #$20 : .as sep #$20 : .as
lda #$01 lda #$01
sta @menu_dirty sta @filesel_dirty
rts rts
select_spc: select_spc:
@ -666,7 +666,7 @@ wait_spc:
jsr restore_screen jsr restore_screen
rts rts
menu_key_x: filesel_key_x:
jsr mainmenu jsr mainmenu
rts rts
@ -676,11 +676,11 @@ setup_224:
lda #18 lda #18
sta listdisp sta listdisp
dec dec
cmp menu_sel cmp filesel_sel
bmi setup_224_adjsel bmi setup_224_adjsel
bra + bra +
setup_224_adjsel setup_224_adjsel
sta menu_sel sta filesel_sel
+ +
lda #18*64 lda #18*64
sta textdmasize sta textdmasize
@ -699,7 +699,7 @@ setup_224_adjsel
sta hdma_math_selection sta hdma_math_selection
stz vidmode stz vidmode
lda #$01 lda #$01
sta menu_dirty sta filesel_dirty
lda #^space64 lda #^space64
ldx #!space64 ldx #!space64
sta print_bank sta print_bank
@ -719,7 +719,7 @@ setup_224_adjsel
plp plp
rts rts
menu_statusbar filesel_statusbar
pha pha
phx phx
php php
@ -822,7 +822,7 @@ scroll_direntry_clean:
rts rts
scroll_direntry: scroll_direntry:
ldy menu_sel ldy filesel_sel
lda direntry_xscroll_state lda direntry_xscroll_state
bne + bne +
lda direntry_fits, y lda direntry_fits, y
@ -852,7 +852,7 @@ scroll_direntry_scrollfast
lda #$02 lda #$02
sta cursor_x sta cursor_x
rep #$20 : .al rep #$20 : .al
lda menu_sel lda filesel_sel
asl asl
asl asl
tay tay
@ -869,7 +869,7 @@ scroll_direntry_scrollfast
lda [dirptr_addr], y lda [dirptr_addr], y
iny iny
sta @dirent_type sta @dirent_type
ldy menu_sel ldy filesel_sel
sty direntry_fits_idx sty direntry_fits_idx
phy phy
jsr print_direntry jsr print_direntry

View File

@ -21,15 +21,15 @@ GAME_MAIN:
tcs tcs
sep #$20 : .as sep #$20 : .as
jsr killdma ; The following initialization processes must not touch memory ; jsr killdma ; The following initialization processes must not touch memory
jsr waitblank ; structures used by the main menu ! jsr waitblank ; structures used by the file selector !
jsr snes_init jsr snes_init
cli cli
lda #$01 lda #$01
sta $420d ; fast cpu sta $420d ; fast cpu
jsr setup_gfx jsr setup_gfx
jsr colortest jsr colortest
jsr tests jsr video_init
jsr setup_hdma jsr setup_hdma
lda #$0f lda #$0f
sta cur_bright sta cur_bright
@ -43,15 +43,15 @@ set_bank:
coldboot: ; Regular, cold-start init coldboot: ; Regular, cold-start init
sep #$20 : .as sep #$20 : .as
jsr killdma ; jsr killdma
jsr waitblank jsr waitblank
jsr snes_init jsr snes_init
lda #$01 lda #$01
sta $420d ; fast cpu sta $420d ; fast cpu
jsr setup_gfx jsr setup_gfx
jsr colortest jsr colortest
jsr menu_init jsr filesel_init
jsr tests jsr video_init
jsr setup_hdma jsr setup_hdma
jsr screen_on jsr screen_on
@ -60,7 +60,7 @@ coldboot: ; Regular, cold-start init
beq + beq +
jsl time_init jsl time_init
+ +
jsr menuloop jsr fileselloop
cli cli
stz $4200 stz $4200
jmp @infloop ;infinite loop in WRAM jmp @infloop ;infinite loop in WRAM
@ -138,6 +138,30 @@ killdma:
stz $4359 stz $4359
stz $435a stz $435a
stz $435b stz $435b
stz $4360
stz $4361
stz $4362
stz $4363
stz $4364
stz $4365
stz $4366
stz $4367
stz $4368
stz $4369
stz $436a
stz $436b
stz $4370
stz $4371
stz $4372
stz $4373
stz $4374
stz $4375
stz $4376
stz $4377
stz $4378
stz $4379
stz $437a
stz $437b
stz $420b stz $420b
stz $420c stz $420c
@ -190,7 +214,7 @@ setup_gfx:
;clear OAM tables ;clear OAM tables
ldx #$0000 ldx #$0000
stx $2102 stx $2102
DMA0(#$08, #$544, #^zero, #!zero, #$04) DMA0(#$08, #$220, #^zero, #!zero, #$04)
;copy logo tiles ;copy logo tiles
ldx #$2000 ldx #$2000
@ -273,7 +297,7 @@ setup_gfx:
DMA0(#$00, #$6C, #^fadeloop, #!fadeloop, #$80); DMA0(#$00, #$6C, #^fadeloop, #!fadeloop, #$80);
rts rts
tests: video_init:
sep #$20 : .as ;8-bit accumulator sep #$20 : .as ;8-bit accumulator
rep #$10 : .xl ;16-bit index rep #$10 : .xl ;16-bit index
lda #$03 ;mode 3, mode 5 via HDMA lda #$03 ;mode 3, mode 5 via HDMA

View File

@ -80,15 +80,12 @@ mm_entloop
plb plb
phx phx
jsr hiprint jsr hiprint
plx rep #$20 : .al
inx pla
inx clc
inx adc #$08
inx tax
inx sep #$20 : .as
inx
inx
inx
inc mm_tmp inc mm_tmp
lda mm_tmp lda mm_tmp
cmp @main_entries cmp @main_entries

View File

@ -17,6 +17,7 @@ b) Cortex M3 toolchain
- texinfo - texinfo
- libmpfr-dev - libmpfr-dev
- libgmp3-dev - libgmp3-dev
- libmpc-dev
- gawk - gawk
- bison - bison
- recode - recode

View File

@ -31,8 +31,7 @@
enum filestates { FILE_OK=0, FILE_ERR, FILE_EOF }; enum filestates { FILE_OK=0, FILE_ERR, FILE_EOF };
#define GCC_ALIGN_WORKAROUND __attribute__ ((aligned(4))) BYTE file_buf[512] __attribute__((aligned(4)));
BYTE file_buf[512] GCC_ALIGN_WORKAROUND;
FATFS fatfs; FATFS fatfs;
FIL file_handle; FIL file_handle;
FRESULT file_res; FRESULT file_res;

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@ -189,7 +189,7 @@ FLASH_RES flash_file(uint8_t *filename) {
} }
DBG_UART uart_putc('w'); DBG_UART uart_putc('w');
if((res = iap_ram2flash(flash_addr, file_buf, 512)) != CMD_SUCCESS) { if((res = iap_ram2flash(flash_addr, file_buf, 512)) != CMD_SUCCESS) {
//printf("error %ld while writing to address %08lx (sector %d)\n", res, flash_addr, current_sec); DBG_BL printf("error %ld while writing from %08lX to address %08lx (sector %d)\n", res, (uint32_t)file_buf, flash_addr, current_sec);
DBG_UART uart_putc('X'); DBG_UART uart_putc('X');
return ERR_FLASH; return ERR_FLASH;
} }

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@ -52,6 +52,15 @@ void clock_init() {
enablePLL0(); enablePLL0();
setCCLKDiv(6); setCCLKDiv(6);
connectPLL0(); connectPLL0();
/* configure PLL1 for USB operation */
disconnectPLL1();
disablePLL1();
LPC_SC->PLL1CFG = 0x23;
enablePLL1();
connectPLL1();
} }
void setFlashAccessTime(uint8_t clocks) { void setFlashAccessTime(uint8_t clocks) {
@ -84,6 +93,32 @@ void disconnectPLL0() {
PLL0feed(); PLL0feed();
} }
void setPLL1MultPrediv(uint16_t mult, uint8_t prediv) {
LPC_SC->PLL1CFG=PLL_MULT(mult) | PLL_PREDIV(prediv);
PLL1feed();
}
void enablePLL1() {
LPC_SC->PLL1CON |= PLLE1;
PLL1feed();
}
void disablePLL1() {
LPC_SC->PLL1CON &= ~PLLE1;
PLL1feed();
}
void connectPLL1() {
while(!(LPC_SC->PLL1STAT & PLOCK1));
LPC_SC->PLL1CON |= PLLC1;
PLL1feed();
}
void disconnectPLL1() {
LPC_SC->PLL1CON &= ~PLLC1;
PLL1feed();
}
void setCCLKDiv(uint8_t div) { void setCCLKDiv(uint8_t div) {
LPC_SC->CCLKCFG=CCLK_DIV(div); LPC_SC->CCLKCFG=CCLK_DIV(div);
} }
@ -102,6 +137,11 @@ void PLL0feed() {
LPC_SC->PLL0FEED=0x55; LPC_SC->PLL0FEED=0x55;
} }
void PLL1feed() {
LPC_SC->PLL1FEED=0xaa;
LPC_SC->PLL1FEED=0x55;
}
void setClkSrc(uint8_t src) { void setClkSrc(uint8_t src) {
LPC_SC->CLKSRCSEL=src; LPC_SC->CLKSRCSEL=src;
} }

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@ -8,6 +8,9 @@
#define PLLE0 (1<<0) #define PLLE0 (1<<0)
#define PLLC0 (1<<1) #define PLLC0 (1<<1)
#define PLOCK0 (1<<26) #define PLOCK0 (1<<26)
#define PLLE1 (1<<0)
#define PLLC1 (1<<1)
#define PLOCK1 (1<<10)
#define OSCEN (1<<5) #define OSCEN (1<<5)
#define OSCSTAT (1<<6) #define OSCSTAT (1<<6)
#define FLASHTIM(x) (((x-1)<<12)|0x3A) #define FLASHTIM(x) (((x-1)<<12)|0x3A)
@ -56,14 +59,18 @@ void clock_init(void);
void setFlashAccessTime(uint8_t clocks); void setFlashAccessTime(uint8_t clocks);
void setPLL0MultPrediv(uint16_t mult, uint8_t prediv); void setPLL0MultPrediv(uint16_t mult, uint8_t prediv);
void enablePLL0(void); void enablePLL0(void);
void disablePLL0(void); void disablePLL0(void);
void connectPLL0(void); void connectPLL0(void);
void disconnectPLL0(void); void disconnectPLL0(void);
void PLL0feed(void);
void setPLL1MultPrediv(uint16_t mult, uint8_t prediv);
void enablePLL1(void);
void disablePLL1(void);
void connectPLL1(void);
void disconnectPLL1(void);
void PLL1feed(void);
void setCCLKDiv(uint8_t div); void setCCLKDiv(uint8_t div);
@ -71,7 +78,5 @@ void enableMainOsc(void);
void disableMainOsc(void); void disableMainOsc(void);
void PLL0feed(void);
void setClkSrc(uint8_t src); void setClkSrc(uint8_t src);
#endif #endif

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@ -96,4 +96,7 @@
#define SD_DAT (LPC_GPIO2->FIOPIN0) #define SD_DAT (LPC_GPIO2->FIOPIN0)
#define USB_CONNREG LPC_GPIO4
#define USB_CONNBIT 28
#endif #endif

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@ -152,7 +152,7 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
break; break;
} }
fn = *fno.lfname ? fno.lfname : fno.fname; fn = *fno.lfname ? fno.lfname : fno.fname;
if ((*fn == '.') || !(strncasecmp(fn, SYS_DIR_NAME, sizeof(SYS_DIR_NAME)))) continue; if ((*fn == '.') || !(strncasecmp(fn, SYS_DIR_NAME, strlen(SYS_DIR_NAME)+1))) continue;
if (fno.fattrib & AM_DIR) { if (fno.fattrib & AM_DIR) {
depth++; depth++;
if(depth < FS_MAX_DEPTH) { if(depth < FS_MAX_DEPTH) {

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@ -98,37 +98,43 @@ void fpga_pgm(uint8_t* filename) {
uint8_t data; uint8_t data;
int i; int i;
tick_t timeout; tick_t timeout;
/* open configware file */
file_open(filename, FA_READ);
if(file_res) {
uart_putc('?');
uart_putc(0x30+file_res);
return;
}
do { do {
i=0; i=0;
timeout = getticks() + 100; timeout = getticks() + 1;
fpga_set_prog_b(0); fpga_set_prog_b(0);
if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) { while(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
printf("PROGB is stuck high!\n"); if(getticks() > timeout) {
led_panic(); printf("PROGB is stuck high!\n");
} led_panic(LED_PANIC_FPGA_PROGB_STUCK);
}
}
timeout = getticks() + 100;
uart_putc('P'); uart_putc('P');
fpga_set_prog_b(1); fpga_set_prog_b(1);
while(!fpga_get_initb()){ while(!fpga_get_initb()){
if(getticks() > timeout) { if(getticks() > timeout) {
printf("no response from FPGA trying to initiate configuration!\n"); printf("no response from FPGA trying to initiate configuration!\n");
led_panic(); led_panic(LED_PANIC_FPGA_NO_INITB);
} }
}; };
if(fpga_get_done()) { timeout = getticks() + 100;
printf("DONE is stuck high!\n"); while(fpga_get_done()) {
led_panic(); if(getticks() > timeout) {
printf("DONE is stuck high!\n");
led_panic(LED_PANIC_FPGA_DONE_STUCK);
}
} }
LPC_GPIO2->FIOMASK1 = ~(BV(0)); LPC_GPIO2->FIOMASK1 = ~(BV(0));
uart_putc('p'); uart_putc('p');
/* open configware file */
file_open(filename, FA_READ);
if(file_res) {
uart_putc('?');
uart_putc(0x30+file_res);
return;
}
uart_putc('C'); uart_putc('C');
for (;;) { for (;;) {
@ -144,7 +150,7 @@ if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
} while (!fpga_get_done() && retries--); } while (!fpga_get_done() && retries--);
if(!fpga_get_done()) { if(!fpga_get_done()) {
printf("FPGA failed to configure after %d tries.\n", MAXRETRIES); printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
led_panic(); led_panic(LED_PANIC_FPGA_NOCONF);
} }
printf("FPGA configured\n"); printf("FPGA configured\n");
fpga_postinit(); fpga_postinit();
@ -165,12 +171,15 @@ void fpga_rompgm() {
while(!fpga_get_initb()){ while(!fpga_get_initb()){
if(getticks() > timeout) { if(getticks() > timeout) {
printf("no response from FPGA trying to initiate configuration!\n"); printf("no response from FPGA trying to initiate configuration!\n");
led_panic(); led_panic(LED_PANIC_FPGA_NO_INITB);
} }
}; };
if(fpga_get_done()) { timeout = getticks() + 100;
printf("DONE is stuck high!\n"); while(fpga_get_done()) {
led_panic(); if(getticks() > timeout) {
printf("DONE is stuck high!\n");
led_panic(LED_PANIC_FPGA_DONE_STUCK);
}
} }
LPC_GPIO2->FIOMASK1 = ~(BV(0)); LPC_GPIO2->FIOMASK1 = ~(BV(0));
uart_putc('p'); uart_putc('p');
@ -190,7 +199,7 @@ void fpga_rompgm() {
} while (!fpga_get_done() && retries--); } while (!fpga_get_done() && retries--);
if(!fpga_get_done()) { if(!fpga_get_done()) {
printf("FPGA failed to configure after %d tries.\n", MAXRETRIES); printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
led_panic(); led_panic(LED_PANIC_FPGA_NOCONF);
} }
printf("FPGA configured\n"); printf("FPGA configured\n");
fpga_postinit(); fpga_postinit();

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@ -225,9 +225,6 @@ void fpga_set_sddma_range(uint16_t start, uint16_t end) {
} }
void fpga_sddma(uint8_t tgt, uint8_t partial) { void fpga_sddma(uint8_t tgt, uint8_t partial) {
//printf("%s %02X -> %02X\n", __func__, tgt, partial);
uint32_t test = 0;
uint8_t status = 0;
BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 0; BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 0;
FPGA_SELECT(); FPGA_SELECT();
FPGA_TX_BYTE(FPGA_CMD_SDDMA | (tgt & 3) | (partial ? FPGA_SDDMA_PARTIAL : 0)); FPGA_TX_BYTE(FPGA_CMD_SDDMA | (tgt & 3) | (partial ? FPGA_SDDMA_PARTIAL : 0));

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@ -85,12 +85,12 @@ void toggle_write_led() {
writeled(~led_writeledstate); writeled(~led_writeledstate);
} }
void led_panic() { void led_panic(uint8_t led_states) {
led_std(); led_std();
while(1) { while(1) {
rdyled(1); rdyled((led_states >> 2) & 1);
readled(1); readled((led_states >> 1) & 1);
writeled(1); writeled(led_states & 1);
delay_ms(100); delay_ms(100);
rdyled(0); rdyled(0);
readled(0); readled(0);

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@ -3,6 +3,12 @@
#ifndef _LED_H #ifndef _LED_H
#define _LED_H #define _LED_H
#define LED_PANIC_FPGA_PROGB_STUCK (1)
#define LED_PANIC_FPGA_NO_INITB (2)
#define LED_PANIC_FPGA_DONE_STUCK (3)
#define LED_PANIC_FPGA_NOCONF (4)
#define LED_PANIC_FPGA_DEAD (5)
void readbright(uint8_t bright); void readbright(uint8_t bright);
void writebright(uint8_t bright); void writebright(uint8_t bright);
void rdybright(uint8_t bright); void rdybright(uint8_t bright);
@ -13,7 +19,7 @@ void led_clkout32(uint32_t val);
void toggle_rdy_led(void); void toggle_rdy_led(void);
void toggle_read_led(void); void toggle_read_led(void);
void toggle_write_led(void); void toggle_write_led(void);
void led_panic(void); void led_panic(uint8_t led_states);
void led_pwm(void); void led_pwm(void);
void led_std(void); void led_std(void);
void led_init(void); void led_init(void);

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@ -26,9 +26,9 @@ if { [info exists CPUTAPID ] } {
} }
#delays on reset lines #delays on reset lines
#if your OpenOCD version rejects "jtag_nsrst_delay" replace it with: #if your OpenOCD version rejects "adapter_nsrst_delay" replace it with:
#adapter_nsrst_delay 200 #jtag_nsrst_delay 200
jtag_nsrst_delay 200 adapter_nsrst_delay 200
jtag_ntrst_delay 200 jtag_ntrst_delay 200
# LPC2000 & LPC1700 -> SRST causes TRST # LPC2000 & LPC1700 -> SRST causes TRST
@ -39,7 +39,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
#jtag newtap x3s tap -irlen 6 -ircapture 0x11 -irmask 0x11 -expected-id 0x0141c093 #jtag newtap x3s tap -irlen 6 -ircapture 0x11 -irmask 0x11 -expected-id 0x0141c093
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME -event reset-init 0 target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME -event reset-init 0
# LPC1754 has 16kB of SRAM In the ARMv7-M "Code" area (at 0x10000000) # LPC1754 has 16kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
# and 16K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000). # and 16K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000).
@ -56,7 +56,7 @@ flash bank $_FLASHNAME lpc2000 0x0 0x20000 0 0 $_TARGETNAME \
# Run with *real slow* clock by default since the # Run with *real slow* clock by default since the
# boot rom could have been playing with the PLL, so # boot rom could have been playing with the PLL, so
# we have no idea what clock the target is running at. # we have no idea what clock the target is running at.
jtag_khz 1000 adapter_khz 1000
$_TARGETNAME configure -event reset-init { $_TARGETNAME configure -event reset-init {
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select

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@ -359,7 +359,7 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
} }
/* fpga test fail: panic */ /* fpga test fail: panic */
if(fpga_test() != FPGA_TEST_TOKEN){ if(fpga_test() != FPGA_TEST_TOKEN){
led_panic(); led_panic(LED_PANIC_FPGA_DEAD);
} }
/* else reset */ /* else reset */
} }

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@ -217,7 +217,7 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
printf("reconfigure FPGA with %s...\n", romprops.fpga_conf); printf("reconfigure FPGA with %s...\n", romprops.fpga_conf);
fpga_pgm((uint8_t*)romprops.fpga_conf); fpga_pgm((uint8_t*)romprops.fpga_conf);
} }
set_mcu_addr(base_addr); set_mcu_addr(base_addr + romprops.load_address);
file_open(filename, FA_READ); file_open(filename, FA_READ);
ff_sd_offload=1; ff_sd_offload=1;
sd_offload_tgt=0; sd_offload_tgt=0;
@ -229,7 +229,7 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
read_size += bytes_read; read_size += bytes_read;
if (file_res || !bytes_read) break; if (file_res || !bytes_read) break;
if(!(count++ % 512)) { if(!(count++ % 512)) {
uart_putc('.'); uart_putc('.');
} }
} }
file_close(); file_close();
@ -485,7 +485,6 @@ uint32_t load_bootrle(uint32_t base_addr) {
void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr) { void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr) {
uint32_t count = 0; uint32_t count = 0;
//uint32_t num = 0;
FPGA_DESELECT(); FPGA_DESELECT();
file_open(filename, FA_CREATE_ALWAYS | FA_WRITE); file_open(filename, FA_CREATE_ALWAYS | FA_WRITE);
@ -502,7 +501,7 @@ void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr) {
count++; count++;
} }
FPGA_DESELECT(); FPGA_DESELECT();
/*num = */file_write(); file_write();
if(file_res) { if(file_res) {
uart_putc(0x30+file_res); uart_putc(0x30+file_res);
} }
@ -606,7 +605,6 @@ uint64_t sram_gettime(uint32_t base_addr) {
void load_dspx(const uint8_t *filename, uint8_t coretype) { void load_dspx(const uint8_t *filename, uint8_t coretype) {
UINT bytes_read; UINT bytes_read;
//DWORD filesize;
uint16_t word_cnt; uint16_t word_cnt;
uint8_t wordsize_cnt = 0; uint8_t wordsize_cnt = 0;
uint16_t sector_remaining = 0; uint16_t sector_remaining = 0;
@ -630,7 +628,6 @@ void load_dspx(const uint8_t *filename, uint8_t coretype) {
} }
file_open((uint8_t*)filename, FA_READ); file_open((uint8_t*)filename, FA_READ);
/*filesize = file_handle.fsize;*/
if(file_res) { if(file_res) {
printf("Could not read %s: error %d\n", filename, file_res); printf("Could not read %s: error %d\n", filename, file_res);
return; return;

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@ -70,6 +70,7 @@ void sram_writebyte(uint8_t val, uint32_t addr);
void sram_writeshort(uint16_t val, uint32_t addr); void sram_writeshort(uint16_t val, uint32_t addr);
void sram_writelong(uint32_t val, uint32_t addr); void sram_writelong(uint32_t val, uint32_t addr);
void sram_readblock(void* buf, uint32_t addr, uint16_t size); void sram_readblock(void* buf, uint32_t addr, uint16_t size);
void sram_readstrn(void* buf, uint32_t addr, uint16_t size);
void sram_readlongblock(uint32_t* buf, uint32_t addr, uint16_t count); void sram_readlongblock(uint32_t* buf, uint32_t addr, uint16_t count);
void sram_writeblock(void* buf, uint32_t addr, uint16_t size); void sram_writeblock(void* buf, uint32_t addr, uint16_t size);
void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr); void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr);

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@ -21,6 +21,6 @@ void power_init() {
| BV(PCRTC) | BV(PCRTC)
| BV(PCGPIO) | BV(PCGPIO)
| BV(PCPWM1) | BV(PCPWM1)
// | BV(PCUSB) | BV(PCUSB)
; ;
} }

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@ -59,6 +59,7 @@ void smc_id(snes_romprops_t* props) {
uint8_t score, maxscore=1, score_idx=2; /* assume LoROM */ uint8_t score, maxscore=1, score_idx=2; /* assume LoROM */
snes_header_t* header = &(props->header); snes_header_t* header = &(props->header);
props->load_address = 0;
props->has_dspx = 0; props->has_dspx = 0;
props->has_st0010 = 0; props->has_st0010 = 0;
props->has_cx4 = 0; props->has_cx4 = 0;
@ -95,6 +96,14 @@ void smc_id(snes_romprops_t* props) {
props->expramsize_bytes = 0; props->expramsize_bytes = 0;
props->mapper_id = 3; /* BS-X Memory Map */ props->mapper_id = 3; /* BS-X Memory Map */
props->region = 0; /* BS-X only existed in Japan */ props->region = 0; /* BS-X only existed in Japan */
uint8_t alloc = header->name[0x10];
if(alloc) {
while(!(alloc & 0x01)) {
props->load_address += 0x20000;
alloc >>= 1;
}
}
printf("load address: %lx\n", props->load_address);
return; return;
} }
} }

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@ -84,6 +84,7 @@ typedef struct _snes_romprops {
uint8_t has_cx4; /* CX4 presence flag */ uint8_t has_cx4; /* CX4 presence flag */
uint8_t fpga_features; /* feature/peripheral enable bits*/ uint8_t fpga_features; /* feature/peripheral enable bits*/
uint8_t region; /* game region (derived from destination code) */ uint8_t region; /* game region (derived from destination code) */
uint32_t load_address; /* where to load the ROM image */
snes_header_t header; /* original header from ROM image */ snes_header_t header; /* original header from ROM image */
} snes_romprops_t; } snes_romprops_t;

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@ -138,7 +138,7 @@ static int8_t parse_wordlist(char *wordlist) {
return -1; return -1;
} }
if (tolower(c) != tolower(*cur)) { if (tolower((int)c) != tolower((int)*cur)) {
// Check for end-of-word // Check for end-of-word
if (cur != curchar && (*cur == ' ' || *cur == 0)) { if (cur != curchar && (*cur == ' ' || *cur == 0)) {
// Partial match found, return that // Partial match found, return that

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@ -72,66 +72,33 @@ wire [23:0] SRAM_SNES_ADDR;
assign IS_ROM = ((!SNES_ADDR[22] & SNES_ADDR[15]) assign IS_ROM = ((!SNES_ADDR[22] & SNES_ADDR[15])
|(SNES_ADDR[22])); |(SNES_ADDR[22]));
/* HiROM SRAM is 8K end at 0x8000 and is at bank 0x20 and 0xA0 */
assign IS_SAVERAM_HIROM = ((SNES_ADDR[22:21] == 2'b01)
& SNES_ADDR[15:13] == 3'b011)
/* LoROM: SRAM @ Bank 0x70-0x7d, 0xf0-0xfd Offset 0000-7fff
TODO: 0000-ffff for small ROMs? */
assign IS_SAVERAM_LOROM = SNES_ADDR[22:16] == 7'b111
( &SNES_ADDR[22:20]
& (SNES_ADDR[19:16] < 4'b1110)
& !SNES_ADDR[15] )
assign IS_SAVERAM_EXHIROM = (!SNES_ADDR[22]
& SNES_ADDR[21]
& &SNES_ADDR[14:13]
& !SNES_ADDR[15])
assign IS_SAVERAM_BSX = ( (SNES_ADDR[23:19] == 5'b00010)
& (SNES_ADDR[15:12] == 4'b0101)
)
assign IS_SAVERAM_STARTOCEAN = (!SNES_ADDR[22]
& SNES_ADDR[21]
& &SNES_ADDR[14:13]
& !SNES_ADDR[15])
assign IS_SAVERAM_MENU = (!SNES_ADDR[22]
& SNES_ADDR[21]
& &SNES_ADDR[14:13]
& !SNES_ADDR[15])
assign IS_SAVERAM = SAVERAM_MASK[0] assign IS_SAVERAM = SAVERAM_MASK[0]
&(featurebits[FEAT_ST0010] &(featurebits[FEAT_ST0010]
?((SNES_ADDR[22:19] == 4'b1101) ?((SNES_ADDR[22:19] == 4'b1101)
& &(~SNES_ADDR[15:12]) & &(~SNES_ADDR[15:12])
& SNES_ADDR[11]) & SNES_ADDR[11])
:( :((MAPPER == 3'b000
( MAPPER == 3'b000 || MAPPER == 3'b010
|| MAPPER == 3'b010 || MAPPER == 3'b110
|| MAPPER == 3'b110 || MAPPER == 3'b111)
|| MAPPER == 3'b111) ? (!SNES_ADDR[22]
? (!SNES_ADDR[22] & SNES_ADDR[21]
& SNES_ADDR[21] & &SNES_ADDR[14:13]
& &SNES_ADDR[14:13] & !SNES_ADDR[15]
& !SNES_ADDR[15]) )
/* LoROM: SRAM @ Bank 0x70-0x7d, 0xf0-0xfd Offset 0000-7fff /* LoROM: SRAM @ Bank 0x70-0x7d, 0xf0-0xfd
TODO: 0000-ffff for small ROMs? */ * Offset 0000-7fff for ROM >= 32 MBit, otherwise 0000-ffff */
:(MAPPER == 3'b001) :(MAPPER == 3'b001)
? ( &SNES_ADDR[22:20] ? (&SNES_ADDR[22:20]
& (SNES_ADDR[19:16] < 4'b1110) & (SNES_ADDR[19:16] < 4'b1110)
& !SNES_ADDR[15] & (~SNES_ADDR[15] | ~ROM_MASK[21])
) )
/* BS-X: SRAM @ Bank 0x10-0x17 Offset 5000-5fff */ /* BS-X: SRAM @ Bank 0x10-0x17 Offset 5000-5fff */
:(MAPPER == 3'b011) :(MAPPER == 3'b011)
? ( (SNES_ADDR[23:19] == 5'b00010) ? ((SNES_ADDR[23:19] == 5'b00010)
& (SNES_ADDR[15:12] == 4'b0101) & (SNES_ADDR[15:12] == 4'b0101)
) )
: 1'b0 : 1'b0));
)
);
/* BS-X has 4 MBits of extra RAM that can be mapped to various places */ /* BS-X has 4 MBits of extra RAM that can be mapped to various places */
@ -180,51 +147,37 @@ wire [23:0] BSX_ADDR = bsx_regs[2] ? {1'b0, SNES_ADDR[22:0]}
assign SRAM_SNES_ADDR = ((MAPPER == 3'b000) assign SRAM_SNES_ADDR = ((MAPPER == 3'b000)
?(IS_SAVERAM ?(IS_SAVERAM
? 24'h600000 + ((SNES_ADDR[14:0] - 15'h6000) ? 24'hE00000 + ({SNES_ADDR[20:16], SNES_ADDR[12:0]}
& SAVERAM_MASK) & SAVERAM_MASK)
: ({1'b0, SNES_ADDR[22:0]} & ROM_MASK)) : ({1'b0, SNES_ADDR[22:0]} & ROM_MASK))
:(MAPPER == 3'b001) :(MAPPER == 3'b001)
?(IS_SAVERAM ?(IS_SAVERAM
? 24'h600000 + (SNES_ADDR[14:0] & SAVERAM_MASK) ? 24'hE00000 + ({SNES_ADDR[20:16], SNES_ADDR[14:0]}
& SAVERAM_MASK)
: ({2'b00, SNES_ADDR[22:16], SNES_ADDR[14:0]} : ({2'b00, SNES_ADDR[22:16], SNES_ADDR[14:0]}
& ROM_MASK)) & ROM_MASK))
:(MAPPER == 3'b010) :(MAPPER == 3'b010)
?(IS_SAVERAM ?(IS_SAVERAM
? 24'h600000 + ((SNES_ADDR[14:0] - 15'h6000) ? 24'hE00000 + ({SNES_ADDR[20:16], SNES_ADDR[12:0]}
& SAVERAM_MASK) & SAVERAM_MASK)
: ({1'b0, !SNES_ADDR[23], SNES_ADDR[21:0]} : ({1'b0, !SNES_ADDR[23], SNES_ADDR[21:0]}
& ROM_MASK)) & ROM_MASK))
:(MAPPER == 3'b011) :(MAPPER == 3'b011)
?(IS_SAVERAM ?( IS_SAVERAM
? 24'h600000 + {SNES_ADDR[18:16], SNES_ADDR[11:0]} ? 24'hE00000 + {SNES_ADDR[18:16], SNES_ADDR[11:0]}
: IS_WRITABLE : BSX_IS_CARTROM
? (24'h400000 + (SNES_ADDR & 24'h07FFFF)) ? (24'h800000 + ({SNES_ADDR[22:16], SNES_ADDR[14:0]} & 24'h0fffff))
: bs_page_enable : BSX_IS_PSRAM
? (24'h900000 + {bs_page,bs_page_offset}) ? (24'h400000 + (BSX_ADDR & 24'h07FFFF))
:((bsx_regs[7] && SNES_ADDR[23:21] == 3'b000) : bs_page_enable
|(bsx_regs[8] && SNES_ADDR[23:21] == 3'b100)) ? (24'h900000 + {bs_page,bs_page_offset})
?(24'h800000 : (BSX_ADDR & 24'h0fffff)
+ ({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]}
& 24'h0FFFFF)
)
:((bsx_regs[1]
? 24'h400000
: 24'h000000
)
+ bsx_regs[2]
?({2'b00, SNES_ADDR[21:0]}
& (ROM_MASK /* >> bsx_regs[1] */)
)
:({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]}
& (ROM_MASK /* >> bsx_regs[1] */)
)
)
) )
:(MAPPER == 3'b110) :(MAPPER == 3'b110)
?(IS_SAVERAM ?(IS_SAVERAM
? 24'h600000 + ((SNES_ADDR[14:0] - 15'h6000) ? 24'hE00000 + ((SNES_ADDR[14:0] - 15'h6000)
& SAVERAM_MASK) & SAVERAM_MASK)
:(SNES_ADDR[15] :(SNES_ADDR[15]
?({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]}) ?({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]})
@ -237,7 +190,7 @@ assign SRAM_SNES_ADDR = ((MAPPER == 3'b000)
) )
:(MAPPER == 3'b111) :(MAPPER == 3'b111)
?(IS_SAVERAM ?(IS_SAVERAM
? 24'h7F0000 + ((SNES_ADDR[14:0] - 15'h6000) ? 24'hFF0000 + ((SNES_ADDR[14:0] - 15'h6000)
& SAVERAM_MASK) & SAVERAM_MASK)
: (({1'b0, SNES_ADDR[22:0]} & ROM_MASK) : (({1'b0, SNES_ADDR[22:0]} & ROM_MASK)
+ 24'hC00000) + 24'hC00000)