Merge branch 'develop' into merging

Conflicts:
	src/bootldr/fileops.h
	src/bootldr/iap.c
	src/fpga_spi.c
	src/memory.c
	src/smc.c
	verilog/sd2snes/address.v

snes/Makefile

@@ -1,4 +1,4 @@
-OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 menu.o65 pad.o65 time.o65 mainmenu.o65 sysinfo.o65 spc700.o65 spcplay.o65 # gfx.o65 # vars.o65
+OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 filesel.o65 pad.o65 time.o65 mainmenu.o65 sysinfo.o65 spc700.o65 spcplay.o65 # gfx.o65 # vars.o65
 
 all: clean menu.bin map
 

snes/data.a65

@@ -45,9 +45,9 @@ bar_x		.byt 0	; pixel x position of select bar
 bar_y		.byt 0	; pixel y position of select bar
 bar_w		.byt 0	; bar width
 bar_wl		.byt 0	; bar width
-menu_state	.byt 0	; menu state (0=file select)
-menu_dirty	.byt 0	; menu dirty (e.g. after state change or when redraw is needed)
-menu_sel	.word 0 ; selected item #
+filesel_state	.byt 0	; menu state (0=file select)
+filesel_dirty	.byt 0	; menu dirty (e.g. after state change or when redraw is needed)
+filesel_sel	.word 0 ; selected item #
 cursor_x	.byt 0	; current cursor position (x)
 cursor_y	.byt 0  ; current cursor position (y)
 fd_addr		.word 0	; address of current "file descriptor"
@@ -96,6 +96,8 @@ barstep		.byt 0  ; step size for bar
 
 ;-misc
 testvar		.word 0,0,0,0
+;menu system
+menu_stack	.word 0,0,0,0,0,0,0,0
 ;----------hdma tables in WRAM (must be stable when cartridge is cut off)
 hdma_pal	.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
 		.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

snes/filesel.a65

@@ -1,7 +1,7 @@
 #include "memmap.i65"
 #include "dma.i65"
 
-menu_init:
+filesel_init:
 	sep #$20 : .as
 	rep #$10 : .xl
 	lda #^ROOT_DIR
@@ -10,7 +10,7 @@ menu_init:
 	stx dirptr_addr
 	sta dirstart_bank
 	stx dirstart_addr
-	stz menu_state
+	stz filesel_state
 	stz dirend_onscreen
 	lda #$02
 	sta cursor_x
@@ -22,11 +22,11 @@ menu_init:
 	sta bar_wl
 	ldx #$0000
 	stx dirptr_idx
-	stx menu_sel
+	stx filesel_sel
 	stx direntry_xscroll
 	stx direntry_xscroll_state
 	lda #$01
-	sta menu_dirty
+	sta filesel_dirty
 	rep #$20 : .al
 	lda #!dirlog
 	sta dirlog_idx
@@ -35,39 +35,39 @@ menu_init:
 	sta dirlog_idx+2
 	rts
 
-menuloop:
-menuloop_s1
+fileselloop:
+fileselloop_s1
 	sep #$20 : .as
 	rep #$10 : .xl
 	lda isr_done
 	lsr
-	bcc menuloop_s1
+	bcc fileselloop_s1
 	stz isr_done
 	jsr printtime
-	jsr menu_updates	;update stuff, check keys etc
-	lda menu_dirty		;is there ANY reason to redraw the menu?
+	jsr filesel_updates	;update stuff, check keys etc
+	lda filesel_dirty		;is there ANY reason to redraw the menu?
 	cmp #$01
-	beq menuloop_redraw 	;then do
+	beq fileselloop_redraw 	;then do
 	jsr scroll_direntry
-	bra menuloop_s1
-menuloop_redraw
-	stz menu_dirty
-	jsr menu_statusbar
-	jsr menu_redraw
-	jsr menu_cleanup	;update phase 2
-	bra menuloop_s1
+	bra fileselloop_s1
+fileselloop_redraw
+	stz filesel_dirty
+	jsr filesel_statusbar
+	jsr filesel_redraw
+	jsr filesel_cleanup	;update phase 2
+	bra fileselloop_s1
 	rts
 
-menu_cleanup:
+filesel_cleanup:
 	sep #$20 : .as
 	rep #$10 : .xl
 	lda dirend_onscreen     ;end of file list on screen?
-	beq menu_cleanup_out    ;
+	beq filesel_cleanup_out    ;
 	lda dirend_idx
 	lsr
 	lsr
 	pha
-menu_cleanup_loop               ;pad rest of screen with empty lines
+filesel_cleanup_loop               ;pad rest of screen with empty lines
 	cmp listdisp            ;end of screen reached?
 	beq +                   ;then leave
 	pha
@@ -86,24 +86,24 @@ menu_cleanup_loop               ;pad rest of screen with empty lines
 	jsr hiprint
 	pla
 	inc
-	bra menu_cleanup_loop
+	bra filesel_cleanup_loop
 +
 	pla
-	cmp menu_sel
-	beq menu_cleanup_out
-	bpl menu_cleanup_out
-	sta menu_sel
-menu_cleanup_out
+	cmp filesel_sel
+	beq filesel_cleanup_out
+	bpl filesel_cleanup_out
+	sta filesel_sel
+filesel_cleanup_out
 	rts
 
 
-menu_updates:
+filesel_updates:
 ;update selection, scroll etc
-	lda menu_sel
+	lda filesel_sel
 	asl
 	asl
 	sta dirptr_idx
-	lda menu_sel
+	lda filesel_sel
 	clc
 	adc #$08
 	sta bar_yl
@@ -140,47 +140,47 @@ menu_updates:
 	lda #$40
 	and pad1trig
 	bne key_x
-	bra menuupd_out
+	bra fileselupd_out
 key_down
-	jsr menu_key_down
-	bra menuupd_out
+	jsr filesel_key_down
+	bra fileselupd_out
 key_up
-	jsr menu_key_up
-	bra menuupd_out
+	jsr filesel_key_up
+	bra fileselupd_out
 key_right
-	jsr menu_key_right
-	bra menuupd_out
+	jsr filesel_key_right
+	bra fileselupd_out
 key_left
-	jsr menu_key_left
-	bra menuupd_out
+	jsr filesel_key_left
+	bra fileselupd_out
 key_b
-	jsr menu_key_b
-	bra menuupd_out
+	jsr filesel_key_b
+	bra fileselupd_out
 key_a
-	jsr menu_key_a
-	bra menuupd_out
+	jsr filesel_key_a
+	bra fileselupd_out
 key_x
-	jsr menu_key_x
-	bra menuupd_out
+	jsr filesel_key_x
+	bra fileselupd_out
 key_select
-	jsr menu_key_select
-	bra menuupd_out
+	jsr filesel_key_select
+	bra fileselupd_out
 key_start
-	jsr menu_key_start
-	bra menuupd_out
+	jsr filesel_key_start
+	bra fileselupd_out
 
-menuupd_out
+fileselupd_out
 	lda #$09
 	sta cursor_y
 	rts
 
 
-menu_redraw:
-	lda menu_state
+filesel_redraw:
+	lda filesel_state
 	beq redraw_filelist
 ;	cmp 1
 ;	beq redraw_main
-menu_redraw_out
+filesel_redraw_out
 	rts
 
 redraw_filelist
@@ -236,7 +236,7 @@ redraw_filelist_last	;check if next offscreen item is end of dir
 redraw_filelist_out
 	ldx #$0000
 	stx dirptr_idx
-	brl menu_redraw_out
+	brl filesel_redraw_out
 
 print_direntry:
         lda cursor_y
@@ -355,14 +355,14 @@ dirent_type_cont_2
 
 	rts
 
-menu_key_down:
+filesel_key_down:
 	jsr scroll_direntry_clean
 	lda listdisp
 	dec
-	cmp menu_sel
+	cmp filesel_sel
 	bne down_noscroll
 	lda #$01
-	sta menu_dirty
+	sta filesel_dirty
 	lda dirend_onscreen
 	bne down_out
 	rep #$20 : .al
@@ -380,21 +380,21 @@ down_noscroll
 	lda dirend_idx
 	lsr
 	lsr
-	cmp menu_sel
-	beq menuupd_lastcursor
-	bcc menuupd_lastcursor
-+	lda menu_sel
+	cmp filesel_sel
+	beq fileselupd_lastcursor
+	bcc fileselupd_lastcursor
++	lda filesel_sel
 	inc
-	sta menu_sel
+	sta filesel_sel
 down_out
 	rts
 
-menu_key_up:
+filesel_key_up:
 	jsr scroll_direntry_clean
-	lda menu_sel
+	lda filesel_sel
 	bne up_noscroll
 	lda #$01
-	sta menu_dirty
+	sta filesel_dirty
 	rep #$20 : .al
 	lda dirptr_addr
 	cmp dirstart_addr
@@ -407,25 +407,25 @@ menu_key_up:
 	bra up_out
 up_noscroll
 	dec
-	sta menu_sel
+	sta filesel_sel
 up_out
 	sep #$20 : .as
 	rts
 
-menuupd_lastcursor
+fileselupd_lastcursor
 	jsr scroll_direntry_clean
 	lda dirend_idx
 	lsr
 	lsr
-	sta menu_sel
+	sta filesel_sel
 	rts
 
 ; go back one page
-menu_key_left:
+filesel_key_left:
 	stz direntry_xscroll
 	stz direntry_xscroll_state
 	lda #$01            ; must redraw afterwards
-	sta menu_dirty
+	sta filesel_dirty
 	rep #$20 : .al
 	lda dirptr_addr     ; get current direntry pointer
 	beq +               ; special case: if 0, we are at the first entry in memory
@@ -444,18 +444,18 @@ menu_key_left:
 	sep #$20 : .as
 	rts
 +	lda dirstart_addr   ; reset pointer to start of directory
-	stz menu_sel        ; reset the selection cursor too
+	stz filesel_sel        ; reset the selection cursor too
 	bra -
 
 ; go forth one page
-menu_key_right:
+filesel_key_right:
 	stz direntry_xscroll
 	stz direntry_xscroll_state
 	sep #$20 : .as
 	lda dirend_onscreen
-	bne menuupd_lastcursor
+	bne fileselupd_lastcursor
 	lda #$01
-	sta menu_dirty
+	sta filesel_dirty
 	rep #$20 : .al
 	lda listdisp
 	asl
@@ -466,18 +466,18 @@ menu_key_right:
 	sep #$20 : .as
 	rts
 
-menu_key_a:
+filesel_key_a:
 	jsr select_item
 	rts
 
-menu_key_select:
+filesel_key_select:
 	rts
 
-menu_key_start:
+filesel_key_start:
 	jsr select_last_file
 	rts
 
-menu_key_b:
+filesel_key_b:
 	stz direntry_xscroll
 	stz direntry_xscroll_state
 	rep #$20 : .al
@@ -485,7 +485,7 @@ menu_key_b:
 	beq skip_key_b
 	sta dirptr_addr
 	lda #$0000
-	sta menu_sel
+	sta filesel_sel
 	bra select_item
 skip_key_b
 	sep #$20 : .as
@@ -493,7 +493,7 @@ skip_key_b
 
 select_item:
 	rep #$20 : .al
-	lda menu_sel
+	lda filesel_sel
 	and #$00ff
 	asl
 	asl
@@ -568,7 +568,7 @@ select_dir:
 	lda @dirptr_bank
 	sta [dirlog_idx], y
 	iny
-	lda @menu_sel
+	lda @filesel_sel
 	sta [dirlog_idx], y
 	lda @dirlog_idx
 	clc
@@ -604,12 +604,12 @@ select_dir:
 	sta @dirptr_addr
 	sta @dirstart_addr
 	lda #$0000
-	sta @menu_sel
+	sta @filesel_sel
 	sta @direntry_xscroll
 	sta @direntry_xscroll_state
 	sep #$20 : .as
 	lda #$01
-	sta @menu_dirty
+	sta @filesel_dirty
 	plb
 	rts
 
@@ -638,11 +638,11 @@ select_parent:
 	sta @dirptr_bank
 	iny
 	rep #$20 : .al
-	lda [dirlog_idx], y ; load menu_sel
-	sta @menu_sel
+	lda [dirlog_idx], y ; load filesel_sel
+	sta @filesel_sel
 	sep #$20 : .as
 	lda #$01
-	sta @menu_dirty
+	sta @filesel_dirty
 	rts
 
 select_spc:
@@ -666,7 +666,7 @@ wait_spc:
 	jsr restore_screen
 	rts
 
-menu_key_x:
+filesel_key_x:
 	jsr mainmenu
 	rts
 
@@ -676,11 +676,11 @@ setup_224:
 	lda #18
 	sta listdisp
 	dec
-	cmp menu_sel
+	cmp filesel_sel
 	bmi setup_224_adjsel
 	bra +
 setup_224_adjsel
-	sta menu_sel
+	sta filesel_sel
 +
 	lda #18*64
 	sta textdmasize
@@ -699,7 +699,7 @@ setup_224_adjsel
 	sta hdma_math_selection
 	stz vidmode
 	lda #$01
-	sta menu_dirty
+	sta filesel_dirty
 	lda #^space64
 	ldx #!space64
 	sta print_bank
@@ -719,7 +719,7 @@ setup_224_adjsel
 	plp
 	rts
 
-menu_statusbar
+filesel_statusbar
 	pha
 	phx
 	php
@@ -822,7 +822,7 @@ scroll_direntry_clean:
 	rts
 
 scroll_direntry:
-	ldy menu_sel
+	ldy filesel_sel
 	lda direntry_xscroll_state
 	bne +
 	lda direntry_fits, y
@@ -852,7 +852,7 @@ scroll_direntry_scrollfast
 	lda #$02
 	sta cursor_x
 	rep #$20 : .al
-	lda menu_sel
+	lda filesel_sel
 	asl
 	asl
 	tay
@@ -869,7 +869,7 @@ scroll_direntry_scrollfast
 	lda [dirptr_addr], y
 	iny
 	sta @dirent_type
-	ldy menu_sel
+	ldy filesel_sel
 	sty direntry_fits_idx
 	phy
 	jsr print_direntry

snes/main.a65

@@ -21,15 +21,15 @@ GAME_MAIN:
 	tcs
 	sep #$20 : .as
 
-	jsr killdma		; The following initialization processes must not touch memory
-	jsr waitblank		; structures used by the main menu !
+;	jsr killdma		; The following initialization processes must not touch memory
+	jsr waitblank		; structures used by the file selector !
 	jsr snes_init
 	cli
 	lda #$01
 	sta $420d 		; fast cpu
 	jsr setup_gfx
 	jsr colortest
-	jsr tests
+	jsr video_init
 	jsr setup_hdma
 	lda #$0f
 	sta cur_bright
@@ -43,15 +43,15 @@ set_bank:
 
 coldboot:							; Regular, cold-start init
 	sep #$20 : .as
-	jsr killdma
+;	jsr killdma
 	jsr waitblank
 	jsr snes_init
 	lda #$01
 	sta $420d ; fast cpu
 	jsr setup_gfx
 	jsr colortest
-	jsr menu_init
-	jsr tests
+	jsr filesel_init
+	jsr video_init
 	jsr setup_hdma
 	jsr screen_on
 
@@ -60,7 +60,7 @@ coldboot:							; Regular, cold-start init
 	beq +
 	jsl time_init
 +
-	jsr menuloop
+	jsr fileselloop
 	cli
 	stz $4200
 	jmp @infloop	;infinite loop in WRAM
@@ -138,6 +138,30 @@ killdma:
 	stz $4359
 	stz $435a
 	stz $435b
+	stz $4360
+	stz $4361
+	stz $4362
+	stz $4363
+	stz $4364
+	stz $4365
+	stz $4366
+	stz $4367
+	stz $4368
+	stz $4369
+	stz $436a
+	stz $436b
+	stz $4370
+	stz $4371
+	stz $4372
+	stz $4373
+	stz $4374
+	stz $4375
+	stz $4376
+	stz $4377
+	stz $4378
+	stz $4379
+	stz $437a
+	stz $437b
 
 	stz $420b
 	stz $420c
@@ -190,7 +214,7 @@ setup_gfx:
 ;clear OAM tables
 	ldx #$0000
 	stx $2102
-	DMA0(#$08, #$544, #^zero, #!zero, #$04)
+	DMA0(#$08, #$220, #^zero, #!zero, #$04)
 
 ;copy logo tiles
 	ldx #$2000
@@ -273,7 +297,7 @@ setup_gfx:
 	DMA0(#$00, #$6C, #^fadeloop, #!fadeloop, #$80);
 	rts
 
-tests:
+video_init:
 	sep #$20 : .as		;8-bit accumulator
 	rep #$10 : .xl		;16-bit index
 	lda #$03		;mode 3, mode 5 via HDMA

snes/mainmenu.a65

@@ -80,15 +80,12 @@ mm_entloop
 	plb
 	phx
 	jsr hiprint
-	plx
-	inx
-	inx
-	inx
-	inx
-	inx
-	inx
-	inx
-	inx
+	rep #$20 : .al
+	pla
+	clc
+	adc #$08
+	tax
+	sep #$20 : .as
 	inc mm_tmp
 	lda mm_tmp
 	cmp @main_entries

src/README

@@ -17,6 +17,7 @@ b) Cortex M3 toolchain
     - texinfo
     - libmpfr-dev
     - libgmp3-dev
+    - libmpc-dev
     - gawk
     - bison
     - recode

src/bootldr/fileops.h

@@ -31,8 +31,7 @@
 
 enum filestates { FILE_OK=0, FILE_ERR, FILE_EOF };
 
-#define GCC_ALIGN_WORKAROUND __attribute__ ((aligned(4)))
-BYTE file_buf[512] GCC_ALIGN_WORKAROUND;
+BYTE file_buf[512] __attribute__((aligned(4)));
 FATFS fatfs;
 FIL file_handle;
 FRESULT file_res;

src/bootldr/iap.c

@@ -189,7 +189,7 @@ FLASH_RES flash_file(uint8_t *filename) {
       }
       DBG_UART uart_putc('w');
       if((res = iap_ram2flash(flash_addr, file_buf, 512)) != CMD_SUCCESS) {
-        //printf("error %ld while writing to address %08lx (sector %d)\n", res, flash_addr, current_sec);
+        DBG_BL printf("error %ld while writing from %08lX to address %08lx (sector %d)\n", res, (uint32_t)file_buf, flash_addr, current_sec);
         DBG_UART uart_putc('X');
         return ERR_FLASH;
       }

src/clock.c

@@ -52,6 +52,15 @@ void clock_init() {
   enablePLL0();
   setCCLKDiv(6);
   connectPLL0();
+
+
+/* configure PLL1 for USB operation */
+  disconnectPLL1();
+  disablePLL1();
+  LPC_SC->PLL1CFG = 0x23;
+  enablePLL1();
+  connectPLL1();
+
 }
 
 void setFlashAccessTime(uint8_t clocks) {
@@ -84,6 +93,32 @@ void disconnectPLL0() {
   PLL0feed();
 }
 
+void setPLL1MultPrediv(uint16_t mult, uint8_t prediv) {
+  LPC_SC->PLL1CFG=PLL_MULT(mult) | PLL_PREDIV(prediv);
+  PLL1feed();
+}
+
+void enablePLL1() {
+  LPC_SC->PLL1CON |= PLLE1;
+  PLL1feed();
+}
+
+void disablePLL1() {
+  LPC_SC->PLL1CON &= ~PLLE1;
+  PLL1feed();
+}
+
+void connectPLL1() {
+  while(!(LPC_SC->PLL1STAT & PLOCK1));
+  LPC_SC->PLL1CON |= PLLC1;
+  PLL1feed();
+}
+
+void disconnectPLL1() {
+  LPC_SC->PLL1CON &= ~PLLC1;
+  PLL1feed();
+}
+
 void setCCLKDiv(uint8_t div) {
   LPC_SC->CCLKCFG=CCLK_DIV(div);
 }
@@ -102,6 +137,11 @@ void PLL0feed() {
   LPC_SC->PLL0FEED=0x55;
 }
 
+void PLL1feed() {
+  LPC_SC->PLL1FEED=0xaa;
+  LPC_SC->PLL1FEED=0x55;
+}
+
 void setClkSrc(uint8_t src) {
   LPC_SC->CLKSRCSEL=src;
 }

src/clock.h

@@ -8,6 +8,9 @@
 #define PLLE0           (1<<0)
 #define PLLC0           (1<<1)
 #define PLOCK0          (1<<26)
+#define PLLE1           (1<<0)
+#define PLLC1           (1<<1)
+#define PLOCK1          (1<<10)
 #define OSCEN           (1<<5)
 #define OSCSTAT         (1<<6)
 #define FLASHTIM(x)     (((x-1)<<12)|0x3A)
@@ -56,14 +59,18 @@ void clock_init(void);
 void setFlashAccessTime(uint8_t clocks);
 
 void setPLL0MultPrediv(uint16_t mult, uint8_t prediv);
-
 void enablePLL0(void);
-
 void disablePLL0(void);
-
 void connectPLL0(void);
-
 void disconnectPLL0(void);
+void PLL0feed(void);
+
+void setPLL1MultPrediv(uint16_t mult, uint8_t prediv);
+void enablePLL1(void);
+void disablePLL1(void);
+void connectPLL1(void);
+void disconnectPLL1(void);
+void PLL1feed(void);
 
 void setCCLKDiv(uint8_t div);
 
@@ -71,7 +78,5 @@ void enableMainOsc(void);
 
 void disableMainOsc(void);
 
-void PLL0feed(void);
-
 void setClkSrc(uint8_t src);
 #endif

src/config.h

@@ -96,4 +96,7 @@
 
 #define SD_DAT (LPC_GPIO2->FIOPIN0)
 
+#define USB_CONNREG LPC_GPIO4
+#define USB_CONNBIT 28
+
 #endif

src/filetypes.c

@@ -152,7 +152,7 @@ uint32_t scan_dir(char* path, FILINFO* fno_param, char mkdb, uint32_t this_dir_t
           break;
         }
         fn = *fno.lfname ? fno.lfname : fno.fname;
-        if ((*fn == '.') || !(strncasecmp(fn, SYS_DIR_NAME, sizeof(SYS_DIR_NAME)))) continue;
+        if ((*fn == '.') || !(strncasecmp(fn, SYS_DIR_NAME, strlen(SYS_DIR_NAME)+1))) continue;
         if (fno.fattrib & AM_DIR) {
           depth++;
           if(depth < FS_MAX_DEPTH) {

src/fpga.c

@@ -98,30 +98,6 @@ void fpga_pgm(uint8_t* filename) {
   uint8_t data;
   int i;
   tick_t timeout;
-  do {
-    i=0;
-    timeout = getticks() + 100;
-    fpga_set_prog_b(0);
-if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
-  printf("PROGB is stuck high!\n");
-  led_panic();
-}
-    uart_putc('P');
-    fpga_set_prog_b(1);
-    while(!fpga_get_initb()){
-      if(getticks() > timeout) {
-        printf("no response from FPGA trying to initiate configuration!\n");
-        led_panic();
-      }
-    };
-    if(fpga_get_done()) {
-      printf("DONE is stuck high!\n");
-      led_panic();
-    }
-    LPC_GPIO2->FIOMASK1 = ~(BV(0));
-    uart_putc('p');
-
-
   /* open configware file */
   file_open(filename, FA_READ);
   if(file_res) {
@@ -129,6 +105,36 @@ if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
     uart_putc(0x30+file_res);
     return;
   }
+
+  do {
+    i=0;
+    timeout = getticks() + 1;
+    fpga_set_prog_b(0);
+    while(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
+      if(getticks() > timeout) {
+        printf("PROGB is stuck high!\n");
+        led_panic(LED_PANIC_FPGA_PROGB_STUCK);
+      }
+    }
+    timeout = getticks() + 100;
+    uart_putc('P');
+    fpga_set_prog_b(1);
+    while(!fpga_get_initb()){
+      if(getticks() > timeout) {
+        printf("no response from FPGA trying to initiate configuration!\n");
+        led_panic(LED_PANIC_FPGA_NO_INITB);
+      }
+    };
+    timeout = getticks() + 100;
+    while(fpga_get_done()) {
+      if(getticks() > timeout) {
+        printf("DONE is stuck high!\n");
+        led_panic(LED_PANIC_FPGA_DONE_STUCK);
+      }
+    }
+    LPC_GPIO2->FIOMASK1 = ~(BV(0));
+    uart_putc('p');
+
     uart_putc('C');
 
     for (;;) {
@@ -144,7 +150,7 @@ if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
   } while (!fpga_get_done() && retries--);
   if(!fpga_get_done()) {
     printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
-    led_panic();
+    led_panic(LED_PANIC_FPGA_NOCONF);
   }
   printf("FPGA configured\n");
   fpga_postinit();
@@ -165,12 +171,15 @@ void fpga_rompgm() {
     while(!fpga_get_initb()){
       if(getticks() > timeout) {
         printf("no response from FPGA trying to initiate configuration!\n");
-        led_panic();
+        led_panic(LED_PANIC_FPGA_NO_INITB);
       }
     };
-    if(fpga_get_done()) {
+    timeout = getticks() + 100;
+    while(fpga_get_done()) {
+      if(getticks() > timeout) {
         printf("DONE is stuck high!\n");
-      led_panic();
+        led_panic(LED_PANIC_FPGA_DONE_STUCK);
+      }
     }
     LPC_GPIO2->FIOMASK1 = ~(BV(0));
     uart_putc('p');
@@ -190,7 +199,7 @@ void fpga_rompgm() {
   } while (!fpga_get_done() && retries--);
   if(!fpga_get_done()) {
     printf("FPGA failed to configure after %d tries.\n", MAXRETRIES);
-    led_panic();
+    led_panic(LED_PANIC_FPGA_NOCONF);
   }
   printf("FPGA configured\n");
   fpga_postinit();

src/fpga_spi.c

@@ -225,9 +225,6 @@ void fpga_set_sddma_range(uint16_t start, uint16_t end) {
 }
 
 void fpga_sddma(uint8_t tgt, uint8_t partial) {
-  //printf("%s %02X -> %02X\n", __func__, tgt, partial);
-  uint32_t test = 0;
-  uint8_t status = 0;
   BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 0;
   FPGA_SELECT();
   FPGA_TX_BYTE(FPGA_CMD_SDDMA | (tgt & 3) | (partial ? FPGA_SDDMA_PARTIAL : 0));

src/led.c

@@ -85,12 +85,12 @@ void toggle_write_led() {
   writeled(~led_writeledstate);
 }
 
-void led_panic() {
+void led_panic(uint8_t led_states) {
   led_std();
   while(1) {
-    rdyled(1);
-    readled(1);
-    writeled(1);
+    rdyled((led_states >> 2) & 1);
+    readled((led_states >> 1) & 1);
+    writeled(led_states & 1);
     delay_ms(100);
     rdyled(0);
     readled(0);

src/led.h

@@ -3,6 +3,12 @@
 #ifndef _LED_H
 #define _LED_H
 
+#define LED_PANIC_FPGA_PROGB_STUCK (1)
+#define LED_PANIC_FPGA_NO_INITB    (2)
+#define LED_PANIC_FPGA_DONE_STUCK  (3)
+#define LED_PANIC_FPGA_NOCONF      (4)
+#define LED_PANIC_FPGA_DEAD        (5)
+
 void readbright(uint8_t bright);
 void writebright(uint8_t bright);
 void rdybright(uint8_t bright);
@@ -13,7 +19,7 @@ void led_clkout32(uint32_t val);
 void toggle_rdy_led(void);
 void toggle_read_led(void);
 void toggle_write_led(void);
-void led_panic(void);
+void led_panic(uint8_t led_states);
 void led_pwm(void);
 void led_std(void);
 void led_init(void);

src/lpc1754.cfg

@@ -26,9 +26,9 @@ if { [info exists CPUTAPID ] } {
 }
 
 #delays on reset lines
-#if your OpenOCD version rejects "jtag_nsrst_delay" replace it with:
-#adapter_nsrst_delay 200
-jtag_nsrst_delay 200
+#if your OpenOCD version rejects "adapter_nsrst_delay" replace it with:
+#jtag_nsrst_delay 200
+adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # LPC2000 & LPC1700 -> SRST causes TRST
@@ -39,7 +39,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
 #jtag newtap x3s tap -irlen 6 -ircapture 0x11 -irmask 0x11 -expected-id 0x0141c093
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME -event reset-init 0
+target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME -event reset-init 0
 
 # LPC1754 has 16kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
 # and 16K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000).
@@ -56,7 +56,7 @@ flash bank $_FLASHNAME lpc2000 0x0 0x20000 0 0 $_TARGETNAME \
 # Run with *real slow* clock by default since the
 # boot rom could have been playing with the PLL, so
 # we have no idea what clock the target is running at.
-jtag_khz 1000
+adapter_khz 1000
 
 $_TARGETNAME configure -event reset-init {
 	# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select

src/main.c

@@ -359,7 +359,7 @@ printf("PCONP=%lx\n", LPC_SC->PCONP);
     }
     /* fpga test fail: panic */
     if(fpga_test() != FPGA_TEST_TOKEN){
-      led_panic();
+      led_panic(LED_PANIC_FPGA_DEAD);
     }
     /* else reset */
   }

src/memory.c

@@ -217,7 +217,7 @@ uint32_t load_rom(uint8_t* filename, uint32_t base_addr, uint8_t flags) {
     printf("reconfigure FPGA with %s...\n", romprops.fpga_conf);
     fpga_pgm((uint8_t*)romprops.fpga_conf);
   }
-  set_mcu_addr(base_addr);
+  set_mcu_addr(base_addr + romprops.load_address);
   file_open(filename, FA_READ);
   ff_sd_offload=1;
   sd_offload_tgt=0;
@@ -485,7 +485,6 @@ uint32_t load_bootrle(uint32_t base_addr) {
 
 void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr) {
   uint32_t count = 0;
-  //uint32_t num = 0;
 
   FPGA_DESELECT();
   file_open(filename, FA_CREATE_ALWAYS | FA_WRITE);
@@ -502,7 +501,7 @@ void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr) {
       count++;
     }
     FPGA_DESELECT();
-    /*num = */file_write();
+    file_write();
     if(file_res) {
       uart_putc(0x30+file_res);
     }
@@ -606,7 +605,6 @@ uint64_t sram_gettime(uint32_t base_addr) {
 
 void load_dspx(const uint8_t *filename, uint8_t coretype) {
   UINT bytes_read;
-  //DWORD filesize;
   uint16_t word_cnt;
   uint8_t wordsize_cnt = 0;
   uint16_t sector_remaining = 0;
@@ -630,7 +628,6 @@ void load_dspx(const uint8_t *filename, uint8_t coretype) {
   }
 
   file_open((uint8_t*)filename, FA_READ);
-  /*filesize = file_handle.fsize;*/
   if(file_res) {
     printf("Could not read %s: error %d\n", filename, file_res);
     return;

src/memory.h

@@ -70,6 +70,7 @@ void sram_writebyte(uint8_t val, uint32_t addr);
 void sram_writeshort(uint16_t val, uint32_t addr);
 void sram_writelong(uint32_t val, uint32_t addr);
 void sram_readblock(void* buf, uint32_t addr, uint16_t size);
+void sram_readstrn(void* buf, uint32_t addr, uint16_t size);
 void sram_readlongblock(uint32_t* buf, uint32_t addr, uint16_t count);
 void sram_writeblock(void* buf, uint32_t addr, uint16_t size);
 void save_sram(uint8_t* filename, uint32_t sram_size, uint32_t base_addr);

src/power.c

@@ -21,6 +21,6 @@ void power_init() {
                 | BV(PCRTC)
                 | BV(PCGPIO)
                 | BV(PCPWM1)
-//                 | BV(PCUSB)
+                | BV(PCUSB)
   ;
 }

src/smc.c

@@ -59,6 +59,7 @@ void smc_id(snes_romprops_t* props) {
   uint8_t score, maxscore=1, score_idx=2; /* assume LoROM */
   snes_header_t* header = &(props->header);
 
+  props->load_address = 0;
   props->has_dspx = 0;
   props->has_st0010 = 0;
   props->has_cx4 = 0;
@@ -95,6 +96,14 @@ void smc_id(snes_romprops_t* props) {
           props->expramsize_bytes = 0;
           props->mapper_id = 3; /* BS-X Memory Map */
           props->region = 0; /* BS-X only existed in Japan */
+          uint8_t alloc = header->name[0x10];
+          if(alloc) {
+            while(!(alloc & 0x01)) {
+              props->load_address += 0x20000;
+              alloc >>= 1;
+            }
+          }
+          printf("load address: %lx\n", props->load_address);
           return;
         }
       }

src/smc.h

@@ -84,6 +84,7 @@ typedef struct _snes_romprops {
   uint8_t has_cx4;            /* CX4 presence flag */
   uint8_t fpga_features;      /* feature/peripheral enable bits*/
   uint8_t region;             /* game region (derived from destination code) */
+  uint32_t load_address;      /* where to load the ROM image */
   snes_header_t header;       /* original header from ROM image */
 } snes_romprops_t;
 

src/tests/cli.c

@@ -138,7 +138,7 @@ static int8_t parse_wordlist(char *wordlist) {
         return -1;
       }
 
-      if (tolower(c) != tolower(*cur)) {
+      if (tolower((int)c) != tolower((int)*cur)) {
         // Check for end-of-word
         if (cur != curchar && (*cur == ' ' || *cur == 0)) {
           // Partial match found, return that

verilog/sd2snes/address.v

@@ -72,66 +72,33 @@ wire [23:0] SRAM_SNES_ADDR;
 assign IS_ROM = ((!SNES_ADDR[22] & SNES_ADDR[15])
                  |(SNES_ADDR[22]));
 
-
-/* HiROM SRAM is 8K end at 0x8000 and is at bank 0x20 and 0xA0 */
-assign IS_SAVERAM_HIROM      = ((SNES_ADDR[22:21] == 2'b01)
-                               & SNES_ADDR[15:13] == 3'b011)
-
-/*  LoROM:   SRAM @ Bank 0x70-0x7d, 0xf0-0xfd Offset 0000-7fff
-             TODO: 0000-ffff for small ROMs? */	 
-assign IS_SAVERAM_LOROM      = SNES_ADDR[22:16] == 7'b111
-										 ( &SNES_ADDR[22:20]
-                               & (SNES_ADDR[19:16] < 4'b1110)
-                               & !SNES_ADDR[15] )
-
-assign IS_SAVERAM_EXHIROM    = (!SNES_ADDR[22]
-                               & SNES_ADDR[21]
-                               & &SNES_ADDR[14:13]
-                               & !SNES_ADDR[15])
-
-assign IS_SAVERAM_BSX        = ( (SNES_ADDR[23:19] == 5'b00010)
-                               & (SNES_ADDR[15:12] == 4'b0101)
-                               )
-
-assign IS_SAVERAM_STARTOCEAN = (!SNES_ADDR[22]
-                               & SNES_ADDR[21]
-                               & &SNES_ADDR[14:13]
-                               & !SNES_ADDR[15])
-
-assign IS_SAVERAM_MENU       = (!SNES_ADDR[22]
-                               & SNES_ADDR[21]
-                               & &SNES_ADDR[14:13]
-                               & !SNES_ADDR[15])
-
 assign IS_SAVERAM = SAVERAM_MASK[0]
                     &(featurebits[FEAT_ST0010]
                       ?((SNES_ADDR[22:19] == 4'b1101)
                         & &(~SNES_ADDR[15:12])
                         & SNES_ADDR[11])
-                      :(
-							    (  MAPPER == 3'b000
+                      :((MAPPER == 3'b000
                         || MAPPER == 3'b010
                         || MAPPER == 3'b110
                         || MAPPER == 3'b111)
                       ? (!SNES_ADDR[22]
                          & SNES_ADDR[21]
                          & &SNES_ADDR[14:13]
-                           & !SNES_ADDR[15])
-/*  LoROM:   SRAM @ Bank 0x70-0x7d, 0xf0-0xfd Offset 0000-7fff
-             TODO: 0000-ffff for small ROMs? */
-                         :(MAPPER == 3'b001)
-                           ? ( &SNES_ADDR[22:20]
-                             & (SNES_ADDR[19:16] < 4'b1110)
                          & !SNES_ADDR[15]
                         )
+/*  LoROM:   SRAM @ Bank 0x70-0x7d, 0xf0-0xfd
+ *  Offset 0000-7fff for ROM >= 32 MBit, otherwise 0000-ffff */
+                      :(MAPPER == 3'b001)
+                      ? (&SNES_ADDR[22:20]
+                         & (SNES_ADDR[19:16] < 4'b1110)
+                         & (~SNES_ADDR[15] | ~ROM_MASK[21])
+                        )
 /*  BS-X: SRAM @ Bank 0x10-0x17 Offset 5000-5fff */
                       :(MAPPER == 3'b011)
-                             ? ( (SNES_ADDR[23:19] == 5'b00010)
+                      ? ((SNES_ADDR[23:19] == 5'b00010)
                          & (SNES_ADDR[15:12] == 4'b0101)
                         )
-                             : 1'b0 
-							  )
-					   );
+                      : 1'b0));
 
 
 /* BS-X has 4 MBits of extra RAM that can be mapped to various places */
@@ -180,51 +147,37 @@ wire [23:0] BSX_ADDR = bsx_regs[2] ? {1'b0, SNES_ADDR[22:0]}
 
 assign SRAM_SNES_ADDR = ((MAPPER == 3'b000)
                           ?(IS_SAVERAM
-                            ? 24'h600000 + ((SNES_ADDR[14:0] - 15'h6000)
+                            ? 24'hE00000 + ({SNES_ADDR[20:16], SNES_ADDR[12:0]}
                                             & SAVERAM_MASK)
                             : ({1'b0, SNES_ADDR[22:0]} & ROM_MASK))
 
                           :(MAPPER == 3'b001)
                           ?(IS_SAVERAM
-                            ? 24'h600000 + (SNES_ADDR[14:0] & SAVERAM_MASK)
+                            ? 24'hE00000 + ({SNES_ADDR[20:16], SNES_ADDR[14:0]}
+                                            & SAVERAM_MASK)
                             : ({2'b00, SNES_ADDR[22:16], SNES_ADDR[14:0]}
                                & ROM_MASK))
 
                           :(MAPPER == 3'b010)
                           ?(IS_SAVERAM
-                            ? 24'h600000 + ((SNES_ADDR[14:0] - 15'h6000)
+                            ? 24'hE00000 + ({SNES_ADDR[20:16], SNES_ADDR[12:0]}
                                             & SAVERAM_MASK)
                             : ({1'b0, !SNES_ADDR[23], SNES_ADDR[21:0]}
                                & ROM_MASK))
                           :(MAPPER == 3'b011)
-                          ?(IS_SAVERAM
-                            ? 24'h600000 + {SNES_ADDR[18:16], SNES_ADDR[11:0]}
-                            : IS_WRITABLE
-                              ? (24'h400000 + (SNES_ADDR & 24'h07FFFF))
+                          ?(  IS_SAVERAM
+                              ? 24'hE00000 + {SNES_ADDR[18:16], SNES_ADDR[11:0]}
+                              : BSX_IS_CARTROM
+                              ? (24'h800000 + ({SNES_ADDR[22:16], SNES_ADDR[14:0]} & 24'h0fffff))
+                              : BSX_IS_PSRAM
+                              ? (24'h400000 + (BSX_ADDR & 24'h07FFFF))
                               : bs_page_enable
                               ? (24'h900000 + {bs_page,bs_page_offset})
-								    :((bsx_regs[7] && SNES_ADDR[23:21] == 3'b000)
-                                 |(bsx_regs[8] && SNES_ADDR[23:21] == 3'b100))
-                                 ?(24'h800000
-                                   + ({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]}
-                                     & 24'h0FFFFF)
-                                   )
-                                 :((bsx_regs[1]
-                                   ? 24'h400000
-                                   : 24'h000000
-                                   )
-                                   + bsx_regs[2]
-                                     ?({2'b00, SNES_ADDR[21:0]}
-                                       & (ROM_MASK /* >> bsx_regs[1] */)
-                                      )
-                                     :({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]}
-                                       & (ROM_MASK /* >> bsx_regs[1] */)
-                                      )
-                                  )
+                              : (BSX_ADDR & 24'h0fffff)
                            )
                            :(MAPPER == 3'b110)
                            ?(IS_SAVERAM
-                             ? 24'h600000 + ((SNES_ADDR[14:0] - 15'h6000)
+                             ? 24'hE00000 + ((SNES_ADDR[14:0] - 15'h6000)
                                              & SAVERAM_MASK)
                              :(SNES_ADDR[15]
                                ?({1'b0, SNES_ADDR[23:16], SNES_ADDR[14:0]})
@@ -237,7 +190,7 @@ assign SRAM_SNES_ADDR = ((MAPPER == 3'b000)
                             )
                            :(MAPPER == 3'b111)
                            ?(IS_SAVERAM
-                             ? 24'h7F0000 + ((SNES_ADDR[14:0] - 15'h6000)
+                             ? 24'hFF0000 + ((SNES_ADDR[14:0] - 15'h6000)
                                              & SAVERAM_MASK)
                              : (({1'b0, SNES_ADDR[22:0]} & ROM_MASK)
                                 + 24'hC00000)