Maximilian Rehkopf
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e63658e2ad
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FPGA: Map mode 21 SRAM to 20:xxxx as well
|
2012-05-02 10:46:01 +02:00 |
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Maximilian Rehkopf
|
37a309fd0e
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FPGA: improve BS support (more date fields, initial download data support)
|
2012-05-02 10:42:46 +02:00 |
|
Maximilian Rehkopf
|
f5caf21fac
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FPGA: slightly tighten timing constraints
|
2012-05-02 10:41:07 +02:00 |
|
Maximilian Rehkopf
|
1b272a7a7d
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FPGA/Cx4: introduce wait states (fix MMX2 attract mode)
|
2012-05-02 10:30:22 +02:00 |
|
ikari
|
8e7f77e49b
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FPGA/cx4: map ROM above bank 3F/BF
|
2012-02-27 22:14:19 +01:00 |
|
ikari
|
e2f33c28c9
|
FPGA: pull-up SD clock
|
2012-02-27 22:12:35 +01:00 |
|
ikari
|
f0a2e85c65
|
FPGA: updated project files
|
2012-01-14 23:16:57 +01:00 |
|
ikari
|
d7ad740843
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FPGA/Cx4: add missing file main.ucf
|
2012-01-14 02:25:34 +01:00 |
|
ikari
|
059966f06a
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FPGA/Cx4: optimize non-sector-aligned SD DMA reads
|
2012-01-14 02:21:01 +01:00 |
|
ikari
|
3243143c39
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FPGA/Cx4: region override (patch register $213f)
|
2012-01-14 02:19:39 +01:00 |
|
ikari
|
a50522b4e9
|
FPGA: optimize non-sector-aligned SD DMA reads
|
2012-01-14 01:22:38 +01:00 |
|
ikari
|
eefcc712ca
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FPGA: add RAM1 pinout to user constraints
|
2012-01-14 01:21:40 +01:00 |
|
ikari
|
5a3e935a3e
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FPGA: region override (patch register $213f)
|
2012-01-14 01:21:21 +01:00 |
|
ikari
|
dc01edfe9a
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FPGA: add test suite
|
2011-12-19 22:26:09 +01:00 |
|
ikari
|
93a12f3ca1
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FPGA: fix occasional erroneous write inhibit
|
2011-11-10 23:41:33 +01:00 |
|
ikari
|
68f255d75b
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firmware, FPGA: fix for some SD cards
|
2011-11-10 17:54:52 +01:00 |
|
ikari
|
1987968db2
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FPGA/cx4: clean up tab/whitespace mix
|
2011-11-01 21:09:31 +01:00 |
|
ikari
|
3dd64cb98f
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FPGA/cx4: timing closure
|
2011-11-01 20:56:30 +01:00 |
|
ikari
|
ecd75210a9
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FPGA/cx4: fix memory sharing
|
2011-11-01 20:55:59 +01:00 |
|
ikari
|
314da586a4
|
FPGA/cx4: implement reset vector access
|
2011-11-01 20:54:07 +01:00 |
|
ikari
|
7643790fed
|
FPGA/Cx4: fully operational except reset vector area
|
2011-10-30 01:54:39 +02:00 |
|
ikari
|
8c76dfbeb6
|
FPGA/Cx4: WIP
|
2011-10-27 15:42:13 +02:00 |
|
ikari
|
b2150ff205
|
Merge commit '7dc5860b4dbc05ddec34695e3620d27b44ec6cc2' into cx4
|
2011-10-25 00:21:38 +02:00 |
|
ikari
|
fb9a28bf38
|
FPGA/cx4: rework CPU FSM (ALU still missing)
|
2011-10-23 20:56:07 +02:00 |
|
ikari
|
e57c4aa450
|
FPGA/cx4: initial commit
|
2011-10-23 04:10:55 +02:00 |
|
Maximilian Rehkopf
|
1887036e86
|
FPGA: prevent erasure of first ROM byte on reconfiguration
|
2011-10-13 11:17:19 +02:00 |
|
Maximilian Rehkopf
|
86576d2e48
|
FPGA: clean up (port size mismatches, unused regs/wires, ...)
|
2011-10-09 14:13:35 +02:00 |
|
Maximilian Rehkopf
|
b05c89cdbf
|
FPGA: merge recent changes into sd2sneslite
|
2011-10-08 17:05:22 +02:00 |
|
Maximilian Rehkopf
|
9a58016f26
|
FPGA: replace unneeded MCU_OVR signal
|
2011-10-08 02:29:38 +02:00 |
|
Maximilian Rehkopf
|
fe80fb8825
|
FPGA: delete unused source file
|
2011-10-07 23:54:41 +02:00 |
|
Maximilian Rehkopf
|
8f1dd1c1e2
|
FPGA: update project files (ISE 13.2)
|
2011-10-07 22:10:02 +02:00 |
|
Maximilian Rehkopf
|
f3a67ab5aa
|
FPGA: rework shared memory access
|
2011-10-07 22:06:43 +02:00 |
|
Maximilian Rehkopf
|
80243fa604
|
FPGA: sync SPI to external SCK (allow 48MHz SCK)
|
2011-10-07 21:51:17 +02:00 |
|
Maximilian Rehkopf
|
3d608f2785
|
FPGA/MSU: more robust edge detection
|
2011-08-17 00:15:07 +02:00 |
|
ikari
|
ed1e398851
|
FPGA: fix ST0010 glitches
|
2011-06-23 00:55:29 +02:00 |
|
ikari
|
530a5ac113
|
FPGA: ST0010 support
|
2011-06-20 14:20:32 +02:00 |
|
ikari
|
0166dbbb27
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FPGA: peripheral enable switch, SRAM access inhibit for games with no SaveRAM
|
2011-06-19 15:39:04 +02:00 |
|
ikari
|
a8d64311c6
|
FPGA: code formatting, update synthesis configuration, timing
|
2011-06-18 02:27:56 +02:00 |
|
ikari
|
29f427821b
|
FPGA: Fix upd77c25 for 1chip consoles
|
2011-06-17 00:54:26 +02:00 |
|
ikari
|
a3ac555e18
|
FPGA: add test fixtures
|
2011-06-11 23:57:06 +02:00 |
|
ikari
|
1717bf942b
|
FPGA: add missing IP core files
|
2011-06-11 23:55:24 +02:00 |
|
ikari
|
56538dc5e1
|
FPGA: uPD77c25 WIP
|
2011-06-11 03:32:37 +02:00 |
|
ikari
|
00e090aef9
|
FPGA: update user constraints + BRAMs
|
2011-06-07 14:08:17 +02:00 |
|
ikari
|
a19ce8c07f
|
uPD77c25 (core fully operational, no firmware download)
|
2011-06-07 14:05:49 +02:00 |
|
ikari
|
3539cae325
|
uPD77C25 (DSP1-4) (preliminary) (missing source)
|
2011-05-31 01:07:52 +02:00 |
|
ikari
|
34188532f9
|
uPD77C25 (DSP1-4) (preliminary)
|
2011-05-31 01:05:08 +02:00 |
|
ikari
|
04bc32de86
|
FPGA: fix BS-X mapping, S-RTC interface
|
2011-03-14 01:54:04 +01:00 |
|
ikari
|
2d15e24f4d
|
FPGA: rename source files
|
2011-02-13 00:53:29 +01:00 |
|
ikari
|
7e8f5679e6
|
FPGA: RTC fixes + calculate day of week
|
2011-02-13 00:52:14 +01:00 |
|
ikari
|
6b9acae5c2
|
BS-X support (FPGA)
|
2011-02-08 00:51:49 +01:00 |
|