configs: sync use ETNAVIV instead of Galcore

Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
config: ahead: enable bluetooth
2026-06-21 17:22:24 +02:00 · 2023-12-08 11:29:59 +08:00 · 2023-12-08 11:28:26 +08:00 · 2023-12-08 11:28:26 +08:00 · 2023-12-08 11:28:26 +08:00 · 2023-12-08 11:24:07 +08:00
1360 changed files with 904249 additions and 8533 deletions
--- a/.github/workflows/kernel.yml
+++ b/.github/workflows/kernel.yml
@@ -0,0 +1,89 @@
+name: revyos-kernel-build
+
+on:
+  push:
+  pull_request:
+  workflow_dispatch:
+  schedule:
+    - cron: "0 2 * * *"
+
+env:
+  xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1698113812618
+  toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.0-20231018.tar.gz
+  mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2023.10.18
+  mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2023.10.18-nightly.tar.gz
+  wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
+  ARCH: riscv
+  board: lpi4a
+  KBUILD_BUILD_USER: builder
+  KBUILD_BUILD_HOST: revyos-riscv-builder
+  KDEB_COMPRESS: xz
+  KDEB_CHANGELOG_DIST: unstable
+
+jobs:
+  kernel:
+    strategy:
+      fail-fast: false
+      matrix:
+        name: [thead-gcc, gcc-13]
+        board: [lpi4a, ahead]
+
+    runs-on: ubuntu-22.04
+    env:
+      CROSS_COMPILE: riscv64-unknown-linux-gnu-
+
+    steps:
+      - name: Install software
+        run: |
+              sudo apt update && \
+              sudo apt install -y gdisk dosfstools g++-12-riscv64-linux-gnu build-essential \
+                                  libncurses-dev gawk flex bison openssl libssl-dev tree \
+                                  dkms libelf-dev libudev-dev libpci-dev libiberty-dev autoconf device-tree-compiler \
+                                  devscripts
+
+      - name: Checkout kernel
+        uses: actions/checkout@v4
+        with:
+            path: 'kernel'
+
+      - name: Compile Kernel && Install
+        run: |
+              mkdir -p rootfs
+              if [[ ${{ matrix.name }} = "thead-gcc" ]]; then
+                ${wget_alias} ${xuantie_toolchain}/${toolchain_file_name}
+                tar -xvf ${toolchain_file_name} -C /opt
+                export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.0/bin:$PATH"
+              else
+                ${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
+                tar -xvf ${mainline_toolchain_file_name} -C /opt
+                export PATH="/opt/riscv/bin:$PATH"
+              fi
+              ${CROSS_COMPILE}gcc -v
+
+              pushd kernel
+                if [ x"${{ matrix.board }}" = x"lpi4a" ]; then
+                  make revyos_defconfig
+                elif [ x"${{ matrix.board }}" = x"ahead" ]; then
+                  make revyos_beaglev_defconfig
+                fi
+                export KDEB_PKGVERSION="$(date "+%Y.%m.%d.%H.%M")+$(git rev-parse --short HEAD)"
+                sed -i '/CONFIG_LOCALVERSION_AUTO/d' .config && echo "CONFIG_LOCALVERSION_AUTO=n" >> .config
+                cat .config | grep "CONFIG_THEAD_ISA"
+                make -j$(nproc) bindeb-pkg LOCALVERSION="-${{ matrix.board }}"
+
+                # Copy deb
+                sudo dcmd cp -v ../*.changes ${GITHUB_WORKSPACE}/rootfs/
+
+                # record commit-id
+                git rev-parse HEAD > ${{ matrix.board }}-kernel-commitid
+                sudo cp -v ${{ matrix.board }}-kernel-commitid ${GITHUB_WORKSPACE}/rootfs/
+
+                ls -al ${GITHUB_WORKSPACE}/rootfs/
+              popd
+
+      - name: 'Upload Artifact'
+        uses: actions/upload-artifact@v3
+        with:
+          name: thead-kernel-${{ matrix.name }}
+          path: rootfs/*
+          retention-days: 30
--- a/.gitignore
+++ b/.gitignore
@@ -18,6 +18,7 @@
 *.c.[012]*.*
 *.dt.yaml
 *.dtb
+*.dtbo
 *.dtb.S
 *.dwo
 *.elf
--- a/3
+++ b/3
@@ -480,6 +480,8 @@ LZ4		= lz4
 XZ		= xz
 ZSTD		= zstd

+PAHOLE_FLAGS	= $(shell PAHOLE=$(PAHOLE) $(srctree)/scripts/pahole-flags.sh)
+
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
 		  -Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
 NOSTDINC_FLAGS :=
@@ -534,6 +536,7 @@ export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE
 export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE
 export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE
 export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
+export PAHOLE_FLAGS

 # Files to ignore in find ... statements

--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -18,10 +18,10 @@ config RISCV
 	select ARCH_HAS_DEBUG_VM_PGTABLE
 	select ARCH_HAS_DEBUG_VIRTUAL if MMU
 	select ARCH_HAS_DEBUG_WX
+	select ARCH_HAS_FAST_MULTIPLIER
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_GIGANTIC_PAGE
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_MMIOWB
 	select ARCH_HAS_PTE_SPECIAL
 	select ARCH_HAS_SET_DIRECT_MAP
 	select ARCH_HAS_SET_MEMORY
@@ -32,8 +32,11 @@ config RISCV
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
 	select ARCH_HAS_DMA_WRITE_COMBINE
 	select ARCH_HAS_DMA_MMAP_PGPROT
+	select ARCH_KEEP_MEMBLOCK
 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
+	select ARCH_USE_CMPXCHG_LOCKREF
+	select ARCH_USE_QUEUED_SPINLOCKS
 	select ARCH_USE_QUEUED_RWLOCKS
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
 	select ARCH_WANT_FRAME_POINTERS
@@ -392,45 +395,19 @@ config FPU
 	  If you don't know what to do here, say Y.

 config VECTOR
-	bool "VECTOR support"
-	default n
-
-choice VECTOR_VERSION
-	prompt "Vector Version"
-	depends on VECTOR
-	default VECTOR_1_0
-
-config VECTOR_1_0
-	bool "VECTOR 1.0 support"
-	help
-	  Say N here if you want to disable all vector 1.0 related procedure
-	  in the kernel.
-
-	  If you don't know what to do here, say Y.
-
-config VECTOR_0_7
 	bool "VECTOR 0.7 support"
+	default y
 	help
 	  Say N here if you want to disable all vector 0.7 related procedure
 	  in the kernel.

 	  If you don't know what to do here, say Y.

-endchoice
-
-config VLEN_256
-	bool "VECTOR VLEN 256"
-	depends on VECTOR
-	default n
-
-config VECTOR_EMU
-	bool "VECTOR e64 emulate for c906 v1"
-	depends on VECTOR
-	default n
-
 config THEAD_ISA
 	bool "T-HEAD extension ISA in AFLAGS with -march=_xtheadc"
-	default n
+	default y
+	help
+	  Say N here if you want to disable xtheadc in the kernel.

 endmenu

--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -48,25 +48,25 @@ endif
 endif

 # ISA string setting
+riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
+riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
+riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
+riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
+
+# Fix mainline build
+toolchain-have-v0p7 := $(call cc-option-yn, -march=$(riscv-march-y)v0p7)
+riscv-march-$(toolchain-have-v0p7) := $(riscv-march-y)v0p7
+
+toolchain-have-xtheadc := $(call cc-option-yn, -march=$(riscv-march-y)_xtheadc)
+riscv-march-$(toolchain-have-xtheadc) := $(riscv-march-y)_xtheadc
+
 # Newer binutils versions default to ISA spec version 20191213 which moves some
 # instructions from the I extension to the Zicsr and Zifencei extensions.
 toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
 riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei

-riscv-march-cflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-cflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-cflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-cflags-y)c
-
-riscv-march-aflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-aflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-aflags-$(CONFIG_FPU)		:= $(riscv-march-aflags-y)fd
-riscv-march-aflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-aflags-y)c
-riscv-march-aflags-$(CONFIG_VECTOR_1_0)		:= $(riscv-march-aflags-y)v
-riscv-march-aflags-$(CONFIG_VECTOR_0_7)		:= $(riscv-march-aflags-y)v0p7
-riscv-march-aflags-$(CONFIG_THEAD_ISA)		:= $(riscv-march-aflags-y)_xtheadc
-
-KBUILD_CFLAGS += -march=$(riscv-march-cflags-y) -Wa,-march=$(riscv-march-aflags-y)
-KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
+KBUILD_CFLAGS += -march=$(subst _xtheadc,,$(subst v0p7,,$(subst fd,,$(riscv-march-y))))
+KBUILD_AFLAGS += -march=$(riscv-march-y)

 KBUILD_CFLAGS += -mno-save-restore
 KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
@@ -124,7 +124,7 @@ endif
 ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_KENDRYTE),yy)
 KBUILD_IMAGE := $(boot)/loader.bin
 else
-KBUILD_IMAGE := $(boot)/Image.gz
+KBUILD_IMAGE := $(boot)/Image
 endif
 BOOT_TARGETS := Image Image.gz loader loader.bin

--- a/arch/riscv/boot/dts/Makefile
+++ b/arch/riscv/boot/dts/Makefile
@@ -1,4 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
 subdir-y += sifive
 subdir-y += kendryte
 subdir-y += thead
--- a/arch/riscv/boot/dts/thead/Makefile
+++ b/arch/riscv/boot/dts/thead/Makefile
@@ -1,10 +1,15 @@
 # SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
 dtb-$(CONFIG_SOC_THEAD) += ice.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu.dtb light_mpw.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-npu-fce.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-gpu.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsp.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-audio.dtb light-a-val-audio-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val.dtb light-a-val-sv.dtb
@@ -12,21 +17,25 @@ dtb-$(CONFIG_SOC_THEAD) += light-a-val-ddr2G.dtb light-a-val-ddr1G.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-npu-fce.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-iso7816.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-nand.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0.dtb light-a-val-dsi1.dtb light-a-val-hdmi.dtb light-a-val-dsi0-dsi1.dtb light-a-val-dsi0-hdmi.dtb light-a-val-dpi0.dtb light-a-val-dpi0-dpi1.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio.dtb light-a-val-audio-i2s-8ch.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-tdm.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-audio-spdif.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-dsi0.dtb light-a-val-dsi1.dtb light-a-val-hdmi.dtb light-a-val-dsi0-dsi1.dtb light-a-val-dsi0-hdmi.dtb light-a-val-dsi0-hdmi-audio.dtb light-a-val-dpi0.dtb light-a-val-dpi0-dpi1.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-wcn.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-gpio-keys.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-khv.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-sec.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-miniapp-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-product.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-b-product.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-b-product.dtb light-b-product-sec.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-b-product-ddr1G.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-b-product-miniapp-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-full.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-ant-ref.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-ant-discrete.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-ddr2G.dtb light-lpi4a-16gb.dtb light-lpi4a-dsi0-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-cluster.dtb light-lpi4a-cluster-16gb.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-ref.dtb light-a-ref-dsi0.dtb light-a-ref-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-b-ref.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-crash.dtb light-b-product-crash.dtb light-ant-ref-crash.dtb light-ant-discrete-crash.dtb
@@ -35,3 +44,12 @@ dtb-$(CONFIG_SOC_THEAD) += light-b-power.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-android.dtb

 dtb-$(CONFIG_SOC_THEAD) += fire-emu.dtb fire-emu-crash.dtb
+dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb
+dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base-sec.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-laptop.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-milkv-meles.dtb light-milkv-meles-4g.dtb
+
+targets += dtbs dtbs_install
+targets += $(dtb-y)
+
+subdir-y	:= overlays
--- a/arch/riscv/boot/dts/thead/fire-crash.dts
+++ b/arch/riscv/boot/dts/thead/fire-crash.dts
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Copyright (C) 2021 Alibaba Group Holding Limited.
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
 */

 /dts-v1/;
@@ -9,8 +9,9 @@
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "light-vi-devices.dtsi"
+
 / {
-	model = "T-HEAD Fire emu board";
+	model = "T-HEAD fire fpga board";
 	compatible = "thead,fire-emu", "thead,fire";

 	chosen {
@@ -120,10 +121,6 @@
 			is_default_region;
 		};

-		iopmp_fce: IOPMP_FCE {
-			is_default_region;
-		};
-
 		iopmp0_dpu: IOPMP0_DPU {
 			bypass_en;
 		};
@@ -192,23 +189,6 @@
 		status = "okay";
 	};

-	reg_vref_1v8: regulator-adc-verf {
-			compatible = "regulator-fixed";
-			regulator-name = "vref-1v8";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-	status = "okay";
-	};
-
-        reg_tp_pwr_en: regulator-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "PWR_EN";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpio1_porta 12 1>;
-                enable-active-high;
-                regulator-always-on;
-        };

 	wcn_wifi: wireless-wlan {
 		compatible = "wlan-platdata";
@@ -217,33 +197,33 @@
 		keep_wifi_power_on;
 		pinctrl-names = "default";
 		wifi_chip_type = "rtl8723ds";
-		WIFI,poweren_gpio = <&gpio2_porta 29 0>;
-		WIFI,reset_n = <&gpio2_porta 24 0>;
-		status = "okay";
+		WIFI,poweren_gpio = <&gpio2_porta 26 0>;
+		WIFI,reset_n = <&gpio2_porta 28 0>;
+		status = "disabled";
 	};

 	wcn_bt: wireless-bluetooth {
 		compatible = "bluetooth-platdata";
 		pinctrl-names = "default", "rts_gpio";
-		BT,power_gpio    = <&gpio2_porta 25 0>;
-		status = "okay";
+		BT,power_gpio    = <&gpio2_porta 29 0>;
+		status = "disabled";
 	};

-	gpio-keys {
+	gpio_keys: gpio_keys{
 		compatible = "gpio-keys";
-		pinctrl-0 = <&pinctrl_volume>;
 		pinctrl-names = "default";
+		status = "disabled";
 		key-volumedown {
 			label = "Volume Down Key";
-			linux,code = <KEY_VOLUMEDOWN>;
-			debounce-interval = <1>;
-			gpios = <&ao_gpio_porta 11 0x1>;
+			linux,code = <KEY_1>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
 		};
 		key-volumeup {
 			label = "Volume Up Key";
-			linux,code = <KEY_VOLUMEUP>;
-			debounce-interval = <1>;
-			gpios = <&ao_gpio_porta 10 0x1>;
+			linux,code = <KEY_2>;
+			debounce-interval = <2>;
+			gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
 		};
 	};

@@ -251,20 +231,27 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
-		status = "okay";
+		status = "disabled";

 		pd: light-aon-pd {
 			compatible = "thead,light-aon-pd";
 			#power-domain-cells = <1>;
+			status = "disabled";
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic";
+			status = "disabled";
 		};

 		c910_cpufreq {
 			compatible = "thead,light-mpw-cpufreq";
-			status = "okay";
+			status = "disabled";
 		};

 		test: light-aon-test {
 			compatible = "thead,light-aon-test";
+			status = "disabled";
 		};
 	};
 };
@@ -278,60 +265,73 @@
 		reg = <0x0 0x1a000000 0 0x4000000>;
 		no-map;
 	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+    vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};

-	dsp0_mem: memory@20000000 {             /**0x2000_0000~0x2040_0000 4M**/
-		reg = <0x0 0x20000000 0x0 0x00280000   /* DSP FW code&data section 2.5M*/ 
-               0x0 0x20280000 0x0 0x00001000   /* DSP communication area 4K*/ 
-               0x0 0x20281000 0x0 0x00007000  /* Panic/log page 28K */
-               0x0 0x20288000 0x0 0x00178000>;  /* DSP shared memory 1.5M-32K*/
-		no-map;
-	};
-    dsp1_mem: memory@20400000 {             /**0x2040_0000~0x2080_0000 4M**/
-        reg = <0x0 0x20400000 0x0 0x00280000  /* DSP FW code&data section */ 
-               0x0 0x20680000 0x0 0x00001000 /* DSP communication area */
-               0x0 0x20681000 0x0 0x00007000    /* Panic/log page*/ 
-               0x0 0x20688000 0x0 0x00178000>;  /* DSP shared memory */
-        no-map;
-    };
-	vi_mem: framebuffer@10000000 {
-		reg = <0x0 0x10000000 0x0 0x02C00000	/* vi_mem_pool_region[0]  44 MB (default) */
-		       0x0 0x12C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
-		       0x0 0x14900000 0x0 0x01E00000>;	/* vi_mem_pool_region[2]  30 MB */
-		no-map;
-	};
-	facelib_mem: memory@17000000 {
-		reg = <0x0 0x17000000 0 0x02000000>;
-		no-map;
-	};
 };

-&adc {
-	vref-supply = <&reg_vref_1v8>;
-	status = "okay";
+&clk {
+	status = "disabled";
 };

 &i2c0 {
-	clock-frequency = <100000>;
+	clock-frequency = <400000>;
 	status = "okay";

+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
       touch@5d {
               #gpio-cells = <2>;
               compatible = "goodix,gt911";
+			   status = "disabled";
               reg = <0x5d>;
               interrupt-parent = <&gpio1_porta>;
               interrupts = <8 0>;
               irq-gpios = <&gpio1_porta 8 0>;
               reset-gpios = <&gpio1_porta 7 0>;
-               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
               touchscreen-size-y = <1280>;
       };
-
 };

 &audio_i2c0 {
        clock-frequency = <100000>;
-        status = "okay";
+        status = "disabled";

       es8156_audio_codec: es8156@8 {
               #sound-dai-cells = <0>;
@@ -344,25 +344,29 @@
                compatible = "MicArray_0";
                reg = <0x40>;
        };
-
-	audio_aw87519_pa@58 {
-		compatible = "awinic,aw87519_pa";
-		reg = <0x58>;
-		reset-gpio = <&ao_gpio4_porta 9 0x1>;
-		status = "okay";
-	};
 };

 &i2c1 {
-        clock-frequency = <100000>;
-        status = "okay";
+        clock-frequency = <400000>;
+        status = "disabled";
+        touch1@5d {
+                #gpio-cells = <2>;
+                compatible = "goodix,gt911";
+                reg = <0x5d>;
+                interrupt-parent = <&gpio1_porta>;
+                interrupts = <12 0>;
+                irq-gpios = <&gpio1_porta 12 0>;
+                reset-gpios = <&gpio1_porta 11 0>;
+                touchscreen-size-x = <800>;
+                touchscreen-size-y = <1280>;
+        };
 };

 &spi0 {
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
-	status = "disabled";
+	status = "okay";

 	spi_norflash@0 {
 		#address-cells = <1>;
@@ -371,6 +375,7 @@
 		reg = <0>;
 		spi-max-frequency = <50000000>;
 		w25q,fast-read;
+		status = "disabled";
 	};

 	spidev@1 {
@@ -382,12 +387,6 @@
 	};
 };

-&uart0 {
-	clocks = <&dummy_clock_uart_sclk>;
-	clock-names = "baudclk";
-	clock-frequency = <100000000>;
-};
-
 &qspi0 {
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 3 0>;
@@ -411,17 +410,23 @@
 };

 &qspi1 {
-	compatible = "snps,dw-apb-ssi";
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
 	status = "disabled";

-	spidev@0 {
-		compatible = "spidev";
-		#address-cells = <0x1>;
-		#size-cells = <0x1>;
-		reg = <0x0>;
-		spi-max-frequency = <50000000>;
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <66000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi2";
+			reg = <0x00000000 0x08000000>;
+		};
 	};
 };

@@ -447,14 +452,6 @@
 	};
 };

-&gmac1 {
-	phy-mode = "rgmii-id";
-	rx-clk-delay = <0x00>; /* for RGMII */
-	tx-clk-delay = <0x00>; /* for RGMII */
-	phy-handle = <&phy_88E1111_1>;
-	status = "okay";
-};
-
 &emmc {
 	max-frequency = <198000000>;
 	non-removable;
@@ -489,7 +486,7 @@
 	cap-sd-highspeed;
 	keep-power-in-suspend;
 	wakeup-source;
-	status = "okay";
+	status = "disabled";
 };

 &padctrl0_apsys { /* right-pinctrl */
@@ -526,7 +523,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -541,6 +538,7 @@
 			pinctrl_pwm: pwmgrp {
 				thead,pins = <
 					FM_GPIO3_2	0x1	0x208	/* pwm0 */
+					FM_GPIO3_3	0x1	0x208	/* pwm1 */
 				>;
 			};
 		};
@@ -593,57 +591,41 @@
 		};
 };

-&padctrl_aosys {
-	light-aon-padctrl {
-			/*
-			 * Pin Configuration Node:
-			 * Format: <pin_id mux_node config>
-			 */
-
-			pinctrl_audiopa1: audiopa1_grp {
-				thead,pins = <
-					FM_AUDIO_PA1	0x3	0x72
-				>;
-			};
-
-			pinctrl_audiopa2: audiopa2_grp {
-				thead,pins = <
-					FM_AUDIO_PA2	0x0	0x72
-				>;
-			};
-
-			pinctrl_volume: volume_grp {
-				thead,pins = <
-					FM_AOGPIO_11  0x0     0x208
-					FM_AOGPIO_10  0x3     0x208
-				>;
-			};
+&i2c2 {
+    clock-frequency = <400000>;
+	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
 	};
 };

-&i2c0 {
-	clock-frequency = <400000>;
-	status = "okay";
-};
-
-&i2c1 {
-	clock-frequency = <400000>;
-	status = "okay";
-};
-
-&i2c2 {
-	clock-frequency = <400000>;
-	status = "okay";
-};
-
 &i2c3 {
-	clock-frequency = <400000>;
+    clock-frequency = <400000>;
 	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
 };

 &i2c4 {
-	clock-frequency = <400000>;
+    clock-frequency = <400000>;
 	status = "okay";
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	pcal6408ahk_a: gpio@20 {
+		compatible = "nxp,pcal9554b";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
 };

 &isp0 {
@@ -691,6 +673,7 @@
 };

 &vi_pre {
+	//vi_pre_irq_en = <1>;
 	status = "disabled";
 };

@@ -700,18 +683,20 @@

 &xtensa_dsp0 {
 	status = "disabled";
+    memory-region = <&dsp0_mem>;
 };

-&xtensa_dsp1 {
-	status = "disabled";
+&xtensa_dsp1{
+    status = "disabled";
+    memory-region = <&dsp1_mem>;
 };

 &vvcam_flash_led0{
-       status = "disabled";
-};
-
-
-&vvcam_sensor0 {
+    flash_led_name = "aw36413_aw36515";
+	floodlight_i2c_bus = /bits/ 8 <2>;
+	floodlight_en_pin = <&gpio1_porta 25 0>;
+	//projection_i2c_bus = /bits/ 8 <2>;
+	flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
 	status = "disabled";
 };

@@ -851,19 +836,19 @@
 };

 &light_i2s {
-        status = "okay";
+        status = "disabled";
 };

 &i2s0 {
-        status = "okay";
+        status = "disabled";
 };

 &i2s1 {
-        status = "okay";
+        status = "disabled";
 };

 &i2s3 {
-        status = "okay";
+        status = "disabled";
 };

 &khvhost {
--- a/arch/riscv/boot/dts/thead/fire-emu-crash.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-crash.dts
@@ -8,7 +8,7 @@
 &aon {
 	aon_reg_dialog: light-dialog-reg {
 		compatible = "thead,light-dialog-pmic";
-		status = "okay";
+		status = "disabled";

 		dvdd_cpu_reg: appcpu_dvdd {
 			regulator-name = "appcpu_dvdd";
--- a/arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-gpu-dpu-dsi0.dts
@@ -0,0 +1,107 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&gpu {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+	status = "okay";
+};
+
+
+&dsi0 {
+	status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "hlt,hpk070h275";
+		reg = <0>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&aon {
+	status = "okay";
+};
+
+&mbox_910t {
+	status = "okay";
+};
+
+&mbox_910t_client1 {
+	status = "okay";
+};
+
+&mbox_910t_client2 {
+	status = "okay";
+};
+
+&dmac1 {
+	status = "okay";
+};
+
+&lightsound {
+	status = "okay";
+};
+
+&dmac2 {
+    status = "disabled";
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-soc-base-sec.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-soc-base-sec.dts
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+/* #include "fire-emu.dts" */
+#include "fire-emu-soc-base.dts"
+
+&light_iopmp {
+        status = "disabled";
+};
--- a/arch/riscv/boot/dts/thead/fire-emu-soc-base.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-soc-base.dts
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&sdhci0 {
+	status = "okay";
+};
+
+&usb3_drd {
+	status = "okay";
+};
+
+&usb {
+	status = "okay";
+};
+
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "okay";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+		status = "okay";
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&qspi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>;
+	rx-sample-dly = <4>;
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi1";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
+&qspi1 {
+	num-cs = <1>;
+	cs-gpios = <&gpio0_porta 1 0>;
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <66000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi2";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-soc-c910x4.dts
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&c910_2 {
+	status = "okay";
+};
+
+&c910_3 {
+	status = "okay";
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-vi-dsp-vo.dts
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&vi_pre {
+	status = "okay";
+};
+
+&dewarp {
+	status = "okay";
+};
+
+&xtensa_dsp {
+	status = "okay";
+};
+
+&xtensa_dsp0 {
+	status = "okay";
+};
+
+&xtensa_dsp1 {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+};
+
+&dsi0 {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu-vi-vp-vo.dts
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "fire-emu.dts"
+
+&c910_1 {
+	status = "okay";
+};
+
+&vi_pre {
+	status = "okay";
+};
+
+&dewarp {
+	status = "okay";
+};
+
+&venc {
+	status = "okay";
+};
+
+&vdec {
+	status = "okay";
+};
+
+&g2d {
+	status = "okay";
+};
+
+&vosys_reg {
+	status = "okay";
+};
+
+&display_subsystem {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dsi0 {
+	status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "hlt,hpk070h275";
+		reg = <0>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};
+
+&dpu_enc1 {
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
--- a/arch/riscv/boot/dts/thead/fire-emu.dts
+++ b/arch/riscv/boot/dts/thead/fire-emu.dts
--- a/arch/riscv/boot/dts/thead/fire.dtsi
+++ b/arch/riscv/boot/dts/thead/fire.dtsi
@@ -23,7 +23,6 @@

 	aliases {
 		ethernet0 = &gmac0;
-		ethernet1 = &gmac1;
 		gpio0 = &gpio0;
 		gpio1 = &gpio1;
 		gpio2 = &gpio2;
@@ -93,7 +92,7 @@
 		};
 	};

-	thermal-zones {
+	thermal_zones: thermal-zones {
 		cpu-thermal-zone {
 			polling-delay-passive = <250>;
 			polling-delay = <2000>;
@@ -166,8 +165,6 @@
 				 <&clk CPU_PLL0_FOUTPOSTDIV>;
 			clock-names = "c910_cclk", "c910_cclk_i0",
 				      "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
-			dvdd-supply = <&dvdd_cpu_reg>;
-			dvddm-supply = <&dvddm_cpu_reg>;

 			cpu0_intc: interrupt-controller {
 				#interrupt-cells = <1>;
@@ -178,7 +175,7 @@
 		c910_1: cpu@1 {
 			device_type = "cpu";
 			reg = <1>;
-			status = "okay";
+			status = "disabled";
 			compatible = "riscv";
 			riscv,isa = "rv64imafdcvsu";
 			mmu-type = "riscv,sv39";
@@ -212,8 +209,6 @@
 				 <&clk CPU_PLL0_FOUTPOSTDIV>;
 			clock-names = "c910_cclk", "c910_cclk_i0",
 				      "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
-			dvdd-supply = <&dvdd_cpu_reg>;
-			dvddm-supply = <&dvddm_cpu_reg>;

 			cpu1_intc: interrupt-controller {
 				#interrupt-cells = <1>;
@@ -224,7 +219,7 @@
 		c910_2: cpu@2 {
 			device_type = "cpu";
 			reg = <2>;
-			status = "okay";
+			status = "disabled";
 			compatible = "riscv";
 			riscv,isa = "rv64imafdcvsu";
 			mmu-type = "riscv,sv39";
@@ -258,8 +253,6 @@
 				 <&clk CPU_PLL0_FOUTPOSTDIV>;
 			clock-names = "c910_cclk", "c910_cclk_i0",
 				      "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
-			dvdd-supply = <&dvdd_cpu_reg>;
-			dvddm-supply = <&dvddm_cpu_reg>;

 			cpu2_intc: interrupt-controller {
 				#interrupt-cells = <1>;
@@ -270,7 +263,7 @@
 		c910_3: cpu@3 {
 			device_type = "cpu";
 			reg = <3>;
-			status = "okay";
+			status = "disabled";
 			compatible = "riscv";
 			riscv,isa = "rv64imafdcvsu";
 			mmu-type = "riscv,sv39";
@@ -304,8 +297,6 @@
 				 <&clk CPU_PLL0_FOUTPOSTDIV>;
 			clock-names = "c910_cclk", "c910_cclk_i0",
 				      "cpu_pll1_foutpostdiv", "cpu_pll0_foutpostdiv";
-			dvdd-supply = <&dvdd_cpu_reg>;
-			dvddm-supply = <&dvddm_cpu_reg>;

 			cpu3_intc: interrupt-controller {
 				#interrupt-cells = <1>;
@@ -315,7 +306,7 @@
 		};
 	};

-	display-subsystem {
+	display_subsystem: display-subsystem {
 		compatible = "verisilicon,display-subsystem";
 		ports = <&dpu_disp0>, <&dpu_disp1>;
 		status = "disabled";
@@ -382,7 +373,7 @@
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
 			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
 		};

 		clint0: clint@ffdc000000 {
@@ -421,7 +412,7 @@
 			dummy_clock_apb: apb-clock@0 {
 				compatible = "fixed-clock";
 				reg = <0>;	/* Not address, just for index */
-				clock-frequency = <62500000>;
+				clock-frequency = <50000000>;
 				clock-output-names = "dummy_clock_apb";
 				#clock-cells = <0>;
 			};
@@ -469,7 +460,7 @@
 			dummy_clock_dphy_ref: dphy-ref-clock@7 {
 				compatible = "fixed-clock";
 				reg = <7>;      /* Not address, just for index */
-				clock-frequency = <24000000>;
+				clock-frequency = <40000000>;
 				clock-output-names = "dummy_clock_dphy_ref";
 				#clock-cells = <0>;
 			};
@@ -477,7 +468,7 @@
 			dummy_clock_dphy_cfg: dphy-cfg-clock@8 {
 				compatible = "fixed-clock";
 				reg = <8>;      /* Not address, just for index */
-				clock-frequency = <24000000>;
+				clock-frequency = <40000000>;
 				clock-output-names = "dummy_clock_dphy_cfg";
 				#clock-cells = <0>;
 			};
@@ -485,7 +476,7 @@
 			dummy_clock_dpu_pixel0: dpu-pixel-clock@9 {
 				compatible = "fixed-clock";
 				reg = <9>;
-				clock-frequency = <72000000>;
+				clock-frequency = <25200000>;
 				clock-output-names = "dummy_clock_dpu_pixel0";
 				#clock-cells = <0>;
 			};
@@ -493,7 +484,7 @@
 			dummy_clock_dpu_pixel1: dpu-pixel-clock@10 {
 				compatible = "fixed-clock";
 				reg = <10>;
-				clock-frequency = <74250000>;
+				clock-frequency = <25200000>;
 				clock-output-names = "dummy_clock_dpu_pixel1";
 				#clock-cells = <0>;
 			};
@@ -525,7 +516,7 @@
 			dummy_clock_eip: eip-clock@14 {
 				compatible = "fixed-clock";
 				reg = <14>;	/* Not address, just for index */
-				clock-frequency = <400000000>;
+				clock-frequency = <30000000>;
 				clock-output-names = "dummy_clock_eip";
 				#clock-cells = <0>;
 			};
@@ -533,7 +524,7 @@
 			dummy_clock_spi: spi-clock@15 {
 				compatible = "fixed-clock";
 				reg = <15>;	/* Not address, just for index */
-				clock-frequency = <396000000>;
+				clock-frequency = <50000000>;
 				clock-output-names = "dummy_clock_spi";
 				#clock-cells = <0>;
 			};
@@ -541,7 +532,7 @@
 			dummy_clock_qspi: spi-clock@16 {
 				compatible = "fixed-clock";
 				reg = <15>;	/* Not address, just for index */
-				clock-frequency = <792000000>;
+				clock-frequency = <50000000>;
 				clock-output-names = "dummy_clock_qspi";
 				#clock-cells = <0>;
 			};
@@ -549,7 +540,7 @@
 			dummy_gmac_ahb: gmac-ahb-clock@16 {
 				compatible = "fixed-clock";
 				reg = <16>;
-				clock-frequency = <250000000>;
+				clock-frequency = <50000000>;
 				clock-output-names = "dummy_gmac_ahb";
 				#clock-cells = <0>;
 			};
@@ -557,7 +548,7 @@
 			dummy_clock_gmac: gmac-clock@17 {
 				compatible = "fixed-clock";
 				reg = <17>;
-				clock-frequency = <500000000>;
+				clock-frequency = <50000000>;
 				clock-output-names = "dummy_clock_gmac";
 				#clock-cells = <0>;
 			};
@@ -565,7 +556,7 @@
 			dummy_clock_sdhci: sdhci-clock@18 {
 				compatible = "fixed-clock";
 				reg = <18>;	/* Not address, just for index */
-				clock-frequency = <198000000>;
+				clock-frequency = <50000000>;
 				clock-output-names = "dummy_clock_sdhci";
 				#clock-cells = <0>;
 			};
@@ -573,16 +564,16 @@
 			dummy_clock_aonsys_clk: aonsys-clk-clock@19 {
 				compatible = "fixed-clock";
 				reg = <19>;	/* Not address, just for index */
-				clock-frequency = <73728000>;
+				clock-frequency = <24000000>;
 				clock-output-names = "dummy_clock_aonsys_clk";
 				#clock-cells = <0>;
 			};

-			dummy_clock_uart_sclk: uart-sclk-clock@20 {
+			dummy_clock_uart: uart-sclk-clock@20 {
 				compatible = "fixed-clock";
 				reg = <20>;	/* Not address, just for index */
-				clock-frequency = <100000000>;
-				clock-output-names = "dummy_clock_uart_sclk";
+				clock-frequency = <50000000>;
+				clock-output-names = "dummy_clock_uart";
 				#clock-cells = <0>;
 			};

@@ -592,6 +583,20 @@
 				clock-frequency = <24000000>;
 				#clock-cells = <0>;
 			};
+
+			dummy_clock_vipre: vipre-dummy-clock@22 {
+				compatible = "fixed-clock";
+				reg = <22>;
+				clock-frequency = <13000000>;
+				#clock-cells = <0>;
+			};
+
+			dummy_clock_vpsys: vpsys-dummy-clock@23 {
+				compatible = "fixed-clock";
+				reg = <23>;
+				clock-frequency = <24000000>;
+				#clock-cells = <0>;
+			};
 		};

 		iso7816: iso7816-card@fff7f30000 {
@@ -644,9 +649,6 @@
 				reg = <0xb0 6>;
 			};

-			gmac1_mac_address: mac-address@184 {
-				reg = <0xb8 6>;
-			};
 		};

 		misc_sysreg: misc_sysreg@ffec02c000 {
@@ -797,9 +799,8 @@
 			compatible = "thead,pwm-light";
 			reg = <0xff 0xec01c000 0x0 0x4000>;
 			#pwm-cells = <2>;
-			clocks = <&clk CLKGEN_PWM_PCLK>,
-			         <&clk CLKGEN_PWM_CCLK>;
-			clock-names = "pclk", "cclk";
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pwm";
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_pwm>;
 		};
@@ -809,7 +810,7 @@
 			reg = <0xff 0xefc32000 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <16>;
 			interrupt-parent = <&intc>;
 			status = "okay";
@@ -820,7 +821,7 @@
 			reg = <0xff 0xefc32014 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <17>;
 			interrupt-parent = <&intc>;
 			status = "okay";
@@ -831,7 +832,7 @@
 			reg = <0xff 0xefc32028 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <18>;
 			interrupt-parent = <&intc>;
 			status = "disabled";
@@ -842,7 +843,7 @@
 			reg = <0xff 0xefc3203c 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <19>;
 			interrupt-parent = <&intc>;
 			status = "disabled";
@@ -851,7 +852,7 @@
 		padctrl_aosys: padctrl-aosys@fffff4a000 {
 			compatible = "thead,light-fm-aon-pinctrl";
 			reg = <0xff 0xfff4a000 0x0 0x2000>;
-			status = "okay";
+			status = "disabled";
 		};

 		timer4: timer@ffffc33000 {
@@ -859,7 +860,7 @@
 			reg = <0xff 0xffc33000 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <20>;
 			interrupt-parent = <&intc>;
 			status = "disabled";
@@ -870,7 +871,7 @@
 			reg = <0xff 0xffc33014 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <21>;
 			interrupt-parent = <&intc>;
 			status = "disabled";
@@ -881,7 +882,7 @@
 			reg = <0xff 0xffc33028 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <22>;
 			interrupt-parent = <&intc>;
 			status = "disabled";
@@ -892,7 +893,7 @@
 			reg = <0xff 0xffc3303c 0x0 0x14>;
 			clocks = <&dummy_clock_apb>;
 			clock-names = "timer";
-			clock-frequency = <62500000>;
+			clock-frequency = <50000000>;
 			interrupts = <23>;
 			interrupt-parent = <&intc>;
 			status = "disabled";
@@ -903,7 +904,7 @@
 			reg = <0xff 0xe7014000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <36>;
-			clocks = <&clk CLKGEN_UART0_SCLK>;
+			clocks = <&dummy_clock_uart>;
 			clock-names = "baudclk";
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -916,7 +917,7 @@
 			reg = <0xff 0xe7f00000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <37>;
-			clocks = <&clk CLKGEN_UART1_SCLK>;
+			clocks = <&dummy_clock_uart>;
 			clock-names = "baudclk";
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -929,7 +930,7 @@
 			reg = <0xff 0xec010000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <38>;
-			clocks = <&clk CLKGEN_UART2_SCLK>;
+			clocks = <&dummy_clock_uart>;
 			clock-names = "baudclk";
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -942,7 +943,7 @@
 			reg = <0xff 0xe7f04000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <39>;
-			clocks = <&clk CLKGEN_UART3_SCLK>;
+			clocks = <&dummy_clock_uart>;
 			clock-names = "baudclk";
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -955,7 +956,7 @@
 			reg = <0xff 0xf7f08000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <40>;
-			clocks = <&clk CLKGEN_UART4_SCLK>;
+			clocks = <&dummy_clock_uart>;
 			clock-names = "baudclk";
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -968,7 +969,7 @@
 			reg = <0xff 0xf7f0c000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <41>;
-			clocks = <&clk CLKGEN_UART5_SCLK>;
+			clocks = <&dummy_clock_uart>;
 			clock-names = "baudclk";
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -1030,9 +1031,9 @@
 			interrupt-parent = <&intc>;
 			interrupts = <101>;
 			interrupt-names = "irq_2d";
-			clocks = <&vpsys_clk_gate LIGHT_VPSYS_G2D_PCLK>,
-				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_ACLK>,
-				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
+			clocks = <&dummy_clock_vpsys>,
+				<&dummy_clock_vpsys>,
+				<&dummy_clock_vpsys>;
 			clock-names = "pclk", "aclk", "cclk";
 			status = "okay";
 		};
@@ -1046,11 +1047,11 @@
 				compatible = "thead,light-mipi-dphy";
 				regmap = <&dsi0>;
 				vosys-regmap = <&vosys_reg>;
-				clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_REFCLK>,
-					 <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_CFG_CLK>,
-					 <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PCLK>,
-					 <&clk OSC_24M>,
-					 <&clk OSC_24M>;
+				clocks = <&dummy_clock_dphy_ref>,
+					<&dummy_clock_dphy_cfg>,
+					<&dummy_clock_dphy_ref>,
+					<&dummy_clock_dpu_pixel0>,
+					<&dummy_clock_dphy_cfg>;
 				clock-names = "refclk", "cfgclk", "pclk", "prefclk", "pcfgclk";
 				#phy-cells = <0>;
 			};
@@ -1060,8 +1061,8 @@
 				regmap = <&dsi0>;
 				interrupt-parent = <&intc>;
 				interrupts = <129>;
-				clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PCLK>,
-					 <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI0_PIXCLK>;
+				clocks = <&dummy_clock_dphy_cfg>,
+					<&dummy_clock_dpu_pixel0>;
 				clock-names = "pclk", "pixclk";
 				phys = <&dphy_0>;
 				phy-names = "dphy";
@@ -1079,11 +1080,11 @@
 				compatible = "thead,light-mipi-dphy";
 				regmap = <&dsi1>;
 				vosys-regmap = <&vosys_reg>;
-				clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_REFCLK>,
-					 <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_CFG_CLK>,
-					 <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PCLK>,
-					 <&clk OSC_24M>,
-					 <&clk OSC_24M>;
+				clocks = <&dummy_clock_dphy_ref>,
+					<&dummy_clock_dphy_cfg>,
+					<&dummy_clock_dphy_ref>,
+					<&dummy_clock_dpu_pixel1>,
+					<&dummy_clock_dphy_cfg>;
 				clock-names = "refclk", "cfgclk", "pclk", "prefclk", "pcfgclk";
 				#phy-cells = <0>;
 			};
@@ -1093,8 +1094,8 @@
 				regmap = <&dsi1>;
 				interrupt-parent = <&intc>;
 				interrupts = <129>;
-				clocks = <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PCLK>,
-					 <&vosys_clk_gate LIGHT_CLKGEN_MIPIDSI1_PIXCLK>;
+				clocks = <&dummy_clock_dphy_cfg>,
+					<&dummy_clock_dpu_pixel1>;
 				clock-names = "pclk", "pixclk";
 				phys = <&dphy_1>;
 				phy-names = "dphy";
@@ -1114,11 +1115,11 @@
 			reg = <0xff 0xef540000 0x0 0x40000>;
 			interrupt-parent = <&intc>;
 			interrupts = <111>;
-			clocks = <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PCLK>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_SFR_CLK>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_CEC_CLK>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PIXCLK>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_I2S_CLK>;
+			clocks = <&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>;
 			clock-names = "iahb", "isfr", "cec", "pixclk", "i2s";
 			reg-io-width = <4>;
 			phy_version = <301>;
@@ -1135,19 +1136,19 @@
 			      <0xff 0xef630010 0x0 0x60>;
 			interrupt-parent = <&intc>;
 			interrupts = <93>;
-			clocks = <&vosys_clk_gate LIGHT_CLKGEN_DPU_CCLK>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK0>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK1>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_DPU_ACLK>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_DPU_HCLK>,
-				 <&clk DPU0_PLL_DIV_CLK>,
-				 <&clk DPU1_PLL_DIV_CLK>,
-				 <&clk DPU0_PLL_FOUTPOSTDIV>,
-				 <&clk DPU1_PLL_FOUTPOSTDIV>;
+			clocks = <&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>,
+				<&dummy_clock_dpu_pixel0>;
 			clock-names = "core_clk", "pix_clk0", "pix_clk1",
-				      "axi_clk", "cfg_clk", "pixclk0",
-				      "pixclk1", "dpu0_pll_foutpostdiv",
-				      "dpu1_pll_foutpostdiv";
+						"axi_clk", "cfg_clk", "pixclk0",
+						"pixclk1", "dpu0_pll_foutpostdiv",
+						"dpu1_pll_foutpostdiv";
 			status = "disabled";

 			dpu_disp0: port@0 {
@@ -1172,7 +1173,7 @@
 			reg = <0xff 0xefc30000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <24>;
-			clocks = <&clk CLKGEN_WDT0_PCLK>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "tclk";
 			resets = <&rst LIGHT_RESET_WDT0>; 
 			status = "okay";
@@ -1183,7 +1184,7 @@
 			reg = <0xff 0xefc31000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <25>;
-			clocks = <&clk CLKGEN_WDT1_PCLK>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "tclk";
 			resets = <&rst LIGHT_RESET_WDT1>; 
 			status = "okay";
@@ -1221,7 +1222,7 @@
 				dma-mask = <0xf 0xffffffff>;
 				snps,usb3_lpm_capable;
 				snps,usb_sofitpsync;
-				status = "okay";
+				status = "disabled";
 			};
 		};

@@ -1323,7 +1324,7 @@
 			interrupt-parent = <&intc>;
 			interrupts = <66>;
 			interrupt-names = "macirq";
-			clocks = <&clk CLKGEN_GMAC0_CCLK>;
+			clocks = <&dummy_clock_gmac>;
 			clock-names = "gmac_pll_clk";
 			snps,pbl = <32>;
 			snps,fixed-burst;
@@ -1332,29 +1333,9 @@
 			nvmem-cell-names = "mac-address";
 		};

-		gmac1: ethernet@ffe7060000 {
-			compatible = "thead,light-dwmac";
-			reg = <0xff 0xe7060000 0x0 0x2000
-			       0xff 0xec00401c 0x0 0x4
-			       0xff 0xec004020 0x0 0x4
-			       0xff 0xec004000 0x0 0x1c>;
-			reg-names = "gmac", "phy_if_reg", "txclk_dir_reg", "clk_mgr_reg";
-			interrupt-parent = <&intc>;
-			interrupts = <67>;
-			interrupt-names = "macirq";
-			clocks = <&clk CLKGEN_GMAC1_CCLK>;
-			clock-names = "gmac_pll_clk";
-			snps,pbl = <32>;
-			snps,fixed-burst;
-			snps,axi-config = <&stmmac_axi_setup>;
-			nvmem-cells = <&gmac1_mac_address>;
-			nvmem-cell-names = "mac-address";
-		};
-
 		emmc: sdhci@ffe7080000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7080000 0x0 0x10000
-			       0xff 0xef014060 0x0 0x4>;
+			reg = <0xff 0xe7080000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <62>;
 			interrupt-names = "sdhciirq";
@@ -1364,8 +1345,7 @@

 		sdhci0: sd@ffe7090000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7090000 0x0 0x10000
-			       0xff 0xef014064 0x0 0x4>;
+			reg = <0xff 0xe7090000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <64>;
 			interrupt-names = "sdhci0irq";
@@ -1375,8 +1355,7 @@

 		sdhci1: sd@ffe70a0000 {
 		        compatible = "snps,dwcmshc-sdhci";
-		        reg = <0xff 0xe70a0000 0x0 0x10000
-		               0xff 0xef014064 0x0 0x4>;
+		        reg = <0xff 0xe70a0000 0x0 0x10000>;
 		        interrupt-parent = <&intc>;
 		        interrupts = <71>;
 		        interrupt-names = "sdhci1irq";
@@ -1397,11 +1376,11 @@
 		    interrupts = <102>;
 		    interrupt-names = "gpuirq";
 			vosys-regmap = <&vosys_reg>;
-			power-domains = <&pd LIGHT_AON_GPU_PD>;
-            clocks = <&vosys_clk_gate LIGHT_CLKGEN_GPU_CORE_CLK>,
-                     <&vosys_clk_gate LIGHT_CLKGEN_GPU_CFG_ACLK>;
-            clock-names = "cclk", "aclk";
-		    gpu_clk_rate = <18000000>;
+			//power-domains = <&pd LIGHT_AON_GPU_PD>;
+            clocks = <&dummy_clock_gpu>,
+					<&dummy_clock_gpu>;
+		    clock-names = "cclk", "aclk";
+			gpu_clk_rate = <18000000>;
 		    dma-mask = <0xf 0xffffffff>;
 		    status = "disabled";
 		};
@@ -1411,10 +1390,10 @@
 			reg = <0xff 0xecc00000 0x0 0x8000>;
 			interrupt-parent = <&intc>;
 			interrupts = <131>;
-			power-domains = <&pd LIGHT_AON_VDEC_PD>;
-			clocks = <&vpsys_clk_gate LIGHT_VPSYS_VDEC_ACLK>,
-				<&vpsys_clk_gate LIGHT_VPSYS_VDEC_CCLK>,
-				<&vpsys_clk_gate LIGHT_VPSYS_VDEC_PCLK>;
+			//power-domains = <&pd LIGHT_AON_VDEC_PD>;
+			clocks = <&dummy_clock_vpsys>,
+				<&dummy_clock_vpsys>,
+				<&dummy_clock_vpsys>;
 			clock-names = "aclk", "cclk", "pclk";
 			status = "disabled";
 		};
@@ -1424,10 +1403,10 @@
 			reg = <0xff 0xecc10000 0x0 0x8000>;
 			interrupt-parent = <&intc>;
 			interrupts = <133>;
-			power-domains = <&pd LIGHT_AON_VENC_PD>;
-			clocks = <&vpsys_clk_gate LIGHT_VPSYS_VENC_ACLK>,
-				<&vpsys_clk_gate LIGHT_VPSYS_VENC_CCLK>,
-				<&vpsys_clk_gate LIGHT_VPSYS_VENC_PCLK>;
+			//power-domains = <&pd LIGHT_AON_VENC_PD>;
+			clocks = <&dummy_clock_vpsys>,
+				<&dummy_clock_vpsys>,
+				<&dummy_clock_vpsys>;
 			clock-names = "aclk", "cclk", "pclk";
 			status = "disabled";
 		};
@@ -1443,7 +1422,7 @@
 		vidmem: vidmem@ffecc08000 {
 			compatible = "thead,light-vidmem";
 			reg = <0xff 0xecc08000 0x0 0x1000>;
-			status = "disabled";
+			status = "okay";
 		};

 		light_i2s: light_i2s@ffe7034000 {
@@ -1451,7 +1430,7 @@
 			compatible = "light,light-i2s";
 			reg = <0xff 0xe7034000 0x0 0x4000>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_audio_i2s0>;
+			pinctrl-0 = <&pinctrl_light_i2s0>;
 			light,mode = "i2s-master";
 			light,sel = "ap_i2s";
 			interrupt-parent = <&intc>;
@@ -1532,7 +1511,7 @@
 		    reg-names = "common", "ts", "pd", "vm";
 		    clocks = <&dummy_clock_aonsys_clk>;
 		    #thermal-sensor-cells = <1>;
-		    status = "okay";
+		    status = "disabled";
 		};

 		i2c0: i2c@ffe7f20000 {
@@ -1660,10 +1639,10 @@
 			reg = <0xff 0xe4100000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <117>,<118>;
-			clocks =  <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>,
-			          <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>,
-				  <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>,
-				  <&visys_clk_gate LIGHT_CLKGEN_ISP0_CLK>;
+			clocks =  <&dummy_clock_visys>,
+				<&dummy_clock_visys>,
+				<&dummy_clock_visys>,
+				<&dummy_clock_visys>;
 			clock-names = "aclk", "hclk", "isp0_pclk", "cclk";
 			status = "disabled";
 		};
@@ -1673,11 +1652,11 @@
 			reg = <0xff 0xe4110000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <120>,<121>;
-			clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP0_ACLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_ISP0_HCLK>,
-				 <&visys_clk_gate LIGHT_CLKGEN_ISP0_PIXELCLK>,
-				 <&visys_clk_gate LIGHT_CLKGEN_ISP1_CLK>,
-				 <&visys_clk_gate LIGHT_CLKGEN_ISP1_PIXELCLK>;
+			clocks = <&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>;
 			clock-names = "aclk", "hclk", "isp0_pclk", "cclk", "isp1_pclk";
 			status = "disabled";
 		};
@@ -1687,9 +1666,9 @@
 			reg = <0xff 0xe4120000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <123>,<124>;
-			clocks = <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_ACLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_HCLK>,
-				 <&visys_clk_gate LIGHT_CLKGEN_ISP_RY_CCLK>;
+			clocks = <&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>;
 			clock-names = "aclk", "hclk", "cclk";
 			status = "disabled";
 		};
@@ -1699,10 +1678,10 @@
 			reg = <0xff 0xe4130000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <98>,<99>;
-			clocks = <&visys_clk_gate LIGHT_CLKGEN_DW200_ACLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_DW200_HCLK>,
-				 <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_VSE>,
-				 <&visys_clk_gate LIGHT_CLKGEN_DW200_CLK_DWE>;
+			clocks = <&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>;
 			clock-names = "aclk", "hclk", "vseclk", "dweclk";
 			status = "disabled";
 		};
@@ -1738,10 +1717,10 @@
 		    interrupts = <128>;
 		    dphyglueiftester = <0x180>;
 		    sysreg_mipi_csi_ctrl = <0x140>;
-		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
-		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    clocks = <&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>;
+			clock-names = "pclk", "pixclk", "cfg_clk";
 		    phy_name = "CSI_4LANE";
 		    status = "disabled";
 		};
@@ -1761,10 +1740,10 @@
 		    sysreg_mipi_csi_ctrl = <0x148>;
 		    visys-regmap = <&visys_reg>;
 		    csia-regmap = <&csia_reg>;
-		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
-		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    clocks = <&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>;
+			clock-names = "pclk", "pixclk", "cfg_clk";
 		    phy_name = "CSI_B";
 		    status = "disabled";
 		};
@@ -1776,10 +1755,10 @@
 		    interrupts = <127>;
 		    dphyglueiftester = <0x184>;
 		    sysreg_mipi_csi_ctrl = <0x144>;
-		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
-		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
-		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    clocks = <&dummy_clock_visys>,
+					<&dummy_clock_visys>,
+					<&dummy_clock_visys>;
+			clock-names = "pclk", "pixclk", "cfg_clk";
 		    phy_name = "CSI_A";
 		    status = "disabled";
 		};
@@ -1808,9 +1787,9 @@
 			reg = <0xff 0xe4030000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <134>;
-			clocks = <&visys_clk_gate LIGHT_CLKGEN_VIPRE_ACLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PCLK>,
-				 <&visys_clk_gate LIGHT_CLKGEN_VIPRE_PIXELCLK>;
+			clocks = <&dummy_clock_vipre>,
+					<&dummy_clock_vipre>,
+					<&dummy_clock_vipre>;
 			clock-names ="aclk", "pclk", "pixclk";
 			status = "disabled";
 		};
@@ -2016,11 +1995,6 @@
 			};
 		};

-		pmp: pmp@ffdc020000 {
-			compatible = "pmp";
-			reg = <0xff 0xdc020000 0x0 0x1000>;
-		};
-
 		mrvbr: mrvbr@ffff018050 {
 			compatible = "mrvbr";
 			reg = <0xff 0xff019050 0x0 0x1000>;
@@ -2056,6 +2030,7 @@
 		       clock-names = "ipg";
 		       icu_cpu_id = <0>;
 		       #mbox-cells = <2>;
+		       status = "disabled";
 		};

 		trng: rng@ffff300000 {
--- a/arch/riscv/boot/dts/thead/light-a-product.dts
+++ b/arch/riscv/boot/dts/thead/light-a-product.dts
@@ -535,7 +535,7 @@
               irq-gpios = <&gpio1_porta 8 0>;
               reset-gpios = <&gpio1_porta 7 0>;
               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
               touchscreen-size-y = <1280>;
       };
 };
@@ -552,7 +552,7 @@
                irq-gpios = <&gpio1_porta 12 0>;
                reset-gpios = <&gpio1_porta 11 0>;
                AVDD28-supply = <&reg_tp1_pwr_en>;
-                touchscreen-size-x = <720>;
+                touchscreen-size-x = <800>;
                touchscreen-size-y = <1280>;
        };
 };
@@ -687,6 +687,7 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
@@ -729,7 +730,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
--- a/arch/riscv/boot/dts/thead/light-a-val-android.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-android.dts
@@ -63,7 +63,7 @@
                        sound-dai = <&light_i2s 1>;
                };
                codec {
-                        sound-dai = <&dummy_codec 2>;
+                        sound-dai = <&dummy_codec>;
                };
    };
 };
--- a/arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-audio-hdmi.dts
@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-audio.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc1 {
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&lightsound {
+	status = "okay";
+	
+	simple-audio-card,dai-link@2 {          /* I2S - HDMI */
+		reg = <2>;
+		format = "i2s";
+		cpu {
+			sound-dai = <&light_i2s 1>;
+		};
+		codec {
+			sound-dai = <&dummy_codec>;
+		};
+	};
+};
+
+&light_i2s {
+        status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-audio-i2s-8ch.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-audio-i2s-8ch.dts
@@ -0,0 +1,100 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val-audio.dts"
+
+/ {
+	model = "T-HEAD Light FM Audio VAL board";
+	compatible = "thead,light-val-audio-i2s-8ch", "thead,light";
+};
+
+
+&lightsound {
+        status = "okay";
+
+	simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+
+	simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <2>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd3 3>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+
+        simple-audio-card,dai-link@3 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+                reg = <3>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd0 0>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc1>;
+                };
+        };
+
+        simple-audio-card,dai-link@4 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+                reg = <4>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd1 1>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc1>;
+                };
+        };
+};
+
+&i2s_8ch_sd0 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa4>,
+                    <&pinctrl_audio_i2s_8ch_sd0>,
+                    <&pinctrl_audiopa2>,
+                    <&pinctrl_audiopa3>,
+                    <&pinctrl_audiopa8>,
+                    <&pinctrl_audio_i2s_8ch_bus>;
+};
+
+&i2s_8ch_sd1 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa0>,
+                    <&pinctrl_audio_i2s_8ch_sd2>;
+};
+
+&i2s_8ch_sd3 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+        channels-max = <8>;
+};
+
+&es7210_audio_codec_adc1 {
+        status = "okay";
+        channels-max = <8>;
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-audio-spdif.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-audio-spdif.dts
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+&spdif0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif0>;
+	status = "okay";
+};
+
+&spdif1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif1>;
+	status = "okay";
+};
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,dai-link@0 {          /* SPDIF0 */
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&spdif0>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
+        simple-audio-card,dai-link@1 {          /* SPDIF1 */
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&spdif1>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-audio-tdm.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-audio-tdm.dts
@@ -0,0 +1,182 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "light-a-val.dts"
+
+&tdm_slot1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_tdm>;
+	status = "okay";
+};
+
+&tdm_slot2 {
+	status = "okay";
+};
+
+&tdm_slot3 {
+	status = "okay";
+};
+
+&tdm_slot4 {
+	status = "okay";
+};
+
+&tdm_slot5 {
+	status = "okay";
+};
+
+&tdm_slot6 {
+	status = "okay";
+};
+
+&tdm_slot7 {
+	status = "okay";
+};
+
+&tdm_slot8 {
+	status = "okay";
+};
+
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "okay";
+
+        es7210_adc2: es7210@42 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x42>;
+                work-mode = "ES7210_TDM_1LRCK_DSPB";
+                channels-max = <8>;
+                sound-name-prefix = "ES7210_ADC2";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+
+        es7210_adc3: es7210@43 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_1";
+                reg = <0x43>;
+                work-mode = "ES7210_TDM_1LRCK_DSPB";
+                channels-max = <8>;
+                sound-name-prefix = "ES7210_ADC3";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+};
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"AW87519 IN", "ES8156 ROUT",
+        	"Speaker", "AW87519 VO";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* TDM - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot1>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@2 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot2>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@3 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot3>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@4 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot4>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@5 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot5>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@6 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot6>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@7 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot7>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@8 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot8>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+};
+
+&i2s0 {
+        status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-audio.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-audio.dts
@@ -11,8 +11,12 @@
 };

 &lightsound {
-	status = "okay";
-
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                reg = <0>;
                format = "i2s";
@@ -28,22 +32,24 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                };
        };
 };

-&light_i2s {
-	status = "okay";
-};
-
 &i2s0 {
        status = "okay";
 };

-&i2s3 {
+&i2s_8ch_sd2 {
        status = "okay";
 };
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
+
+
--- a/arch/riscv/boot/dts/thead/light-a-val-ddr1G.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-ddr1G.dts
@@ -11,7 +11,7 @@

 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x40000000>;
+		reg = <0x0 0x200000 0x0 0x3fe00000>;
 	};
 };

--- a/arch/riscv/boot/dts/thead/light-a-val-ddr2G.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-ddr2G.dts
@@ -11,7 +11,7 @@

 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x80000000>;
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
 	};
 };

--- a/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-audio.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-dsi0-hdmi-audio.dts
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-a-val-dsi0-hdmi.dts"
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+        simple-audio-card,dai-link@2 {          /* I2S - HDMI */
+                reg = <2>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&light_i2s 1>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
+};
+
+&light_i2s {
+	status = "okay";
+};
+
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/light-a-val-full.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-full.dts
@@ -95,7 +95,11 @@

 &lightsound {
        status = "okay";
-
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                reg = <0>;
                format = "i2s";
@@ -111,23 +115,27 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                };
        };
 };

 &light_i2s {
-        status = "okay";
+	status = "okay";
 };

 &i2s0 {
        status = "okay";
 };

-&i2s3 {
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+ 
+&es7210_audio_codec_adc0 {
        status = "okay";
 };

--- a/arch/riscv/boot/dts/thead/light-a-val-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-hdmi.dts
@@ -48,7 +48,7 @@
 			sound-dai = <&light_i2s 1>;
 		};
 		codec {
-			sound-dai = <&dummy_codec 2>;
+			sound-dai = <&dummy_codec>;
 		};
 	};
 };
--- a/arch/riscv/boot/dts/thead/light-a-val-miniapp-dsi0.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-miniapp-dsi0.dts
@@ -74,6 +74,26 @@
 	};
 };

+&padctrl_audiosys {
+	status = "okay";
+
+	light-audio-padctrl {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+
+			pinctrl_audio_i2s_8ch: audio_i2s_8ch_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA0	  0x2 0x008
+					FM_AUDIO_IO_PA2	  0x2 0x008
+					FM_AUDIO_IO_PA3   0x2 0x008
+					FM_AUDIO_IO_PA8   0x2 0x008
+				>;
+			};
+	};
+};
+
 &lightsound {
 	status = "okay";

@@ -92,15 +112,14 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                };
        };
 };

-
 &light_i2s {
 	status = "okay";
 };
@@ -109,7 +128,11 @@
        status = "okay";
 };

-&i2s3 {
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
        status = "okay";
 };

--- a/arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-miniapp-hdmi.dts
@@ -56,10 +56,10 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
-                        sound-dai = <&es7210_audio_codec>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
                };
        };
 };
@@ -73,7 +73,11 @@
        status = "okay";
 };

-&i2s3 {
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
        status = "okay";
 };

--- a/arch/riscv/boot/dts/thead/light-a-val-sec.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val-sec.dts
@@ -5,9 +5,13 @@

 /dts-v1/;

-#include "light-a-val-dsi0-hdmi.dts"
+#include "light-a-val-audio-hdmi.dts"


 &light_iopmp {
        status = "disabled";
 };
+&qspi1 {
+        status = "disabled";
+};
+
--- a/arch/riscv/boot/dts/thead/light-a-val.dts
+++ b/arch/riscv/boot/dts/thead/light-a-val.dts
@@ -179,7 +179,8 @@
 		compatible = "thead,light-mbox-client";
 		mbox-names = "906";
 		mboxes = <&mbox_910t 2 0>;
-		status = "disabled";
+		audio-mbox-regmap = <&audio_mbox>;
+		status = "okay";
 	};

 	lightsound: lightsound@1 {
@@ -192,9 +193,24 @@
 		status = "disabled";
 	};

+	light_rpmsg: light_rpmsg {
+		compatible = "light,rpmsg-bus", "simple-bus";
+		memory-region = <&rpmsgmem>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		rpmsg: rpmsg{
+			vdev-nums = <1>;
+            reg = <0x0 0x1E000000 0 0x10000>;
+			compatible = "light,light-rpmsg";
+			status = "okay";
+		};
+	};
+
 	dummy_codec: dummy_codec {
-		#sound-dai-cells = <1>;
-		compatible = "linux,bt-sco";
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
+		sound-name-prefix = "DUMMY";
 		status = "okay";
 	};

@@ -262,6 +278,24 @@
 		enable-active-high;
 	};

+	soc_aud_adc_3v3_en_reg: soc-aud-adc-3v3-en {
+		compatible = "regulator-fixed";
+		regulator-name = "soc_aud_adc_3v3_en";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pcal6408ahk_b 1 1>;
+		enable-active-high;
+	};
+
+	soc_aud_dac_3v3_en_reg: soc-aud-dac-3v3-en {
+		compatible = "regulator-fixed";
+		regulator-name = "soc_aud_dac_3v3_en";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pcal6408ahk_b 2 1>;
+		enable-active-high;
+	};
+
 	wcn_wifi: wireless-wlan {
 		compatible = "wlan-platdata";
 		clock-names = "clk_wifi";
@@ -512,7 +546,14 @@
 		reg = <0x0 0x22000000 0x0 0x10000000>;
 		no-map;
 	};
-
+    audio_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0x6400000>;
+		no-map;
+    };
+	rpmsgmem: memory@1E000000 {
+		reg = <0x0 0x1E000000 0x0 0x10000>;
+		no-map;
+	};
 };

 &adc {
@@ -548,7 +589,7 @@
               irq-gpios = <&gpio1_porta 8 0>;
               reset-gpios = <&gpio1_porta 7 0>;
               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
               touchscreen-size-y = <1280>;
       };
 };
@@ -556,17 +597,74 @@
 &audio_i2c0 {
        clock-frequency = <100000>;
        status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_audiopa6>,
+					<&pinctrl_audiopa7>,
+					<&pinctrl_audio_i2c0>;

-       es8156_audio_codec: es8156@8 {
-               #sound-dai-cells = <0>;
-               compatible = "everest,es8156";
-               reg = <0x08>;
-       };
+        es8156_audio_codec: es8156@8 {
+                #sound-dai-cells = <0>;
+                compatible = "everest,es8156";
+                reg = <0x08>;
+                sound-name-prefix = "ES8156";
+                AVDD-supply = <&soc_aud_dac_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+				mclk-sclk-ratio = <4>;
+        };

-        es7210_audio_codec: es7210@40 {
+        es7210_audio_codec_adc0: es7210@40 {
                #sound-dai-cells = <0>;
                compatible = "MicArray_0";
                reg = <0x40>;
+                status = "disabled";
+                work-mode = "ES7210_NORMAL_I2S";
+                channels-max = <2>;
+                mclk-sclk-ratio = <4>;
+                sound-name-prefix = "ES7210_ADC0";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+
+        es7210_audio_codec_adc1: es7210@41 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_1";
+                reg = <0x41>;
+                status = "disabled";
+                work-mode = "ES7210_NORMAL_I2S";
+                channels-max = <2>;
+                mclk-sclk-ratio = <4>;
+                sound-name-prefix = "ES7210_ADC1";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+
+        audio_aw87519_pa: amp@58 {
+                compatible = "awinic,aw87519_pa";
+                reg = <0x58>;
+                reset-gpio = <&pcal6408ahk_b 3 0x1>;
+                sound-name-prefix = "AW87519";
+                status = "okay";
+        };
+};
+
+&audio_i2c1 {
+        clock-frequency = <100000>;
+        status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_audiopa13>,
+					<&pinctrl_audiopa16>,
+					<&pinctrl_audio_i2c1>;
+
+        pcal6408ahk_b: gpio@20 {
+                compatible = "nxp,pcal9554b";
+                reg = <0x20>;
+                gpio-controller;
+                #gpio-cells = <2>;
        };
 };

@@ -582,7 +680,7 @@
                irq-gpios = <&gpio1_porta 12 0>;
                reset-gpios = <&gpio1_porta 11 0>;
                AVDD28-supply = <&reg_tp1_pwr_en>;
-                touchscreen-size-x = <720>;
+                touchscreen-size-x = <800>;
                touchscreen-size-y = <1280>;
        };
 };
@@ -717,6 +815,7 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
@@ -759,7 +858,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -834,22 +933,151 @@
 			 * Format: <pin_id mux_node config>
 			 */

-			pinctrl_audiopa1: audiopa1_grp {
-				thead,pins = <
-					FM_AUDIO_PA1	0x3	0x72
-				>;
+			pinctrl_audiopa0: audiopa0 {
+				thead,pins = < FM_AUDIO_PA0 LIGHT_PIN_FUNC_0 0x000 >;
 			};
-
-			pinctrl_audiopa2: audiopa2_grp {
-				thead,pins = <
-					FM_AUDIO_PA2	0x0	0x72
-				>;
+			pinctrl_audiopa1: audiopa1 {
+				thead,pins = < FM_AUDIO_PA1 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa2: audiopa2 {
+				thead,pins = < FM_AUDIO_PA2 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa3: audiopa3 {
+				thead,pins = < FM_AUDIO_PA3 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa4: audiopa4 {
+				thead,pins = < FM_AUDIO_PA4 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa5: audiopa5 {
+				thead,pins = < FM_AUDIO_PA5 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa6: audiopa6 {
+				thead,pins = < FM_AUDIO_PA6 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa7: audiopa7 {
+				thead,pins = < FM_AUDIO_PA7 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa8: audiopa8 {
+				thead,pins = < FM_AUDIO_PA8 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa9: audiopa9 {
+				thead,pins = < FM_AUDIO_PA9 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa10: audiopa10 {
+				thead,pins = < FM_AUDIO_PA10 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa11: audiopa11 {
+				thead,pins = < FM_AUDIO_PA11 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa12: audiopa12 {
+				thead,pins = < FM_AUDIO_PA12 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa13: audiopa13 {
+				thead,pins = < FM_AUDIO_PA13 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa14: audiopa14 {
+				thead,pins = < FM_AUDIO_PA14 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa15: audiopa15 {
+				thead,pins = < FM_AUDIO_PA15 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa16: audiopa16 {
+				thead,pins = < FM_AUDIO_PA16 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa17: audiopa17 {
+				thead,pins = < FM_AUDIO_PA17 LIGHT_PIN_FUNC_0 0x000 >;
 			};

 			pinctrl_volume: volume_grp {
 				thead,pins = <
-					FM_CPU_JTG_TDI  0x3     0x208
-					FM_CPU_JTG_TDO  0x3     0x208
+					FM_CPU_JTG_TDI  0x3     0x238
+					FM_CPU_JTG_TDO  0x3     0x238
+				>;
+			};
+	};
+};
+
+&padctrl_audiosys {
+
+	status = "okay";
+
+	light-audio-padctrl {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+
+			pinctrl_audio_i2c0: audio_i2c0_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA6		LIGHT_PIN_FUNC_0 0x004
+					FM_AUDIO_IO_PA7		LIGHT_PIN_FUNC_0 0x004
+				>;
+			};
+			pinctrl_audio_i2c1: audio_i2c1_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA13	LIGHT_PIN_FUNC_1 0x004
+					FM_AUDIO_IO_PA16	LIGHT_PIN_FUNC_3 0x004
+				>;
+			};
+			pinctrl_audio_i2s0: audio_i2s0_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA9	  LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA10   LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA11   LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA12   LIGHT_PIN_FUNC_0 0x008
+				>;
+			};
+			pinctrl_audio_i2s1: audio_i2s1_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA14   LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA15   LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA17   LIGHT_PIN_FUNC_0 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_bus: audio_i2s_8ch_bus_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA2	  LIGHT_PIN_FUNC_3 0x008
+					FM_AUDIO_IO_PA3   LIGHT_PIN_FUNC_3 0x008
+					FM_AUDIO_IO_PA8   LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_sd0: audio_i2s_8ch_sd0_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA4	  LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_sd1: audio_i2s_8ch_sd1_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA5   LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_sd2: audio_i2s_8ch_sd2_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA0	  LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_sd3: audio_i2s_8ch_sd3_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA1   LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+			pinctrl_audio_tdm: audio_tdm_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA27   LIGHT_PIN_FUNC_1 0x007
+					FM_AUDIO_IO_PA28   LIGHT_PIN_FUNC_1 0x007
+					FM_AUDIO_IO_PA29   LIGHT_PIN_FUNC_1 0x000
+				>;
+			};
+			pinctrl_audio_spdif0: audio_spdif0_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA21   LIGHT_PIN_FUNC_1 0x000
+					FM_AUDIO_IO_PA22   LIGHT_PIN_FUNC_1 0x007
+				>;
+			};
+			pinctrl_audio_spdif1: audio_spdif1_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA23   LIGHT_PIN_FUNC_1 0x007
+					FM_AUDIO_IO_PA24   LIGHT_PIN_FUNC_1 0x000
 				>;
 			};
 	};
@@ -989,6 +1217,24 @@
 	status = "disabled";
 };

+
+&vvcam_sensor1 {
+	sensor_name = "OV5693";
+	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
+	sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
+	sensor_regulator_timing_us = <70 50 20>;
+	sensor_rst = <&gpio1_porta 16 0>;
+	sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
+	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
+	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
+	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
+    i2c_reg_width = /bits/ 8 <2>;
+    i2c_data_width = /bits/ 8 <1>;
+    i2c_addr = /bits/ 8 <0x36>;
+	i2c_bus = /bits/ 8 <3>;
+	status = "okay";
+};
+
 &vvcam_sensor2 {
 	sensor_name = "GC5035";
 	sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
@@ -1017,6 +1263,9 @@
 	DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
 	AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
 	i2c_bus = /bits/ 8 <4>;
+    i2c_reg_width = /bits/ 8 <2>;
+    i2c_data_width = /bits/ 8 <1>;
+    i2c_addr = /bits/ 8 <0x30>;
 	status = "okay";
 };

@@ -1070,6 +1319,22 @@
 	status = "okay";
 };

+&vvcam_sensor7 {
+    sensor_name = "IMX334";
+    sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
+    sensor_regulator_timing_us = <70 50 20>;
+    sensor_rst = <&gpio1_porta 16 0>;
+    sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
+    DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
+    DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
+    AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
+	i2c_reg_width = /bits/ 8 <2>;
+    i2c_data_width = /bits/ 8 <1>;
+    i2c_addr = /bits/ 8 <0x1a>;
+    i2c_bus = /bits/ 8 <3>;
+    status = "okay";
+};
+
 &video0{
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
@@ -1276,13 +1541,20 @@
 			mode_idx = <0>;
 			path_type = "SENSOR_1600x1200_RAW10_LINER";
 		};
+		sensor2 {
+			subdev_name = "vivcam";
+			idx = <7>; //imx334
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_3840x2180_RAW12_LINER";
+		};
 		isp {
 			subdev_name = "isp";
 			idx = <1>;
 			path_type = "ISP_MI_PATH_MP";
 			output {
-				max_width = <1920>;
-				max_height = <1088>;
+				max_width = <3840>;
+				max_height = <2180>;
 				bit_per_pixel = <16>;
 				frame_count = <3>;
 			};
@@ -2135,6 +2407,44 @@
 	status = "okay";
 };

+&i2s0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa9>,
+                    <&pinctrl_audiopa10>,
+                    <&pinctrl_audiopa11>,
+                    <&pinctrl_audiopa12>,
+                    <&pinctrl_audio_i2s0>;
+};
+
+&i2s_8ch_sd0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa4>,
+                    <&pinctrl_audio_i2s_8ch_sd0>;
+};
+
+&i2s_8ch_sd1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa5>,
+                    <&pinctrl_audio_i2s_8ch_sd1>;
+};
+
+&i2s_8ch_sd2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa0>,
+                    <&pinctrl_audio_i2s_8ch_sd2>,
+                    <&pinctrl_audiopa2>,
+                    <&pinctrl_audiopa3>,
+                    <&pinctrl_audiopa8>,
+                    <&pinctrl_audio_i2s_8ch_bus>;
+};
+
+&i2s_8ch_sd3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa1>,
+                    <&pinctrl_audio_i2s_8ch_sd3>;
+};
+
+
 &cpus {
 	c910_0: cpu@0 {
 		operating-points = <
--- a/arch/riscv/boot/dts/thead/light-ant-discrete.dts
+++ b/arch/riscv/boot/dts/thead/light-ant-discrete.dts
@@ -15,7 +15,7 @@

 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x80000000>;
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
 	};

 	chosen {
@@ -194,9 +194,10 @@
 	};

 	dummy_codec: dummy_codec {
-		#sound-dai-cells = <1>;
-		compatible = "linux,bt-sco";
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
 		status = "okay";
+		sound-name-prefix = "DUMMY";
 	};

 	reg_vref_1v8: regulator-adc-verf {
@@ -571,7 +572,7 @@
               irq-gpios = <&gpio1_porta 8 0>;
               reset-gpios = <&gpio1_porta 7 0>;
               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
               touchscreen-size-y = <1280>;
       };

@@ -581,24 +582,31 @@
        clock-frequency = <100000>;
        status = "okay";

-       es8156_audio_codec: es8156@8 {
-               #sound-dai-cells = <0>;
-               compatible = "everest,es8156";
-               reg = <0x08>;
-       };
+        es8156_audio_codec: es8156@8 {
+                #sound-dai-cells = <0>;
+                compatible = "everest,es8156";
+                reg = <0x08>;
+                sound-name-prefix = "ES8156";
+                AVDD-supply = <&soc_aud_3v3_en_reg>;
+                DVDD-supply = <&soc_aud_1v8_en_reg>;
+                PVDD-supply = <&soc_aud_1v8_en_reg>;
+        };

        es7210_audio_codec: es7210@40 {
                #sound-dai-cells = <0>;
                compatible = "MicArray_0";
                reg = <0x40>;
+                sound-name-prefix = "ES7210";
+                status = "disabled";
        };

-	audio_aw87519_pa@58 {
-		compatible = "awinic,aw87519_pa";
-		reg = <0x58>;
-		reset-gpio = <&ao_gpio4_porta 9 0x1>;
-		status = "okay";
-	};
+        audio_aw87519_pa: amp@58 {
+                compatible = "awinic,aw87519_pa";
+                reg = <0x58>;
+                reset-gpio = <&ao_gpio4_porta 9 0x1>;
+                sound-name-prefix = "AW87519";
+                status = "okay";
+        };
 };

 &i2c1 {
@@ -731,6 +739,7 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
@@ -773,7 +782,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -2091,6 +2100,11 @@

 &lightsound {
        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                reg = <0>;
                format = "i2s";
@@ -2105,7 +2119,7 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
                        sound-dai = <&es7210_audio_codec>;
@@ -2118,7 +2132,7 @@
                        sound-dai = <&light_i2s 1>;
                };
                codec {
-                        sound-dai = <&dummy_codec 2>;
+                        sound-dai = <&dummy_codec>;
                };
        };
 };
@@ -2135,7 +2149,7 @@
        status = "okay";
 };

-&i2s3 {
+&i2s_8ch_sd2 {
        status = "okay";
 };

--- a/arch/riscv/boot/dts/thead/light-ant-ref.dts
+++ b/arch/riscv/boot/dts/thead/light-ant-ref.dts
@@ -15,7 +15,7 @@

 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x80000000>;
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
 	};

 	chosen {
@@ -194,9 +194,10 @@
 	};

 	dummy_codec: dummy_codec {
-		#sound-dai-cells = <1>;
-		compatible = "linux,bt-sco";
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
 		status = "okay";
+		sound-name-prefix = "DUMMY";
 	};

 	reg_vref_1v8: regulator-adc-verf {
@@ -238,7 +239,8 @@

 	gpio-keys {
 		compatible = "gpio-keys";
-		pinctrl-0 = <&pinctrl_volume>;
+		pinctrl-0 = <&pinctrl_volume_up
+				&pinctrl_volume_down>;
 		pinctrl-names = "default";
 		key-volumedown {
 			label = "Volume Down Key";
@@ -578,7 +580,7 @@
               irq-gpios = <&gpio1_porta 8 0>;
               reset-gpios = <&gpio1_porta 7 0>;
               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
               touchscreen-size-y = <1280>;
       };

@@ -588,24 +590,31 @@
        clock-frequency = <100000>;
        status = "okay";

-       es8156_audio_codec: es8156@8 {
-               #sound-dai-cells = <0>;
-               compatible = "everest,es8156";
-               reg = <0x08>;
-       };
+        es8156_audio_codec: es8156@8 {
+                #sound-dai-cells = <0>;
+                compatible = "everest,es8156";
+                reg = <0x08>;
+                sound-name-prefix = "ES8156";
+                AVDD-supply = <&soc_aud_3v3_en_reg>;
+                DVDD-supply = <&soc_aud_1v8_en_reg>;
+                PVDD-supply = <&soc_aud_1v8_en_reg>;
+        };

        es7210_audio_codec: es7210@40 {
                #sound-dai-cells = <0>;
                compatible = "MicArray_0";
                reg = <0x40>;
+                sound-name-prefix = "ES7210";
+                status = "disabled";
        };

-	audio_aw87519_pa@58 {
-		compatible = "awinic,aw87519_pa";
-		reg = <0x58>;
-		reset-gpio = <&ao_gpio4_porta 9 0x1>;
-		status = "okay";
-	};
+        audio_aw87519_pa: amp@58 {
+                compatible = "awinic,aw87519_pa";
+                reg = <0x58>;
+                reset-gpio = <&ao_gpio4_porta 9 0x1>;
+                sound-name-prefix = "AW87519";
+                status = "okay";
+        };
 };

 &i2c1 {
@@ -738,6 +747,7 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
@@ -780,7 +790,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -797,6 +807,12 @@
 					FM_GPIO3_2	0x1	0x208	/* pwm0 */
 				>;
 			};
+
+			pinctrl_volume_up: volume_up_grp {
+				thead,pins = <
+					FM_GPIO2_25   0x0     0x238
+				>;
+			};
 		};
 };

@@ -842,9 +858,9 @@
 				>;
 			};

-			pinctrl_volume: volume_grp {
+			pinctrl_volume_down: volume_down_grp {
 				thead,pins = <
-					FM_CLK_OUT_2  0x3     0x208
+					FM_CLK_OUT_2  0x3     0x238
 				>;
 			};
 		};
@@ -2048,18 +2064,11 @@
 			path_type = "SENSOR_1920X1088_30FPS_RAW12_LINER";
 			skip_init = <1>;
 		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <6>; //gc02m1b
-			csi_idx = <1>; //<1>=CSI2_B
-			mode_idx = <0>;
-			path_type = "SENSOR_1600x1200_RAW10_LINER";
-			skip_init = <1>;
+		dma {
+				path_type = "VIPRE_CSI1_ISP0";
 		};
 	};
-    dma {
-			path_type = "VIPRE_CSI1_ISP0";
-    };
+
 };

 &video13{
@@ -2272,6 +2281,11 @@

 &lightsound {
        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                reg = <0>;
                format = "i2s";
@@ -2286,7 +2300,7 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
                        sound-dai = <&es7210_audio_codec>;
@@ -2299,7 +2313,7 @@
                        sound-dai = <&light_i2s 1>;
                };
                codec {
-                        sound-dai = <&dummy_codec 2>;
+                        sound-dai = <&dummy_codec>;
                };
        };
 };
@@ -2316,7 +2330,7 @@
        status = "okay";
 };

-&i2s3 {
+&i2s_8ch_sd2 {
        status = "okay";
 };

--- a/arch/riscv/boot/dts/thead/light-b-audio-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-b-audio-hdmi.dts
--- a/arch/riscv/boot/dts/thead/light-b-product-ddr1G.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product-ddr1G.dts
@@ -11,7 +11,7 @@

 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x40000000>;
+		reg = <0x0 0x200000 0x0 0x3fe00000>;
 	};
 };

--- a/arch/riscv/boot/dts/thead/light-b-product-sec.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product-sec.dts
@@ -5,7 +5,7 @@

 /dts-v1/;

-#include "light-b-product.dts"
+#include "light-b-audio-hdmi.dts"



--- a/arch/riscv/boot/dts/thead/light-b-product.dts
+++ b/arch/riscv/boot/dts/thead/light-b-product.dts
@@ -15,7 +15,7 @@

 	memory@0 {
 		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x80000000>;
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
 	};

 	chosen {
@@ -180,7 +180,8 @@
 		compatible = "thead,light-mbox-client";
 		mbox-names = "906";
 		mboxes = <&mbox_910t 2 0>;
-		status = "disabled";
+		audio-mbox-regmap = <&audio_mbox>;
+        status = "okay";
 	};

 	lightsound: lightsound@1 {
@@ -193,10 +194,25 @@
 		status = "disabled";
 	};

+	light_rpmsg: light_rpmsg {
+		compatible = "light,rpmsg-bus", "simple-bus";
+		memory-region = <&rpmsgmem>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		rpmsg: rpmsg{
+			vdev-nums = <1>;
+            reg = <0x0 0x1E000000 0 0x10000>;
+			compatible = "light,light-rpmsg";
+			status = "okay";
+		};
+	};
+
 	dummy_codec: dummy_codec {
-		#sound-dai-cells = <1>;
-		compatible = "linux,bt-sco";
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
 		status = "okay";
+		sound-name-prefix = "DUMMY";
 	};

 	reg_vref_1v8: regulator-adc-verf {
@@ -270,6 +286,8 @@
 			regulator-name = "soc_aud_3v3_en";
 			regulator-min-microvolt = <3300000>;
 			regulator-max-microvolt = <3300000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_audio_3v3_en>;
 			gpio = <&ao_gpio_porta 7 1>;
 			enable-active-high;
 			regulator-always-on;
@@ -280,6 +298,8 @@
 			regulator-name = "soc_aud_1v8_en";
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_audio_1v8_en>;
 			gpio = <&ao_gpio_porta 8 1>;
 			enable-active-high;
 			regulator-always-on;
@@ -569,7 +589,14 @@
 		reg = <0x0 0x17000000 0 0x02000000>;
 		no-map;
 	};
-
+	audio_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0x6400000>;
+		no-map;
+    };
+	rpmsgmem: memory@1E000000 {
+		reg = <0x0 0x1E000000 0x0 0x10000>;
+		no-map;
+	};

 };

@@ -591,7 +618,7 @@
               irq-gpios = <&gpio1_porta 8 0>;
               reset-gpios = <&gpio1_porta 7 0>;
               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
               touchscreen-size-y = <1280>;
       };

@@ -600,23 +627,43 @@
 &audio_i2c0 {
        clock-frequency = <100000>;
        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa6>,
+                    <&pinctrl_audiopa7>,
+                    <&pinctrl_audio_i2c0>;

-       es8156_audio_codec: es8156@8 {
-               #sound-dai-cells = <0>;
-               compatible = "everest,es8156";
-               reg = <0x08>;
-       };
+        es8156_audio_codec: es8156@8 {
+                #sound-dai-cells = <0>;
+                compatible = "everest,es8156";
+                reg = <0x08>;
+                sound-name-prefix = "ES8156";
+                AVDD-supply = <&soc_aud_3v3_en_reg>;
+                DVDD-supply = <&soc_aud_1v8_en_reg>;
+                PVDD-supply = <&soc_aud_1v8_en_reg>;
+                mclk-sclk-ratio = <4>;
+        };

        es7210_audio_codec: es7210@40 {
                #sound-dai-cells = <0>;
                compatible = "MicArray_0";
                reg = <0x40>;
+                work-mode = "ES7210_NORMAL_I2S";
+                channels-max = <2>;
+				mclk-sclk-ratio = <4>;
+                sound-name-prefix = "ES7210_ADC0";
+                MVDD-supply = <&soc_aud_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_3v3_en_reg>;
+                DVDD-supply = <&soc_aud_1v8_en_reg>;
+                PVDD-supply = <&soc_aud_1v8_en_reg>;
        };

-	audio_aw87519_pa@58 {
+	audio_aw87519_pa: amp@58 {
 		compatible = "awinic,aw87519_pa";
 		reg = <0x58>;
+		pingctrl-names = "default";
+		pinctrl-0 = <&pinctrl_audio_pa_rst0>;
 		reset-gpio = <&ao_gpio4_porta 9 0x1>;
+		sound-name-prefix = "AW87519";
 		status = "okay";
 	};
 };
@@ -750,6 +797,7 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
@@ -792,7 +840,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -866,27 +914,103 @@
 			 * Format: <pin_id mux_node config>
 			 */

-			pinctrl_audiopa1: audiopa1_grp {
-				thead,pins = <
-					FM_AUDIO_PA1	0x3	0x72
-				>;
+			pinctrl_audiopa0: audiopa0 {
+				thead,pins = < FM_AUDIO_PA0 LIGHT_PIN_FUNC_0 0x000 >;
 			};
-
-			pinctrl_audiopa2: audiopa2_grp {
-				thead,pins = <
-					FM_AUDIO_PA2	0x0	0x72
-				>;
+			pinctrl_audiopa1: audiopa1 {
+				thead,pins = < FM_AUDIO_PA1 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa2: audiopa2 {
+				thead,pins = < FM_AUDIO_PA2 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa3: audiopa3 {
+				thead,pins = < FM_AUDIO_PA3 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa6: audiopa6 {
+				thead,pins = < FM_AUDIO_PA6 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa7: audiopa7 {
+				thead,pins = < FM_AUDIO_PA7 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa8: audiopa8 {
+				thead,pins = < FM_AUDIO_PA8 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audio_pa_rst0: audio_pa_rst0 {
+				thead,pins = < FM_AUDIO_PA9 LIGHT_PIN_FUNC_3 0x000 >;
+			};
+			pinctrl_audiopa13: audiopa13 {
+				thead,pins = < FM_AUDIO_PA13 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa14: audiopa14 {
+				thead,pins = < FM_AUDIO_PA14 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa15: audiopa15 {
+				thead,pins = < FM_AUDIO_PA15 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audiopa17: audiopa17 {
+				thead,pins = < FM_AUDIO_PA17 LIGHT_PIN_FUNC_0 0x000 >;
+			};
+			pinctrl_audio_3v3_en: audio_3v3_en {
+				thead,pins = < FM_AOGPIO_7 LIGHT_PIN_FUNC_3 0x008 >;
+			};
+			pinctrl_audio_1v8_en: audio_1v8_en {
+				thead,pins = < FM_AOGPIO_8 LIGHT_PIN_FUNC_3 0x008 >;
 			};

 			pinctrl_volume: volume_grp {
 				thead,pins = <
-					FM_AOGPIO_11  0x0     0x208
-					FM_AOGPIO_10  0x3     0x208
+					FM_AOGPIO_11  0x0     0x238
+					FM_AOGPIO_10  0x3     0x238
 				>;
 			};
 	};
 };

+&padctrl_audiosys {
+
+	status = "okay";
+
+	light-audio-padctrl {
+			/*
+			 * Pin Configuration Node:
+			 * Format: <pin_id mux_node config>
+			 */
+
+			pinctrl_audio_i2c0: audio_i2c0_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA6		LIGHT_PIN_FUNC_0 0x004
+					FM_AUDIO_IO_PA7		LIGHT_PIN_FUNC_0 0x004
+				>;
+			};
+			pinctrl_audio_i2s1: audio_i2s1_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA13   LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA14   LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA15   LIGHT_PIN_FUNC_0 0x008
+					FM_AUDIO_IO_PA17   LIGHT_PIN_FUNC_0 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_bus: audio_i2s_8ch_bus_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA2	  LIGHT_PIN_FUNC_3 0x008
+					FM_AUDIO_IO_PA3   LIGHT_PIN_FUNC_3 0x008
+					FM_AUDIO_IO_PA8   LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_sd2: audio_i2s_8ch_sd2_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA0	  LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+			pinctrl_audio_i2s_8ch_sd3: audio_i2s_8ch_sd3_grp {
+				thead,pins = <
+					FM_AUDIO_IO_PA1   LIGHT_PIN_FUNC_3 0x008
+				>;
+			};
+	};
+};
+
+
 &i2c0 {
 	clock-frequency = <400000>;
 	status = "okay";
@@ -1000,30 +1124,21 @@
 	status = "okay";
 };

-/*
-&vvcam_sensor0 {
-	sensor_name = "IMX334";
-	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
-	sensor_regulator_timing_us = <70 50 20>;
-	sensor_rst = <&gpio1_porta 16 0>;
-	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
-	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
-	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
+&vvcam_sensor1 {
+       sensor_name = "OV5693";
+       sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
+       sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
+       sensor_regulator_timing_us = <70 50 20>;
+       sensor_rst = <&gpio1_porta 16 0>;
+       sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
+       DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
+       DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
+       AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
    i2c_reg_width = /bits/ 8 <2>;
    i2c_data_width = /bits/ 8 <1>;
-    i2c_addr = /bits/ 8 <0x1a>;
-	i2c_bus = /bits/ 8 <3>;
-	status = "okay";
-};
-*/
-
-&vvcam_sensor1 {
-	sensor_name = "OV5693";
-	i2c_bus = /bits/ 8 <3>;
-	i2c_reg_width = /bits/ 8 <1>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "disabled";
+    i2c_addr = /bits/ 8 <0x36>;
+       i2c_bus = /bits/ 8 <3>;
+       status = "okay";
 };

 &vvcam_sensor2 {
@@ -1054,6 +1169,9 @@
 	DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
 	AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
 	i2c_bus = /bits/ 8 <4>;
+    i2c_reg_width = /bits/ 8 <2>;
+    i2c_data_width = /bits/ 8 <1>;
+    i2c_addr = /bits/ 8 <0x30>;
 	status = "okay";
 };

@@ -1105,6 +1223,22 @@
 	status = "okay";
 };

+&vvcam_sensor7 {
+    sensor_name = "IMX334";
+    sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
+    sensor_regulator_timing_us = <70 50 20>;
+    sensor_rst = <&gpio1_porta 16 0>;
+    sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
+    DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
+    DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
+    AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
+	i2c_reg_width = /bits/ 8 <2>;
+    i2c_data_width = /bits/ 8 <1>;
+    i2c_addr = /bits/ 8 <0x1a>;
+    i2c_bus = /bits/ 8 <3>;
+    status = "okay";
+};
+
 &video0{
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
@@ -1311,13 +1445,20 @@
 			mode_idx = <0>;
 			path_type = "SENSOR_1600x1200_RAW10_LINER";
 		};
+		sensor2 {
+			subdev_name = "vivcam";
+			idx = <7>; //imx334
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_3840x2180_RAW12_LINER";
+		};
 		isp {
 			subdev_name = "isp";
 			idx = <1>;
 			path_type = "ISP_MI_PATH_MP";
 			output {
-				max_width = <1920>;
-				max_height = <1088>;
+				max_width = <3840>;
+				max_height = <2180>;
 				bit_per_pixel = <16>;
 				frame_count = <3>;
 			};
@@ -2310,6 +2451,11 @@

 &lightsound {
        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                reg = <0>;
                format = "i2s";
@@ -2324,7 +2470,7 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
                        sound-dai = <&es7210_audio_codec>;
@@ -2337,7 +2483,7 @@
                        sound-dai = <&light_i2s 1>;
                };
                codec {
-                        sound-dai = <&dummy_codec 2>;
+                        sound-dai = <&dummy_codec>;
                };
        };
 };
@@ -2352,10 +2498,29 @@

 &i2s1 {
        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa13>,
+                    <&pinctrl_audiopa14>,
+                    <&pinctrl_audiopa15>,
+                    <&pinctrl_audiopa17>,
+                    <&pinctrl_audio_i2s1>;
 };

-&i2s3 {
+&i2s_8ch_sd2 {
        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa0>,
+                    <&pinctrl_audio_i2s_8ch_sd2>,
+                    <&pinctrl_audiopa2>,
+                    <&pinctrl_audiopa3>,
+                    <&pinctrl_audiopa8>,
+                    <&pinctrl_audio_i2s_8ch_bus>;
+};
+
+&i2s_8ch_sd3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa1>,
+                    <&pinctrl_audio_i2s_8ch_sd3>;
 };

 &cpus {
--- a/arch/riscv/boot/dts/thead/light-beagle-bone-buses.dtsi
+++ b/arch/riscv/boot/dts/thead/light-beagle-bone-buses.dtsi
--- a/arch/riscv/boot/dts/thead/light-beagle-ref.dts
+++ b/arch/riscv/boot/dts/thead/light-beagle-ref.dts
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
 * Copyright (C) 2021 Alibaba Group Holding Limited.
+ * Copyright (C) 2022 BeagleBoard.org - https://beagleboard.org/
+ * Copyright (C) 2022 Deepak Khatri <lorforlinux@beagleboard.org>
 */

 /dts-v1/;
@@ -10,13 +12,8 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "light-vi-devices.dtsi"
 / {
-	model = "T-HEAD Light val board";
-	compatible = "thead,light-val", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x00000000 0x0 0x80000000>;
-	};
+	model = "BeagleBoard.org BeagleV-Ahead";
+	compatible = "beagle,light", "thead,light-val", "thead,light";

 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
@@ -25,11 +22,42 @@

 	leds {
 		compatible = "gpio-leds";
-		status = "disabled";
-		led0 {
-			label = "SYS_STATUS";
-			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
-			default-state = "off";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins_default>;
+
+		led-0 {
+			label = "beaglebone:green:usr0";
+			gpios = <&ao_gpio4_porta 8 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			//function = LED_FUNCTION_HEARTBEAT;
+		};
+
+		led-1 {
+			label = "beaglebone:green:usr1";
+			gpios = <&ao_gpio4_porta 9 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "mmc0";
+			//function = LED_FUNCTION_DISK_ACTIVITY;
+		};
+
+		led-2 {
+			label = "beaglebone:green:usr2";
+			gpios = <&ao_gpio4_porta 10 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "cpu";
+			//function = LED_FUNCTION_CPU;
+		};
+
+		led-3 {
+			label = "beaglebone:green:usr3";
+			gpios = <&ao_gpio4_porta 11 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "mmc1";
+			//function = LED_FUNCTION_DISK_ACTIVITY;
+		};
+
+		led-4 {
+			label = "beaglebone:green:usr4";
+			gpios = <&ao_gpio4_porta 12 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "netdev";
+			//function = LED_FUNCTION_WLAN;
 		};
 	};

@@ -204,56 +232,9 @@
 			regulator-name = "vref-1v8";
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;
-	status = "okay";
-	};
-
-        reg_tp_pwr_en: regulator-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "PWR_EN";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpio1_porta 12 1>;
-                enable-active-high;
-                regulator-always-on;
-        };
-
-	wcn_wifi: wireless-wlan {
-		compatible = "wlan-platdata";
-		clock-names = "clk_wifi";
-		ref-clock-frequency = <24000000>;
-		keep_wifi_power_on;
-		pinctrl-names = "default";
-		wifi_chip_type = "rtl8723ds";
-		WIFI,poweren_gpio = <&gpio2_porta 29 0>;
-		WIFI,reset_n = <&gpio2_porta 22 0>;
 		status = "okay";
 	};

-	wcn_bt: wireless-bluetooth {
-		compatible = "bluetooth-platdata";
-		pinctrl-names = "default", "rts_gpio";
-		BT,power_gpio    = <&gpio2_porta 29 0>;
-		status = "okay";
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-		pinctrl-0 = <&pinctrl_volume>;
-		pinctrl-names = "default";
-		key-volumedown {
-			label = "Volume Down Key";
-			linux,code = <KEY_VOLUMEDOWN>;
-			debounce-interval = <1>;
-			gpios = <&gpio1_porta 19 0x1>;
-		};
-		key-volumeup {
-			label = "Volume Up Key";
-			linux,code = <KEY_VOLUMEUP>;
-			debounce-interval = <1>;
-			gpios = <&gpio2_porta 25 0x1>;
-		};
-	};
-
 	aon: aon {
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
@@ -285,119 +266,6 @@
 			regulator-always-on;
 		};

-		soc_vdd_3v3_en_reg: soc_vdd_3v3_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_vdd_3v3_en";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&gpio0_porta 30 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-		soc_lcd0_bias_en_reg: soc_lcd0_bias_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_lcd0_bias_en";
-			regulator-min-microvolt = <5700000>;
-			regulator-max-microvolt = <5700000>;
-			gpio = <&gpio1_porta 10 1>;
-			enable-active-high;
-		};
-
-		soc_vdd18_lcd0_en_reg: soc_lcd0_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_lcd0_en";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-			gpio = <&gpio1_porta 9 1>;
-			enable-active-high;
-		};
-
-		soc_vdd5v_se_en_reg: soc_vdd5v_se_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_vdd5v_se_en";
-			regulator-min-microvolt = <5000000>;
-			regulator-max-microvolt = <5000000>;
-			gpio = <&gpio2_porta 14 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-		soc_wcn33_en_reg: soc_wcn33_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_wcn33_en";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&gpio2_porta 29 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-		soc_vbus_en_reg: soc_vbus_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_vbus_en";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&gpio2_porta 28 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-
-        	soc_avdd28_rgb_reg: soc_avdd28_rgb {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_avdd28_rgb";
-			regulator-min-microvolt = <2800000>;
-			regulator-max-microvolt = <2800000>;
-			gpio = <&gpio1_porta 15 1>;
-			enable-active-high;
-		};
-
-        	soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dovdd18_rgb";
-			regulator-min-microvolt = <2800000>;
-			regulator-max-microvolt = <2800000>;
-			gpio = <&gpio1_porta 13 1>;
-			enable-active-high;
-		};
-
-        	soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dvdd12_rgb";
-			regulator-min-microvolt = <2800000>;
-			regulator-max-microvolt = <2800000>;
-			gpio = <&gpio1_porta 14 1>;
-			enable-active-high;
-		};
-
-        	soc_avdd25_ir_reg: soc_avdd25_ir {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_avdd25_ir";
-			regulator-min-microvolt = <2500000>;
-			regulator-max-microvolt = <2500000>;
-			gpio = <&gpio0_porta 28 1>;
-			enable-active-high;
-		};
-
-        	soc_dovdd18_ir_reg: soc_dovdd18_ir {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dovdd18_ir";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-			gpio = <&gpio1_porta 13 1>;
-			enable-active-high;
-		};
-
-        	soc_dvdd12_ir_reg: soc_dvdd12_ir {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dvdd12_ir";
-			regulator-min-microvolt = <1200000>;
-			regulator-max-microvolt = <1200000>;
-			gpio = <&gpio0_porta 29 1>;
-			enable-active-high;
-		};
-
 		aon_reg_dialog: light-dialog-reg {
 			compatible = "thead,light-dialog-pmic-ant";
 			status = "okay";
@@ -569,24 +437,34 @@
        clock-frequency = <100000>;
        status = "okay";

-       es8156_audio_codec: es8156@8 {
-               #sound-dai-cells = <0>;
-               compatible = "everest,es8156";
-               reg = <0x08>;
-       };
+        es8156_audio_codec: es8156@8 {
+                #sound-dai-cells = <0>;
+                compatible = "everest,es8156";
+                reg = <0x08>;
+                sound-name-prefix = "ES8156";
+                AVDD-supply = <&soc_aud_3v3_en_reg>;
+                DVDD-supply = <&soc_aud_1v8_en_reg>;
+                PVDD-supply = <&soc_aud_1v8_en_reg>;
+        };

        es7210_audio_codec: es7210@40 {
                #sound-dai-cells = <0>;
                compatible = "MicArray_0";
                reg = <0x40>;
+                sound-name-prefix = "ES7210";
+                MVDD-supply = <&soc_aud_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_3v3_en_reg>;
+                DVDD-supply = <&soc_aud_1v8_en_reg>;
+                PVDD-supply = <&soc_aud_1v8_en_reg>;
        };

-	audio_aw87519_pa@58 {
-		compatible = "awinic,aw87519_pa";
-		reg = <0x58>;
-		reset-gpio = <&ao_gpio4_porta 9 0x1>;
-		status = "okay";
-	};
+        audio_aw87519_pa: amp@58 {
+                compatible = "awinic,aw87519_pa";
+                reg = <0x58>;
+                reset-gpio = <&ao_gpio4_porta 9 0x1>;
+                sound-name-prefix = "AW87519";
+                status = "okay";
+        };
 };

 &i2c1 {
@@ -609,10 +487,11 @@
 		w25q,fast-read;
 	};

-	spidev@1 {
-		compatible = "spidev";
+	channel@1 {
+		compatible = "rohm,dh2228fv";
+		//symlink = "bone/spi/0.1";
 		#address-cells = <0x1>;
-		#size-cells = <0x1>;
+		#size-cells = <0x0>;
 		reg = <0x1>;
 		spi-max-frequency = <50000000>;
 	};
@@ -648,10 +527,11 @@
 	compatible = "snps,dw-apb-ssi";
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
-	status = "okay";
+	status = "disabled";

-	spidev@0 {
-		compatible = "spidev";
+	channel@0 {
+		compatible = "rohm,dh2228fv";
+		//symlink = "bone/spi/1.1";
 		#address-cells = <0x1>;
 		#size-cells = <0x1>;
 		reg = <0x0>;
@@ -719,6 +599,7 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
@@ -728,7 +609,7 @@
 };

 &padctrl0_apsys { /* right-pinctrl */
-	light-evb-padctrl0 {
+	light_padctrl0: light-evb-padctrl0 {
 			/*
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
@@ -761,7 +642,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -777,12 +658,20 @@
 				thead,pins = <
 					FM_GPIO3_2	0x1	0x208	/* pwm0 */
 				>;
-			};
 		};
+
+		pinctrl_bt: btgrp {
+			thead,pins = <
+				FM_SDIO1_WPRTN  0x3	0x72
+				FM_SDIO1_DETN   0x3	0x72
+				FM_GPIO2_30     0x0	0x72
+			>;
+		};
+	};
 };

 &padctrl1_apsys { /* left-pinctrl */
-	light-evb-padctrl1 {
+	light_padctrl1: light-evb-padctrl1 {
 			/*
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
@@ -821,18 +710,24 @@
 					FM_QSPI1_D2_WP		0x1	0x238
 					FM_QSPI1_D3_HOLD	0x1	0x238
 				>;
-			};
-
-			pinctrl_volume: volume_grp {
-				thead,pins = <
-					FM_CLK_OUT_2  0x3     0x208
-				>;
-			};
 		};
+	};
 };

+/*
+	PIN      ,        0x0,   0x1,  0x2,     0x3,   0x4,  0x5
+	AUDIO_PA8,  AUDIO_PA8,  NULL, NULL, GPIO4_8,  NULL, NULL
+	AUDIO_PA9,  AUDIO_PA9,  NULL, NULL, GPIO4_9,  NULL, NULL
+	AUDIO_PA10, AUDIO_PA10, NULL, NULL, GPIO4_10, NULL, NULL
+	AUDIO_PA11, AUDIO_PA11, NULL, NULL, GPIO4_11, NULL, NULL
+	AUDIO_PA12, AUDIO_PA12, NULL, NULL, GPIO4_12, NULL, NULL
+*/
+
+#define FM_AUDIO_PA8_AUDIO_PA8 0x00
+#define FM_AUDIO_PA8_GPIO 0x03
+
 &padctrl_aosys {
-	light-aon-padctrl {
+	light_padctrl: light-aon-padctrl {
 			/*
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
@@ -850,12 +745,26 @@
 				>;
 			};

+		led_pins_default: leds0_grp {
+			thead,pins = <
+				FM_AUDIO_PA8	0x3	0x72
+				FM_AUDIO_PA9	0x3	0x72
+				FM_AUDIO_PA10	0x3	0x72
+				FM_AUDIO_PA11	0x3	0x72
+				FM_AUDIO_PA12	0x3	0x72
+			>;
+		};
 	};
 };

 &i2c0 {
    clock-frequency = <400000>;
 	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+	};
 };

 &i2c1 {
@@ -941,85 +850,6 @@
    memory-region = <&dsp1_mem>;
 };

-&vvcam_flash_led0{
-    flash_led_name = "aw36413_aw36515";
-    floodlight_i2c_bus = /bits/ 8 <2>;
-    floodlight_en_pin = <&gpio1_porta 26 0>;
-    projection_i2c_bus = /bits/ 8 <1>;
-    flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
-    io-channels = <&adc 2>;
-    io-channel-names = "projection_adc";
-    status = "okay";
-};
-
-&vvcam_sensor0 {
-	sensor_name = "SC2310";
-	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
-	sensor_regulator_timing_us = <70 50 20>;
-	sensor_pdn = <&gpio1_porta 21 0>; //powerdown pin / shutdown pin 
-	sensor_rst = <&gpio1_porta 16 0>;
-	sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
-	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
-	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-    i2c_reg_width = /bits/ 8 <2>;
-    i2c_data_width = /bits/ 8 <1>;
-    i2c_addr = /bits/ 8 <0x30>;
-	i2c_bus = /bits/ 8 <3>;
-	status = "okay";
-};
-
-&vvcam_sensor1 {
-    sensor_name = "SC132GS";
-    sensor_regulators = "DOVDD18_IR", "DVDD12_IR", "AVDD25_IR";
-    sensor_regulator_timing_us = <70 1000 2000>;
-    i2c_addr = /bits/ 8 <0x31>;
-    sensor_pdn = <&gpio1_porta 28 0>; //powerdown pin / shutdown pin 
-    sensor_rst = <&gpio1_porta 24 0>;
-	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
-    DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>;
-    DVDD12_IR-supply = <&soc_dvdd12_ir_reg>;
-    AVDD25_IR-supply = <&soc_avdd25_ir_reg>;
-    i2c_reg_width = /bits/ 8 <2>;
-    i2c_data_width = /bits/ 8 <1>;
-    i2c_bus = /bits/ 8 <2>;
-    status = "okay";
-};
-
-&vvcam_sensor2 {
-	sensor_name = "GC5035";
-	sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
-	sensor_regulator_timing_us = <100 50 0>;
-	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin 
-	sensor_rst = <&gpio1_porta 29 0>;
-	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
-	DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
-	AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
-	i2c_addr = /bits/ 8 <0x37>;
-	i2c_bus = /bits/ 8 <4>;
-	i2c_reg_width = /bits/ 8 <1>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "okay";
-};
-
-&vvcam_sensor3 {
-	sensor_name = "GC02M1B";
-	sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
-	sensor_regulator_timing_us = <100 50 0>;
-	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin 
-	sensor_rst = <&gpio1_porta 29 0>;
-	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
-	DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
-	AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
-	i2c_addr = /bits/ 8 <0x37>;
-	i2c_bus = /bits/ 8 <4>;
-	i2c_reg_width = /bits/ 8 <1>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "okay";
-};
-
 &video0{
    vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
    channel0 {
@@ -2167,21 +1997,6 @@
 	status = "okay";
 };

-&dpu_enc0 {
-	status = "okay";
-
-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc0_out: endpoint {
-				remote-endpoint = <&dsi0_in>;
-			};
-		};
-	};
-};
-
 &dpu_enc1 {
        ports {
                /delete-node/ port@0;
@@ -2192,46 +2007,6 @@
        status = "okay";
 };

-&dsi0 {
-        status = "okay";
-};
-
-&dhost_0 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi0_in: endpoint {
-				remote-endpoint = <&enc0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi0_out: endpoint {
-				remote-endpoint = <&panel0_in>;
-			};
-		};
-	};
-
-	panel0@0 {
-		compatible = "i2c_dsi,ili9881d";
-		reg = <0>;
-		mcu_auto_reset_enable = <0>;
-		tp_point_rotate = <0>;
-
-		port {
-			panel0_in: endpoint {
-				remote-endpoint = <&dsi0_out>;
-			};
-		};
-	};
-};
-
 &disp1_out {
 	remote-endpoint = <&hdmi_tx_in>;
 };
@@ -2263,7 +2038,7 @@
                reg = <1>;
                format = "i2s";
                cpu {
-                        sound-dai = <&i2s3 0>;
+                        sound-dai = <&i2s_8ch_sd2 2>;
                };
                codec {
                        sound-dai = <&es7210_audio_codec>;
@@ -2282,7 +2057,7 @@
 };

 &light_i2s {
-        status = "okay";
+        status = "disabled";
 };

 &i2s0 {
@@ -2293,7 +2068,7 @@
        status = "okay";
 };

-&i2s3 {
+&i2s_8ch_sd2 {
        status = "okay";
 };

@@ -2304,12 +2079,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 	c910_1: cpu@1 {
@@ -2318,12 +2095,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 	c910_2: cpu@2 {
@@ -2333,12 +2112,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 	c910_3: cpu@3 {
@@ -2348,12 +2129,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 };
--- a/arch/riscv/boot/dts/thead/light-beagle.dts
+++ b/arch/riscv/boot/dts/thead/light-beagle.dts
@@ -7,6 +7,27 @@

 #include "light-beagle-ref.dts"

+/ {
+	bcmdhd_wlan {
+		compatible = "android,bcmdhd_wlan";
+
+		gpio_wl_reg_on =   <&gpio2_porta 31 1>;
+		gpio_wl_host_wake = <&gpio2_porta 25 1>;
+	};
+};
+
+&pwm {
+	status = "disabled";
+};
+
+&qspi0 {
+	status = "disabled";
+};
+
+&qspi1 {
+	status = "disabled";
+};
+
 &vvcam_sensor4 { // beagle board J5 CSI0 connector
 	sensor_name = "IMX219";
 	sensor_pdn = <&gpio2_porta 23 0>; //powerdown pin / shutdown pin 
@@ -703,3 +724,5 @@ video12: tuningtool
 		};
 	};
 };
+
+#include "light-beagle-bone-buses.dtsi"
--- a/arch/riscv/boot/dts/thead/light-crash.dts
+++ b/arch/riscv/boot/dts/thead/light-crash.dts
@@ -191,8 +191,9 @@
 	};

 	dummy_codec: dummy_codec {
-		#sound-dai-cells = <1>;
-		compatible = "linux,bt-sco";
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
+		sound-name-prefix = "DUMMY";
 		status = "okay";
 	};

@@ -327,7 +328,7 @@
               irq-gpios = <&gpio1_porta 8 0>;
               reset-gpios = <&gpio1_porta 7 0>;
               AVDD28-supply = <&reg_tp_pwr_en>;
-               touchscreen-size-x = <720>;
+               touchscreen-size-x = <800>;
               touchscreen-size-y = <1280>;
       };

@@ -341,18 +342,23 @@
               #sound-dai-cells = <0>;
               compatible = "everest,es8156";
               reg = <0x08>;
+               sound-name-prefix = "ES8156";
+               status = "disabled";
       };

        es7210_audio_codec: es7210@40 {
                #sound-dai-cells = <0>;
                compatible = "MicArray_0";
                reg = <0x40>;
+                sound-name-prefix = "ES7210";
+                status = "disabled";
        };

-	audio_aw87519_pa@58 {
+	audio_aw87519_pa: amp@58 {
 		compatible = "awinic,aw87519_pa";
 		reg = <0x58>;
 		reset-gpio = <&ao_gpio4_porta 9 0x1>;
+		sound-name-prefix = "AW87519";
 		status = "okay";
 	};
 };
@@ -488,6 +494,7 @@
 	no-mmc;
 	non-removable;
 	io_fixed_1v8;
+	rxclk-sample-delay = <80>;
 	post-power-on-delay-ms = <50>;
 	wprtn_ignore;
 	cap-sd-highspeed;
@@ -530,7 +537,7 @@
 				>;
 			};

-			pinctrl_audio_i2s0: i2s0grp {
+			pinctrl_light_i2s0: i2s0grp {
 				thead,pins = <
 					FM_QSPI0_SCLK    0x2    0x208
 					FM_QSPI0_CSN0    0x2    0x238
@@ -862,22 +869,6 @@
        status = "disabled";
 };

-&light_i2s {
-        status = "okay";
-};
-
-&i2s0 {
-        status = "okay";
-};
-
-&i2s1 {
-        status = "okay";
-};
-
-&i2s3 {
-        status = "okay";
-};
-
 &khvhost {
 	status = "disabled";
 };
--- a/arch/riscv/boot/dts/thead/light-emu.dtsi
+++ b/arch/riscv/boot/dts/thead/light-emu.dtsi
@@ -309,7 +309,7 @@
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
 			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
 		};

 		clint0: clint@ffdc000000 {
--- a/arch/riscv/boot/dts/thead/light-evb.dtsi
+++ b/arch/riscv/boot/dts/thead/light-evb.dtsi
@@ -318,7 +318,7 @@
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
 			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
 		};

 		clint0: clint@ffdc000000 {
@@ -1193,8 +1193,7 @@

 		emmc: sdhci@ffe7080000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7080000 0x0 0x10000
-			       0xff 0xef014060 0x0 0x4>;
+			reg = <0xff 0xe7080000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <62>;
 			interrupt-names = "sdhciirq";
@@ -1204,8 +1203,7 @@

 		sdhci0: sd@ffe7090000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7090000 0x0 0x10000
-			       0xff 0xef014064 0x0 0x4>;
+			reg = <0xff 0xe7090000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <64>;
 			interrupt-names = "sdhci0irq";
@@ -1215,8 +1213,7 @@

 		sdhci1: sd@ffe70a0000 {
 		        compatible = "snps,dwcmshc-sdhci";
-		        reg = <0xff 0xe70a0000 0x0 0x10000
-		               0xff 0xef014064 0x0 0x4>;
+		        reg = <0xff 0xe70a0000 0x0 0x10000>;
 		        interrupt-parent = <&intc>;
 		        interrupts = <71>;
 		        interrupt-names = "sdhci1irq";
@@ -1302,7 +1299,7 @@
 			compatible = "light,light-i2s";
 			reg = <0xff 0xe7034000 0x0 0x4000>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_audio_i2s0>;
+			pinctrl-0 = <&pinctrl_light_i2s0>;
 			light,mode = "i2s-master";
 			interrupt-parent = <&intc>;
 			interrupts = <70>;
--- a/arch/riscv/boot/dts/thead/light-fm-emu.dts
+++ b/arch/riscv/boot/dts/thead/light-fm-emu.dts
@@ -185,7 +185,7 @@
 				sound-dai = <&light_i2s 0>;
 			};
 			codec {
-				sound-dai = <&dummy_codec 2>;
+				sound-dai = <&dummy_codec>;
 			};
 		};

@@ -196,7 +196,7 @@
 				sound-dai = <&light_i2s 1>;
 			};
 			codec {
-				sound-dai = <&dummy_codec 2>;
+				sound-dai = <&dummy_codec>;
 			};
 		};
 	};
--- a/arch/riscv/boot/dts/thead/light-lpi4a-16gb.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-16gb.dts
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a-ref.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x3 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
+};
--- a/arch/riscv/boot/dts/thead/light-lpi4a-cluster-16gb.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-cluster-16gb.dts
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "light-lpi4a-16gb.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board on Cluster";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&audio_i2c1 {
+	status = "disabled";
+};
+
+&lightsound {
+	status = "disabled";
+};
+
+&reg_usb_hub_vdd1v2 {
+	/delete-property/ gpio;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio;
+};
--- a/arch/riscv/boot/dts/thead/light-lpi4a-cluster.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-cluster.dts
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "light-lpi4a.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board on Cluster";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&audio_i2c1 {
+	status = "disabled";
+};
+
+&lightsound {
+	status = "disabled";
+};
+
+&reg_usb_hub_vdd1v2 {
+	/delete-property/ gpio;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio;
+};
--- a/arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-ddr2G.dts
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 2GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a-ddr2G", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0x7fe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0x64000000 0 0x14000000>; // [0x6400_0000 ~ 0x7800_0000]
+};
--- a/arch/riscv/boot/dts/thead/light-lpi4a-dsi0-hdmi.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-dsi0-hdmi.dts
@@ -0,0 +1,131 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a-ref.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x00000000 0x2 0x00000000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x1 0xe4000000 0 0x14000000>; // [0x1E400_0000 ~ 0x1F800_0000]
+};
+
+&pwm {
+	status = "okay";
+};
+
+&qspi0 {
+	status = "okay";
+};
+
+&qspi1 {
+	status = "okay";
+};
+
+&i2c3 {
+	touch@14 {
+		#gpio-cells = <2>;
+		compatible = "goodix,gt9271";
+		reg = <0x14>;
+		interrupt-parent = <&ao_gpio_porta>;
+		interrupts = <3 0>; 
+		irq-gpios = <&ao_gpio_porta 3 0>; 
+		reset-gpios = <&pcal6408ahk_d 0 0>; 
+		AVDD28-supply = <&reg_tp_pwr_en>;
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <1280>;
+		tp-size = <9271>;
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+       status = "okay";
+
+       ports {
+               /* output */
+               port@1 {
+                       reg = <1>;
+
+                       enc0_out: endpoint {
+                               remote-endpoint = <&dsi0_in>;
+                       };
+               };
+       };
+};
+
+&dpu_enc1 {
+        ports {
+                /delete-node/ port@0;
+        };
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       dsi0_in: endpoint {
+                               remote-endpoint = <&enc0_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+
+                       dsi0_out: endpoint {
+                               remote-endpoint = <&panel0_in>;
+                       };
+               };
+       };
+
+       panel0@0 {
+		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
+		hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;  
+		vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
+
+               port {
+                       panel0_in: endpoint {
+                               remote-endpoint = <&dsi0_out>;
+                       };
+               };
+       };
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-lpi4a-laptop.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-laptop.dts
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "light-lpi4a.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board use on laptop";
+
+	power-keys {
+                compatible = "gpio-keys";
+		key-lid {
+			label = "lid status";
+			linux,code = <KEY_DISPLAY_OFF>;
+			debounce-interval = <1>;
+			gpios = <&gpio1_porta 5 0x1>;
+		};
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-ref.dts
--- a/arch/riscv/boot/dts/thead/light-lpi4a-sec.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a-sec.dts
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light-lpi4a.dts"
+
+
+&light_iopmp {
+        status = "disabled";
+};
+
+&qspi1 {
+        status = "disabled";
+};
+
--- a/arch/riscv/boot/dts/thead/light-lpi4a.dts
+++ b/arch/riscv/boot/dts/thead/light-lpi4a.dts
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a-ref.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0x0E400_0000 ~ 0x0F800_0000]
+};
--- a/arch/riscv/boot/dts/thead/light-milkv-meles-4g.dts
+++ b/arch/riscv/boot/dts/thead/light-milkv-meles-4g.dts
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-milkv-meles.dts"
+
+/ {
+	model = "Milk-V Meles 4G";
+	compatible = "milkv,meles", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0xffe00000>;
+	};
+};
--- a/arch/riscv/boot/dts/thead/light-milkv-meles.dts
+++ b/arch/riscv/boot/dts/thead/light-milkv-meles.dts
@@ -0,0 +1,885 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	model = "Milk-V Meles";
+	compatible = "milkv,meles", "thead,light";
+
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdhci0;
+		mmc2 = &sdhci1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+
+	display_subsystem: display-subsystem {
+		status = "okay";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+
+		led1 {
+			label = "USER_LED";
+			gpios = <&gpio1_porta 16 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			linux,default-trigger = "heartbeat";
+			default-state = "on";
+		};
+	};
+
+	light_iopmp: iopmp {
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp_fce: IOPMP_FCE {
+			is_default_region;
+		};
+
+		iopmp_npu: IOPMP_NPU {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		status = "okay";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/* I2S - AUDIO SYS CODEC 8156*/
+		simple-audio-card,dai-link@0 {
+			reg = <0>;
+			format = "i2s";
+			cpu {
+				sound-dai = <&i2s1 0>;
+			};
+			codec {
+				sound-dai = <&es8156_audio_codec>;
+			};
+		};
+
+		/* I2S - HDMI */
+		simple-audio-card,dai-link@1 {
+			reg = <1>;
+			format = "i2s";
+			cpu {
+				sound-dai = <&light_i2s 1>;
+			};
+			codec {
+				sound-dai = <&dummy_codec>;
+			};
+		};
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		status = "okay";
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&gpio0_porta 20 1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_wireless_power>;
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
+		status = "okay";
+		sound-name-prefix = "DUMMY";
+	};
+
+	vdd_5v: regulator-vdd-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+		vin-supply = <&vdd_5v>;
+		status = "okay";
+	};
+
+	reg_vref_1v8: regulator-adc-verf {
+		compatible = "regulator-fixed";
+		regulator-name = "vref-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		status = "okay";
+	};
+
+	vcc_usb_en: regulator-usb-en {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_usb_en";
+		gpio = <&gpio2_porta 30 1>;	/* GPIO_ACTIVE_LOW: 1 */
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+
+	aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "okay";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic-ant";
+			status = "okay";
+
+			dvdd_cpu_reg: appcpu_dvdd {
+				regulator-name = "appcpu_dvdd";
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1570000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			dvddm_cpu_reg: appcpu_dvddm {
+				regulator-name = "appcpu_dvddm";
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1570000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_aon_reg: soc_dvdd18_aon {
+				regulator-name = "soc_dvdd18_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+				regulator-name = "soc_avdd33_usb3";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_aon_reg: soc_dvdd08_aon {
+				regulator-name = "soc_dvdd08_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+				regulator-name = "soc_dvdd08_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+				regulator-name = "soc_vdd_ddr_1v8";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+				regulator-name = "soc_vdd_ddr_1v1";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+				regulator-name = "soc_vdd_ddr_0v6";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_ap_reg: soc_dvdd18_ap {
+				regulator-name = "soc_dvdd18_ap";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+				regulator-name = "soc_avdd08_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+				regulator-name = "soc_avdd18_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd33_emmc_reg: soc_vdd33_emmc {
+				regulator-name = "soc_vdd33_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd18_emmc_reg: soc_vdd18_emmc {
+				regulator-name = "soc_vdd18_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dovdd18_scan_reg: soc_dovdd18_scan {
+				regulator-name = "soc_dovdd18_scan";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd12_scan_reg: soc_dvdd12_scan {
+				regulator-name = "soc_dvdd12_scan";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+
+			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+				regulator-name = "soc_avdd28_scan_en";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "okay";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+		};
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+	vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};
+};
+
+&adc {
+	vref-supply = <&reg_vref_1v8>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "disabled";
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	status = "disabled";
+};
+
+&audio_i2c0 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	es8156_audio_codec: es8156@9 {
+		#sound-dai-cells = <0>;
+		compatible = "everest,es8156";
+		reg = <0x09>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_audio_i2s1_mclk>;
+	};
+};
+
+&uart0 {
+	clock-frequency = <100000000>;
+};
+
+&gmac0 {
+	phy-mode = "rgmii-id";
+	rx-clk-delay = <0x00>; /* for RGMII */
+	tx-clk-delay = <0x00>; /* for RGMII */
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&gmac1 {
+	status = "disabled";
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	mmc-hs400-1_8v;
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "okay";
+};
+
+&sdhci1 {
+	status = "okay";
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	brcmf: wifi@1 {
+		compatible = "brcm,bcm4329-fmac";
+		reg = <1>;
+	};
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+		pinctrl_uart0: uart0grp {
+			thead,pins = <
+				FM_UART0_TXD	0x0	0x72
+				FM_UART0_RXD	0x0	0x72
+			>;
+		};
+
+		pinctrl_spi0: spi0grp {
+			thead,pins = <
+				FM_SPI_CSN	0x3	0x20a
+				FM_SPI_SCLK	0x0	0x20a
+				FM_SPI_MISO	0x0	0x23a
+				FM_SPI_MOSI	0x0	0x23a
+			>;
+		};
+
+		pinctrl_qspi0: qspi0grp {
+			thead,pins = <
+				FM_QSPI0_SCLK	0x0	0x20f
+				FM_QSPI0_CSN0	0x3	0x20f
+				FM_QSPI0_D0_MOSI	0x0	0x23f
+				FM_QSPI0_D1_MISO	0x0	0x23f
+			>;
+		};
+
+		pinctrl_pwm: pwmgrp {
+			thead,pins = <
+				FM_QSPI0_D2_WP  0x1     0x208   /* pwm5 */
+				FM_QSPI0_CSN1   0x1     0x208   /* pwm2 */
+			>;
+		};
+	};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+		pinctrl_uart3: uart3grp {
+			thead,pins = <
+				FM_UART3_TXD	0x0	0x72
+				FM_UART3_RXD	0x0	0x72
+			>;
+		};
+
+		pinctrl_uart4: uart4grp {
+			thead,pins = <
+				FM_UART4_TXD	0x0	0x72
+				FM_UART4_RXD	0x0	0x72
+				FM_UART4_CTSN	0x0	0x72
+				FM_UART4_RTSN	0x0	0x72
+			>;
+		};
+
+		pinctrl_qspi1: qspi1grp {
+			thead,pins = <
+				FM_QSPI1_SCLK	0x0	0x20a
+				FM_QSPI1_CSN0	0x3	0x20a
+				FM_QSPI1_D0_MOSI	0x0	0x23a
+				FM_QSPI1_D1_MISO	0x0	0x23a
+				FM_QSPI1_D2_WP	0x0	0x23a
+				FM_QSPI1_D3_HOLD	0x0	0x23a
+			>;
+		};
+
+		pinctrl_iso7816: iso7816grp {
+			thead,pins = <
+				FM_QSPI1_SCLK	0x1	0x208
+				FM_QSPI1_D0_MOSI	0x1	0x238
+				FM_QSPI1_D1_MISO	0x1	0x238
+				FM_QSPI1_D2_WP	0x1	0x238
+				FM_QSPI1_D3_HOLD	0x1	0x238
+			>;
+		};
+
+		pinctrl_wireless_power: wireless-power-group {
+			thead,pins = <
+				FM_GPIO0_20	0x0	0x23a
+			>;
+		};
+
+		pinctrl_wireless_host_wake: wireless-host-wake-group {
+			thead,pins = <
+				FM_GPIO0_21	0x0	0x21a
+			>;
+		};
+	};
+};
+
+&padctrl_aosys {
+	light-aon-padctrl {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+
+		pinctrl_audiopa1: audiopa1_grp {
+			thead,pins = <
+				FM_AUDIO_PA1	0x3	0x72
+			>;
+		};
+
+		pinctrl_audiopa2: audiopa2_grp {
+			thead,pins = <
+				FM_AUDIO_PA2	0x0	0x72
+			>;
+		};
+
+		pinctrl_volume: volume_grp {
+			thead,pins = <
+				FM_CPU_JTG_TDI	0x3	0x208
+				FM_CPU_JTG_TDO	0x3	0x208
+			>;
+		};
+	};
+};
+
+&padctrl_audiosys {
+	status = "okay";
+
+	light-audio-padctrl {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+
+		pinctrl_audio_i2s1_mclk: audio_i2s1_mclk_grp {
+			thead,pins = <
+				FM_AUDIO_IO_PA13	0x0	0x20a
+			>;
+		};
+	};
+};
+
+&xtensa_dsp {
+	status = "okay";
+};
+
+&xtensa_dsp0 {
+	status = "okay";
+	memory-region = <&dsp0_mem>;
+};
+
+&xtensa_dsp1{
+	status = "okay";
+	memory-region = <&dsp1_mem>;
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "okay";
+};
+
+&vdec {
+	status = "okay";
+};
+
+&venc {
+	status = "okay";
+};
+
+&isp_venc_shake {
+	status = "okay";
+};
+
+&vidmem {
+	status = "okay";
+	memory-region = <&vi_mem>;
+};
+
+&gpu {
+	status = "okay";
+};
+
+&npu {
+	vha_clk_rate = <1000000000>;
+	status = "okay";
+};
+
+&fce {
+	memory-region = <&facelib_mem>;
+	status = "okay";
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_2: cpu@2 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_3: cpu@3 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+};
+
+&dpu {
+	status = "okay";
+};
+
+/* DP1 --- HDMI0 */
+&dpu_enc1 {
+	status = "disabled";
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&light_i2s {
+	status = "okay";
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+};
+
+&i2s0 {
+	status = "okay";
+};
+
+&i2s1 {
+	status = "okay";
+};
+
+&qspi0 {
+	status = "okay";
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
+
+	spi_flash: spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-max-frequency = <50000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+		status = "okay";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			loader@0 {
+				label = "loader";
+				reg = <0x0 0x800000>;
+			};
+		};
+	};
+};
+
+&qspi1 {
+	status = "disabled";
+};
--- a/arch/riscv/boot/dts/thead/light-vi-devices.dtsi
+++ b/arch/riscv/boot/dts/thead/light-vi-devices.dtsi
@@ -199,6 +199,12 @@
 			csi_idx = <0xff>;
 			path_type = "SENSOR_VGA_RAW10_LINER";
 		};
+		sensor2 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
 		dma {
 			subdev_name = "vipre";
 			idx = <0>;
--- a/arch/riscv/boot/dts/thead/light.dtsi
+++ b/arch/riscv/boot/dts/thead/light.dtsi
@@ -6,11 +6,15 @@
 #include <dt-bindings/pinctrl/light-fm-left-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-right-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
+#include <dt-bindings/pinctrl/light-fm-audio-pinctrl.h>
+#include <dt-bindings/pinctrl/light-fm-pinctrl-def.h>
+#include <dt-bindings/pinctrl/light.h>
 #include <dt-bindings/clock/light-fm-ap-clock.h>
 #include <dt-bindings/clock/light-vpsys.h>
 #include <dt-bindings/clock/light-vosys.h>
 #include <dt-bindings/clock/light-visys.h>
 #include <dt-bindings/clock/light-dspsys.h>
+#include <dt-bindings/clock/light-audiosys.h>
 #include <dt-bindings/firmware/thead/rsrc.h>
 #include <dt-bindings/soc/thead,light-iopmp.h>
 #include <dt-bindings/thermal/thermal.h>
@@ -34,6 +38,7 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		audio_i2c0 = &audio_i2c0;
+        audio_i2c1 = &audio_i2c1;
 		mmc0 = &emmc;
 		mmc1 = &sdhci0;
 		serial0 = &uart0;
@@ -54,6 +59,7 @@
 		vivcam4 = &vvcam_sensor4;
 		vivcam5 = &vvcam_sensor5;
        vivcam6 = &vvcam_sensor6;
+        vivcam7 = &vvcam_sensor7;

        viv_video0 =  &video0;
        viv_video1 =  &video1;
@@ -93,6 +99,11 @@
 		};
 	};

+    aon_iram: aon-iram@ffffef8000 {
+            compatible = "syscon";
+            reg = <0xff 0xffef8000 0x0 0x10000>;
+    };
+
 	thermal-zones {
 		cpu-thermal-zone {
 			polling-delay-passive = <250>;
@@ -369,7 +380,7 @@
 		};
 	};

-	soc {
+	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -382,7 +393,7 @@
 			entry-cnt = <4>;
 			control-reg = <0xff 0xff015004>;
 			control-val = <0x1c>;
-			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
+			csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>;
 		};

 		clint0: clint@ffdc000000 {
@@ -633,6 +644,12 @@
 			status = "okay";
 		};

+		audio_mbox: audio_mbox@0xffefc48000 {
+			compatible = "thead,light-audio-mbox-reg", "syscon";
+			reg = <0xff 0xefc48000 0x0 0x1000>;
+			status = "okay";
+		};
+
 		nvmem_controller: efuse@ffff210000 {
 			compatible = "thead,light-fm-efuse", "syscon";
 			reg = <0xff 0xff210000 0x0 0x10000>;
@@ -854,6 +871,12 @@
 			status = "okay";
 		};

+		padctrl_audiosys: padctrl-audiosys@ffcb01d000 {
+			compatible = "thead,light-fm-audio-pinctrl";
+			reg = <0xff 0xcb01d000 0x0 0x1000>;
+			status = "disabled";
+		};
+
 		timer4: timer@ffffc33000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xffc33000 0x0 0x14>;
@@ -1024,7 +1047,7 @@
 			#size-cells = <0>;
 		};

-		g2d: gc620@ffecc80000 {
+/*		g2d: gc620@ffecc80000 {
 			compatible = "thead,c910-gc620";
 			reg = <0xff 0xecc80000 0x0 0x40000>;
 			interrupt-parent = <&intc>;
@@ -1035,6 +1058,19 @@
 				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
 			clock-names = "pclk", "aclk", "cclk";
 			status = "okay";
+		};*/
+
+		g2d: gpu@13040000 {
+			compatible = "vivante,gc";
+			reg = <0xff 0xecc80000 0x0 0x40000>;
+
+			clocks = <&vpsys_clk_gate LIGHT_VPSYS_G2D_PCLK>,
+				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_ACLK>,
+				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
+			clock-names = "bus", "core", "shader";
+
+			interrupt-parent = <&intc>;
+			interrupts = <101>;
 		};

 		dsi0: dw-mipi-dsi0@ffef500000 {
@@ -1247,6 +1283,13 @@
 			status = "okay";
 		};

+		vpsys_rst: vpsys-reset-controller@ffecc30000 {
+			compatible = "thead,light-vpsys-reset-src","syscon";
+			reg = <0xff 0xecc30000 0x0 0x1000>;
+			#reset-cells = <1>;
+			status = "okay";
+		};
+
 		sys_reg: sys_reg@ffef010100 {
 			compatible = "thead,light_sys_reg";
 			reg = <0xff 0xef010100 0x0 0x100>;
@@ -1300,7 +1343,7 @@
                                          65536 65536 65536 65536
                                          65536 65536 65536 65536
                                          65536 65536 65536 65536>;
-                        snps,priority = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
+                        snps,priority = <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; // <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
                        snps,dma-masters = <1>;
                        snps,data-width = <4>;
                        snps,axi-max-burst-len = <16>;
@@ -1353,8 +1396,7 @@

 		emmc: sdhci@ffe7080000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7080000 0x0 0x10000
-			       0xff 0xef014060 0x0 0x4>;
+			reg = <0xff 0xe7080000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <62>;
 			interrupt-names = "sdhciirq";
@@ -1364,8 +1406,7 @@

 		sdhci0: sd@ffe7090000 {
 			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe7090000 0x0 0x10000
-			       0xff 0xef014064 0x0 0x4>;
+			reg = <0xff 0xe7090000 0x0 0x10000>;
 			interrupt-parent = <&intc>;
 			interrupts = <64>;
 			interrupt-names = "sdhci0irq";
@@ -1375,8 +1416,7 @@

 		sdhci1: sd@ffe70a0000 {
 		        compatible = "snps,dwcmshc-sdhci";
-		        reg = <0xff 0xe70a0000 0x0 0x10000
-		               0xff 0xef014064 0x0 0x4>;
+		        reg = <0xff 0xe70a0000 0x0 0x10000>;
 		        interrupt-parent = <&intc>;
 		        interrupts = <71>;
 		        interrupt-names = "sdhci1irq";
@@ -1402,7 +1442,8 @@
 			clock-names = "pclk", "aclk";
 			vha_clk_rate = <1000000000>;
 			ldo_vha-supply = <&npu>;
-			dma-mask = <0xf 0xffffffff>;
+			dma-mask = <0xff 0xffffffff>;
+			resets = <&rst LIGHT_RESET_NPU>;
 			status = "disabled";
 		};

@@ -1431,6 +1472,7 @@
 			clocks = <&vpsys_clk_gate LIGHT_VPSYS_FCE_ACLK>,
 				<&vpsys_clk_gate LIGHT_VPSYS_FCE_PCLK>;
 			clock-names = "aclk", "pclk";
+			resets = <&vpsys_rst LIGHT_RESET_FCE>;
 			dma-mask = <0xf 0xffffffff>;
 			status = "disabled";
 		};
@@ -1480,7 +1522,7 @@
 			compatible = "light,light-i2s";
 			reg = <0xff 0xe7034000 0x0 0x4000>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_audio_i2s0>;
+			pinctrl-0 = <&pinctrl_light_i2s0>;
 			light,mode = "i2s-master";
 			light,sel = "ap_i2s";
 			interrupt-parent = <&intc>;
@@ -1505,7 +1547,7 @@
 			light,sel = "i2s0";
 			interrupt-parent = <&intc>;
 			interrupts = <174>;
-			dmas = <&dmac2 9>, <&dmac2 16>;
+			dmas = <&dmac2 9>, <&dmac2 8>;
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
@@ -1534,16 +1576,18 @@
 			status = "disabled";
 		};

-		i2s3: audio_i2s3@0xffcb017000 {
+		i2s2: audio_i2s2@0xffcb016000 {
 			#sound-dai-cells = <1>;
 			compatible = "light,light-i2s";
-			reg = <0xff 0xcb017000 0x0 0x1000>;
+			reg = <0xff 0xcb016000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
 			pinctrl-names = "default";
 			light,mode = "i2s-master";
-			light,sel = "i2s3";
+			light,sel = "i2s2";
 			interrupt-parent = <&intc>;
-			interrupts = <177>;
-			dmas = <&dmac2 14>, <&dmac2 16>;
+			interrupts = <176>;
+			dmas = <&dmac2 13>, <&dmac2 12>;
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
@@ -1552,6 +1596,286 @@
 			status = "disabled";
 		};

+		i2s_8ch_sd0: audio_i2s_8ch_sd0@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd0";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 36>, <&dmac2 14>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		i2s_8ch_sd1: audio_i2s_8ch_sd1@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd1";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 37>, <&dmac2 15>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		i2s_8ch_sd2: audio_i2s_8ch_sd2@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd2";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 38>, <&dmac2 16>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		i2s_8ch_sd3: audio_i2s_8ch_sd3@0xffcb017000 {
+			#sound-dai-cells = <1>;
+			compatible = "light,light-i2s-8ch";
+			reg = <0xff 0xcb017000 0x0 0x1000>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,sel = "i2s_8ch_sd3";
+			interrupt-parent = <&intc>;
+			interrupts = <177>;
+			dmas = <&dmac2 39>, <&dmac2 17>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&dummy_clock_apb>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot1: audio_tdm_slot1@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <1>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 28>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot2: audio_tdm_slot2@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <2>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 29>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot3: audio_tdm_slot3@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <3>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 30>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot4: audio_tdm_slot4@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <4>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 31>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot5: audio_tdm_slot5@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <5>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 32>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot6: audio_tdm_slot6@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <6>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 33>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot7: audio_tdm_slot7@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <7>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 34>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		tdm_slot8: audio_tdm_slot8@0xffcb012000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-tdm";
+			reg = <0xff 0xcb012000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			light,mode = "i2s-master";
+			light,tdm_slots = <8>;
+			light,tdm_slot_num = <8>;
+			interrupt-parent = <&intc>;
+			interrupts = <178>;
+			dmas = <&dmac2 35>;
+			dma-names = "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_TDM>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		spdif0: audio_spdif0@0xffcb018000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-spdif";
+			reg = <0xff 0xcb018000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			interrupt-parent = <&intc>;
+			interrupts = <179>;
+			dmas = <&dmac2 25>, <&dmac2 24>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_SPDIF0>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
+		spdif1: audio_spdif1@0xffcb019000 {
+			#sound-dai-cells = <0>;
+			compatible = "light,light-spdif";
+			reg = <0xff 0xcb019000 0x0 0x1000>;
+			audio-pin-regmap = <&audio_ioctrl>;
+			audio-cpr-regmap = <&audio_cpr>;
+			pinctrl-names = "default";
+			interrupt-parent = <&intc>;
+			interrupts = <180>;
+			dmas = <&dmac2 27>, <&dmac2 26>;
+			dma-names = "tx", "rx";
+			light,dma_maxburst = <4>;
+			#dma-cells = <1>;
+			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_SPDIF1>;
+			clock-names = "pclk";
+			status = "disabled";
+		};
+
 		pvt: pvt@fffff4e000 {
 		    compatible = "moortec,mr75203";
 		    reg = <0xff 0xfff4e000 0x0 0x80>,
@@ -1571,6 +1895,10 @@
 			interrupts = <44>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 12>, <&dmac0 13>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
@@ -1590,6 +1918,10 @@
 			interrupts = <45>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 14>, <&dmac0 15>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
@@ -1609,6 +1941,10 @@
 			interrupts = <46>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 16>, <&dmac0 17>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
@@ -1630,6 +1966,10 @@
 			interrupts = <47>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 18>, <&dmac0 19>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
@@ -1651,6 +1991,10 @@
 			interrupts = <48>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac0 20>, <&dmac0 21>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x104>;
 			ss_lcnt = /bits/ 16 <0xec>;
 			fs_hcnt = /bits/ 16 <0x37>;
@@ -1672,6 +2016,10 @@
 			interrupts = <182>;
 			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
+            i2c_mode = "dma";
+			dmas = <&dmac2 21>, <&dmac2 20>;
+			dma-names = "tx", "rx";
+			#dma-cells = <1>;
 			ss_hcnt = /bits/ 16 <0x82>;
 			ss_lcnt = /bits/ 16 <0x78>;
 			fs_hcnt = /bits/ 16 <0x37>;
@@ -1684,6 +2032,31 @@
 			#size-cells = <0>;
 		};

+        audio_i2c1: i2c@0xffcb01b000 {
+                compatible = "snps,designware-i2c";
+                reg = <0xff 0xcb01b000 0x0 0x1000>;
+                interrupt-parent = <&intc>;
+                interrupts = <183>;
+                clocks = <&dummy_clock_apb>;
+                clock-frequency = <100000>;
+                i2c_mode = "dma";
+			    dmas = <&dmac2 23>, <&dmac2 22>;
+			    dma-names = "tx", "rx";
+			    #dma-cells = <1>;
+                ss_hcnt = /bits/ 16 <0x82>;
+                ss_lcnt = /bits/ 16 <0x78>;
+                fs_hcnt = /bits/ 16 <0x37>;
+                fs_lcnt = /bits/ 16 <0x42>;
+                fp_hcnt = /bits/ 16 <0x14>;
+                fp_lcnt = /bits/ 16 <0x1a>;
+                hs_hcnt = /bits/ 16 <0x5>;
+                hs_lcnt = /bits/ 16 <0x15>;
+                status = "disabled";
+
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
 		isp0: isp@ffe4100000 {
 			compatible = "thead,light-isp";
 			reg = <0xff 0xe4100000 0x0 0x10000>;
@@ -1963,6 +2336,11 @@
 			status = "disabled";
 		};

+		vvcam_sensor7: vvcam_sensor@7 {
+			compatible = "thead,light-vvcam-sensor";
+			status = "disabled";
+		};
+
 		xtensa_dsp: dsp@01{
 			compatible = "thead,dsp-hw-common";
 			reg = <0xff 0xef040000 0x0 0x001000 >;   /*DSP_SYSREG(0x0000-0xFFF) */
@@ -2112,6 +2490,12 @@
 			interrupts = <215>; /* TEE INT SRC_7 */
 		};

+        light_event: light-event {
+                compatible = "thead,light-event";
+                aon-iram-regmap = <&aon_iram>;
+                status = "okay";
+        };
+
 		visys_clk_gate: visys-clk-gate { /* VI_SYSREG_R */
 			compatible = "thead,visys-gate-controller";
 			visys-regmap = <&visys_reg>;
@@ -2139,6 +2523,13 @@
 			#clock-cells = <1>;
 			status = "okay";
 		};
+
+		audiosys_clk_gate: audiosys-clk-gate {
+			compatible = "thead,audiosys-gate-controller";
+			audiosys-regmap = <&audio_cpr>;
+			#clock-cells = <1>;
+			status = "okay";
+		};
 	};

 };
--- a/arch/riscv/boot/dts/thead/overlays/BBORG_LOAD-00A2.dts
+++ b/arch/riscv/boot/dts/thead/overlays/BBORG_LOAD-00A2.dts
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+	overlays {
+		BBORG_LOAD-00A2 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver 
+ */
+
+&bone_led_P9_42 {
+    status = "okay";
+    label = "load-sink1";
+    default-state = "keep";
+};
+
+&bone_led_P9_41 {
+    status = "okay";
+    label = "load-sink2";
+    default-state = "keep";
+};
+
+&bone_led_P9_30 {
+    status = "okay";
+    label = "load-sink3";
+    default-state = "keep";
+};
+
+&bone_led_P9_27 {
+    status = "okay";
+    label = "load-sink4";
+    default-state = "keep";
+};
+
+&bone_led_P8_12 {
+    status = "okay";
+    label = "load-sink5";
+    default-state = "keep";
+};
+
+&bone_led_P8_11 {
+    status = "okay";
+    label = "load-sink6";
+    default-state = "keep";
+};
+
+&bone_led_P8_15 {
+    status = "okay";
+    label = "load-sink7";
+    default-state = "keep";
+};
+
+&bone_led_P8_17 {
+    status = "okay";
+    label = "load-sink8";
+    default-state = "keep";
+};
--- a/arch/riscv/boot/dts/thead/overlays/BBORG_RELAY-00A2.dts
+++ b/arch/riscv/boot/dts/thead/overlays/BBORG_RELAY-00A2.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
+ * Copyright (C) 2019 Amilcar Lucas <amilcar.lucas@iav.de>
+ * Copyright (C) 2020 - 2023 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+	overlays {
+		BBORG_RELAY-00A2.kernel = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+// relay1
+&bone_led_P9_41 {
+	status = "okay";
+	// access: sys/class/leds/relay1
+	label = "relay1";
+	default-state = "keep";
+};
+
+// relay2
+&bone_led_P9_42 {
+	status = "okay";
+	// access: sys/class/leds/relay2
+	label = "relay2";
+	default-state = "keep";
+};
+
+// realy3
+&bone_led_P9_30 {
+	status = "okay";
+	// access: sys/class/leds/relay3
+	label = "relay3";
+	default-state = "keep";
+};
+
+// realy4
+&bone_led_P9_27 {
+	status = "okay";
+	// access: sys/class/leds/relay4
+	label = "relay4";
+	default-state = "keep";
+};
--- a/arch/riscv/boot/dts/thead/overlays/BONE-LED_P8_03.dts
+++ b/arch/riscv/boot/dts/thead/overlays/BONE-LED_P8_03.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ * Virtual cape for LED on P8_03 
+ * Supports BBB, BBBWL, BBAI, and BBAI-64
+ *
+ */
+ 
+/dts-v1/;
+/plugin/;
+ 
+&{/chosen} {
+	overlays {
+		BONE-LED_P8_03 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+&bone_led_P8_03 {
+    status = "okay";
+    // access: sys/class/leds/led_P8_03
+    label = "led_P8_03";
+    linux,default-trigger = "heartbeat";
+    default-state = "on";
+};
--- a/arch/riscv/boot/dts/thead/overlays/BONE-LED_P9_11.dts
+++ b/arch/riscv/boot/dts/thead/overlays/BONE-LED_P9_11.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ * Virtual cape for LED on P9_11 
+ * Supports BBB, BBBWL, BBAI, and BBAI-64
+ *
+ */
+ 
+/dts-v1/;
+/plugin/;
+ 
+&{/chosen} {
+	overlays {
+		BONE-LED_P9_11 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+&bone_led_P9_11 {
+    status = "okay";
+    // access: sys/class/leds/led_P9_11
+    label = "led_P9_11";
+    linux,default-trigger = "heartbeat";
+    default-state = "on";
+};
--- a/arch/riscv/boot/dts/thead/overlays/BVA-MIKROBUS-0.dts
+++ b/arch/riscv/boot/dts/thead/overlays/BVA-MIKROBUS-0.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2023 BeagleBoard.org - https://beagleboard.org/
+ * Copyright (C) 2023 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+ /*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+ 
+&{/chosen} {
+	overlays {
+		BBORG_LOAD-00A2 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Enable mikroBus port
+ */
+
+&bone_mikrobus0 {
+    status = "okay";
+};
--- a/arch/riscv/boot/dts/thead/overlays/Makefile
+++ b/arch/riscv/boot/dts/thead/overlays/Makefile
@@ -0,0 +1,14 @@
+# Overlays for the CONFIG_SOC_THEAD platform
+
+dtbo-$(CONFIG_SOC_THEAD) += \
+	BBORG_LOAD-00A2.dtbo	\
+	BBORG_RELAY-00A2.dtbo	\
+	BONE-LED_P8_03.dtbo	\
+	BONE-LED_P9_11.dtbo	\
+	BVA-MIKROBUS-0.dtbo
+
+targets += dtbs dtbs_install
+targets += $(dtbo-y)
+
+always-y	:= $(dtbo-y)
+clean-files	:= *.dtbo
--- a/arch/riscv/configs/beaglev_defconfig
+++ b/arch/riscv/configs/beaglev_defconfig
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -183,6 +183,5 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
--- a/arch/riscv/configs/fire_defconfig
+++ b/arch/riscv/configs/fire_defconfig
@@ -80,6 +80,7 @@ CONFIG_STMMAC_ETH=y
 CONFIG_DWMAC_LIGHT=y
 CONFIG_MICROSEMI_PHY=y
 CONFIG_REALTEK_PHY=y
+CONFIG_MARVELL_PHY=y
 CONFIG_USB_USBNET=m
 # CONFIG_USB_NET_AX8817X is not set
 # CONFIG_USB_NET_AX88179_178A is not set
@@ -250,6 +251,7 @@ CONFIG_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_LIGHT=y
 CONFIG_HWSPINLOCK_LIGHT_TEST=m
 CONFIG_MAILBOX=y
+CONFIG_EXTCON=y
 CONFIG_IIO=y
 CONFIG_IIO_SW_DEVICE=y
 CONFIG_PWM=y
@@ -299,7 +301,6 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_OVERLAY_FS=y
--- a/arch/riscv/configs/fire_emu_defconfig
+++ b/arch/riscv/configs/fire_emu_defconfig
@@ -17,6 +17,7 @@ CONFIG_PERF_EVENTS=y
 CONFIG_FORCE_MAX_ZONEORDER=15
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_THEAD=y
+CONFIG_SOC_THEAD_LIGHT_EMU=y
 CONFIG_SMP=y
 CONFIG_VECTOR=y
 CONFIG_VECTOR_0_7=y
@@ -80,6 +81,7 @@ CONFIG_STMMAC_ETH=y
 CONFIG_DWMAC_LIGHT=y
 CONFIG_MICROSEMI_PHY=y
 CONFIG_REALTEK_PHY=y
+CONFIG_MARVELL_PHY=y
 CONFIG_USB_USBNET=m
 # CONFIG_USB_NET_AX8817X is not set
 # CONFIG_USB_NET_AX88179_178A is not set
@@ -250,6 +252,7 @@ CONFIG_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_LIGHT=y
 CONFIG_HWSPINLOCK_LIGHT_TEST=m
 CONFIG_MAILBOX=y
+CONFIG_EXTCON=y
 CONFIG_IIO=y
 CONFIG_IIO_SW_DEVICE=y
 CONFIG_PWM=y
@@ -299,7 +302,6 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_OVERLAY_FS=y
--- a/arch/riscv/configs/ice_defconfig
+++ b/arch/riscv/configs/ice_defconfig
@@ -180,6 +180,5 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
--- a/arch/riscv/configs/light-android_defconfig
+++ b/arch/riscv/configs/light-android_defconfig
@@ -561,7 +561,6 @@ CONFIG_DYNAMIC_DEBUG=y
 CONFIG_DEBUG_FS=y
 CONFIG_PANIC_TIMEOUT=5
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_SCHEDSTATS=y
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_GCC_PLUGINS is not set
--- a/arch/riscv/configs/light_defconfig
+++ b/arch/riscv/configs/light_defconfig
@@ -91,6 +91,7 @@ CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 CONFIG_MACB=y
 CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_RX_ZERO_COPY=y
 CONFIG_DWMAC_LIGHT=y
 CONFIG_MICROSEMI_PHY=y
 CONFIG_REALTEK_PHY=y
@@ -198,6 +199,7 @@ CONFIG_DRM=y
 CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
 CONFIG_DRM_PANEL_ILI9881D=y
+CONFIG_DRM_PANEL_HX8394=y
 CONFIG_DRM_VERISILICON=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_PWM=y
@@ -264,6 +266,11 @@ CONFIG_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_LIGHT=y
 CONFIG_HWSPINLOCK_LIGHT_TEST=m
 CONFIG_MAILBOX=y
+CONFIG_RPMSG=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_VIRTIO=y
+CONFIG_RPMSG_THEAD_LIGHT=y
+CONFIG_EXTCON=y
 CONFIG_IIO=y
 CONFIG_IIO_SW_DEVICE=y
 CONFIG_PWM=y
@@ -297,13 +304,21 @@ CONFIG_CRYPTO_AUTHENC=y
 CONFIG_CRYPTO_DH=y
 CONFIG_CRYPTO_CURVE25519=y
 CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
 CONFIG_CRYPTO_OFB=y
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_SHA3=y
 CONFIG_CRYPTO_SM3=y
 CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_SM4=y
+CONFIG_CRYPTO_USER=y
 CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_USER_API_RNG=y
+# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
+CONFIG_CRYPTO_USER_API_AEAD=y
 CONFIG_DMA_CMA=y
 CONFIG_DMA_PERNUMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=32
@@ -313,7 +328,6 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_OVERLAY_FS=y
--- a/arch/riscv/configs/light_emu_defconfig
+++ b/arch/riscv/configs/light_emu_defconfig
@@ -189,7 +189,6 @@ CONFIG_DYNAMIC_DEBUG=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
 CONFIG_FORCE_MAX_ZONEORDER=15
--- a/arch/riscv/configs/revyos_beaglev_defconfig
+++ b/arch/riscv/configs/revyos_beaglev_defconfig
--- a/arch/riscv/configs/revyos_defconfig
+++ b/arch/riscv/configs/revyos_defconfig
@@ -0,0 +1,473 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_MEMCG=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_BPF=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_CHECKPOINT_RESTORE=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+# CONFIG_BUG is not set
+CONFIG_BPF_SYSCALL=y
+CONFIG_PERF_EVENTS=y
+CONFIG_FORCE_MAX_ZONEORDER=15
+CONFIG_SOC_SIFIVE=y
+CONFIG_SOC_THEAD=y
+CONFIG_SMP=y
+CONFIG_VECTOR=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
+# CONFIG_SUSPEND is not set
+CONFIG_PM=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_LIGHT_AON_PD=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_BLK_DEV_THROTTLING=y
+CONFIG_BINFMT_MISC=m
+CONFIG_CMA=y
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_AREAS=16
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPVTI=y
+CONFIG_INET_ESP=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BBR=m
+CONFIG_NETFILTER=y
+CONFIG_BRIDGE_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_NAT=y
+CONFIG_NETFILTER_XT_CONNMARK=y
+CONFIG_NETFILTER_XT_NAT=y
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=y
+CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_IPVS=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_IP_VS=y
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_RR=y
+CONFIG_IP_VS_NFCT=y
+CONFIG_NF_LOG_ARP=m
+CONFIG_NF_LOG_IPV4=m
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_NF_LOG_IPV6=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_NAT=m
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_VLAN_8021Q=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_CLS_CGROUP=y
+CONFIG_VSOCKETS=y
+# CONFIG_VSOCKETS_LOOPBACK is not set
+CONFIG_VIRTIO_VSOCKETS=y
+CONFIG_NETLINK_DIAG=y
+CONFIG_CGROUP_NET_PRIO=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_RTL3WIRE=y
+CONFIG_CFG80211=y
+CONFIG_RFKILL=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_PCI=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_LIGHT_DSMART_CARD=y
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_THIN_PROVISIONING=y
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+CONFIG_MACVLAN=y
+CONFIG_IPVLAN=y
+CONFIG_VXLAN=y
+CONFIG_TUN=y
+CONFIG_VETH=y
+CONFIG_VIRTIO_NET=y
+CONFIG_MACB=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_RX_ZERO_COPY=y
+CONFIG_DWMAC_LIGHT=y
+CONFIG_MICROSEMI_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_USB_USBNET=m
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_AX88179_178A is not set
+# CONFIG_USB_NET_NET1080 is not set
+CONFIG_RTL8723DS=y
+CONFIG_AIC_WLAN_SUPPORT=y
+CONFIG_AIC_FW_PATH="/lib/firmware/aic8800"
+CONFIG_AIC8800_WLAN_SUPPORT=m
+CONFIG_AIC8800_BTLPM_SUPPORT=m
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_GOODIX=y
+CONFIG_TOUCHSCREEN_GT9XX=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_SPI=y
+CONFIG_SPI_DW_QUAD=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_SPIDEV=y
+# CONFIG_PTP_1588_CLOCK is not set
+CONFIG_PINCTRL=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_SENSORS_MR75203=y
+CONFIG_SENSORS_PWM_FAN=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_OPEN_TIMEOUT=32
+CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
+CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_LIGHT_PMIC_WATCHDOG=y
+CONFIG_ABX500_CORE=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_ASPEED=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+CONFIG_DRM=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
+CONFIG_DRM_PANEL_ILI9881D=y
+CONFIG_DRM_PANEL_HX8394=y
+CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y
+CONFIG_DRM_VERISILICON=y
+CONFIG_DRM_POWERVR_ROGUE=m
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_THEAD_LIGHT=y
+CONFIG_SND_SOC_AW87519=y
+CONFIG_SND_SOC_BT_SCO=y
+CONFIG_SND_SOC_ES7210=y
+CONFIG_SND_SOC_ES8156=y
+CONFIG_SND_SOC_WM8960=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+CONFIG_UHID=y
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_DWC3=m
+CONFIG_USB_DWC3_HOST=y
+# CONFIG_USB_DWC3_OF_SIMPLE is not set
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_SIMPLE=m
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_F81232=m
+CONFIG_USB_SERIAL_F8153X=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_IUU=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_METRO=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+CONFIG_USB_SERIAL_MXUPORT=m
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_OTI6858=m
+CONFIG_USB_SERIAL_QCAUX=m
+CONFIG_USB_SERIAL_QUALCOMM=m
+CONFIG_USB_SERIAL_SPCP8X5=m
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_SYMBOL=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_OPTICON=m
+CONFIG_USB_SERIAL_XSENS_MT=m
+CONFIG_USB_SERIAL_WISHBONE=m
+CONFIG_USB_SERIAL_SSU100=m
+CONFIG_USB_SERIAL_QT2=m
+CONFIG_USB_SERIAL_UPD78F0730=m
+CONFIG_USB_SERIAL_DEBUG=m
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_G_NCM=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_ROLE_SWITCH=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_DWCMSHC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_XGENE=y
+CONFIG_DMADEVICES=y
+CONFIG_DW_AXI_DMAC=y
+CONFIG_DMATEST=y
+CONFIG_SW_SYNC=y
+CONFIG_UDMABUF=y
+CONFIG_DMABUF_SELFTESTS=m
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_KHV_MMIO=y
+CONFIG_VHOST_NET=y
+CONFIG_VHOST_VSOCK=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_CLK_LIGHT_FM=y
+CONFIG_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_LIGHT=y
+CONFIG_HWSPINLOCK_LIGHT_TEST=m
+CONFIG_MAILBOX=y
+CONFIG_RPMSG=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_THEAD_LIGHT=y
+CONFIG_RPMSG_VIRTIO=y
+CONFIG_EXTCON=y
+CONFIG_IIO=y
+CONFIG_IIO_SW_DEVICE=y
+CONFIG_PWM=y
+CONFIG_PWM_LIGHT=y
+CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_OPTEE_BENCHMARK=y
+# CONFIG_LIGHT_GPU_VIV is not set
+CONFIG_DRM_ETNAVIV=m
+# CONFIG_LIGHT_NET is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_BTRFS_FS=y
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_OVERLAY_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_EXFAT_FS=m
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_HUGETLBFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V4=y
+CONFIG_9P_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_APPARMOR=y
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_DH=y
+CONFIG_CRYPTO_CURVE25519=y
+CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_OFB=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_SHA3=y
+CONFIG_CRYPTO_SM3=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_SM4=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_USER_API_RNG=y
+CONFIG_CRYPTO_USER_API_AEAD=y
+CONFIG_DMA_CMA=y
+CONFIG_DMA_PERNUMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=32
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+# CONFIG_RCU_TRACE is not set
--- a/arch/riscv/configs/vector_0_7_defconfig
+++ b/arch/riscv/configs/vector_0_7_defconfig
@@ -184,6 +184,5 @@ CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=60
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 # CONFIG_RCU_TRACE is not set
--- a/arch/riscv/include/asm/Kbuild
+++ b/arch/riscv/include/asm/Kbuild
@@ -3,7 +3,8 @@ generic-y += early_ioremap.h
 generic-y += extable.h
 generic-y += flat.h
 generic-y += kvm_para.h
+generic-y += mcs_spinlock.h
+generic-y += qspinlock.h
 generic-y += qrwlock.h
-generic-y += qrwlock_types.h
 generic-y += user.h
 generic-y += vmlinux.lds.h
--- a/arch/riscv/include/asm/cmpxchg.h
+++ b/arch/riscv/include/asm/cmpxchg.h
@@ -11,12 +11,36 @@
 #include <asm/barrier.h>
 #include <asm/fence.h>

+static inline ulong __xchg16_relaxed(ulong new, void *ptr)
+{
+       ulong ret, tmp;
+       ulong shif = ((ulong)ptr & 2) ? 16 : 0;
+       ulong mask = 0xffff << shif;
+       ulong *__ptr = (ulong *)((ulong)ptr & ~2);
+
+       __asm__ __volatile__ (
+               "0:     lr.w %0, %2\n"
+               "       and  %1, %0, %z3\n"
+               "       or   %1, %1, %z4\n"
+               "       sc.w %1, %1, %2\n"
+               "       bnez %1, 0b\n"
+               : "=&r" (ret), "=&r" (tmp), "+A" (*__ptr)
+               : "rJ" (~mask), "rJ" (new << shif)
+               : "memory");
+
+       return (ulong)((ret & mask) >> shif);
+}
+
 #define __xchg_relaxed(ptr, new, size)					\
 ({									\
 	__typeof__(ptr) __ptr = (ptr);					\
 	__typeof__(new) __new = (new);					\
 	__typeof__(*(ptr)) __ret;					\
 	switch (size) {							\
+        case 2: {                                                       \
+                __ret = (__typeof__(*(ptr)))                            \
+                         __xchg16_relaxed((ulong)__new, __ptr);         \
+                break;}                                                 \
 	case 4:								\
 		__asm__ __volatile__ (					\
 			"	amoswap.w %0, %2, %1\n"			\
@@ -372,4 +396,22 @@
 	cmpxchg_relaxed((ptr), (o), (n));				\
 })

+#define cmpxchg64_relaxed(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_relaxed((ptr), (o), (n));				\
+})
+
+#define cmpxchg64_acquire(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_acquire((ptr), (o), (n));				\
+})
+
+#define cmpxchg64_release(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_release((ptr), (o), (n));				\
+})
+
 #endif /* _ASM_RISCV_CMPXCHG_H */
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -26,19 +26,11 @@

 #define SR_VS_OFF	_AC(0x00000000, UL)

-#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
-#define SR_VS		_AC(0x00000600, UL) /* Vector Status */
-#define SR_VS_INITIAL	_AC(0x00000200, UL)
-#define SR_VS_CLEAN	_AC(0x00000400, UL)
-#define SR_VS_DIRTY	_AC(0x00000600, UL)
-#else
 #define SR_VS		_AC(0x01800000, UL) /* Vector Status */
 #define SR_VS_INITIAL	_AC(0x00800000, UL)
 #define SR_VS_CLEAN	_AC(0x01000000, UL)
 #define SR_VS_DIRTY	_AC(0x01800000, UL)

-#endif
-
 #define SR_XS		_AC(0x00018000, UL) /* Extension Status */
 #define SR_XS_OFF	_AC(0x00000000, UL)
 #define SR_XS_INITIAL	_AC(0x00008000, UL)
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -13,7 +13,6 @@

 #include <linux/types.h>
 #include <linux/pgtable.h>
-#include <asm/mmiowb.h>
 #include <asm/early_ioremap.h>

 /*
--- a/arch/riscv/include/asm/mmio.h
+++ b/arch/riscv/include/asm/mmio.h
@@ -133,7 +133,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
 #define __io_br()	do {} while (0)
 #define __io_ar(v)	__asm__ __volatile__ ("fence i,r" : : : "memory")
 #define __io_bw()	__asm__ __volatile__ ("fence w,o" : : : "memory")
-#define __io_aw()	mmiowb_set_pending()
+#define __io_aw()	__asm__ __volatile__ ("fence o,w" : : : "memory")

 #define readb(c)	({ u8  __v; __io_br(); __v = readb_cpu(c); __io_ar(__v); __v; })
 #define readw(c)	({ u16 __v; __io_br(); __v = readw_cpu(c); __io_ar(__v); __v; })
--- a/arch/riscv/include/asm/mmiowb.h
+++ b/arch/riscv/include/asm/mmiowb.h
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-
-#ifndef _ASM_RISCV_MMIOWB_H
-#define _ASM_RISCV_MMIOWB_H
-
-/*
- * "o,w" is sufficient to ensure that all writes to the device have completed
- * before the write to the spinlock is allowed to commit.
- */
-#define mmiowb()	__asm__ __volatile__ ("fence o,w" : : : "memory");
-
-#include <linux/smp.h>
-#include <asm-generic/mmiowb.h>
-
-#endif	/* _ASM_RISCV_MMIOWB_H */
--- a/arch/riscv/include/asm/spinlock.h
+++ b/arch/riscv/include/asm/spinlock.h
@@ -1,92 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0 */

-/*
- * 'Generic' ticket-lock implementation.
- *
- * It relies on atomic_fetch_add() having well defined forward progress
- * guarantees under contention. If your architecture cannot provide this, stick
- * to a test-and-set lock.
- *
- * It also relies on atomic_fetch_add() being safe vs smp_store_release() on a
- * sub-word of the value. This is generally true for anything LL/SC although
- * you'd be hard pressed to find anything useful in architecture specifications
- * about this. If your architecture cannot do this you might be better off with
- * a test-and-set.
- *
- * It further assumes atomic_*_release() + atomic_*_acquire() is RCpc and hence
- * uses atomic_fetch_add() which is RCsc to create an RCsc hot path, along with
- * a full fence after the spin to upgrade the otherwise-RCpc
- * atomic_cond_read_acquire().
- *
- * The implementation uses smp_cond_load_acquire() to spin, so if the
- * architecture has WFE like instructions to sleep instead of poll for word
- * modifications be sure to implement that (see ARM64 for example).
- *
- */
-
 #ifndef __ASM_GENERIC_SPINLOCK_H
 #define __ASM_GENERIC_SPINLOCK_H

-#include <linux/atomic.h>
-#include <asm/spinlock_types.h>
-
-static __always_inline void arch_spin_lock(arch_spinlock_t *lock)
-{
-	u32 val = atomic_fetch_add(1<<16, lock);
-	u16 ticket = val >> 16;
-
-	if (ticket == (u16)val)
-		return;
-
-	/*
-	 * atomic_cond_read_acquire() is RCpc, but rather than defining a
-	 * custom cond_read_rcsc() here we just emit a full fence.  We only
-	 * need the prior reads before subsequent writes ordering from
-	 * smb_mb(), but as atomic_cond_read_acquire() just emits reads and we
-	 * have no outstanding writes due to the atomic_fetch_add() the extra
-	 * orderings are free.
-	 */
-	atomic_cond_read_acquire(lock, ticket == (u16)VAL);
-	smp_mb();
-}
-
-static __always_inline bool arch_spin_trylock(arch_spinlock_t *lock)
-{
-	u32 old = atomic_read(lock);
-
-	if ((old >> 16) != (old & 0xffff))
-		return false;
-
-	return atomic_try_cmpxchg(lock, &old, old + (1<<16)); /* SC, for RCsc */
-}
-
-static __always_inline void arch_spin_unlock(arch_spinlock_t *lock)
-{
-	u16 *ptr = (u16 *)lock + IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
-	u32 val = atomic_read(lock);
-
-	smp_store_release(ptr, (u16)val + 1);
-}
-
-static __always_inline int arch_spin_is_locked(arch_spinlock_t *lock)
-{
-	u32 val = atomic_read(lock);
-
-	return ((val >> 16) != (val & 0xffff));
-}
-
-static __always_inline int arch_spin_is_contended(arch_spinlock_t *lock)
-{
-	u32 val = atomic_read(lock);
-
-	return (s16)((val >> 16) - (val & 0xffff)) > 1;
-}
-
-static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
-{
-	return !arch_spin_is_locked(&lock);
-}
-
+#include <asm-generic/qspinlock.h>
 #include <asm/qrwlock.h>

 #endif /* __ASM_GENERIC_SPINLOCK_H */
--- a/arch/riscv/include/asm/spinlock_types.h
+++ b/arch/riscv/include/asm/spinlock_types.h
@@ -3,15 +3,7 @@
 #ifndef __ASM_GENERIC_SPINLOCK_TYPES_H
 #define __ASM_GENERIC_SPINLOCK_TYPES_H

-#include <linux/types.h>
-typedef atomic_t arch_spinlock_t;
-
-/*
- * qrwlock_types depends on arch_spinlock_t, so we must typedef that before the
- * include.
- */
-#include <asm/qrwlock_types.h>
-
-#define __ARCH_SPIN_LOCK_UNLOCKED	ATOMIC_INIT(0)
+#include <asm-generic/qspinlock_types.h>
+#include <asm-generic/qrwlock_types.h>

 #endif /* __ASM_GENERIC_SPINLOCK_TYPES_H */
--- a/arch/riscv/kernel/machine_kexec.c
+++ b/arch/riscv/kernel/machine_kexec.c
@@ -179,9 +179,10 @@ machine_crash_shutdown(struct pt_regs *regs)
 {
 	local_irq_disable();

+#ifdef CONFIG_SMP
 	/* shutdown non-crashing cpus */
 	crash_smp_send_stop();
-
+#endif
 	crash_save_cpu(regs, smp_processor_id());
 	machine_kexec_mask_interrupts();

@@ -211,8 +212,10 @@ machine_kexec(struct kimage *image)
 	void *control_code_buffer = page_address(image->control_code_page);
 	riscv_kexec_method kexec_method = NULL;

+#ifdef CONFIG_SMP
 	WARN(smp_crash_stop_failed(),
 		"Some CPUs may be stale, kdump will be unreliable.\n");
+#endif

 	if (image->type != KEXEC_TYPE_CRASH)
 		kexec_method = control_code_buffer;
--- a/arch/riscv/kernel/perf_callchain.c
+++ b/arch/riscv/kernel/perf_callchain.c
@@ -75,13 +75,13 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry,
 		fp = user_backtrace(entry, fp, 0);
 }

-bool fill_callchain(unsigned long pc, void *entry)
+bool fill_callchain(unsigned long pc, unsigned long regs, void *entry)
 {
 	return perf_callchain_store(entry, pc) == 0;
 }

 void notrace walk_stackframe(struct task_struct *task,
-	struct pt_regs *regs, bool (*fn)(unsigned long, void *), void *arg);
+	struct pt_regs *regs, bool (*fn)(unsigned long, unsigned long, void *), void *arg);
 void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry,
 			   struct pt_regs *regs)
 {
--- a/arch/riscv/kernel/probes/decode-insn.c
+++ b/arch/riscv/kernel/probes/decode-insn.c
@@ -38,11 +38,10 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api)
 	RISCV_INSN_REJECTED(c_ebreak,		insn);
 #endif

-	RISCV_INSN_REJECTED(auipc,		insn);
-	RISCV_INSN_REJECTED(branch,		insn);
-
 	RISCV_INSN_SET_SIMULATE(jal,		insn);
 	RISCV_INSN_SET_SIMULATE(jalr,		insn);
+	RISCV_INSN_SET_SIMULATE(auipc,		insn);
+	RISCV_INSN_SET_SIMULATE(branch,		insn);

 	return INSN_GOOD;
 }
--- a/arch/riscv/kernel/probes/kprobes.c
+++ b/arch/riscv/kernel/probes/kprobes.c
@@ -46,6 +46,21 @@ static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
 	post_kprobe_handler(kcb, regs);
 }

+static bool __kprobes arch_check_kprobe(struct kprobe *p)
+{
+	unsigned long tmp  = (unsigned long)p->addr - p->offset;
+	unsigned long addr = (unsigned long)p->addr;
+
+	while (tmp <= addr) {
+		if (tmp == addr)
+			return true;
+
+		tmp += GET_INSN_LENGTH(*(u16 *)tmp);
+	}
+
+	return false;
+}
+
 int __kprobes arch_prepare_kprobe(struct kprobe *p)
 {
 	unsigned long probe_addr = (unsigned long)p->addr;
@@ -56,6 +71,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
 		return -EINVAL;
 	}

+	if (!arch_check_kprobe(p))
+		return -EILSEQ;
+
 	/* copy instruction */
 	p->opcode = le32_to_cpu(*p->addr);

--- a/arch/riscv/kernel/probes/simulate-insn.c
+++ b/arch/riscv/kernel/probes/simulate-insn.c
@@ -83,3 +83,115 @@ bool __kprobes simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *reg

 	return ret;
 }
+
+#define auipc_rd_idx(opcode) \
+	((opcode >> 7) & 0x1f)
+
+#define auipc_imm(opcode) \
+	((((opcode) >> 12) & 0xfffff) << 12)
+
+#if __riscv_xlen == 64
+#define auipc_offset(opcode)	sign_extend64(auipc_imm(opcode), 31)
+#elif __riscv_xlen == 32
+#define auipc_offset(opcode)	auipc_imm(opcode)
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
+bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *regs)
+{
+	/*
+	 * auipc instruction:
+	 *  31        12 11 7 6      0
+	 * | imm[31:12] | rd | opcode |
+	 *        20       5     7
+	 */
+
+	u32 rd_idx = auipc_rd_idx(opcode);
+	unsigned long rd_val = addr + auipc_offset(opcode);
+
+	if (!rv_insn_reg_set_val(regs, rd_idx, rd_val))
+		return false;
+
+	instruction_pointer_set(regs, addr + 4);
+
+	return true;
+}
+
+#define branch_rs1_idx(opcode) \
+	(((opcode) >> 15) & 0x1f)
+
+#define branch_rs2_idx(opcode) \
+	(((opcode) >> 20) & 0x1f)
+
+#define branch_funct3(opcode) \
+	(((opcode) >> 12) & 0x7)
+
+#define branch_imm(opcode) \
+	(((((opcode) >>  8) & 0xf ) <<  1) | \
+	 ((((opcode) >> 25) & 0x3f) <<  5) | \
+	 ((((opcode) >>  7) & 0x1 ) << 11) | \
+	 ((((opcode) >> 31) & 0x1 ) << 12))
+
+#define branch_offset(opcode) \
+	sign_extend32((branch_imm(opcode)), 12)
+
+#define BRANCH_BEQ	0x0
+#define BRANCH_BNE	0x1
+#define BRANCH_BLT	0x4
+#define BRANCH_BGE	0x5
+#define BRANCH_BLTU	0x6
+#define BRANCH_BGEU	0x7
+
+bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *regs)
+{
+	/*
+	 * branch instructions:
+	 *      31    30       25 24 20 19 15 14    12 11       8    7      6      0
+	 * | imm[12] | imm[10:5] | rs2 | rs1 | funct3 | imm[4:1] | imm[11] | opcode |
+	 *     1           6        5     5      3         4         1         7
+	 *     imm[12|10:5]        rs2   rs1    000       imm[4:1|11]       1100011  BEQ
+	 *     imm[12|10:5]        rs2   rs1    001       imm[4:1|11]       1100011  BNE
+	 *     imm[12|10:5]        rs2   rs1    100       imm[4:1|11]       1100011  BLT
+	 *     imm[12|10:5]        rs2   rs1    101       imm[4:1|11]       1100011  BGE
+	 *     imm[12|10:5]        rs2   rs1    110       imm[4:1|11]       1100011  BLTU
+	 *     imm[12|10:5]        rs2   rs1    111       imm[4:1|11]       1100011  BGEU
+	 */
+
+	s32 offset;
+	s32 offset_tmp;
+	unsigned long rs1_val;
+	unsigned long rs2_val;
+
+	if (!rv_insn_reg_get_val(regs, branch_rs1_idx(opcode), &rs1_val) ||
+	    !rv_insn_reg_get_val(regs, branch_rs2_idx(opcode), &rs2_val))
+		return false;
+
+	offset_tmp = branch_offset(opcode);
+	switch (branch_funct3(opcode)) {
+	case BRANCH_BEQ:
+		offset = (rs1_val == rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BNE:
+		offset = (rs1_val != rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BLT:
+		offset = ((long)rs1_val < (long)rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BGE:
+		offset = ((long)rs1_val >= (long)rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BLTU:
+		offset = (rs1_val < rs2_val) ? offset_tmp : 4;
+		break;
+	case BRANCH_BGEU:
+		offset = (rs1_val >= rs2_val) ? offset_tmp : 4;
+		break;
+	default:
+		return false;
+	}
+
+	instruction_pointer_set(regs, addr + offset);
+
+	return true;
+}
--- a/arch/riscv/kernel/vector.S
+++ b/arch/riscv/kernel/vector.S
@@ -20,14 +20,6 @@
 #include <asm/csr.h>
 #include <asm/asm-offsets.h>

-#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
-#define V_ST	vse8.v
-#define V_LD	vle8.v
-#else
-#define V_ST	vsb.v
-#define V_LD	vlb.v
-#endif
-
 ENTRY(__vstate_save)
 	li	a2,  TASK_THREAD_V0
 	add	a0,  a0, a2
@@ -46,81 +38,14 @@ ENTRY(__vstate_save)
 	csrr	t0,  CSR_VTYPE
 	sd	t0,  TASK_THREAD_VTYPE_V0(a0)

-#ifdef CONFIG_VLEN_256
-	vsetvli	t0, x0, e8,m1
-	V_ST	v0,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v1,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v2,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v3,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v4,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v5,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v6,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v7,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v8,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v9,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v10, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v11, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v12, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v13, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v14, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v15, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v16, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v17, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v18, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v19, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v20, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v21, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v22, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v23, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v24, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v25, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v26, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v27, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v28, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v29, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v30, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v31, (a0)
-#else
-	vsetvli	t0, x0, e8,m8
-	V_ST	v0,  (a0)
+	.word 0x003072d7 	/* vsetvli	t0, x0, e8,m8 	*/
+	.word 0x02050027 	/* vsb.v	v0,  (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v8,  (a0)
+	.word 0x02050427 	/* vsb.v	v8,  (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v16, (a0)
+	.word 0x02050827 	/* vsb.v	v16, (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v24, (a0)
-#endif
+	.word 0x02050c27 	/* vsb.v	v24, (a0) 	*/

 	csrc	sstatus, t1
 	ret
@@ -134,81 +59,14 @@ ENTRY(__vstate_restore)
 	li	t1, (SR_VS | SR_FS)
 	csrs	sstatus, t1

-#ifdef CONFIG_VLEN_256
-	vsetvli	t0, x0, e8,m1
-	V_LD	v0,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v1,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v2,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v3,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v4,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v5,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v6,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v7,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v8,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v9,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v10, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v11, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v12, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v13, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v14, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v15, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v16, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v17, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v18, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v19, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v20, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v21, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v22, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v23, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v24, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v25, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v26, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v27, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v28, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v29, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v30, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v31, (a0)
-#else
-	vsetvli	t0, x0, e8,m8
-	V_LD	v0,  (a0)
+	.word 0x003072d7	/* vsetvli	t0, x0, e8,m8 	*/
+	.word 0x12050007	/* vlb.v	v0,  (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v8,  (a0)
+	.word 0x12050407	/* vlb.v	v8,  (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v16, (a0)
+	.word 0x12050807 	/* vlb.v	v16, (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v24, (a0)
-#endif
+	.word 0x12050c07	/* vlb.v	v24, (a0)	*/

 	mv	a0,  t2
 	ld	t0,  TASK_THREAD_VSTART_V0(a0)
@@ -219,16 +77,9 @@ ENTRY(__vstate_restore)
 	csrw	CSR_VXRM, t0
 	ld	t0,  TASK_THREAD_VL_V0(a0)
 	ld	t2,  TASK_THREAD_VTYPE_V0(a0)
-#ifdef CONFIG_VECTOR_EMU
-	srli	t3, t2, 63
-	bne	t3,zero,1f
-#endif
-	vsetvl	t3, t0, t2
-#ifdef CONFIG_VECTOR_EMU
-	j	2f
-1:	vsetvli zero,zero,e64,m2,d1
-2:
-#endif
+
+	.word 0x8072fe57 	/* vsetvl	t3, t0, t2	*/
+
 	csrc	sstatus, t1
 	ret
 ENDPROC(__vstate_restore)
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -8,6 +8,7 @@ source "drivers/eisa/Kconfig"
 source "drivers/pci/Kconfig"
 source "drivers/pcmcia/Kconfig"
 source "drivers/rapidio/Kconfig"
+source "drivers/nna/Kconfig"


 source "drivers/base/Kconfig"
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -45,6 +45,9 @@ obj-$(CONFIG_VIRTIO)		+= virtio/
 obj-$(CONFIG_VDPA)		+= vdpa/
 obj-$(CONFIG_XEN)		+= xen/

+# npu-ax3386-gpl driver
+obj-y				+= nna/
+
 # regulators early, since some subsystems rely on them to initialize
 obj-$(CONFIG_REGULATOR)		+= regulator/

--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -115,14 +115,6 @@ config BT_HCIUART_H4

 	  Say Y here to compile support for HCI UART (H4) protocol.

-config BT_HCIUART_RTL3WIRE
-	bool "Realtek Three-wire UART (H5) protocol support"
-	depends on BT_HCIUART
-	help
-		Realtek Three-wire UART (H5) transport layer makes it possible
-		to use Realtek Bluetooth controller with Three-wire UART.
-		Say Y here to compile support for Realtek Three-wire UART.
-
 config BT_HCIUART_NOKIA
 	tristate "UART Nokia H4+ protocol support"
 	depends on BT_HCIUART
--- a/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
@@ -45,6 +45,4 @@ hci_uart-$(CONFIG_BT_HCIUART_BCM)	+= hci_bcm.o
 hci_uart-$(CONFIG_BT_HCIUART_QCA)	+= hci_qca.o
 hci_uart-$(CONFIG_BT_HCIUART_AG6XX)	+= hci_ag6xx.o
 hci_uart-$(CONFIG_BT_HCIUART_MRVL)	+= hci_mrvl.o
-hci_uart-y += rtk_coex.o
-hci_uart-$(CONFIG_BT_HCIUART_RTL3WIRE) += hci_rtk_h5.o
 hci_uart-objs				:= $(hci_uart-y)
--- a/drivers/bluetooth/hci_bcm.c
+++ b/drivers/bluetooth/hci_bcm.c
@@ -654,7 +654,6 @@ static const struct h4_recv_pkt bcm_recv_pkts[] = {
 	{ H4_RECV_ACL,      .recv = hci_recv_frame },
 	{ H4_RECV_SCO,      .recv = hci_recv_frame },
 	{ H4_RECV_EVENT,    .recv = hci_recv_frame },
-	{ H4_RECV_ISO,      .recv = hci_recv_frame },
 	{ BCM_RECV_LM_DIAG, .recv = hci_recv_diag  },
 	{ BCM_RECV_NULL,    .recv = hci_recv_diag  },
 	{ BCM_RECV_TYPE49,  .recv = hci_recv_diag  },
--- a/drivers/bluetooth/hci_h4.c
+++ b/drivers/bluetooth/hci_h4.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
 /*
 *
 *  Bluetooth HCI UART driver
@@ -5,25 +6,10 @@
 *  Copyright (C) 2000-2001  Qualcomm Incorporated
 *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
 *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
 */

 #include <linux/module.h>
+
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/types.h>
@@ -31,6 +17,7 @@
 #include <linux/interrupt.h>
 #include <linux/ptrace.h>
 #include <linux/poll.h>
+
 #include <linux/slab.h>
 #include <linux/tty.h>
 #include <linux/errno.h>
@@ -38,32 +25,18 @@
 #include <linux/signal.h>
 #include <linux/ioctl.h>
 #include <linux/skbuff.h>
+#include <asm/unaligned.h>
+
 #include <net/bluetooth/bluetooth.h>
 #include <net/bluetooth/hci_core.h>
-#include <linux/version.h>

 #include "hci_uart.h"

-#ifdef BTCOEX
-#include "rtk_coex.h"
-#endif
-
-//#define VERSION "1.2"
-
 struct h4_struct {
-	unsigned long rx_state;
-	unsigned long rx_count;
 	struct sk_buff *rx_skb;
 	struct sk_buff_head txq;
 };

-/* H4 receiver States */
-#define H4_W4_PACKET_TYPE	0
-#define H4_W4_EVENT_HDR		1
-#define H4_W4_ACL_HDR		2
-#define H4_W4_SCO_HDR		3
-#define H4_W4_DATA		4
-
 /* Initialize protocol */
 static int h4_open(struct hci_uart *hu)
 {
@@ -71,7 +44,7 @@ static int h4_open(struct hci_uart *hu)

 	BT_DBG("hu %p", hu);

-	h4 = kzalloc(sizeof(*h4), GFP_ATOMIC);
+	h4 = kzalloc(sizeof(*h4), GFP_KERNEL);
 	if (!h4)
 		return -ENOMEM;

@@ -98,8 +71,6 @@ static int h4_close(struct hci_uart *hu)
 {
 	struct h4_struct *h4 = hu->priv;

-	hu->priv = NULL;
-
 	BT_DBG("hu %p", hu);

 	skb_queue_purge(&h4->txq);
@@ -112,7 +83,7 @@ static int h4_close(struct hci_uart *hu)
 	return 0;
 }

-/* Enqueue frame for transmittion (padding, crc, etc) */
+/* Enqueue frame for transmission (padding, crc, etc) */
 static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 {
 	struct h4_struct *h4 = hu->priv;
@@ -120,174 +91,34 @@ static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 	BT_DBG("hu %p skb %p", hu, skb);

 	/* Prepend skb with frame type */
-	memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
+	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
 	skb_queue_tail(&h4->txq, skb);

 	return 0;
 }

-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-static inline int h4_check_data_len(struct h4_struct *h4, int len)
-#else
-static inline int h4_check_data_len(struct hci_dev *hdev, struct h4_struct *h4, int len)
-#endif
-{
-	register int room = skb_tailroom(h4->rx_skb);
-
-	BT_DBG("len %d room %d", len, room);
-
-	if (!len) {
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-		hci_recv_frame(h4->rx_skb);
-#else
-		hci_recv_frame(hdev, h4->rx_skb);
-#endif
-	} else if (len > room) {
-		BT_ERR("Data length is too large");
-		kfree_skb(h4->rx_skb);
-	} else {
-		h4->rx_state = H4_W4_DATA;
-		h4->rx_count = len;
-		return len;
-	}
-
-	h4->rx_state = H4_W4_PACKET_TYPE;
-	h4->rx_skb   = NULL;
-	h4->rx_count = 0;
-
-	return 0;
-}
+static const struct h4_recv_pkt h4_recv_pkts[] = {
+	{ H4_RECV_ACL,   .recv = hci_recv_frame },
+	{ H4_RECV_SCO,   .recv = hci_recv_frame },
+	{ H4_RECV_EVENT, .recv = hci_recv_frame },
+	{ H4_RECV_ISO,   .recv = hci_recv_frame },
+};

 /* Recv data */
-static int h4_recv(struct hci_uart *hu, void *data, int count)
+static int h4_recv(struct hci_uart *hu, const void *data, int count)
 {
 	struct h4_struct *h4 = hu->priv;
-	register char *ptr;
-	struct hci_event_hdr *eh;
-	struct hci_acl_hdr   *ah;
-	struct hci_sco_hdr   *sh;
-	register int len, type, dlen;

-	BT_DBG("hu %p count %d rx_state %ld rx_count %ld", 
-			hu, count, h4->rx_state, h4->rx_count);
+	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
+		return -EUNATCH;

-	ptr = data;
-	while (count) {
-		if (h4->rx_count) {
-			len = min_t(unsigned int, h4->rx_count, count);
-			memcpy(skb_put(h4->rx_skb, len), ptr, len);
-			h4->rx_count -= len; count -= len; ptr += len;
-
-			if (h4->rx_count)
-				continue;
-
-			switch (h4->rx_state) {
-			case H4_W4_DATA:
-				BT_DBG("Complete data");
-#ifdef BTCOEX
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_EVENT_PKT)
-					rtk_btcoex_parse_event(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
-					rtk_btcoex_parse_l2cap_data_rx(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-#endif
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				hci_recv_frame(h4->rx_skb);
-#else
-				hci_recv_frame(hu->hdev, h4->rx_skb);
-#endif
-
-				h4->rx_state = H4_W4_PACKET_TYPE;
-				h4->rx_skb = NULL;
-				continue;
-
-			case H4_W4_EVENT_HDR:
-				eh = hci_event_hdr(h4->rx_skb);
-
-				BT_DBG("Event header: evt 0x%2.2x plen %d", eh->evt, eh->plen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, eh->plen);
-#else
-				h4_check_data_len(hu->hdev, h4, eh->plen);
-#endif
-				continue;
-
-			case H4_W4_ACL_HDR:
-				ah = hci_acl_hdr(h4->rx_skb);
-				dlen = __le16_to_cpu(ah->dlen);
-
-				BT_DBG("ACL header: dlen %d", dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, dlen);
-#endif
-				continue;
-
-			case H4_W4_SCO_HDR:
-				sh = hci_sco_hdr(h4->rx_skb);
-
-				BT_DBG("SCO header: dlen %d", sh->dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, sh->dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, sh->dlen);
-#endif
-				continue;
-			}
-		}
-
-		/* H4_W4_PACKET_TYPE */
-		switch (*ptr) {
-		case HCI_EVENT_PKT:
-			BT_DBG("Event packet");
-			h4->rx_state = H4_W4_EVENT_HDR;
-			h4->rx_count = HCI_EVENT_HDR_SIZE;
-			type = HCI_EVENT_PKT;
-			break;
-
-		case HCI_ACLDATA_PKT:
-			BT_DBG("ACL packet");
-			h4->rx_state = H4_W4_ACL_HDR;
-			h4->rx_count = HCI_ACL_HDR_SIZE;
-			type = HCI_ACLDATA_PKT;
-			break;
-
-		case HCI_SCODATA_PKT:
-			BT_DBG("SCO packet");
-			h4->rx_state = H4_W4_SCO_HDR;
-			h4->rx_count = HCI_SCO_HDR_SIZE;
-			type = HCI_SCODATA_PKT;
-			break;
-
-		default:
-			BT_ERR("Unknown HCI packet type %2.2x", (__u8)*ptr);
-			hu->hdev->stat.err_rx++;
-			ptr++; count--;
-			continue;
-		};
-
-		ptr++; count--;
-
-		/* Allocate packet */
-		h4->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
-		if (!h4->rx_skb) {
-			BT_ERR("Can't allocate mem for new packet");
-			h4->rx_state = H4_W4_PACKET_TYPE;
-			h4->rx_count = 0;
-			return -ENOMEM;
-		}
-
-		h4->rx_skb->dev = (void *) hu->hdev;
-		bt_cb(h4->rx_skb)->pkt_type = type;
+	h4->rx_skb = h4_recv_buf(hu->hdev, h4->rx_skb, data, count,
+				 h4_recv_pkts, ARRAY_SIZE(h4_recv_pkts));
+	if (IS_ERR(h4->rx_skb)) {
+		int err = PTR_ERR(h4->rx_skb);
+		bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
+		h4->rx_skb = NULL;
+		return err;
 	}

 	return count;
@@ -299,8 +130,9 @@ static struct sk_buff *h4_dequeue(struct hci_uart *hu)
 	return skb_dequeue(&h4->txq);
 }

-static struct hci_uart_proto h4p = {
+static const struct hci_uart_proto h4p = {
 	.id		= HCI_UART_H4,
+	.name		= "H4",
 	.open		= h4_open,
 	.close		= h4_close,
 	.recv		= h4_recv,
@@ -311,17 +143,132 @@ static struct hci_uart_proto h4p = {

 int __init h4_init(void)
 {
-	int err = hci_uart_register_proto(&h4p);
-
-	if (!err)
-		BT_INFO("HCI H4 protocol initialized");
-	else
-		BT_ERR("HCI H4 protocol registration failed");
-
-	return err;
+	return hci_uart_register_proto(&h4p);
 }

 int __exit h4_deinit(void)
 {
 	return hci_uart_unregister_proto(&h4p);
 }
+
+struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
+			    const unsigned char *buffer, int count,
+			    const struct h4_recv_pkt *pkts, int pkts_count)
+{
+	struct hci_uart *hu = hci_get_drvdata(hdev);
+	u8 alignment = hu->alignment ? hu->alignment : 1;
+
+	/* Check for error from previous call */
+	if (IS_ERR(skb))
+		skb = NULL;
+
+	while (count) {
+		int i, len;
+
+		/* remove padding bytes from buffer */
+		for (; hu->padding && count > 0; hu->padding--) {
+			count--;
+			buffer++;
+		}
+		if (!count)
+			break;
+
+		if (!skb) {
+			for (i = 0; i < pkts_count; i++) {
+				if (buffer[0] != (&pkts[i])->type)
+					continue;
+
+				skb = bt_skb_alloc((&pkts[i])->maxlen,
+						   GFP_ATOMIC);
+				if (!skb)
+					return ERR_PTR(-ENOMEM);
+
+				hci_skb_pkt_type(skb) = (&pkts[i])->type;
+				hci_skb_expect(skb) = (&pkts[i])->hlen;
+				break;
+			}
+
+			/* Check for invalid packet type */
+			if (!skb)
+				return ERR_PTR(-EILSEQ);
+
+			count -= 1;
+			buffer += 1;
+		}
+
+		len = min_t(uint, hci_skb_expect(skb) - skb->len, count);
+		skb_put_data(skb, buffer, len);
+
+		count -= len;
+		buffer += len;
+
+		/* Check for partial packet */
+		if (skb->len < hci_skb_expect(skb))
+			continue;
+
+		for (i = 0; i < pkts_count; i++) {
+			if (hci_skb_pkt_type(skb) == (&pkts[i])->type)
+				break;
+		}
+
+		if (i >= pkts_count) {
+			kfree_skb(skb);
+			return ERR_PTR(-EILSEQ);
+		}
+
+		if (skb->len == (&pkts[i])->hlen) {
+			u16 dlen;
+
+			switch ((&pkts[i])->lsize) {
+			case 0:
+				/* No variable data length */
+				dlen = 0;
+				break;
+			case 1:
+				/* Single octet variable length */
+				dlen = skb->data[(&pkts[i])->loff];
+				hci_skb_expect(skb) += dlen;
+
+				if (skb_tailroom(skb) < dlen) {
+					kfree_skb(skb);
+					return ERR_PTR(-EMSGSIZE);
+				}
+				break;
+			case 2:
+				/* Double octet variable length */
+				dlen = get_unaligned_le16(skb->data +
+							  (&pkts[i])->loff);
+				hci_skb_expect(skb) += dlen;
+
+				if (skb_tailroom(skb) < dlen) {
+					kfree_skb(skb);
+					return ERR_PTR(-EMSGSIZE);
+				}
+				break;
+			default:
+				/* Unsupported variable length */
+				kfree_skb(skb);
+				return ERR_PTR(-EILSEQ);
+			}
+
+			if (!dlen) {
+				hu->padding = (skb->len - 1) % alignment;
+				hu->padding = (alignment - hu->padding) % alignment;
+
+				/* No more data, complete frame */
+				(&pkts[i])->recv(hdev, skb);
+				skb = NULL;
+			}
+		} else {
+			hu->padding = (skb->len - 1) % alignment;
+			hu->padding = (alignment - hu->padding) % alignment;
+
+			/* Complete frame */
+			(&pkts[i])->recv(hdev, skb);
+			skb = NULL;
+		}
+	}
+
+	return skb;
+}
+EXPORT_SYMBOL_GPL(h4_recv_buf);
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
--- a/drivers/bluetooth/hci_rtk_h5.c
+++ b/drivers/bluetooth/hci_rtk_h5.c
@@ -1,908 +0,0 @@
-/*
- *
- *  Bluetooth HCI UART driver
- *
- *  Copyright (C) 2011-2014  wifi_fae<wifi_fae@realtek.com.tw>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/interrupt.h>
-#include <linux/ptrace.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/tty.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/signal.h>
-#include <linux/ioctl.h>
-#include <linux/skbuff.h>
-#include <linux/bitrev.h>
-#include <asm/unaligned.h>
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-#include <linux/version.h>
-
-#include "hci_uart.h"
-
-#ifdef BTCOEX
-#include "rtk_coex.h"
-#endif
-
-//#define VERSION "1.0"
-
-static int txcrc = 1;
-//static int hciextn = 1;
-
-#define H5_TXWINSIZE	4
-#define H5_ACK_PKT	0x00
-#define H5_LE_PKT	    0x0F
-#define H5_VDRSPEC_PKT	0x0E
-
-struct h5_struct {
-	struct sk_buff_head unack;	/* Unack'ed packets queue */
-	struct sk_buff_head rel;	/* Reliable packets queue */
-	struct sk_buff_head unrel;	/* Unreliable packets queue */
-
-	unsigned long rx_count;
-	struct sk_buff *rx_skb;
-	struct delayed_work	retrans_work;
-	struct hci_uart		*hu;		/* Parent HCI UART */
-
-	enum {
-		H5_W4_PKT_DELIMITER,
-		H5_W4_PKT_START,
-		H5_W4_HDR,
-		H5_W4_DATA,
-		H5_W4_CRC
-	} rx_state;
-
-	enum {
-		H5_ESCSTATE_NOESC,
-		H5_ESCSTATE_ESC
-	} rx_esc_state;
-
-	u16 message_crc;
-	u8 use_crc;
-	u8 rxack;		/* Last packet sent by us that the peer ack'ed */
-
-	u8 rxseq_txack;		/* rxseq == txack. */
-	u8 txack_req;		/* Do we need to send ack's to the peer? */
-	/* Reliable packet sequence number - used to assign seq to each rel pkt. */
-	u8 msgq_txseq;
-
-	/* The spin lock protects seq, ack and ack req */
-	spinlock_t lock;
-};
-
-/* ---- H5 CRC calculation ---- */
-
-/* Table for calculating CRC for polynomial 0x1021, LSB processed first,
-initial value 0xffff, bits shifted in reverse order. */
-
-static const u16 crc_table[] = {
-	0x0000, 0x1081, 0x2102, 0x3183,
-	0x4204, 0x5285, 0x6306, 0x7387,
-	0x8408, 0x9489, 0xa50a, 0xb58b,
-	0xc60c, 0xd68d, 0xe70e, 0xf78f
-};
-
-/* Initialise the crc calculator */
-#define H5_CRC_INIT(x) x = 0xffff
-
-/*
-   Update crc with next data byte
-
-   Implementation note
-        The data byte is treated as two nibbles.  The crc is generated
-        in reverse, i.e., bits are fed into the register from the top.
-*/
-static void h5_crc_update(u16 * crc, u8 d)
-{
-	u16 reg = *crc;
-
-	reg = (reg >> 4) ^ crc_table[(reg ^ d) & 0x000f];
-	reg = (reg >> 4) ^ crc_table[(reg ^ (d >> 4)) & 0x000f];
-
-	*crc = reg;
-}
-
-/* ---- H5 core ---- */
-
-static void h5_slip_msgdelim(struct sk_buff *skb)
-{
-	const char pkt_delim = 0xc0;
-
-	memcpy(skb_put(skb, 1), &pkt_delim, 1);
-}
-
-static void h5_slip_one_byte(struct sk_buff *skb, u8 c)
-{
-	const char esc_c0[2] = { 0xdb, 0xdc };
-	const char esc_db[2] = { 0xdb, 0xdd };
-	const char esc_11[2] = { 0xdb, 0xde };
-	const char esc_13[2] = { 0xdb, 0xdf };
-
-	switch (c) {
-	case 0xc0:
-		memcpy(skb_put(skb, 2), &esc_c0, 2);
-		break;
-	case 0xdb:
-		memcpy(skb_put(skb, 2), &esc_db, 2);
-		break;
-	case 0x11:
-		memcpy(skb_put(skb, 2), &esc_11, 2);
-		break;
-	case 0x13:
-		memcpy(skb_put(skb, 2), &esc_13, 2);
-		break;
-	default:
-		memcpy(skb_put(skb, 1), &c, 1);
-	}
-}
-
-static int h5_enqueue(struct hci_uart *hu, struct sk_buff *skb)
-{
-	struct h5_struct *h5 = hu->priv;
-
-	if (skb->len > 0xFFF) {	//Pkt length must be less than 4095 bytes
-		BT_ERR("Packet too long");
-		kfree_skb(skb);
-		return 0;
-	}
-
-	switch (bt_cb(skb)->pkt_type) {
-	case HCI_ACLDATA_PKT:
-	case HCI_COMMAND_PKT:
-		skb_queue_tail(&h5->rel, skb);
-		break;
-
-	case HCI_SCODATA_PKT:
-		skb_queue_tail(&h5->unrel, skb);
-		break;
-	case H5_LE_PKT:
-	case H5_ACK_PKT:
-	case H5_VDRSPEC_PKT:
-		skb_queue_tail(&h5->unrel, skb);	/* 3-wire LinkEstablishment */
-		break;
-
-	default:
-		BT_ERR("Unknown packet type");
-		kfree_skb(skb);
-		break;
-	}
-
-	return 0;
-}
-
-static struct sk_buff *h5_prepare_pkt(struct h5_struct *h5, u8 * data,
-				      int len, int pkt_type)
-{
-	struct sk_buff *nskb;
-	u8 hdr[4], chan;
-	u16 H5_CRC_INIT(h5_txmsg_crc);
-	int rel, i;
-	u8 tmp;
-	unsigned long flags;
-
-	switch (pkt_type) {
-	case HCI_ACLDATA_PKT:
-		chan = 2;	/* 3-wire ACL channel */
-		rel = 1;	/* reliable channel */
-		break;
-	case HCI_COMMAND_PKT:
-		chan = 1;	/* 3-wire cmd channel */
-		rel = 1;	/* reliable channel */
-		break;
-	case HCI_EVENT_PKT:
-		chan = 4;	/* 3-wire cmd channel */
-		rel = 1;	/* reliable channel */
-		break;
-	case HCI_SCODATA_PKT:
-		chan = 3;	/* 3-wire SCO channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	case H5_LE_PKT:
-		chan = 15;	/* 3-wire LinkEstablishment channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	case H5_ACK_PKT:
-		chan = 0;	/* 3-wire ACK channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	case H5_VDRSPEC_PKT:
-		chan = 14;	/* 3-wire Vendor Specific channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	default:
-		BT_ERR("Unknown packet type");
-		return NULL;
-	}
-
-	/* Max len of packet: (original len +4(h5 hdr) +2(crc))*2
-	   (because bytes 0xc0 and 0xdb are escaped, worst case is
-	   when the packet is all made of 0xc0 and 0xdb :) )
-	   + 2 (0xc0 delimiters at start and end). */
-
-	nskb = alloc_skb((len + 6) * 2 + 2, GFP_ATOMIC);
-	if (!nskb)
-		return NULL;
-
-	bt_cb(nskb)->pkt_type = pkt_type;
-
-	h5_slip_msgdelim(nskb);
-
-	spin_lock_irqsave(&h5->lock, flags);
-	tmp = h5->rxseq_txack;
-	hdr[0] = h5->rxseq_txack << 3;
-	h5->txack_req = 0;
-	spin_unlock_irqrestore(&h5->lock, flags);
-	BT_DBG("We request packet no %u to card", tmp);
-
-	if (rel) {
-		spin_lock_irqsave(&h5->lock, flags);
-		tmp = h5->msgq_txseq;
-		hdr[0] |= 0x80 + h5->msgq_txseq;
-		h5->msgq_txseq = (h5->msgq_txseq + 1) & 0x07;
-		spin_unlock_irqrestore(&h5->lock, flags);
-		BT_DBG("Sending packet with seqno %u", tmp);
-	}
-
-	if (h5->use_crc)
-		hdr[0] |= 0x40;
-
-	hdr[1] = ((len << 4) & 0xff) | chan;
-	hdr[2] = len >> 4;
-	hdr[3] = ~(hdr[0] + hdr[1] + hdr[2]);
-
-	/* Put H5 header */
-	for (i = 0; i < 4; i++) {
-		h5_slip_one_byte(nskb, hdr[i]);
-
-		if (h5->use_crc)
-			h5_crc_update(&h5_txmsg_crc, hdr[i]);
-	}
-
-	/* Put payload */
-	for (i = 0; i < len; i++) {
-		h5_slip_one_byte(nskb, data[i]);
-
-		if (h5->use_crc)
-			h5_crc_update(&h5_txmsg_crc, data[i]);
-	}
-
-	/* Put CRC */
-	if (h5->use_crc) {
-		h5_txmsg_crc = bitrev16(h5_txmsg_crc);
-		h5_slip_one_byte(nskb, (u8) ((h5_txmsg_crc >> 8) & 0x00ff));
-		h5_slip_one_byte(nskb, (u8) (h5_txmsg_crc & 0x00ff));
-	}
-
-	h5_slip_msgdelim(nskb);
-	return nskb;
-}
-
-/* This is a rewrite of pkt_avail in AH5 */
-static struct sk_buff *h5_dequeue(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-	unsigned long flags;
-	struct sk_buff *skb;
-
-	/* First of all, check for unreliable messages in the queue,
-	   since they have priority */
-
-	if ((skb = skb_dequeue(&h5->unrel)) != NULL) {
-		struct sk_buff *nskb =
-		    h5_prepare_pkt(h5, skb->data, skb->len,
-				   bt_cb(skb)->pkt_type);
-		if (nskb) {
-			kfree_skb(skb);
-			return nskb;
-		} else {
-			skb_queue_head(&h5->unrel, skb);
-			BT_ERR
-			    ("Could not dequeue pkt because alloc_skb failed");
-		}
-	}
-
-	/* Now, try to send a reliable pkt. We can only send a
-	   reliable packet if the number of packets sent but not yet ack'ed
-	   is < than the winsize */
-
-	spin_lock_irqsave_nested(&h5->unack.lock, flags, SINGLE_DEPTH_NESTING);
-
-	if (h5->unack.qlen < H5_TXWINSIZE
-	    && (skb = skb_dequeue(&h5->rel)) != NULL) {
-		struct sk_buff *nskb =
-		    h5_prepare_pkt(h5, skb->data, skb->len,
-				   bt_cb(skb)->pkt_type);
-		if (nskb) {
-			__skb_queue_tail(&h5->unack, skb);
-			schedule_delayed_work(&h5->retrans_work, HZ / 4);
-			spin_unlock_irqrestore(&h5->unack.lock, flags);
-			return nskb;
-		} else {
-			skb_queue_head(&h5->rel, skb);
-			BT_ERR
-			    ("Could not dequeue pkt because alloc_skb failed");
-		}
-	}
-
-	spin_unlock_irqrestore(&h5->unack.lock, flags);
-
-	/* We could not send a reliable packet, either because there are
-	   none or because there are too many unack'ed pkts. Did we receive
-	   any packets we have not acknowledged yet ? */
-
-	if (h5->txack_req) {
-		/* if so, craft an empty ACK pkt and send it on H5 unreliable
-		   channel 0 */
-		struct sk_buff *nskb = h5_prepare_pkt(h5, NULL, 0, H5_ACK_PKT);
-		return nskb;
-	}
-
-	/* We have nothing to send */
-	return NULL;
-}
-
-static int h5_flush(struct hci_uart *hu)
-{
-	BT_DBG("hu %p", hu);
-	return 0;
-}
-
-/* Remove ack'ed packets */
-static void h5_pkt_cull(struct h5_struct *h5)
-{
-	struct sk_buff *skb, *tmp;
-	unsigned long flags;
-	int i, pkts_to_be_removed;
-	u8 seqno;
-
-	spin_lock_irqsave(&h5->unack.lock, flags);
-
-	pkts_to_be_removed = skb_queue_len(&h5->unack);
-	seqno = h5->msgq_txseq;
-
-	while (pkts_to_be_removed) {
-		if (h5->rxack == seqno)
-			break;
-		pkts_to_be_removed--;
-		seqno = (seqno - 1) & 0x07;
-	}
-
-	if (h5->rxack != seqno)
-		BT_ERR("Peer acked invalid packet");
-
-	BT_DBG("Removing %u pkts out of %u, up to seqno %u",
-	       pkts_to_be_removed, skb_queue_len(&h5->unack),
-	       (seqno - 1) & 0x07);
-
-	i = 0;
-	skb_queue_walk_safe(&h5->unack, skb, tmp) {
-		if (i >= pkts_to_be_removed)
-			break;
-		i++;
-
-		__skb_unlink(skb, &h5->unack);
-		kfree_skb(skb);
-	}
-
-	if (skb_queue_empty(&h5->unack))
-		cancel_delayed_work(&h5->retrans_work);
-
-	spin_unlock_irqrestore(&h5->unack.lock, flags);
-
-	if (i != pkts_to_be_removed)
-		BT_ERR("Removed only %u out of %u pkts", i, pkts_to_be_removed);
-}
-
-/* Handle H5 link-establishment packets. When we
-   detect a "sync" packet, symptom that the BT module has reset,
-   we do nothing :) (yet) */
-#if 0
-static void h5_handle_le_pkt(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-	u8 conf_pkt[2] = { 0x03, 0xfc };
-	u8 conf_rsp_pkt[3] = { 0x04, 0x7b, 0x00 };
-	u8 sync_pkt[2] = { 0x01, 0x7e };
-	u8 sync_rsp_pkt[2] = { 0x02, 0x7d };
-
-	u8 wakeup_pkt[2] = { 0x05, 0xfa };
-	u8 woken_pkt[2] = { 0x06, 0xf9 };
-	u8 sleep_pkt[2] = { 0x07, 0x78 };
-
-	/* spot "conf" pkts and reply with a "conf rsp" pkt */
-	if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-	    !memcmp(&h5->rx_skb->data[4], conf_pkt, 2)) {
-		struct sk_buff *nskb = alloc_skb(3, GFP_ATOMIC);
-
-		BT_DBG("Found a LE conf pkt");
-		if (!nskb)
-			return;
-
-		conf_rsp_pkt[2] |= txcrc << 0x4;	//crc check enable, version no = 0. needed to be as avariable.
-		memcpy(skb_put(nskb, 3), conf_rsp_pkt, 3);
-		bt_cb(nskb)->pkt_type = H5_LE_PKT;
-
-		skb_queue_head(&h5->unrel, nskb);
-		hci_uart_tx_wakeup(hu);
-	}
-	/* spot "conf resp" pkts */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], conf_rsp_pkt, 2)) {
-		BT_DBG("Found a LE conf resp pkt, device go into active state");
-		txcrc = (h5->rx_skb->data[6] >> 0x4) & 0x1;
-	}
-
-	/* Spot "sync" pkts. If we find one...disaster! */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], sync_pkt, 2)) {
-		BT_ERR("Found a LE sync pkt, card has reset");
-		//DO Something here
-	}
-	/* Spot "sync resp" pkts. If we find one...disaster! */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], sync_rsp_pkt, 2)) {
-		BT_ERR
-		    ("Found a LE sync resp pkt, device go into initialized state");
-		//      DO Something here
-	}
-	/* Spot "wakeup" pkts. reply woken message when in active mode */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], wakeup_pkt, 2)) {
-		struct sk_buff *nskb = alloc_skb(2, GFP_ATOMIC);
-
-		BT_ERR("Found a LE Wakeup pkt, and reply woken message");
-		//      DO Something here
-
-		memcpy(skb_put(nskb, 2), woken_pkt, 2);
-		bt_cb(nskb)->pkt_type = H5_LE_PKT;
-
-		skb_queue_head(&h5->unrel, nskb);
-		hci_uart_tx_wakeup(hu);
-	}
-	/* Spot "woken" pkts. receive woken message from device */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], woken_pkt, 2)) {
-		BT_ERR("Found a LE woken pkt from device");
-		//      DO Something here
-	}
-	/* Spot "Sleep" pkts */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_indent: Standard input:620: Error:Unmatched 'else'
-skb->data[4], sleep_pkt, 2)) {
-		BT_ERR("Found a LE Sleep pkt");
-		//      DO Something here
-	}
-}
-#endif
-
-static inline void h5_unslip_one_byte(struct h5_struct *h5, unsigned char byte)
-{
-	const u8 c0 = 0xc0, db = 0xdb;
-	const u8 oof1 = 0x11, oof2 = 0x13;
-
-	switch (h5->rx_esc_state) {
-	case H5_ESCSTATE_NOESC:
-		switch (byte) {
-		case 0xdb:
-			h5->rx_esc_state = H5_ESCSTATE_ESC;
-			break;
-		default:
-			memcpy(skb_put(h5->rx_skb, 1), &byte, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0 &&
-			    h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, byte);
-			h5->rx_count--;
-		}
-		break;
-
-	case H5_ESCSTATE_ESC:
-		switch (byte) {
-		case 0xdc:
-			memcpy(skb_put(h5->rx_skb, 1), &c0, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0 &&
-			    h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, 0xc0);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		case 0xdd:
-			memcpy(skb_put(h5->rx_skb, 1), &db, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0 &&
-			    h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, 0xdb);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		case 0xde:
-			memcpy(skb_put(h5->rx_skb, 1), &oof1, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0
-			    && h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, oof1);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		case 0xdf:
-			memcpy(skb_put(h5->rx_skb, 1), &oof2, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0
-			    && h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, oof2);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		default:
-			BT_ERR("Invalid byte %02x after esc byte", byte);
-			kfree_skb(h5->rx_skb);
-			h5->rx_skb = NULL;
-			h5->rx_state = H5_W4_PKT_DELIMITER;
-			h5->rx_count = 0;
-		}
-	}
-}
-
-static void h5_complete_rx_pkt(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-	int pass_up;
-
-	if (h5->rx_skb->data[0] & 0x80) {	/* reliable pkt */
-		unsigned long flags;
-		u8 rxseq;
-
-		spin_lock_irqsave(&h5->lock, flags);
-		rxseq = h5->rxseq_txack;
-		h5->rxseq_txack++;
-		h5->rxseq_txack %= 0x8;
-		h5->txack_req = 1;
-		spin_unlock_irqrestore(&h5->lock, flags);
-
-		BT_DBG("Received seqno %u from card", rxseq);
-	}
-
-	h5->rxack = (h5->rx_skb->data[0] >> 3) & 0x07;
-	BT_DBG("Request for pkt %u from card", h5->rxack);
-
-	h5_pkt_cull(h5);
-
-	hci_uart_tx_wakeup(hu);
-
-	if ((h5->rx_skb->data[1] & 0x0f) == 2 && h5->rx_skb->data[0] & 0x80) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_ACLDATA_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 4 &&
-		   h5->rx_skb->data[0] & 0x80) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_EVENT_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 3) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_SCODATA_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 15 &&
-		   !(h5->rx_skb->data[0] & 0x80)) {
-		//h5_handle_le_pkt(hu);//Link Establishment Pkt
-		pass_up = 0;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 1 &&
-		   h5->rx_skb->data[0] & 0x80) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_COMMAND_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 14) {
-		bt_cb(h5->rx_skb)->pkt_type = H5_VDRSPEC_PKT;
-		pass_up = 1;
-	} else
-		pass_up = 0;
-
-	if (!pass_up) {
-		/* struct hci_event_hdr hdr; */
-		u8 desc = (h5->rx_skb->data[1] & 0x0f);
-
-		if (desc != H5_ACK_PKT && desc != H5_LE_PKT) {
-			/* if (hciextn) {
-			 * 	desc |= 0xc0;
-			 * 	skb_pull(h5->rx_skb, 4);
-			 * 	memcpy(skb_push(h5->rx_skb, 1), &desc, 1);
-
-			 * 	hdr.evt = 0xff;
-			 * 	hdr.plen = h5->rx_skb->len;
-			 * 	memcpy(skb_push(h5->rx_skb, HCI_EVENT_HDR_SIZE),
-			 * 	       &hdr, HCI_EVENT_HDR_SIZE);
-			 * 	bt_cb(h5->rx_skb)->pkt_type = HCI_EVENT_PKT;
-
-			 * 	hci_recv_frame(h5->rx_skb);
-			 * } else { */
-				BT_ERR("Packet for unknown channel (%u %s)",
-				       h5->rx_skb->data[1] & 0x0f,
-				       h5->rx_skb->data[0] & 0x80 ?
-				       "reliable" : "unreliable");
-				kfree_skb(h5->rx_skb);
-			/* } */
-		} else
-			kfree_skb(h5->rx_skb);
-	} else {
-			/* Pull out H5 hdr */
-		skb_pull(h5->rx_skb, 4);
-
-#ifdef BTCOEX
-		if (bt_cb(h5->rx_skb)->pkt_type == HCI_EVENT_PKT)
-			rtk_btcoex_parse_event(h5->rx_skb->data,
-					       h5->rx_skb->len);
-
-		if (bt_cb(h5->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
-			rtk_btcoex_parse_l2cap_data_rx(h5->rx_skb->data,
-						       h5->rx_skb->len);
-#endif
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-		hci_recv_frame(h5->rx_skb);
-#else
-		hci_recv_frame(hu->hdev, h5->rx_skb);
-#endif
-	}
-
-	h5->rx_state = H5_W4_PKT_DELIMITER;
-	h5->rx_skb = NULL;
-}
-
-static u16 bscp_get_crc(struct h5_struct *h5) {
-	return get_unaligned_be16(&h5->rx_skb->
-			data[h5->rx_skb->len - 2]);
-}
-
-/* Recv data */
-static int h5_recv(struct hci_uart *hu, void *data, int count)
-{
-	struct h5_struct *h5 = hu->priv;
-	register unsigned char *ptr;
-	u8 rxseq;
-	unsigned long flags;
-
-	BT_DBG("hu %p count %d rx_state %d rx_count %ld",
-	       hu, count, h5->rx_state, h5->rx_count);
-
-	ptr = data;
-	while (count) {
-		if (h5->rx_count) {
-			if (*ptr == 0xc0) {
-				BT_ERR("Short H5 packet");
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_START;
-				h5->rx_count = 0;
-			} else
-				h5_unslip_one_byte(h5, *ptr);
-
-			ptr++;
-			count--;
-			continue;
-		}
-
-		switch (h5->rx_state) {
-		case H5_W4_HDR:
-			if ((0xff & (u8) ~
-			     (h5->rx_skb->data[0] +
-			      h5->rx_skb->data[1] +
-			      h5->rx_skb->data[2])) != h5->rx_skb->data[3]) {
-				BT_ERR("Error in H5 hdr checksum");
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_DELIMITER;
-				h5->rx_count = 0;
-				continue;
-			}
-			rxseq = h5->rxseq_txack;
-			if (h5->rx_skb->data[0] & 0x80	/* reliable pkt */
-			    && (h5->rx_skb->data[0] & 0x07) != rxseq) {
-				BT_ERR("Out-of-order packet arrived, got %u expected %u",
-				       h5->rx_skb->data[0] & 0x07, rxseq);
-
-				spin_lock_irqsave(&h5->lock, flags);
-				h5->txack_req = 1;
-				spin_unlock_irqrestore(&h5->lock, flags);
-				hci_uart_tx_wakeup(hu);
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_DELIMITER;
-				h5->rx_count = 0;
-				continue;
-			}
-			h5->rx_state = H5_W4_DATA;
-			h5->rx_count = (h5->rx_skb->data[1] >> 4) + (h5->rx_skb->data[2] << 4);	/* May be 0 */
-			continue;
-
-		case H5_W4_DATA:
-			if (h5->rx_skb->data[0] & 0x40) {	/* pkt with crc */
-				h5->rx_state = H5_W4_CRC;
-				h5->rx_count = 2;
-			} else
-				h5_complete_rx_pkt(hu);
-			continue;
-
-		case H5_W4_CRC:
-			if (bitrev16(h5->message_crc) != bscp_get_crc(h5)) {
-				BT_ERR
-				    ("Checksum failed: computed %04x received %04x",
-				     bitrev16(h5->message_crc),
-				     bscp_get_crc(h5));
-
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_DELIMITER;
-				h5->rx_count = 0;
-				continue;
-			}
-			skb_trim(h5->rx_skb, h5->rx_skb->len - 2);
-			h5_complete_rx_pkt(hu);
-			continue;
-
-		case H5_W4_PKT_DELIMITER:
-			switch (*ptr) {
-			case 0xc0:
-				h5->rx_state = H5_W4_PKT_START;
-				break;
-			default:
-				/*BT_ERR("Ignoring byte %02x", *ptr); */
-				break;
-			}
-			ptr++;
-			count--;
-			break;
-
-		case H5_W4_PKT_START:
-			switch (*ptr) {
-			case 0xc0:
-				ptr++;
-				count--;
-				break;
-
-			default:
-				h5->rx_state = H5_W4_HDR;
-				h5->rx_count = 4;
-				h5->rx_esc_state = H5_ESCSTATE_NOESC;
-				H5_CRC_INIT(h5->message_crc);
-
-				/* Do not increment ptr or decrement count
-				 * Allocate packet. Max len of a H5 pkt= 
-				 * 0xFFF (payload) +4 (header) +2 (crc) */
-
-				h5->rx_skb = bt_skb_alloc(0x1005, GFP_ATOMIC);
-				if (!h5->rx_skb) {
-					BT_ERR
-					    ("Can't allocate mem for new packet");
-					h5->rx_state = H5_W4_PKT_DELIMITER;
-					h5->rx_count = 0;
-					return 0;
-				}
-				h5->rx_skb->dev = (void *)hu->hdev;
-				break;
-			}
-			break;
-		}
-	}
-	return count;
-}
-
-/* Arrange to retransmit all messages in the relq. */
-static void h5_timed_event(struct work_struct *work)
-{
-	struct h5_struct *h5;
-	struct hci_uart *hu;
-	unsigned long flags;
-	unsigned long flags2;
-	struct sk_buff *skb;
-
-	h5 = container_of(work, struct h5_struct, retrans_work.work);
-	hu = h5->hu;
-
-	BT_INFO("hu %p retransmitting %u pkts", hu, h5->unack.qlen);
-
-	spin_lock_irqsave_nested(&h5->unack.lock, flags, SINGLE_DEPTH_NESTING);
-
-	/* Move the pkt from unack queue to the head of reliable tx queue and
-	 * roll back the tx seq number
-	 */
-	while ((skb = __skb_dequeue_tail(&h5->unack)) != NULL) {
-		spin_lock_irqsave(&h5->lock, flags2);
-		h5->msgq_txseq = (h5->msgq_txseq - 1) & 0x07;
-		spin_unlock_irqrestore(&h5->lock, flags2);
-		skb_queue_head(&h5->rel, skb);
-	}
-
-	spin_unlock_irqrestore(&h5->unack.lock, flags);
-
-	hci_uart_tx_wakeup(hu);
-}
-
-static int h5_open(struct hci_uart *hu)
-{
-	struct h5_struct *h5;
-
-	BT_DBG("hu %p", hu);
-
-	BT_INFO("h5_open");
-	h5 = kzalloc(sizeof(*h5), GFP_ATOMIC);
-	if (!h5)
-		return -ENOMEM;
-
-	hu->priv = h5;
-	skb_queue_head_init(&h5->unack);
-	skb_queue_head_init(&h5->rel);
-	skb_queue_head_init(&h5->unrel);
-	spin_lock_init(&h5->lock);
-
-	h5->hu = hu;
-	INIT_DELAYED_WORK(&h5->retrans_work, (void *)h5_timed_event);
-
-	h5->rx_state = H5_W4_PKT_DELIMITER;
-
-	if (txcrc)
-		h5->use_crc = 1;
-
-	return 0;
-}
-
-static int h5_close(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-
-	BT_INFO("h5_close");
-
-	cancel_delayed_work_sync(&h5->retrans_work);
-
-	hu->priv = NULL;
-
-	skb_queue_purge(&h5->unack);
-	skb_queue_purge(&h5->rel);
-	skb_queue_purge(&h5->unrel);
-
-	kfree(h5);
-
-	return 0;
-}
-
-static struct hci_uart_proto h5 = {
-	.id = HCI_UART_3WIRE,
-	.open = h5_open,
-	.close = h5_close,
-	.enqueue = h5_enqueue,
-	.dequeue = h5_dequeue,
-	.recv = h5_recv,
-	.flush = h5_flush
-};
-
-int h5_init(void)
-{
-	int err = hci_uart_register_proto(&h5);
-
-	if (!err)
-		BT_INFO("HCI Realtek H5 protocol initialized");
-	else
-		BT_ERR("HCI Realtek H5 protocol registration failed");
-
-	return err;
-}
-
-int h5_deinit(void)
-{
-	return hci_uart_unregister_proto(&h5);
-}
--- a/drivers/bluetooth/hci_uart.h
+++ b/drivers/bluetooth/hci_uart.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
 *
 *  Bluetooth HCI UART driver
@@ -5,50 +6,12 @@
 *  Copyright (C) 2000-2001  Qualcomm Incorporated
 *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
 *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
 */
-#include <linux/version.h>
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-
-/* #define HCI_VERSION_CODE KERNEL_VERSION(3, 14, 41) */
-#define HCI_VERSION_CODE LINUX_VERSION_CODE

 #ifndef N_HCI
 #define N_HCI	15
 #endif

-#ifndef CONFIG_BT_HCIUART_H4
-#define CONFIG_BT_HCIUART_H4
-#endif
-
-#define BTCOEX
-
-/* Send host sleep notification to Controller */
-#define WOBT_NOTIFY		0	/* 1  enable; 0  disable */
-
-/* Send LE whitelist only for Background scan parameters */
-#define WOBT_NOTIFY_BG_SCAN_LE_WHITELIST_ONLY	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
-/* RTKBT Power-on Whitelist for sideband wake-up by LE Advertising from Remote.
-* Note that it's necessary to apply TV FW Patch. */
-#define RTKBT_TV_POWERON_WHITELIST	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
 /* Ioctls */
 #define HCIUARTSETPROTO		_IOW('U', 200, int)
 #define HCIUARTGETPROTO		_IOR('U', 201, int)
@@ -57,7 +20,7 @@
 #define HCIUARTGETFLAGS		_IOR('U', 204, int)

 /* UART protocols */
-#define HCI_UART_MAX_PROTO	6
+#define HCI_UART_MAX_PROTO	12

 #define HCI_UART_H4	0
 #define HCI_UART_BCSP	1
@@ -65,6 +28,12 @@
 #define HCI_UART_H4DS	3
 #define HCI_UART_LL	4
 #define HCI_UART_ATH3K	5
+#define HCI_UART_INTEL	6
+#define HCI_UART_BCM	7
+#define HCI_UART_QCA	8
+#define HCI_UART_AG6XX	9
+#define HCI_UART_NOKIA	10
+#define HCI_UART_MRVL	11

 #define HCI_UART_RAW_DEVICE	0
 #define HCI_UART_RESET_ON_INIT	1
@@ -74,42 +43,46 @@
 #define HCI_UART_VND_DETECT	5

 struct hci_uart;
+struct serdev_device;

 struct hci_uart_proto {
 	unsigned int id;
+	const char *name;
+	unsigned int manufacturer;
+	unsigned int init_speed;
+	unsigned int oper_speed;
 	int (*open)(struct hci_uart *hu);
 	int (*close)(struct hci_uart *hu);
 	int (*flush)(struct hci_uart *hu);
-	int (*recv)(struct hci_uart *hu, void *data, int len);
+	int (*setup)(struct hci_uart *hu);
+	int (*set_baudrate)(struct hci_uart *hu, unsigned int speed);
+	int (*recv)(struct hci_uart *hu, const void *data, int len);
 	int (*enqueue)(struct hci_uart *hu, struct sk_buff *skb);
 	struct sk_buff *(*dequeue)(struct hci_uart *hu);
 };

 struct hci_uart {
 	struct tty_struct	*tty;
+	struct serdev_device	*serdev;
 	struct hci_dev		*hdev;
 	unsigned long		flags;
 	unsigned long		hdev_flags;

+	struct work_struct	init_ready;
 	struct work_struct	write_work;
-	struct workqueue_struct *hci_uart_wq;

-	struct hci_uart_proto	*proto;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)
-	struct percpu_rw_semaphore proto_lock; /* Stop work for proto close */
-#else
-	struct rw_semaphore proto_lock;
-#endif
+	const struct hci_uart_proto *proto;
+	struct percpu_rw_semaphore proto_lock;	/* Stop work for proto close */
 	void			*priv;

-	struct semaphore tx_sem;	/* semaphore for tx */
-
 	struct sk_buff		*tx_skb;
 	unsigned long		tx_state;

-#if WOBT_NOTIFY
-	struct notifier_block pm_notify_block;
-#endif
+	unsigned int init_speed;
+	unsigned int oper_speed;
+
+	u8			alignment;
+	u8			padding;
 };

 /* HCI_UART proto flag bits */
@@ -121,20 +94,108 @@ struct hci_uart {
 #define HCI_UART_SENDING	1
 #define HCI_UART_TX_WAKEUP	2

-extern int hci_uart_register_proto(struct hci_uart_proto *p);
-extern int hci_uart_unregister_proto(struct hci_uart_proto *p);
-extern int hci_uart_tx_wakeup(struct hci_uart *hu);
+int hci_uart_register_proto(const struct hci_uart_proto *p);
+int hci_uart_unregister_proto(const struct hci_uart_proto *p);
+int hci_uart_register_device(struct hci_uart *hu, const struct hci_uart_proto *p);
+void hci_uart_unregister_device(struct hci_uart *hu);
+
+int hci_uart_tx_wakeup(struct hci_uart *hu);
+int hci_uart_wait_until_sent(struct hci_uart *hu);
+int hci_uart_init_ready(struct hci_uart *hu);
+void hci_uart_init_work(struct work_struct *work);
+void hci_uart_set_baudrate(struct hci_uart *hu, unsigned int speed);
+bool hci_uart_has_flow_control(struct hci_uart *hu);
+void hci_uart_set_flow_control(struct hci_uart *hu, bool enable);
+void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed,
+			 unsigned int oper_speed);

 #ifdef CONFIG_BT_HCIUART_H4
-extern int h4_init(void);
-extern int h4_deinit(void);
+int h4_init(void);
+int h4_deinit(void);
+
+struct h4_recv_pkt {
+	u8  type;	/* Packet type */
+	u8  hlen;	/* Header length */
+	u8  loff;	/* Data length offset in header */
+	u8  lsize;	/* Data length field size */
+	u16 maxlen;	/* Max overall packet length */
+	int (*recv)(struct hci_dev *hdev, struct sk_buff *skb);
+};
+
+#define H4_RECV_ACL \
+	.type = HCI_ACLDATA_PKT, \
+	.hlen = HCI_ACL_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 2, \
+	.maxlen = HCI_MAX_FRAME_SIZE \
+
+#define H4_RECV_SCO \
+	.type = HCI_SCODATA_PKT, \
+	.hlen = HCI_SCO_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 1, \
+	.maxlen = HCI_MAX_SCO_SIZE
+
+#define H4_RECV_EVENT \
+	.type = HCI_EVENT_PKT, \
+	.hlen = HCI_EVENT_HDR_SIZE, \
+	.loff = 1, \
+	.lsize = 1, \
+	.maxlen = HCI_MAX_EVENT_SIZE
+
+#define H4_RECV_ISO \
+	.type = HCI_ISODATA_PKT, \
+	.hlen = HCI_ISO_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 2, \
+	.maxlen = HCI_MAX_FRAME_SIZE \
+
+struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
+			    const unsigned char *buffer, int count,
+			    const struct h4_recv_pkt *pkts, int pkts_count);
 #endif

-extern int h5_init(void);
-extern int h5_deinit(void);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-extern int hci_uart_send_frame(struct sk_buff *skb);
-#else
-extern int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb);
+#ifdef CONFIG_BT_HCIUART_BCSP
+int bcsp_init(void);
+int bcsp_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_LL
+int ll_init(void);
+int ll_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_ATH3K
+int ath_init(void);
+int ath_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_3WIRE
+int h5_init(void);
+int h5_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_INTEL
+int intel_init(void);
+int intel_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_BCM
+int bcm_init(void);
+int bcm_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_QCA
+int qca_init(void);
+int qca_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_AG6XX
+int ag6xx_init(void);
+int ag6xx_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_MRVL
+int mrvl_init(void);
+int mrvl_deinit(void);
 #endif
--- a/drivers/bluetooth/rtk_coex.c
+++ b/drivers/bluetooth/rtk_coex.c
--- a/Show More
+++ b/Show More