configs: sync use ETNAVIV instead of Galcore

Signed-off-by: Han Gao <gaohan@iscas.ac.cn>

.github/workflows/kernel.yml

@@ -0,0 +1,89 @@
+name: revyos-kernel-build
+
+on:
+  push:
+  pull_request:
+  workflow_dispatch:
+  schedule:
+    - cron: "0 2 * * *"
+
+env:
+  xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1698113812618
+  toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.0-20231018.tar.gz
+  mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2023.10.18
+  mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2023.10.18-nightly.tar.gz
+  wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
+  ARCH: riscv
+  board: lpi4a
+  KBUILD_BUILD_USER: builder
+  KBUILD_BUILD_HOST: revyos-riscv-builder
+  KDEB_COMPRESS: xz
+  KDEB_CHANGELOG_DIST: unstable
+
+jobs:
+  kernel:
+    strategy:
+      fail-fast: false
+      matrix:
+        name: [thead-gcc, gcc-13]
+        board: [lpi4a, ahead]
+
+    runs-on: ubuntu-22.04
+    env:
+      CROSS_COMPILE: riscv64-unknown-linux-gnu-
+
+    steps:
+      - name: Install software
+        run: |
+              sudo apt update && \
+              sudo apt install -y gdisk dosfstools g++-12-riscv64-linux-gnu build-essential \
+                                  libncurses-dev gawk flex bison openssl libssl-dev tree \
+                                  dkms libelf-dev libudev-dev libpci-dev libiberty-dev autoconf device-tree-compiler \
+                                  devscripts
+
+      - name: Checkout kernel
+        uses: actions/checkout@v4
+        with:
+            path: 'kernel'
+
+      - name: Compile Kernel && Install
+        run: |
+              mkdir -p rootfs
+              if [[ ${{ matrix.name }} = "thead-gcc" ]]; then
+                ${wget_alias} ${xuantie_toolchain}/${toolchain_file_name}
+                tar -xvf ${toolchain_file_name} -C /opt
+                export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.0/bin:$PATH"
+              else
+                ${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
+                tar -xvf ${mainline_toolchain_file_name} -C /opt
+                export PATH="/opt/riscv/bin:$PATH"
+              fi
+              ${CROSS_COMPILE}gcc -v
+
+              pushd kernel
+                if [ x"${{ matrix.board }}" = x"lpi4a" ]; then
+                  make revyos_defconfig
+                elif [ x"${{ matrix.board }}" = x"ahead" ]; then
+                  make revyos_beaglev_defconfig
+                fi
+                export KDEB_PKGVERSION="$(date "+%Y.%m.%d.%H.%M")+$(git rev-parse --short HEAD)"
+                sed -i '/CONFIG_LOCALVERSION_AUTO/d' .config && echo "CONFIG_LOCALVERSION_AUTO=n" >> .config
+                cat .config | grep "CONFIG_THEAD_ISA"
+                make -j$(nproc) bindeb-pkg LOCALVERSION="-${{ matrix.board }}"
+
+                # Copy deb
+                sudo dcmd cp -v ../*.changes ${GITHUB_WORKSPACE}/rootfs/
+
+                # record commit-id
+                git rev-parse HEAD > ${{ matrix.board }}-kernel-commitid
+                sudo cp -v ${{ matrix.board }}-kernel-commitid ${GITHUB_WORKSPACE}/rootfs/
+
+                ls -al ${GITHUB_WORKSPACE}/rootfs/
+              popd
+
+      - name: 'Upload Artifact'
+        uses: actions/upload-artifact@v3
+        with:
+          name: thead-kernel-${{ matrix.name }}
+          path: rootfs/*
+          retention-days: 30

.gitignore

@@ -18,6 +18,7 @@
 *.c.[012]*.*
 *.dt.yaml
 *.dtb
+*.dtbo
 *.dtb.S
 *.dwo
 *.elf

Documentation/devicetree/bindings/arm/idle-states.yaml

@@ -1,30 +1,25 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/cpu/idle-states.yaml#
+$id: http://devicetree.org/schemas/arm/idle-states.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Idle states binding description
+title: ARM idle states binding description
 
 maintainers:
   - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-  - Anup Patel <anup@brainfault.org>
 
 description: |+
   ==========================================
   1 - Introduction
   ==========================================
 
-  ARM and RISC-V systems contain HW capable of managing power consumption
-  dynamically, where cores can be put in different low-power states (ranging
-  from simple wfi to power gating) according to OS PM policies. The CPU states
-  representing the range of dynamic idle states that a processor can enter at
-  run-time, can be specified through device tree bindings representing the
-  parameters required to enter/exit specific idle states on a given processor.
-
-  ==========================================
-  2 - ARM idle states
-  ==========================================
+  ARM systems contain HW capable of managing power consumption dynamically,
+  where cores can be put in different low-power states (ranging from simple wfi
+  to power gating) according to OS PM policies. The CPU states representing the
+  range of dynamic idle states that a processor can enter at run-time, can be
+  specified through device tree bindings representing the parameters required to
+  enter/exit specific idle states on a given processor.
 
   According to the Server Base System Architecture document (SBSA, [3]), the
   power states an ARM CPU can be put into are identified by the following list:
@@ -48,23 +43,8 @@ description: |+
   The device tree binding definition for ARM idle states is the subject of this
   document.
 
-  ==========================================
-  3 - RISC-V idle states
-  ==========================================
-
-  On RISC-V systems, the HARTs (or CPUs) [6] can be put in platform specific
-  suspend (or idle) states (ranging from simple WFI, power gating, etc). The
-  RISC-V SBI v0.3 (or higher) [7] hart state management extension provides a
-  standard mechanism for OS to request HART state transitions.
-
-  The platform specific suspend (or idle) states of a hart can be either
-  retentive or non-rententive in nature. A retentive suspend state will
-  preserve HART registers and CSR values for all privilege modes whereas
-  a non-retentive suspend state will not preserve HART registers and CSR
-  values.
-
   ===========================================
-  4 - idle-states definitions
+  2 - idle-states definitions
   ===========================================
 
   Idle states are characterized for a specific system through a set of
@@ -231,10 +211,10 @@ description: |+
   properties specification that is the subject of the following sections.
 
   ===========================================
-  5 - idle-states node
+  3 - idle-states node
   ===========================================
 
-  The processor idle states are defined within the idle-states node, which is
+  ARM processor idle states are defined within the idle-states node, which is
   a direct child of the cpus node [1] and provides a container where the
   processor idle states, defined as device tree nodes, are listed.
 
@@ -243,7 +223,7 @@ description: |+
   just supports idle_standby, an idle-states node is not required.
 
   ===========================================
-  6 - References
+  4 - References
   ===========================================
 
   [1] ARM Linux Kernel documentation - CPUs bindings
@@ -258,15 +238,9 @@ description: |+
   [4] ARM Architecture Reference Manuals
       http://infocenter.arm.com/help/index.jsp
 
-  [5] ARM Linux Kernel documentation - Booting AArch64 Linux
+  [6] ARM Linux Kernel documentation - Booting AArch64 Linux
       Documentation/arm64/booting.rst
 
-  [6] RISC-V Linux Kernel documentation - CPUs bindings
-      Documentation/devicetree/bindings/riscv/cpus.yaml
-
-  [7] RISC-V Supervisor Binary Interface (SBI)
-      http://github.com/riscv/riscv-sbi-doc/riscv-sbi.adoc
-
 properties:
   $nodename:
     const: idle-states
@@ -279,7 +253,7 @@ properties:
       On ARM 32-bit systems this property is optional
 
       This assumes that the "enable-method" property is set to "psci" in the cpu
-      node[5] that is responsible for setting up CPU idle management in the OS
+      node[6] that is responsible for setting up CPU idle management in the OS
       implementation.
     const: psci
 
@@ -291,8 +265,8 @@ patternProperties:
       as follows.
 
       The idle state entered by executing the wfi instruction (idle_standby
-      SBSA,[3][4]) is considered standard on all ARM and RISC-V platforms and
-      therefore must not be listed.
+      SBSA,[3][4]) is considered standard on all ARM platforms and therefore
+      must not be listed.
 
       In addition to the properties listed above, a state node may require
       additional properties specific to the entry-method defined in the
@@ -301,27 +275,7 @@ patternProperties:
 
     properties:
       compatible:
-        enum:
-          - arm,idle-state
-          - riscv,idle-state
-
-      arm,psci-suspend-param:
-        $ref: /schemas/types.yaml#/definitions/uint32
-        description: |
-          power_state parameter to pass to the ARM PSCI suspend call.
-
-          Device tree nodes that require usage of PSCI CPU_SUSPEND function
-          (i.e. idle states node with entry-method property is set to "psci")
-          must specify this property.
-
-      riscv,sbi-suspend-param:
-        $ref: /schemas/types.yaml#/definitions/uint32
-        description: |
-          suspend_type parameter to pass to the RISC-V SBI HSM suspend call.
-
-          This property is required in idle state nodes of device tree meant
-          for RISC-V systems. For more details on the suspend_type parameter
-          refer the SBI specifiation v0.3 (or higher) [7].
+        const: arm,idle-state
 
       local-timer-stop:
         description:
@@ -363,8 +317,6 @@ patternProperties:
         description:
           A string used as a descriptive name for the idle state.
 
-    additionalProperties: false
-
     required:
       - compatible
       - entry-latency-us
@@ -706,150 +658,4 @@ examples:
         };
     };
 
-  - |
-    // Example 3 (RISC-V 64-bit, 4-cpu systems, two clusters):
-
-    cpus {
-        #size-cells = <0>;
-        #address-cells = <1>;
-
-        cpu@0 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x0>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0
-                            &CLUSTER_RET_0 &CLUSTER_NONRET_0>;
-
-            cpu_intc0: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        cpu@1 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x1>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0
-                            &CLUSTER_RET_0 &CLUSTER_NONRET_0>;
-
-            cpu_intc1: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        cpu@10 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x10>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0
-                            &CLUSTER_RET_1 &CLUSTER_NONRET_1>;
-
-            cpu_intc10: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        cpu@11 {
-            device_type = "cpu";
-            compatible = "riscv";
-            reg = <0x11>;
-            riscv,isa = "rv64imafdc";
-            mmu-type = "riscv,sv48";
-            cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0
-                            &CLUSTER_RET_1 &CLUSTER_NONRET_1>;
-
-            cpu_intc11: interrupt-controller {
-                #interrupt-cells = <1>;
-                compatible = "riscv,cpu-intc";
-                interrupt-controller;
-            };
-        };
-
-        idle-states {
-            CPU_RET_0_0: cpu-retentive-0-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x10000000>;
-                entry-latency-us = <20>;
-                exit-latency-us = <40>;
-                min-residency-us = <80>;
-            };
-
-            CPU_NONRET_0_0: cpu-nonretentive-0-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x90000000>;
-                entry-latency-us = <250>;
-                exit-latency-us = <500>;
-                min-residency-us = <950>;
-            };
-
-            CLUSTER_RET_0: cluster-retentive-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x11000000>;
-                local-timer-stop;
-                entry-latency-us = <50>;
-                exit-latency-us = <100>;
-                min-residency-us = <250>;
-                wakeup-latency-us = <130>;
-            };
-
-            CLUSTER_NONRET_0: cluster-nonretentive-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x91000000>;
-                local-timer-stop;
-                entry-latency-us = <600>;
-                exit-latency-us = <1100>;
-                min-residency-us = <2700>;
-                wakeup-latency-us = <1500>;
-            };
-
-            CPU_RET_1_0: cpu-retentive-1-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x10000010>;
-                entry-latency-us = <20>;
-                exit-latency-us = <40>;
-                min-residency-us = <80>;
-            };
-
-            CPU_NONRET_1_0: cpu-nonretentive-1-0 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x90000010>;
-                entry-latency-us = <250>;
-                exit-latency-us = <500>;
-                min-residency-us = <950>;
-            };
-
-            CLUSTER_RET_1: cluster-retentive-1 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x11000010>;
-                local-timer-stop;
-                entry-latency-us = <50>;
-                exit-latency-us = <100>;
-                min-residency-us = <250>;
-                wakeup-latency-us = <130>;
-            };
-
-            CLUSTER_NONRET_1: cluster-nonretentive-1 {
-                compatible = "riscv,idle-state";
-                riscv,sbi-suspend-param = <0x91000010>;
-                local-timer-stop;
-                entry-latency-us = <600>;
-                exit-latency-us = <1100>;
-                min-residency-us = <2700>;
-                wakeup-latency-us = <1500>;
-            };
-        };
-    };
-
 ...

Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt

@@ -81,4 +81,4 @@ Example:
 		};
 	};
 
-[1]. Documentation/devicetree/bindings/cpu/idle-states.yaml
+[1]. Documentation/devicetree/bindings/arm/idle-states.yaml

Documentation/devicetree/bindings/arm/psci.yaml

@@ -101,7 +101,7 @@ properties:
       bindings in [1]) must specify this property.
 
       [1] Kernel documentation - ARM idle states bindings
-        Documentation/devicetree/bindings/cpu/idle-states.yaml
+        Documentation/devicetree/bindings/arm/idle-states.yaml
 
 patternProperties:
   "^power-domain-":

Documentation/devicetree/bindings/riscv/cpus.yaml

@@ -87,12 +87,6 @@ properties:
       - compatible
       - interrupt-controller
 
-  cpu-idle-states:
-    $ref: '/schemas/types.yaml#/definitions/phandle-array'
-    description: |
-      List of phandles to idle state nodes supported
-      by this hart (see ./idle-states.yaml).
-
 required:
   - riscv,isa
   - interrupt-controller

MAINTAINERS

@@ -4614,20 +4614,6 @@ S:	Supported
 F:	drivers/cpuidle/cpuidle-psci.h
 F:	drivers/cpuidle/cpuidle-psci-domain.c
 
-CPUIDLE DRIVER - DT IDLE PM DOMAIN
-M:	Ulf Hansson <ulf.hansson@linaro.org>
-L:	linux-pm@vger.kernel.org
-S:	Supported
-F:	drivers/cpuidle/dt_idle_genpd.c
-F:	drivers/cpuidle/dt_idle_genpd.h
-
-CPUIDLE DRIVER - RISC-V SBI
-M:	Anup Patel <anup@brainfault.org>
-L:	linux-pm@vger.kernel.org
-L:	linux-riscv@lists.infradead.org
-S:	Maintained
-F:	drivers/cpuidle/cpuidle-riscv-sbi.c
-
 CRAMFS FILESYSTEM
 M:	Nicolas Pitre <nico@fluxnic.net>
 S:	Maintained

Makefile

@@ -480,6 +480,8 @@ LZ4		= lz4
 XZ		= xz
 ZSTD		= zstd
 
+PAHOLE_FLAGS	= $(shell PAHOLE=$(PAHOLE) $(srctree)/scripts/pahole-flags.sh)
+
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
 		  -Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
 NOSTDINC_FLAGS :=
@@ -534,6 +536,7 @@ export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE
 export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE
 export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE
 export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
+export PAHOLE_FLAGS
 
 # Files to ignore in find ... statements
 

arch/riscv/Kconfig

@@ -18,6 +18,7 @@ config RISCV
 	select ARCH_HAS_DEBUG_VM_PGTABLE
 	select ARCH_HAS_DEBUG_VIRTUAL if MMU
 	select ARCH_HAS_DEBUG_WX
+	select ARCH_HAS_FAST_MULTIPLIER
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_GIGANTIC_PAGE
 	select ARCH_HAS_KCOV
@@ -34,6 +35,7 @@ config RISCV
 	select ARCH_KEEP_MEMBLOCK
 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
+	select ARCH_USE_CMPXCHG_LOCKREF
 	select ARCH_USE_QUEUED_SPINLOCKS
 	select ARCH_USE_QUEUED_RWLOCKS
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
@@ -42,7 +44,7 @@ config RISCV
 	select CLONE_BACKWARDS
 	select CLINT_TIMER if !MMU
 	select COMMON_CLK
-	select CPU_PM if CPU_IDLE
+	select CPU_PM if (SUSPEND || CPU_IDLE)
 	select COMPAT_BINFMT_ELF if BINFMT_ELF && COMPAT
 	select EDAC_SUPPORT
 	select DMA_DIRECT_REMAP
@@ -393,45 +395,19 @@ config FPU
 	  If you don't know what to do here, say Y.
 
 config VECTOR
-	bool "VECTOR support"
-	default n
-
-choice VECTOR_VERSION
-	prompt "Vector Version"
-	depends on VECTOR
-	default VECTOR_1_0
-
-config VECTOR_1_0
-	bool "VECTOR 1.0 support"
-	help
-	  Say N here if you want to disable all vector 1.0 related procedure
-	  in the kernel.
-
-	  If you don't know what to do here, say Y.
-
-config VECTOR_0_7
 	bool "VECTOR 0.7 support"
+	default y
 	help
 	  Say N here if you want to disable all vector 0.7 related procedure
 	  in the kernel.
 
 	  If you don't know what to do here, say Y.
 
-endchoice
-
-config VLEN_256
-	bool "VECTOR VLEN 256"
-	depends on VECTOR
-	default n
-
-config VECTOR_EMU
-	bool "VECTOR e64 emulate for c906 v1"
-	depends on VECTOR
-	default n
-
 config THEAD_ISA
 	bool "T-HEAD extension ISA in AFLAGS with -march=_xtheadc"
-	default n
+	default y
+	help
+	  Say N here if you want to disable xtheadc in the kernel.
 
 endmenu
 
@@ -575,11 +551,5 @@ config ARCH_SUSPEND_POSSIBLE
 
 endmenu
 
-menu "CPU Power Management"
-
-source "drivers/cpuidle/Kconfig"
-
-endmenu
-
 source "arch/riscv/kvm/Kconfig"
 source "drivers/firmware/Kconfig"

arch/riscv/Kconfig.socs

@@ -19,9 +19,6 @@ config SOC_VIRT
 	select GOLDFISH
 	select RTC_DRV_GOLDFISH if RTC_CLASS
 	select SIFIVE_PLIC
-	select PM_GENERIC_DOMAINS if PM
-	select PM_GENERIC_DOMAINS_OF if PM && OF
-	select RISCV_SBI_CPUIDLE if CPU_IDLE
 	help
 	  This enables support for QEMU Virt Machine.
 

arch/riscv/Makefile

@@ -48,25 +48,25 @@ endif
 endif
 
 # ISA string setting
+riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
+riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
+riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
+riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
+
+# Fix mainline build
+toolchain-have-v0p7 := $(call cc-option-yn, -march=$(riscv-march-y)v0p7)
+riscv-march-$(toolchain-have-v0p7) := $(riscv-march-y)v0p7
+
+toolchain-have-xtheadc := $(call cc-option-yn, -march=$(riscv-march-y)_xtheadc)
+riscv-march-$(toolchain-have-xtheadc) := $(riscv-march-y)_xtheadc
+
 # Newer binutils versions default to ISA spec version 20191213 which moves some
 # instructions from the I extension to the Zicsr and Zifencei extensions.
 toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
 riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
 
-riscv-march-cflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-cflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-cflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-cflags-y)c
-
-riscv-march-aflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-aflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-aflags-$(CONFIG_FPU)		:= $(riscv-march-aflags-y)fd
-riscv-march-aflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-aflags-y)c
-riscv-march-aflags-$(CONFIG_VECTOR_1_0)		:= $(riscv-march-aflags-y)v
-riscv-march-aflags-$(CONFIG_VECTOR_0_7)		:= $(riscv-march-aflags-y)v0p7
-riscv-march-aflags-$(CONFIG_THEAD_ISA)		:= $(riscv-march-aflags-y)_xtheadc
-
-KBUILD_CFLAGS += -march=$(riscv-march-cflags-y) -Wa,-march=$(riscv-march-aflags-y)
-KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
+KBUILD_CFLAGS += -march=$(subst _xtheadc,,$(subst v0p7,,$(subst fd,,$(riscv-march-y))))
+KBUILD_AFLAGS += -march=$(riscv-march-y)
 
 KBUILD_CFLAGS += -mno-save-restore
 KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
@@ -124,7 +124,7 @@ endif
 ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_KENDRYTE),yy)
 KBUILD_IMAGE := $(boot)/loader.bin
 else
-KBUILD_IMAGE := $(boot)/Image.gz
+KBUILD_IMAGE := $(boot)/Image
 endif
 BOOT_TARGETS := Image Image.gz loader loader.bin
 

arch/riscv/boot/dts/Makefile

@@ -1,4 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
 subdir-y += sifive
 subdir-y += kendryte
 subdir-y += thead

arch/riscv/boot/dts/thead/Makefile

@@ -1,4 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
 dtb-$(CONFIG_SOC_THEAD) += ice.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu.dtb light_mpw.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-fm-emu-npu-fce.dtb
@@ -29,10 +34,11 @@ dtb-$(CONFIG_SOC_THEAD) += light-a-val-full.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-ant-ref.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-ant-discrete.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-ddr2G.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-ddr2G.dtb light-lpi4a-16gb.dtb light-lpi4a-dsi0-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-cluster.dtb light-lpi4a-cluster-16gb.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-a-ref.dtb light-a-ref-dsi0.dtb light-a-ref-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-b-ref.dtb
-dtb-$(CONFIG_SOC_THEAD) += light-a-val-crash.dtb light-b-product-crash.dtb light-ant-ref-crash.dtb light-ant-discrete-crash.dtb light-lpi4a-crash.dtb light-lpi4a-camera-tuning.dtb light-lpi4a-hdmi.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-a-val-crash.dtb light-b-product-crash.dtb light-ant-ref-crash.dtb light-ant-discrete-crash.dtb
 dtb-$(CONFIG_SOC_THEAD) += light-b-power.dtb
 
 dtb-$(CONFIG_SOC_THEAD) += light-a-val-android.dtb
@@ -40,3 +46,10 @@ dtb-$(CONFIG_SOC_THEAD) += light-a-val-android.dtb
 dtb-$(CONFIG_SOC_THEAD) += fire-emu.dtb fire-emu-crash.dtb
 dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb
 dtb-$(CONFIG_SOC_THEAD) += fire-emu-soc-base-sec.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-laptop.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-milkv-meles.dtb light-milkv-meles-4g.dtb
+
+targets += dtbs dtbs_install
+targets += $(dtb-y)
+
+subdir-y	:= overlays

arch/riscv/boot/dts/thead/fire-crash.dts

@@ -306,6 +306,15 @@
 		pagesize = <32>;
 	};
 
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
        touch@5d {
                #gpio-cells = <2>;
                compatible = "goodix,gt911";

arch/riscv/boot/dts/thead/fire-emu.dts

@@ -311,6 +311,15 @@
 		pagesize = <32>;
 	};
 
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
        touch@5d {
                #gpio-cells = <2>;
                compatible = "goodix,gt911";

arch/riscv/boot/dts/thead/light-a-product.dts

@@ -162,14 +162,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {
@@ -525,6 +517,15 @@
 		pagesize = <32>;
 	};
 
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
        touch@5d {
                #gpio-cells = <2>;
                compatible = "goodix,gt911";

arch/riscv/boot/dts/thead/light-a-val-android.dts

@@ -30,54 +30,45 @@
 
 &lightsound {
 	status = "okay";
+	
+	simple-audio-card,widgets =
+		"Microphone", "Mic Jack",
+		"Speaker", "Speaker",
+		"Headphone", "Headphone Jack";
+	simple-audio-card,routing =
+		"Headphone Jack", "HP_L",
+		"Headphone Jack", "HP_R",
+		"Speaker", "SPK_LP",
+		"Speaker", "SPK_LN",
+		"Speaker", "SPK_RP",
+		"Speaker", "SPK_RN",
+		"Mic Jack","MICB",
+		"LINPUT1", "Mic Jack",
+		"LINPUT3", "Mic Jack";
 
-        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
-                reg = <0>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s0 0>;
-                };
-                codec {
-                        sound-dai = <&es8156_audio_codec>;
-                };
-        };
-
-        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+	simple-audio-card,dai-link@0 {          /* I2S - CODEC */
+		reg = <0>;
+		format = "i2s";
+		cpu {
+			sound-dai = <&light_i2s 0>;
+		};
+		codec {
+			sound-dai = <&codec>;
+		};
+	};
+	simple-audio-card,dai-link@1 {          /* I2S - HDMI */
                 reg = <1>;
                 format = "i2s";
                 cpu {
-                        sound-dai = <&i2s_8ch_sd2 2>;
+                        sound-dai = <&light_i2s 1>;
                 };
                 codec {
-                        sound-dai = <&es7210_audio_codec_adc0>;
+                        sound-dai = <&dummy_codec>;
                 };
-        };
-
-	simple-audio-card,dai-link@2 {          /* I2S - HDMI */
-		reg = <2>;
-		format = "i2s";
-		cpu {
-			sound-dai = <&light_i2s 1>;
-		};
-		codec {
-			sound-dai = <&dummy_codec>;
-		};
-	};
+    };
 };
 
 &light_i2s {
-	status = "okay";
-};
-
-&i2s0 {
-        status = "okay";
-};
-
-&i2s_8ch_sd2 {
-        status = "okay";
-};
-
-&es7210_audio_codec_adc0 {
         status = "okay";
 };
 

arch/riscv/boot/dts/thead/light-a-val-sec.dts

@@ -15,6 +15,3 @@
         status = "disabled";
 };
 
-&eip_28 {
-        status = "disabled";
-};

arch/riscv/boot/dts/thead/light-a-val.dts

@@ -16,7 +16,7 @@
 
 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
-		stdout-path = "serial0";
+		stdout-path = "serial0:115200n8";
 	};
 
 	leds {
@@ -165,14 +165,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {
@@ -330,14 +322,12 @@
 		status = "disabled";
 		key-volumedown {
 			label = "Volume Down Key";
-			wakeup-source;
 			linux,code = <KEY_1>;
 			debounce-interval = <2>;
 			gpios = <&ao_gpio_porta 4 GPIO_ACTIVE_LOW>;
 		};
 		key-volumeup {
 			label = "Volume Up Key";
-			wakeup-source;
 			linux,code = <KEY_2>;
 			debounce-interval = <2>;
 			gpios = <&ao_gpio_porta 5 GPIO_ACTIVE_LOW>;
@@ -574,14 +564,22 @@
 &i2c0 {
 	clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c0>;
+
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
 		pagesize = <32>;
 	};
 
+	codec: wm8960@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		wlf,shared-lrclk;
+		wlf,hp-cfg = <3 2 3>;
+		wlf,gpio-cfg = <1 3>;
+	};
+
        touch@5d {
                #gpio-cells = <2>;
                compatible = "goodix,gt911";
@@ -673,8 +671,6 @@
 &i2c1 {
         clock-frequency = <400000>;
         status = "okay";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c1>;
         touch1@5d {
                 #gpio-cells = <2>;
                 compatible = "goodix,gt911";
@@ -693,9 +689,9 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
+	status = "okay";
 
 	spi_norflash@0 {
-		status = "okay";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
@@ -705,7 +701,6 @@
 	};
 
 	spidev@1 {
-		status = "disable";
 		compatible = "spidev";
 		#address-cells = <0x1>;
 		#size-cells = <0x1>;
@@ -716,30 +711,13 @@
 
 &uart0 {
 	clock-frequency = <100000000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart0>;
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart1>;
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-};
-
-&uart4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart4>;
 };
 
 &qspi0 {
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 3 0>;
-	rx-sample-dly = <5>;
-	status = "okay";
+	rx-sample-dly = <4>;
+	status = "disabled";
 
 	spi-flash@0 {
 		#address-cells = <1>;
@@ -760,8 +738,7 @@
 &qspi1 {
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
-	rx-sample-dly = <5>;
-	status = "okay";
+	status = "disabled";
 
 	spi-flash@0 {
 		#address-cells = <1>;
@@ -784,8 +761,6 @@
 	rx-clk-delay = <0x00>; /* for RGMII */
 	tx-clk-delay = <0x00>; /* for RGMII */
 	phy-handle = <&phy_88E1111_0>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gmac0>;
 	status = "okay";
 
 	mdio0 {
@@ -808,8 +783,6 @@
 	rx-clk-delay = <0x00>; /* for RGMII */
 	tx-clk-delay = <0x00>; /* for RGMII */
 	phy-handle = <&phy_88E1111_1>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gmac1>;
 	status = "okay";
 };
 
@@ -831,8 +804,6 @@
 	bus-width = <4>;
 	pull_up;
 	wprtn_ignore;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_sdio0>;
 	status = "okay";
 };
 
@@ -861,8 +832,17 @@
 			 */
 			pinctrl_uart0: uart0grp {
 				thead,pins = <
-					FM_UART0_TXD	0x0	0x234
-					FM_UART0_RXD	0x0	0x234
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
 				>;
 			};
 
@@ -890,87 +870,12 @@
 				>;
 			};
 
-			pinctrl_i2c2: i2c2grp {
-				thead,pins = <
-					FM_I2C2_SCL	0x0	0x204
-					FM_I2C2_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c3: i2c3grp {
-				thead,pins = <
-					FM_I2C3_SCL	0x0	0x204
-					FM_I2C3_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_spi0: spi0grp {
-				thead,pins = <
-					FM_SPI_CSN	0x3	0x20a
-					FM_SPI_SCLK	0x0	0x20a
-					FM_SPI_MISO	0x0	0x23a
-					FM_SPI_MOSI	0x0	0x23a
-				>;
-			};
-
-			pinctrl_gmac1: gmac1grp {
-				thead,pins = <
-					FM_GPIO2_18	0x1	0x20f	/*	GMAC1_TX_CLK  */
-					FM_GPIO2_19	0x1	0x20f	/*	GMAC1_RX_CLK  */
-					FM_GPIO2_20	0x1	0x20f	/*	GMAC1_TXEN  */
-					FM_GPIO2_21	0x1	0x20f	/*	GMAC1_TXD0  */
-					FM_GPIO2_22	0x1	0x20f	/*	GMAC1_TXD1  */
-					FM_GPIO2_23	0x1	0x20f	/*	GMAC1_TXD2  */
-					FM_GPIO2_24	0x1	0x20f	/*	GMAC1_TXD3  */
-					FM_GPIO2_25	0x1	0x20f	/*	GMAC1_RXDV  */
-					FM_GPIO2_30	0x1	0x20f	/*	GMAC1_RXD0  */
-					FM_GPIO2_31	0x1	0x20f	/*	GMAC1_RXD1  */
-					FM_GPIO3_0	0x1	0x20f	/*	GMAC1_RXD2  */
-					FM_GPIO3_1	0x1	0x20f	/*	GMAC1_RXD3  */
-				>;
-			};
-
-			pinctrl_sdio0: sdio0grp {
-				thead,pins = <
-					FM_SDIO0_DETN	0x0	0x208	
-				>;
-			};
-
 			pinctrl_pwm: pwmgrp {
 				thead,pins = <
 					FM_GPIO3_2	0x1	0x208	/* pwm0 */
 					FM_GPIO3_3	0x1	0x208	/* pwm1 */
 				>;
 			};
-
-			pinctrl_hdmi: hdmigrp {
-				thead,pins = <
-					FM_HDMI_SCL	0x0	0x208	
-					FM_HDMI_SDA	0x0	0x208	
-					FM_HDMI_CEC	0x0	0x208
-				>;
-			};
-
-			pinctrl_gmac0: gmac0grp {
-				thead,pins = <
-					FM_GMAC0_TX_CLK	0x0	0x20f	/*	GMAC0_TX_CLK  */
-					FM_GMAC0_RX_CLK	0x0	0x20f	/*	GMAC0_RX_CLK  */
-					FM_GMAC0_TXEN	0x0	0x20f	/*	GMAC0_TXEN  */
-					FM_GMAC0_TXD0	0x0	0x20f	/*	GMAC0_TXD0  */
-					FM_GMAC0_TXD1	0x0	0x20f	/*	GMAC0_TXD1  */
-					FM_GMAC0_TXD2	0x0	0x20f	/*	GMAC0_TXD2  */
-					FM_GMAC0_TXD3	0x0	0x20f	/*	GMAC0_TXD3  */
-					FM_GMAC0_RXDV	0x0	0x20f	/*	GMAC0_RXDV  */
-					FM_GMAC0_RXD0	0x0	0x20f	/*	GMAC0_RXD0  */
-					FM_GMAC0_RXD1	0x0	0x20f	/*	GMAC0_RXD1  */
-					FM_GMAC0_RXD2	0x0	0x20f	/*	GMAC0_RXD2  */
-					FM_GMAC0_RXD3	0x0	0x20f	/*	GMAC0_RXD3  */
-					FM_GMAC0_MDC	0x0 0x208	/*	GMAC0_MDC  */
-					FM_GMAC0_MDIO	0x0 0x208	/*	GMAC0_MDIO  */
-					FM_GMAC0_COL	0x3	0x232	/*	PHY0_nRST  */
-					FM_GMAC0_CRS	0x3	0x232	/*	PHY0_nINT  */
-				>;
-			};
 		};
 };
 
@@ -980,6 +885,22 @@
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
 			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
 			pinctrl_qspi1: qspi1grp {
 				thead,pins = <
 					FM_QSPI1_SCLK    0x0    0x20a
@@ -991,6 +912,7 @@
 				>;
 			};
 
+
 			pinctrl_iso7816: iso7816grp {
 				thead,pins = <
 					FM_QSPI1_SCLK		0x1	0x208
@@ -1001,51 +923,6 @@
 				>;
 			};
 
-			pinctrl_i2c0: i2c0grp {
-				thead,pins = <
-					FM_I2C0_SCL	0x0	0x204
-					FM_I2C0_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c1: i2c1grp {
-				thead,pins = <
-					FM_I2C1_SCL	0x0	0x204
-					FM_I2C1_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_uart1: uart1grp {
- 				thead,pins = <
-					FM_UART1_TXD	0x0	0x234
-					FM_UART1_RXD	0x0	0x234
-				>;
-			};
-
-			pinctrl_uart4: uart4grp {
-				thead,pins = <
-					FM_UART4_TXD	0x0	0x208
-					FM_UART4_RXD	0x0	0x208
-					FM_UART4_CTSN	0x0	0x208
-					FM_UART4_RTSN	0x0	0x208
-				>;
-			};
-
-			pinctrl_uart3: uart3grp {
-				thead,pins = <
-					FM_UART3_TXD	0x1	0x202
-					FM_UART3_RXD	0x1	0x202
-					FM_GPIO0_20		0x2	0x202	/*	UART3_IR_OUT  */
-					FM_GPIO0_21		0x2	0x202	/*	UART3_IR_IN  */
-				>;
-			};
-
-			pinctrl_i2c4: i2c4grp {
-				thead,pins = <
-					FM_GPIO0_18	0x1	0x204	/*	I2C4_SCL  */
-					FM_GPIO0_19	0x1	0x204	/*	I2C4_SDA  */
-				>;
-			};
 		};
 };
 
@@ -1209,8 +1086,6 @@
 &i2c2 {
     clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c2>;
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
@@ -1221,8 +1096,6 @@
 &i2c3 {
     clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c3>;
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
@@ -1233,8 +1106,6 @@
 &i2c4 {
     clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c4>;
 	eeprom@50 {
 		compatible = "atmel,24c32";
 		reg = <0x50>;
@@ -1457,7 +1328,7 @@
     DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
     DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
     AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-    i2c_reg_width = /bits/ 8 <2>;
+	i2c_reg_width = /bits/ 8 <2>;
     i2c_data_width = /bits/ 8 <1>;
     i2c_addr = /bits/ 8 <0x1a>;
     i2c_bus = /bits/ 8 <3>;
@@ -1465,7 +1336,6 @@
 };
 
 &video0{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1552,7 +1422,6 @@
 
 
 &video1{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1656,7 +1525,6 @@
 };
 
 &video2{
-	status = "okay";
     vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1749,7 +1617,6 @@
 };
 
 &video3{
-	status = "okay";
     vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1853,7 +1720,6 @@
 };
 
 &video4{
-	status = "okay";
     vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -2005,7 +1871,6 @@
 };
 
 &video5{
-	status = "okay";
 	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -2175,7 +2040,6 @@
 };
 
 &video6{
-	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
 	channel0 {
 		sensor0 {
@@ -2216,7 +2080,6 @@
 };
 
 &video7{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2386,7 +2249,6 @@
 
 
 &video8{
-	status = "okay";
     vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
 	channel0 {
 		sensor0 {
@@ -2418,7 +2280,6 @@
 };
 
 &video9{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2440,7 +2301,6 @@
 
 
 &video10{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2462,7 +2322,6 @@
 };
 
 &video11{
-	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -2489,7 +2348,6 @@
 };
 
 &video12{ // TUNINGTOOL
-	status = "okay";
 	channel0 { // CSI2
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2510,35 +2368,6 @@
 	};
 };
 
-&video15{
-	status = "okay";
-	vi_mem_pool_region = <0>;
-	channel0 {
-		channel_id = <0>;
-		status = "okay";
-        sensor0 {
-			subdev_name = "vivcam";
-			idx = <0>; //<0>=vivcam0 :2310 
-			csi_idx = <0>; //<0>=CSI2
-			flash_led_idx = <0>;
-			mode_idx = <1>;
-			path_type = "SENSOR_1920X1088_26FPS_RAW12_LINER";
-		};
-		sensor1 {
-            subdev_name = "vivcam";
-            idx = <7>; //imx334
-            csi_idx = <0>; //<0>=CSI2
-            mode_idx = <0>;
-            path_type = "SENSOR_3840x2180_RAW12_LINER";
-        };
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_DDR";
-		};
-	};
-};
-
 &trng {
 	status = "disabled";
 };
@@ -2684,8 +2513,3 @@
 		>;
 	};
 };
-
-&hdmi_tx {
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_hdmi>;
-};

arch/riscv/boot/dts/thead/light-ant-ref.dts

@@ -166,14 +166,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {
@@ -2279,9 +2271,6 @@
 &hdmi_tx {
 	status = "okay";
 
-	max_width = /bits/ 16 <1280>;
-	max_height = /bits/ 16 <720>;
-
 	port@0 {
 		/* input */
 		hdmi_tx_in: endpoint {

arch/riscv/boot/dts/thead/light-b-audio-hdmi.dts

@@ -166,14 +166,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {
@@ -266,14 +258,12 @@
 		pinctrl-names = "default";
 		key-volumedown {
 			label = "Volume Down Key";
-			wakeup-source;
 			linux,code = <KEY_VOLUMEDOWN>;
 			debounce-interval = <1>;
 			gpios = <&ao_gpio_porta 11 0x1>;
 		};
 		key-volumeup {
 			label = "Volume Up Key";
-			wakeup-source;
 			linux,code = <KEY_VOLUMEUP>;
 			debounce-interval = <1>;
 			gpios = <&ao_gpio_porta 10 0x1>;

arch/riscv/boot/dts/thead/light-b-product.dts

@@ -166,14 +166,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {
@@ -247,7 +239,6 @@
 		ref-clock-frequency = <24000000>;
 		keep_wifi_power_on;
 		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_wifi>;
 		wifi_chip_type = "rtl8723ds";
 		WIFI,poweren_gpio = <&gpio2_porta 29 0>;
 		WIFI,reset_n = <&gpio2_porta 24 0>;
@@ -256,8 +247,7 @@
 
 	wcn_bt: wireless-bluetooth {
 		compatible = "bluetooth-platdata";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_bt>;
+		pinctrl-names = "default", "rts_gpio";
 		BT,power_gpio    = <&gpio2_porta 25 0>;
 		status = "okay";
 	};
@@ -268,14 +258,12 @@
 		pinctrl-names = "default";
 		key-volumedown {
 			label = "Volume Down Key";
-			wakeup-source;
 			linux,code = <KEY_VOLUMEDOWN>;
 			debounce-interval = <1>;
 			gpios = <&ao_gpio_porta 11 0x1>;
 		};
 		key-volumeup {
 			label = "Volume Up Key";
-			wakeup-source;
 			linux,code = <KEY_VOLUMEUP>;
 			debounce-interval = <1>;
 			gpios = <&ao_gpio_porta 10 0x1>;
@@ -711,23 +699,6 @@
 
 &uart0 {
 	clock-frequency = <100000000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart0>;
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart1>;
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-};
-
-&uart4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart4>;
 };
 
 &qspi0 {
@@ -773,8 +744,6 @@
 	tx-clk-delay = <0x00>; /* for RGMII */
 	phy-handle = <&phy_88E1111_0>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gmac0>;
 
 	mdio0 {
 		#address-cells = <1>;
@@ -818,8 +787,6 @@
 	pull_up;
 	wprtn_ignore;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_sdio0>;
 };
 
 &sdhci1 {
@@ -847,8 +814,17 @@
 			 */
 			pinctrl_uart0: uart0grp {
 				thead,pins = <
-					FM_UART0_TXD	0x0	0x234
-					FM_UART0_RXD	0x0	0x234
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_spi0: spi0grp {
+				thead,pins = <
+					FM_SPI_CSN	0x3	0x20a
+					FM_SPI_SCLK	0x0	0x20a
+					FM_SPI_MISO	0x0	0x23a
+					FM_SPI_MOSI	0x0	0x23a
 				>;
 			};
 
@@ -876,81 +852,9 @@
 				>;
 			};
 
-			pinctrl_i2c2: i2c2grp {
-				thead,pins = <
-					FM_I2C2_SCL	0x0	0x204
-					FM_I2C2_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c3: i2c3grp {
-				thead,pins = <
-					FM_I2C3_SCL	0x0	0x204
-					FM_I2C3_SDA	0x0	0x204
-				>;
-			};	
-
-			pinctrl_spi0: spi0grp {
-				thead,pins = <
-					FM_SPI_CSN	0x3	0x20a
-					FM_SPI_SCLK	0x0	0x20a
-					FM_SPI_MISO	0x0	0x23a
-					FM_SPI_MOSI	0x0	0x23a
-				>;
-			};
-
-			pinctrl_wifi: wifi_grp {
-				thead,pins = <
-					FM_GPIO2_22	0x0	0x202
-					FM_GPIO2_24	0x0	0x202
-				>;
-			};
-
-			pinctrl_bt: bt_grp {
-				thead,pins = <
-					FM_GPIO2_23	0x0	0x202
-					FM_GPIO2_25	0x0	0x202
-				>;
-			};
-
-			pinctrl_sdio0: sdio0grp {
-				thead,pins = <
-					FM_SDIO0_DETN	0x0	0x208
-				>;
-			};
-
 			pinctrl_pwm: pwmgrp {
 				thead,pins = <
-					FM_GPIO3_2	0x1	0x20f	/* pwm0 */
-				>;
-			};
-
-			pinctrl_hdmi: hdmigrp {
-				thead,pins = <
-					FM_HDMI_SCL	0x0	0x208
-					FM_HDMI_SDA	0x0	0x208
-					FM_HDMI_CEC	0x0	0x208
-				>;
-			};
-
-			pinctrl_gmac0: gmac0grp {
-				thead,pins = <
-					FM_GMAC0_TX_CLK	0x0	0x20f	/*	GMAC0_TX_CLK  */
-					FM_GMAC0_RX_CLK	0x0	0x20f	/*	GMAC0_RX_CLK  */
-					FM_GMAC0_TXEN	0x0	0x20f	/*	GMAC0_TXEN  */
-					FM_GMAC0_TXD0	0x0	0x20f	/*	GMAC0_TXD0  */
-					FM_GMAC0_TXD1	0x0	0x20f	/*	GMAC0_TXD1  */
-					FM_GMAC0_TXD2	0x0	0x20f	/*	GMAC0_TXD2  */
-					FM_GMAC0_TXD3	0x0	0x20f	/*	GMAC0_TXD3  */
-					FM_GMAC0_RXDV	0x0	0x20f	/*	GMAC0_RXDV  */
-					FM_GMAC0_RXD0	0x0	0x20f	/*	GMAC0_RXD0  */
-					FM_GMAC0_RXD1	0x0	0x20f	/*	GMAC0_RXD1  */
-					FM_GMAC0_RXD2	0x0	0x20f	/*	GMAC0_RXD2  */
-					FM_GMAC0_RXD3	0x0	0x20f	/*	GMAC0_RXD3  */
-					FM_GMAC0_MDC	0x0 0x208	/*	GMAC0_MDC  */
-					FM_GMAC0_MDIO	0x0 0x208	/*	GMAC0_MDIO  */
-					FM_GMAC0_COL	0x3	0x232	/*	PHY0_nRST  */
-					FM_GMAC0_CRS	0x3	0x232	/*	PHY0_nINT  */
+					FM_GPIO3_2	0x1	0x208	/* pwm0 */
 				>;
 			};
 		};
@@ -962,6 +866,22 @@
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
 			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
 			pinctrl_qspi1: qspi1grp {
 				thead,pins = <
 					FM_QSPI1_SCLK    0x0    0x20a
@@ -973,6 +893,7 @@
 				>;
 			};
 
+
 			pinctrl_iso7816: iso7816grp {
 				thead,pins = <
 					FM_QSPI1_SCLK		0x1	0x208
@@ -983,49 +904,6 @@
 				>;
 			};
 
-			pinctrl_i2c0: i2c0grp {
-				thead,pins = <
-					FM_I2C0_SCL	0x0	0x204
-					FM_I2C0_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c1: i2c1grp {
-				thead,pins = <
-					FM_I2C1_SCL	0x0	0x204
-					FM_I2C1_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_uart1: uart1grp {
- 				thead,pins = <
-					FM_UART1_TXD	0x0	0x234
-					FM_UART1_RXD	0x0	0x234
-				>;
-			};
-
-			pinctrl_uart4: uart4grp {
-				thead,pins = <
-					FM_UART4_TXD	0x0	0x208
-					FM_UART4_RXD	0x0	0x208
-					FM_UART4_CTSN	0x0	0x208
-					FM_UART4_RTSN	0x0	0x208
-				>;
-			};
-
-			pinctrl_uart3: uart3grp {
-				thead,pins = <
-					FM_UART3_TXD	0x1	0x202
-					FM_UART3_RXD	0x1	0x202
-				>;
-			};
-
-			pinctrl_i2c4: i2c4grp {
-				thead,pins = <
-					FM_GPIO0_18	0x1	0x204	/*	I2C4_SCL  */
-					FM_GPIO0_19	0x1	0x204	/*	I2C4_SDA  */
-				>;
-			};
 		};
 };
 
@@ -1136,36 +1014,26 @@
 &i2c0 {
 	clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c0>;
 };
 
 &i2c1 {
 	clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c1>;
 };
 
 &i2c2 {
 	clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c2>;
 };
 
 &i2c3 {
 	clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c3>;
 };
 
 &i2c4 {
 	clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c4>;
 };
 
 &isp0 {
@@ -1372,7 +1240,6 @@
 };
 
 &video0{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1459,7 +1326,6 @@
 
 
 &video1{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1563,7 +1429,6 @@
 };
 
 &video2{
-	status = "okay";
     vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1580,13 +1445,20 @@
 			mode_idx = <0>;
 			path_type = "SENSOR_1600x1200_RAW10_LINER";
 		};
+		sensor2 {
+			subdev_name = "vivcam";
+			idx = <7>; //imx334
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_3840x2180_RAW12_LINER";
+		};
 		isp {
 			subdev_name = "isp";
 			idx = <1>;
 			path_type = "ISP_MI_PATH_MP";
 			output {
-				max_width = <1920>;
-				max_height = <1088>;
+				max_width = <3840>;
+				max_height = <2180>;
 				bit_per_pixel = <16>;
 				frame_count = <3>;
 			};
@@ -1649,7 +1521,6 @@
 };
 
 &video3{
-	status = "okay";
     vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1753,7 +1624,6 @@
 };
 
 &video4{
-	status = "okay";
     vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1905,7 +1775,6 @@
 };
 
 &video5{
-	status = "okay";
 	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -2075,7 +1944,6 @@
 };
 
 &video6{
-	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
 	channel0 {
 		sensor0 {
@@ -2117,7 +1985,6 @@
 };
 
 &video7{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2287,7 +2154,6 @@
 
 
 &video8{
-	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
     channel0 {
 		sensor0 {
@@ -2319,7 +2185,6 @@
 };
 
 &video9{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2341,7 +2206,6 @@
 
 
 &video10{ // TUNINGTOOL
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2363,7 +2227,6 @@
 };
 
 &video11{
-	status = "okay";
 	channel0 { 
 		channel_id = <0>;
 		status = "okay";
@@ -2390,7 +2253,6 @@
 };
 
 &video12{ // TUNINGTOOL
-	status = "okay";
 	channel0 { // CSI2
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2412,7 +2274,6 @@
 };
 
 &video14{
-	status = "okay";
     vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[0]
 	status = "okay";
 	channel0 {
@@ -2579,8 +2440,6 @@
 
 &hdmi_tx {
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_hdmi>;
 
 	port@0 {
 		/* input */

arch/riscv/boot/dts/thead/light-beagle-ref.dts

@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
  * Copyright (C) 2021 Alibaba Group Holding Limited.
+ * Copyright (C) 2022 BeagleBoard.org - https://beagleboard.org/
+ * Copyright (C) 2022 Deepak Khatri <lorforlinux@beagleboard.org>
  */
 
 /dts-v1/;
@@ -10,13 +12,8 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "light-vi-devices.dtsi"
 / {
-	model = "T-HEAD Light val board";
-	compatible = "thead,light-val", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x0 0x7fe00000>;
-	};
+	model = "BeagleBoard.org BeagleV-Ahead";
+	compatible = "beagle,light", "thead,light-val", "thead,light";
 
 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
@@ -25,11 +22,42 @@
 
 	leds {
 		compatible = "gpio-leds";
-		status = "disabled";
-		led0 {
-			label = "SYS_STATUS";
-			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
-			default-state = "off";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins_default>;
+
+		led-0 {
+			label = "beaglebone:green:usr0";
+			gpios = <&ao_gpio4_porta 8 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			//function = LED_FUNCTION_HEARTBEAT;
+		};
+
+		led-1 {
+			label = "beaglebone:green:usr1";
+			gpios = <&ao_gpio4_porta 9 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "mmc0";
+			//function = LED_FUNCTION_DISK_ACTIVITY;
+		};
+
+		led-2 {
+			label = "beaglebone:green:usr2";
+			gpios = <&ao_gpio4_porta 10 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "cpu";
+			//function = LED_FUNCTION_CPU;
+		};
+
+		led-3 {
+			label = "beaglebone:green:usr3";
+			gpios = <&ao_gpio4_porta 11 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "mmc1";
+			//function = LED_FUNCTION_DISK_ACTIVITY;
+		};
+
+		led-4 {
+			label = "beaglebone:green:usr4";
+			gpios = <&ao_gpio4_porta 12 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "netdev";
+			//function = LED_FUNCTION_WLAN;
 		};
 	};
 
@@ -166,14 +194,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {
@@ -202,10 +222,9 @@
 	};
 
 	dummy_codec: dummy_codec {
-		#sound-dai-cells = <0>;
-		compatible = "thead,light-dummy-pcm";
+		#sound-dai-cells = <1>;
+		compatible = "linux,bt-sco";
 		status = "okay";
-		sound-name-prefix = "DUMMY";
 	};
 
 	reg_vref_1v8: regulator-adc-verf {
@@ -213,56 +232,9 @@
 			regulator-name = "vref-1v8";
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;
-	status = "okay";
-	};
-
-        reg_tp_pwr_en: regulator-pwr-en {
-                compatible = "regulator-fixed";
-                regulator-name = "PWR_EN";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpio1_porta 12 1>;
-                enable-active-high;
-                regulator-always-on;
-        };
-
-	wcn_wifi: wireless-wlan {
-		compatible = "wlan-platdata";
-		clock-names = "clk_wifi";
-		ref-clock-frequency = <24000000>;
-		keep_wifi_power_on;
-		pinctrl-names = "default";
-		wifi_chip_type = "rtl8723ds";
-		WIFI,poweren_gpio = <&gpio2_porta 29 0>;
-		WIFI,reset_n = <&gpio2_porta 22 0>;
 		status = "okay";
 	};
 
-	wcn_bt: wireless-bluetooth {
-		compatible = "bluetooth-platdata";
-		pinctrl-names = "default", "rts_gpio";
-		BT,power_gpio    = <&gpio2_porta 29 0>;
-		status = "okay";
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-		pinctrl-0 = <&pinctrl_volume>;
-		pinctrl-names = "default";
-		key-volumedown {
-			label = "Volume Down Key";
-			linux,code = <KEY_VOLUMEDOWN>;
-			debounce-interval = <1>;
-			gpios = <&gpio1_porta 19 0x1>;
-		};
-		key-volumeup {
-			label = "Volume Up Key";
-			linux,code = <KEY_VOLUMEUP>;
-			debounce-interval = <1>;
-			gpios = <&gpio2_porta 25 0x1>;
-		};
-	};
-
 	aon: aon {
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
@@ -294,119 +266,6 @@
 			regulator-always-on;
 		};
 
-		soc_vdd_3v3_en_reg: soc_vdd_3v3_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_vdd_3v3_en";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&gpio0_porta 30 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-		soc_lcd0_bias_en_reg: soc_lcd0_bias_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_lcd0_bias_en";
-			regulator-min-microvolt = <5700000>;
-			regulator-max-microvolt = <5700000>;
-			gpio = <&gpio1_porta 10 1>;
-			enable-active-high;
-		};
-
-		soc_vdd18_lcd0_en_reg: soc_lcd0_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_lcd0_en";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-			gpio = <&gpio1_porta 9 1>;
-			enable-active-high;
-		};
-
-		soc_vdd5v_se_en_reg: soc_vdd5v_se_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_vdd5v_se_en";
-			regulator-min-microvolt = <5000000>;
-			regulator-max-microvolt = <5000000>;
-			gpio = <&gpio2_porta 14 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-		soc_wcn33_en_reg: soc_wcn33_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_wcn33_en";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&gpio2_porta 29 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-		soc_vbus_en_reg: soc_vbus_en {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_vbus_en";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&gpio2_porta 28 1>;
-			enable-active-high;
-			regulator-always-on;
-		};
-
-
-        	soc_avdd28_rgb_reg: soc_avdd28_rgb {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_avdd28_rgb";
-			regulator-min-microvolt = <2800000>;
-			regulator-max-microvolt = <2800000>;
-			gpio = <&gpio1_porta 15 1>;
-			enable-active-high;
-		};
-
-        	soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dovdd18_rgb";
-			regulator-min-microvolt = <2800000>;
-			regulator-max-microvolt = <2800000>;
-			gpio = <&gpio1_porta 13 1>;
-			enable-active-high;
-		};
-
-        	soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dvdd12_rgb";
-			regulator-min-microvolt = <2800000>;
-			regulator-max-microvolt = <2800000>;
-			gpio = <&gpio1_porta 14 1>;
-			enable-active-high;
-		};
-
-        	soc_avdd25_ir_reg: soc_avdd25_ir {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_avdd25_ir";
-			regulator-min-microvolt = <2500000>;
-			regulator-max-microvolt = <2500000>;
-			gpio = <&gpio0_porta 28 1>;
-			enable-active-high;
-		};
-
-        	soc_dovdd18_ir_reg: soc_dovdd18_ir {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dovdd18_ir";
-			regulator-min-microvolt = <1800000>;
-			regulator-max-microvolt = <1800000>;
-			gpio = <&gpio1_porta 13 1>;
-			enable-active-high;
-		};
-
-        	soc_dvdd12_ir_reg: soc_dvdd12_ir {
-			compatible = "regulator-fixed";
-			regulator-name = "soc_dvdd12_ir";
-			regulator-min-microvolt = <1200000>;
-			regulator-max-microvolt = <1200000>;
-			gpio = <&gpio0_porta 29 1>;
-			enable-active-high;
-		};
-
 		aon_reg_dialog: light-dialog-reg {
 			compatible = "thead,light-dialog-pmic-ant";
 			status = "okay";
@@ -628,10 +487,11 @@
 		w25q,fast-read;
 	};
 
-	spidev@1 {
-		compatible = "spidev";
+	channel@1 {
+		compatible = "rohm,dh2228fv";
+		//symlink = "bone/spi/0.1";
 		#address-cells = <0x1>;
-		#size-cells = <0x1>;
+		#size-cells = <0x0>;
 		reg = <0x1>;
 		spi-max-frequency = <50000000>;
 	};
@@ -667,10 +527,11 @@
 	compatible = "snps,dw-apb-ssi";
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
-	status = "okay";
+	status = "disabled";
 
-	spidev@0 {
-		compatible = "spidev";
+	channel@0 {
+		compatible = "rohm,dh2228fv";
+		//symlink = "bone/spi/1.1";
 		#address-cells = <0x1>;
 		#size-cells = <0x1>;
 		reg = <0x0>;
@@ -748,7 +609,7 @@
 };
 
 &padctrl0_apsys { /* right-pinctrl */
-	light-evb-padctrl0 {
+	light_padctrl0: light-evb-padctrl0 {
 			/*
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
@@ -797,12 +658,20 @@
 				thead,pins = <
 					FM_GPIO3_2	0x1	0x208	/* pwm0 */
 				>;
-			};
 		};
+
+		pinctrl_bt: btgrp {
+			thead,pins = <
+				FM_SDIO1_WPRTN  0x3	0x72
+				FM_SDIO1_DETN   0x3	0x72
+				FM_GPIO2_30     0x0	0x72
+			>;
+		};
+	};
 };
 
 &padctrl1_apsys { /* left-pinctrl */
-	light-evb-padctrl1 {
+	light_padctrl1: light-evb-padctrl1 {
 			/*
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
@@ -841,18 +710,24 @@
 					FM_QSPI1_D2_WP		0x1	0x238
 					FM_QSPI1_D3_HOLD	0x1	0x238
 				>;
-			};
-
-			pinctrl_volume: volume_grp {
-				thead,pins = <
-					FM_CLK_OUT_2  0x3     0x208
-				>;
-			};
 		};
+	};
 };
 
+/*
+	PIN      ,        0x0,   0x1,  0x2,     0x3,   0x4,  0x5
+	AUDIO_PA8,  AUDIO_PA8,  NULL, NULL, GPIO4_8,  NULL, NULL
+	AUDIO_PA9,  AUDIO_PA9,  NULL, NULL, GPIO4_9,  NULL, NULL
+	AUDIO_PA10, AUDIO_PA10, NULL, NULL, GPIO4_10, NULL, NULL
+	AUDIO_PA11, AUDIO_PA11, NULL, NULL, GPIO4_11, NULL, NULL
+	AUDIO_PA12, AUDIO_PA12, NULL, NULL, GPIO4_12, NULL, NULL
+*/
+
+#define FM_AUDIO_PA8_AUDIO_PA8 0x00
+#define FM_AUDIO_PA8_GPIO 0x03
+
 &padctrl_aosys {
-	light-aon-padctrl {
+	light_padctrl: light-aon-padctrl {
 			/*
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
@@ -870,12 +745,26 @@
 				>;
 			};
 
+		led_pins_default: leds0_grp {
+			thead,pins = <
+				FM_AUDIO_PA8	0x3	0x72
+				FM_AUDIO_PA9	0x3	0x72
+				FM_AUDIO_PA10	0x3	0x72
+				FM_AUDIO_PA11	0x3	0x72
+				FM_AUDIO_PA12	0x3	0x72
+			>;
+		};
 	};
 };
 
 &i2c0 {
     clock-frequency = <400000>;
 	status = "okay";
+
+	eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+	};
 };
 
 &i2c1 {
@@ -961,85 +850,6 @@
     memory-region = <&dsp1_mem>;
 };
 
-&vvcam_flash_led0{
-    flash_led_name = "aw36413_aw36515";
-    floodlight_i2c_bus = /bits/ 8 <2>;
-    floodlight_en_pin = <&gpio1_porta 26 0>;
-    projection_i2c_bus = /bits/ 8 <1>;
-    flash_led_touch_pin = <&gpio1_porta 27 0>; //flash led touch pin
-    io-channels = <&adc 2>;
-    io-channel-names = "projection_adc";
-    status = "okay";
-};
-
-&vvcam_sensor0 {
-	sensor_name = "SC2310";
-	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
-	sensor_regulator_timing_us = <70 50 20>;
-	sensor_pdn = <&gpio1_porta 21 0>; //powerdown pin / shutdown pin 
-	sensor_rst = <&gpio1_porta 16 0>;
-	sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
-	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
-	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-    i2c_reg_width = /bits/ 8 <2>;
-    i2c_data_width = /bits/ 8 <1>;
-    i2c_addr = /bits/ 8 <0x30>;
-	i2c_bus = /bits/ 8 <3>;
-	status = "okay";
-};
-
-&vvcam_sensor1 {
-    sensor_name = "SC132GS";
-    sensor_regulators = "DOVDD18_IR", "DVDD12_IR", "AVDD25_IR";
-    sensor_regulator_timing_us = <70 1000 2000>;
-    i2c_addr = /bits/ 8 <0x31>;
-    sensor_pdn = <&gpio1_porta 28 0>; //powerdown pin / shutdown pin 
-    sensor_rst = <&gpio1_porta 24 0>;
-	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
-    DOVDD18_IR-supply = <&soc_dovdd18_ir_reg>;
-    DVDD12_IR-supply = <&soc_dvdd12_ir_reg>;
-    AVDD25_IR-supply = <&soc_avdd25_ir_reg>;
-    i2c_reg_width = /bits/ 8 <2>;
-    i2c_data_width = /bits/ 8 <1>;
-    i2c_bus = /bits/ 8 <2>;
-    status = "okay";
-};
-
-&vvcam_sensor2 {
-	sensor_name = "GC5035";
-	sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
-	sensor_regulator_timing_us = <100 50 0>;
-	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin 
-	sensor_rst = <&gpio1_porta 29 0>;
-	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
-	DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
-	AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
-	i2c_addr = /bits/ 8 <0x37>;
-	i2c_bus = /bits/ 8 <4>;
-	i2c_reg_width = /bits/ 8 <1>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "okay";
-};
-
-&vvcam_sensor3 {
-	sensor_name = "GC02M1B";
-	sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
-	sensor_regulator_timing_us = <100 50 0>;
-	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin 
-	sensor_rst = <&gpio1_porta 29 0>;
-	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
-	DVDD12_SCAN-supply = <&soc_dvdd12_scan_reg>;
-	AVDD28_SCAN-supply = <&soc_avdd28_scan_en_reg>;
-	i2c_addr = /bits/ 8 <0x37>;
-	i2c_bus = /bits/ 8 <4>;
-	i2c_reg_width = /bits/ 8 <1>;
-	i2c_data_width = /bits/ 8 <1>;
-	status = "okay";
-};
-
 &video0{
     vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
     channel0 {
@@ -2187,21 +1997,6 @@
 	status = "okay";
 };
 
-&dpu_enc0 {
-	status = "okay";
-
-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc0_out: endpoint {
-				remote-endpoint = <&dsi0_in>;
-			};
-		};
-	};
-};
-
 &dpu_enc1 {
         ports {
                 /delete-node/ port@0;
@@ -2212,46 +2007,6 @@
         status = "okay";
 };
 
-&dsi0 {
-        status = "okay";
-};
-
-&dhost_0 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi0_in: endpoint {
-				remote-endpoint = <&enc0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi0_out: endpoint {
-				remote-endpoint = <&panel0_in>;
-			};
-		};
-	};
-
-	panel0@0 {
-		compatible = "i2c_dsi,ili9881d";
-		reg = <0>;
-		mcu_auto_reset_enable = <0>;
-		tp_point_rotate = <0>;
-
-		port {
-			panel0_in: endpoint {
-				remote-endpoint = <&dsi0_out>;
-			};
-		};
-	};
-};
-
 &disp1_out {
 	remote-endpoint = <&hdmi_tx_in>;
 };
@@ -2269,11 +2024,6 @@
 
 &lightsound {
         status = "okay";
-        simple-audio-card,widgets = "Speaker", "Speaker";
-        simple-audio-card,routing = 
-        	"Speaker", "AW87519 VO",
-        	"AW87519 IN", "ES8156 ROUT";
-        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
         simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
                 reg = <0>;
                 format = "i2s";
@@ -2301,13 +2051,13 @@
                         sound-dai = <&light_i2s 1>;
                 };
                 codec {
-                        sound-dai = <&dummy_codec>;
+                        sound-dai = <&dummy_codec 2>;
                 };
         };
 };
 
 &light_i2s {
-        status = "okay";
+        status = "disabled";
 };
 
 &i2s0 {
@@ -2329,12 +2079,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 	c910_1: cpu@1 {
@@ -2343,12 +2095,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 	c910_2: cpu@2 {
@@ -2358,12 +2112,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 	c910_3: cpu@3 {
@@ -2373,12 +2129,14 @@
 			300000	650000
 			800000	700000
 			1500000	800000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
 			800000	800000
 			1500000	800000
+			1848000	1000000
 		>;
 	};
 };

arch/riscv/boot/dts/thead/light-beagle.dts

@@ -7,6 +7,27 @@
 
 #include "light-beagle-ref.dts"
 
+/ {
+	bcmdhd_wlan {
+		compatible = "android,bcmdhd_wlan";
+
+		gpio_wl_reg_on =   <&gpio2_porta 31 1>;
+		gpio_wl_host_wake = <&gpio2_porta 25 1>;
+	};
+};
+
+&pwm {
+	status = "disabled";
+};
+
+&qspi0 {
+	status = "disabled";
+};
+
+&qspi1 {
+	status = "disabled";
+};
+
 &vvcam_sensor4 { // beagle board J5 CSI0 connector
 	sensor_name = "IMX219";
 	sensor_pdn = <&gpio2_porta 23 0>; //powerdown pin / shutdown pin 
@@ -703,3 +724,5 @@ video12: tuningtool
 		};
 	};
 };
+
+#include "light-beagle-bone-buses.dtsi"

arch/riscv/boot/dts/thead/light-crash.dts

@@ -163,14 +163,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {

arch/riscv/boot/dts/thead/light-lpi4a-16gb.dts

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a-ref.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x3 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
+};

arch/riscv/boot/dts/thead/light-lpi4a-camera-tuning.dts

@@ -1,53 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */	
-/*
- * Copyright (C) 2021 Alibaba Group Holding Limited.
- */
-
-/dts-v1/;
-
-#include "light-lpi4a.dts"
-
-
-
-&video10{ // TUNINGTOOL
-	status = "okay";
-	channel0 {
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <3>;
-			csi_idx = <0>;
-			mode_idx = <1>; // 0=640 480 1=2592x1944
-			path_type = "SENSOR_2592x1944_LINER";
-		};
-        dma {
-			path_type = "VIPRE_CSI0_ISP0";
-		};
-	};
-};
-
-&video15{
-    status = "okay";
-    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
-    channel0 {
-        status = "okay";
-		sensor0 {
-			subdev_name = "vivcam";
-			idx = <0>;
-			csi_idx = <0>;
-			mode_idx = <0>;
-			path_type = "SENSOR_VGA_RAW12_LINER";
-		};
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <3>;
-			csi_idx = <0>;
-			mode_idx = <1>;
-			path_type = "SENSOR_2592x1944_LINER";
-		};
-		dma {
-			subdev_name = "vipre";
-			idx = <0>;
-			path_type = "VIPRE_CSI0_DDR";
-		};
-    };
-};

arch/riscv/boot/dts/thead/light-lpi4a-cluster-16gb.dts

@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "light-lpi4a-16gb.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board on Cluster";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&audio_i2c1 {
+	status = "disabled";
+};
+
+&lightsound {
+	status = "disabled";
+};
+
+&reg_usb_hub_vdd1v2 {
+	/delete-property/ gpio;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio;
+};

arch/riscv/boot/dts/thead/light-lpi4a-cluster.dts

@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "light-lpi4a.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board on Cluster";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&audio_i2c1 {
+	status = "disabled";
+};
+
+&lightsound {
+	status = "disabled";
+};
+
+&reg_usb_hub_vdd1v2 {
+	/delete-property/ gpio;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio;
+};

arch/riscv/boot/dts/thead/light-lpi4a-crash.dts

@@ -1,98 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2023 Alibaba Group Holding Limited.
- */
-
-#include "light-crash.dts"
-
-&aon {
-	aon_reg_dialog: light-dialog-reg {
-		compatible = "thead,light-dialog-pmic-ant";
-		status = "okay";
-
-		dvdd_cpu_reg: appcpu_dvdd {
-			regulator-name = "appcpu_dvdd";
-			regulator-min-microvolt = <300000>;
-			regulator-max-microvolt = <1570000>;
-			regulator-boot-on;
-			regulator-always-on;
-		};
-
-		dvddm_cpu_reg: appcpu_dvddm {
-			regulator-name = "appcpu_dvddm";
-			regulator-min-microvolt = <300000>;
-			regulator-max-microvolt = <1570000>;
-			regulator-boot-on;
-			regulator-always-on;
-		};
-	};
-};
-
-&cpus {
-	c910_0: cpu@0 {
-		operating-points = <
-			/* kHz    uV */
-			300000	600000
-			800000	700000
-			1500000	800000
-			1848000 1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000 1000000
-		>;
-	};
-	c910_1: cpu@1 {
-		operating-points = <
-			/* kHz    uV */
-			300000	600000
-			800000	700000
-			1500000	800000
-			1848000 1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000 1000000
-		>;
-	};
-	c910_2: cpu@2 {
-
-		operating-points = <
-			/* kHz    uV */
-			300000	600000
-			800000	700000
-			1500000	800000
-			1848000 1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000 1000000
-		>;
-	};
-	c910_3: cpu@3 {
-
-		operating-points = <
-			/* kHz    uV */
-			300000	600000
-			800000	700000
-			1500000	800000
-			1848000 1000000
-		>;
-		light,dvddm-operating-points = <
-			/* kHz   uV */
-			300000	800000
-			800000	800000
-			1500000	800000
-			1848000 1000000
-		>;
-	};
-};

arch/riscv/boot/dts/thead/light-lpi4a-dsi0-hdmi.dts

@@ -0,0 +1,131 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-lpi4a-ref.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x00000000 0x2 0x00000000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x1 0xe4000000 0 0x14000000>; // [0x1E400_0000 ~ 0x1F800_0000]
+};
+
+&pwm {
+	status = "okay";
+};
+
+&qspi0 {
+	status = "okay";
+};
+
+&qspi1 {
+	status = "okay";
+};
+
+&i2c3 {
+	touch@14 {
+		#gpio-cells = <2>;
+		compatible = "goodix,gt9271";
+		reg = <0x14>;
+		interrupt-parent = <&ao_gpio_porta>;
+		interrupts = <3 0>; 
+		irq-gpios = <&ao_gpio_porta 3 0>; 
+		reset-gpios = <&pcal6408ahk_d 0 0>; 
+		AVDD28-supply = <&reg_tp_pwr_en>;
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <1280>;
+		tp-size = <9271>;
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+       status = "okay";
+
+       ports {
+               /* output */
+               port@1 {
+                       reg = <1>;
+
+                       enc0_out: endpoint {
+                               remote-endpoint = <&dsi0_in>;
+                       };
+               };
+       };
+};
+
+&dpu_enc1 {
+        ports {
+                /delete-node/ port@0;
+        };
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       dsi0_in: endpoint {
+                               remote-endpoint = <&enc0_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+
+                       dsi0_out: endpoint {
+                               remote-endpoint = <&panel0_in>;
+                       };
+               };
+       };
+
+       panel0@0 {
+		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
+		hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;  
+		vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
+
+               port {
+                       panel0_in: endpoint {
+                               remote-endpoint = <&dsi0_out>;
+                       };
+               };
+       };
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};

arch/riscv/boot/dts/thead/light-lpi4a-hdmi.dts

@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */	
-/*
- * Copyright (C) 2021 Alibaba Group Holding Limited.
- */
-
-/dts-v1/;
-
-#include "light-lpi4a.dts"
-
-&lightsound {
-        status = "okay";
-        simple-audio-card,dai-link@0 {          /* I2S - HDMI*/
-                reg = <0>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&light_i2s 1>;
-                };
-                codec {
-                        sound-dai = <&dummy_codec>;
-                };
-        };
-        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
-                reg = <1>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s1 0>;
-                };
-                codec {
-                        sound-dai = <&es7210_audio_codec>;
-                };
-        };
-        simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 8156*/
-                reg = <2>;
-                format = "i2s";
-                cpu {
-                        sound-dai = <&i2s1 0>;
-                };
-                codec {
-                        sound-dai = <&es8156_audio_codec>;
-                };
-        };
-};
-
-&dpu_enc0 {
-        status = "disabled";
-};
-
-&dsi0 {
-        status = "disabled";
-};

arch/riscv/boot/dts/thead/light-lpi4a-hx8279.dts

@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022-2023 Alibaba Group Holding Limited.
- */
-
-#include "light-lpi4a-ref.dts"
-
-/ {
-	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
-	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x1 0xffe00000>;
-	};
-};
-
-&cmamem {
-	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
-	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
-};
-
-&i2c3 {
-	touch@14 {
-                #gpio-cells = <2>;
-                compatible = "goodix,gt9271";
-                reg = <0x14>;
-                interrupt-parent = <&ao_gpio_porta>;
-                interrupts = <3 0>;
-                irq-gpios = <&ao_gpio_porta 3 0>;
-                reset-gpios = <&pcal6408ahk_d 0 0>;
-                AVDD28-supply = <&reg_tp_pwr_en>;
-                touchscreen-size-x = <1200>;
-                touchscreen-size-y = <1920>;
-                tp-size = <9271>;
-                status = "okay";
-        };
-};
-
-&dsi0 {
-        status = "okay";
-};
-
-
-&dhost_0 {
-	panel0@0 {
-                compatible = "himax,hx8279";
-                reg = <0>;
-                backlight = <&lcd0_backlight>;
-                reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
-                hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
-                vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
-
-                port {
-                        panel0_in: endpoint {
-                                remote-endpoint = <&dsi0_out>;
-                        };
-                };
-        };
-};

arch/riscv/boot/dts/thead/light-lpi4a-laptop.dts

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "light-lpi4a.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board use on laptop";
+
+	power-keys {
+                compatible = "gpio-keys";
+		key-lid {
+			label = "lid status";
+			linux,code = <KEY_DISPLAY_OFF>;
+			debounce-interval = <1>;
+			gpios = <&gpio1_porta 5 0x1>;
+		};
+	};
+};

arch/riscv/boot/dts/thead/light-lpi4a-ref.dts

@@ -158,14 +158,6 @@
 		iopmp_dsp1: IOPMP_DSP1 {
 			is_default_region;
 		};
-
-		iopmp_audio0: IOPMP_AUDIO0 {
-			is_default_region;
-		};
-
-		iopmp_audio1: IOPMP_AUDIO1 {
-			is_default_region;
-		};
 	};
 
 	mbox_910t_client1: mbox_910t_client1 {
@@ -266,17 +258,15 @@
 		ref-clock-frequency = <24000000>;
 		keep_wifi_power_on;
 		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_wifi_wake>;
 		wifi_chip_type = "rtl8723ds";
-		WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
+		WIFI,poweren_gpio = <&pcal6408ahk_c 5 0>;
 		status = "okay";
 	};
 
 	wcn_bt: wireless-bluetooth {
 		compatible = "bluetooth-platdata";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_bt_wake>;
-		BT,power_gpio    = <&pcal6408ahk_c 5 0>;
+		pinctrl-names = "default", "rts_gpio";
+		BT,power_gpio    = <&pcal6408ahk_c 6 0>;
 		status = "okay";
 	};
 
@@ -661,9 +651,9 @@
         no-map;
     };
 	vi_mem: framebuffer@10000000 {
-		reg = <0x0 0x10000000 0x0 0x6700000>;	/* vi_mem_pool_region[0]  44 MB (default) */
-		       //0x0 0x12C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
-		       //0x0 0x14900000 0x0 0x01E00000>;	/* vi_mem_pool_region[2]  30 MB */
+		reg = <0x0 0x10000000 0x0 0x02C00000	/* vi_mem_pool_region[0]  44 MB (default) */
+		       0x0 0x12C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x14900000 0x0 0x01E00000>;	/* vi_mem_pool_region[2]  30 MB */
 		no-map;
 	};
 	facelib_mem: memory@17000000 {
@@ -769,9 +759,9 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
+	status = "okay";
 
 	spi_norflash@0 {
-		status = "okay";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
@@ -781,7 +771,6 @@
 	};
 
 	spidev@1 {
-		status = "disable";
 		compatible = "spidev";
 		#address-cells = <0x1>;
 		#size-cells = <0x1>;
@@ -792,23 +781,6 @@
 
 &uart0 {
 	clock-frequency = <100000000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart0>;
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart1>;
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-};
-
-&uart4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart4>;
 };
 
 &qspi0 {
@@ -855,8 +827,6 @@
 	tx-clk-delay = <0x00>; /* for RGMII */
 	phy-handle = <&phy_88E1111_0>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gmac0>;
 
 	mdio0 {
 		#address-cells = <1>;
@@ -879,8 +849,6 @@
 	tx-clk-delay = <0x00>; /* for RGMII */
 	phy-handle = <&phy_88E1111_1>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gmac1>;
 };
 
 &emmc {
@@ -902,8 +870,6 @@
 	pull_up;
 	wprtn_ignore;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_sdio0>;
 };
 
 &sdhci1 {
@@ -930,22 +896,8 @@
 			 */
 			pinctrl_uart0: uart0grp {
 				thead,pins = <
-					FM_UART0_TXD	0x0	0x202
-					FM_UART0_RXD	0x0	0x202
-				>;
-			};
-
-			pinctrl_i2c2: i2c2grp {
-				thead,pins = <
-					FM_I2C2_SCL	0x0	0x204
-					FM_I2C2_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c3: i2c3grp {
-				thead,pins = <
-					FM_I2C3_SCL	0x0	0x204
-					FM_I2C3_SDA	0x0	0x204
+					FM_UART0_TXD	0x0	0x72
+					FM_UART0_RXD	0x0	0x72
 				>;
 			};
 
@@ -982,62 +934,9 @@
 				>;
 			};
 
-			pinctrl_gmac1: gmac1grp {
-				thead,pins = <
-					FM_GPIO2_18	0x1	0x20f	/*	GMAC1_TX_CLK  */
-					FM_GPIO2_19	0x1	0x20f	/*	GMAC1_RX_CLK  */
-					FM_GPIO2_20	0x1	0x20f	/*	GMAC1_TXEN  */
-					FM_GPIO2_21	0x1	0x20f	/*	GMAC1_TXD0  */
-					FM_GPIO2_22	0x1	0x20f	/*	GMAC1_TXD1  */
-					FM_GPIO2_23	0x1	0x20f	/*	GMAC1_TXD2  */
-					FM_GPIO2_24	0x1	0x20f	/*	GMAC1_TXD3  */
-					FM_GPIO2_25	0x1	0x20f	/*	GMAC1_RXDV  */
-					FM_GPIO2_30	0x1	0x20f	/*	GMAC1_RXD0  */
-					FM_GPIO2_31	0x1	0x20f	/*	GMAC1_RXD1  */
-					FM_GPIO3_0	0x1	0x20f	/*	GMAC1_RXD2  */
-					FM_GPIO3_1	0x1	0x20f	/*	GMAC1_RXD3  */
-				>;
-			};
-
-			pinctrl_sdio0: sdio0grp {
-				thead,pins = <
-					FM_SDIO0_DETN	0x0	0x202
-				>;
-			};
-
 			pinctrl_pwm: pwmgrp {
 				thead,pins = <
-					FM_GPIO3_2	0x1	0x20f	/* pwm0 */
-					FM_GPIO3_3	0x1	0x20f	/* pwm1 */
-				>;
-			};
-
-			pinctrl_hdmi: hdmigrp {
-				thead,pins = <
-					FM_HDMI_SCL	0x0	0x202
-					FM_HDMI_SDA	0x0	0x202
-					FM_HDMI_CEC	0x0	0x202
-				>;
-			};
-
-			pinctrl_gmac0: gmac0grp {
-				thead,pins = <
-					FM_GMAC0_TX_CLK	0x0	0x20f	/*	GMAC0_TX_CLK  */
-					FM_GMAC0_RX_CLK	0x0	0x20f	/*	GMAC0_RX_CLK  */
-					FM_GMAC0_TXEN	0x0	0x20f	/*	GMAC0_TXEN  */
-					FM_GMAC0_TXD0	0x0	0x20f	/*	GMAC0_TXD0  */
-					FM_GMAC0_TXD1	0x0	0x20f	/*	GMAC0_TXD1  */
-					FM_GMAC0_TXD2	0x0	0x20f	/*	GMAC0_TXD2  */
-					FM_GMAC0_TXD3	0x0	0x20f	/*	GMAC0_TXD3  */
-					FM_GMAC0_RXDV	0x0	0x20f	/*	GMAC0_RXDV  */
-					FM_GMAC0_RXD0	0x0	0x20f	/*	GMAC0_RXD0  */
-					FM_GMAC0_RXD1	0x0	0x20f	/*	GMAC0_RXD1  */
-					FM_GMAC0_RXD2	0x0	0x20f	/*	GMAC0_RXD2  */
-					FM_GMAC0_RXD3	0x0	0x20f	/*	GMAC0_RXD3  */
-					FM_GMAC0_MDC	0x0 0x208	/*	GMAC0_MDC  */
-					FM_GMAC0_MDIO	0x0 0x208	/*	GMAC0_MDIO  */
-					FM_GMAC0_COL	0x3	0x232	/*	PHY0_nRST  */
-					FM_GMAC0_CRS	0x3	0x232	/*	PHY0_nINT  */
+					FM_GPIO3_2	0x1	0x208	/* pwm0 */
 				>;
 			};
 		};
@@ -1049,6 +948,22 @@
 			 * Pin Configuration Node:
 			 * Format: <pin_id mux_node config>
 			 */
+			pinctrl_uart3: uart3grp {
+				thead,pins = <
+					FM_UART3_TXD	0x0	0x72
+					FM_UART3_RXD	0x0	0x72
+				>;
+			};
+
+			pinctrl_uart4: uart4grp {
+				thead,pins = <
+					FM_UART4_TXD	0x0	0x72
+					FM_UART4_RXD	0x0	0x72
+					FM_UART4_CTSN	0x0	0x72
+					FM_UART4_RTSN	0x0	0x72
+				>;
+			};
+
 			pinctrl_qspi1: qspi1grp {
 				thead,pins = <
 					FM_QSPI1_SCLK    0x0    0x20a
@@ -1058,54 +973,6 @@
 				>;
 			};
 
-			pinctrl_i2c0: i2c0grp {
-				thead,pins = <
-					FM_I2C0_SCL	0x0	0x204
-					FM_I2C0_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_i2c1: i2c1grp {
-				thead,pins = <
-					FM_I2C1_SCL	0x0	0x204
-					FM_I2C1_SDA	0x0	0x204
-				>;
-			};
-
-			pinctrl_uart1: uart1grp {
- 				thead,pins = <
-					FM_UART1_TXD	0x0	0x202
-					FM_UART1_RXD	0x0	0x202
-				>;
-			};
-
-			pinctrl_uart4: uart4grp {
-				thead,pins = <
-					FM_UART4_TXD	0x0	0x202
-					FM_UART4_RXD	0x0	0x202
-					FM_UART4_CTSN	0x0	0x202
-					FM_UART4_RTSN	0x0	0x202
-				>;
-			};
-
-			pinctrl_uart3: uart3grp {
-				thead,pins = <
-					FM_UART3_TXD	0x1	0x202
-					FM_UART3_RXD	0x1	0x202
-				>;
-			};
-
-			pinctrl_wifi_wake: wifi_grp {
-				thead,pins = <
-					FM_GPIO0_27	0x0	0x202
-				>;
-			};
-
-			pinctrl_bt_wake: bt_grp {
-				thead,pins = <
-					FM_GPIO0_28	0x0	0x202
-				>;
-			};
 
 			pinctrl_iso7816: iso7816grp {
 				thead,pins = <
@@ -1227,8 +1094,6 @@
 &i2c0 {
     clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c0>;
 
 	pcal6408ahk_b: gpio@20 {
 		compatible = "nxp,pca9557";
@@ -1241,8 +1106,6 @@
 &i2c1 {
     clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c1>;
 
 	pcal6408ahk_c: gpio@20 {
 		compatible = "nxp,pca9557";
@@ -1255,15 +1118,11 @@
 &i2c2 {
     clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c2>;
 };
 
 &i2c3 {
     clock-frequency = <400000>;
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c3>;
 
 	pcal6408ahk_d: gpio@20 {
 		compatible = "nxp,pca9557";
@@ -1416,6 +1275,13 @@
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <0>;
+			csi_idx = <0>;
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+		};
 		sensor1 {
 			subdev_name = "vivcam";
 			idx = <3>;
@@ -1440,52 +1306,21 @@
 			};
 		};
 	};
-	channel1 {
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <3>;
-			csi_idx = <0>;
-			mode_idx = <1>;
-			path_type = "SENSOR_2592x1944_LINER";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_SP";
-			output {
-				max_width = <2600>;
-				max_height = <2000>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-	};
-	channel2 {
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <3>;
-			csi_idx = <0>;
-			mode_idx = <1>;
-			path_type = "SENSOR_2592x1944_LINER";
-		};
-		isp {
-			subdev_name = "isp";
-			idx = <1>;
-			path_type = "ISP_MI_PATH_SP2_BP";
-			output {
-				max_width = <2600>;
-				max_height = <2000>;
-				bit_per_pixel = <12>;
-				frame_count = <3>;
-			};
-		};
-	};
 };
 
+
 &video3{
     vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	status = "okay";
     channel0 {
+		sensor0 {
+            subdev_name = "vivcam";
+			idx = <0>;
+			csi_idx = <0>;
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+
+		};
 		sensor1 {
 			subdev_name = "vivcam";
 			idx = <3>;
@@ -1504,8 +1339,8 @@
 			idx = <1>;
 			path_type = "ISP_MI_PATH_MP";
 			output {
-				max_width = <2600>;
-				max_height = <2000>;
+				max_width = <1920>;
+				max_height = <1088>;
 				bit_per_pixel = <12>;
 				frame_count = <3>;
 			};
@@ -1518,12 +1353,13 @@
 		};
 	};
 	channel1 {
-        sensor1 {
-			subdev_name = "vivcam";
-			idx = <3>;
+        sensor0 {
+            subdev_name = "vivcam";
+			idx = <0>;
 			csi_idx = <0>;
-			mode_idx = <1>;
-			path_type = "SENSOR_2592x1944_LINER";
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+
 		};
         dma {
             subdev_name = "vipre";
@@ -1536,8 +1372,8 @@
 			idx = <1>;
 			path_type = "ISP_MI_PATH_MP";
 			output {
-				max_width = <2600>;
-				max_height = <2000>;
+				max_width = <1920>;
+				max_height = <1088>;
 				bit_per_pixel = <12>;
 				frame_count = <3>;
 			};
@@ -1550,12 +1386,13 @@
 		};
 	};
 	channel2 {
-		sensor1 {
-			subdev_name = "vivcam";
-			idx = <3>;
+        sensor0 {
+            subdev_name = "vivcam";
+			idx = <0>;
 			csi_idx = <0>;
-			mode_idx = <1>;
-			path_type = "SENSOR_2592x1944_LINER";
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+
 		};
         dma {
             subdev_name = "vipre";
@@ -1568,8 +1405,8 @@
 			idx = <1>;
 			path_type = "ISP_MI_PATH_MP";
 			output {
-				max_width = <2600>;
-				max_height = <2000>;
+				max_width = <1920>;
+				max_height = <1088>;
 				bit_per_pixel = <12>;
 				frame_count = <3>;
 			};
@@ -1583,6 +1420,70 @@
 	};
 };
 
+&video9{
+	status = "okay";
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <1>; //vivcam1 sc132gs
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080X1280_30FPS_RAW10_LINER";
+		};
+		dsp{
+			output {
+				max_width = <1080>;
+				max_height = <1280>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+
+&video10{ // TUNINGTOOL
+	status = "okay";
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <0>; //<0>=vivcam0 : ov12870 
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <1>;
+			path_type = "SENSOR_1080P_RAW10_LINER"; //SENSOR_VGA_RAW10_LINER//
+			skip_init = <1>;
+		};
+        dma {
+			path_type = "VIPRE_CSI0_ISP0";
+		};
+	};
+};
+
+&video15{
+    status = "okay";
+    channel0 {
+        status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <0>;
+			csi_idx = <0>;
+			mode_idx = <0>;
+			path_type = "SENSOR_VGA_RAW12_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <3>;
+			csi_idx = <0>;
+			mode_idx = <1>;
+			path_type = "SENSOR_2592x1944_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_DDR";
+		};
+    };
+};
 
 &trng {
 	status = "disabled";
@@ -1623,21 +1524,6 @@
 	status = "okay";
 };
 
-&dpu_enc0 {
-	status = "okay";
-
-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc0_out: endpoint {
-				remote-endpoint = <&dsi0_in>;
-			};
-		};
-	};
-};
-
 &dpu_enc1 {
         ports {
                 /delete-node/ port@0;
@@ -1648,37 +1534,12 @@
         status = "okay";
 };
 
-&dhost_0 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi0_in: endpoint {
-				remote-endpoint = <&enc0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi0_out: endpoint {
-				remote-endpoint = <&panel0_in>;
-			};
-		};
-	};
-};
-
 &disp1_out {
 	remote-endpoint = <&hdmi_tx_in>;
 };
 
 &hdmi_tx {
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_hdmi>;
 
 	port@0 {
 		/* input */
@@ -1732,13 +1593,13 @@
 
 &i2s1 {
         status = "okay";
+        dmas = <&dmac2 11>, <&dmac2 10>;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_audiopa14>,
                     <&pinctrl_audiopa15>,
                     <&pinctrl_audiopa16>,
                     <&pinctrl_audiopa17>,
                     <&pinctrl_audio_i2s1>;
-        light,mclk_keepon = <1>;
 };
 
 &i2s2 {

arch/riscv/boot/dts/thead/light-lpi4a-sec.dts

@@ -5,7 +5,7 @@
 
 /dts-v1/;
 
-#include "light-lpi4a-hdmi.dts"
+#include "light-lpi4a.dts"
 
 
 &light_iopmp {

arch/riscv/boot/dts/thead/light-lpi4a.dts

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Copyright (C) 2022-2023 Alibaba Group Holding Limited.
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
  */
 
 #include "light-lpi4a-ref.dts"
@@ -16,44 +16,5 @@
 };
 
 &cmamem {
-	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
-	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
-};
-
-&i2c3 {
-        touch@14 {
-                #gpio-cells = <2>;
-                compatible = "goodix,gt9271";
-                reg = <0x14>;
-                interrupt-parent = <&ao_gpio_porta>;
-                interrupts = <3 0>;
-                irq-gpios = <&ao_gpio_porta 3 0>;
-                reset-gpios = <&pcal6408ahk_d 0 0>;
-                AVDD28-supply = <&reg_tp_pwr_en>;
-                touchscreen-size-x = <800>;
-                touchscreen-size-y = <1200>;
-                tp-size = <9271>;
-                status = "okay";
-        };
-};
-
-&dsi0 {
-        status = "okay";
-};
-
-&dhost_0 {
-        panel0@0 {
-		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
-                reg = <0>;
-                backlight = <&lcd0_backlight>;
-                reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
-                hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
-                vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
-
-                port {
-                        panel0_in: endpoint {
-                                remote-endpoint = <&dsi0_out>;
-                        };
-                };
-        };
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0x0E400_0000 ~ 0x0F800_0000]
 };

arch/riscv/boot/dts/thead/light-milkv-meles-4g.dts

@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "light-milkv-meles.dts"
+
+/ {
+	model = "Milk-V Meles 4G";
+	compatible = "milkv,meles", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0xffe00000>;
+	};
+};

arch/riscv/boot/dts/thead/light-milkv-meles.dts

@@ -0,0 +1,885 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "light.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	model = "Milk-V Meles";
+	compatible = "milkv,meles", "thead,light";
+
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdhci0;
+		mmc2 = &sdhci1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+
+	display_subsystem: display-subsystem {
+		status = "okay";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+
+		led1 {
+			label = "USER_LED";
+			gpios = <&gpio1_porta 16 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			linux,default-trigger = "heartbeat";
+			default-state = "on";
+		};
+	};
+
+	light_iopmp: iopmp {
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp_fce: IOPMP_FCE {
+			is_default_region;
+		};
+
+		iopmp_npu: IOPMP_NPU {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		status = "okay";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/* I2S - AUDIO SYS CODEC 8156*/
+		simple-audio-card,dai-link@0 {
+			reg = <0>;
+			format = "i2s";
+			cpu {
+				sound-dai = <&i2s1 0>;
+			};
+			codec {
+				sound-dai = <&es8156_audio_codec>;
+			};
+		};
+
+		/* I2S - HDMI */
+		simple-audio-card,dai-link@1 {
+			reg = <1>;
+			format = "i2s";
+			cpu {
+				sound-dai = <&light_i2s 1>;
+			};
+			codec {
+				sound-dai = <&dummy_codec>;
+			};
+		};
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		status = "okay";
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&gpio0_porta 20 1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_wireless_power>;
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
+		status = "okay";
+		sound-name-prefix = "DUMMY";
+	};
+
+	vdd_5v: regulator-vdd-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+		vin-supply = <&vdd_5v>;
+		status = "okay";
+	};
+
+	reg_vref_1v8: regulator-adc-verf {
+		compatible = "regulator-fixed";
+		regulator-name = "vref-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		status = "okay";
+	};
+
+	vcc_usb_en: regulator-usb-en {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_usb_en";
+		gpio = <&gpio2_porta 30 1>;	/* GPIO_ACTIVE_LOW: 1 */
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+
+	aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "okay";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic-ant";
+			status = "okay";
+
+			dvdd_cpu_reg: appcpu_dvdd {
+				regulator-name = "appcpu_dvdd";
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1570000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			dvddm_cpu_reg: appcpu_dvddm {
+				regulator-name = "appcpu_dvddm";
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1570000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_aon_reg: soc_dvdd18_aon {
+				regulator-name = "soc_dvdd18_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+				regulator-name = "soc_avdd33_usb3";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_aon_reg: soc_dvdd08_aon {
+				regulator-name = "soc_dvdd08_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+				regulator-name = "soc_dvdd08_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+				regulator-name = "soc_vdd_ddr_1v8";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+				regulator-name = "soc_vdd_ddr_1v1";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+				regulator-name = "soc_vdd_ddr_0v6";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_ap_reg: soc_dvdd18_ap {
+				regulator-name = "soc_dvdd18_ap";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+				regulator-name = "soc_avdd08_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+				regulator-name = "soc_avdd18_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd33_emmc_reg: soc_vdd33_emmc {
+				regulator-name = "soc_vdd33_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd18_emmc_reg: soc_vdd18_emmc {
+				regulator-name = "soc_vdd18_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dovdd18_scan_reg: soc_dovdd18_scan {
+				regulator-name = "soc_dovdd18_scan";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd12_scan_reg: soc_dvdd12_scan {
+				regulator-name = "soc_dvdd12_scan";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+
+			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+				regulator-name = "soc_avdd28_scan_en";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "okay";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+		};
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+	vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};
+};
+
+&adc {
+	vref-supply = <&reg_vref_1v8>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "disabled";
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	status = "disabled";
+};
+
+&audio_i2c0 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	es8156_audio_codec: es8156@9 {
+		#sound-dai-cells = <0>;
+		compatible = "everest,es8156";
+		reg = <0x09>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_audio_i2s1_mclk>;
+	};
+};
+
+&uart0 {
+	clock-frequency = <100000000>;
+};
+
+&gmac0 {
+	phy-mode = "rgmii-id";
+	rx-clk-delay = <0x00>; /* for RGMII */
+	tx-clk-delay = <0x00>; /* for RGMII */
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&gmac1 {
+	status = "disabled";
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	mmc-hs400-1_8v;
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "okay";
+};
+
+&sdhci1 {
+	status = "okay";
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	brcmf: wifi@1 {
+		compatible = "brcm,bcm4329-fmac";
+		reg = <1>;
+	};
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+		pinctrl_uart0: uart0grp {
+			thead,pins = <
+				FM_UART0_TXD	0x0	0x72
+				FM_UART0_RXD	0x0	0x72
+			>;
+		};
+
+		pinctrl_spi0: spi0grp {
+			thead,pins = <
+				FM_SPI_CSN	0x3	0x20a
+				FM_SPI_SCLK	0x0	0x20a
+				FM_SPI_MISO	0x0	0x23a
+				FM_SPI_MOSI	0x0	0x23a
+			>;
+		};
+
+		pinctrl_qspi0: qspi0grp {
+			thead,pins = <
+				FM_QSPI0_SCLK	0x0	0x20f
+				FM_QSPI0_CSN0	0x3	0x20f
+				FM_QSPI0_D0_MOSI	0x0	0x23f
+				FM_QSPI0_D1_MISO	0x0	0x23f
+			>;
+		};
+
+		pinctrl_pwm: pwmgrp {
+			thead,pins = <
+				FM_QSPI0_D2_WP  0x1     0x208   /* pwm5 */
+				FM_QSPI0_CSN1   0x1     0x208   /* pwm2 */
+			>;
+		};
+	};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+		pinctrl_uart3: uart3grp {
+			thead,pins = <
+				FM_UART3_TXD	0x0	0x72
+				FM_UART3_RXD	0x0	0x72
+			>;
+		};
+
+		pinctrl_uart4: uart4grp {
+			thead,pins = <
+				FM_UART4_TXD	0x0	0x72
+				FM_UART4_RXD	0x0	0x72
+				FM_UART4_CTSN	0x0	0x72
+				FM_UART4_RTSN	0x0	0x72
+			>;
+		};
+
+		pinctrl_qspi1: qspi1grp {
+			thead,pins = <
+				FM_QSPI1_SCLK	0x0	0x20a
+				FM_QSPI1_CSN0	0x3	0x20a
+				FM_QSPI1_D0_MOSI	0x0	0x23a
+				FM_QSPI1_D1_MISO	0x0	0x23a
+				FM_QSPI1_D2_WP	0x0	0x23a
+				FM_QSPI1_D3_HOLD	0x0	0x23a
+			>;
+		};
+
+		pinctrl_iso7816: iso7816grp {
+			thead,pins = <
+				FM_QSPI1_SCLK	0x1	0x208
+				FM_QSPI1_D0_MOSI	0x1	0x238
+				FM_QSPI1_D1_MISO	0x1	0x238
+				FM_QSPI1_D2_WP	0x1	0x238
+				FM_QSPI1_D3_HOLD	0x1	0x238
+			>;
+		};
+
+		pinctrl_wireless_power: wireless-power-group {
+			thead,pins = <
+				FM_GPIO0_20	0x0	0x23a
+			>;
+		};
+
+		pinctrl_wireless_host_wake: wireless-host-wake-group {
+			thead,pins = <
+				FM_GPIO0_21	0x0	0x21a
+			>;
+		};
+	};
+};
+
+&padctrl_aosys {
+	light-aon-padctrl {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+
+		pinctrl_audiopa1: audiopa1_grp {
+			thead,pins = <
+				FM_AUDIO_PA1	0x3	0x72
+			>;
+		};
+
+		pinctrl_audiopa2: audiopa2_grp {
+			thead,pins = <
+				FM_AUDIO_PA2	0x0	0x72
+			>;
+		};
+
+		pinctrl_volume: volume_grp {
+			thead,pins = <
+				FM_CPU_JTG_TDI	0x3	0x208
+				FM_CPU_JTG_TDO	0x3	0x208
+			>;
+		};
+	};
+};
+
+&padctrl_audiosys {
+	status = "okay";
+
+	light-audio-padctrl {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+
+		pinctrl_audio_i2s1_mclk: audio_i2s1_mclk_grp {
+			thead,pins = <
+				FM_AUDIO_IO_PA13	0x0	0x20a
+			>;
+		};
+	};
+};
+
+&xtensa_dsp {
+	status = "okay";
+};
+
+&xtensa_dsp0 {
+	status = "okay";
+	memory-region = <&dsp0_mem>;
+};
+
+&xtensa_dsp1{
+	status = "okay";
+	memory-region = <&dsp1_mem>;
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "okay";
+};
+
+&vdec {
+	status = "okay";
+};
+
+&venc {
+	status = "okay";
+};
+
+&isp_venc_shake {
+	status = "okay";
+};
+
+&vidmem {
+	status = "okay";
+	memory-region = <&vi_mem>;
+};
+
+&gpu {
+	status = "okay";
+};
+
+&npu {
+	vha_clk_rate = <1000000000>;
+	status = "okay";
+};
+
+&fce {
+	memory-region = <&facelib_mem>;
+	status = "okay";
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_2: cpu@2 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_3: cpu@3 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+};
+
+&dpu {
+	status = "okay";
+};
+
+/* DP1 --- HDMI0 */
+&dpu_enc1 {
+	status = "disabled";
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&light_i2s {
+	status = "okay";
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+};
+
+&i2s0 {
+	status = "okay";
+};
+
+&i2s1 {
+	status = "okay";
+};
+
+&qspi0 {
+	status = "okay";
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
+
+	spi_flash: spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-max-frequency = <50000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+		status = "okay";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			loader@0 {
+				label = "loader";
+				reg = <0x0 0x800000>;
+			};
+		};
+	};
+};
+
+&qspi1 {
+	status = "disabled";
+};

arch/riscv/boot/dts/thead/light-vi-devices.dtsi

@@ -4,7 +4,7 @@
  */
 
 &video0{
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -86,7 +86,7 @@
 };
 
 &video1{
-	status = "disabled";
+	status = "okay";
 	channel0 { // VSE0
 		channel_id = <0>;
 		status = "okay";
@@ -183,7 +183,7 @@
 };
 
 &video2 {
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -272,7 +272,7 @@
 };
 
 &video3 {
-	status = "disabled";
+	status = "okay";
 		channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -370,7 +370,7 @@
 };
 
 &video4 {
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -483,7 +483,7 @@
 };
 
 &video5 {
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -612,7 +612,7 @@
 
 
 &video6 {
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -669,7 +669,7 @@
 
 
 &video7{
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -798,7 +798,7 @@
 
 
 &video8{
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -829,7 +829,7 @@
 
 
 &video9 { //IR debug
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -862,7 +862,7 @@
 
 
 &video10{ // TUNING TOOL
-	status = "disabled";
+	status = "okay";
 	channel0 { // CSI2X2_B
 		status = "okay";
 		sensor0 {
@@ -889,7 +889,7 @@
 
 
 &video11{
-	status = "disabled";
+	status = "okay";
 	channel0 {
 		channel_id = <0>;
 		status = "okay";
@@ -920,7 +920,7 @@
 
 
 &video12{ // TUNING TOOL
-	status = "disabled";
+	status = "okay";
 	channel0 { // CSI2
 		status = "okay";
 		sensor0 {

arch/riscv/boot/dts/thead/light.dtsi

@@ -8,6 +8,7 @@
 #include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-audio-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-pinctrl-def.h>
+#include <dt-bindings/pinctrl/light.h>
 #include <dt-bindings/clock/light-fm-ap-clock.h>
 #include <dt-bindings/clock/light-vpsys.h>
 #include <dt-bindings/clock/light-vosys.h>
@@ -15,7 +16,6 @@
 #include <dt-bindings/clock/light-dspsys.h>
 #include <dt-bindings/clock/light-audiosys.h>
 #include <dt-bindings/firmware/thead/rsrc.h>
-#include <dt-bindings/clock/light-miscsys.h>
 #include <dt-bindings/soc/thead,light-iopmp.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/reset/light-reset.h>
@@ -186,7 +186,6 @@
 				interrupt-controller;
 			};
 		};
-
 		c910_1: cpu@1 {
 			device_type = "cpu";
 			reg = <1>;
@@ -325,44 +324,6 @@
 				interrupt-controller;
 			};
 		};
-
-		idle_states: idle-states {
-		    CPU_RET_0_0: cpu-retentive-0-0 {
-			compatible = "riscv,idle-state";
-			riscv,sbi-suspend-param = <0x10000000>;
-			entry-latency-us = <20>;
-			exit-latency-us = <40>;
-			min-residency-us = <80>;
-		    };
-
-		    CPU_NONRET_0_0: cpu-nonretentive-0-0 {
-			compatible = "riscv,idle-state";
-			riscv,sbi-suspend-param = <0x90000000>;
-			entry-latency-us = <250>;
-			exit-latency-us = <500>;
-			min-residency-us = <950>;
-		    };
-
-		    CLUSTER_RET_0: cluster-retentive-0 {
-			compatible = "riscv,idle-state";
-			riscv,sbi-suspend-param = <0x11000000>;
-			local-timer-stop;
-			entry-latency-us = <50>;
-			exit-latency-us = <100>;
-			min-residency-us = <250>;
-			wakeup-latency-us = <130>;
-		    };
-
-		    CLUSTER_NONRET_0: cluster-nonretentive-0 {
-			compatible = "riscv,idle-state";
-			riscv,sbi-suspend-param = <0x91000000>;
-			local-timer-stop;
-			entry-latency-us = <600>;
-			exit-latency-us = <1100>;
-			min-residency-us = <2700>;
-			wakeup-latency-us = <1500>;
-		    };
-		};
 	};
 
 	display-subsystem {
@@ -419,7 +380,7 @@
 		};
 	};
 
-	soc {
+	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -671,18 +632,6 @@
 			status = "okay";
 		};
 
-		miscsys_reg: miscsys-reg@ffec02c000 {
-			compatible = "thead,light-miscsys-reg", "syscon";
-			reg = <0xff 0xec02c000 0x0 0x1000>;
-			status = "okay";
-		};
- 
-		tee_miscsys_reg: tee_miscsys-reg@fffc02d000 {
-			compatible = "thead,light-miscsys-reg", "syscon";
-			reg = <0xff 0xfc02d000 0x0 0x1000>;
-			status = "okay";
-		};
- 
 		audio_ioctrl: audio_ioctrl@ffcb01d000 {
 			compatible = "thead,light-audio-ioctrl-reg", "syscon";
 			reg = <0xff 0xcb01d000 0x0 0x1000>;
@@ -707,8 +656,6 @@
 			thead,teesys = <&teesys_syscon>;
 			#address-cells = <1>;
 			#size-cells = <1>;
-			clocks = <&miscsys_clk_gate CLKGEN_MISCSYS_EFUSE_PCLK>;
-			clock-names = "pclk";
 
 			gmac0_mac_address: mac-address@176 {
 				reg = <0xb0 6>;
@@ -736,9 +683,7 @@
 			reg = <0xff 0xec005000 0x0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-            clocks = <&clk CLKGEN_GPIO0_PCLK>,
-            <&clk CLKGEN_GPIO0_DBCLK>;
-			clock-names = "bus", "db";
+
 			gpio0_porta: gpio0-controller@0 {
 				compatible = "snps,dw-apb-gpio-port";
 				gpio-controller;
@@ -758,9 +703,7 @@
 			reg = <0xff 0xec006000 0x0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			clocks = <&clk CLKGEN_GPIO1_PCLK>,
-			         <&clk CLKGEN_GPIO1_DBCLK>;
-			clock-names = "bus", "db";
+
 			gpio1_porta: gpio1-controller@0 {
 				compatible = "snps,dw-apb-gpio-port";
 				gpio-controller;
@@ -780,9 +723,7 @@
 			reg = <0xff 0xe7f34000 0x0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			clocks = <&clk CLKGEN_GPIO2_PCLK>,
-			         <&clk CLKGEN_GPIO2_DBCLK>;
-			clock-names = "bus", "db";
+
 			gpio2_porta: gpio2-controller@0 {
 				compatible = "snps,dw-apb-gpio-port";
 				gpio-controller;
@@ -802,9 +743,7 @@
 			reg = <0xff 0xe7f38000 0x0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			clocks = <&clk CLKGEN_GPIO3_PCLK>,
-			         <&clk CLKGEN_GPIO3_DBCLK>;
-			clock-names = "bus", "db";
+
 			gpio3_porta: gpio3-controller@0 {
 				compatible = "snps,dw-apb-gpio-port";
 				gpio-controller;
@@ -859,19 +798,15 @@
 			};
 		};
 
-		padctrl1_apsys: padctrl1-apsys@ffe7f3c000 {
+		padctrl1_apsys: pinctrl1-apsys@ffe7f3c000 {
 			compatible = "thead,light-fm-left-pinctrl";
 			reg = <0xff 0xe7f3c000 0x0 0x1000>;
-			clocks = <&clk CLKGEN_PADCTRL1_APSYS_PCLK>;
-			clock-names = "pclk";
 			status = "okay";
 		};
 
 		padctrl0_apsys: padctrl0-apsys@ffec007000 {
 			compatible = "thead,light-fm-right-pinctrl";
 			reg = <0xff 0xec007000 0x0 0x1000>;
-			clocks = <&clk CLKGEN_PADCTRL0_APSYS_PCLK>;
-			clock-names = "pclk";
 			status = "okay";
 		};
 
@@ -987,7 +922,7 @@
 		};
 
 		uart0: serial@ffe7014000 { /* Normal serial, for C910 log */
-                        compatible = "snps,dw-apb-uart", "light,uart0";
+			compatible = "snps,dw-apb-uart";
 			reg = <0xff 0xe7014000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <36>;
@@ -1082,9 +1017,7 @@
 			pinctrl-0 = <&pinctrl_spi0>;
 			interrupt-parent = <&intc>;
 			interrupts = <54>;
-            clocks = <&clk CLKGEN_SPI_SSI_CLK>,
-                     <&clk CLKGEN_SPI_PCLK>;
-            clock-names = "sclk", "pclk";
+			clocks = <&dummy_clock_spi>;
 			num-cs = <2>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -1097,9 +1030,7 @@
 			pinctrl-0 = <&pinctrl_qspi0>;
 			interrupt-parent = <&intc>;
 			interrupts = <52>;
-            clocks = <&clk CLKGEN_QSPI0_SSI_CLK>,
-                     <&clk CLKGEN_QSPI0_PCLK>;
-            clock-names = "sclk", "pclk";
+			clocks = <&dummy_clock_qspi>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 		};
@@ -1111,14 +1042,12 @@
 			pinctrl-0 = <&pinctrl_qspi1>;
 			interrupt-parent = <&intc>;
 			interrupts = <53>;
-            clocks = <&clk CLKGEN_QSPI1_SSI_CLK>,
-                     <&clk CLKGEN_QSPI1_PCLK>;
-            clock-names = "sclk", "pclk";
+			clocks = <&dummy_clock_spi>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 		};
 
-		g2d: gc620@ffecc80000 {
+/*		g2d: gc620@ffecc80000 {
 			compatible = "thead,c910-gc620";
 			reg = <0xff 0xecc80000 0x0 0x40000>;
 			interrupt-parent = <&intc>;
@@ -1129,6 +1058,19 @@
 				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
 			clock-names = "pclk", "aclk", "cclk";
 			status = "okay";
+		};*/
+
+		g2d: gpu@13040000 {
+			compatible = "vivante,gc";
+			reg = <0xff 0xecc80000 0x0 0x40000>;
+
+			clocks = <&vpsys_clk_gate LIGHT_VPSYS_G2D_PCLK>,
+				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_ACLK>,
+				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
+			clock-names = "bus", "core", "shader";
+
+			interrupt-parent = <&intc>;
+			interrupts = <101>;
 		};
 
 		dsi0: dw-mipi-dsi0@ffef500000 {
@@ -1211,8 +1153,9 @@
 			clocks = <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PCLK>,
 				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_SFR_CLK>,
 				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_CEC_CLK>,
-				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PIXCLK>;
-			clock-names = "iahb", "isfr", "cec", "pixclk";
+				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_PIXCLK>,
+				 <&vosys_clk_gate LIGHT_CLKGEN_HDMI_I2S_CLK>;
+			clock-names = "iahb", "isfr", "cec", "pixclk", "i2s";
 			reg-io-width = <4>;
 			phy_version = <301>;
 			/* TODO: add phy property */
@@ -1228,7 +1171,6 @@
 			      <0xff 0xef630010 0x0 0x60>;
 			interrupt-parent = <&intc>;
 			interrupts = <93>;
-			vosys-regmap = <&vosys_reg>;
 			clocks = <&vosys_clk_gate LIGHT_CLKGEN_DPU_CCLK>,
 				 <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK0>,
 				 <&vosys_clk_gate LIGHT_CLKGEN_DPU_PIXCLK1>,
@@ -1290,7 +1232,6 @@
 			interrupts = <74>;
 			clocks = <&dummy_clock_rtc>;
 			clock-names = "rtc";
-			wakeup-source;
 			status = "okay";
 		};
 
@@ -1298,11 +1239,6 @@
 			compatible = "thead,dwc3";
 			usb3-misc-regmap = <&misc_sysreg>;
 			usb3-drd-regmap = <&usb3_drd>;
-			clocks = <&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_CLK>,
-					<&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_CTRL_REF_CLK>,
-					<&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_PHY_REF_CLK>,
-					<&miscsys_clk_gate CLKGEN_MISCSYS_USB3_DRD_SUSPEND_CLK>;
-			clock-names = "drd", "ctrl", "phy", "suspend";
 			#address-cells = <2>;
 			#size-cells = <2>;
 			ranges;
@@ -1312,6 +1248,8 @@
 				reg = <0xff 0xe7040000 0x0 0x10000>;
 				interrupt-parent = <&intc>;
 				interrupts = <68>;
+				clocks = <&dummy_clock_ref>, <&dummy_clock_apb>, <&dummy_clock_suspend>;
+				clock-names = "ref", "bus_early", "suspend";
 				reg-shift = <2>;
 				reg-io-width = <4>;
 				maximum-speed = "super-speed";
@@ -1363,7 +1301,7 @@
 			reg = <0xff 0xefc00000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <27>;
-			clocks = <&clk CLKGEN_DMAC_CPUSYS_ACLK>, <&clk CLKGEN_DMAC_CPUSYS_HCLK>;
+			clocks = <&dummy_clock_apb>, <&dummy_clock_apb>;
 			clock-names = "core-clk", "cfgr-clk";
 			#dma-cells = <1>;
 			dma-channels = <4>;
@@ -1380,7 +1318,7 @@
 			reg = <0xff 0xff340000 0x0 0x1000>;
 			interrupt-parent = <&intc>;
 			interrupts = <150>;
-			clocks = <&clk CLKGEN_DMAC_CPUSYS_ACLK>, <&clk CLKGEN_DMAC_CPUSYS_HCLK>;
+			clocks = <&dummy_clock_apb>, <&dummy_clock_apb>;
 			clock-names = "core-clk", "cfgr-clk";
 			#dma-cells = <1>;
 			dma-channels = <4>;
@@ -1397,7 +1335,7 @@
                         reg = <0xff 0xc8000000 0x0 0x2000>;
                         interrupt-parent = <&intc>;
                         interrupts = <167>;
-						clocks = <&clk CLKGEN_DMAC_CPUSYS_ACLK>, <&clk CLKGEN_DMAC_CPUSYS_HCLK>;
+                        clocks = <&dummy_clock_apb>, <&dummy_clock_apb>;
                         clock-names = "core-clk", "cfgr-clk";
                         #dma-cells = <1>;
                         dma-channels = <16>;
@@ -1428,11 +1366,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <66>;
 			interrupt-names = "macirq";
-			clocks = <&clk CLKGEN_GMAC0_CCLK>,
-					 <&clk CLKGEN_GMAC0_PCLK>,
-					 <&clk CLKGEN_GMAC_AXI_ACLK>,
-					 <&clk CLKGEN_GMAC_AXI_PCLK>;
-			clock-names = "gmac_pll_clk","pclk","axi_aclk","axi_pclk";
+			clocks = <&clk CLKGEN_GMAC0_CCLK>;
+			clock-names = "gmac_pll_clk";
 			snps,pbl = <32>;
 			snps,fixed-burst;
 			snps,axi-config = <&stmmac_axi_setup>;
@@ -1450,11 +1385,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <67>;
 			interrupt-names = "macirq";
-			clocks = <&clk CLKGEN_GMAC1_CCLK>,
-					 <&clk CLKGEN_GMAC1_PCLK>,
-					 <&clk CLKGEN_GMAC_AXI_ACLK>,
-					 <&clk CLKGEN_GMAC_AXI_PCLK>;
-			clock-names = "gmac_pll_clk","pclk","axi_aclk","axi_pclk";
+			clocks = <&clk CLKGEN_GMAC1_CCLK>;
+			clock-names = "gmac_pll_clk";
 			snps,pbl = <32>;
 			snps,fixed-burst;
 			snps,axi-config = <&stmmac_axi_setup>;
@@ -1468,9 +1400,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <62>;
 			interrupt-names = "sdhciirq";
-			clocks = <&clk CLKGEN_EMMC_SDIO_REF_CLK>,
-					 <&miscsys_clk_gate CLKGEN_MISCSYS_EMMC_CLK>;
-			clock-names = "core", "bus";
+			clocks = <&dummy_clock_sdhci>;
+			clock-names = "core";
 		};
 
 		sdhci0: sd@ffe7090000 {
@@ -1479,20 +1410,18 @@
 			interrupt-parent = <&intc>;
 			interrupts = <64>;
 			interrupt-names = "sdhci0irq";
-			clocks = <&clk CLKGEN_EMMC_SDIO_REF_CLK>,
-					 <&miscsys_clk_gate CLKGEN_MISCSYS_EMMC_CLK>;
-			clock-names = "core", "bus";
+			clocks = <&dummy_clock_sdhci>;
+			clock-names = "core";
 		};
 
 		sdhci1: sd@ffe70a0000 {
-			compatible = "snps,dwcmshc-sdhci";
-			reg = <0xff 0xe70a0000 0x0 0x10000>;
-			interrupt-parent = <&intc>;
-			interrupts = <71>;
-			interrupt-names = "sdhci1irq";
-			clocks = <&clk CLKGEN_EMMC_SDIO_REF_CLK>,
-					 <&miscsys_clk_gate CLKGEN_MISCSYS_EMMC_CLK>;
-			clock-names = "core", "bus";
+		        compatible = "snps,dwcmshc-sdhci";
+		        reg = <0xff 0xe70a0000 0x0 0x10000>;
+		        interrupt-parent = <&intc>;
+		        interrupts = <71>;
+		        interrupt-names = "sdhci1irq";
+		        clocks = <&dummy_clock_sdhci>;
+		        clock-names = "core";
 		};
 
 		hwspinlock: hwspinlock@ffefc10000 {
@@ -1592,6 +1521,8 @@
 			#sound-dai-cells = <1>;
 			compatible = "light,light-i2s";
 			reg = <0xff 0xe7034000 0x0 0x4000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_light_i2s0>;
 			light,mode = "i2s-master";
 			light,sel = "ap_i2s";
 			interrupt-parent = <&intc>;
@@ -1600,7 +1531,7 @@
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&vosys_clk_gate LIGHT_CLKGEN_HDMI_I2S_CLK>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1620,7 +1551,7 @@
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_I2S0>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1636,11 +1567,11 @@
 			light,sel = "i2s1";
 			interrupt-parent = <&intc>;
 			interrupts = <175>;
-			dmas = <&dmac2 11>, <&dmac2 10>;
+			dmas = <&dmac2 11>, <&dmac2 17>;
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_I2S1>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1660,7 +1591,7 @@
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_I2S2>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1679,7 +1610,7 @@
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_I2S8CH>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1698,7 +1629,7 @@
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_I2S8CH>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1717,7 +1648,7 @@
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_I2S8CH>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1736,7 +1667,7 @@
 			dma-names = "tx", "rx";
 			light,dma_maxburst = <4>;
 			#dma-cells = <1>;
-			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_I2S8CH>;
+			clocks = <&dummy_clock_apb>;
 			clock-names = "pclk";
 			status = "disabled";
 		};
@@ -1924,7 +1855,6 @@
 			#dma-cells = <1>;
 			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_SPDIF0>;
 			clock-names = "pclk";
-			id = <0>;
 			status = "disabled";
 		};
 
@@ -1943,7 +1873,6 @@
 			#dma-cells = <1>;
 			clocks = <&audiosys_clk_gate LIGHT_CLKGEN_AUDIO_SPDIF1>;
 			clock-names = "pclk";
-			id = <1>;
 			status = "disabled";
 		};
 
@@ -1964,8 +1893,7 @@
 			reg = <0xff 0xe7f20000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <44>;
-			clocks = <&clk CLKGEN_I2C0_PCLK>;
-			clock-names = "pclk";
+			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
             i2c_mode = "dma";
 			dmas = <&dmac0 12>, <&dmac0 13>;
@@ -1988,8 +1916,7 @@
 			reg = <0xff 0xe7f24000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <45>;
-			clocks = <&clk CLKGEN_I2C1_PCLK>;
-			clock-names = "pclk";
+			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
             i2c_mode = "dma";
 			dmas = <&dmac0 14>, <&dmac0 15>;
@@ -2012,8 +1939,7 @@
 			reg = <0xff 0xec00c000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <46>;
-			clocks = <&clk CLKGEN_I2C2_PCLK>;
-			clock-names = "pclk";
+			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
             i2c_mode = "dma";
 			dmas = <&dmac0 16>, <&dmac0 17>;
@@ -2038,8 +1964,7 @@
 			reg = <0xff 0xec014000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <47>;
-			clocks = <&clk CLKGEN_I2C3_PCLK>;
-			clock-names = "pclk";
+			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
             i2c_mode = "dma";
 			dmas = <&dmac0 18>, <&dmac0 19>;
@@ -2064,8 +1989,7 @@
 			reg = <0xff 0xe7f28000 0x0 0x4000>;
 			interrupt-parent = <&intc>;
 			interrupts = <48>;
-			clocks = <&clk CLKGEN_I2C4_PCLK>;
-			clock-names = "pclk";
+			clocks = <&dummy_clock_apb>;
 			clock-frequency = <100000>;
             i2c_mode = "dma";
 			dmas = <&dmac0 20>, <&dmac0 21>;
@@ -2556,11 +2480,7 @@
 			reg = <0xff 0xff300000 0x0 0x40000>;
 			interrupt-parent = <&intc>;
 			interrupts = <144>,<145>,<146>,<147>;
-			clocks = <&miscsys_clk_gate CLKGEN_MISCSYS_EIP120SI_CLK>,
-					<&miscsys_clk_gate CLKGEN_MISCSYS_EIP120SII_CLK>,
-					<&miscsys_clk_gate CLKGEN_MISCSYS_EIP120SIII_CLK>,
-					<&miscsys_clk_gate CLKGEN_MISCSYS_EIP150B_HCLK>;
-			clock-names = "120si_clk","120sii_clk","120siii_clk","hclk";
+			clocks = <&dummy_clock_eip>;
 			status = "disabled";
 		};
 
@@ -2576,11 +2496,6 @@
                 status = "okay";
         };
 
-		aon_suspend_ctrl: aon_suspend_ctrl {
-		        compatible = "thead,light-aon-suspend-ctrl";
-		        status = "okay";
-		};
-
 		visys_clk_gate: visys-clk-gate { /* VI_SYSREG_R */
 			compatible = "thead,visys-gate-controller";
 			visys-regmap = <&visys_reg>;
@@ -2615,15 +2530,6 @@
 			#clock-cells = <1>;
 			status = "okay";
 		};
-
-		miscsys_clk_gate: miscsys-clk-gate {
-			compatible = "thead,miscsys-gate-controller";
-			miscsys-regmap = <&miscsys_reg>;
-			tee-miscsys-regmap = <&tee_miscsys_reg>;
-			#clock-cells = <1>;
-			status = "okay";
-		};
-
 	};
 
 };

arch/riscv/boot/dts/thead/overlays/BBORG_LOAD-00A2.dts

@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+	overlays {
+		BBORG_LOAD-00A2 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver 
+ */
+
+&bone_led_P9_42 {
+    status = "okay";
+    label = "load-sink1";
+    default-state = "keep";
+};
+
+&bone_led_P9_41 {
+    status = "okay";
+    label = "load-sink2";
+    default-state = "keep";
+};
+
+&bone_led_P9_30 {
+    status = "okay";
+    label = "load-sink3";
+    default-state = "keep";
+};
+
+&bone_led_P9_27 {
+    status = "okay";
+    label = "load-sink4";
+    default-state = "keep";
+};
+
+&bone_led_P8_12 {
+    status = "okay";
+    label = "load-sink5";
+    default-state = "keep";
+};
+
+&bone_led_P8_11 {
+    status = "okay";
+    label = "load-sink6";
+    default-state = "keep";
+};
+
+&bone_led_P8_15 {
+    status = "okay";
+    label = "load-sink7";
+    default-state = "keep";
+};
+
+&bone_led_P8_17 {
+    status = "okay";
+    label = "load-sink8";
+    default-state = "keep";
+};

arch/riscv/boot/dts/thead/overlays/BBORG_RELAY-00A2.dts

@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
+ * Copyright (C) 2019 Amilcar Lucas <amilcar.lucas@iav.de>
+ * Copyright (C) 2020 - 2023 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+	overlays {
+		BBORG_RELAY-00A2.kernel = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+// relay1
+&bone_led_P9_41 {
+	status = "okay";
+	// access: sys/class/leds/relay1
+	label = "relay1";
+	default-state = "keep";
+};
+
+// relay2
+&bone_led_P9_42 {
+	status = "okay";
+	// access: sys/class/leds/relay2
+	label = "relay2";
+	default-state = "keep";
+};
+
+// realy3
+&bone_led_P9_30 {
+	status = "okay";
+	// access: sys/class/leds/relay3
+	label = "relay3";
+	default-state = "keep";
+};
+
+// realy4
+&bone_led_P9_27 {
+	status = "okay";
+	// access: sys/class/leds/relay4
+	label = "relay4";
+	default-state = "keep";
+};

arch/riscv/boot/dts/thead/overlays/BONE-LED_P8_03.dts

@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ * Virtual cape for LED on P8_03 
+ * Supports BBB, BBBWL, BBAI, and BBAI-64
+ *
+ */
+ 
+/dts-v1/;
+/plugin/;
+ 
+&{/chosen} {
+	overlays {
+		BONE-LED_P8_03 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+&bone_led_P8_03 {
+    status = "okay";
+    // access: sys/class/leds/led_P8_03
+    label = "led_P8_03";
+    linux,default-trigger = "heartbeat";
+    default-state = "on";
+};

arch/riscv/boot/dts/thead/overlays/BONE-LED_P9_11.dts

@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ * Virtual cape for LED on P9_11 
+ * Supports BBB, BBBWL, BBAI, and BBAI-64
+ *
+ */
+ 
+/dts-v1/;
+/plugin/;
+ 
+&{/chosen} {
+	overlays {
+		BONE-LED_P9_11 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+&bone_led_P9_11 {
+    status = "okay";
+    // access: sys/class/leds/led_P9_11
+    label = "led_P9_11";
+    linux,default-trigger = "heartbeat";
+    default-state = "on";
+};

arch/riscv/boot/dts/thead/overlays/BVA-MIKROBUS-0.dts

@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2023 BeagleBoard.org - https://beagleboard.org/
+ * Copyright (C) 2023 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+ /*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+ 
+&{/chosen} {
+	overlays {
+		BBORG_LOAD-00A2 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Enable mikroBus port
+ */
+
+&bone_mikrobus0 {
+    status = "okay";
+};

arch/riscv/boot/dts/thead/overlays/Makefile

@@ -0,0 +1,14 @@
+# Overlays for the CONFIG_SOC_THEAD platform
+
+dtbo-$(CONFIG_SOC_THEAD) += \
+	BBORG_LOAD-00A2.dtbo	\
+	BBORG_RELAY-00A2.dtbo	\
+	BONE-LED_P8_03.dtbo	\
+	BONE-LED_P9_11.dtbo	\
+	BVA-MIKROBUS-0.dtbo
+
+targets += dtbs dtbs_install
+targets += $(dtbo-y)
+
+always-y	:= $(dtbo-y)
+clean-files	:= *.dtbo

arch/riscv/configs/defconfig

@@ -17,12 +17,6 @@ CONFIG_PERF_EVENTS=y
 CONFIG_SOC_THEAD=y
 CONFIG_SMP=y
 CONFIG_VECTOR=y
-CONFIG_HOTPLUG_CPU=y
-CONFIG_PM=y
-CONFIG_CPU_IDLE=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_KVM=m
-CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_PARTITION_ADVANCED=y

arch/riscv/configs/light_defconfig

@@ -3,10 +3,6 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
@@ -110,7 +106,6 @@ CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_GOODIX=y
-CONFIG_TOUCHSCREEN_GT9XX=y
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_UINPUT=y
 CONFIG_SERIAL_8250=y
@@ -205,8 +200,6 @@ CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
 CONFIG_DRM_PANEL_ILI9881D=y
 CONFIG_DRM_PANEL_HX8394=y
-CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y
-CONFIG_DRM_PANEL_HX8279=y
 CONFIG_DRM_VERISILICON=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_PWM=y
@@ -341,15 +334,6 @@ CONFIG_OVERLAY_FS=y
 CONFIG_LOCKUP_DETECTOR=y
 CONFIG_SOFTLOCKUP_DETECTOR=y
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
-CONFIG_SCHED_INFO=y
 CONFIG_PM=y
 # CONFIG_SUSPEND is not set
 # CONFIG_PM_SLEEP is not set
-CONFIG_PM_DEVFREQ=y
-CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
-CONFIG_DEVFREQ_GOV_PERFORMANCE=y
-CONFIG_DEVFREQ_GOV_POWERSAVE=y
-CONFIG_DEVFREQ_GOV_USERSPACE=y
-CONFIG_DEVFREQ_GOV_PASSIVE=y
-CONFIG_PM_DEVFREQ_EVENT=y
-

arch/riscv/configs/revyos_defconfig

@@ -0,0 +1,473 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_MEMCG=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_BPF=y
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_CHECKPOINT_RESTORE=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+# CONFIG_BUG is not set
+CONFIG_BPF_SYSCALL=y
+CONFIG_PERF_EVENTS=y
+CONFIG_FORCE_MAX_ZONEORDER=15
+CONFIG_SOC_SIFIVE=y
+CONFIG_SOC_THEAD=y
+CONFIG_SMP=y
+CONFIG_VECTOR=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
+# CONFIG_SUSPEND is not set
+CONFIG_PM=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_LIGHT_AON_PD=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_BLK_DEV_THROTTLING=y
+CONFIG_BINFMT_MISC=m
+CONFIG_CMA=y
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_AREAS=16
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPVTI=y
+CONFIG_INET_ESP=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BBR=m
+CONFIG_NETFILTER=y
+CONFIG_BRIDGE_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_NAT=y
+CONFIG_NETFILTER_XT_CONNMARK=y
+CONFIG_NETFILTER_XT_NAT=y
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=y
+CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_IPVS=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_IP_VS=y
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_RR=y
+CONFIG_IP_VS_NFCT=y
+CONFIG_NF_LOG_ARP=m
+CONFIG_NF_LOG_IPV4=m
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_NF_LOG_IPV6=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_NAT=m
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_VLAN_8021Q=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_CLS_CGROUP=y
+CONFIG_VSOCKETS=y
+# CONFIG_VSOCKETS_LOOPBACK is not set
+CONFIG_VIRTIO_VSOCKETS=y
+CONFIG_NETLINK_DIAG=y
+CONFIG_CGROUP_NET_PRIO=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_RTL3WIRE=y
+CONFIG_CFG80211=y
+CONFIG_RFKILL=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_PCI=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_UBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_LIGHT_DSMART_CARD=y
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_THIN_PROVISIONING=y
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+CONFIG_MACVLAN=y
+CONFIG_IPVLAN=y
+CONFIG_VXLAN=y
+CONFIG_TUN=y
+CONFIG_VETH=y
+CONFIG_VIRTIO_NET=y
+CONFIG_MACB=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_RX_ZERO_COPY=y
+CONFIG_DWMAC_LIGHT=y
+CONFIG_MICROSEMI_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_USB_USBNET=m
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_AX88179_178A is not set
+# CONFIG_USB_NET_NET1080 is not set
+CONFIG_RTL8723DS=y
+CONFIG_AIC_WLAN_SUPPORT=y
+CONFIG_AIC_FW_PATH="/lib/firmware/aic8800"
+CONFIG_AIC8800_WLAN_SUPPORT=m
+CONFIG_AIC8800_BTLPM_SUPPORT=m
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_GOODIX=y
+CONFIG_TOUCHSCREEN_GT9XX=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=6
+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_SPI=y
+CONFIG_SPI_DW_QUAD=y
+CONFIG_SPI_DESIGNWARE=y
+CONFIG_SPI_DW_MMIO=y
+CONFIG_SPI_SPIDEV=y
+# CONFIG_PTP_1588_CLOCK is not set
+CONFIG_PINCTRL=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_SENSORS_MR75203=y
+CONFIG_SENSORS_PWM_FAN=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_OPEN_TIMEOUT=32
+CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
+CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_LIGHT_PMIC_WATCHDOG=y
+CONFIG_ABX500_CORE=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_MEDIA_SUPPORT=y
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_ASPEED=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+CONFIG_DRM=y
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
+CONFIG_DRM_PANEL_ILI9881D=y
+CONFIG_DRM_PANEL_HX8394=y
+CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y
+CONFIG_DRM_VERISILICON=y
+CONFIG_DRM_POWERVR_ROGUE=m
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_THEAD_LIGHT=y
+CONFIG_SND_SOC_AW87519=y
+CONFIG_SND_SOC_BT_SCO=y
+CONFIG_SND_SOC_ES7210=y
+CONFIG_SND_SOC_ES8156=y
+CONFIG_SND_SOC_WM8960=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+CONFIG_UHID=y
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_DWC3=m
+CONFIG_USB_DWC3_HOST=y
+# CONFIG_USB_DWC3_OF_SIMPLE is not set
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_SIMPLE=m
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_F81232=m
+CONFIG_USB_SERIAL_F8153X=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_IUU=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_METRO=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+CONFIG_USB_SERIAL_MXUPORT=m
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_OTI6858=m
+CONFIG_USB_SERIAL_QCAUX=m
+CONFIG_USB_SERIAL_QUALCOMM=m
+CONFIG_USB_SERIAL_SPCP8X5=m
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_SYMBOL=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_OPTICON=m
+CONFIG_USB_SERIAL_XSENS_MT=m
+CONFIG_USB_SERIAL_WISHBONE=m
+CONFIG_USB_SERIAL_SSU100=m
+CONFIG_USB_SERIAL_QT2=m
+CONFIG_USB_SERIAL_UPD78F0730=m
+CONFIG_USB_SERIAL_DEBUG=m
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_G_NCM=m
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_ROLE_SWITCH=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_DWCMSHC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_XGENE=y
+CONFIG_DMADEVICES=y
+CONFIG_DW_AXI_DMAC=y
+CONFIG_DMATEST=y
+CONFIG_SW_SYNC=y
+CONFIG_UDMABUF=y
+CONFIG_DMABUF_SELFTESTS=m
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_KHV_MMIO=y
+CONFIG_VHOST_NET=y
+CONFIG_VHOST_VSOCK=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_CLK_LIGHT_FM=y
+CONFIG_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_LIGHT=y
+CONFIG_HWSPINLOCK_LIGHT_TEST=m
+CONFIG_MAILBOX=y
+CONFIG_RPMSG=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_THEAD_LIGHT=y
+CONFIG_RPMSG_VIRTIO=y
+CONFIG_EXTCON=y
+CONFIG_IIO=y
+CONFIG_IIO_SW_DEVICE=y
+CONFIG_PWM=y
+CONFIG_PWM_LIGHT=y
+CONFIG_NVMEM_THEAD_LIGHT_EFUSE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_OPTEE_BENCHMARK=y
+# CONFIG_LIGHT_GPU_VIV is not set
+CONFIG_DRM_ETNAVIV=m
+# CONFIG_LIGHT_NET is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_BTRFS_FS=y
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_OVERLAY_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_EXFAT_FS=m
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_HUGETLBFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V4=y
+CONFIG_9P_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_APPARMOR=y
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_DH=y
+CONFIG_CRYPTO_CURVE25519=y
+CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_OFB=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_SHA3=y
+CONFIG_CRYPTO_SM3=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_SM4=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_USER_API_RNG=y
+CONFIG_CRYPTO_USER_API_AEAD=y
+CONFIG_DMA_CMA=y
+CONFIG_DMA_PERNUMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=32
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+# CONFIG_RCU_TRACE is not set

arch/riscv/configs/rv32_defconfig

@@ -18,11 +18,6 @@ CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV32I=y
 CONFIG_SMP=y
-CONFIG_HOTPLUG_CPU=y
-CONFIG_PM=y
-CONFIG_CPU_IDLE=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_KVM=m
 CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y

arch/riscv/include/asm/asm.h

@@ -66,31 +66,4 @@
 #error "Unexpected __SIZEOF_SHORT__"
 #endif
 
-#ifdef __ASSEMBLY__
-
-/* Common assembly source macros */
-
-#ifdef CONFIG_XIP_KERNEL
-.macro XIP_FIXUP_OFFSET reg
-	REG_L t0, _xip_fixup
-	add \reg, \reg, t0
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
-	la t1, __data_loc
-	li t0, XIP_OFFSET_MASK
-	and t1, t1, t0
-	li t1, XIP_OFFSET
-	sub t0, t0, t1
-	sub \reg, \reg, t0
-.endm
-_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
-#else
-.macro XIP_FIXUP_OFFSET reg
-.endm
-.macro XIP_FIXUP_FLASH_OFFSET reg
-.endm
-#endif /* CONFIG_XIP_KERNEL */
-
-#endif /* __ASSEMBLY__ */
-
 #endif /* _ASM_RISCV_ASM_H */

arch/riscv/include/asm/cmpxchg.h

@@ -396,4 +396,22 @@ static inline ulong __xchg16_relaxed(ulong new, void *ptr)
 	cmpxchg_relaxed((ptr), (o), (n));				\
 })
 
+#define cmpxchg64_relaxed(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_relaxed((ptr), (o), (n));				\
+})
+
+#define cmpxchg64_acquire(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_acquire((ptr), (o), (n));				\
+})
+
+#define cmpxchg64_release(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_release((ptr), (o), (n));				\
+})
+
 #endif /* _ASM_RISCV_CMPXCHG_H */

arch/riscv/include/asm/cpu_ops_sbi.h

@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2021 by Rivos Inc.
- */
-#ifndef __ASM_CPU_OPS_SBI_H
-#define __ASM_CPU_OPS_SBI_H
-
-#ifndef __ASSEMBLY__
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/threads.h>
-
-/**
- * struct sbi_hart_boot_data - Hart specific boot used during booting and
- *			       cpu hotplug.
- * @task_ptr: A pointer to the hart specific tp
- * @stack_ptr: A pointer to the hart specific sp
- */
-struct sbi_hart_boot_data {
-	void *task_ptr;
-	void *stack_ptr;
-};
-#endif
-
-#endif /* ifndef __ASM_CPU_OPS_SBI_H */

arch/riscv/include/asm/csr.h

@@ -26,19 +26,11 @@
 
 #define SR_VS_OFF	_AC(0x00000000, UL)
 
-#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
-#define SR_VS		_AC(0x00000600, UL) /* Vector Status */
-#define SR_VS_INITIAL	_AC(0x00000200, UL)
-#define SR_VS_CLEAN	_AC(0x00000400, UL)
-#define SR_VS_DIRTY	_AC(0x00000600, UL)
-#else
 #define SR_VS		_AC(0x01800000, UL) /* Vector Status */
 #define SR_VS_INITIAL	_AC(0x00800000, UL)
 #define SR_VS_CLEAN	_AC(0x01000000, UL)
 #define SR_VS_DIRTY	_AC(0x01800000, UL)
 
-#endif
-
 #define SR_XS		_AC(0x00018000, UL) /* Extension Status */
 #define SR_XS_OFF	_AC(0x00000000, UL)
 #define SR_XS_INITIAL	_AC(0x00008000, UL)

arch/riscv/include/asm/pgtable.h

@@ -446,7 +446,7 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
 
 	return __pgprot(prot);
 }
-#define pgprot_dmacoherent   pgprot_writecombine
+
 /*
  * Encode and decode a swap entry
  *

arch/riscv/include/asm/sbi.h

@@ -61,45 +61,13 @@ enum sbi_ext_hsm_fid {
 	SBI_EXT_HSM_HART_START = 0,
 	SBI_EXT_HSM_HART_STOP,
 	SBI_EXT_HSM_HART_STATUS,
-	SBI_EXT_HSM_HART_SUSPEND,
 };
 
-enum sbi_hsm_hart_state {
-	SBI_HSM_STATE_STARTED = 0,
-	SBI_HSM_STATE_STOPPED,
-	SBI_HSM_STATE_START_PENDING,
-	SBI_HSM_STATE_STOP_PENDING,
-	SBI_HSM_STATE_SUSPENDED,
-	SBI_HSM_STATE_SUSPEND_PENDING,
-	SBI_HSM_STATE_RESUME_PENDING,
-};
-
-#define SBI_HSM_SUSP_BASE_MASK			0x7fffffff
-#define SBI_HSM_SUSP_NON_RET_BIT		0x80000000
-#define SBI_HSM_SUSP_PLAT_BASE			0x10000000
-
-#define SBI_HSM_SUSPEND_RET_DEFAULT		0x00000000
-#define SBI_HSM_SUSPEND_RET_PLATFORM		SBI_HSM_SUSP_PLAT_BASE
-#define SBI_HSM_SUSPEND_RET_LAST		SBI_HSM_SUSP_BASE_MASK
-#define SBI_HSM_SUSPEND_NON_RET_DEFAULT		SBI_HSM_SUSP_NON_RET_BIT
-#define SBI_HSM_SUSPEND_NON_RET_PLATFORM	(SBI_HSM_SUSP_NON_RET_BIT | \
-						 SBI_HSM_SUSP_PLAT_BASE)
-#define SBI_HSM_SUSPEND_NON_RET_LAST		(SBI_HSM_SUSP_NON_RET_BIT | \
-						 SBI_HSM_SUSP_BASE_MASK)
-
-enum sbi_ext_srst_fid {
-	SBI_EXT_SRST_RESET = 0,
-};
-
-enum sbi_srst_reset_type {
-	SBI_SRST_RESET_TYPE_SHUTDOWN = 0,
-	SBI_SRST_RESET_TYPE_COLD_REBOOT,
-	SBI_SRST_RESET_TYPE_WARM_REBOOT,
-};
-
-enum sbi_srst_reset_reason {
-	SBI_SRST_RESET_REASON_NONE = 0,
-	SBI_SRST_RESET_REASON_SYS_FAILURE,
+enum sbi_hsm_hart_status {
+	SBI_HSM_HART_STATUS_STARTED = 0,
+	SBI_HSM_HART_STATUS_STOPPED,
+	SBI_HSM_HART_STATUS_START_PENDING,
+	SBI_HSM_HART_STATUS_STOP_PENDING,
 };
 
 #define SBI_SPEC_VERSION_DEFAULT	0x1

arch/riscv/include/asm/suspend.h

@@ -1,36 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2021 Western Digital Corporation or its affiliates.
- * Copyright (c) 2022 Ventana Micro Systems Inc.
- */
-
-#ifndef _ASM_RISCV_SUSPEND_H
-#define _ASM_RISCV_SUSPEND_H
-
-#include <asm/ptrace.h>
-
-struct suspend_context {
-	/* Saved and restored by low-level functions */
-	struct pt_regs regs;
-	/* Saved and restored by high-level functions */
-	unsigned long scratch;
-	unsigned long tvec;
-	unsigned long ie;
-#ifdef CONFIG_MMU
-	unsigned long satp;
-#endif
-};
-
-/* Low-level CPU suspend entry function */
-int __cpu_suspend_enter(struct suspend_context *context);
-
-/* High-level CPU suspend which will save context and call finish() */
-int cpu_suspend(unsigned long arg,
-		int (*finish)(unsigned long arg,
-			      unsigned long entry,
-			      unsigned long context));
-
-/* Low-level CPU resume entry function */
-int __cpu_resume_enter(unsigned long hartid, unsigned long context);
-
-#endif

arch/riscv/kernel/Makefile

@@ -48,8 +48,6 @@ obj-$(CONFIG_SMP)		+= cpu_ops_spinwait.o
 obj-$(CONFIG_MODULES)		+= module.o
 obj-$(CONFIG_MODULE_SECTIONS)	+= module-sections.o
 
-obj-$(CONFIG_CPU_PM)		+= suspend_entry.o suspend.o
-
 obj-$(CONFIG_FUNCTION_TRACER)	+= mcount.o ftrace.o
 obj-$(CONFIG_DYNAMIC_FTRACE)	+= mcount-dyn.o
 

arch/riscv/kernel/asm-offsets.c

@@ -10,10 +10,6 @@
 #include <linux/sched.h>
 #include <asm/thread_info.h>
 #include <asm/ptrace.h>
-#include <asm/cpu_ops_sbi.h>
-#include <asm/suspend.h>
-
-void asm_offsets(void);
 
 void asm_offsets(void)
 {
@@ -153,162 +149,6 @@ void asm_offsets(void)
 	OFFSET(PT_BADADDR, pt_regs, badaddr);
 	OFFSET(PT_CAUSE, pt_regs, cause);
 
-	OFFSET(SUSPEND_CONTEXT_REGS, suspend_context, regs);
-#if 0
-	OFFSET(KVM_ARCH_GUEST_ZERO, kvm_vcpu_arch, guest_context.zero);
-	OFFSET(KVM_ARCH_GUEST_RA, kvm_vcpu_arch, guest_context.ra);
-	OFFSET(KVM_ARCH_GUEST_SP, kvm_vcpu_arch, guest_context.sp);
-	OFFSET(KVM_ARCH_GUEST_GP, kvm_vcpu_arch, guest_context.gp);
-	OFFSET(KVM_ARCH_GUEST_TP, kvm_vcpu_arch, guest_context.tp);
-	OFFSET(KVM_ARCH_GUEST_T0, kvm_vcpu_arch, guest_context.t0);
-	OFFSET(KVM_ARCH_GUEST_T1, kvm_vcpu_arch, guest_context.t1);
-	OFFSET(KVM_ARCH_GUEST_T2, kvm_vcpu_arch, guest_context.t2);
-	OFFSET(KVM_ARCH_GUEST_S0, kvm_vcpu_arch, guest_context.s0);
-	OFFSET(KVM_ARCH_GUEST_S1, kvm_vcpu_arch, guest_context.s1);
-	OFFSET(KVM_ARCH_GUEST_A0, kvm_vcpu_arch, guest_context.a0);
-	OFFSET(KVM_ARCH_GUEST_A1, kvm_vcpu_arch, guest_context.a1);
-	OFFSET(KVM_ARCH_GUEST_A2, kvm_vcpu_arch, guest_context.a2);
-	OFFSET(KVM_ARCH_GUEST_A3, kvm_vcpu_arch, guest_context.a3);
-	OFFSET(KVM_ARCH_GUEST_A4, kvm_vcpu_arch, guest_context.a4);
-	OFFSET(KVM_ARCH_GUEST_A5, kvm_vcpu_arch, guest_context.a5);
-	OFFSET(KVM_ARCH_GUEST_A6, kvm_vcpu_arch, guest_context.a6);
-	OFFSET(KVM_ARCH_GUEST_A7, kvm_vcpu_arch, guest_context.a7);
-	OFFSET(KVM_ARCH_GUEST_S2, kvm_vcpu_arch, guest_context.s2);
-	OFFSET(KVM_ARCH_GUEST_S3, kvm_vcpu_arch, guest_context.s3);
-	OFFSET(KVM_ARCH_GUEST_S4, kvm_vcpu_arch, guest_context.s4);
-	OFFSET(KVM_ARCH_GUEST_S5, kvm_vcpu_arch, guest_context.s5);
-	OFFSET(KVM_ARCH_GUEST_S6, kvm_vcpu_arch, guest_context.s6);
-	OFFSET(KVM_ARCH_GUEST_S7, kvm_vcpu_arch, guest_context.s7);
-	OFFSET(KVM_ARCH_GUEST_S8, kvm_vcpu_arch, guest_context.s8);
-	OFFSET(KVM_ARCH_GUEST_S9, kvm_vcpu_arch, guest_context.s9);
-	OFFSET(KVM_ARCH_GUEST_S10, kvm_vcpu_arch, guest_context.s10);
-	OFFSET(KVM_ARCH_GUEST_S11, kvm_vcpu_arch, guest_context.s11);
-	OFFSET(KVM_ARCH_GUEST_T3, kvm_vcpu_arch, guest_context.t3);
-	OFFSET(KVM_ARCH_GUEST_T4, kvm_vcpu_arch, guest_context.t4);
-	OFFSET(KVM_ARCH_GUEST_T5, kvm_vcpu_arch, guest_context.t5);
-	OFFSET(KVM_ARCH_GUEST_T6, kvm_vcpu_arch, guest_context.t6);
-	OFFSET(KVM_ARCH_GUEST_SEPC, kvm_vcpu_arch, guest_context.sepc);
-	OFFSET(KVM_ARCH_GUEST_SSTATUS, kvm_vcpu_arch, guest_context.sstatus);
-	OFFSET(KVM_ARCH_GUEST_HSTATUS, kvm_vcpu_arch, guest_context.hstatus);
-	OFFSET(KVM_ARCH_GUEST_SCOUNTEREN, kvm_vcpu_arch, guest_csr.scounteren);
-
-	OFFSET(KVM_ARCH_HOST_ZERO, kvm_vcpu_arch, host_context.zero);
-	OFFSET(KVM_ARCH_HOST_RA, kvm_vcpu_arch, host_context.ra);
-	OFFSET(KVM_ARCH_HOST_SP, kvm_vcpu_arch, host_context.sp);
-	OFFSET(KVM_ARCH_HOST_GP, kvm_vcpu_arch, host_context.gp);
-	OFFSET(KVM_ARCH_HOST_TP, kvm_vcpu_arch, host_context.tp);
-	OFFSET(KVM_ARCH_HOST_T0, kvm_vcpu_arch, host_context.t0);
-	OFFSET(KVM_ARCH_HOST_T1, kvm_vcpu_arch, host_context.t1);
-	OFFSET(KVM_ARCH_HOST_T2, kvm_vcpu_arch, host_context.t2);
-	OFFSET(KVM_ARCH_HOST_S0, kvm_vcpu_arch, host_context.s0);
-	OFFSET(KVM_ARCH_HOST_S1, kvm_vcpu_arch, host_context.s1);
-	OFFSET(KVM_ARCH_HOST_A0, kvm_vcpu_arch, host_context.a0);
-	OFFSET(KVM_ARCH_HOST_A1, kvm_vcpu_arch, host_context.a1);
-	OFFSET(KVM_ARCH_HOST_A2, kvm_vcpu_arch, host_context.a2);
-	OFFSET(KVM_ARCH_HOST_A3, kvm_vcpu_arch, host_context.a3);
-	OFFSET(KVM_ARCH_HOST_A4, kvm_vcpu_arch, host_context.a4);
-	OFFSET(KVM_ARCH_HOST_A5, kvm_vcpu_arch, host_context.a5);
-	OFFSET(KVM_ARCH_HOST_A6, kvm_vcpu_arch, host_context.a6);
-	OFFSET(KVM_ARCH_HOST_A7, kvm_vcpu_arch, host_context.a7);
-	OFFSET(KVM_ARCH_HOST_S2, kvm_vcpu_arch, host_context.s2);
-	OFFSET(KVM_ARCH_HOST_S3, kvm_vcpu_arch, host_context.s3);
-	OFFSET(KVM_ARCH_HOST_S4, kvm_vcpu_arch, host_context.s4);
-	OFFSET(KVM_ARCH_HOST_S5, kvm_vcpu_arch, host_context.s5);
-	OFFSET(KVM_ARCH_HOST_S6, kvm_vcpu_arch, host_context.s6);
-	OFFSET(KVM_ARCH_HOST_S7, kvm_vcpu_arch, host_context.s7);
-	OFFSET(KVM_ARCH_HOST_S8, kvm_vcpu_arch, host_context.s8);
-	OFFSET(KVM_ARCH_HOST_S9, kvm_vcpu_arch, host_context.s9);
-	OFFSET(KVM_ARCH_HOST_S10, kvm_vcpu_arch, host_context.s10);
-	OFFSET(KVM_ARCH_HOST_S11, kvm_vcpu_arch, host_context.s11);
-	OFFSET(KVM_ARCH_HOST_T3, kvm_vcpu_arch, host_context.t3);
-	OFFSET(KVM_ARCH_HOST_T4, kvm_vcpu_arch, host_context.t4);
-	OFFSET(KVM_ARCH_HOST_T5, kvm_vcpu_arch, host_context.t5);
-	OFFSET(KVM_ARCH_HOST_T6, kvm_vcpu_arch, host_context.t6);
-	OFFSET(KVM_ARCH_HOST_SEPC, kvm_vcpu_arch, host_context.sepc);
-	OFFSET(KVM_ARCH_HOST_SSTATUS, kvm_vcpu_arch, host_context.sstatus);
-	OFFSET(KVM_ARCH_HOST_HSTATUS, kvm_vcpu_arch, host_context.hstatus);
-	OFFSET(KVM_ARCH_HOST_SSCRATCH, kvm_vcpu_arch, host_sscratch);
-	OFFSET(KVM_ARCH_HOST_STVEC, kvm_vcpu_arch, host_stvec);
-	OFFSET(KVM_ARCH_HOST_SCOUNTEREN, kvm_vcpu_arch, host_scounteren);
-
-	OFFSET(KVM_ARCH_TRAP_SEPC, kvm_cpu_trap, sepc);
-	OFFSET(KVM_ARCH_TRAP_SCAUSE, kvm_cpu_trap, scause);
-	OFFSET(KVM_ARCH_TRAP_STVAL, kvm_cpu_trap, stval);
-	OFFSET(KVM_ARCH_TRAP_HTVAL, kvm_cpu_trap, htval);
-	OFFSET(KVM_ARCH_TRAP_HTINST, kvm_cpu_trap, htinst);
-
-	/* F extension */
-
-	OFFSET(KVM_ARCH_FP_F_F0, kvm_cpu_context, fp.f.f[0]);
-	OFFSET(KVM_ARCH_FP_F_F1, kvm_cpu_context, fp.f.f[1]);
-	OFFSET(KVM_ARCH_FP_F_F2, kvm_cpu_context, fp.f.f[2]);
-	OFFSET(KVM_ARCH_FP_F_F3, kvm_cpu_context, fp.f.f[3]);
-	OFFSET(KVM_ARCH_FP_F_F4, kvm_cpu_context, fp.f.f[4]);
-	OFFSET(KVM_ARCH_FP_F_F5, kvm_cpu_context, fp.f.f[5]);
-	OFFSET(KVM_ARCH_FP_F_F6, kvm_cpu_context, fp.f.f[6]);
-	OFFSET(KVM_ARCH_FP_F_F7, kvm_cpu_context, fp.f.f[7]);
-	OFFSET(KVM_ARCH_FP_F_F8, kvm_cpu_context, fp.f.f[8]);
-	OFFSET(KVM_ARCH_FP_F_F9, kvm_cpu_context, fp.f.f[9]);
-	OFFSET(KVM_ARCH_FP_F_F10, kvm_cpu_context, fp.f.f[10]);
-	OFFSET(KVM_ARCH_FP_F_F11, kvm_cpu_context, fp.f.f[11]);
-	OFFSET(KVM_ARCH_FP_F_F12, kvm_cpu_context, fp.f.f[12]);
-	OFFSET(KVM_ARCH_FP_F_F13, kvm_cpu_context, fp.f.f[13]);
-	OFFSET(KVM_ARCH_FP_F_F14, kvm_cpu_context, fp.f.f[14]);
-	OFFSET(KVM_ARCH_FP_F_F15, kvm_cpu_context, fp.f.f[15]);
-	OFFSET(KVM_ARCH_FP_F_F16, kvm_cpu_context, fp.f.f[16]);
-	OFFSET(KVM_ARCH_FP_F_F17, kvm_cpu_context, fp.f.f[17]);
-	OFFSET(KVM_ARCH_FP_F_F18, kvm_cpu_context, fp.f.f[18]);
-	OFFSET(KVM_ARCH_FP_F_F19, kvm_cpu_context, fp.f.f[19]);
-	OFFSET(KVM_ARCH_FP_F_F20, kvm_cpu_context, fp.f.f[20]);
-	OFFSET(KVM_ARCH_FP_F_F21, kvm_cpu_context, fp.f.f[21]);
-	OFFSET(KVM_ARCH_FP_F_F22, kvm_cpu_context, fp.f.f[22]);
-	OFFSET(KVM_ARCH_FP_F_F23, kvm_cpu_context, fp.f.f[23]);
-	OFFSET(KVM_ARCH_FP_F_F24, kvm_cpu_context, fp.f.f[24]);
-	OFFSET(KVM_ARCH_FP_F_F25, kvm_cpu_context, fp.f.f[25]);
-	OFFSET(KVM_ARCH_FP_F_F26, kvm_cpu_context, fp.f.f[26]);
-	OFFSET(KVM_ARCH_FP_F_F27, kvm_cpu_context, fp.f.f[27]);
-	OFFSET(KVM_ARCH_FP_F_F28, kvm_cpu_context, fp.f.f[28]);
-	OFFSET(KVM_ARCH_FP_F_F29, kvm_cpu_context, fp.f.f[29]);
-	OFFSET(KVM_ARCH_FP_F_F30, kvm_cpu_context, fp.f.f[30]);
-	OFFSET(KVM_ARCH_FP_F_F31, kvm_cpu_context, fp.f.f[31]);
-	OFFSET(KVM_ARCH_FP_F_FCSR, kvm_cpu_context, fp.f.fcsr);
-
-	/* D extension */
-
-	OFFSET(KVM_ARCH_FP_D_F0, kvm_cpu_context, fp.d.f[0]);
-	OFFSET(KVM_ARCH_FP_D_F1, kvm_cpu_context, fp.d.f[1]);
-	OFFSET(KVM_ARCH_FP_D_F2, kvm_cpu_context, fp.d.f[2]);
-	OFFSET(KVM_ARCH_FP_D_F3, kvm_cpu_context, fp.d.f[3]);
-	OFFSET(KVM_ARCH_FP_D_F4, kvm_cpu_context, fp.d.f[4]);
-	OFFSET(KVM_ARCH_FP_D_F5, kvm_cpu_context, fp.d.f[5]);
-	OFFSET(KVM_ARCH_FP_D_F6, kvm_cpu_context, fp.d.f[6]);
-	OFFSET(KVM_ARCH_FP_D_F7, kvm_cpu_context, fp.d.f[7]);
-	OFFSET(KVM_ARCH_FP_D_F8, kvm_cpu_context, fp.d.f[8]);
-	OFFSET(KVM_ARCH_FP_D_F9, kvm_cpu_context, fp.d.f[9]);
-	OFFSET(KVM_ARCH_FP_D_F10, kvm_cpu_context, fp.d.f[10]);
-	OFFSET(KVM_ARCH_FP_D_F11, kvm_cpu_context, fp.d.f[11]);
-	OFFSET(KVM_ARCH_FP_D_F12, kvm_cpu_context, fp.d.f[12]);
-	OFFSET(KVM_ARCH_FP_D_F13, kvm_cpu_context, fp.d.f[13]);
-	OFFSET(KVM_ARCH_FP_D_F14, kvm_cpu_context, fp.d.f[14]);
-	OFFSET(KVM_ARCH_FP_D_F15, kvm_cpu_context, fp.d.f[15]);
-	OFFSET(KVM_ARCH_FP_D_F16, kvm_cpu_context, fp.d.f[16]);
-	OFFSET(KVM_ARCH_FP_D_F17, kvm_cpu_context, fp.d.f[17]);
-	OFFSET(KVM_ARCH_FP_D_F18, kvm_cpu_context, fp.d.f[18]);
-	OFFSET(KVM_ARCH_FP_D_F19, kvm_cpu_context, fp.d.f[19]);
-	OFFSET(KVM_ARCH_FP_D_F20, kvm_cpu_context, fp.d.f[20]);
-	OFFSET(KVM_ARCH_FP_D_F21, kvm_cpu_context, fp.d.f[21]);
-	OFFSET(KVM_ARCH_FP_D_F22, kvm_cpu_context, fp.d.f[22]);
-	OFFSET(KVM_ARCH_FP_D_F23, kvm_cpu_context, fp.d.f[23]);
-	OFFSET(KVM_ARCH_FP_D_F24, kvm_cpu_context, fp.d.f[24]);
-	OFFSET(KVM_ARCH_FP_D_F25, kvm_cpu_context, fp.d.f[25]);
-	OFFSET(KVM_ARCH_FP_D_F26, kvm_cpu_context, fp.d.f[26]);
-	OFFSET(KVM_ARCH_FP_D_F27, kvm_cpu_context, fp.d.f[27]);
-	OFFSET(KVM_ARCH_FP_D_F28, kvm_cpu_context, fp.d.f[28]);
-	OFFSET(KVM_ARCH_FP_D_F29, kvm_cpu_context, fp.d.f[29]);
-	OFFSET(KVM_ARCH_FP_D_F30, kvm_cpu_context, fp.d.f[30]);
-	OFFSET(KVM_ARCH_FP_D_F31, kvm_cpu_context, fp.d.f[31]);
-	OFFSET(KVM_ARCH_FP_D_FCSR, kvm_cpu_context, fp.d.fcsr);
-#endif
 	/*
 	 * THREAD_{F,X}* might be larger than a S-type offset can handle, but
 	 * these are used in performance-sensitive assembly so we can't resort
@@ -660,9 +500,4 @@ void asm_offsets(void)
 	 * ensures the alignment is sane.
 	 */
 	DEFINE(PT_SIZE_ON_STACK, ALIGN(sizeof(struct pt_regs), STACK_ALIGN));
-#if 0
-	OFFSET(KERNEL_MAP_VIRT_ADDR, kernel_mapping, virt_addr);
-#endif
-	OFFSET(SBI_HART_BOOT_TASK_PTR_OFFSET, sbi_hart_boot_data, task_ptr);
-	OFFSET(SBI_HART_BOOT_STACK_PTR_OFFSET, sbi_hart_boot_data, stack_ptr);
 }

arch/riscv/kernel/cpu_ops_sbi.c

@@ -7,22 +7,13 @@
 
 #include <linux/init.h>
 #include <linux/mm.h>
-#include <linux/sched/task_stack.h>
 #include <asm/cpu_ops.h>
-#include <asm/cpu_ops_sbi.h>
 #include <asm/sbi.h>
 #include <asm/smp.h>
 
 extern char secondary_start_sbi[];
 const struct cpu_operations cpu_ops_sbi;
 
-/*
- * Ordered booting via HSM brings one cpu at a time. However, cpu hotplug can
- * be invoked from multiple threads in parallel. Define a per cpu data
- * to handle that.
- */
-DEFINE_PER_CPU(struct sbi_hart_boot_data, boot_data);
-
 static int sbi_hsm_hart_start(unsigned long hartid, unsigned long saddr,
 			      unsigned long priv)
 {
@@ -64,19 +55,14 @@ static int sbi_hsm_hart_get_status(unsigned long hartid)
 
 static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle)
 {
+	int rc;
 	unsigned long boot_addr = __pa_symbol(secondary_start_sbi);
 	int hartid = cpuid_to_hartid_map(cpuid);
-	unsigned long hsm_data;
-	struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid);
 
-	/* Make sure tidle is updated */
-	smp_mb();
-	bdata->task_ptr = tidle;
-	bdata->stack_ptr = task_stack_page(tidle) + THREAD_SIZE;
-	/* Make sure boot data is updated */
-	smp_mb();
-	hsm_data = __pa(bdata);
-	return sbi_hsm_hart_start(hartid, boot_addr, hsm_data);
+	cpu_update_secondary_bootdata(cpuid, tidle);
+	rc = sbi_hsm_hart_start(hartid, boot_addr, 0);
+
+	return rc;
 }
 
 static int sbi_cpu_prepare(unsigned int cpuid)
@@ -111,7 +97,7 @@ static int sbi_cpu_is_stopped(unsigned int cpuid)
 
 	rc = sbi_hsm_hart_get_status(hartid);
 
-	if (rc == SBI_HSM_STATE_STOPPED)
+	if (rc == SBI_HSM_HART_STATUS_STOPPED)
 		return 0;
 	return rc;
 }

arch/riscv/kernel/head.S

@@ -10,7 +10,6 @@
 #include <asm/thread_info.h>
 #include <asm/page.h>
 #include <asm/csr.h>
-#include <asm/cpu_ops_sbi.h>
 #include <asm/hwcap.h>
 #include <asm/image.h>
 #include "efi-header.S"
@@ -68,8 +67,7 @@ pe_head_start:
 
 .align 2
 #ifdef CONFIG_MMU
-	.global relocate_enable_mmu
-relocate_enable_mmu:
+relocate:
 	/* Relocate return address */
 	li a1, PAGE_OFFSET
 	la a2, _start
@@ -144,15 +142,13 @@ secondary_start_sbi:
 	la a3, .Lsecondary_park
 	csrw CSR_TVEC, a3
 
-	/* a0 contains the hartid & a1 contains boot data */
-	li a2, SBI_HART_BOOT_TASK_PTR_OFFSET
-	XIP_FIXUP_OFFSET a2
-	add a2, a2, a1
-	REG_L tp, (a2)
-	li a3, SBI_HART_BOOT_STACK_PTR_OFFSET
-	XIP_FIXUP_OFFSET a3
-	add a3, a3, a1
-	REG_L sp, (a3)
+	slli a3, a0, LGREG
+	la a4, __cpu_up_stack_pointer
+	la a5, __cpu_up_task_pointer
+	add a4, a3, a4
+	add a5, a3, a5
+	REG_L sp, (a4)
+	REG_L tp, (a5)
 
 	.global secondary_start_common
 secondary_start_common:
@@ -160,8 +156,7 @@ secondary_start_common:
 #ifdef CONFIG_MMU
 	/* Enable virtual memory and relocate to virtual address */
 	la a0, swapper_pg_dir
-	XIP_FIXUP_OFFSET a0
-	call relocate_enable_mmu
+	call relocate
 #endif
 	call setup_trap_vector
 	tail smp_callin
@@ -271,8 +266,7 @@ clear_bss_done:
 	call setup_vm
 #ifdef CONFIG_MMU
 	la a0, early_pg_dir
-	XIP_FIXUP_OFFSET a0
-	call relocate_enable_mmu
+	call relocate
 #endif /* CONFIG_MMU */
 
 	call setup_trap_vector

arch/riscv/kernel/perf_callchain.c

@@ -77,7 +77,7 @@ void perf_callchain_user(struct perf_callchain_entry_ctx *entry,
 
 bool fill_callchain(unsigned long pc, unsigned long regs, void *entry)
 {
-	return perf_callchain_store(entry, pc);
+	return perf_callchain_store(entry, pc) == 0;
 }
 
 void notrace walk_stackframe(struct task_struct *task,

arch/riscv/kernel/process.c

@@ -23,7 +23,6 @@
 #include <asm/string.h>
 #include <asm/switch_to.h>
 #include <asm/thread_info.h>
-#include <asm/cpuidle.h>
 
 register unsigned long gp_in_global __asm__("gp");
 
@@ -38,7 +37,7 @@ extern asmlinkage void ret_from_kernel_thread(void);
 
 void arch_cpu_idle(void)
 {
-	cpu_do_idle();
+	wait_for_interrupt();
 	raw_local_irq_enable();
 }
 

arch/riscv/kernel/ptrace.c

@@ -97,7 +97,6 @@ static int riscv_vr_get(struct task_struct *target,
 	struct __riscv_v_state *vstate = &target->thread.vstate;
 
 	membuf_write(&to, vstate, offsetof(struct __riscv_v_state, vtype));
-	membuf_store(&to, vstate->vtype);
 	return membuf_zero(&to, 4);	// explicitly pad
 }
 

arch/riscv/kernel/suspend.c

@@ -1,87 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2021 Western Digital Corporation or its affiliates.
- * Copyright (c) 2022 Ventana Micro Systems Inc.
- */
-
-#include <linux/ftrace.h>
-#include <asm/csr.h>
-#include <asm/suspend.h>
-
-static void suspend_save_csrs(struct suspend_context *context)
-{
-	context->scratch = csr_read(CSR_SCRATCH);
-	context->tvec = csr_read(CSR_TVEC);
-	context->ie = csr_read(CSR_IE);
-
-	/*
-	 * No need to save/restore IP CSR (i.e. MIP or SIP) because:
-	 *
-	 * 1. For no-MMU (M-mode) kernel, the bits in MIP are set by
-	 *    external devices (such as interrupt controller, timer, etc).
-	 * 2. For MMU (S-mode) kernel, the bits in SIP are set by
-	 *    M-mode firmware and external devices (such as interrupt
-	 *    controller, etc).
-	 */
-
-#ifdef CONFIG_MMU
-	context->satp = csr_read(CSR_SATP);
-#endif
-}
-
-static void suspend_restore_csrs(struct suspend_context *context)
-{
-	csr_write(CSR_SCRATCH, context->scratch);
-	csr_write(CSR_TVEC, context->tvec);
-	csr_write(CSR_IE, context->ie);
-
-#ifdef CONFIG_MMU
-	csr_write(CSR_SATP, context->satp);
-#endif
-}
-
-int cpu_suspend(unsigned long arg,
-		int (*finish)(unsigned long arg,
-			      unsigned long entry,
-			      unsigned long context))
-{
-	int rc = 0;
-	struct suspend_context context = { 0 };
-
-	/* Finisher should be non-NULL */
-	if (!finish)
-		return -EINVAL;
-
-	/* Save additional CSRs*/
-	suspend_save_csrs(&context);
-
-	/*
-	 * Function graph tracer state gets incosistent when the kernel
-	 * calls functions that never return (aka finishers) hence disable
-	 * graph tracing during their execution.
-	 */
-	pause_graph_tracing();
-
-	/* Save context on stack */
-	if (__cpu_suspend_enter(&context)) {
-		/* Call the finisher */
-		rc = finish(arg, __pa_symbol(__cpu_resume_enter),
-			    (ulong)&context);
-
-		/*
-		 * Should never reach here, unless the suspend finisher
-		 * fails. Successful cpu_suspend() should return from
-		 * __cpu_resume_entry()
-		 */
-		if (!rc)
-			rc = -EOPNOTSUPP;
-	}
-
-	/* Enable function graph tracer */
-	unpause_graph_tracing();
-
-	/* Restore additional CSRs */
-	suspend_restore_csrs(&context);
-
-	return rc;
-}

arch/riscv/kernel/suspend_entry.S

@@ -1,124 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2021 Western Digital Corporation or its affiliates.
- * Copyright (c) 2022 Ventana Micro Systems Inc.
- */
-
-#include <linux/linkage.h>
-#include <asm/asm.h>
-#include <asm/asm-offsets.h>
-#include <asm/csr.h>
-
-	.text
-	.altmacro
-	.option norelax
-
-ENTRY(__cpu_suspend_enter)
-	/* Save registers (except A0 and T0-T6) */
-	REG_S	ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)
-	REG_S	sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)
-	REG_S	gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)
-	REG_S	tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)
-	REG_S	s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)
-	REG_S	s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)
-	REG_S	a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)
-	REG_S	a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)
-	REG_S	a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)
-	REG_S	a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)
-	REG_S	a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0)
-	REG_S	a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0)
-	REG_S	a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0)
-	REG_S	s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0)
-	REG_S	s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)
-	REG_S	s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)
-	REG_S	s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0)
-	REG_S	s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0)
-	REG_S	s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0)
-	REG_S	s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0)
-	REG_S	s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0)
-	REG_S	s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0)
-	REG_S	s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)
-
-	/* Save CSRs */
-	csrr	t0, CSR_EPC
-	REG_S	t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)
-	csrr	t0, CSR_STATUS
-	REG_S	t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)
-	csrr	t0, CSR_TVAL
-	REG_S	t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)
-	csrr	t0, CSR_CAUSE
-	REG_S	t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)
-
-	/* Return non-zero value */
-	li	a0, 1
-
-	/* Return to C code */
-	ret
-END(__cpu_suspend_enter)
-
-ENTRY(__cpu_resume_enter)
-	/* Load the global pointer */
-	.option push
-	.option norelax
-		la gp, __global_pointer$
-	.option pop
-
-#ifdef CONFIG_MMU
-	/* Save A0 and A1 */
-	add	t0, a0, zero
-	add	t1, a1, zero
-
-	/* Enable MMU */
-	la	a0, swapper_pg_dir
-	XIP_FIXUP_OFFSET a0
-	call	relocate_enable_mmu
-
-	/* Restore A0 and A1 */
-	add	a0, t0, zero
-	add	a1, t1, zero
-#endif
-
-	/* Make A0 point to suspend context */
-	add	a0, a1, zero
-
-	/* Restore CSRs */
-	REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)
-	csrw	CSR_EPC, t0
-	REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)
-	csrw	CSR_STATUS, t0
-	REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)
-	csrw	CSR_TVAL, t0
-	REG_L	t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)
-	csrw	CSR_CAUSE, t0
-
-	/* Restore registers (except A0 and T0-T6) */
-	REG_L	ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)
-	REG_L	sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)
-	REG_L	gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)
-	REG_L	tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)
-	REG_L	s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)
-	REG_L	s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)
-	REG_L	a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)
-	REG_L	a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)
-	REG_L	a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)
-	REG_L	a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)
-	REG_L	a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0)
-	REG_L	a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0)
-	REG_L	a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0)
-	REG_L	s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0)
-	REG_L	s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)
-	REG_L	s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)
-	REG_L	s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0)
-	REG_L	s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0)
-	REG_L	s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0)
-	REG_L	s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0)
-	REG_L	s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0)
-	REG_L	s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0)
-	REG_L	s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)
-
-	/* Return zero value */
-	add	a0, zero, zero
-
-	/* Return to C code */
-	ret
-END(__cpu_resume_enter)

arch/riscv/kernel/vector.S

@@ -20,14 +20,6 @@
 #include <asm/csr.h>
 #include <asm/asm-offsets.h>
 
-#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
-#define V_ST	vse8.v
-#define V_LD	vle8.v
-#else
-#define V_ST	vsb.v
-#define V_LD	vlb.v
-#endif
-
 ENTRY(__vstate_save)
 	li	a2,  TASK_THREAD_V0
 	add	a0,  a0, a2
@@ -46,81 +38,14 @@ ENTRY(__vstate_save)
 	csrr	t0,  CSR_VTYPE
 	sd	t0,  TASK_THREAD_VTYPE_V0(a0)
 
-#ifdef CONFIG_VLEN_256
-	vsetvli	t0, x0, e8,m1
-	V_ST	v0,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v1,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v2,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v3,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v4,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v5,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v6,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v7,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v8,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v9,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v10, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v11, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v12, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v13, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v14, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v15, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v16, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v17, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v18, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v19, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v20, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v21, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v22, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v23, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v24, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v25, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v26, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v27, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v28, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v29, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v30, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v31, (a0)
-#else
-	vsetvli	t0, x0, e8,m8
-	V_ST	v0,  (a0)
+	.word 0x003072d7 	/* vsetvli	t0, x0, e8,m8 	*/
+	.word 0x02050027 	/* vsb.v	v0,  (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v8,  (a0)
+	.word 0x02050427 	/* vsb.v	v8,  (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v16, (a0)
+	.word 0x02050827 	/* vsb.v	v16, (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v24, (a0)
-#endif
+	.word 0x02050c27 	/* vsb.v	v24, (a0) 	*/
 
 	csrc	sstatus, t1
 	ret
@@ -134,81 +59,14 @@ ENTRY(__vstate_restore)
 	li	t1, (SR_VS | SR_FS)
 	csrs	sstatus, t1
 
-#ifdef CONFIG_VLEN_256
-	vsetvli	t0, x0, e8,m1
-	V_LD	v0,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v1,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v2,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v3,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v4,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v5,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v6,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v7,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v8,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v9,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v10, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v11, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v12, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v13, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v14, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v15, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v16, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v17, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v18, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v19, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v20, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v21, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v22, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v23, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v24, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v25, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v26, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v27, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v28, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v29, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v30, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v31, (a0)
-#else
-	vsetvli	t0, x0, e8,m8
-	V_LD	v0,  (a0)
+	.word 0x003072d7	/* vsetvli	t0, x0, e8,m8 	*/
+	.word 0x12050007	/* vlb.v	v0,  (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v8,  (a0)
+	.word 0x12050407	/* vlb.v	v8,  (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v16, (a0)
+	.word 0x12050807 	/* vlb.v	v16, (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v24, (a0)
-#endif
+	.word 0x12050c07	/* vlb.v	v24, (a0)	*/
 
 	mv	a0,  t2
 	ld	t0,  TASK_THREAD_VSTART_V0(a0)
@@ -219,16 +77,9 @@ ENTRY(__vstate_restore)
 	csrw	CSR_VXRM, t0
 	ld	t0,  TASK_THREAD_VL_V0(a0)
 	ld	t2,  TASK_THREAD_VTYPE_V0(a0)
-#ifdef CONFIG_VECTOR_EMU
-	srli	t3, t2, 63
-	bne	t3,zero,1f
-#endif
-	vsetvl	t3, t0, t2
-#ifdef CONFIG_VECTOR_EMU
-	j	2f
-1:	vsetvli zero,zero,e64,m2,d1
-2:
-#endif
+
+	.word 0x8072fe57 	/* vsetvl	t3, t0, t2	*/
+
 	csrc	sstatus, t1
 	ret
 ENDPROC(__vstate_restore)

arch/riscv/kvm/vcpu_sbi_hsm.c

@@ -1,105 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2021 Western Digital Corporation or its affiliates.
- *
- * Authors:
- *     Atish Patra <atish.patra@wdc.com>
- */
-
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/kvm_host.h>
-#include <asm/csr.h>
-#include <asm/sbi.h>
-#include <asm/kvm_vcpu_sbi.h>
-
-static int kvm_sbi_hsm_vcpu_start(struct kvm_vcpu *vcpu)
-{
-	struct kvm_cpu_context *reset_cntx;
-	struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
-	struct kvm_vcpu *target_vcpu;
-	unsigned long target_vcpuid = cp->a0;
-
-	target_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, target_vcpuid);
-	if (!target_vcpu)
-		return -EINVAL;
-	if (!target_vcpu->arch.power_off)
-		return -EALREADY;
-
-	reset_cntx = &target_vcpu->arch.guest_reset_context;
-	/* start address */
-	reset_cntx->sepc = cp->a1;
-	/* target vcpu id to start */
-	reset_cntx->a0 = target_vcpuid;
-	/* private data passed from kernel */
-	reset_cntx->a1 = cp->a2;
-	kvm_make_request(KVM_REQ_VCPU_RESET, target_vcpu);
-
-	kvm_riscv_vcpu_power_on(target_vcpu);
-
-	return 0;
-}
-
-static int kvm_sbi_hsm_vcpu_stop(struct kvm_vcpu *vcpu)
-{
-	if (vcpu->arch.power_off)
-		return -EINVAL;
-
-	kvm_riscv_vcpu_power_off(vcpu);
-
-	return 0;
-}
-
-static int kvm_sbi_hsm_vcpu_get_status(struct kvm_vcpu *vcpu)
-{
-	struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
-	unsigned long target_vcpuid = cp->a0;
-	struct kvm_vcpu *target_vcpu;
-
-	target_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, target_vcpuid);
-	if (!target_vcpu)
-		return -EINVAL;
-	if (!target_vcpu->arch.power_off)
-		return SBI_HSM_STATE_STARTED;
-	else
-		return SBI_HSM_STATE_STOPPED;
-}
-
-static int kvm_sbi_ext_hsm_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
-				   unsigned long *out_val,
-				   struct kvm_cpu_trap *utrap,
-				   bool *exit)
-{
-	int ret = 0;
-	struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
-	struct kvm *kvm = vcpu->kvm;
-	unsigned long funcid = cp->a6;
-
-	switch (funcid) {
-	case SBI_EXT_HSM_HART_START:
-		mutex_lock(&kvm->lock);
-		ret = kvm_sbi_hsm_vcpu_start(vcpu);
-		mutex_unlock(&kvm->lock);
-		break;
-	case SBI_EXT_HSM_HART_STOP:
-		ret = kvm_sbi_hsm_vcpu_stop(vcpu);
-		break;
-	case SBI_EXT_HSM_HART_STATUS:
-		ret = kvm_sbi_hsm_vcpu_get_status(vcpu);
-		if (ret >= 0) {
-			*out_val = ret;
-			ret = 0;
-		}
-		break;
-	default:
-		ret = -EOPNOTSUPP;
-	}
-
-	return ret;
-}
-
-const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm = {
-	.extid_start = SBI_EXT_HSM,
-	.extid_end = SBI_EXT_HSM,
-	.handler = kvm_sbi_ext_hsm_handler,
-};

drivers/Kconfig

@@ -8,6 +8,7 @@ source "drivers/eisa/Kconfig"
 source "drivers/pci/Kconfig"
 source "drivers/pcmcia/Kconfig"
 source "drivers/rapidio/Kconfig"
+source "drivers/nna/Kconfig"
 
 
 source "drivers/base/Kconfig"

drivers/Makefile

@@ -45,6 +45,9 @@ obj-$(CONFIG_VIRTIO)		+= virtio/
 obj-$(CONFIG_VDPA)		+= vdpa/
 obj-$(CONFIG_XEN)		+= xen/
 
+# npu-ax3386-gpl driver
+obj-y				+= nna/
+
 # regulators early, since some subsystems rely on them to initialize
 obj-$(CONFIG_REGULATOR)		+= regulator/
 

drivers/block/zram/zram_drv.c

@@ -1385,13 +1385,14 @@ compress_again:
 				__GFP_KSWAPD_RECLAIM |
 				__GFP_NOWARN |
 				__GFP_HIGHMEM |
-				__GFP_MOVABLE);
+				__GFP_MOVABLE |
+				__GFP_CMA);
 	if (!handle) {
 		zcomp_stream_put(zram->comp);
 		atomic64_inc(&zram->stats.writestall);
 		handle = zs_malloc(zram->mem_pool, comp_len,
 				GFP_NOIO | __GFP_HIGHMEM |
-				__GFP_MOVABLE);
+				__GFP_MOVABLE | __GFP_CMA);
 		if (handle)
 			goto compress_again;
 		return -ENOMEM;

drivers/bluetooth/Kconfig

@@ -115,14 +115,6 @@ config BT_HCIUART_H4
 
 	  Say Y here to compile support for HCI UART (H4) protocol.
 
-config BT_HCIUART_RTL3WIRE
-	bool "Realtek Three-wire UART (H5) protocol support"
-	depends on BT_HCIUART
-	help
-		Realtek Three-wire UART (H5) transport layer makes it possible
-		to use Realtek Bluetooth controller with Three-wire UART.
-		Say Y here to compile support for Realtek Three-wire UART.
-
 config BT_HCIUART_NOKIA
 	tristate "UART Nokia H4+ protocol support"
 	depends on BT_HCIUART

drivers/bluetooth/Makefile

@@ -45,6 +45,4 @@ hci_uart-$(CONFIG_BT_HCIUART_BCM)	+= hci_bcm.o
 hci_uart-$(CONFIG_BT_HCIUART_QCA)	+= hci_qca.o
 hci_uart-$(CONFIG_BT_HCIUART_AG6XX)	+= hci_ag6xx.o
 hci_uart-$(CONFIG_BT_HCIUART_MRVL)	+= hci_mrvl.o
-hci_uart-y += rtk_coex.o
-hci_uart-$(CONFIG_BT_HCIUART_RTL3WIRE) += hci_rtk_h5.o
 hci_uart-objs				:= $(hci_uart-y)

drivers/bluetooth/hci_bcm.c

@@ -654,7 +654,6 @@ static const struct h4_recv_pkt bcm_recv_pkts[] = {
 	{ H4_RECV_ACL,      .recv = hci_recv_frame },
 	{ H4_RECV_SCO,      .recv = hci_recv_frame },
 	{ H4_RECV_EVENT,    .recv = hci_recv_frame },
-	{ H4_RECV_ISO,      .recv = hci_recv_frame },
 	{ BCM_RECV_LM_DIAG, .recv = hci_recv_diag  },
 	{ BCM_RECV_NULL,    .recv = hci_recv_diag  },
 	{ BCM_RECV_TYPE49,  .recv = hci_recv_diag  },

drivers/bluetooth/hci_h4.c

@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
 /*
  *
  *  Bluetooth HCI UART driver
@@ -5,25 +6,10 @@
  *  Copyright (C) 2000-2001  Qualcomm Incorporated
  *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
  *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
  */
 
 #include <linux/module.h>
+
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/types.h>
@@ -31,6 +17,7 @@
 #include <linux/interrupt.h>
 #include <linux/ptrace.h>
 #include <linux/poll.h>
+
 #include <linux/slab.h>
 #include <linux/tty.h>
 #include <linux/errno.h>
@@ -38,32 +25,18 @@
 #include <linux/signal.h>
 #include <linux/ioctl.h>
 #include <linux/skbuff.h>
+#include <asm/unaligned.h>
+
 #include <net/bluetooth/bluetooth.h>
 #include <net/bluetooth/hci_core.h>
-#include <linux/version.h>
 
 #include "hci_uart.h"
 
-#ifdef BTCOEX
-#include "rtk_coex.h"
-#endif
-
-//#define VERSION "1.2"
-
 struct h4_struct {
-	unsigned long rx_state;
-	unsigned long rx_count;
 	struct sk_buff *rx_skb;
 	struct sk_buff_head txq;
 };
 
-/* H4 receiver States */
-#define H4_W4_PACKET_TYPE	0
-#define H4_W4_EVENT_HDR		1
-#define H4_W4_ACL_HDR		2
-#define H4_W4_SCO_HDR		3
-#define H4_W4_DATA		4
-
 /* Initialize protocol */
 static int h4_open(struct hci_uart *hu)
 {
@@ -71,7 +44,7 @@ static int h4_open(struct hci_uart *hu)
 
 	BT_DBG("hu %p", hu);
 
-	h4 = kzalloc(sizeof(*h4), GFP_ATOMIC);
+	h4 = kzalloc(sizeof(*h4), GFP_KERNEL);
 	if (!h4)
 		return -ENOMEM;
 
@@ -98,8 +71,6 @@ static int h4_close(struct hci_uart *hu)
 {
 	struct h4_struct *h4 = hu->priv;
 
-	hu->priv = NULL;
-
 	BT_DBG("hu %p", hu);
 
 	skb_queue_purge(&h4->txq);
@@ -112,7 +83,7 @@ static int h4_close(struct hci_uart *hu)
 	return 0;
 }
 
-/* Enqueue frame for transmittion (padding, crc, etc) */
+/* Enqueue frame for transmission (padding, crc, etc) */
 static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 {
 	struct h4_struct *h4 = hu->priv;
@@ -120,174 +91,34 @@ static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 	BT_DBG("hu %p skb %p", hu, skb);
 
 	/* Prepend skb with frame type */
-	memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
+	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
 	skb_queue_tail(&h4->txq, skb);
 
 	return 0;
 }
 
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-static inline int h4_check_data_len(struct h4_struct *h4, int len)
-#else
-static inline int h4_check_data_len(struct hci_dev *hdev, struct h4_struct *h4, int len)
-#endif
-{
-	register int room = skb_tailroom(h4->rx_skb);
-
-	BT_DBG("len %d room %d", len, room);
-
-	if (!len) {
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-		hci_recv_frame(h4->rx_skb);
-#else
-		hci_recv_frame(hdev, h4->rx_skb);
-#endif
-	} else if (len > room) {
-		BT_ERR("Data length is too large");
-		kfree_skb(h4->rx_skb);
-	} else {
-		h4->rx_state = H4_W4_DATA;
-		h4->rx_count = len;
-		return len;
-	}
-
-	h4->rx_state = H4_W4_PACKET_TYPE;
-	h4->rx_skb   = NULL;
-	h4->rx_count = 0;
-
-	return 0;
-}
+static const struct h4_recv_pkt h4_recv_pkts[] = {
+	{ H4_RECV_ACL,   .recv = hci_recv_frame },
+	{ H4_RECV_SCO,   .recv = hci_recv_frame },
+	{ H4_RECV_EVENT, .recv = hci_recv_frame },
+	{ H4_RECV_ISO,   .recv = hci_recv_frame },
+};
 
 /* Recv data */
-static int h4_recv(struct hci_uart *hu, void *data, int count)
+static int h4_recv(struct hci_uart *hu, const void *data, int count)
 {
 	struct h4_struct *h4 = hu->priv;
-	register char *ptr;
-	struct hci_event_hdr *eh;
-	struct hci_acl_hdr   *ah;
-	struct hci_sco_hdr   *sh;
-	register int len, type, dlen;
 
-	BT_DBG("hu %p count %d rx_state %ld rx_count %ld", 
-			hu, count, h4->rx_state, h4->rx_count);
+	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
+		return -EUNATCH;
 
-	ptr = data;
-	while (count) {
-		if (h4->rx_count) {
-			len = min_t(unsigned int, h4->rx_count, count);
-			memcpy(skb_put(h4->rx_skb, len), ptr, len);
-			h4->rx_count -= len; count -= len; ptr += len;
-
-			if (h4->rx_count)
-				continue;
-
-			switch (h4->rx_state) {
-			case H4_W4_DATA:
-				BT_DBG("Complete data");
-#ifdef BTCOEX
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_EVENT_PKT)
-					rtk_btcoex_parse_event(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
-					rtk_btcoex_parse_l2cap_data_rx(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-#endif
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				hci_recv_frame(h4->rx_skb);
-#else
-				hci_recv_frame(hu->hdev, h4->rx_skb);
-#endif
-
-				h4->rx_state = H4_W4_PACKET_TYPE;
-				h4->rx_skb = NULL;
-				continue;
-
-			case H4_W4_EVENT_HDR:
-				eh = hci_event_hdr(h4->rx_skb);
-
-				BT_DBG("Event header: evt 0x%2.2x plen %d", eh->evt, eh->plen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, eh->plen);
-#else
-				h4_check_data_len(hu->hdev, h4, eh->plen);
-#endif
-				continue;
-
-			case H4_W4_ACL_HDR:
-				ah = hci_acl_hdr(h4->rx_skb);
-				dlen = __le16_to_cpu(ah->dlen);
-
-				BT_DBG("ACL header: dlen %d", dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, dlen);
-#endif
-				continue;
-
-			case H4_W4_SCO_HDR:
-				sh = hci_sco_hdr(h4->rx_skb);
-
-				BT_DBG("SCO header: dlen %d", sh->dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, sh->dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, sh->dlen);
-#endif
-				continue;
-			}
-		}
-
-		/* H4_W4_PACKET_TYPE */
-		switch (*ptr) {
-		case HCI_EVENT_PKT:
-			BT_DBG("Event packet");
-			h4->rx_state = H4_W4_EVENT_HDR;
-			h4->rx_count = HCI_EVENT_HDR_SIZE;
-			type = HCI_EVENT_PKT;
-			break;
-
-		case HCI_ACLDATA_PKT:
-			BT_DBG("ACL packet");
-			h4->rx_state = H4_W4_ACL_HDR;
-			h4->rx_count = HCI_ACL_HDR_SIZE;
-			type = HCI_ACLDATA_PKT;
-			break;
-
-		case HCI_SCODATA_PKT:
-			BT_DBG("SCO packet");
-			h4->rx_state = H4_W4_SCO_HDR;
-			h4->rx_count = HCI_SCO_HDR_SIZE;
-			type = HCI_SCODATA_PKT;
-			break;
-
-		default:
-			BT_ERR("Unknown HCI packet type %2.2x", (__u8)*ptr);
-			hu->hdev->stat.err_rx++;
-			ptr++; count--;
-			continue;
-		};
-
-		ptr++; count--;
-
-		/* Allocate packet */
-		h4->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
-		if (!h4->rx_skb) {
-			BT_ERR("Can't allocate mem for new packet");
-			h4->rx_state = H4_W4_PACKET_TYPE;
-			h4->rx_count = 0;
-			return -ENOMEM;
-		}
-
-		h4->rx_skb->dev = (void *) hu->hdev;
-		bt_cb(h4->rx_skb)->pkt_type = type;
+	h4->rx_skb = h4_recv_buf(hu->hdev, h4->rx_skb, data, count,
+				 h4_recv_pkts, ARRAY_SIZE(h4_recv_pkts));
+	if (IS_ERR(h4->rx_skb)) {
+		int err = PTR_ERR(h4->rx_skb);
+		bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
+		h4->rx_skb = NULL;
+		return err;
 	}
 
 	return count;
@@ -299,8 +130,9 @@ static struct sk_buff *h4_dequeue(struct hci_uart *hu)
 	return skb_dequeue(&h4->txq);
 }
 
-static struct hci_uart_proto h4p = {
+static const struct hci_uart_proto h4p = {
 	.id		= HCI_UART_H4,
+	.name		= "H4",
 	.open		= h4_open,
 	.close		= h4_close,
 	.recv		= h4_recv,
@@ -311,17 +143,132 @@ static struct hci_uart_proto h4p = {
 
 int __init h4_init(void)
 {
-	int err = hci_uart_register_proto(&h4p);
-
-	if (!err)
-		BT_INFO("HCI H4 protocol initialized");
-	else
-		BT_ERR("HCI H4 protocol registration failed");
-
-	return err;
+	return hci_uart_register_proto(&h4p);
 }
 
 int __exit h4_deinit(void)
 {
 	return hci_uart_unregister_proto(&h4p);
 }
+
+struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
+			    const unsigned char *buffer, int count,
+			    const struct h4_recv_pkt *pkts, int pkts_count)
+{
+	struct hci_uart *hu = hci_get_drvdata(hdev);
+	u8 alignment = hu->alignment ? hu->alignment : 1;
+
+	/* Check for error from previous call */
+	if (IS_ERR(skb))
+		skb = NULL;
+
+	while (count) {
+		int i, len;
+
+		/* remove padding bytes from buffer */
+		for (; hu->padding && count > 0; hu->padding--) {
+			count--;
+			buffer++;
+		}
+		if (!count)
+			break;
+
+		if (!skb) {
+			for (i = 0; i < pkts_count; i++) {
+				if (buffer[0] != (&pkts[i])->type)
+					continue;
+
+				skb = bt_skb_alloc((&pkts[i])->maxlen,
+						   GFP_ATOMIC);
+				if (!skb)
+					return ERR_PTR(-ENOMEM);
+
+				hci_skb_pkt_type(skb) = (&pkts[i])->type;
+				hci_skb_expect(skb) = (&pkts[i])->hlen;
+				break;
+			}
+
+			/* Check for invalid packet type */
+			if (!skb)
+				return ERR_PTR(-EILSEQ);
+
+			count -= 1;
+			buffer += 1;
+		}
+
+		len = min_t(uint, hci_skb_expect(skb) - skb->len, count);
+		skb_put_data(skb, buffer, len);
+
+		count -= len;
+		buffer += len;
+
+		/* Check for partial packet */
+		if (skb->len < hci_skb_expect(skb))
+			continue;
+
+		for (i = 0; i < pkts_count; i++) {
+			if (hci_skb_pkt_type(skb) == (&pkts[i])->type)
+				break;
+		}
+
+		if (i >= pkts_count) {
+			kfree_skb(skb);
+			return ERR_PTR(-EILSEQ);
+		}
+
+		if (skb->len == (&pkts[i])->hlen) {
+			u16 dlen;
+
+			switch ((&pkts[i])->lsize) {
+			case 0:
+				/* No variable data length */
+				dlen = 0;
+				break;
+			case 1:
+				/* Single octet variable length */
+				dlen = skb->data[(&pkts[i])->loff];
+				hci_skb_expect(skb) += dlen;
+
+				if (skb_tailroom(skb) < dlen) {
+					kfree_skb(skb);
+					return ERR_PTR(-EMSGSIZE);
+				}
+				break;
+			case 2:
+				/* Double octet variable length */
+				dlen = get_unaligned_le16(skb->data +
+							  (&pkts[i])->loff);
+				hci_skb_expect(skb) += dlen;
+
+				if (skb_tailroom(skb) < dlen) {
+					kfree_skb(skb);
+					return ERR_PTR(-EMSGSIZE);
+				}
+				break;
+			default:
+				/* Unsupported variable length */
+				kfree_skb(skb);
+				return ERR_PTR(-EILSEQ);
+			}
+
+			if (!dlen) {
+				hu->padding = (skb->len - 1) % alignment;
+				hu->padding = (alignment - hu->padding) % alignment;
+
+				/* No more data, complete frame */
+				(&pkts[i])->recv(hdev, skb);
+				skb = NULL;
+			}
+		} else {
+			hu->padding = (skb->len - 1) % alignment;
+			hu->padding = (alignment - hu->padding) % alignment;
+
+			/* Complete frame */
+			(&pkts[i])->recv(hdev, skb);
+			skb = NULL;
+		}
+	}
+
+	return skb;
+}
+EXPORT_SYMBOL_GPL(h4_recv_buf);

drivers/bluetooth/hci_rtk_h5.c

@@ -1,908 +0,0 @@
-/*
- *
- *  Bluetooth HCI UART driver
- *
- *  Copyright (C) 2011-2014  wifi_fae<wifi_fae@realtek.com.tw>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/fcntl.h>
-#include <linux/interrupt.h>
-#include <linux/ptrace.h>
-#include <linux/poll.h>
-#include <linux/slab.h>
-#include <linux/tty.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/signal.h>
-#include <linux/ioctl.h>
-#include <linux/skbuff.h>
-#include <linux/bitrev.h>
-#include <asm/unaligned.h>
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-#include <linux/version.h>
-
-#include "hci_uart.h"
-
-#ifdef BTCOEX
-#include "rtk_coex.h"
-#endif
-
-//#define VERSION "1.0"
-
-static int txcrc = 1;
-//static int hciextn = 1;
-
-#define H5_TXWINSIZE	4
-#define H5_ACK_PKT	0x00
-#define H5_LE_PKT	    0x0F
-#define H5_VDRSPEC_PKT	0x0E
-
-struct h5_struct {
-	struct sk_buff_head unack;	/* Unack'ed packets queue */
-	struct sk_buff_head rel;	/* Reliable packets queue */
-	struct sk_buff_head unrel;	/* Unreliable packets queue */
-
-	unsigned long rx_count;
-	struct sk_buff *rx_skb;
-	struct delayed_work	retrans_work;
-	struct hci_uart		*hu;		/* Parent HCI UART */
-
-	enum {
-		H5_W4_PKT_DELIMITER,
-		H5_W4_PKT_START,
-		H5_W4_HDR,
-		H5_W4_DATA,
-		H5_W4_CRC
-	} rx_state;
-
-	enum {
-		H5_ESCSTATE_NOESC,
-		H5_ESCSTATE_ESC
-	} rx_esc_state;
-
-	u16 message_crc;
-	u8 use_crc;
-	u8 rxack;		/* Last packet sent by us that the peer ack'ed */
-
-	u8 rxseq_txack;		/* rxseq == txack. */
-	u8 txack_req;		/* Do we need to send ack's to the peer? */
-	/* Reliable packet sequence number - used to assign seq to each rel pkt. */
-	u8 msgq_txseq;
-
-	/* The spin lock protects seq, ack and ack req */
-	spinlock_t lock;
-};
-
-/* ---- H5 CRC calculation ---- */
-
-/* Table for calculating CRC for polynomial 0x1021, LSB processed first,
-initial value 0xffff, bits shifted in reverse order. */
-
-static const u16 crc_table[] = {
-	0x0000, 0x1081, 0x2102, 0x3183,
-	0x4204, 0x5285, 0x6306, 0x7387,
-	0x8408, 0x9489, 0xa50a, 0xb58b,
-	0xc60c, 0xd68d, 0xe70e, 0xf78f
-};
-
-/* Initialise the crc calculator */
-#define H5_CRC_INIT(x) x = 0xffff
-
-/*
-   Update crc with next data byte
-
-   Implementation note
-        The data byte is treated as two nibbles.  The crc is generated
-        in reverse, i.e., bits are fed into the register from the top.
-*/
-static void h5_crc_update(u16 * crc, u8 d)
-{
-	u16 reg = *crc;
-
-	reg = (reg >> 4) ^ crc_table[(reg ^ d) & 0x000f];
-	reg = (reg >> 4) ^ crc_table[(reg ^ (d >> 4)) & 0x000f];
-
-	*crc = reg;
-}
-
-/* ---- H5 core ---- */
-
-static void h5_slip_msgdelim(struct sk_buff *skb)
-{
-	const char pkt_delim = 0xc0;
-
-	memcpy(skb_put(skb, 1), &pkt_delim, 1);
-}
-
-static void h5_slip_one_byte(struct sk_buff *skb, u8 c)
-{
-	const char esc_c0[2] = { 0xdb, 0xdc };
-	const char esc_db[2] = { 0xdb, 0xdd };
-	const char esc_11[2] = { 0xdb, 0xde };
-	const char esc_13[2] = { 0xdb, 0xdf };
-
-	switch (c) {
-	case 0xc0:
-		memcpy(skb_put(skb, 2), &esc_c0, 2);
-		break;
-	case 0xdb:
-		memcpy(skb_put(skb, 2), &esc_db, 2);
-		break;
-	case 0x11:
-		memcpy(skb_put(skb, 2), &esc_11, 2);
-		break;
-	case 0x13:
-		memcpy(skb_put(skb, 2), &esc_13, 2);
-		break;
-	default:
-		memcpy(skb_put(skb, 1), &c, 1);
-	}
-}
-
-static int h5_enqueue(struct hci_uart *hu, struct sk_buff *skb)
-{
-	struct h5_struct *h5 = hu->priv;
-
-	if (skb->len > 0xFFF) {	//Pkt length must be less than 4095 bytes
-		BT_ERR("Packet too long");
-		kfree_skb(skb);
-		return 0;
-	}
-
-	switch (bt_cb(skb)->pkt_type) {
-	case HCI_ACLDATA_PKT:
-	case HCI_COMMAND_PKT:
-		skb_queue_tail(&h5->rel, skb);
-		break;
-
-	case HCI_SCODATA_PKT:
-		skb_queue_tail(&h5->unrel, skb);
-		break;
-	case H5_LE_PKT:
-	case H5_ACK_PKT:
-	case H5_VDRSPEC_PKT:
-		skb_queue_tail(&h5->unrel, skb);	/* 3-wire LinkEstablishment */
-		break;
-
-	default:
-		BT_ERR("Unknown packet type");
-		kfree_skb(skb);
-		break;
-	}
-
-	return 0;
-}
-
-static struct sk_buff *h5_prepare_pkt(struct h5_struct *h5, u8 * data,
-				      int len, int pkt_type)
-{
-	struct sk_buff *nskb;
-	u8 hdr[4], chan;
-	u16 H5_CRC_INIT(h5_txmsg_crc);
-	int rel, i;
-	u8 tmp;
-	unsigned long flags;
-
-	switch (pkt_type) {
-	case HCI_ACLDATA_PKT:
-		chan = 2;	/* 3-wire ACL channel */
-		rel = 1;	/* reliable channel */
-		break;
-	case HCI_COMMAND_PKT:
-		chan = 1;	/* 3-wire cmd channel */
-		rel = 1;	/* reliable channel */
-		break;
-	case HCI_EVENT_PKT:
-		chan = 4;	/* 3-wire cmd channel */
-		rel = 1;	/* reliable channel */
-		break;
-	case HCI_SCODATA_PKT:
-		chan = 3;	/* 3-wire SCO channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	case H5_LE_PKT:
-		chan = 15;	/* 3-wire LinkEstablishment channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	case H5_ACK_PKT:
-		chan = 0;	/* 3-wire ACK channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	case H5_VDRSPEC_PKT:
-		chan = 14;	/* 3-wire Vendor Specific channel */
-		rel = 0;	/* unreliable channel */
-		break;
-	default:
-		BT_ERR("Unknown packet type");
-		return NULL;
-	}
-
-	/* Max len of packet: (original len +4(h5 hdr) +2(crc))*2
-	   (because bytes 0xc0 and 0xdb are escaped, worst case is
-	   when the packet is all made of 0xc0 and 0xdb :) )
-	   + 2 (0xc0 delimiters at start and end). */
-
-	nskb = alloc_skb((len + 6) * 2 + 2, GFP_ATOMIC);
-	if (!nskb)
-		return NULL;
-
-	bt_cb(nskb)->pkt_type = pkt_type;
-
-	h5_slip_msgdelim(nskb);
-
-	spin_lock_irqsave(&h5->lock, flags);
-	tmp = h5->rxseq_txack;
-	hdr[0] = h5->rxseq_txack << 3;
-	h5->txack_req = 0;
-	spin_unlock_irqrestore(&h5->lock, flags);
-	BT_DBG("We request packet no %u to card", tmp);
-
-	if (rel) {
-		spin_lock_irqsave(&h5->lock, flags);
-		tmp = h5->msgq_txseq;
-		hdr[0] |= 0x80 + h5->msgq_txseq;
-		h5->msgq_txseq = (h5->msgq_txseq + 1) & 0x07;
-		spin_unlock_irqrestore(&h5->lock, flags);
-		BT_DBG("Sending packet with seqno %u", tmp);
-	}
-
-	if (h5->use_crc)
-		hdr[0] |= 0x40;
-
-	hdr[1] = ((len << 4) & 0xff) | chan;
-	hdr[2] = len >> 4;
-	hdr[3] = ~(hdr[0] + hdr[1] + hdr[2]);
-
-	/* Put H5 header */
-	for (i = 0; i < 4; i++) {
-		h5_slip_one_byte(nskb, hdr[i]);
-
-		if (h5->use_crc)
-			h5_crc_update(&h5_txmsg_crc, hdr[i]);
-	}
-
-	/* Put payload */
-	for (i = 0; i < len; i++) {
-		h5_slip_one_byte(nskb, data[i]);
-
-		if (h5->use_crc)
-			h5_crc_update(&h5_txmsg_crc, data[i]);
-	}
-
-	/* Put CRC */
-	if (h5->use_crc) {
-		h5_txmsg_crc = bitrev16(h5_txmsg_crc);
-		h5_slip_one_byte(nskb, (u8) ((h5_txmsg_crc >> 8) & 0x00ff));
-		h5_slip_one_byte(nskb, (u8) (h5_txmsg_crc & 0x00ff));
-	}
-
-	h5_slip_msgdelim(nskb);
-	return nskb;
-}
-
-/* This is a rewrite of pkt_avail in AH5 */
-static struct sk_buff *h5_dequeue(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-	unsigned long flags;
-	struct sk_buff *skb;
-
-	/* First of all, check for unreliable messages in the queue,
-	   since they have priority */
-
-	if ((skb = skb_dequeue(&h5->unrel)) != NULL) {
-		struct sk_buff *nskb =
-		    h5_prepare_pkt(h5, skb->data, skb->len,
-				   bt_cb(skb)->pkt_type);
-		if (nskb) {
-			kfree_skb(skb);
-			return nskb;
-		} else {
-			skb_queue_head(&h5->unrel, skb);
-			BT_ERR
-			    ("Could not dequeue pkt because alloc_skb failed");
-		}
-	}
-
-	/* Now, try to send a reliable pkt. We can only send a
-	   reliable packet if the number of packets sent but not yet ack'ed
-	   is < than the winsize */
-
-	spin_lock_irqsave_nested(&h5->unack.lock, flags, SINGLE_DEPTH_NESTING);
-
-	if (h5->unack.qlen < H5_TXWINSIZE
-	    && (skb = skb_dequeue(&h5->rel)) != NULL) {
-		struct sk_buff *nskb =
-		    h5_prepare_pkt(h5, skb->data, skb->len,
-				   bt_cb(skb)->pkt_type);
-		if (nskb) {
-			__skb_queue_tail(&h5->unack, skb);
-			schedule_delayed_work(&h5->retrans_work, HZ / 4);
-			spin_unlock_irqrestore(&h5->unack.lock, flags);
-			return nskb;
-		} else {
-			skb_queue_head(&h5->rel, skb);
-			BT_ERR
-			    ("Could not dequeue pkt because alloc_skb failed");
-		}
-	}
-
-	spin_unlock_irqrestore(&h5->unack.lock, flags);
-
-	/* We could not send a reliable packet, either because there are
-	   none or because there are too many unack'ed pkts. Did we receive
-	   any packets we have not acknowledged yet ? */
-
-	if (h5->txack_req) {
-		/* if so, craft an empty ACK pkt and send it on H5 unreliable
-		   channel 0 */
-		struct sk_buff *nskb = h5_prepare_pkt(h5, NULL, 0, H5_ACK_PKT);
-		return nskb;
-	}
-
-	/* We have nothing to send */
-	return NULL;
-}
-
-static int h5_flush(struct hci_uart *hu)
-{
-	BT_DBG("hu %p", hu);
-	return 0;
-}
-
-/* Remove ack'ed packets */
-static void h5_pkt_cull(struct h5_struct *h5)
-{
-	struct sk_buff *skb, *tmp;
-	unsigned long flags;
-	int i, pkts_to_be_removed;
-	u8 seqno;
-
-	spin_lock_irqsave(&h5->unack.lock, flags);
-
-	pkts_to_be_removed = skb_queue_len(&h5->unack);
-	seqno = h5->msgq_txseq;
-
-	while (pkts_to_be_removed) {
-		if (h5->rxack == seqno)
-			break;
-		pkts_to_be_removed--;
-		seqno = (seqno - 1) & 0x07;
-	}
-
-	if (h5->rxack != seqno)
-		BT_ERR("Peer acked invalid packet");
-
-	BT_DBG("Removing %u pkts out of %u, up to seqno %u",
-	       pkts_to_be_removed, skb_queue_len(&h5->unack),
-	       (seqno - 1) & 0x07);
-
-	i = 0;
-	skb_queue_walk_safe(&h5->unack, skb, tmp) {
-		if (i >= pkts_to_be_removed)
-			break;
-		i++;
-
-		__skb_unlink(skb, &h5->unack);
-		kfree_skb(skb);
-	}
-
-	if (skb_queue_empty(&h5->unack))
-		cancel_delayed_work(&h5->retrans_work);
-
-	spin_unlock_irqrestore(&h5->unack.lock, flags);
-
-	if (i != pkts_to_be_removed)
-		BT_ERR("Removed only %u out of %u pkts", i, pkts_to_be_removed);
-}
-
-/* Handle H5 link-establishment packets. When we
-   detect a "sync" packet, symptom that the BT module has reset,
-   we do nothing :) (yet) */
-#if 0
-static void h5_handle_le_pkt(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-	u8 conf_pkt[2] = { 0x03, 0xfc };
-	u8 conf_rsp_pkt[3] = { 0x04, 0x7b, 0x00 };
-	u8 sync_pkt[2] = { 0x01, 0x7e };
-	u8 sync_rsp_pkt[2] = { 0x02, 0x7d };
-
-	u8 wakeup_pkt[2] = { 0x05, 0xfa };
-	u8 woken_pkt[2] = { 0x06, 0xf9 };
-	u8 sleep_pkt[2] = { 0x07, 0x78 };
-
-	/* spot "conf" pkts and reply with a "conf rsp" pkt */
-	if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-	    !memcmp(&h5->rx_skb->data[4], conf_pkt, 2)) {
-		struct sk_buff *nskb = alloc_skb(3, GFP_ATOMIC);
-
-		BT_DBG("Found a LE conf pkt");
-		if (!nskb)
-			return;
-
-		conf_rsp_pkt[2] |= txcrc << 0x4;	//crc check enable, version no = 0. needed to be as avariable.
-		memcpy(skb_put(nskb, 3), conf_rsp_pkt, 3);
-		bt_cb(nskb)->pkt_type = H5_LE_PKT;
-
-		skb_queue_head(&h5->unrel, nskb);
-		hci_uart_tx_wakeup(hu);
-	}
-	/* spot "conf resp" pkts */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], conf_rsp_pkt, 2)) {
-		BT_DBG("Found a LE conf resp pkt, device go into active state");
-		txcrc = (h5->rx_skb->data[6] >> 0x4) & 0x1;
-	}
-
-	/* Spot "sync" pkts. If we find one...disaster! */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], sync_pkt, 2)) {
-		BT_ERR("Found a LE sync pkt, card has reset");
-		//DO Something here
-	}
-	/* Spot "sync resp" pkts. If we find one...disaster! */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], sync_rsp_pkt, 2)) {
-		BT_ERR
-		    ("Found a LE sync resp pkt, device go into initialized state");
-		//      DO Something here
-	}
-	/* Spot "wakeup" pkts. reply woken message when in active mode */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], wakeup_pkt, 2)) {
-		struct sk_buff *nskb = alloc_skb(2, GFP_ATOMIC);
-
-		BT_ERR("Found a LE Wakeup pkt, and reply woken message");
-		//      DO Something here
-
-		memcpy(skb_put(nskb, 2), woken_pkt, 2);
-		bt_cb(nskb)->pkt_type = H5_LE_PKT;
-
-		skb_queue_head(&h5->unrel, nskb);
-		hci_uart_tx_wakeup(hu);
-	}
-	/* Spot "woken" pkts. receive woken message from device */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_skb->data[4], woken_pkt, 2)) {
-		BT_ERR("Found a LE woken pkt from device");
-		//      DO Something here
-	}
-	/* Spot "Sleep" pkts */
-	else if (h5->rx_skb->data[1] >> 4 == 2 && h5->rx_skb->data[2] == 0 &&
-		 !memcmp(&h5->rx_indent: Standard input:620: Error:Unmatched 'else'
-skb->data[4], sleep_pkt, 2)) {
-		BT_ERR("Found a LE Sleep pkt");
-		//      DO Something here
-	}
-}
-#endif
-
-static inline void h5_unslip_one_byte(struct h5_struct *h5, unsigned char byte)
-{
-	const u8 c0 = 0xc0, db = 0xdb;
-	const u8 oof1 = 0x11, oof2 = 0x13;
-
-	switch (h5->rx_esc_state) {
-	case H5_ESCSTATE_NOESC:
-		switch (byte) {
-		case 0xdb:
-			h5->rx_esc_state = H5_ESCSTATE_ESC;
-			break;
-		default:
-			memcpy(skb_put(h5->rx_skb, 1), &byte, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0 &&
-			    h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, byte);
-			h5->rx_count--;
-		}
-		break;
-
-	case H5_ESCSTATE_ESC:
-		switch (byte) {
-		case 0xdc:
-			memcpy(skb_put(h5->rx_skb, 1), &c0, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0 &&
-			    h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, 0xc0);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		case 0xdd:
-			memcpy(skb_put(h5->rx_skb, 1), &db, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0 &&
-			    h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, 0xdb);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		case 0xde:
-			memcpy(skb_put(h5->rx_skb, 1), &oof1, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0
-			    && h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, oof1);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		case 0xdf:
-			memcpy(skb_put(h5->rx_skb, 1), &oof2, 1);
-			if ((h5->rx_skb->data[0] & 0x40) != 0
-			    && h5->rx_state != H5_W4_CRC)
-				h5_crc_update(&h5->message_crc, oof2);
-			h5->rx_esc_state = H5_ESCSTATE_NOESC;
-			h5->rx_count--;
-			break;
-
-		default:
-			BT_ERR("Invalid byte %02x after esc byte", byte);
-			kfree_skb(h5->rx_skb);
-			h5->rx_skb = NULL;
-			h5->rx_state = H5_W4_PKT_DELIMITER;
-			h5->rx_count = 0;
-		}
-	}
-}
-
-static void h5_complete_rx_pkt(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-	int pass_up;
-
-	if (h5->rx_skb->data[0] & 0x80) {	/* reliable pkt */
-		unsigned long flags;
-		u8 rxseq;
-
-		spin_lock_irqsave(&h5->lock, flags);
-		rxseq = h5->rxseq_txack;
-		h5->rxseq_txack++;
-		h5->rxseq_txack %= 0x8;
-		h5->txack_req = 1;
-		spin_unlock_irqrestore(&h5->lock, flags);
-
-		BT_DBG("Received seqno %u from card", rxseq);
-	}
-
-	h5->rxack = (h5->rx_skb->data[0] >> 3) & 0x07;
-	BT_DBG("Request for pkt %u from card", h5->rxack);
-
-	h5_pkt_cull(h5);
-
-	hci_uart_tx_wakeup(hu);
-
-	if ((h5->rx_skb->data[1] & 0x0f) == 2 && h5->rx_skb->data[0] & 0x80) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_ACLDATA_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 4 &&
-		   h5->rx_skb->data[0] & 0x80) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_EVENT_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 3) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_SCODATA_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 15 &&
-		   !(h5->rx_skb->data[0] & 0x80)) {
-		//h5_handle_le_pkt(hu);//Link Establishment Pkt
-		pass_up = 0;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 1 &&
-		   h5->rx_skb->data[0] & 0x80) {
-		bt_cb(h5->rx_skb)->pkt_type = HCI_COMMAND_PKT;
-		pass_up = 1;
-	} else if ((h5->rx_skb->data[1] & 0x0f) == 14) {
-		bt_cb(h5->rx_skb)->pkt_type = H5_VDRSPEC_PKT;
-		pass_up = 1;
-	} else
-		pass_up = 0;
-
-	if (!pass_up) {
-		/* struct hci_event_hdr hdr; */
-		u8 desc = (h5->rx_skb->data[1] & 0x0f);
-
-		if (desc != H5_ACK_PKT && desc != H5_LE_PKT) {
-			/* if (hciextn) {
-			 * 	desc |= 0xc0;
-			 * 	skb_pull(h5->rx_skb, 4);
-			 * 	memcpy(skb_push(h5->rx_skb, 1), &desc, 1);
-
-			 * 	hdr.evt = 0xff;
-			 * 	hdr.plen = h5->rx_skb->len;
-			 * 	memcpy(skb_push(h5->rx_skb, HCI_EVENT_HDR_SIZE),
-			 * 	       &hdr, HCI_EVENT_HDR_SIZE);
-			 * 	bt_cb(h5->rx_skb)->pkt_type = HCI_EVENT_PKT;
-
-			 * 	hci_recv_frame(h5->rx_skb);
-			 * } else { */
-				BT_ERR("Packet for unknown channel (%u %s)",
-				       h5->rx_skb->data[1] & 0x0f,
-				       h5->rx_skb->data[0] & 0x80 ?
-				       "reliable" : "unreliable");
-				kfree_skb(h5->rx_skb);
-			/* } */
-		} else
-			kfree_skb(h5->rx_skb);
-	} else {
-			/* Pull out H5 hdr */
-		skb_pull(h5->rx_skb, 4);
-
-#ifdef BTCOEX
-		if (bt_cb(h5->rx_skb)->pkt_type == HCI_EVENT_PKT)
-			rtk_btcoex_parse_event(h5->rx_skb->data,
-					       h5->rx_skb->len);
-
-		if (bt_cb(h5->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
-			rtk_btcoex_parse_l2cap_data_rx(h5->rx_skb->data,
-						       h5->rx_skb->len);
-#endif
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-		hci_recv_frame(h5->rx_skb);
-#else
-		hci_recv_frame(hu->hdev, h5->rx_skb);
-#endif
-	}
-
-	h5->rx_state = H5_W4_PKT_DELIMITER;
-	h5->rx_skb = NULL;
-}
-
-static u16 bscp_get_crc(struct h5_struct *h5) {
-	return get_unaligned_be16(&h5->rx_skb->
-			data[h5->rx_skb->len - 2]);
-}
-
-/* Recv data */
-static int h5_recv(struct hci_uart *hu, void *data, int count)
-{
-	struct h5_struct *h5 = hu->priv;
-	register unsigned char *ptr;
-	u8 rxseq;
-	unsigned long flags;
-
-	BT_DBG("hu %p count %d rx_state %d rx_count %ld",
-	       hu, count, h5->rx_state, h5->rx_count);
-
-	ptr = data;
-	while (count) {
-		if (h5->rx_count) {
-			if (*ptr == 0xc0) {
-				BT_ERR("Short H5 packet");
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_START;
-				h5->rx_count = 0;
-			} else
-				h5_unslip_one_byte(h5, *ptr);
-
-			ptr++;
-			count--;
-			continue;
-		}
-
-		switch (h5->rx_state) {
-		case H5_W4_HDR:
-			if ((0xff & (u8) ~
-			     (h5->rx_skb->data[0] +
-			      h5->rx_skb->data[1] +
-			      h5->rx_skb->data[2])) != h5->rx_skb->data[3]) {
-				BT_ERR("Error in H5 hdr checksum");
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_DELIMITER;
-				h5->rx_count = 0;
-				continue;
-			}
-			rxseq = h5->rxseq_txack;
-			if (h5->rx_skb->data[0] & 0x80	/* reliable pkt */
-			    && (h5->rx_skb->data[0] & 0x07) != rxseq) {
-				BT_ERR("Out-of-order packet arrived, got %u expected %u",
-				       h5->rx_skb->data[0] & 0x07, rxseq);
-
-				spin_lock_irqsave(&h5->lock, flags);
-				h5->txack_req = 1;
-				spin_unlock_irqrestore(&h5->lock, flags);
-				hci_uart_tx_wakeup(hu);
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_DELIMITER;
-				h5->rx_count = 0;
-				continue;
-			}
-			h5->rx_state = H5_W4_DATA;
-			h5->rx_count = (h5->rx_skb->data[1] >> 4) + (h5->rx_skb->data[2] << 4);	/* May be 0 */
-			continue;
-
-		case H5_W4_DATA:
-			if (h5->rx_skb->data[0] & 0x40) {	/* pkt with crc */
-				h5->rx_state = H5_W4_CRC;
-				h5->rx_count = 2;
-			} else
-				h5_complete_rx_pkt(hu);
-			continue;
-
-		case H5_W4_CRC:
-			if (bitrev16(h5->message_crc) != bscp_get_crc(h5)) {
-				BT_ERR
-				    ("Checksum failed: computed %04x received %04x",
-				     bitrev16(h5->message_crc),
-				     bscp_get_crc(h5));
-
-				kfree_skb(h5->rx_skb);
-				h5->rx_state = H5_W4_PKT_DELIMITER;
-				h5->rx_count = 0;
-				continue;
-			}
-			skb_trim(h5->rx_skb, h5->rx_skb->len - 2);
-			h5_complete_rx_pkt(hu);
-			continue;
-
-		case H5_W4_PKT_DELIMITER:
-			switch (*ptr) {
-			case 0xc0:
-				h5->rx_state = H5_W4_PKT_START;
-				break;
-			default:
-				/*BT_ERR("Ignoring byte %02x", *ptr); */
-				break;
-			}
-			ptr++;
-			count--;
-			break;
-
-		case H5_W4_PKT_START:
-			switch (*ptr) {
-			case 0xc0:
-				ptr++;
-				count--;
-				break;
-
-			default:
-				h5->rx_state = H5_W4_HDR;
-				h5->rx_count = 4;
-				h5->rx_esc_state = H5_ESCSTATE_NOESC;
-				H5_CRC_INIT(h5->message_crc);
-
-				/* Do not increment ptr or decrement count
-				 * Allocate packet. Max len of a H5 pkt= 
-				 * 0xFFF (payload) +4 (header) +2 (crc) */
-
-				h5->rx_skb = bt_skb_alloc(0x1005, GFP_ATOMIC);
-				if (!h5->rx_skb) {
-					BT_ERR
-					    ("Can't allocate mem for new packet");
-					h5->rx_state = H5_W4_PKT_DELIMITER;
-					h5->rx_count = 0;
-					return 0;
-				}
-				h5->rx_skb->dev = (void *)hu->hdev;
-				break;
-			}
-			break;
-		}
-	}
-	return count;
-}
-
-/* Arrange to retransmit all messages in the relq. */
-static void h5_timed_event(struct work_struct *work)
-{
-	struct h5_struct *h5;
-	struct hci_uart *hu;
-	unsigned long flags;
-	unsigned long flags2;
-	struct sk_buff *skb;
-
-	h5 = container_of(work, struct h5_struct, retrans_work.work);
-	hu = h5->hu;
-
-	BT_INFO("hu %p retransmitting %u pkts", hu, h5->unack.qlen);
-
-	spin_lock_irqsave_nested(&h5->unack.lock, flags, SINGLE_DEPTH_NESTING);
-
-	/* Move the pkt from unack queue to the head of reliable tx queue and
-	 * roll back the tx seq number
-	 */
-	while ((skb = __skb_dequeue_tail(&h5->unack)) != NULL) {
-		spin_lock_irqsave(&h5->lock, flags2);
-		h5->msgq_txseq = (h5->msgq_txseq - 1) & 0x07;
-		spin_unlock_irqrestore(&h5->lock, flags2);
-		skb_queue_head(&h5->rel, skb);
-	}
-
-	spin_unlock_irqrestore(&h5->unack.lock, flags);
-
-	hci_uart_tx_wakeup(hu);
-}
-
-static int h5_open(struct hci_uart *hu)
-{
-	struct h5_struct *h5;
-
-	BT_DBG("hu %p", hu);
-
-	BT_INFO("h5_open");
-	h5 = kzalloc(sizeof(*h5), GFP_ATOMIC);
-	if (!h5)
-		return -ENOMEM;
-
-	hu->priv = h5;
-	skb_queue_head_init(&h5->unack);
-	skb_queue_head_init(&h5->rel);
-	skb_queue_head_init(&h5->unrel);
-	spin_lock_init(&h5->lock);
-
-	h5->hu = hu;
-	INIT_DELAYED_WORK(&h5->retrans_work, (void *)h5_timed_event);
-
-	h5->rx_state = H5_W4_PKT_DELIMITER;
-
-	if (txcrc)
-		h5->use_crc = 1;
-
-	return 0;
-}
-
-static int h5_close(struct hci_uart *hu)
-{
-	struct h5_struct *h5 = hu->priv;
-
-	BT_INFO("h5_close");
-
-	cancel_delayed_work_sync(&h5->retrans_work);
-
-	hu->priv = NULL;
-
-	skb_queue_purge(&h5->unack);
-	skb_queue_purge(&h5->rel);
-	skb_queue_purge(&h5->unrel);
-
-	kfree(h5);
-
-	return 0;
-}
-
-static struct hci_uart_proto h5 = {
-	.id = HCI_UART_3WIRE,
-	.open = h5_open,
-	.close = h5_close,
-	.enqueue = h5_enqueue,
-	.dequeue = h5_dequeue,
-	.recv = h5_recv,
-	.flush = h5_flush
-};
-
-int h5_init(void)
-{
-	int err = hci_uart_register_proto(&h5);
-
-	if (!err)
-		BT_INFO("HCI Realtek H5 protocol initialized");
-	else
-		BT_ERR("HCI Realtek H5 protocol registration failed");
-
-	return err;
-}
-
-int h5_deinit(void)
-{
-	return hci_uart_unregister_proto(&h5);
-}

drivers/bluetooth/hci_uart.h

@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
  *
  *  Bluetooth HCI UART driver
@@ -5,50 +6,12 @@
  *  Copyright (C) 2000-2001  Qualcomm Incorporated
  *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
  *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
  */
-#include <linux/version.h>
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-
-/* #define HCI_VERSION_CODE KERNEL_VERSION(3, 14, 41) */
-#define HCI_VERSION_CODE LINUX_VERSION_CODE
 
 #ifndef N_HCI
 #define N_HCI	15
 #endif
 
-#ifndef CONFIG_BT_HCIUART_H4
-#define CONFIG_BT_HCIUART_H4
-#endif
-
-#define BTCOEX
-
-/* Send host sleep notification to Controller */
-#define WOBT_NOTIFY		0	/* 1  enable; 0  disable */
-
-/* Send LE whitelist only for Background scan parameters */
-#define WOBT_NOTIFY_BG_SCAN_LE_WHITELIST_ONLY	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
-/* RTKBT Power-on Whitelist for sideband wake-up by LE Advertising from Remote.
-* Note that it's necessary to apply TV FW Patch. */
-#define RTKBT_TV_POWERON_WHITELIST	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
 /* Ioctls */
 #define HCIUARTSETPROTO		_IOW('U', 200, int)
 #define HCIUARTGETPROTO		_IOR('U', 201, int)
@@ -57,7 +20,7 @@
 #define HCIUARTGETFLAGS		_IOR('U', 204, int)
 
 /* UART protocols */
-#define HCI_UART_MAX_PROTO	6
+#define HCI_UART_MAX_PROTO	12
 
 #define HCI_UART_H4	0
 #define HCI_UART_BCSP	1
@@ -65,6 +28,12 @@
 #define HCI_UART_H4DS	3
 #define HCI_UART_LL	4
 #define HCI_UART_ATH3K	5
+#define HCI_UART_INTEL	6
+#define HCI_UART_BCM	7
+#define HCI_UART_QCA	8
+#define HCI_UART_AG6XX	9
+#define HCI_UART_NOKIA	10
+#define HCI_UART_MRVL	11
 
 #define HCI_UART_RAW_DEVICE	0
 #define HCI_UART_RESET_ON_INIT	1
@@ -74,42 +43,46 @@
 #define HCI_UART_VND_DETECT	5
 
 struct hci_uart;
+struct serdev_device;
 
 struct hci_uart_proto {
 	unsigned int id;
+	const char *name;
+	unsigned int manufacturer;
+	unsigned int init_speed;
+	unsigned int oper_speed;
 	int (*open)(struct hci_uart *hu);
 	int (*close)(struct hci_uart *hu);
 	int (*flush)(struct hci_uart *hu);
-	int (*recv)(struct hci_uart *hu, void *data, int len);
+	int (*setup)(struct hci_uart *hu);
+	int (*set_baudrate)(struct hci_uart *hu, unsigned int speed);
+	int (*recv)(struct hci_uart *hu, const void *data, int len);
 	int (*enqueue)(struct hci_uart *hu, struct sk_buff *skb);
 	struct sk_buff *(*dequeue)(struct hci_uart *hu);
 };
 
 struct hci_uart {
 	struct tty_struct	*tty;
+	struct serdev_device	*serdev;
 	struct hci_dev		*hdev;
 	unsigned long		flags;
 	unsigned long		hdev_flags;
 
+	struct work_struct	init_ready;
 	struct work_struct	write_work;
-	struct workqueue_struct *hci_uart_wq;
 
-	struct hci_uart_proto	*proto;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)
-	struct percpu_rw_semaphore proto_lock; /* Stop work for proto close */
-#else
-	struct rw_semaphore proto_lock;
-#endif
+	const struct hci_uart_proto *proto;
+	struct percpu_rw_semaphore proto_lock;	/* Stop work for proto close */
 	void			*priv;
 
-	struct semaphore tx_sem;	/* semaphore for tx */
-
 	struct sk_buff		*tx_skb;
 	unsigned long		tx_state;
 
-#if WOBT_NOTIFY
-	struct notifier_block pm_notify_block;
-#endif
+	unsigned int init_speed;
+	unsigned int oper_speed;
+
+	u8			alignment;
+	u8			padding;
 };
 
 /* HCI_UART proto flag bits */
@@ -121,20 +94,108 @@ struct hci_uart {
 #define HCI_UART_SENDING	1
 #define HCI_UART_TX_WAKEUP	2
 
-extern int hci_uart_register_proto(struct hci_uart_proto *p);
-extern int hci_uart_unregister_proto(struct hci_uart_proto *p);
-extern int hci_uart_tx_wakeup(struct hci_uart *hu);
+int hci_uart_register_proto(const struct hci_uart_proto *p);
+int hci_uart_unregister_proto(const struct hci_uart_proto *p);
+int hci_uart_register_device(struct hci_uart *hu, const struct hci_uart_proto *p);
+void hci_uart_unregister_device(struct hci_uart *hu);
+
+int hci_uart_tx_wakeup(struct hci_uart *hu);
+int hci_uart_wait_until_sent(struct hci_uart *hu);
+int hci_uart_init_ready(struct hci_uart *hu);
+void hci_uart_init_work(struct work_struct *work);
+void hci_uart_set_baudrate(struct hci_uart *hu, unsigned int speed);
+bool hci_uart_has_flow_control(struct hci_uart *hu);
+void hci_uart_set_flow_control(struct hci_uart *hu, bool enable);
+void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed,
+			 unsigned int oper_speed);
 
 #ifdef CONFIG_BT_HCIUART_H4
-extern int h4_init(void);
-extern int h4_deinit(void);
+int h4_init(void);
+int h4_deinit(void);
+
+struct h4_recv_pkt {
+	u8  type;	/* Packet type */
+	u8  hlen;	/* Header length */
+	u8  loff;	/* Data length offset in header */
+	u8  lsize;	/* Data length field size */
+	u16 maxlen;	/* Max overall packet length */
+	int (*recv)(struct hci_dev *hdev, struct sk_buff *skb);
+};
+
+#define H4_RECV_ACL \
+	.type = HCI_ACLDATA_PKT, \
+	.hlen = HCI_ACL_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 2, \
+	.maxlen = HCI_MAX_FRAME_SIZE \
+
+#define H4_RECV_SCO \
+	.type = HCI_SCODATA_PKT, \
+	.hlen = HCI_SCO_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 1, \
+	.maxlen = HCI_MAX_SCO_SIZE
+
+#define H4_RECV_EVENT \
+	.type = HCI_EVENT_PKT, \
+	.hlen = HCI_EVENT_HDR_SIZE, \
+	.loff = 1, \
+	.lsize = 1, \
+	.maxlen = HCI_MAX_EVENT_SIZE
+
+#define H4_RECV_ISO \
+	.type = HCI_ISODATA_PKT, \
+	.hlen = HCI_ISO_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 2, \
+	.maxlen = HCI_MAX_FRAME_SIZE \
+
+struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
+			    const unsigned char *buffer, int count,
+			    const struct h4_recv_pkt *pkts, int pkts_count);
 #endif
 
-extern int h5_init(void);
-extern int h5_deinit(void);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-extern int hci_uart_send_frame(struct sk_buff *skb);
-#else
-extern int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb);
+#ifdef CONFIG_BT_HCIUART_BCSP
+int bcsp_init(void);
+int bcsp_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_LL
+int ll_init(void);
+int ll_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_ATH3K
+int ath_init(void);
+int ath_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_3WIRE
+int h5_init(void);
+int h5_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_INTEL
+int intel_init(void);
+int intel_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_BCM
+int bcm_init(void);
+int bcm_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_QCA
+int qca_init(void);
+int qca_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_AG6XX
+int ag6xx_init(void);
+int ag6xx_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_MRVL
+int mrvl_init(void);
+int mrvl_deinit(void);
 #endif

drivers/bluetooth/rtk_coex.h

@@ -1,373 +0,0 @@
-/*
-*
-*  Realtek Bluetooth USB driver
-*
-*
-*  This program is free software; you can redistribute it and/or modify
-*  it under the terms of the GNU General Public License as published by
-*  the Free Software Foundation; either version 2 of the License, or
-*  (at your option) any later version.
-*
-*  This program is distributed in the hope that it will be useful,
-*  but WITHOUT ANY WARRANTY; without even the implied warranty of
-*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-*  GNU General Public License for more details.
-*
-*  You should have received a copy of the GNU General Public License
-*  along with this program; if not, write to the Free Software
-*  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*
-*/
-#include <net/bluetooth/hci_core.h>
-#include <linux/list.h>
-
-/***********************************
-** Realtek - For coexistence **
-***********************************/
-#define BTRTL_HCIUSB    0
-#define BTRTL_HCIUART   1
-
-#define BTRTL_HCI_IF    BTRTL_HCIUART
-
-#define TRUE                1
-#define FALSE               0
-
-#define CONNECT_PORT        30001
-#define CONNECT_PORT_WIFI   30000
-
-#define invite_req          "INVITE_REQ"
-#define invite_rsp          "INVITE_RSP"
-#define attend_req          "ATTEND_REQ"
-#define attend_ack          "ATTEND_ACK"
-#define wifi_leave          "WIFI_LEAVE"
-#define leave_ack           "LEAVE_ACK"
-#define bt_leave            "BT_LEAVE"
-
-#define HCI_OP_PERIODIC_INQ								0x0403
-#define HCI_EV_LE_META			                        0x3e
-#define HCI_EV_LE_CONN_COMPLETE		                    0x01
-#define HCI_EV_LE_CONN_UPDATE_COMPLETE	                0x03
-#define HCI_EV_LE_ENHANCED_CONN_COMPLETE    0x0a
-
-//vendor cmd to fw
-#define HCI_VENDOR_ENABLE_PROFILE_REPORT_COMMAND        0xfc18
-#define HCI_VENDOR_SET_PROFILE_REPORT_COMMAND           0xfc19
-#define HCI_VENDOR_MAILBOX_CMD                          0xfc8f
-#define HCI_VENDOR_SET_BITPOOL				0xfc51
-
-//subcmd to fw
-#define HCI_VENDOR_SUB_CMD_WIFI_CHANNEL_AND_BANDWIDTH_CMD   0x11
-#define HCI_VENDOR_SUB_CMD_WIFI_FORCE_TX_POWER_CMD          0x17
-#define HCI_VENDOR_SUB_CMD_BT_ENABLE_IGNORE_WLAN_ACT_CMD    0x1B
-#define HCI_VENDOR_SUB_CMD_BT_REPORT_CONN_SCO_INQ_INFO      0x23
-#define HCI_VENDOR_SUB_CMD_BT_AUTO_REPORT_STATUS_INFO       0x27
-#define HCI_VENDOR_SUB_CMD_BT_AUTO_REPORT_ENABLE            0x28
-#define HCI_VENDOR_SUB_CMD_BT_SET_TXRETRY_REPORT_PARAM      0x29
-#define HCI_VENDOR_SUB_CMD_BT_SET_PTATABLE                  0x2A
-#define HCI_VENDOR_SUB_CMD_SET_BT_PSD_MODE                  0x31
-#define HCI_VENDOR_SUB_CMD_SET_BT_LNA_CONSTRAINT            0x32
-#define HCI_VENDOR_SUB_CMD_GET_AFH_MAP_L                    0x40
-#define HCI_VENDOR_SUB_CMD_GET_AFH_MAP_M                    0x41
-#define HCI_VENDOR_SUB_CMD_GET_AFH_MAP_H                    0x42
-#define HCI_VENDOR_SUB_CMD_RD_REG_REQ                       0x43
-#define HCI_VENDOR_SUB_CMD_WR_REG_REQ                       0x44
-
-#define HCI_EV_VENDOR_SPECIFIC      0xff
-
-//sub event from fw start
-#define HCI_VENDOR_PTA_REPORT_EVENT         0x24
-#define HCI_VENDOR_PTA_AUTO_REPORT_EVENT    0x25
-
-//vendor cmd to wifi driver
-#define HCI_GRP_VENDOR_SPECIFIC             (0x3f << 10)
-#define HCI_OP_HCI_EXTENSION_VERSION_NOTIFY (0x0100 | HCI_GRP_VENDOR_SPECIFIC)
-#define HCI_OP_BT_OPERATION_NOTIFY          (0x0102 | HCI_GRP_VENDOR_SPECIFIC)
-#define HCI_OP_HCI_BT_INFO_NOTIFY           (0x0106 | HCI_GRP_VENDOR_SPECIFIC)
-#define HCI_OP_HCI_BT_COEX_NOTIFY           (0x0107 | HCI_GRP_VENDOR_SPECIFIC)
-#define HCI_OP_HCI_BT_PATCH_VER_NOTIFY      (0x0108 | HCI_GRP_VENDOR_SPECIFIC)
-#define HCI_OP_HCI_BT_AFH_MAP_NOTIFY        (0x0109 | HCI_GRP_VENDOR_SPECIFIC)
-#define HCI_OP_HCI_BT_REGISTER_VALUE_NOTIFY (0x010a | HCI_GRP_VENDOR_SPECIFIC)
-
-//bt info reason to wifi
-#define HOST_RESPONSE                   0	//Host response when receive the BT Info Control Event
-#define POLLING_RESPONSE                1	//The BT Info response for polling by BT firmware.
-#define AUTO_REPORT                     2	//BT auto report by BT firmware.
-#define STACK_REPORT_WHILE_DEVICE_D2    3	//Stack report when BT firmware is under power save state(ex:D2)
-
-// vendor event from wifi
-#define RTK_HS_EXTENSION_EVENT_WIFI_SCAN            0x01
-#define RTK_HS_EXTENSION_EVENT_RADIO_STATUS_NOTIFY  0x02
-#define RTK_HS_EXTENSION_EVENT_HCI_BT_INFO_CONTROL  0x03
-#define RTK_HS_EXTENSION_EVENT_HCI_BT_COEX_CONTROL  0x04
-
-//op code from wifi
-#define BT_PATCH_VERSION_QUERY      0x00
-#define IGNORE_WLAN_ACTIVE_CONTROL  0x01
-#define LNA_CONSTRAIN_CONTROL       0x02
-#define BT_POWER_DECREASE_CONTROL   0x03
-#define BT_PSD_MODE_CONTROL         0x04
-#define WIFI_BW_CHNL_NOTIFY         0x05
-#define QUERY_BT_AFH_MAP            0x06
-#define BT_REGISTER_ACCESS          0x07
-
-//bt operation to notify
-#define BT_OPCODE_NONE                  0
-#define BT_OPCODE_INQUIRY_START         1
-#define BT_OPCODE_INQUIRY_END           2
-#define BT_OPCODE_PAGE_START            3
-#define BT_OPCODE_PAGE_SUCCESS_END      4
-#define BT_OPCODE_PAGE_UNSUCCESS_END    5
-#define BT_OPCODE_PAIR_START            6
-#define BT_OPCODE_PAIR_END              7
-#define BT_OPCODE_ENABLE_BT             8
-#define BT_OPCODE_DISABLE_BT            9
-
-#define HCI_EXTENSION_VERSION           0x0004
-#define HCI_CMD_PREAMBLE_SIZE           3
-#define PAN_PACKET_COUNT                5
-
-#define STREAM_TO_UINT16(u16, p) {u16 = ((uint16_t)(*(p)) + (((uint16_t)(*((p) + 1))) << 8)); (p) += 2;}
-#define UINT16_TO_STREAM(p, u16) {*(p)++ = (uint8_t)(u16); *(p)++ = (uint8_t)((u16) >> 8);}
-
-#define PSM_SDP     0x0001
-#define PSM_RFCOMM  0x0003
-#define PSM_PAN     0x000F
-#define PSM_HID     0x0011
-#define PSM_HID_INT 0x0013
-#define PSM_AVCTP   0x0017
-#define PSM_AVDTP   0x0019
-#define PSM_FTP     0x1001
-#define PSM_BIP     0x1003
-#define PSM_OPP     0x1015
-//--add more if needed--//
-
-enum {
-	profile_sco = 0,
-	profile_hid = 1,
-	profile_a2dp = 2,
-	profile_pan = 3,
-	profile_hid_interval = 4,
-	profile_hogp = 5,
-	profile_voice = 6,
-	profile_sink = 7,
-	profile_max = 8
-};
-
-#define A2DP_SIGNAL	0x01
-#define A2DP_MEDIA	0x02
-//profile info data
-typedef struct {
-	struct list_head list;
-	uint16_t handle;
-	uint16_t psm;
-	uint16_t dcid;
-	uint16_t scid;
-	uint8_t profile_index;
-	uint8_t flags;
-} rtk_prof_info, *prtk_prof_info;
-
-//profile info for each connection
-typedef struct rtl_hci_conn {
-	struct list_head list;
-	uint16_t handle;
-	uint8_t type;		// 0:l2cap, 1:sco/esco, 2:le
-	uint8_t profile_bitmap;
-	int8_t profile_refcount[8];
-} rtk_conn_prof, *prtk_conn_prof;
-
-#ifdef RTB_SOFTWARE_MAILBOX
-
-struct rtl_btinfo {
-	u8 cmd;
-	u8 len;
-	u8 data[6];
-};
-#define RTL_BTINFO_LEN	(sizeof(struct rtl_btinfo))
-/* typedef struct {
- * 	uint8_t cmd_index;
- * 	uint8_t cmd_length;
- * 	uint8_t link_status;
- * 	uint8_t retry_cnt;
- * 	uint8_t rssi;
- * 	uint8_t mailbox_info;
- * 	uint16_t acl_throughput;
- * } hci_linkstatus_report; */
-
-typedef struct {
-	uint8_t type;
-	uint32_t offset;
-	uint32_t value;
-} hci_mailbox_register;
-
-struct rtl_btinfo_ctl {
-	uint8_t polling_enable;
-	uint8_t polling_time;
-	uint8_t autoreport_enable;
-};
-#endif /* RTB_SOFTWARE_MAILBOX */
-
-#define MAX_LEN_OF_HCI_EV	32
-#define NUM_RTL_HCI_EV		32
-struct rtl_hci_ev {
-	__u8 data[MAX_LEN_OF_HCI_EV];
-	__u16 len;
-	struct list_head list;
-};
-
-#define L2_MAX_SUBSEC_LEN	128
-#define L2_MAX_PKTS	16
-struct rtl_l2_buff {
-	__u8 data[L2_MAX_SUBSEC_LEN];
-	__u16 len;
-	__u16 out;
-	struct list_head list;
-};
-
-struct rtl_coex_struct {
-	struct list_head conn_hash;	//hash for connections
-	struct list_head profile_list;	//hash for profile info
-	struct hci_dev *hdev;
-#ifdef RTB_SOFTWARE_MAILBOX
-	struct socket *udpsock;
-	struct sockaddr_in addr;
-	struct sockaddr_in wifi_addr;
-	struct timer_list polling_timer;
-#endif
-	struct timer_list a2dp_count_timer;
-	struct timer_list pan_count_timer;
-	struct timer_list hogp_count_timer;
-#ifdef RTB_SOFTWARE_MAILBOX
-	struct workqueue_struct *sock_wq;
-	struct delayed_work sock_work;
-#endif
-	struct workqueue_struct *fw_wq;
-	struct delayed_work fw_work;
-	struct delayed_work l2_work;
-#ifdef RTB_SOFTWARE_MAILBOX
-	struct sock *sk;
-#endif
-	struct urb *urb;
-	spinlock_t spin_lock_sock;
-	spinlock_t spin_lock_profile;
-	uint32_t a2dp_packet_count;
-	uint32_t pan_packet_count;
-	uint32_t hogp_packet_count;
-	uint32_t voice_packet_count;
-	uint8_t profile_bitmap;
-	uint8_t profile_status;
-	int8_t profile_refcount[8];
-	uint8_t ispairing;
-	uint8_t isinquirying;
-	uint8_t ispaging;
-#ifdef RTB_SOFTWARE_MAILBOX
-	uint8_t wifi_state;
-	uint8_t autoreport;
-	uint8_t polling_enable;
-	uint8_t polling_interval;
-	uint8_t piconet_id;
-	uint8_t mode;
-	uint8_t afh_map[10];
-#endif
-	uint16_t hci_reversion;
-	uint16_t lmp_subversion;
-#ifdef RTB_SOFTWARE_MAILBOX
-	uint8_t wifi_on;
-	uint8_t sock_open;
-#endif
-	unsigned long cmd_last_tx;
-
-	/* hci ev buff */
-	struct list_head ev_used_list;
-	struct list_head ev_free_list;
-
-	spinlock_t rxlock;
-	__u8 pkt_type;
-	__u16 expect;
-	__u8 *tbuff;
-	__u16 elen;
-	__u8 back_buff[HCI_MAX_EVENT_SIZE];
-
-	/* l2cap rx buff */
-	struct list_head l2_used_list;
-	struct list_head l2_free_list;
-
-	/* buff addr and size */
-	spinlock_t buff_lock;
-	unsigned long pages_addr;
-	unsigned long buff_size;
-
-#define RTL_COEX_RUNNING	(1 << 0)
-	unsigned long flags;
-
-};
-
-#ifdef __LITTLE_ENDIAN
-struct sbc_frame_hdr {
-	uint8_t syncword:8;		/* Sync word */
-	uint8_t subbands:1;		/* Subbands */
-	uint8_t allocation_method:1;	/* Allocation method */
-	uint8_t channel_mode:2;		/* Channel mode */
-	uint8_t blocks:2;		/* Blocks */
-	uint8_t sampling_frequency:2;	/* Sampling frequency */
-	uint8_t bitpool:8;		/* Bitpool */
-	uint8_t crc_check:8;		/* CRC check */
-} __attribute__ ((packed));
-
-/* NOTE: The code is copied from pa.
- * only the bit field in 8-bit is affected by endian, not the 16-bit or 32-bit.
- * why?
- */
-struct rtp_header {
-	unsigned cc:4;
-	unsigned x:1;
-	unsigned p:1;
-	unsigned v:2;
-
-	unsigned pt:7;
-	unsigned m:1;
-
-	uint16_t sequence_number;
-	uint32_t timestamp;
-	uint32_t ssrc;
-	uint32_t csrc[0];
-} __attribute__ ((packed));
-
-#else
-/* big endian */
-struct sbc_frame_hdr {
-	uint8_t syncword:8;		/* Sync word */
-	uint8_t sampling_frequency:2;	/* Sampling frequency */
-	uint8_t blocks:2;		/* Blocks */
-	uint8_t channel_mode:2;		/* Channel mode */
-	uint8_t allocation_method:1;	/* Allocation method */
-	uint8_t subbands:1;		/* Subbands */
-	uint8_t bitpool:8;		/* Bitpool */
-	uint8_t crc_check:8;		/* CRC check */
-} __attribute__ ((packed));
-
-struct rtp_header {
-	unsigned v:2;
-	unsigned p:1;
-	unsigned x:1;
-	unsigned cc:4;
-
-	unsigned m:1;
-	unsigned pt:7;
-
-	uint16_t sequence_number;
-	uint32_t timestamp;
-	uint32_t ssrc;
-	uint32_t csrc[0];
-} __attribute__ ((packed));
-#endif /* __LITTLE_ENDIAN */
-
-void rtk_btcoex_parse_event(uint8_t *buffer, int count);
-void rtk_btcoex_parse_cmd(uint8_t *buffer, int count);
-void rtk_btcoex_parse_l2cap_data_tx(uint8_t *buffer, int count);
-void rtk_btcoex_parse_l2cap_data_rx(uint8_t *buffer, int count);
-
-void rtk_btcoex_open(struct hci_dev *hdev);
-void rtk_btcoex_close(void);
-void rtk_btcoex_probe(struct hci_dev *hdev);
-void rtk_btcoex_init(void);
-void rtk_btcoex_exit(void);

drivers/clk/thead/clk-light-fm.c

@@ -50,7 +50,6 @@ static u32 share_cnt_spi_clk_en;
 static u32 share_cnt_uart0_clk_en;
 static u32 share_cnt_uart2_clk_en;
 static u32 share_cnt_i2c2_clk_en;
-static u32 share_cnt_i2c3_clk_en;
 static u32 share_cnt_peri_i2s_clk_en;
 static u32 share_cnt_qspi1_clk_en;
 static u32 share_cnt_uart1_clk_en;
@@ -379,31 +378,31 @@ static int light_clocks_probe(struct platform_device *pdev)
 	clks[AONSYS_BUS_CLK] = thead_clk_fixed("aonsys_hclk", 101606400);	//from sys_pll, maybe change ?
 
 	/* Light Fullmask AP MUX */
-	clks[CPU_PLL0_BYPASS] = thead_light_clk_mux_flags("cpu_pll0_bypass", ap_base + 0x4, 30, 1, cpu_pll0_bypass_sels, ARRAY_SIZE(cpu_pll0_bypass_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[CPU_PLL1_BYPASS] = thead_light_clk_mux_flags("cpu_pll1_bypass", ap_base + 0x14, 30, 1, cpu_pll1_bypass_sels, ARRAY_SIZE(cpu_pll1_bypass_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[GMAC_PLL_BYPASS] = thead_light_clk_mux_flags("gmac_pll_bypass", ap_base + 0x24, 30, 1, gmac_pll_bypass_sels, ARRAY_SIZE(gmac_pll_bypass_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[VIDEO_PLL_BYPASS] = thead_light_clk_mux_flags("video_pll_bypass", ap_base + 0x34, 30, 1, video_pll_bypass_sels, ARRAY_SIZE(video_pll_bypass_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[TEE_PLL_BYPASS] = thead_light_clk_mux_flags("tee_pll_bypass", ap_base + 0x64, 30, 1, tee_pll_bypass_sels, ARRAY_SIZE(tee_pll_bypass_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[DPU0_PLL_BYPASS] = thead_light_clk_mux_flags("dpu0_pll_bypass", ap_base + 0x44, 30, 1, dpu0_pll_bypass_sels, ARRAY_SIZE(dpu0_pll_bypass_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[DPU1_PLL_BYPASS] = thead_light_clk_mux_flags("dpu1_pll_bypass", ap_base + 0x54, 30, 1, dpu1_pll_bypass_sels, ARRAY_SIZE(dpu1_pll_bypass_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
+	clks[CPU_PLL0_BYPASS] = thead_light_clk_mux_flags("cpu_pll0_bypass", ap_base + 0x4, 30, 1, cpu_pll0_bypass_sels, ARRAY_SIZE(cpu_pll0_bypass_sels), CLK_SET_RATE_PARENT);
+	clks[CPU_PLL1_BYPASS] = thead_light_clk_mux_flags("cpu_pll1_bypass", ap_base + 0x14, 30, 1, cpu_pll1_bypass_sels, ARRAY_SIZE(cpu_pll1_bypass_sels), CLK_SET_RATE_PARENT);
+	clks[GMAC_PLL_BYPASS] = thead_light_clk_mux_flags("gmac_pll_bypass", ap_base + 0x24, 30, 1, gmac_pll_bypass_sels, ARRAY_SIZE(gmac_pll_bypass_sels), CLK_SET_RATE_PARENT);
+	clks[VIDEO_PLL_BYPASS] = thead_light_clk_mux_flags("video_pll_bypass", ap_base + 0x34, 30, 1, video_pll_bypass_sels, ARRAY_SIZE(video_pll_bypass_sels), CLK_SET_RATE_PARENT);
+	clks[TEE_PLL_BYPASS] = thead_light_clk_mux_flags("tee_pll_bypass", ap_base + 0x64, 30, 1, tee_pll_bypass_sels, ARRAY_SIZE(tee_pll_bypass_sels), CLK_SET_RATE_PARENT);
+	clks[DPU0_PLL_BYPASS] = thead_light_clk_mux_flags("dpu0_pll_bypass", ap_base + 0x44, 30, 1, dpu0_pll_bypass_sels, ARRAY_SIZE(dpu0_pll_bypass_sels), CLK_SET_RATE_PARENT);
+	clks[DPU1_PLL_BYPASS] = thead_light_clk_mux_flags("dpu1_pll_bypass", ap_base + 0x54, 30, 1, dpu1_pll_bypass_sels, ARRAY_SIZE(dpu1_pll_bypass_sels), CLK_SET_RATE_PARENT);
 
-	clks[AHB2_CPUSYS_HCLK] = thead_light_clk_mux_flags("ahb2_cpusys_hclk", ap_base + 0x120, 5, 1, ahb2_cpusys_hclk_sels, ARRAY_SIZE(ahb2_cpusys_hclk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[C910_CCLK_I0] = thead_light_clk_mux_flags("c910_cclk_i0", ap_base + 0x100, 1, 1, c910_cclk_i0_sels, ARRAY_SIZE(c910_cclk_i0_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[C910_CCLK] = thead_light_clk_mux_flags("c910_cclk", ap_base + 0x100, 0, 1, c910_cclk_sels, ARRAY_SIZE(c910_cclk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[CFG_AXI_ACLK] = thead_light_clk_mux_flags("cfg_axi_aclk", ap_base + 0x138, 5, 1, cfg_axi_aclk_sels, ARRAY_SIZE(cfg_axi_aclk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
+	clks[AHB2_CPUSYS_HCLK] = thead_light_clk_mux_flags("ahb2_cpusys_hclk", ap_base + 0x120, 5, 1, ahb2_cpusys_hclk_sels, ARRAY_SIZE(ahb2_cpusys_hclk_sels), CLK_SET_RATE_PARENT);
+	clks[C910_CCLK_I0] = thead_light_clk_mux_flags("c910_cclk_i0", ap_base + 0x100, 1, 1, c910_cclk_i0_sels, ARRAY_SIZE(c910_cclk_i0_sels), CLK_SET_RATE_PARENT);
+	clks[C910_CCLK] = thead_light_clk_mux_flags("c910_cclk", ap_base + 0x100, 0, 1, c910_cclk_sels, ARRAY_SIZE(c910_cclk_sels), CLK_SET_RATE_PARENT);
+	clks[CFG_AXI_ACLK] = thead_light_clk_mux_flags("cfg_axi_aclk", ap_base + 0x138, 5, 1, cfg_axi_aclk_sels, ARRAY_SIZE(cfg_axi_aclk_sels), CLK_SET_RATE_PARENT);
 
 	if (teesys)
-		clks[TEESYS_HCLK] = thead_light_clk_mux_flags("teesys_hclk", ap_base + 0x1cc, 13, 1, teesys_hclk_sels, ARRAY_SIZE(teesys_hclk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT); //just for teesys!!!
+		clks[TEESYS_HCLK] = thead_light_clk_mux_flags("teesys_hclk", ap_base + 0x1cc, 13, 1, teesys_hclk_sels, ARRAY_SIZE(teesys_hclk_sels), CLK_SET_RATE_PARENT); //just for teesys!!!
 
-	clks[PERISYS_AHB_HCLK] = thead_light_clk_mux_flags("perisys_ahb_hclk", ap_base + 0x140, 5, 1, perisys_ahb_hclk_sels, ARRAY_SIZE(perisys_ahb_hclk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[CLK_OUT_1] = thead_light_clk_mux_flags("clk_out_1", ap_base + 0x1b4, 4, 1, clk_out_1_sels, ARRAY_SIZE(clk_out_1_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[CLK_OUT_2] = thead_light_clk_mux_flags("clk_out_2", ap_base + 0x1b8, 4, 1, clk_out_2_sels, ARRAY_SIZE(clk_out_2_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[CLK_OUT_3] = thead_light_clk_mux_flags("clk_out_3", ap_base + 0x1bc, 4, 1, clk_out_3_sels, ARRAY_SIZE(clk_out_3_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[CLK_OUT_4] = thead_light_clk_mux_flags("clk_out_4", ap_base + 0x1c0, 4, 1, clk_out_4_sels, ARRAY_SIZE(clk_out_4_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[PERI_I2S_SRC_CLK] = thead_light_clk_mux_flags("peri_i2s_src_clk", ap_base + 0x1f0, 0, 1, peri_i2s_src_clk_sels, ARRAY_SIZE(peri_i2s_src_clk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
+	clks[PERISYS_AHB_HCLK] = thead_light_clk_mux_flags("perisys_ahb_hclk", ap_base + 0x140, 5, 1, perisys_ahb_hclk_sels, ARRAY_SIZE(perisys_ahb_hclk_sels), CLK_SET_RATE_PARENT);
+	clks[CLK_OUT_1] = thead_light_clk_mux_flags("clk_out_1", ap_base + 0x1b4, 4, 1, clk_out_1_sels, ARRAY_SIZE(clk_out_1_sels), CLK_SET_RATE_PARENT);
+	clks[CLK_OUT_2] = thead_light_clk_mux_flags("clk_out_2", ap_base + 0x1b8, 4, 1, clk_out_2_sels, ARRAY_SIZE(clk_out_2_sels), CLK_SET_RATE_PARENT);
+	clks[CLK_OUT_3] = thead_light_clk_mux_flags("clk_out_3", ap_base + 0x1bc, 4, 1, clk_out_3_sels, ARRAY_SIZE(clk_out_3_sels), CLK_SET_RATE_PARENT);
+	clks[CLK_OUT_4] = thead_light_clk_mux_flags("clk_out_4", ap_base + 0x1c0, 4, 1, clk_out_4_sels, ARRAY_SIZE(clk_out_4_sels), CLK_SET_RATE_PARENT);
+	clks[PERI_I2S_SRC_CLK] = thead_light_clk_mux_flags("peri_i2s_src_clk", ap_base + 0x1f0, 0, 1, peri_i2s_src_clk_sels, ARRAY_SIZE(peri_i2s_src_clk_sels), CLK_SET_RATE_PARENT);
 	clks[NPU_CCLK] = thead_light_clk_mux_flags("npu_cclk", ap_base + 0x1c8, 6, 1, npu_cclk_sels, ARRAY_SIZE(npu_cclk_sels), CLK_SET_RATE_PARENT);
-	clks[CFG_APB_PCLK] = thead_light_clk_mux_flags("cfg_apb_pclk", ap_base + 0x1c4, 7, 1, cfg_apb_pclk_sels, ARRAY_SIZE(cfg_apb_pclk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
-	clks[UART_SCLK] = thead_light_clk_mux_flags("uart_sclk", ap_base + 0x210, 0, 1, uart_sclk_sels, ARRAY_SIZE(uart_sclk_sels), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT);
+	clks[CFG_APB_PCLK] = thead_light_clk_mux_flags("cfg_apb_pclk", ap_base + 0x1c4, 7, 1, cfg_apb_pclk_sels, ARRAY_SIZE(cfg_apb_pclk_sels), CLK_SET_RATE_PARENT);
+	clks[UART_SCLK] = thead_light_clk_mux_flags("uart_sclk", ap_base + 0x210, 0, 1, uart_sclk_sels, ARRAY_SIZE(uart_sclk_sels), CLK_SET_RATE_PARENT);
 
 	/* Light Fullmask AP Divider */
 	clks[AHB2_CPUSYS_HCLK_OUT_DIV] = thead_clk_light_divider("ahb2_cpusys_hclk_out_div", "gmac_pll_fout1ph0", ap_base + 0x120, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
@@ -437,7 +436,7 @@ static int light_clocks_probe(struct platform_device *pdev)
 	/* Light Fullmask PLL FOUT */
 	clks[GMAC_PLL_FOUT1PH0] = thead_light_clk_fixed_factor("gmac_pll_fout1ph0", "gmac_pll_bypass", 1, 2);
 	clks[GMAC_PLL_FOUT4] = thead_light_clk_fixed_factor("gmac_pll_fout4", "gmac_pll_bypass", 1, 8);
-	clks[VIDEO_PLL_FOUT1PH0] = thead_light_clk_fixed_factor("video_pll_fout1ph0", "video_pll_bypass", 1, 2);
+	clks[VIDEO_PLL_FOUT1PH0] = thead_light_clk_fixed_factor("video_pll_fout1ph0", "video_pll_bybass", 1, 2);
 	clks[VIDEO_PLL_FOUT4] = thead_light_clk_fixed_factor("video_pll_fout4", "video_pll_bypass", 1, 8);
 	clks[TEE_PLL_FOUT4] = thead_light_clk_fixed_factor("tee_pll_fout4", "tee_pll_bypass", 1, 8);
 	clks[CPU_PLL0_FOUT4] = thead_light_clk_fixed_factor("cpu_pll0_fout4", "cpu_pll0_bypass", 1, 8);
@@ -451,7 +450,7 @@ static int light_clocks_probe(struct platform_device *pdev)
 	clks[QSPI0_SSI_CLK] = thead_light_clk_fixed_factor("qspi0_ssi_clk", "qspi_ssi_clk", 1, 1);
 	clks[QSPI1_SSI_CLK] = thead_light_clk_fixed_factor("qspi1_ssi_clk", "video_pll_fout1ph0", 1, 1);
 	clks[SPI_SSI_CLK] = thead_light_clk_fixed_factor("spi_ssi_clk", "video_pll_fout1ph0", 1, 1);
-	clks[EMMC_SDIO_REF_CLK] = thead_light_clk_fixed_factor("emmc_sdio_ref_clk", "video_pll_foutpostdiv", 1, 4);	/* Note: base clk is div 4 to 198M*/
+	clks[EMMC_SDIO_REF_CLK] = thead_light_clk_fixed_factor("emmc_sdio_ref_clk", "video_pll_foutpostdiv", 1, 1);	/* Note: no mux to select, use default value */
 	clks[PWM_CCLK] = thead_light_clk_fixed_factor("pwm_cclk", "osc_24m", 1, 1);
 	clks[CHIP_DBG_CCLK] = thead_light_clk_fixed_factor("chip_dbg_cclk", "osc_24m", 1, 1);
 	clks[GMAC_CCLK] = thead_light_clk_fixed_factor("gmac_cclk", "gmac_pll_fout1ph0", 1, 1);
@@ -569,8 +568,8 @@ static int light_clocks_probe(struct platform_device *pdev)
 	clks[CLKGEN_UART2_SCLK] = thead_clk_light_gate_shared("clkgen_uart2_sclk", "uart_sclk", ap_base + 0x204, 12, &share_cnt_uart2_clk_en);
 	clks[CLKGEN_I2C2_PCLK] = thead_clk_light_gate_shared("clkgen_i2c2_pclk", "perisys_apb_pclk", ap_base + 0x204, 3, &share_cnt_i2c2_clk_en);
 	clks[CLKGEN_I2C2_IC_CLK] = thead_clk_light_gate_shared("clkgen_i2c2_ic_clk", "i2c_ic_clk", ap_base + 0x204, 3, &share_cnt_i2c2_clk_en);
-	clks[CLKGEN_I2C3_PCLK] = thead_clk_light_gate_shared("clkgen_i2c3_pclk", "perisys_apb_pclk", ap_base + 0x204, 2, &share_cnt_i2c3_clk_en);
-	clks[CLKGEN_I2C3_IC_CLK] = thead_clk_light_gate_shared("clkgen_i2c3_ic_clk", "i2c_ic_clk", ap_base + 0x204, 2, &share_cnt_i2c3_clk_en);
+	clks[CLKGEN_I2C3_PCLK] = thead_clk_light_gate_shared("clkgen_i2c3_pclk", "perisys_apb_pclk", ap_base + 0x204, 2, &share_cnt_i2c2_clk_en);
+	clks[CLKGEN_I2C3_IC_CLK] = thead_clk_light_gate_shared("clkgen_i2c3_ic_clk", "i2c_ic_clk", ap_base + 0x204, 2, &share_cnt_i2c2_clk_en);
 	clks[CLKGEN_I2S_PCLK] = thead_clk_light_gate_shared("clkgen_i2s_pclk", "perisys_apb_pclk", ap_base + 0x1f0, 1, &share_cnt_peri_i2s_clk_en);
 	clks[CLKGEN_I2S_SRC_CLK] = thead_clk_light_gate_shared("clkgen_i2s_src_clk", "peri_i2s_src_clk", ap_base + 0x1f0, 1, &share_cnt_peri_i2s_clk_en);
 	clks[CLKGEN_QSPI1_PCLK] = thead_clk_light_gate_shared("clkgen_qspi1_pclk", "peri2sys_apb_pclk", ap_base + 0x204, 16, &share_cnt_qspi1_clk_en);

drivers/clk/thead/clk.h

@@ -111,7 +111,7 @@ static inline struct clk *thead_light_clk_mux_flags(const char *name,
 			unsigned long flags)
 {
 	return clk_register_mux(NULL, name, parents, num_parents,
-			flags , reg, shift, width, 0,
+			flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
 			&thead_light_clk_lock);
 }
 #endif

drivers/clk/thead/gate/Makefile

@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 
-obj-$(CONFIG_CLK_LIGHT_FM) += thead-gate.o visys-gate.o vpsys-gate.o vosys-gate.o dspsys-gate.o audiosys-gate.o miscsys-gate.o
+obj-$(CONFIG_CLK_LIGHT_FM) += thead-gate.o visys-gate.o vpsys-gate.o vosys-gate.o dspsys-gate.o audiosys-gate.o

drivers/clk/thead/gate/dspsys-gate.c

@@ -20,16 +20,12 @@
 
 static struct clk *gates[LIGHT_CLKGEN_DSPSYS_CLK_END];
 static struct clk_onecell_data clk_gate_data;
-static const char * const dsp0_cclk_sels[] = {"gmac_pll_foutpostdiv", "dspsys_dsp_clk"};
-static const char * const dsp1_cclk_sels[] = {"gmac_pll_foutpostdiv", "dspsys_dsp_clk"};
 
 static int light_dspsys_clk_probe(struct platform_device *pdev)
 {
 	struct regmap *dspsys_regmap, *tee_dspsys_regmap;
 	struct device *dev = &pdev->dev;
 	struct device_node *np = dev->of_node;
-	struct device_node *np_reg = of_parse_phandle(np, "dspsys-regmap", 0);
-	void __iomem *gate_base;
 	int ret;
 
 	dspsys_regmap = syscon_regmap_lookup_by_phandle(np, "dspsys-regmap");
@@ -43,24 +39,14 @@ static int light_dspsys_clk_probe(struct platform_device *pdev)
 		dev_warn(&pdev->dev, "cannot find regmap for tee dsp system register\n");
 		tee_dspsys_regmap = NULL;
 	}
-	gate_base = of_iomap(np_reg,0);
-	// MUX 
-	gates[DSPSYS_DSP0_CLK_SWITCH] = thead_light_clk_mux_flags("dspsys_dsp0_clk_switch", gate_base + 0x1c, 0, 1, dsp0_cclk_sels, ARRAY_SIZE(dsp0_cclk_sels), 0);
-	gates[DSPSYS_DSP1_CLK_SWITCH] = thead_light_clk_mux_flags("dspsys_dsp1_clk_switch", gate_base + 0x20, 0, 1, dsp1_cclk_sels, ARRAY_SIZE(dsp1_cclk_sels), 0);
 
-	// DIV & CDE
-	gates[DSPSYS_DSP_CLK] = thead_light_clk_fixed_factor("dspsys_dsp_clk", "video_pll_foutvco", 1, 3);
-	gates[DSPSYS_DSP0_CLK_CDE] = thead_clk_light_divider("dspsys_dsp0_clk_cde", "dspsys_dsp0_clk_switch", gate_base + 0x0, 0, 3, 4, MUX_TYPE_CDE, 0, 7);
-	gates[DSPSYS_DSP1_CLK_CDE] = thead_clk_light_divider("dspsys_dsp1_clk_cde", "dspsys_dsp1_clk_switch", gate_base + 0x4, 0, 3, 4, MUX_TYPE_CDE, 0, 7);
-
-	// gate
 	gates[CLKGEN_DSP0_PCLK] = thead_gate_clk_register("clkgen_dsp0_pclk", NULL, dspsys_regmap,
 							  0x24, 0, GATE_NOT_SHARED, NULL, dev);
 	gates[CLKGEN_DSP1_PCLK] = thead_gate_clk_register("clkgen_dsp1_pclk", NULL, dspsys_regmap,
 							  0x24, 1, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_DSP1_CCLK] = thead_gate_clk_register("clkgen_dsp1_cclk", "dspsys_dsp1_clk_cde", dspsys_regmap,
+	gates[CLKGEN_DSP1_CCLK] = thead_gate_clk_register("clkgen_dsp1_cclk", NULL, dspsys_regmap,
 							  0x24, 2, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_DSP0_CCLK] = thead_gate_clk_register("clkgen_dsp0_cclk", "dspsys_dsp0_clk_cde", dspsys_regmap,
+	gates[CLKGEN_DSP0_CCLK] = thead_gate_clk_register("clkgen_dsp0_cclk", NULL, dspsys_regmap,
 							  0x24, 3, GATE_NOT_SHARED, NULL, dev);
 	gates[CLKGEN_X2X_DSP2_ACLK_S] = thead_gate_clk_register("clkgen_x2x_dsp2_aclk_s", NULL, dspsys_regmap,
 							  0x24, 4, GATE_NOT_SHARED, NULL, dev);

drivers/clk/thead/gate/miscsys-gate.c

@@ -1,108 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022 Alibaba Group Holding Limited.
- */
-#include <dt-bindings/clock/light-miscsys.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/of_address.h>
-#include <linux/platform_device.h>
-#include <linux/types.h>
-#include "clk-gate.h"
-#include "../clk.h"
-static struct clk *gates[CLKGEN_MISCSYS_CLK_END];
-static struct clk_onecell_data clk_gate_data;
-static int light_miscsys_clk_probe(struct platform_device *pdev)
-{
-	struct regmap *miscsys_regmap, *tee_miscsys_regmap = NULL;
-	struct device *dev = &pdev->dev;
-	struct device_node *np = dev->of_node;
-	int ret;
-
-	miscsys_regmap = syscon_regmap_lookup_by_phandle(np, "miscsys-regmap");
-	if (IS_ERR(miscsys_regmap)) {
-		dev_err(&pdev->dev, "cannot find regmap for misc system register\n");
-		return PTR_ERR(miscsys_regmap);
-	}
-	tee_miscsys_regmap = syscon_regmap_lookup_by_phandle(np, "tee-miscsys-regmap");
-	if (IS_ERR(tee_miscsys_regmap)) {
-		dev_err(&pdev->dev, "cannot find regmap for tee misc system register\n");
-		return PTR_ERR(tee_miscsys_regmap);
-	}
-	/* we assume that the gate clock is a root clock  */
-	gates[CLKGEN_MISCSYS_MISCSYS_ACLK] = thead_gate_clk_register("clkgen_missys_aclk", NULL,
-								miscsys_regmap, 0x100, 0, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_MISCSYS_USB3_DRD_CLK] = thead_gate_clk_register("clkgen_usb3_drd_clk", NULL,
-								miscsys_regmap, 0x104, 0, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_MISCSYS_USB3_DRD_CTRL_REF_CLK] = thead_gate_clk_register("clkgen_usb3_drd_ctrl_ref_clk", "osc_24m",
-								miscsys_regmap, 0x104, 1, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_MISCSYS_USB3_DRD_PHY_REF_CLK] = thead_gate_clk_register("clkgen_usb3_drd_phy_ref_clk", "osc_24m",
-								miscsys_regmap, 0x104, 2, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_MISCSYS_USB3_DRD_SUSPEND_CLK] = thead_gate_clk_register("clkgen_usb3_drd_suspend_clk", NULL,
-								miscsys_regmap, 0x104, 3, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_MISCSYS_EMMC_CLK] = thead_gate_clk_register("clkgen_emmc_clk", "osc_24m",
-								miscsys_regmap, 0x108, 0, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_MISCSYS_SDIO0_CLK] = thead_gate_clk_register("clkgen_sdio0_clk", "osc_24m",
-								miscsys_regmap, 0x10c, 0, GATE_NOT_SHARED, NULL, dev);
-	gates[CLKGEN_MISCSYS_SDIO1_CLK] = thead_gate_clk_register("clkgen_sdio1_clk", "osc_24m",
-								miscsys_regmap, 0x110, 0, GATE_NOT_SHARED, NULL, dev);
-	if (tee_miscsys_regmap) {
-		gates[CLKGEN_MISCSYS_AHB2_TEESYS_HCLK] = thead_gate_clk_register("clkgen_ahb2_teesys_hclk", NULL,
-								tee_miscsys_regmap, 0x120, 0, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_APB3_TEESYS_HCLK] = thead_gate_clk_register("clkgen_apb3_teesys_hclk", NULL,
-								tee_miscsys_regmap, 0x120, 1, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_AXI4_TEESYS_ACLK] = thead_gate_clk_register("clkgen_axi4_teesys_aclk", NULL,
-								tee_miscsys_regmap, 0x120, 2, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_EIP120SI_CLK] = thead_gate_clk_register("clkgen_eip120si_clk", NULL,
-								tee_miscsys_regmap, 0x120, 3, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_EIP120SII_CLK] = thead_gate_clk_register("clkgen_eip120sii_clk", NULL,
-								tee_miscsys_regmap, 0x120, 4, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_EIP120SIII_CLK] = thead_gate_clk_register("clkgen_eip120siii_clk", NULL,
-								tee_miscsys_regmap, 0x120, 5, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_TEEDMAC_CLK] = thead_gate_clk_register("clkgen_teedmac_clk", NULL,
-								tee_miscsys_regmap, 0x120, 6, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_EIP150B_HCLK] = thead_gate_clk_register("clkgen_eip150b_hclk", NULL,
-								tee_miscsys_regmap, 0x120, 7, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_OCRAM_HCLK] = thead_gate_clk_register("clkgen_ocram_hclk", NULL,
-								tee_miscsys_regmap, 0x120, 8, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_EFUSE_PCLK] = thead_gate_clk_register("clkgen_efuse_pclk", NULL,
-								tee_miscsys_regmap, 0x120, 9, GATE_NOT_SHARED, NULL, dev);
-		gates[CLKGEN_MISCSYS_TEE_SYSREG_PCLK] = thead_gate_clk_register("clkgen_tee_sysreg_pclk", NULL,
-								tee_miscsys_regmap, 0x120, 10, GATE_NOT_SHARED, NULL, dev);
-	}
-	clk_gate_data.clks = gates;
-	clk_gate_data.clk_num = ARRAY_SIZE(gates);
-	ret = of_clk_add_provider(np, of_clk_src_onecell_get, &clk_gate_data);
-	if (ret < 0) {
-		dev_err(dev, "failed to register gate clks for light miscsys\n");
-		goto unregister_clks;
-	}
-	dev_info(dev, "succeed to register miscsys gate clock provider\n");
-	return 0;
-unregister_clks:
-	thead_unregister_clocks(gates, ARRAY_SIZE(gates));
-	return ret;
-}
-static const struct of_device_id miscsys_clk_gate_of_match[] = {
-	{ .compatible = "thead,miscsys-gate-controller" },
-	{ /* sentinel */ },
-};
-MODULE_DEVICE_TABLE(of, miscsys_clk_gate_of_match);
-static struct platform_driver light_miscsys_clk_driver = {
-	.probe = light_miscsys_clk_probe,
-	.driver = {
-		.name = "miscsys-clk-gate-provider",
-		.owner = THIS_MODULE,
-		.of_match_table = of_match_ptr(miscsys_clk_gate_of_match),
-	},
-};
-module_platform_driver(light_miscsys_clk_driver);
-MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
-MODULE_AUTHOR("Esther.Z <Esther.Z@linux.alibaba.com>");
-MODULE_DESCRIPTION("Thead Light Fullmask miscsys clock gate provider");
-MODULE_LICENSE("GPL v2");

drivers/clk/thead/gate/vpsys-gate.c

@@ -34,18 +34,15 @@ static int light_vpsys_clk_probe(struct platform_device *pdev)
 	if (WARN_ON(IS_ERR(gate_base)))
 		return PTR_ERR(gate_base);
 
-	// DIV & CDE
-	gates[LIGHT_VPSYS_G2D_CCLK_DIV] = thead_clk_light_divider("light_vpsys_g2d_cclk_div", "video_pll_foutvco", gate_base + 0x30, 0, 4, 4, MUX_TYPE_DIV, 3, 9);
-
-	/* G2D clock configuration : Completed the upward configuration of CCLK */
+	/* we assume that the gate clock is a root clock  */
 	gates[LIGHT_VPSYS_G2D_PCLK] = thead_clk_light_gate_shared("clkgen_vpsys_g2d_pclk", NULL,
 								   gate_base + 0x20, 3, &share_cnt_g2d_clk_en);
 	gates[LIGHT_VPSYS_G2D_ACLK] = thead_clk_light_gate_shared("clkgen_vpsys_g2d_aclk", NULL,
 								   gate_base + 0x20, 3, &share_cnt_g2d_clk_en);
-	gates[LIGHT_VPSYS_G2D_CCLK] = thead_clk_light_gate_shared("clkgen_vpsys_g2d_cclk", "light_vpsys_g2d_cclk_div",
+	gates[LIGHT_VPSYS_G2D_CCLK] = thead_clk_light_gate_shared("clkgen_vpsys_g2d_cclk", NULL,
 								   gate_base + 0x20, 3, &share_cnt_g2d_clk_en);
 
-	/* we assume that the gate clock is a root clock  */
+
 	gates[LIGHT_VPSYS_FCE_PCLK] = thead_clk_light_gate_shared("clkgen_vpsys_fce_pclk", NULL,
 								   gate_base + 0x20, 2, &share_cnt_fce_clk_en);
 	gates[LIGHT_VPSYS_FCE_ACLK] = thead_clk_light_gate_shared("clkgen_vpsys_fce_aclk", NULL,

drivers/cpufreq/light-mpw-cpufreq.c

@@ -34,15 +34,12 @@ enum LIGHT_MPW_CPUFREQ_CLKS {
 };
 
 #define LIGHT_MPW_CPUFREQ_CLK_NUM	4
-#define LIGHT_CPUFREQ_THRE		1500000
+#define LIGHT_CPUFREQ_THRE		2000000
 #define LIGHT_C910_BUS_CLK_SYNC		BIT(11)
 #define LIGHT_C910_BUS_CLK_RATIO_MASK	0x700
 #define LIGHT_C910_BUS_CLK_DIV_RATIO_2	0x100
 #define LIGHT_C910_BUS_CLK_DIV_RATIO_3	0x200
 
-#define LIGHT_CPU_PLL_IDX(x)	(x)
-#define LIGHT_CPU_PLL_COUNT	2
-
 static int num_clks;
 static struct clk_bulk_data clks[] = {
 	{ .id = "c910_cclk" },
@@ -54,7 +51,6 @@ static struct clk_bulk_data clks[] = {
 static struct device *cpu_dev;
 static struct cpufreq_frequency_table *freq_table;
 static unsigned int max_freq;
-static unsigned int min_freq;
 static unsigned int transition_latency;
 static void __iomem *ap_sys_reg;
 static bool light_dvfs_sv = false;
@@ -62,40 +58,6 @@ static bool light_dvfs_sv = false;
 static u32 *light_dvddm_volt;
 static u32 soc_opp_count = 0;
 
-static int _light_get_pllid(void)
-{
-	int ret;
-
-	if (!strcmp(__clk_get_name(clk_get_parent(clks[LIGHT_C910_CCLK].clk)),
-		__clk_get_name(clks[LIGHT_C910_CCLK_I0].clk))) // pll index 0
-		ret = LIGHT_CPU_PLL_IDX(0);
-	else // pll index 1
-		ret = LIGHT_CPU_PLL_IDX(1);
-
-	return ret;
-}
-
-static int _light_switch_pllid(int pllid, int target_freq)
-{
-	pr_debug("[%s] switchto pll[%d], freq[%u]\n", __func__, pllid, target_freq);
-	if (pllid == LIGHT_CPU_PLL_IDX(1)) {
-		clk_prepare_enable(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
-		clk_set_rate(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk, target_freq * 1000);
-		clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
-		udelay(1);
-		clk_disable_unprepare(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
-	} else {
-		clk_prepare_enable(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
-		clk_set_rate(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk, target_freq * 1000);
-		clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_C910_CCLK_I0].clk);
-		udelay(1);
-		clk_disable_unprepare(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
-	}
-
-	return 0;
-}
-
-
 static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 {
 	struct dev_pm_opp *opp;
@@ -178,8 +140,20 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 		}
 	}
 
-	/* switch pll */
-	_light_switch_pllid((_light_get_pllid()+1)&(LIGHT_CPU_PLL_COUNT-1), new_freq);
+	if (!strcmp(__clk_get_name(clk_get_parent(clks[LIGHT_C910_CCLK].clk)),
+	    __clk_get_name(clks[LIGHT_C910_CCLK_I0].clk))) {
+		clk_prepare_enable(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
+		clk_set_rate(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk, new_freq * 1000);
+		ret = clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
+		udelay(1);
+		clk_disable_unprepare(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
+	} else {
+		clk_prepare_enable(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
+		clk_set_rate(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk, new_freq * 1000);
+		ret  = clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_C910_CCLK_I0].clk);
+		udelay(1);
+		clk_disable_unprepare(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
+	}
 
 	/*add delay for clk-switch*/
 	udelay(1);
@@ -226,35 +200,6 @@ static int light_set_target(struct cpufreq_policy *policy, unsigned int index)
 	return 0;
 }
 
-static int light_cpufreq_suspend(struct cpufreq_policy *policy)
-{
-	int ret;
-	int index;
-
-	pr_debug("%s: cpu: %d, %u KHz to %u KHz\n",
-			__func__, policy->cpu, policy->cur, policy->suspend_freq);
-
-	ret = cpufreq_generic_suspend(policy);
-	if (ret) {
-		pr_err("%s: failed\n", __func__);
-		return ret;
-	}
-
-	/*
-	 * Only CPU PLL0 would be active after STR resume. We should switch
-	 * CPU PLL to be PLL0 after policy stopped.
-	 */
-	if (_light_get_pllid() == LIGHT_CPU_PLL_IDX(1))
-		_light_switch_pllid(LIGHT_CPU_PLL_IDX(0), policy->suspend_freq);
-
-	return 0;
-}
-
-static int light_cpufreq_resume(struct cpufreq_policy *policy)
-{
-	return 0;
-}
-
 static int light_cpufreq_init(struct cpufreq_policy *policy)
 {
 	policy->clk = clks[LIGHT_C910_CCLK].clk;
@@ -289,8 +234,7 @@ static struct cpufreq_driver light_cpufreq_driver = {
 	.init = light_cpufreq_init,
 	.name = "light-cpufreq",
 	.attr = cpufreq_generic_attr,
-	.suspend = light_cpufreq_suspend,
-	.resume = light_cpufreq_resume,
+	.suspend = cpufreq_generic_suspend,
 };
 
 static int light_cpufreq_pm_notify(struct notifier_block *nb,
@@ -330,9 +274,15 @@ static int panic_cpufreq_notifier_call(struct notifier_block *nb,
 	 * set CPU PLL1's frequency as minimum to compatible voltage
 	 * becarefull if the PLL1 is serving the cpu core, swith to PLL0 first
 	 */
-	if (_light_get_pllid() == LIGHT_CPU_PLL_IDX(1)) {
+	if (strcmp(__clk_get_name(clk_get_parent(clks[LIGHT_C910_CCLK].clk)),
+		__clk_get_name(clks[LIGHT_C910_CCLK_I0].clk))) {
+		pr_debug("[%s,%d]\n", __func__, __LINE__);
+		clk_prepare_enable(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk);
+		clk_set_rate(clks[LIGHT_CPU_PLL0_FOUTPOSTDIV].clk, policy->min * 1000);
+		udelay(1);
+		clk_set_parent(clks[LIGHT_C910_CCLK].clk, clks[LIGHT_C910_CCLK_I0].clk);
+
 		pr_debug("[%s,%d]\n", __func__, __LINE__);
-		_light_switch_pllid(LIGHT_CPU_PLL_IDX(0), policy->min);
 	}
 
 	pr_debug("[%s,%d]\n", __func__, __LINE__);
@@ -342,7 +292,9 @@ static int panic_cpufreq_notifier_call(struct notifier_block *nb,
 	 * set the CPU PLL1's frequency as minimum in advance, otherwise the
 	 * system may crash in crash kernel stage.
 	 */
-	_light_switch_pllid(LIGHT_CPU_PLL_IDX(1), policy->min);
+	clk_prepare_enable(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk);
+	clk_set_rate(clks[LIGHT_CPU_PLL1_FOUTPOSTDIV].clk, policy->min * 1000);
+	udelay(1);
 
 	pr_info("finish to execute cpufreq notifier callback on panic\n");
 
@@ -459,7 +411,6 @@ soc_opp_out:
 		transition_latency = CPUFREQ_ETERNAL;
 
 	max_freq = freq_table[--num].frequency;
-	min_freq = freq_table[0].frequency;
 
 	ret = cpufreq_register_driver(&light_cpufreq_driver);
 	if (ret) {

drivers/cpuidle/Kconfig

@@ -47,10 +47,6 @@ config CPU_IDLE_GOV_HALTPOLL
 config DT_IDLE_STATES
 	bool
 
-config DT_IDLE_GENPD
-	depends on PM_GENERIC_DOMAINS_OF
-	bool
-
 menu "ARM CPU Idle Drivers"
 depends on ARM || ARM64
 source "drivers/cpuidle/Kconfig.arm"

drivers/cpuidle/Kconfig.arm

@@ -27,7 +27,6 @@ config ARM_PSCI_CPUIDLE_DOMAIN
 	bool "PSCI CPU idle Domain"
 	depends on ARM_PSCI_CPUIDLE
 	depends on PM_GENERIC_DOMAINS_OF
-	select DT_IDLE_GENPD
 	default y
 	help
 	  Select this to enable the PSCI based CPUidle driver to use PM domains,

drivers/cpuidle/Kconfig.riscv

@@ -11,13 +11,3 @@ config LIGHT_CPUIDLE
 	  Select this option to enable processor idle state management
 	  through cpuidle subsystem.
 
-config RISCV_SBI_CPUIDLE
-	bool "RISC-V SBI CPU idle Driver"
-	depends on RISCV_SBI
-	select DT_IDLE_STATES
-	select CPU_IDLE_MULTIPLE_DRIVERS
-	select DT_IDLE_GENPD if PM_GENERIC_DOMAINS_OF
-	help
-	  Select this option to enable RISC-V SBI firmware based CPU idle
-	  driver for RISC-V systems. This drivers also supports hierarchical
-	  DT based layout of the idle state.

drivers/cpuidle/Makefile

@@ -6,7 +6,6 @@
 obj-y += cpuidle.o driver.o governor.o sysfs.o governors/
 obj-$(CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED) += coupled.o
 obj-$(CONFIG_DT_IDLE_STATES)		  += dt_idle_states.o
-obj-$(CONFIG_DT_IDLE_GENPD)		  += dt_idle_genpd.o
 obj-$(CONFIG_ARCH_HAS_CPU_RELAX)	  += poll_state.o
 obj-$(CONFIG_HALTPOLL_CPUIDLE)		  += cpuidle-haltpoll.o
 
@@ -35,8 +34,6 @@ obj-$(CONFIG_MIPS_CPS_CPUIDLE)		+= cpuidle-cps.o
 # POWERPC drivers
 obj-$(CONFIG_PSERIES_CPUIDLE)		+= cpuidle-pseries.o
 obj-$(CONFIG_POWERNV_CPUIDLE)		+= cpuidle-powernv.o
-
 ###############################################################################
 # RISC-V drivers
 obj-$(CONFIG_LIGHT_CPUIDLE)          += cpuidle-light.o
-obj-$(CONFIG_RISCV_SBI_CPUIDLE)		+= cpuidle-riscv-sbi.o

drivers/cpuidle/cpuidle-psci-domain.c

@@ -47,14 +47,73 @@ static int psci_pd_power_off(struct generic_pm_domain *pd)
 	return 0;
 }
 
+static int psci_pd_parse_state_nodes(struct genpd_power_state *states,
+				     int state_count)
+{
+	int i, ret;
+	u32 psci_state, *psci_state_buf;
+
+	for (i = 0; i < state_count; i++) {
+		ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode),
+					&psci_state);
+		if (ret)
+			goto free_state;
+
+		psci_state_buf = kmalloc(sizeof(u32), GFP_KERNEL);
+		if (!psci_state_buf) {
+			ret = -ENOMEM;
+			goto free_state;
+		}
+		*psci_state_buf = psci_state;
+		states[i].data = psci_state_buf;
+	}
+
+	return 0;
+
+free_state:
+	i--;
+	for (; i >= 0; i--)
+		kfree(states[i].data);
+	return ret;
+}
+
+static int psci_pd_parse_states(struct device_node *np,
+			struct genpd_power_state **states, int *state_count)
+{
+	int ret;
+
+	/* Parse the domain idle states. */
+	ret = of_genpd_parse_idle_states(np, states, state_count);
+	if (ret)
+		return ret;
+
+	/* Fill out the PSCI specifics for each found state. */
+	ret = psci_pd_parse_state_nodes(*states, *state_count);
+	if (ret)
+		kfree(*states);
+
+	return ret;
+}
+
+static void psci_pd_free_states(struct genpd_power_state *states,
+				unsigned int state_count)
+{
+	int i;
+
+	for (i = 0; i < state_count; i++)
+		kfree(states[i].data);
+	kfree(states);
+}
+
 static int psci_pd_init(struct device_node *np, bool use_osi)
 {
 	struct generic_pm_domain *pd;
 	struct psci_pd_provider *pd_provider;
 	struct dev_power_governor *pd_gov;
+	struct genpd_power_state *states = NULL;
 	int ret = -ENOMEM, state_count = 0;
 
-	pd = dt_idle_pd_alloc(np, psci_dt_parse_state_node);
+	pd = kzalloc(sizeof(*pd), GFP_KERNEL);
 	if (!pd)
 		goto out;
 
@@ -62,6 +121,22 @@ static int psci_pd_init(struct device_node *np, bool use_osi)
 	if (!pd_provider)
 		goto free_pd;
 
+	pd->name = kasprintf(GFP_KERNEL, "%pOF", np);
+	if (!pd->name)
+		goto free_pd_prov;
+
+	/*
+	 * Parse the domain idle states and let genpd manage the state selection
+	 * for those being compatible with "domain-idle-state".
+	 */
+	ret = psci_pd_parse_states(np, &states, &state_count);
+	if (ret)
+		goto free_name;
+
+	pd->free_states = psci_pd_free_states;
+	pd->name = kbasename(pd->name);
+	pd->states = states;
+	pd->state_count = state_count;
 	pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN;
 
 	/* Allow power off when OSI has been successfully enabled. */
@@ -74,8 +149,10 @@ static int psci_pd_init(struct device_node *np, bool use_osi)
 	pd_gov = state_count > 0 ? &pm_domain_cpu_gov : NULL;
 
 	ret = pm_genpd_init(pd, pd_gov, false);
-	if (ret)
-		goto free_pd_prov;
+	if (ret) {
+		psci_pd_free_states(states, state_count);
+		goto free_name;
+	}
 
 	ret = of_genpd_add_provider_simple(np, pd);
 	if (ret)
@@ -89,10 +166,12 @@ static int psci_pd_init(struct device_node *np, bool use_osi)
 
 remove_pd:
 	pm_genpd_remove(pd);
+free_name:
+	kfree(pd->name);
 free_pd_prov:
 	kfree(pd_provider);
 free_pd:
-	dt_idle_pd_free(pd);
+	kfree(pd);
 out:
 	pr_err("failed to init PM domain ret=%d %pOF\n", ret, np);
 	return ret;
@@ -116,6 +195,30 @@ static void psci_pd_remove(void)
 	}
 }
 
+static int psci_pd_init_topology(struct device_node *np)
+{
+	struct device_node *node;
+	struct of_phandle_args child, parent;
+	int ret;
+
+	for_each_child_of_node(np, node) {
+		if (of_parse_phandle_with_args(node, "power-domains",
+					"#power-domain-cells", 0, &parent))
+			continue;
+
+		child.np = node;
+		child.args_count = 0;
+		ret = of_genpd_add_subdomain(&parent, &child);
+		of_node_put(parent.np);
+		if (ret) {
+			of_node_put(node);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static bool psci_pd_try_set_osi_mode(void)
 {
 	int ret;
@@ -179,7 +282,7 @@ static int psci_cpuidle_domain_probe(struct platform_device *pdev)
 		goto no_pd;
 
 	/* Link genpd masters/subdomains to model the CPU topology. */
-	ret = dt_idle_pd_init_topology(np);
+	ret = psci_pd_init_topology(np);
 	if (ret)
 		goto remove_pd;
 
@@ -211,3 +314,28 @@ static int __init psci_idle_init_domains(void)
 	return platform_driver_register(&psci_cpuidle_domain_driver);
 }
 subsys_initcall(psci_idle_init_domains);
+
+struct device *psci_dt_attach_cpu(int cpu)
+{
+	struct device *dev;
+
+	dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci");
+	if (IS_ERR_OR_NULL(dev))
+		return dev;
+
+	pm_runtime_irq_safe(dev);
+	if (cpu_online(cpu))
+		pm_runtime_get_sync(dev);
+
+	dev_pm_syscore_device(dev, true);
+
+	return dev;
+}
+
+void psci_dt_detach_cpu(struct device *dev)
+{
+	if (IS_ERR_OR_NULL(dev))
+		return;
+
+	dev_pm_domain_detach(dev, false);
+}

drivers/cpuidle/cpuidle-psci.h

@@ -10,19 +10,8 @@ void psci_set_domain_state(u32 state);
 int psci_dt_parse_state_node(struct device_node *np, u32 *state);
 
 #ifdef CONFIG_ARM_PSCI_CPUIDLE_DOMAIN
-
-#include "dt_idle_genpd.h"
-
-static inline struct device *psci_dt_attach_cpu(int cpu)
-{
-	return dt_idle_attach_cpu(cpu, "psci");
-}
-
-static inline void psci_dt_detach_cpu(struct device *dev)
-{
-	dt_idle_detach_cpu(dev);
-}
-
+struct device *psci_dt_attach_cpu(int cpu);
+void psci_dt_detach_cpu(struct device *dev);
 #else
 static inline struct device *psci_dt_attach_cpu(int cpu) { return NULL; }
 static inline void psci_dt_detach_cpu(struct device *dev) { }

drivers/cpuidle/cpuidle-riscv-sbi.c

@@ -1,639 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * RISC-V SBI CPU idle driver.
- *
- * Copyright (c) 2021 Western Digital Corporation or its affiliates.
- * Copyright (c) 2022 Ventana Micro Systems Inc.
- */
-
-#define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
-
-#include <linux/cpuidle.h>
-#include <linux/cpumask.h>
-#include <linux/cpu_pm.h>
-#include <linux/cpu_cooling.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/slab.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/pm_runtime.h>
-#include <asm/cpuidle.h>
-#include <asm/sbi.h>
-#include <asm/suspend.h>
-
-#include "dt_idle_states.h"
-#include "dt_idle_genpd.h"
-
-struct sbi_cpuidle_data {
-	u32 *states;
-	struct device *dev;
-};
-
-struct sbi_domain_state {
-	bool available;
-	u32 state;
-};
-
-static DEFINE_PER_CPU_READ_MOSTLY(struct sbi_cpuidle_data, sbi_cpuidle_data);
-static DEFINE_PER_CPU(struct sbi_domain_state, domain_state);
-static bool sbi_cpuidle_use_osi;
-static bool sbi_cpuidle_use_cpuhp;
-static bool sbi_cpuidle_pd_allow_domain_state;
-
-extern void arch_cpu_idle(void);
-
-static inline void sbi_set_domain_state(u32 state)
-{
-	struct sbi_domain_state *data = this_cpu_ptr(&domain_state);
-
-	data->available = true;
-	data->state = state;
-}
-
-static inline u32 sbi_get_domain_state(void)
-{
-	struct sbi_domain_state *data = this_cpu_ptr(&domain_state);
-
-	return data->state;
-}
-
-static inline void sbi_clear_domain_state(void)
-{
-	struct sbi_domain_state *data = this_cpu_ptr(&domain_state);
-
-	data->available = false;
-}
-
-static inline bool sbi_is_domain_state_available(void)
-{
-	struct sbi_domain_state *data = this_cpu_ptr(&domain_state);
-
-	return data->available;
-}
-
-/* Actual code that puts the SoC in different idle states */
-static int light_enter_idle(struct cpuidle_device *dev,
-			struct cpuidle_driver *drv,
-			       int index)
-{
-	arch_cpu_idle();
-	return index;
-}
-
-static int sbi_suspend_finisher(unsigned long suspend_type,
-				unsigned long resume_addr,
-				unsigned long opaque)
-{
-	struct sbiret ret;
-
-	ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND,
-			suspend_type, resume_addr, opaque, 0, 0, 0);
-
-	return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0;
-}
-
-static int sbi_suspend(u32 state)
-{
-	if (state & SBI_HSM_SUSP_NON_RET_BIT)
-		return cpu_suspend(state, sbi_suspend_finisher);
-	else
-		return sbi_suspend_finisher(state, 0, 0);
-}
-
-static int sbi_cpuidle_enter_state(struct cpuidle_device *dev,
-				   struct cpuidle_driver *drv, int idx)
-{
-	u32 *states = __this_cpu_read(sbi_cpuidle_data.states);
-
-	return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, idx, states[idx]);
-}
-
-static int __sbi_enter_domain_idle_state(struct cpuidle_device *dev,
-					  struct cpuidle_driver *drv, int idx,
-					  bool s2idle)
-{
-	struct sbi_cpuidle_data *data = this_cpu_ptr(&sbi_cpuidle_data);
-	u32 *states = data->states;
-	struct device *pd_dev = data->dev;
-	u32 state;
-	int ret;
-
-	ret = cpu_pm_enter();
-	if (ret)
-		return -1;
-
-	/* Do runtime PM to manage a hierarchical CPU toplogy. */
-	rcu_irq_enter_irqson();
-	if (s2idle)
-		dev_pm_genpd_suspend(pd_dev);
-	else
-		pm_runtime_put_sync_suspend(pd_dev);
-	rcu_irq_exit_irqson();
-
-	if (sbi_is_domain_state_available())
-		state = sbi_get_domain_state();
-	else
-		state = states[idx];
-
-	ret = sbi_suspend(state) ? -1 : idx;
-
-	rcu_irq_enter_irqson();
-	if (s2idle)
-		dev_pm_genpd_resume(pd_dev);
-	else
-		pm_runtime_get_sync(pd_dev);
-	rcu_irq_exit_irqson();
-
-	cpu_pm_exit();
-
-	/* Clear the domain state to start fresh when back from idle. */
-	sbi_clear_domain_state();
-	return ret;
-}
-
-static int sbi_enter_domain_idle_state(struct cpuidle_device *dev,
-				       struct cpuidle_driver *drv, int idx)
-{
-	return __sbi_enter_domain_idle_state(dev, drv, idx, false);
-}
-
-static int sbi_enter_s2idle_domain_idle_state(struct cpuidle_device *dev,
-					      struct cpuidle_driver *drv,
-					      int idx)
-{
-	return __sbi_enter_domain_idle_state(dev, drv, idx, true);
-}
-
-static int sbi_cpuidle_cpuhp_up(unsigned int cpu)
-{
-	struct device *pd_dev = __this_cpu_read(sbi_cpuidle_data.dev);
-
-	if (pd_dev)
-		pm_runtime_get_sync(pd_dev);
-
-	return 0;
-}
-
-static int sbi_cpuidle_cpuhp_down(unsigned int cpu)
-{
-	struct device *pd_dev = __this_cpu_read(sbi_cpuidle_data.dev);
-
-	if (pd_dev) {
-		pm_runtime_put_sync(pd_dev);
-		/* Clear domain state to start fresh at next online. */
-		sbi_clear_domain_state();
-	}
-
-	return 0;
-}
-
-static void sbi_idle_init_cpuhp(void)
-{
-	int err;
-
-	if (!sbi_cpuidle_use_cpuhp)
-		return;
-
-	err = cpuhp_setup_state_nocalls(CPUHP_AP_CPU_PM_STARTING,
-					"cpuidle/sbi:online",
-					sbi_cpuidle_cpuhp_up,
-					sbi_cpuidle_cpuhp_down);
-	if (err)
-		pr_warn("Failed %d while setup cpuhp state\n", err);
-}
-
-static const struct of_device_id sbi_cpuidle_state_match[] = {
-	{ .compatible = "riscv,idle-state",
-	  .data = sbi_cpuidle_enter_state },
-	{ },
-};
-
-static bool sbi_suspend_state_is_valid(u32 state)
-{
-	if (state > SBI_HSM_SUSPEND_RET_DEFAULT &&
-	    state < SBI_HSM_SUSPEND_RET_PLATFORM)
-		return false;
-	if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT &&
-	    state < SBI_HSM_SUSPEND_NON_RET_PLATFORM)
-		return false;
-	return true;
-}
-
-static int sbi_dt_parse_state_node(struct device_node *np, u32 *state)
-{
-	int err = of_property_read_u32(np, "riscv,sbi-suspend-param", state);
-
-	if (err) {
-		pr_warn("%pOF missing riscv,sbi-suspend-param property\n", np);
-		return err;
-	}
-
-	if (!sbi_suspend_state_is_valid(*state)) {
-		pr_warn("Invalid SBI suspend state %#x\n", *state);
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int sbi_dt_cpu_init_topology(struct cpuidle_driver *drv,
-				     struct sbi_cpuidle_data *data,
-				     unsigned int state_count, int cpu)
-{
-	/* Currently limit the hierarchical topology to be used in OSI mode. */
-	if (!sbi_cpuidle_use_osi)
-		return 0;
-
-	data->dev = dt_idle_attach_cpu(cpu, "sbi");
-	if (IS_ERR_OR_NULL(data->dev))
-		return PTR_ERR_OR_ZERO(data->dev);
-
-	/*
-	 * Using the deepest state for the CPU to trigger a potential selection
-	 * of a shared state for the domain, assumes the domain states are all
-	 * deeper states.
-	 */
-	drv->states[state_count - 1].enter = sbi_enter_domain_idle_state;
-	drv->states[state_count - 1].enter_s2idle =
-					sbi_enter_s2idle_domain_idle_state;
-	sbi_cpuidle_use_cpuhp = true;
-
-	return 0;
-}
-
-static int sbi_cpuidle_dt_init_states(struct device *dev,
-					struct cpuidle_driver *drv,
-					unsigned int cpu,
-					unsigned int state_count)
-{
-	struct sbi_cpuidle_data *data = per_cpu_ptr(&sbi_cpuidle_data, cpu);
-	struct device_node *state_node;
-	struct device_node *cpu_node;
-	u32 *states;
-	int i, ret;
-
-	cpu_node = of_cpu_device_node_get(cpu);
-	if (!cpu_node)
-		return -ENODEV;
-
-	states = devm_kcalloc(dev, state_count, sizeof(*states), GFP_KERNEL);
-	if (!states) {
-		ret = -ENOMEM;
-		goto fail;
-	}
-
-	/* Parse SBI specific details from state DT nodes */
-	for (i = 1; i < state_count; i++) {
-		state_node = of_get_cpu_state_node(cpu_node, i - 1);
-		if (!state_node)
-			break;
-
-		ret = sbi_dt_parse_state_node(state_node, &states[i]);
-		of_node_put(state_node);
-
-		if (ret)
-			return ret;
-
-		pr_debug("sbi-state %#x index %d\n", states[i], i);
-	}
-	if (i != state_count) {
-		ret = -ENODEV;
-		goto fail;
-	}
-
-	/* Initialize optional data, used for the hierarchical topology. */
-	ret = sbi_dt_cpu_init_topology(drv, data, state_count, cpu);
-	if (ret < 0)
-		return ret;
-
-	/* Store states in the per-cpu struct. */
-	data->states = states;
-
-fail:
-	of_node_put(cpu_node);
-
-	return ret;
-}
-
-static void sbi_cpuidle_deinit_cpu(int cpu)
-{
-	struct sbi_cpuidle_data *data = per_cpu_ptr(&sbi_cpuidle_data, cpu);
-
-	dt_idle_detach_cpu(data->dev);
-	sbi_cpuidle_use_cpuhp = false;
-}
-
-static int sbi_cpuidle_init_cpu(struct device *dev, int cpu)
-{
-	struct cpuidle_driver *drv;
-	unsigned int state_count = 0;
-	int ret = 0;
-
-	drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL);
-	if (!drv)
-		return -ENOMEM;
-
-	drv->name = "sbi_cpuidle";
-	drv->owner = THIS_MODULE;
-	drv->cpumask = (struct cpumask *)cpumask_of(cpu);
-
-	/* RISC-V architectural WFI to be represented as state index 0. */
-	drv->states[0].enter = sbi_cpuidle_enter_state;
-	drv->states[0].exit_latency = 1;
-	drv->states[0].target_residency = 1;
-	drv->states[0].power_usage = UINT_MAX;
-	strcpy(drv->states[0].name, "WFI");
-	strcpy(drv->states[0].desc, "RISC-V WFI");
-
-	/*
-	 * If no DT idle states are detected (ret == 0) let the driver
-	 * initialization fail accordingly since there is no reason to
-	 * initialize the idle driver if only wfi is supported, the
-	 * default archictectural back-end already executes wfi
-	 * on idle entry.
-	 */
-	ret = dt_init_idle_driver(drv, sbi_cpuidle_state_match, 1);
-	if (ret <= 0) {
-		pr_debug("HART%ld: failed to parse DT idle states\n",
-			 cpuid_to_hartid_map(cpu));
-		return ret ? : -ENODEV;
-	}
-	state_count = ret + 1; /* Include WFI state as well */
-
-	/* Initialize idle states from DT. */
-	ret = sbi_cpuidle_dt_init_states(dev, drv, cpu, state_count);
-	if (ret) {
-		pr_err("HART%ld: failed to init idle states\n",
-		       cpuid_to_hartid_map(cpu));
-		return ret;
-	}
-
-	ret = cpuidle_register(drv, NULL);
-	if (ret)
-		goto deinit;
-
-	cpuidle_cooling_register(drv);
-
-	return 0;
-deinit:
-	sbi_cpuidle_deinit_cpu(cpu);
-	return ret;
-}
-
-static void sbi_cpuidle_domain_sync_state(struct device *dev)
-{
-	/*
-	 * All devices have now been attached/probed to the PM domain
-	 * topology, hence it's fine to allow domain states to be picked.
-	 */
-	sbi_cpuidle_pd_allow_domain_state = true;
-}
-
-#ifdef CONFIG_DT_IDLE_GENPD
-
-static int sbi_cpuidle_pd_power_off(struct generic_pm_domain *pd)
-{
-	struct genpd_power_state *state = &pd->states[pd->state_idx];
-	u32 *pd_state;
-
-	if (!state->data)
-		return 0;
-
-	if (!sbi_cpuidle_pd_allow_domain_state)
-		return -EBUSY;
-
-	/* OSI mode is enabled, set the corresponding domain state. */
-	pd_state = state->data;
-	sbi_set_domain_state(*pd_state);
-
-	return 0;
-}
-
-struct sbi_pd_provider {
-	struct list_head link;
-	struct device_node *node;
-};
-
-static LIST_HEAD(sbi_pd_providers);
-
-static int sbi_pd_init(struct device_node *np)
-{
-	struct generic_pm_domain *pd;
-	struct sbi_pd_provider *pd_provider;
-	struct dev_power_governor *pd_gov;
-	int ret = -ENOMEM, state_count = 0;
-
-	pd = dt_idle_pd_alloc(np, sbi_dt_parse_state_node);
-	if (!pd)
-		goto out;
-
-	pd_provider = kzalloc(sizeof(*pd_provider), GFP_KERNEL);
-	if (!pd_provider)
-		goto free_pd;
-
-	pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN;
-
-	/* Allow power off when OSI is available. */
-	if (sbi_cpuidle_use_osi)
-		pd->power_off = sbi_cpuidle_pd_power_off;
-	else
-		pd->flags |= GENPD_FLAG_ALWAYS_ON;
-
-	/* Use governor for CPU PM domains if it has some states to manage. */
-	pd_gov = state_count > 0 ? &pm_domain_cpu_gov : NULL;
-
-	ret = pm_genpd_init(pd, pd_gov, false);
-	if (ret)
-		goto free_pd_prov;
-
-	ret = of_genpd_add_provider_simple(np, pd);
-	if (ret)
-		goto remove_pd;
-
-	pd_provider->node = of_node_get(np);
-	list_add(&pd_provider->link, &sbi_pd_providers);
-
-	pr_debug("init PM domain %s\n", pd->name);
-	return 0;
-
-remove_pd:
-	pm_genpd_remove(pd);
-free_pd_prov:
-	kfree(pd_provider);
-free_pd:
-	dt_idle_pd_free(pd);
-out:
-	pr_err("failed to init PM domain ret=%d %pOF\n", ret, np);
-	return ret;
-}
-
-static void sbi_pd_remove(void)
-{
-	struct sbi_pd_provider *pd_provider, *it;
-	struct generic_pm_domain *genpd;
-
-	list_for_each_entry_safe(pd_provider, it, &sbi_pd_providers, link) {
-		of_genpd_del_provider(pd_provider->node);
-
-		genpd = of_genpd_remove_last(pd_provider->node);
-		if (!IS_ERR(genpd))
-			kfree(genpd);
-
-		of_node_put(pd_provider->node);
-		list_del(&pd_provider->link);
-		kfree(pd_provider);
-	}
-}
-
-static int sbi_genpd_probe(struct device_node *np)
-{
-	struct device_node *node;
-	int ret = 0, pd_count = 0;
-
-	if (!np)
-		return -ENODEV;
-
-	/*
-	 * Parse child nodes for the "#power-domain-cells" property and
-	 * initialize a genpd/genpd-of-provider pair when it's found.
-	 */
-	for_each_child_of_node(np, node) {
-		if (!of_find_property(node, "#power-domain-cells", NULL))
-			continue;
-
-		ret = sbi_pd_init(node);
-		if (ret)
-			goto put_node;
-
-		pd_count++;
-	}
-
-	/* Bail out if not using the hierarchical CPU topology. */
-	if (!pd_count)
-		goto no_pd;
-
-	/* Link genpd masters/subdomains to model the CPU topology. */
-	ret = dt_idle_pd_init_topology(np);
-	if (ret)
-		goto remove_pd;
-
-	return 0;
-
-put_node:
-	of_node_put(node);
-remove_pd:
-	sbi_pd_remove();
-	pr_err("failed to create CPU PM domains ret=%d\n", ret);
-no_pd:
-	return ret;
-}
-
-#else
-
-static inline int sbi_genpd_probe(struct device_node *np)
-{
-	return 0;
-}
-
-#endif
-
-static int sbi_cpuidle_probe(struct platform_device *pdev)
-{
-	int cpu, ret;
-	struct cpuidle_driver *drv;
-	struct cpuidle_device *dev;
-	struct device_node *np, *pds_node;
-
-	/* Detect OSI support based on CPU DT nodes */
-	sbi_cpuidle_use_osi = true;
-	for_each_possible_cpu(cpu) {
-		np = of_cpu_device_node_get(cpu);
-		if (np &&
-		    of_find_property(np, "power-domains", NULL) &&
-		    of_find_property(np, "power-domain-names", NULL)) {
-			continue;
-		} else {
-			sbi_cpuidle_use_osi = false;
-			break;
-		}
-	}
-
-	/* Populate generic power domains from DT nodes */
-	pds_node = of_find_node_by_path("/cpus/power-domains");
-	if (pds_node) {
-		ret = sbi_genpd_probe(pds_node);
-		of_node_put(pds_node);
-		if (ret)
-			return ret;
-	}
-
-	/* Initialize CPU idle driver for each CPU */
-	for_each_possible_cpu(cpu) {
-		ret = sbi_cpuidle_init_cpu(&pdev->dev, cpu);
-		if (ret) {
-			pr_debug("HART%ld: idle driver init failed\n",
-				 cpuid_to_hartid_map(cpu));
-			goto out_fail;
-		}
-	}
-
-	/* Setup CPU hotplut notifiers */
-	sbi_idle_init_cpuhp();
-
-	pr_info("idle driver registered for all CPUs\n");
-
-	return 0;
-
-out_fail:
-	while (--cpu >= 0) {
-		dev = per_cpu(cpuidle_devices, cpu);
-		drv = cpuidle_get_cpu_driver(dev);
-		cpuidle_unregister(drv);
-		sbi_cpuidle_deinit_cpu(cpu);
-	}
-
-	return ret;
-}
-
-static struct platform_driver sbi_cpuidle_driver = {
-	.probe = sbi_cpuidle_probe,
-	.driver = {
-		.name = "sbi-cpuidle",
-		.sync_state = sbi_cpuidle_domain_sync_state,
-	},
-};
-
-static int __init sbi_cpuidle_init(void)
-{
-	int ret;
-	struct platform_device *pdev;
-
-#if 0
-	/*
-	 * The SBI HSM suspend function is only available when:
-	 * 1) SBI version is 0.3 or higher
-	 * 2) SBI HSM extension is available
-	 */
-	if ((sbi_spec_version < sbi_mk_version(0, 3)) ||
-	    sbi_probe_extension(SBI_EXT_HSM) <= 0) {
-		pr_info("HSM suspend not available\n");
-		return 0;
-	}
-#endif
-	ret = platform_driver_register(&sbi_cpuidle_driver);
-	if (ret)
-		return ret;
-
-	pdev = platform_device_register_simple("sbi-cpuidle",
-						-1, NULL, 0);
-	if (IS_ERR(pdev)) {
-		platform_driver_unregister(&sbi_cpuidle_driver);
-		return PTR_ERR(pdev);
-	}
-
-	return 0;
-}
-device_initcall(sbi_cpuidle_init);

drivers/cpuidle/dt_idle_genpd.c

@@ -1,178 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * PM domains for CPUs via genpd.
- *
- * Copyright (C) 2019 Linaro Ltd.
- * Author: Ulf Hansson <ulf.hansson@linaro.org>
- *
- * Copyright (c) 2021 Western Digital Corporation or its affiliates.
- * Copyright (c) 2022 Ventana Micro Systems Inc.
- */
-
-#define pr_fmt(fmt) "dt-idle-genpd: " fmt
-
-#include <linux/cpu.h>
-#include <linux/device.h>
-#include <linux/kernel.h>
-#include <linux/pm_domain.h>
-#include <linux/pm_runtime.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-
-#include "dt_idle_genpd.h"
-
-static int pd_parse_state_nodes(
-			int (*parse_state)(struct device_node *, u32 *),
-			struct genpd_power_state *states, int state_count)
-{
-	int i, ret;
-	u32 state, *state_buf;
-
-	for (i = 0; i < state_count; i++) {
-		ret = parse_state(to_of_node(states[i].fwnode), &state);
-		if (ret)
-			goto free_state;
-
-		state_buf = kmalloc(sizeof(u32), GFP_KERNEL);
-		if (!state_buf) {
-			ret = -ENOMEM;
-			goto free_state;
-		}
-		*state_buf = state;
-		states[i].data = state_buf;
-	}
-
-	return 0;
-
-free_state:
-	i--;
-	for (; i >= 0; i--)
-		kfree(states[i].data);
-	return ret;
-}
-
-static int pd_parse_states(struct device_node *np,
-			   int (*parse_state)(struct device_node *, u32 *),
-			   struct genpd_power_state **states,
-			   int *state_count)
-{
-	int ret;
-
-	/* Parse the domain idle states. */
-	ret = of_genpd_parse_idle_states(np, states, state_count);
-	if (ret)
-		return ret;
-
-	/* Fill out the dt specifics for each found state. */
-	ret = pd_parse_state_nodes(parse_state, *states, *state_count);
-	if (ret)
-		kfree(*states);
-
-	return ret;
-}
-
-static void pd_free_states(struct genpd_power_state *states,
-			    unsigned int state_count)
-{
-	int i;
-
-	for (i = 0; i < state_count; i++)
-		kfree(states[i].data);
-	kfree(states);
-}
-
-void dt_idle_pd_free(struct generic_pm_domain *pd)
-{
-	pd_free_states(pd->states, pd->state_count);
-	kfree(pd->name);
-	kfree(pd);
-}
-
-struct generic_pm_domain *dt_idle_pd_alloc(struct device_node *np,
-			int (*parse_state)(struct device_node *, u32 *))
-{
-	struct generic_pm_domain *pd;
-	struct genpd_power_state *states = NULL;
-	int ret, state_count = 0;
-
-	pd = kzalloc(sizeof(*pd), GFP_KERNEL);
-	if (!pd)
-		goto out;
-
-	pd->name = kasprintf(GFP_KERNEL, "%pOF", np);
-	if (!pd->name)
-		goto free_pd;
-
-	/*
-	 * Parse the domain idle states and let genpd manage the state selection
-	 * for those being compatible with "domain-idle-state".
-	 */
-	ret = pd_parse_states(np, parse_state, &states, &state_count);
-	if (ret)
-		goto free_name;
-
-	pd->free_states = pd_free_states;
-	pd->name = kbasename(pd->name);
-	pd->states = states;
-	pd->state_count = state_count;
-
-	pr_debug("alloc PM domain %s\n", pd->name);
-	return pd;
-
-free_name:
-	kfree(pd->name);
-free_pd:
-	kfree(pd);
-out:
-	pr_err("failed to alloc PM domain %pOF\n", np);
-	return NULL;
-}
-
-int dt_idle_pd_init_topology(struct device_node *np)
-{
-	struct device_node *node;
-	struct of_phandle_args child, parent;
-	int ret;
-
-	for_each_child_of_node(np, node) {
-		if (of_parse_phandle_with_args(node, "power-domains",
-					"#power-domain-cells", 0, &parent))
-			continue;
-
-		child.np = node;
-		child.args_count = 0;
-		ret = of_genpd_add_subdomain(&parent, &child);
-		of_node_put(parent.np);
-		if (ret) {
-			of_node_put(node);
-			return ret;
-		}
-	}
-
-	return 0;
-}
-
-struct device *dt_idle_attach_cpu(int cpu, const char *name)
-{
-	struct device *dev;
-
-	dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), name);
-	if (IS_ERR_OR_NULL(dev))
-		return dev;
-
-	pm_runtime_irq_safe(dev);
-	if (cpu_online(cpu))
-		pm_runtime_get_sync(dev);
-
-	dev_pm_syscore_device(dev, true);
-
-	return dev;
-}
-
-void dt_idle_detach_cpu(struct device *dev)
-{
-	if (IS_ERR_OR_NULL(dev))
-		return;
-
-	dev_pm_domain_detach(dev, false);
-}

drivers/cpuidle/dt_idle_genpd.h

@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_IDLE_GENPD
-#define __DT_IDLE_GENPD
-
-struct device_node;
-struct generic_pm_domain;
-
-#ifdef CONFIG_DT_IDLE_GENPD
-
-void dt_idle_pd_free(struct generic_pm_domain *pd);
-
-struct generic_pm_domain *dt_idle_pd_alloc(struct device_node *np,
-			int (*parse_state)(struct device_node *, u32 *));
-
-int dt_idle_pd_init_topology(struct device_node *np);
-
-struct device *dt_idle_attach_cpu(int cpu, const char *name);
-
-void dt_idle_detach_cpu(struct device *dev);
-
-#else
-
-static inline void dt_idle_pd_free(struct generic_pm_domain *pd)
-{
-}
-
-static inline struct generic_pm_domain *dt_idle_pd_alloc(
-			struct device_node *np,
-			int (*parse_state)(struct device_node *, u32 *))
-{
-	return NULL;
-}
-
-static inline int dt_idle_pd_init_topology(struct device_node *np)
-{
-	return 0;
-}
-
-static inline struct device *dt_idle_attach_cpu(int cpu, const char *name)
-{
-	return NULL;
-}
-
-static inline void dt_idle_detach_cpu(struct device *dev)
-{
-}
-
-#endif
-
-#endif