feat: enable BT_RTKBT as module

Signed-off-by: Han Gao/Revy/Rabenda <gaohan@iscas.ac.cn>

.github/workflows/kernel.yml

@@ -0,0 +1,97 @@
+name: revyos-kernel-build
+
+on:
+  push:
+  pull_request:
+  workflow_dispatch:
+  schedule:
+    - cron: "0 2 * * *"
+
+env:
+  xuantie_toolchain: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395627867
+  toolchain_file_name: Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1-20240115.tar.gz
+  mainline_toolchain: https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2024.03.01
+  mainline_toolchain_file_name: riscv64-glibc-ubuntu-22.04-gcc-nightly-2024.03.01-nightly.tar.gz
+  wget_alias: 'wget --retry-connrefused --waitretry=1 --read-timeout=20 --timeout=15 -t 0'
+  ARCH: riscv
+  board: th1520
+  KBUILD_BUILD_USER: builder
+  KBUILD_BUILD_HOST: revyos-riscv-builder
+  KDEB_COMPRESS: none
+  KDEB_CHANGELOG_DIST: unstable
+
+jobs:
+  kernel:
+    strategy:
+      fail-fast: false
+      matrix:
+        include:
+          - name: gcc-13
+            cross: riscv64-unknown-linux-gnu-
+            machine: ubuntu-22.04
+            run_image: ghcr.io/revyos/revyos-kernel-builder:amd64-2024.04.02
+          - name: thead-gcc
+            cross: riscv64-unknown-linux-gnu-
+            machine: ubuntu-22.04
+            run_image: ghcr.io/revyos/revyos-kernel-builder:amd64-2024.04.02
+          - name: native
+            cross: riscv64-linux-gnu-
+            machine: [ self-hosted, Linux, riscv64 ]
+            run_image: ghcr.io/revyos/revyos-kernel-builder:riscv64-2024.04.02
+
+    runs-on: ${{ matrix.machine }}
+    container:
+      image: ${{ matrix.run_image }}
+    env:
+      CROSS_COMPILE: ${{ matrix.cross }}
+
+    steps:
+      - name: Checkout kernel
+        uses: actions/checkout@v4
+        with:
+            path: 'kernel'
+
+      - name: Compile Kernel && Install
+        run: |
+              mkdir -p rootfs
+              if [[ ${{ matrix.name }} = "thead-gcc" ]]; then
+                ${wget_alias} ${xuantie_toolchain}/${toolchain_file_name}
+                tar -xvf ${toolchain_file_name} -C /opt
+                export PATH="/opt/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1/bin:$PATH"
+              elif [[ ${{ matrix.name }} = "gcc-13" ]]; then
+                ${wget_alias} ${mainline_toolchain}/${mainline_toolchain_file_name}
+                tar -xvf ${mainline_toolchain_file_name} -C /opt
+                export PATH="/opt/riscv/bin:$PATH"
+              else
+                echo "No download toolchain."
+              fi
+              ${CROSS_COMPILE}gcc -v
+
+              pushd kernel
+                make revyos_defconfig
+                export KDEB_PKGVERSION="$(make kernelversion)-$(date "+%Y.%m.%d.%H.%M")+$(git rev-parse --short HEAD)"
+                sed -i '/CONFIG_LOCALVERSION_AUTO/d' .config && echo "CONFIG_LOCALVERSION_AUTO=n" >> .config
+                cat .config | grep "CONFIG_THEAD_ISA"
+                if [ `uname -m` = "riscv64" ]; then
+                  # FIXME: force use 32 thread
+                  make -j32 bindeb-pkg LOCALVERSION="-${board}"
+                else
+                  make -j$(nproc) bindeb-pkg LOCALVERSION="-${board}"
+                fi
+                
+                # Copy deb
+                dcmd cp -v ../*.changes ${GITHUB_WORKSPACE}/rootfs/
+
+                # record commit-id
+                git rev-parse HEAD > kernel-commitid
+                cp -v kernel-commitid ${GITHUB_WORKSPACE}/rootfs/
+
+                ls -al ${GITHUB_WORKSPACE}/rootfs/
+              popd
+
+      - name: 'Upload Artifact'
+        uses: actions/upload-artifact@v4
+        with:
+          name: thead-kernel-${{ matrix.name }}
+          path: rootfs/*
+          retention-days: 30

.gitignore

@@ -18,6 +18,7 @@
 *.c.[012]*.*
 *.dt.yaml
 *.dtb
+*.dtbo
 *.dtb.S
 *.dwo
 *.elf

Makefile

@@ -480,6 +480,8 @@ LZ4		= lz4
 XZ		= xz
 ZSTD		= zstd
 
+PAHOLE_FLAGS	= $(shell PAHOLE=$(PAHOLE) $(srctree)/scripts/pahole-flags.sh)
+
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
 		  -Wbitwise -Wno-return-void -Wno-unknown-attribute $(CF)
 NOSTDINC_FLAGS :=
@@ -534,6 +536,7 @@ export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE
 export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE
 export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE
 export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
+export PAHOLE_FLAGS
 
 # Files to ignore in find ... statements
 

arch/riscv/Kconfig

@@ -18,6 +18,7 @@ config RISCV
 	select ARCH_HAS_DEBUG_VM_PGTABLE
 	select ARCH_HAS_DEBUG_VIRTUAL if MMU
 	select ARCH_HAS_DEBUG_WX
+	select ARCH_HAS_FAST_MULTIPLIER
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_GIGANTIC_PAGE
 	select ARCH_HAS_KCOV
@@ -34,6 +35,7 @@ config RISCV
 	select ARCH_KEEP_MEMBLOCK
 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
+	select ARCH_USE_CMPXCHG_LOCKREF
 	select ARCH_USE_QUEUED_SPINLOCKS
 	select ARCH_USE_QUEUED_RWLOCKS
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
@@ -393,45 +395,19 @@ config FPU
 	  If you don't know what to do here, say Y.
 
 config VECTOR
-	bool "VECTOR support"
-	default n
-
-choice VECTOR_VERSION
-	prompt "Vector Version"
-	depends on VECTOR
-	default VECTOR_1_0
-
-config VECTOR_1_0
-	bool "VECTOR 1.0 support"
-	help
-	  Say N here if you want to disable all vector 1.0 related procedure
-	  in the kernel.
-
-	  If you don't know what to do here, say Y.
-
-config VECTOR_0_7
 	bool "VECTOR 0.7 support"
+	default y
 	help
 	  Say N here if you want to disable all vector 0.7 related procedure
 	  in the kernel.
 
 	  If you don't know what to do here, say Y.
 
-endchoice
-
-config VLEN_256
-	bool "VECTOR VLEN 256"
-	depends on VECTOR
-	default n
-
-config VECTOR_EMU
-	bool "VECTOR e64 emulate for c906 v1"
-	depends on VECTOR
-	default n
-
 config THEAD_ISA
 	bool "T-HEAD extension ISA in AFLAGS with -march=_xtheadc"
-	default n
+	default y
+	help
+	  Say N here if you want to disable xtheadc in the kernel.
 
 endmenu
 

arch/riscv/Makefile

@@ -48,25 +48,25 @@ endif
 endif
 
 # ISA string setting
+riscv-march-$(CONFIG_ARCH_RV32I)	:= rv32ima
+riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
+riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
+riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
+
+# Fix mainline build
+toolchain-have-v0p7 := $(call cc-option-yn, -march=$(riscv-march-y)v0p7)
+riscv-march-$(toolchain-have-v0p7) := $(riscv-march-y)v0p7
+
+toolchain-have-xtheadc := $(call cc-option-yn, -march=$(riscv-march-y)_xtheadc)
+riscv-march-$(toolchain-have-xtheadc) := $(riscv-march-y)_xtheadc
+
 # Newer binutils versions default to ISA spec version 20191213 which moves some
 # instructions from the I extension to the Zicsr and Zifencei extensions.
 toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
 riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
 
-riscv-march-cflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-cflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-cflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-cflags-y)c
-
-riscv-march-aflags-$(CONFIG_ARCH_RV32I)		:= rv32ima
-riscv-march-aflags-$(CONFIG_ARCH_RV64I)		:= rv64ima
-riscv-march-aflags-$(CONFIG_FPU)		:= $(riscv-march-aflags-y)fd
-riscv-march-aflags-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-aflags-y)c
-riscv-march-aflags-$(CONFIG_VECTOR_1_0)		:= $(riscv-march-aflags-y)v
-riscv-march-aflags-$(CONFIG_VECTOR_0_7)		:= $(riscv-march-aflags-y)v0p7
-riscv-march-aflags-$(CONFIG_THEAD_ISA)		:= $(riscv-march-aflags-y)_xtheadc
-
-KBUILD_CFLAGS += -march=$(riscv-march-cflags-y) -Wa,-march=$(riscv-march-aflags-y)
-KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
+KBUILD_CFLAGS += -march=$(subst _xtheadc,,$(subst v0p7,,$(subst fd,,$(riscv-march-y))))
+KBUILD_AFLAGS += -march=$(riscv-march-y)
 
 KBUILD_CFLAGS += -mno-save-restore
 KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
@@ -124,7 +124,7 @@ endif
 ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_KENDRYTE),yy)
 KBUILD_IMAGE := $(boot)/loader.bin
 else
-KBUILD_IMAGE := $(boot)/Image.gz
+KBUILD_IMAGE := $(boot)/Image
 endif
 BOOT_TARGETS := Image Image.gz loader loader.bin
 

arch/riscv/boot/dts/Makefile

@@ -1,4 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
 subdir-y += sifive
 subdir-y += kendryte
 subdir-y += thead

arch/riscv/boot/dts/thead/Makefile

@@ -1,4 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
 dtb-$(CONFIG_SOC_THEAD_ICE) += ice.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_MPW) += th1520_mpw.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu.dtb
@@ -10,25 +15,26 @@ dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_EMU) += th1520-fm-emu-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val.dtb th1520-a-val-sec.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-crash.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-i2s-8ch.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-tdm.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-audio-spdif.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-a-val-dsi0-dsi1.dtb
-dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-audio.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-sv.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-ddr2G.dtb th1520-a-val-ddr1G.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-npu-fce.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-iso7816.dtb
+dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-nand.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-dsi0.dtb th1520-a-val-dsi1.dtb th1520-a-val-hdmi.dtb th1520-a-val-dsi0-hdmi-audio.dtb th1520-a-val-dpi0.dtb th1520-a-val-dpi0-dpi1.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-wcn.dtb
+dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-gpio-keys.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-khv.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-miniapp-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_PRD) += th1520-a-product.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-val-full.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-a-ref.dtb th1520-a-ref-dsi0.dtb th1520-a-ref-dsi0-hdmi.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-b-product.dtb th1520-b-product-sec.dtb
-dtb-$(CONFIG_SOC_THEAD) += th1520-b-dsi.dtb
 dtb-$(CONFIG_SOC_THEAD) += th1520-b-product-crash.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-b-product-ddr1G.dtb
 dtb-$(CONFIG_SOC_THEAD_TH1520_DEV) += th1520-b-product-miniapp-hdmi.dtb
@@ -48,3 +54,26 @@ dtb-$(CONFIG_SOC_THEAD_TH1520_ANDROID) += th1520-a-val-android.dtb
 dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu.dtb fire-emu-crash.dtb
 dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu-soc-base.dtb fire-emu-soc-c910x4.dtb fire-emu-gpu-dpu-dsi0.dtb fire-emu-vi-dsp-vo.dtb fire-emu-vi-vp-vo.dtb
 dtb-$(CONFIG_SOC_THEAD_FIRE) += fire-emu-soc-base-sec.dtb
+
+dtb-$(CONFIG_SOC_THEAD) += th1520-beagle.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-16gb.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-laptop.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-console.dtb th1520-lpi4a-console-16g.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-cluster.dtb th1520-lpi4a-cluster-16gb.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lpi4a-z14inch-m0.dtb th1520-lpi4a-z14inch-m0-16g.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-milkv-meles.dtb th1520-milkv-meles-4g.dtb th1520-milkv-meles-dsi0.dtb
+
+# compat old name
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a.dtb light-lpi4a-16gb.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-lpi4a-console.dtb light-lpi4a-console-16g.dtb
+dtb-$(CONFIG_SOC_THEAD) += light-beagle.dtb
+
+# compat mainline name
+dtb-$(CONFIG_SOC_THEAD) += th1520-lichee-pi-4a.dtb th1520-lichee-pi-4a-16g.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-lichee-cluster-4a.dtb th1520-lichee-cluster-4a-16g.dtb
+dtb-$(CONFIG_SOC_THEAD) += th1520-beaglev-ahead.dtb
+
+targets += dtbs dtbs_install
+targets += $(dtb-y)
+
+subdir-y	:= overlays

arch/riscv/boot/dts/thead/light-beagle.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-beagle.dts"

arch/riscv/boot/dts/thead/light-lpi4a-16gb.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-16gb.dts"

arch/riscv/boot/dts/thead/light-lpi4a-console-16g.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-console-16g.dts"

arch/riscv/boot/dts/thead/light-lpi4a-console.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-console.dts"

arch/riscv/boot/dts/thead/light-lpi4a.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-product.dts"

arch/riscv/boot/dts/thead/overlays/BBORG_LOAD-00A2.dts

@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+	overlays {
+		BBORG_LOAD-00A2 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver 
+ */
+
+&bone_led_P9_42 {
+    status = "okay";
+    label = "load-sink1";
+    default-state = "keep";
+};
+
+&bone_led_P9_41 {
+    status = "okay";
+    label = "load-sink2";
+    default-state = "keep";
+};
+
+&bone_led_P9_30 {
+    status = "okay";
+    label = "load-sink3";
+    default-state = "keep";
+};
+
+&bone_led_P9_27 {
+    status = "okay";
+    label = "load-sink4";
+    default-state = "keep";
+};
+
+&bone_led_P8_12 {
+    status = "okay";
+    label = "load-sink5";
+    default-state = "keep";
+};
+
+&bone_led_P8_11 {
+    status = "okay";
+    label = "load-sink6";
+    default-state = "keep";
+};
+
+&bone_led_P8_15 {
+    status = "okay";
+    label = "load-sink7";
+    default-state = "keep";
+};
+
+&bone_led_P8_17 {
+    status = "okay";
+    label = "load-sink8";
+    default-state = "keep";
+};

arch/riscv/boot/dts/thead/overlays/BBORG_RELAY-00A2.dts

@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
+ * Copyright (C) 2019 Amilcar Lucas <amilcar.lucas@iav.de>
+ * Copyright (C) 2020 - 2023 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+	overlays {
+		BBORG_RELAY-00A2.kernel = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+// relay1
+&bone_led_P9_41 {
+	status = "okay";
+	// access: sys/class/leds/relay1
+	label = "relay1";
+	default-state = "keep";
+};
+
+// relay2
+&bone_led_P9_42 {
+	status = "okay";
+	// access: sys/class/leds/relay2
+	label = "relay2";
+	default-state = "keep";
+};
+
+// realy3
+&bone_led_P9_30 {
+	status = "okay";
+	// access: sys/class/leds/relay3
+	label = "relay3";
+	default-state = "keep";
+};
+
+// realy4
+&bone_led_P9_27 {
+	status = "okay";
+	// access: sys/class/leds/relay4
+	label = "relay4";
+	default-state = "keep";
+};

arch/riscv/boot/dts/thead/overlays/BONE-LED_P8_03.dts

@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ * Virtual cape for LED on P8_03 
+ * Supports BBB, BBBWL, BBAI, and BBAI-64
+ *
+ */
+ 
+/dts-v1/;
+/plugin/;
+ 
+&{/chosen} {
+	overlays {
+		BONE-LED_P8_03 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+&bone_led_P8_03 {
+    status = "okay";
+    // access: sys/class/leds/led_P8_03
+    label = "led_P8_03";
+    linux,default-trigger = "heartbeat";
+    default-state = "on";
+};

arch/riscv/boot/dts/thead/overlays/BONE-LED_P9_11.dts

@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020 - 2022 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html#beaglebone-cape-interface-spec
+ *
+ * Virtual cape for LED on P9_11 
+ * Supports BBB, BBBWL, BBAI, and BBAI-64
+ *
+ */
+ 
+/dts-v1/;
+/plugin/;
+ 
+&{/chosen} {
+	overlays {
+		BONE-LED_P9_11 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Easy LED control through sysfs (/sys/class/leds/) using gpio-leds driver
+ */
+
+&bone_led_P9_11 {
+    status = "okay";
+    // access: sys/class/leds/led_P9_11
+    label = "led_P9_11";
+    linux,default-trigger = "heartbeat";
+    default-state = "on";
+};

arch/riscv/boot/dts/thead/overlays/BVA-MIKROBUS-0.dts

@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2023 BeagleBoard.org - https://beagleboard.org/
+ * Copyright (C) 2023 Deepak Khatri <lorforlinux@beagleboard.org>
+ *
+ * See Cape Interface Spec page for more info on Bone Buses
+ * https://docs.beagleboard.org/0.0/boards/capes/cape-interface-spec.html
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+ /*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+ 
+&{/chosen} {
+	overlays {
+		BBORG_LOAD-00A2 = __TIMESTAMP__;
+	};
+};
+
+/*
+ * Enable mikroBus port
+ */
+
+&bone_mikrobus0 {
+    status = "okay";
+};

arch/riscv/boot/dts/thead/overlays/Makefile

@@ -0,0 +1,15 @@
+# Overlays for the CONFIG_SOC_THEAD platform
+
+dtbo-$(CONFIG_SOC_THEAD) += \
+	BBORG_LOAD-00A2.dtbo	\
+	BBORG_RELAY-00A2.dtbo	\
+	BONE-LED_P8_03.dtbo	\
+	BONE-LED_P9_11.dtbo	\
+	BVA-MIKROBUS-0.dtbo \
+	meles-wifibt-external-antenna.dtbo
+
+targets += dtbs dtbs_install
+targets += $(dtbo-y)
+
+always-y	:= $(dtbo-y)
+clean-files	:= *.dtbo

arch/riscv/boot/dts/thead/overlays/meles-wifibt-external-antenna.dts

@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target-path = "/";
+
+		__overlay__ {
+			ext_antenna: ext-antenna {
+				status = "okay";
+				compatible = "regulator-fixed";
+				enable-active-low;
+				gpio = <&gpio1_porta 24 1>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "ext_antenna";
+			};
+		};
+	};
+
+	fragment@1 {
+		target = <&board_antenna>;
+
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+};

arch/riscv/boot/dts/thead/th1520-a-val-audio-i2s-8ch.dts

@@ -3,23 +3,75 @@
  * Copyright (C) 2021 Alibaba Group Holding Limited.
  */
 
-#include "th1520-a-val.dtsi"
+#include "th1520-a-val-audio.dts"
 
 / {
 	model = "T-HEAD Light FM Audio VAL board";
 	compatible = "thead,light-val-audio-i2s-8ch", "thead,light";
 };
 
-&lightsound_i2s_8ch {
-	status = "okay";
-};
 
-&i2s0 {
+&lightsound {
         status = "okay";
+
+	simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+
+	simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <2>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd3>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+
+        simple-audio-card,dai-link@3 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+                reg = <3>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd0>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc1>;
+                };
+        };
+
+        simple-audio-card,dai-link@4 {          /* I2S - AUDIO SYS CODEC 7210_1*/
+                reg = <4>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd1>;
+                };
+                codec {
+                        mclk-fs = <512>;
+                        sound-dai = <&es7210_audio_codec_adc1>;
+                };
+        };
 };
 
 &i2s_8ch_sd0 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa4>,
+                    <&pinctrl_audio_i2s_8ch_sd0>,
+                    <&pinctrl_audiopa2>,
+                    <&pinctrl_audiopa3>,
+                    <&pinctrl_audiopa8>,
+                    <&pinctrl_audio_i2s_8ch_bus>;
 };
 
 &i2s_8ch_sd1 {
@@ -28,16 +80,15 @@
 
 &i2s_8ch_sd2 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audiopa0>,
+                    <&pinctrl_audio_i2s_8ch_sd2>;
 };
 
 &i2s_8ch_sd3 {
         status = "okay";
 };
 
-&es8156_audio_codec {
-		status = "okay";
-};
-
 &es7210_audio_codec_adc0 {
         status = "okay";
         channels-max = <8>;
@@ -47,7 +98,3 @@
         status = "okay";
         channels-max = <8>;
 };
-
-&audio_aw87519_pa {
-        status = "okay";
-};

arch/riscv/boot/dts/thead/th1520-a-val-audio-spdif.dts

@@ -6,13 +6,37 @@
 #include "th1520-a-val.dtsi"
 
 &spdif0 {
-		status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif0>;
+	status = "okay";
 };
 
 &spdif1 {
-		status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_spdif1>;
+	status = "okay";
 };
 
-&lightsound_spdif {
-		status = "okay";
+&lightsound {
+        status = "okay";
+        simple-audio-card,dai-link@0 {          /* SPDIF0 */
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&spdif0>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
+        simple-audio-card,dai-link@1 {          /* SPDIF1 */
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&spdif1>;
+                };
+                codec {
+                        sound-dai = <&dummy_codec>;
+                };
+        };
 };

arch/riscv/boot/dts/thead/th1520-a-val-audio-tdm.dts

@@ -6,6 +6,8 @@
 #include "th1520-a-val.dtsi"
 
 &tdm_slot1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_audio_tdm>;
 	status = "okay";
 };
 
@@ -37,26 +39,144 @@
 	status = "okay";
 };
 
-&es8156_audio_codec {
-		status = "okay";
+&audio_i2c0 {
+        clock-frequency = <100000>;
+        status = "okay";
+
+        es7210_adc2: es7210@42 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x42>;
+                work-mode = "ES7210_TDM_1LRCK_DSPB";
+                channels-max = <8>;
+                sound-name-prefix = "ES7210_ADC2";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+
+        es7210_adc3: es7210@43 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_1";
+                reg = <0x43>;
+                work-mode = "ES7210_TDM_1LRCK_DSPB";
+                channels-max = <8>;
+                sound-name-prefix = "ES7210_ADC3";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
 };
 
-&es7210_adc2 {
-	status = "okay";
-};
+&lightsound {
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"AW87519 IN", "ES8156 ROUT",
+        	"Speaker", "AW87519 VO";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
 
-&es7210_adc3 {
-	status = "okay";
-};
+        simple-audio-card,dai-link@1 {          /* TDM - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot1>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
 
-&lightsound_tdm {
-	status = "okay";
+        simple-audio-card,dai-link@2 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot2>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@3 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot3>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@4 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot4>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@5 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot5>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@6 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot6>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@7 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot7>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
+
+        simple-audio-card,dai-link@8 {
+                reg = <1>;
+                format = "dsp_b";
+                cpu {
+                        sound-dai = <&tdm_slot8>;
+                };
+                codec {
+                        sound-dai = <&es7210_adc2>;
+                };
+        };
 };
 
 &i2s0 {
-	status = "okay";
-};
-
-&audio_aw87519_pa {
         status = "okay";
 };

arch/riscv/boot/dts/thead/th1520-a-val-audio.dts

@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-a-val.dtsi"
+
+/ {
+	model = "T-HEAD Light FM Audio VAL board";
+	compatible = "thead,light-val-audio", "thead,light";
+};
+
+&lightsound {
+        status = "okay";
+        simple-audio-card,widgets = "Speaker", "Speaker";
+        simple-audio-card,routing = 
+        	"Speaker", "AW87519 VO",
+        	"AW87519 IN", "ES8156 ROUT";
+        simple-audio-card,aux-devs = <&audio_aw87519_pa>;
+        simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
+                reg = <0>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s0 0>;
+                };
+                codec {
+                        sound-dai = <&es8156_audio_codec>;
+                };
+        };
+
+        simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
+                reg = <1>;
+                format = "i2s";
+                cpu {
+                        sound-dai = <&i2s_8ch_sd2 2>;
+                };
+                codec {
+                        sound-dai = <&es7210_audio_codec_adc0>;
+                };
+        };
+};
+
+&i2s0 {
+        status = "okay";
+};
+
+&i2s_8ch_sd2 {
+        status = "okay";
+};
+
+&es7210_audio_codec_adc0 {
+        status = "okay";
+};
+
+

arch/riscv/boot/dts/thead/th1520-a-val-audio.dtsi

@@ -1,334 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
- */
-
-/ {
-	lightsound: lightsound@1 {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "Light-Sound-Card";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-
-		simple-audio-card,widgets = "Speaker", "Speaker";
-		simple-audio-card,routing =
-			"Speaker", "AW87519 VO",
-			"AW87519 IN", "ES8156 ROUT";
-		simple-audio-card,aux-devs = <&audio_aw87519_pa>;
-		simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
-				reg = <0>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s0 0>;
-				};
-				codec {
-						sound-dai = <&es8156_audio_codec>;
-				};
-		};
-
-		simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
-				reg = <1>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s_8ch_sd2 2>;
-				};
-				codec {
-						sound-dai = <&es7210_audio_codec_adc0>;
-				};
-		};
-	};
-
-	lightsound_spdif: lightsound@2 {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "Light-Sound-Card";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-
-		simple-audio-card,dai-link@0 {          /* SPDIF0 */
-				reg = <1>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&spdif0>;
-				};
-				codec {
-						sound-dai = <&dummy_codec>;
-				};
-		};
-		simple-audio-card,dai-link@1 {          /* SPDIF1 */
-				reg = <1>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&spdif1>;
-				};
-				codec {
-						sound-dai = <&dummy_codec>;
-				};
-		};
-	};
-
-	lightsound_tdm: lightsound@3 {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "Light-Sound-Card";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-
-		simple-audio-card,widgets = "Speaker", "Speaker";
-		simple-audio-card,routing =
-			"Speaker", "AW87519 VO",
-			"AW87519 IN", "ES8156 ROUT";
-		simple-audio-card,aux-devs = <&audio_aw87519_pa>;
-		simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
-				reg = <0>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s0 0>;
-				};
-				codec {
-						sound-dai = <&es8156_audio_codec>;
-				};
-		};
-
-		simple-audio-card,dai-link@1 {          /* TDM - AUDIO SYS CODEC 7210*/
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot1>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-
-		simple-audio-card,dai-link@2 {
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot2>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-
-		simple-audio-card,dai-link@3 {
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot3>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-
-		simple-audio-card,dai-link@4 {
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot4>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-
-		simple-audio-card,dai-link@5 {
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot5>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-
-		simple-audio-card,dai-link@6 {
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot6>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-
-		simple-audio-card,dai-link@7 {
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot7>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-
-		simple-audio-card,dai-link@8 {
-				reg = <1>;
-				format = "dsp_b";
-				cpu {
-						sound-dai = <&tdm_slot8>;
-				};
-				codec {
-						sound-dai = <&es7210_adc2>;
-				};
-		};
-	};
-
-	lightsound_i2s_8ch: lightsound@4 {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "Light-Sound-Card";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-
-		simple-audio-card,widgets = "Speaker", "Speaker";
-		simple-audio-card,routing =
-			"Speaker", "AW87519 VO",
-			"AW87519 IN", "ES8156 ROUT";
-		simple-audio-card,aux-devs = <&audio_aw87519_pa>;
-		simple-audio-card,dai-link@0 {          /* I2S - AUDIO SYS CODEC 8156*/
-				reg = <0>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s0 0>;
-				};
-				codec {
-						sound-dai = <&es8156_audio_codec>;
-				};
-		};
-
-		simple-audio-card,dai-link@1 {          /* I2S - AUDIO SYS CODEC 7210*/
-				reg = <1>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s_8ch_sd2>;
-				};
-				codec {
-						mclk-fs = <512>;
-						sound-dai = <&es7210_audio_codec_adc0>;
-				};
-		};
-
-		simple-audio-card,dai-link@2 {          /* I2S - AUDIO SYS CODEC 7210*/
-				reg = <2>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s_8ch_sd3>;
-				};
-				codec {
-						mclk-fs = <512>;
-						sound-dai = <&es7210_audio_codec_adc0>;
-				};
-		};
-
-		simple-audio-card,dai-link@3 {          /* I2S - AUDIO SYS CODEC 7210_1*/
-				reg = <3>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s_8ch_sd0>;
-				};
-				codec {
-						mclk-fs = <512>;
-						sound-dai = <&es7210_audio_codec_adc1>;
-				};
-		};
-
-		simple-audio-card,dai-link@4 {          /* I2S - AUDIO SYS CODEC 7210_1*/
-				reg = <4>;
-				format = "i2s";
-				cpu {
-						sound-dai = <&i2s_8ch_sd1>;
-				};
-				codec {
-						mclk-fs = <512>;
-						sound-dai = <&es7210_audio_codec_adc1>;
-				};
-		};
-	};
-};
-
-&audio_i2c0 {
-		es8156_audio_codec: es8156@8 {
-			#sound-dai-cells = <0>;
-			compatible = "everest,es8156";
-			reg = <0x08>;
-			sound-name-prefix = "ES8156";
-			AVDD-supply = <&soc_aud_dac_3v3_en_reg>;
-			DVDD-supply = <&soc_dvdd18_aon_reg>;
-			PVDD-supply = <&soc_dvdd18_aon_reg>;
-			mclk-sclk-ratio = <4>;
-			status = "disabled";
-		};
-
-		es7210_audio_codec_adc0: es7210@40 {
-			#sound-dai-cells = <0>;
-			compatible = "MicArray_0";
-			reg = <0x40>;
-			work-mode = "ES7210_NORMAL_I2S";
-			channels-max = <2>;
-			mclk-sclk-ratio = <4>;
-			sound-name-prefix = "ES7210_ADC0";
-			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			DVDD-supply = <&soc_dvdd18_aon_reg>;
-			PVDD-supply = <&soc_dvdd18_aon_reg>;
-			status = "disabled";
-		};
-
-		es7210_audio_codec_adc1: es7210@41 {
-			#sound-dai-cells = <0>;
-			compatible = "MicArray_1";
-			reg = <0x41>;
-			work-mode = "ES7210_NORMAL_I2S";
-			channels-max = <2>;
-			mclk-sclk-ratio = <4>;
-			sound-name-prefix = "ES7210_ADC1";
-			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			DVDD-supply = <&soc_dvdd18_aon_reg>;
-			PVDD-supply = <&soc_dvdd18_aon_reg>;
-			status = "disabled";
-		};
-
-		es7210_adc2: es7210@42 {
-			#sound-dai-cells = <0>;
-			compatible = "MicArray_0";
-			reg = <0x42>;
-			work-mode = "ES7210_TDM_1LRCK_DSPB";
-			channels-max = <8>;
-			sound-name-prefix = "ES7210_ADC2";
-			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			DVDD-supply = <&soc_dvdd18_aon_reg>;
-			PVDD-supply = <&soc_dvdd18_aon_reg>;
-			status = "disabled";
-		};
-
-		es7210_adc3: es7210@43 {
-			#sound-dai-cells = <0>;
-			compatible = "MicArray_1";
-			reg = <0x43>;
-			work-mode = "ES7210_TDM_1LRCK_DSPB";
-			channels-max = <8>;
-			sound-name-prefix = "ES7210_ADC3";
-			MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
-			DVDD-supply = <&soc_dvdd18_aon_reg>;
-			PVDD-supply = <&soc_dvdd18_aon_reg>;
-			status = "disabled";
-		};
-
-		audio_aw87519_pa: amp@58 {
-			compatible = "awinic,aw87519_pa";
-			reg = <0x58>;
-			reset-gpio = <&pcal6408ahk_b 3 0x1>;
-			sound-name-prefix = "AW87519";
-			status = "disabled";
-		};
-};

arch/riscv/boot/dts/thead/th1520-a-val-crash.dts

@@ -5,16 +5,6 @@
 
 #include "th1520-crash.dtsi"
 
-/ {
-	model = "T-HEAD Light val board";
-	compatible = "thead,light-val", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x0 0xffe00000>;
-	};
-};
-
 &aon {
 	aon_reg_dialog: light-dialog-reg {
 		compatible = "thead,light-dialog-pmic";

arch/riscv/boot/dts/thead/th1520-a-val-dsi0-dsi1.dts

@@ -5,54 +5,60 @@
 
 /dts-v1/;
 
-#include "th1520-a-val.dtsi"
-
-&i2c0 {
-	touch@5d {
-		compatible = "goodix,gt911";
-		touchscreen-size-x = <800>;
-		touchscreen-size-y = <1280>;
-		status = "okay";
-	};
-};
-
-&i2c1 {
-	touch1@5d {
-		compatible = "goodix,gt911";
-		touchscreen-size-x = <800>;
-		touchscreen-size-y = <1280>;
-		status = "okay";
-	};
-};
-
-&dpu_enc0 {
-	status = "okay";
-};
+#include "th1520-a-val-dsi0.dts"
 
 &dpu_enc1 {
 	status = "okay";
-};
 
-&dsi0 {
-        status = "okay";
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc1_out: endpoint {
+				remote-endpoint = <&dsi1_in>;
+			};
+		};
+	};
 };
 
 &dsi1 {
         status = "okay";
 };
 
-&dhost_0 {
-	status = "okay";
-
-	panel0@0 {
-		compatible = "txd,dy800qwxpab";
-	};
-};
-
 &dhost_1 {
-	status = "okay";
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi1_in: endpoint {
+				remote-endpoint = <&enc1_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi1_out: endpoint {
+				remote-endpoint = <&panel1_in>;
+			};
+		};
+	};
 
 	panel1@0 {
 		compatible = "txd,dy800qwxpab";
+		reg = <0>;
+		reset-gpio = <&gpio1_porta 9 1>;		/* active low */
+		vdd1v8-supply = <&lcd1_1v8>;
+		vspn5v7-supply = <&lcd1_5v7>;
+
+		port {
+			panel1_in: endpoint {
+				remote-endpoint = <&dsi1_out>;
+			};
+		};
 	};
 };

arch/riscv/boot/dts/thead/th1520-a-val-dsi0-hdmi.dts

@@ -5,20 +5,7 @@
 
 /dts-v1/;
 
-#include "th1520-a-val.dtsi"
-
-&i2c0 {
-	touch@5d {
-		compatible = "goodix,gt911";
-		touchscreen-size-x = <800>;
-		touchscreen-size-y = <1280>;
-		status = "okay";
-	};
-};
-
-&dpu_enc0 {
-	status = "okay";
-};
+#include "th1520-a-val-dsi0.dts"
 
 &dpu_enc1 {
         ports {
@@ -32,16 +19,11 @@
 
 &hdmi_tx {
 	status = "okay";
-};
 
-&dsi0 {
-        status = "okay";
-};
-
-&dhost_0 {
-	status = "okay";
-
-	panel0@0 {
-		compatible = "txd,dy800qwxpab";
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
 	};
 };

arch/riscv/boot/dts/thead/th1520-a-val-dsi0.dts

@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "th1520-a-val.dtsi"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel0_in>;
+			};
+		};
+	};
+
+	panel0@0 {
+		compatible = "txd,dy800qwxpab";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&gpio1_porta 5 1>; /* active low */
+		vdd1v8-supply = <&lcd0_1v8>;
+		vspn5v7-supply = <&lcd0_5v7>;
+
+		port {
+			panel0_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};

arch/riscv/boot/dts/thead/th1520-a-val.dts

@@ -5,7 +5,13 @@
 
 /dts-v1/;
 
-#include "th1520-a-val.dtsi"
+#include "th1520-a-val-audio.dts"
+
+/ {
+	display-subsystem {
+		status = "okay";
+	};
+};
 
 &dpu_enc1 {
 	ports {
@@ -17,13 +23,24 @@
 	remote-endpoint = <&hdmi_tx_in>;
 };
 
+&dpu {
+	status = "okay";
+};
+
 &hdmi_tx {
 	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
 };
 
 &lightsound {
 	status = "okay";
-
+	
 	simple-audio-card,dai-link@2 {          /* I2S - HDMI */
 		reg = <2>;
 		format = "i2s";
@@ -39,23 +56,3 @@
 &light_i2s {
         status = "okay";
 };
-
-&i2s0 {
-        status = "okay";
-};
-
-&i2s_8ch_sd2 {
-        status = "okay";
-};
-
-&es8156_audio_codec {
-        status = "okay";
-};
-
-&es7210_audio_codec_adc0 {
-        status = "okay";
-};
-
-&audio_aw87519_pa {
-        status = "okay";
-};

arch/riscv/boot/dts/thead/th1520-a-val.dtsi

@@ -9,17 +9,11 @@
 #include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "th1520-vi-devices.dtsi"
-#include "th1520-a-val-audio.dtsi"
 
 / {
 	model = "T-HEAD Light val board";
 	compatible = "thead,light-val", "thead,light";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x0 0xffe00000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
 		stdout-path = "serial0";
@@ -35,10 +29,6 @@
 		};
 	};
 
-	display-subsystem {
-		status = "okay";
-	};
-
 	lcd0_backlight: pwm-backlight@0 {
 		compatible = "pwm-backlight";
 		pwms = <&pwm 0 5000000>;
@@ -58,8 +48,10 @@
 
 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			is_default_region;
+			dummy_slave= <0x800000>;
 		};
 
 		/* config#2: iopmp bypass */
@@ -199,6 +191,16 @@
 		status = "okay";
 	};
 
+	lightsound: lightsound@1 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		status = "disabled";
+	};
+
 	light_rpmsg: light_rpmsg {
 		compatible = "light,rpmsg-bus", "simple-bus";
 		memory-region = <&rpmsgmem>;
@@ -209,7 +211,6 @@
 			vdev-nums = <1>;
             reg = <0x0 0x1E000000 0 0x10000>;
 			compatible = "light,light-rpmsg";
-			log-memory-region = <&audio_log_mem>;
 			status = "okay";
 		};
 	};
@@ -222,32 +223,32 @@
 	};
 
 	reg_vref_1v8: regulator-adc-verf {
-		compatible = "regulator-fixed";
-		regulator-name = "vref-1v8";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		status = "okay";
+			compatible = "regulator-fixed";
+			regulator-name = "vref-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+	status = "okay";
 	};
 
-	reg_tp_pwr_en: regulator-pwr-en {
-		compatible = "regulator-fixed";
-		regulator-name = "PWR_EN";
-		regulator-min-microvolt = <2800000>;
-		regulator-max-microvolt = <2800000>;
-		gpio = <&pcal6408ahk_a 3 1>;
-		enable-active-high;
-		regulator-always-on;
-	};
+		reg_tp_pwr_en: regulator-pwr-en {
+                compatible = "regulator-fixed";
+                regulator-name = "PWR_EN";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&pcal6408ahk_a 3 1>;
+                enable-active-high;
+                regulator-always-on;
+        };
 
-	reg_tp1_pwr_en: regulator-tp1-pwr-en {
-		compatible = "regulator-fixed";
-		regulator-name = "PWR_EN";
-		regulator-min-microvolt = <2800000>;
-		regulator-max-microvolt = <2800000>;
-		gpio = <&pcal6408ahk_a 6 1>;
-		enable-active-high;
-		regulator-always-on;
-	};
+        reg_tp1_pwr_en: regulator-tp1-pwr-en {
+                compatible = "regulator-fixed";
+                regulator-name = "PWR_EN";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&pcal6408ahk_a 6 1>;
+                enable-active-high;
+                regulator-always-on;
+        };
 
 	lcd0_1v8: regulator-lcd0-vdd18 {
 		compatible = "regulator-fixed";
@@ -347,7 +348,6 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
-		log-memory-region = <&aon_log_mem>;
 		status = "okay";
 
 		pd: light-aon-pd {
@@ -356,212 +356,164 @@
 		};
 
 		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic";
 			status = "okay";
-	    };
+
 			dvdd_cpu_reg: appcpu_dvdd {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvdd";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
-				regulator-type = "dvdd";
 				regulator-boot-on;
 				regulator-always-on;
-				status = "okay";
 			};
 
 			dvddm_cpu_reg: appcpu_dvddm {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvddm";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
-				regulator-type = "dvddm";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd18_aon_reg: soc_dvdd18_aon {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_aon";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd33_usb3";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
-			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
-				compatible = "thead,light-dialog-pmic";
-				regulator-name = "soc_avdd28_scan_en";
-				regulator-type = "gpio";
-			};
+
 			soc_dvdd08_aon_reg: soc_dvdd08_aon {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_aon";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ddr";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v8";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v1";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_0v6";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd18_ap_reg: soc_dvdd18_ap {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_ap";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_ap_reg: soc_dvdd08_ap {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ap";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd08_mipi_hdmi";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd18_mipi_hdmi";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd33_emmc_reg: soc_vdd33_emmc {
-				compatible = "thead,light-dialog-pmic";
-				regulator-name = "soc_dvdd33_emmc";
-				regulator-type = "common";
+				regulator-name = "soc_vdd33_emmc";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd18_emmc_reg: soc_vdd18_emmc {
-				compatible = "thead,light-dialog-pmic";
-				regulator-name = "soc_dvdd18_emmc";
-				regulator-type = "common";
+				regulator-name = "soc_vdd18_emmc";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dovdd18_scan_reg: soc_dovdd18_scan {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_scan";
-				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};
 			soc_vext_2v8_reg: soc_vext_2v8 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vext_2v8";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd12_scan_reg: soc_dvdd12_scan {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_scan";
-				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};
-
+			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+				regulator-name = "soc_avdd28_scan_en";
+			};
 			soc_avdd28_rgb_reg: soc_avdd28_rgb {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd28_rgb";
-				regulator-type = "common";
 				regulator-min-microvolt = <2200000>;
 				regulator-max-microvolt = <3475000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dovdd18_rgb_reg: soc_dovdd18_rgb {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_rgb";
-				regulator-type = "common";
 				regulator-min-microvolt = <1200000>;
 				regulator-max-microvolt = <3600000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd12_rgb_reg: soc_dvdd12_rgb {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_rgb";
-				regulator-type = "common";
 				regulator-min-microvolt = <400000>;
 				regulator-max-microvolt = <1675000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_avdd25_ir_reg: soc_avdd25_ir {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd25_ir";
-				regulator-type = "common";
 				regulator-min-microvolt = <2200000>;
 				regulator-max-microvolt = <3475000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dovdd18_ir_reg: soc_dovdd18_ir {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_ir";
-				regulator-type = "common";
 				regulator-min-microvolt = <1200000>;
 				regulator-max-microvolt = <3600000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd12_ir_reg: soc_dvdd12_ir {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_ir";
-				regulator-type = "common";
 				regulator-min-microvolt = <400000>;
 				regulator-max-microvolt = <1675000>;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
+		};
+
 		c910_cpufreq {
 			compatible = "thead,light-mpw-cpufreq";
 			status = "okay";
@@ -573,11 +525,6 @@
 	};
 };
 
-&aon_suspend_ctrl {
-	audio-text-memory-region = <&audio_text_mem>;
-	status = "okay";
-};
-
 &cmamem {
 	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
 };
@@ -615,24 +562,10 @@
 		reg = <0x0 0x22000000 0x0 0x10000000>;
 		//no-map;
 	};
-    audio_text_mem: memory@32000000 {
-		reg = <0x0 0x32000000 0x0 0xE00000>;
+    audio_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0x6400000>;
 		//no-map;
     };
-    audio_data_mem: memory@32E00000 {
-		reg = <0x0 0x32E00000 0x0 0x600000>;
-		//no-map;
-    };
-	audio_log_mem: memory@33400000 {
-        reg = <0x0 0x33400000 0x0 0x200000>;
-	};
-	aon_log_mem: memory@33600000 {
-        reg = <0x0 0x33600000 0x0 0x200000>;
-	};
-	regdump_mem: memory@38400000 {
-		reg = <0x0 0x38400000 0x0 0x1E00000>;
-		no-map;
-	};
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
 		//no-map;
@@ -655,25 +588,76 @@
 		pagesize = <32>;
 	};
 
-	touch@5d {
-			#gpio-cells = <2>;
-			reg = <0x5d>;
-			interrupt-parent = <&gpio1_porta>;
-			interrupts = <8 0>;
-			irq-gpios = <&gpio1_porta 8 0>;
-			reset-gpios = <&gpio1_porta 7 0>;
-			AVDD28-supply = <&reg_tp_pwr_en>;
-			status = "disbale";
-	};
+       touch@5d {
+               #gpio-cells = <2>;
+               compatible = "goodix,gt911";
+               reg = <0x5d>;
+               interrupt-parent = <&gpio1_porta>;
+               interrupts = <8 0>;
+               irq-gpios = <&gpio1_porta 8 0>;
+               reset-gpios = <&gpio1_porta 7 0>;
+               AVDD28-supply = <&reg_tp_pwr_en>;
+               touchscreen-size-x = <800>;
+               touchscreen-size-y = <1280>;
+       };
 };
 
 &audio_i2c0 {
-		clock-frequency = <100000>;
-		status = "okay";
+        clock-frequency = <100000>;
+        status = "okay";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_audiopa6>,
 					<&pinctrl_audiopa7>,
 					<&pinctrl_audio_i2c0>;
+
+        es8156_audio_codec: es8156@8 {
+                #sound-dai-cells = <0>;
+                compatible = "everest,es8156";
+                reg = <0x08>;
+                sound-name-prefix = "ES8156";
+                AVDD-supply = <&soc_aud_dac_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+				mclk-sclk-ratio = <4>;
+        };
+
+        es7210_audio_codec_adc0: es7210@40 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_0";
+                reg = <0x40>;
+                status = "disabled";
+                work-mode = "ES7210_NORMAL_I2S";
+                channels-max = <2>;
+                mclk-sclk-ratio = <4>;
+                sound-name-prefix = "ES7210_ADC0";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+
+        es7210_audio_codec_adc1: es7210@41 {
+                #sound-dai-cells = <0>;
+                compatible = "MicArray_1";
+                reg = <0x41>;
+                status = "disabled";
+                work-mode = "ES7210_NORMAL_I2S";
+                channels-max = <2>;
+                mclk-sclk-ratio = <4>;
+                sound-name-prefix = "ES7210_ADC1";
+                MVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                AVDD-supply = <&soc_aud_adc_3v3_en_reg>;
+                DVDD-supply = <&soc_dvdd18_aon_reg>;
+                PVDD-supply = <&soc_dvdd18_aon_reg>;
+        };
+
+        audio_aw87519_pa: amp@58 {
+                compatible = "awinic,aw87519_pa";
+                reg = <0x58>;
+                reset-gpio = <&pcal6408ahk_b 3 0x1>;
+                sound-name-prefix = "AW87519";
+                status = "okay";
+        };
 };
 
 &audio_i2c1 {
@@ -699,13 +683,15 @@
 		pinctrl-0 = <&pinctrl_i2c1>;
         touch1@5d {
                 #gpio-cells = <2>;
+                compatible = "goodix,gt911";
                 reg = <0x5d>;
                 interrupt-parent = <&gpio1_porta>;
                 interrupts = <12 0>;
                 irq-gpios = <&gpio1_porta 12 0>;
                 reset-gpios = <&gpio1_porta 11 0>;
                 AVDD28-supply = <&reg_tp1_pwr_en>;
-				status = "disbale";
+                touchscreen-size-x = <800>;
+                touchscreen-size-y = <1280>;
         };
 };
 
@@ -713,9 +699,6 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_spi0>;
-	status = "okay";
 
 	spi_norflash@0 {
 		status = "okay";
@@ -791,8 +774,6 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
 	rx-sample-dly = <5>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_qspi1>;
 	status = "okay";
 
 	spi-flash@0 {
@@ -1343,112 +1324,6 @@
     memory-region = <&dsp1_mem>;
 };
 
-&dpu {
-        status = "okay";
-};
-
-&dpu_enc0 {
-
-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc0_out: endpoint {
-				remote-endpoint = <&dsi0_in>;
-			};
-		};
-	};
-};
-
-&dpu_enc1 {
-
-	ports {
-		/* output */
-		port@1 {
-			reg = <1>;
-
-			enc1_out: endpoint {
-				remote-endpoint = <&dsi1_in>;
-			};
-		};
-	};
-};
-
-&dhost_0 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi0_in: endpoint {
-				remote-endpoint = <&enc0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi0_out: endpoint {
-				remote-endpoint = <&panel0_in>;
-			};
-		};
-	};
-
-	panel0@0 {
-		reg = <0>;
-		backlight = <&lcd0_backlight>;
-		reset-gpio = <&gpio1_porta 5 1>; /* active low */
-		vdd1v8-supply = <&lcd0_1v8>;
-		vspn5v7-supply = <&lcd0_5v7>;
-
-		port {
-			panel0_in: endpoint {
-				remote-endpoint = <&dsi0_out>;
-			};
-		};
-	};
-};
-
-&dhost_1 {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi1_in: endpoint {
-				remote-endpoint = <&enc1_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			dsi1_out: endpoint {
-				remote-endpoint = <&panel1_in>;
-			};
-		};
-	};
-
-	panel1@0 {
-		reg = <0>;
-		backlight = <&lcd1_backlight>;
-		reset-gpio = <&gpio1_porta 9 1>;		/* active low */
-		vdd1v8-supply = <&lcd1_1v8>;
-		vspn5v7-supply = <&lcd1_5v7>;
-
-		port {
-			panel1_in: endpoint {
-				remote-endpoint = <&dsi1_out>;
-			};
-		};
-	};
-};
-
 &vvcam_flash_led0{
     flash_led_name = "aw36413_aw36515";
 	floodlight_i2c_bus = /bits/ 8 <2>;
@@ -2710,12 +2585,6 @@
 	status = "okay";
 };
 
-&npu_opp_table {
-	opp-1000000000 {
-		opp-suspend;
-	};
-};
-
 &fce {
 	memory-region = <&facelib_mem>;
 	status = "okay";
@@ -2730,21 +2599,6 @@
                     <&pinctrl_audio_i2s0>;
 };
 
-&tdm_slot1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_audio_tdm>;
-};
-
-&spdif0 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_audio_spdif0>;
-};
-
-&spdif1 {
-        pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_audio_spdif1>;
-};
-
 &i2s_8ch_sd0 {
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_audiopa4>,
@@ -2776,189 +2630,74 @@
 
 &cpus {
 	c910_0: cpu@0 {
-
 		operating-points = <
 			/* kHz    uV */
-			300000	600000
-			400000  700000
-			500000  700000
-			600000  700000
-			702000  700000
+			300000	650000
 			800000	700000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
-			400000  800000
-			500000  800000
-			600000  800000
-			702000  800000
 			800000	800000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 	};
 	c910_1: cpu@1 {
-
 		operating-points = <
 			/* kHz    uV */
-			300000	600000
-			400000  700000
-			500000  700000
-			600000  700000
-			702000  700000
+			300000	650000
 			800000	700000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
-			400000  800000
-			500000  800000
-			600000  800000
-			702000  800000
 			800000	800000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 	};
 	c910_2: cpu@2 {
 
 		operating-points = <
 			/* kHz    uV */
-			300000	600000
-			400000  700000
-			500000  700000
-			600000  700000
-			702000  700000
+			300000	650000
 			800000	700000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
-			400000  800000
-			500000  800000
-			600000  800000
-			702000  800000
 			800000	800000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 	};
 	c910_3: cpu@3 {
 
 		operating-points = <
 			/* kHz    uV */
-			300000	600000
-			400000  700000
-			500000  700000
-			600000  700000
-			702000  700000
+			300000	650000
 			800000	700000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 		light,dvddm-operating-points = <
 			/* kHz   uV */
 			300000	800000
-			400000  800000
-			500000  800000
-			600000  800000
-			702000  800000
 			800000	800000
-			900000	800000
-			1000000	800000
-			1104000	800000
-			1200000	800000
-			1296000 800000
-			1404000 800000
 			1500000	800000
-			1608000 1000000
-			1704000	1000000
-			1848000 1000000
+			1848000	1000000
 		>;
 	};
 };
 
 &hdmi_tx {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_hdmi>;
-
-	port@0 {
-		/* input */
-		hdmi_tx_in: endpoint {
-			remote-endpoint = <&disp1_out>;
-		};
-	};
-};
-
-&pwm {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm>;
-};
-
-&light_regdump {
-	memory-region = <&regdump_mem>;
-	status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_hdmi>;
 };

arch/riscv/boot/dts/thead/th1520-b-product-crash.dts

@@ -5,16 +5,6 @@
 
 #include "th1520-crash.dtsi"
 
-/ {
-	model = "T-HEAD Light product board";
-	compatible = "thead,light-val", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x0 0x7fe00000>;
-	};
-};
-
 &aon {
 	aon_reg_ricoh: light-ricoh-reg {
 		compatible = "thead,light-ricoh-pmic";

arch/riscv/boot/dts/thead/th1520-b-product.dts

@@ -3,7 +3,6 @@
  * Copyright (C) 2021 Alibaba Group Holding Limited.
  */
 
-
 /dts-v1/;
 
 #include "th1520.dtsi"
@@ -11,7 +10,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "th1520-vi-devices.dtsi"
 / {
-	model = "T-HEAD Light product board";
+	model = "T-HEAD Light val board";
 	compatible = "thead,light-val", "thead,light";
 
 	memory@0 {
@@ -50,8 +49,10 @@
 
 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			is_default_region;
+			dummy_slave= <0x800000>;
 		};
 
 		/* config#2: iopmp bypass */
@@ -211,7 +212,6 @@
 			vdev-nums = <1>;
             reg = <0x0 0x1E000000 0 0x10000>;
 			compatible = "light,light-rpmsg";
-			log-memory-region = <&audio_log_mem>;
 			status = "okay";
 		};
 	};
@@ -224,22 +224,22 @@
 	};
 
 	reg_vref_1v8: regulator-adc-verf {
-		compatible = "regulator-fixed";
-		regulator-name = "vref-1v8";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		status = "okay";
+			compatible = "regulator-fixed";
+			regulator-name = "vref-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+	status = "okay";
 	};
 
-	reg_tp_pwr_en: regulator-pwr-en {
-		compatible = "regulator-fixed";
-		regulator-name = "PWR_EN";
-		regulator-min-microvolt = <2800000>;
-		regulator-max-microvolt = <2800000>;
-		gpio = <&gpio1_porta 12 1>;
-		enable-active-high;
-		regulator-always-on;
-	};
+        reg_tp_pwr_en: regulator-pwr-en {
+                compatible = "regulator-fixed";
+                regulator-name = "PWR_EN";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpio1_porta 12 1>;
+                enable-active-high;
+                regulator-always-on;
+        };
 
 	wcn_wifi: wireless-wlan {
 		compatible = "wlan-platdata";
@@ -284,7 +284,6 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
-		log-memory-region = <&aon_log_mem>;
 		status = "okay";
 
 		pd: light-aon-pd {
@@ -446,143 +445,112 @@
 			enable-active-high;
 		};
 
+		aon_reg_ricoh: light-ricoh-reg {
+			compatible = "thead,light-ricoh-pmic";
+			status = "okay";
+
 			dvdd_cpu_reg: appcpu_dvdd {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvdd";
 				regulator-min-microvolt = <600000>;
 				regulator-max-microvolt = <1500000>;
-				regulator-type = "dvdd";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			dvddm_cpu_reg: appcpu_dvddm {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvddm";
 				regulator-min-microvolt = <600000>;
 				regulator-max-microvolt = <1500000>;
-				regulator-type = "dvddm";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 			soc_dvdd18_aon_reg: soc_dvdd18_aon {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_aon";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd33_usb3";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_aon_reg: soc_dvdd08_aon {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_aon";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ddr";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v8";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v1";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_0v6";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd18_ap_reg: soc_dvdd18_ap {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_ap";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_ap_reg: soc_dvdd08_ap {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ap";
-				regulator-type = "gpio";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd08_mipi_hdmi";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd18_mipi_hdmi";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
-			soc_dvdd33_emmc_reg: soc_dvdd33_emmc {
-				compatible = "thead,light-dialog-pmic";
-				regulator-name = "soc_dvdd33_emmc";
-				regulator-type = "common";
+			soc_vdd33_emmc_reg: soc_vdd33_emmc {
+				regulator-name = "soc_vdd33_emmc";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
-			soc_dvdd18_emmc_reg: soc_dvdd18_emmc {
-				compatible = "thead,light-dialog-pmic";
-				regulator-name = "soc_dvdd18_emmc";
-				regulator-type = "common";
+			soc_vdd18_emmc_reg: soc_vdd18_emmc {
+				regulator-name = "soc_vdd18_emmc";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd18_lcd0_en_reg: soc_lcd0_en {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_lcd0_en";
-				regulator-type = "common";
-				regulator-boot-on;
-				regulator-always-on;
 			};
 			soc_vext_1v8_reg: soc_vext_1v8 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vext_1v8";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
+		};
 
 		c910_cpufreq {
 			compatible = "thead,light-mpw-cpufreq";
@@ -592,15 +560,10 @@
 		test: light-aon-test {
 			compatible = "thead,light-aon-test";
 		};
-};
+	};
 
 };
 
-&aon_suspend_ctrl {
-	audio-text-memory-region = <&audio_text_mem>;
-	status = "okay";
-};
-
 &resmem {
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -636,24 +599,11 @@
 		reg = <0x0 0x17000000 0 0x02000000>;
 		//no-map;
 	};
-    audio_text_mem: memory@32000000 {
-		reg = <0x0 0x32000000 0x0 0xE00000>;
+
+	audio_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0x6400000>;
 		//no-map;
     };
-    audio_data_mem: memory@32E00000 {
-		reg = <0x0 0x32E00000 0x0 0x600000>;
-		//no-map;
-    };
-	audio_log_mem: memory@33400000 {
-        reg = <0x0 0x33400000 0x0 0x200000>;
-	};
-	aon_log_mem: memory@33600000 {
-        reg = <0x0 0x33600000 0x0 0x200000>;
-	};
-	regdump_mem: memory@38400000 {
-		reg = <0x0 0x38400000 0x0 0x1E00000>;
-		no-map;
-	};
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
 		//no-map;
@@ -734,16 +684,60 @@
         status = "okay";
 };
 
+&spi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
+	rx-sample-delay-ns = <10>;
+	status = "disabled";
+
+	spi_norflash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q64jwm", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		w25q,fast-read;
+	};
+
+	spidev@1 {
+		compatible = "spidev";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
 &uart0 {
 	clock-frequency = <100000000>;
 };
 
+&qspi0 {
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>;
+	rx-sample-dly = <4>;
+	status = "disabled";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <100000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		reg = <0>;
+
+		partition@0 {
+			label = "ubi1";
+			reg = <0x00000000 0x08000000>;
+		};
+	};
+};
+
 &qspi1 {
 	compatible = "snps,dw-apb-ssi";
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_qspi1>;
 	status = "okay";
 
 	spidev@0 {
@@ -1027,10 +1021,6 @@
 	};
 };
 
-&pwm {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm>;
-};
 
 &i2c0 {
 	clock-frequency = <400000>;
@@ -1145,28 +1135,37 @@
 	status = "okay";
 };
 
-&vvcam_sensor1 {
-	sensor_name = "OV5693";
+/*
+&vvcam_sensor0 {
+	sensor_name = "IMX334";
 	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
-	sensor_regulator_voltage_uV = <1800000 1200000 2800000>;
 	sensor_regulator_timing_us = <70 50 20>;
 	sensor_rst = <&gpio1_porta 16 0>;
-	sensor_pdn_delay_us = <4000>; //powerdown pin / shutdown pin actived till I2C ready
+	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
 	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
 	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
 	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-	i2c_reg_width = /bits/ 8 <2>;
-	i2c_data_width = /bits/ 8 <1>;
-	i2c_addr = /bits/ 8 <0x36>;
+    i2c_reg_width = /bits/ 8 <2>;
+    i2c_data_width = /bits/ 8 <1>;
+    i2c_addr = /bits/ 8 <0x1a>;
 	i2c_bus = /bits/ 8 <3>;
 	status = "okay";
 };
+*/
+
+&vvcam_sensor1 {
+	sensor_name = "OV5693";
+	i2c_bus = /bits/ 8 <3>;
+	i2c_reg_width = /bits/ 8 <1>;
+	i2c_data_width = /bits/ 8 <1>;
+	status = "disabled";
+};
 
 &vvcam_sensor2 {
 	sensor_name = "GC5035";
 	sensor_regulators = "DOVDD18_SCAN", "DVDD12_SCAN", "AVDD28_SCAN";
 	sensor_regulator_timing_us = <100 50 0>;
-	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin
+	sensor_pdn = <&gpio1_porta 30 0>; //powerdown pin / shutdown pin 
 	sensor_rst = <&gpio1_porta 29 0>;
 	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
 	DOVDD18_SCAN-supply = <&soc_dovdd18_scan_reg>;
@@ -1237,31 +1236,14 @@
 	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
 	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
 	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-	i2c_reg_width = /bits/ 8 <1>;
-	i2c_data_width = /bits/ 8 <1>;
-	i2c_addr = /bits/ 8 <0x37>;
-	i2c_bus = /bits/ 8 <3>;
-	status = "okay";
-};
-
-&vvcam_sensor7 {
-	sensor_name = "IMX334";
-	sensor_regulators = "DOVDD18_RGB", "DVDD12_RGB", "AVDD28_RGB";
-	sensor_regulator_timing_us = <70 50 20>;
-	sensor_rst = <&gpio1_porta 16 0>;
-	sensor_pdn_delay_us = <1000>; //powerdown pin / shutdown pin actived till I2C ready
-	DOVDD18_RGB-supply = <&soc_dovdd18_rgb_reg>;
-	DVDD12_RGB-supply = <&soc_dvdd12_rgb_reg>;
-	AVDD28_RGB-supply = <&soc_avdd28_rgb_reg>;
-	i2c_reg_width = /bits/ 8 <2>;
-	i2c_data_width = /bits/ 8 <1>;
-	i2c_addr = /bits/ 8 <0x1a>;
+    i2c_reg_width = /bits/ 8 <1>;
+    i2c_data_width = /bits/ 8 <1>;
+    i2c_addr = /bits/ 8 <0x37>;
 	i2c_bus = /bits/ 8 <3>;
 	status = "okay";
 };
 
 &video0{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1348,7 +1330,6 @@
 
 
 &video1{
-	status = "okay";
 	vi_mem_pool_region = <2>;	// vi_mem: framebuffer, region[2]
 	channel0 {
 		sensor0 {
@@ -1452,8 +1433,7 @@
 };
 
 &video2{
-	status = "okay";
-	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -1538,8 +1518,7 @@
 };
 
 &video3{
-	status = "okay";
-	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -1642,8 +1621,7 @@
 };
 
 &video4{
-	status = "okay";
-	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -1794,7 +1772,6 @@
 };
 
 &video5{
-	status = "okay";
 	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
 	channel0 {
 		sensor0 {
@@ -1964,7 +1941,6 @@
 };
 
 &video6{
-	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
 	channel0 {
 		sensor0 {
@@ -2006,7 +1982,6 @@
 };
 
 &video7{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2176,7 +2151,6 @@
 
 
 &video8{
-	status = "okay";
 	vi_mem_pool_region = <1>;	// vi_mem: framebuffer, region[1]
     channel0 {
 		sensor0 {
@@ -2208,7 +2182,6 @@
 };
 
 &video9{
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2230,7 +2203,6 @@
 
 
 &video10{ // TUNINGTOOL
-	status = "okay";
 	channel0 {
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2252,8 +2224,7 @@
 };
 
 &video11{
-	status = "okay";
-	channel0 {
+	channel0 { 
 		channel_id = <0>;
 		status = "okay";
 		sensor0 {
@@ -2279,7 +2250,6 @@
 };
 
 &video12{ // TUNINGTOOL
-	status = "okay";
 	channel0 { // CSI2
 		sensor0 {
 			subdev_name = "vivcam";
@@ -2389,12 +2359,6 @@
 	status = "okay";
 };
 
-&npu_opp_table {
-	opp-792000000 {
-		opp-suspend;
-	};
-};
-
 &fce {
 	memory-region = <&facelib_mem>;
 	status = "okay";
@@ -2499,11 +2463,6 @@
                     <&pinctrl_audio_i2s_8ch_sd3>;
 };
 
-&light_regdump {
-	memory-region = <&regdump_mem>;
-	status = "okay";
-};
-
 &cpus {
 	c910_0: cpu@0 {
 		operating-points = <

arch/riscv/boot/dts/thead/th1520-beagle.dts

@@ -0,0 +1,728 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "th1520-beagle.dtsi"
+
+/ {
+	bcmdhd_wlan {
+		compatible = "android,bcmdhd_wlan";
+
+		gpio_wl_reg_on =   <&gpio2_porta 31 1>;
+		gpio_wl_host_wake = <&gpio2_porta 25 1>;
+	};
+};
+
+&pwm {
+	status = "disabled";
+};
+
+&qspi0 {
+	status = "disabled";
+};
+
+&qspi1 {
+	status = "disabled";
+};
+
+&vvcam_sensor4 { // beagle board J5 CSI0 connector
+	sensor_name = "IMX219";
+	sensor_pdn = <&gpio2_porta 23 0>; //powerdown pin / shutdown pin 
+	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
+	i2c_addr = /bits/ 8 <0x10>;
+	i2c_bus = /bits/ 8 <1>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	status = "okay";
+};
+
+&vvcam_sensor5 { // beagle board J4 CSI1 connector
+	sensor_name = "IMX219";
+	sensor_pdn = <&gpio2_porta 24 0>; //powerdown pin / shutdown pin 
+	sensor_pdn_delay_us = <2000>; //powerdown pin / shutdown pin actived till I2C ready
+	i2c_addr = /bits/ 8 <0x10>;
+	i2c_bus = /bits/ 8 <3>;
+	i2c_reg_width = /bits/ 8 <2>;
+	i2c_data_width = /bits/ 8 <1>;
+	status = "okay";
+};
+
+/*
+sensor imx219 mounted on beagle board J4 CSI1 (=light CSI2X2_A+CSI2X2_B   /   CSI2X2_A only)
+video0: sensor-vipre-isp0
+video1: sensor-vipre-isp0-dw
+video7: sensor-vipre-isp0-dsp1-ry-dw
+video10: tuningtool
+
+sensor imx219 mounted on beagle board J5 CSI0 (=light CSI2)
+video2: sensor-vipre-isp1   
+video3: sensor-vipre-isp1-dw   
+video4: sensor-vipre-isp1-dsp0-ry
+video5: sensor-vipre-isp1-dsp0-ry-dw
+video12: tuningtool
+*/
+
+&video0{
+    vi_mem_pool_region = <0xFFFFFFFF>;	// vi_mem: framebuffer, region[2]
+    channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <5>; // imx219
+			csi_idx = <2>; //<2>=CSI2X2_A
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+        dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI2_ISP0";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <0>;
+			path_type = "ISP_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video2 {
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	status = "okay";
+	channel0 {
+		channel_id = <0>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		channel_id = <1>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		channel_id = <2>;
+		status = "okay";
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <16>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video3{
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE0";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE1";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE2";
+			dw_dst_depth = <2>;
+		};
+	};
+};
+
+&video4{
+    vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_SP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_SP2_BP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+	};
+};
+
+&video5{
+	vi_mem_pool_region = <0>;	// vi_mem: framebuffer, region[0]
+	channel0 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE0";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel1 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE1";
+			dw_dst_depth = <2>;
+		};
+	};
+	channel2 {
+		sensor0 {
+			subdev_name = "vivcam";
+			idx = <4>; // imx219
+			csi_idx = <0>; //<0>=CSI2
+			mode_idx = <0>;
+			path_type = "SENSOR_1080P_RAW10_LINER";
+		};
+		sensor1 {
+			subdev_name = "vivcam";
+			idx = <0xff>; // invalid
+			csi_idx = <0xff>;
+			path_type = "SENSOR_VGA_RAW10_LINER";
+		};
+		dma {
+			subdev_name = "vipre";
+			idx = <0>;
+			path_type = "VIPRE_CSI0_ISP1";
+		};
+		isp {
+			subdev_name = "isp";
+			idx = <1>;
+			path_type = "ISP_MI_PATH_PP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dsp {
+			subdev_name = "dsp";
+			idx = <0>;
+			path_type = "DSP_PATH_ISP_RY";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		ry {
+			subdev_name = "ry";
+			idx = <0>;
+			path_type = "ISP_RY_MI_PATH_MP";
+			output {
+				max_width = <1920>;
+				max_height = <1088>;
+				bit_per_pixel = <12>;
+				frame_count = <3>;
+			};
+		};
+		dw {
+			subdev_name = "dw";
+			idx = <0>;
+			path_type = "DW_DWE_VSE2";
+			dw_dst_depth = <2>;
+		};
+	};
+};
+
+#include "th1520-beagle-bone-buses.dtsi"

arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-beagle.dts"

arch/riscv/boot/dts/thead/th1520-crash.dtsi

@@ -46,8 +46,10 @@
 
 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			is_default_region;
+			dummy_slave= <0x800000>;
 		};
 
 		/* config#2: iopmp bypass */
@@ -204,22 +206,22 @@
 	};
 
 	reg_vref_1v8: regulator-adc-verf {
-		compatible = "regulator-fixed";
-		regulator-name = "vref-1v8";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		status = "okay";
+			compatible = "regulator-fixed";
+			regulator-name = "vref-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+	status = "okay";
 	};
 
-	reg_tp_pwr_en: regulator-pwr-en {
-		compatible = "regulator-fixed";
-		regulator-name = "PWR_EN";
-		regulator-min-microvolt = <2800000>;
-		regulator-max-microvolt = <2800000>;
-		gpio = <&gpio1_porta 12 1>;
-		enable-active-high;
-		regulator-always-on;
-	};
+        reg_tp_pwr_en: regulator-pwr-en {
+                compatible = "regulator-fixed";
+                regulator-name = "PWR_EN";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&gpio1_porta 12 1>;
+                enable-active-high;
+                regulator-always-on;
+        };
 
 	wcn_wifi: wireless-wlan {
 		compatible = "wlan-platdata";
@@ -262,7 +264,6 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
-		log-memory-region = <&aon_log_mem>;
 		status = "okay";
 
 		pd: light-aon-pd {
@@ -315,9 +316,6 @@
 		reg = <0x0 0x17000000 0 0x02000000>;
 		//no-map;
 	};
-	aon_log_mem: memory@33600000 {
-	reg = <0x0 0x33600000 0x0 0x200000>;
-	};
 };
 
 &adc {

arch/riscv/boot/dts/thead/th1520-lichee-cluster-4a-16g.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-cluster-16gb.dts"

arch/riscv/boot/dts/thead/th1520-lichee-cluster-4a.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-cluster.dts"

arch/riscv/boot/dts/thead/th1520-lichee-pi-4a-16g.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-16gb.dts"

arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts

@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 ISCAS.
+ */
+
+#include "th1520-lpi4a-product.dts"

arch/riscv/boot/dts/thead/th1520-lpi4a-16gb.dts

@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-lpi4a-product.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x3 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-camera-tuning.dts

@@ -1,32 +1,13 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+/* SPDX-License-Identifier: GPL-2.0 */	
 /*
  * Copyright (C) 2021 Alibaba Group Holding Limited.
  */
 
 /dts-v1/;
 
-#include "th1520-lpi4a.dtsi"
+#include "th1520-lpi4a-dsi0.dts"
 
-&i2c3 {
-        touch@14 {
-			touchscreen-size-x = <800>;
-			touchscreen-size-y = <1200>;
-        };
-};
 
-&dsi0 {
-        status = "okay";
-};
-
-&dpu_enc0 {
-	status = "okay";
-};
-
-&dhost_0 {
-        panel0@0 {
-			compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
-        };
-};
 
 &video10{ // TUNINGTOOL
 	status = "okay";

arch/riscv/boot/dts/thead/th1520-lpi4a-cluster-16gb.dts

@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "th1520-lpi4a-16gb.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 16GB DDR board on Cluster";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&audio_i2c1 {
+	status = "disabled";
+};
+
+&lightsound {
+	status = "disabled";
+};
+
+&reg_usb_hub_vdd1v2 {
+	/delete-property/ gpio;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio;
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-cluster.dts

@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "th1520-lpi4a-product.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board on Cluster";
+};
+
+&audio_i2c0 {
+	status = "disabled";
+};
+
+&audio_i2c1 {
+	status = "disabled";
+};
+
+&lightsound {
+	status = "disabled";
+};
+
+&reg_usb_hub_vdd1v2 {
+	/delete-property/ gpio;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio;
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-console-16g.dts

@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-lpi4a-console.dts"
+
+/ {
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x3 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-console.dts

@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "th1520-lpi4a-laptop.dts"
+
+/ {
+        model = "T-HEAD Light Lichee Pi 4A configuration for LicheeConsole4A";
+	compatible = "thead,light", "sipeed,th1520-laptop", "sipeed,console4a";
+};
+
+&dsi0_panel0 {
+	compatible = "mingjun,mj070bi30ia2";
+};
+
+&i2c2 {
+	/* thank ice */
+	trackpoint: trackpad@15 {
+		compatible = "hid-over-i2c";
+		reg = <0x15>;
+		hid-descr-addr = <0x0020>;
+		interrupt-parent = <&gpio1_porta>;
+		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
+&cw2015 {
+	cellwise,battery-profile = /bits/ 8 <
+		0x17 0x67 0x72 0x68 0x66 0x63 0x62 0x5A
+		0x64 0x61 0x4D 0x57 0x5A 0x51 0x43 0x38
+		0x31 0x2A 0x24 0x22 0x29 0x31 0x3E 0x4C
+		0x29 0x4D 0x0B 0x85 0x1C 0x38 0x47 0x57
+		0x5D 0x5E 0x5F 0x60 0x3F 0x1A 0x6F 0x41
+		0x0A 0x43 0x12 0x38 0x7B 0x95 0x9A 0x18
+		0x4B 0x6F 0x9E 0xD5 0x80 0x57 0x87 0xCB
+		0x2F 0x00 0x64 0xA5 0xB5 0x13 0x54 0xB9
+	>;
+};
+
+&lcd0_backlight {
+        default-brightness-level = <50>;
+};
+
+&sdhci0 {
+        max-frequency = <35000000>;
+        status = "okay";
+};
+
+&fan {
+        cooling-levels = <255 255 255 255>;
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-dsi0-hdmi.dts

@@ -0,0 +1,131 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-lpi4a.dtsi"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
+	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x00000000 0x2 0x00000000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x1 0xe4000000 0 0x14000000>; // [0x1E400_0000 ~ 0x1F800_0000]
+};
+
+&pwm {
+	status = "okay";
+};
+
+&qspi0 {
+	status = "okay";
+};
+
+&qspi1 {
+	status = "okay";
+};
+
+&i2c3 {
+	touch@14 {
+		#gpio-cells = <2>;
+		compatible = "goodix,gt9271";
+		reg = <0x14>;
+		interrupt-parent = <&ao_gpio_porta>;
+		interrupts = <3 0>; 
+		irq-gpios = <&ao_gpio_porta 3 0>; 
+		reset-gpios = <&pcal6408ahk_d 0 0>; 
+		AVDD28-supply = <&reg_tp_pwr_en>;
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <1280>;
+		tp-size = <9271>;
+		status = "okay";
+	};
+};
+
+&dpu_enc0 {
+       status = "okay";
+
+       ports {
+               /* output */
+               port@1 {
+                       reg = <1>;
+
+                       enc0_out: endpoint {
+                               remote-endpoint = <&dsi0_in>;
+                       };
+               };
+       };
+};
+
+&dpu_enc1 {
+        ports {
+                /delete-node/ port@0;
+        };
+};
+
+&dpu {
+        status = "okay";
+};
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       dsi0_in: endpoint {
+                               remote-endpoint = <&enc0_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+
+                       dsi0_out: endpoint {
+                               remote-endpoint = <&panel0_in>;
+                       };
+               };
+       };
+
+       dsi0_panel0: panel0@0 {
+		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
+		hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;  
+		vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
+
+               port {
+                       panel0_in: endpoint {
+                               remote-endpoint = <&dsi0_out>;
+                       };
+               };
+       };
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-dsi0.dts

@@ -8,26 +8,52 @@
 / {
 	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
 	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+};
+
+&cmamem {
+	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
+	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
 };
 
 &i2c3 {
-	touch@14 {
-		touchscreen-size-x = <800>;
-		touchscreen-size-y = <1200>;
-		status = "okay";
-	};
+        touch@14 {
+                #gpio-cells = <2>;
+                compatible = "goodix,gt9271";
+                reg = <0x14>;
+                interrupt-parent = <&ao_gpio_porta>;
+                interrupts = <3 0>;
+                irq-gpios = <&ao_gpio_porta 3 0>;
+                reset-gpios = <&pcal6408ahk_d 0 0>;
+                AVDD28-supply = <&reg_tp_pwr_en>;
+                touchscreen-size-x = <800>;
+                touchscreen-size-y = <1200>;
+                tp-size = <9271>;
+                status = "okay";
+        };
 };
 
 &dsi0 {
         status = "okay";
 };
 
-&dpu_enc0 {
-	status = "okay";
-};
-
 &dhost_0 {
-	panel0@0 {
+        panel0@0 {
 		compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";
-	};
+                reg = <0>;
+                backlight = <&lcd0_backlight>;
+                reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
+                hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
+                vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
+
+                port {
+                        panel0_in: endpoint {
+                                remote-endpoint = <&dsi0_out>;
+                        };
+                };
+        };
 };

arch/riscv/boot/dts/thead/th1520-lpi4a-hx8279.dts

@@ -8,26 +8,53 @@
 / {
 	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board";
 	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+};
+
+&cmamem {
+	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
+	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
 };
 
 &i2c3 {
 	touch@14 {
-		touchscreen-size-x = <1200>;
-		touchscreen-size-y = <1920>;
-		status = "okay";
-    };
+                #gpio-cells = <2>;
+                compatible = "goodix,gt9271";
+                reg = <0x14>;
+                interrupt-parent = <&ao_gpio_porta>;
+                interrupts = <3 0>;
+                irq-gpios = <&ao_gpio_porta 3 0>;
+                reset-gpios = <&pcal6408ahk_d 0 0>;
+                AVDD28-supply = <&reg_tp_pwr_en>;
+                touchscreen-size-x = <1200>;
+                touchscreen-size-y = <1920>;
+                tp-size = <9271>;
+                status = "okay";
+        };
 };
 
 &dsi0 {
         status = "okay";
 };
 
-&dpu_enc0 {
-	status = "okay";
-};
 
 &dhost_0 {
 	panel0@0 {
-		compatible = "himax,hx8279";
-	};
+                compatible = "himax,hx8279";
+                reg = <0>;
+                backlight = <&lcd0_backlight>;
+                reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
+                hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
+                vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
+
+                port {
+                        panel0_in: endpoint {
+                                remote-endpoint = <&dsi0_out>;
+                        };
+                };
+        };
 };

arch/riscv/boot/dts/thead/th1520-lpi4a-laptop.dts

@@ -0,0 +1,330 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "th1520-lpi4a-dsi0-hdmi.dts"
+
+/ {
+	model = "T-HEAD Light Lichee Pi 4A configuration for 8GB DDR board use on laptop";
+	compatible = "thead,light", "sipeed,th1520-laptop";
+
+	reg_sys_vcc_5v: regulator-sys-vcc-5v-en {
+		status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-sys-vcc-5v-en";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&pcal6408ahk_c 0 1>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+
+		// suspend for lichee laptop is not ready so dont turn it off
+		/*
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+		regulator-state-standby {
+			regulator-off-in-suspend;
+		};
+		*/
+	};
+
+	reg_sys_vcc_3v3: regulator-sys-vcc-3v3-en {
+		status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-sys-vcc-3v3-en";
+		vin-supply = <&reg_sys_vcc_5v>;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_sys_vcc_1v8: regulator-sys-vcc-1v8-en {
+		status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-sys-vcc-1v8-en";
+		vin-supply = <&reg_sys_vcc_5v>;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_usb_vcc_5v: regulator-usb-vcc-5v-en {
+		status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-usb-vcc-5v-en";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_sys_vcc_5v>;
+		gpio = <&pcal6408ahk_d 3 1>;
+		enable-active-high;
+		regulator-always-on;
+        };
+
+	reg_sata_vcc_5v: regulator-sata-vcc-5v-en {
+		status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "regulator-sata-vcc-5v-en";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_sys_vcc_5v>;
+		gpio = <&pcal6408ahk_c 1 1>;
+		enable-active-high;
+		regulator-always-on;
+	};
+
+	audio_amp: regulator-audio-amp-en {
+                status = "okay";
+                compatible = "regulator-fixed";
+                regulator-name = "regulator-audio-amp-en";
+                vin-supply = <&reg_sys_vcc_5v>;
+		gpio = <&pcal6408ahk_c 3 1>;
+		enable-active-high;
+		regulator-always-on;
+	};
+
+	aon: aon {
+		soc_dvdd12_rgb {
+			/delete-property/ gpio;
+		};
+		soc_avdd25_ir {
+			/delete-property/ gpio;
+		};
+		soc_dovdd18_ir {
+			/delete-property/ gpio;
+		};
+		soc_dvdd12_ir {
+			/delete-property/ gpio;
+		};
+		soc_cam2_avdd25_ir {
+			/delete-property/ gpio;
+		};
+		soc_cam2_dovdd18_ir {
+			/delete-property/ gpio;
+		};
+		soc_avdd28_rgb {
+			/delete-property/ gpio;
+		};
+		soc_dovdd18_rgb {
+			/delete-property/ gpio;
+		};
+	};
+
+	charger: dc-charger {
+		compatible = "gpio-charger";
+		charger-type = "mains";
+		gpios = <&gpio0_porta 16 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&es8156_audio_codec {
+	AVDD-supply = <&reg_sys_vcc_3v3>;
+	DVDD-supply = <&reg_sys_vcc_1v8>;
+	PVDD-supply = <&reg_sys_vcc_1v8>;
+};
+
+&es7210_audio_codec {
+	MVDD-supply = <&reg_sys_vcc_3v3>;
+	AVDD-supply = <&reg_sys_vcc_3v3>;
+	DVDD-supply = <&reg_sys_vcc_1v8>;
+	PVDD-supply = <&reg_sys_vcc_1v8>;
+};
+
+&wcn_wifi {
+	// WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
+	/delete-property/ WIFI,poweren_gpio;
+};
+
+
+&wcn_bt {
+	// BT,power_gpio = <&pcal6408ahk_c 5 0>;
+	/delete-property/ BT,power_gpio;
+};
+
+&usb_1 {
+        /delete-property/ vbus-supply;
+        /delete-property/ hub1v2-supply;
+        hub5v-supply = <&reg_usb_vcc_5v>;
+};
+
+&reg_usb_hub_vcc5v {
+	/delete-property/ gpio;
+};
+
+&soc_cam2_dvdd12_ir_reg {
+	/delete-property/ gpio;
+};
+
+&vvcam_sensor0 {
+	/delete-property/ sensor_rst;
+};
+
+&vvcam_sensor1 {
+	/delete-property/ sensor_rst;
+};
+
+&vvcam_sensor2 {
+	/delete-property/ sensor_rst;
+};
+
+&vvcam_sensor3 {
+	/delete-property/ sensor_rst;
+};
+
+&reg_tp_pwr_en {
+	/delete-property/ gpio;
+};
+
+&i2c0 {
+	/delete-node/ gpio@18;
+
+	cw2015: cw2015@62 {
+		compatible = "cellwise,cw2015";
+		reg = <0x62>;
+		cellwise,monitor-interval-ms = <5000>;
+		power-supplies = <&charger>;
+	};
+};
+
+&i2c3 {
+	touch@14 {
+		#gpio-cells = <2>;
+		compatible = "goodix,gt9271";
+		reg = <0x14>;
+		interrupt-parent = <&ao_gpio_porta>;
+		interrupts = <3 0>;
+		irq-gpios = <&ao_gpio_porta 3 0>;
+		reset-gpios = <&pcal6408ahk_d 0 0>;
+		// read xmax & ymax from touch screen chip, thank ice
+		//touchscreen-size-x = <1024>;
+		//touchscreen-size-y = <600>;
+		//tp-size = <9271>;
+		/delete-property/ touchscreen-size-x;
+		/delete-property/ touchscreen-size-y;
+		/delete-property/ tp-size;
+		status = "okay";
+	};
+
+	lt8911: lt8911@29 {
+		compatible = "lontium,lt8911exb";
+		reg = <0x29>;
+		lontium,pclk = <136000000>;
+		lontium,hact = <2160>;
+		lontium,vact = <1440>;
+		lontium,hbp = <80>;
+		lontium,hfp = <48>;
+		lontium,vbp = <14>;
+		lontium,vfp = <3>;
+		lontium,hs = <32>;
+		lontium,vs = <10>;
+		lontium,mipi_lane = <2>;
+		lontium,lane_cnt = <2>;
+		lontium,color = <1>; //Color Depth 0:6bit 1:8bit
+		lontium,test = <0>;
+	};
+};
+
+&uart3 {
+	clock-frequency = <100000000>;
+	pinctrl-0 = <&pinctrl_uart3_tx_is_gpio>;
+	status = "okay";
+};
+
+&spi0 {
+	status = "disabled";
+};
+
+&qspi0 {
+	status = "disabled";
+};
+
+&qspi1 {
+	status = "disabled";
+};
+
+&dsi0_panel0 {
+	backlight = <&lcd0_backlight>;
+	reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
+	hsvcc-supply = <&reg_sys_vcc_1v8>;
+	vspn3v3-supply = <&reg_sys_vcc_3v3>;
+};
+
+&lcd0_backlight {
+	pwms = <&pwm 0 50000>;
+	brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
+        36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
+        76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
+	default-brightness-level = <100>;
+};
+
+&fan {
+	pwms = <&pwm 1 10000000 0>;
+	cooling-levels = <0 64 192 255>;
+};
+
+&cpus {
+        c910_0: cpu@0 {
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+        c910_1: cpu@1 {
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+        c910_2: cpu@2 {
+
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+        c910_3: cpu@3 {
+
+                operating-points = <
+                        /* kHz    uV */
+                        300000  500000
+                        800000  700000
+                        1500000 800000
+                >;
+                light,dvddm-operating-points = <
+                        /* kHz   uV */
+                        300000  800000
+                        800000  800000
+                        1500000 800000
+                >;
+        };
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-product-crash.dts

@@ -5,16 +5,6 @@
 
 #include "th1520-crash.dtsi"
 
-/ {
-	model = "T-HEAD Light Lichee Pi 4A board";
-	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x1 0xffe00000>;
-	};
-};
-
 &aon {
 	aon_reg_dialog: light-dialog-reg {
 		compatible = "thead,light-dialog-pmic-ant";

arch/riscv/boot/dts/thead/th1520-lpi4a-product.dts

@@ -1,11 +1,11 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+/* SPDX-License-Identifier: GPL-2.0 */	
 /*
  * Copyright (C) 2021 Alibaba Group Holding Limited.
  */
 
 /dts-v1/;
 
-#include "th1520-lpi4a.dtsi"
+#include "th1520-lpi4a-dsi0.dts"
 
 &lightsound {
         status = "okay";
@@ -40,3 +40,11 @@
                 };
         };
 };
+
+&dpu_enc0 {
+        status = "disabled";
+};
+
+&dsi0 {
+        status = "disabled";
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-z14inch-m0-16g.dts

@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-lpi4a-z14inch-m0.dts"
+
+/ {
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x3 0xffe00000>;
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0x3 0xe4000000 0 0x14000000>; // [0x3E400_0000 ~ 0x3F800_0000]
+};

arch/riscv/boot/dts/thead/th1520-lpi4a-z14inch-m0.dts

@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sipeed.
+ */
+
+#include "th1520-lpi4a-laptop.dts"
+
+/ {
+        model = "T-HEAD Light Lichee Pi 4A configuration for Z14INCH-M0";
+};
+
+&dsi0_panel0 {
+	compatible = "custom,z14inch_2160x1440_40Hz";
+	/* display-timings in devicetree is it not working, but I haven't time to fix it, so move it into simple-panel.c */
+	/*
+	display-timings {
+		clock-frequency = <136000000>;
+		hactive = <2160>;
+		vactive = <1440>;
+		hfront-porch = <48>;
+		hback-porch = <80>;
+		hsync-len = <32>;
+		vback-porch = <14>;
+		vfront-porch = <3>;
+		vsync-len = <10>;
+	};
+	*/
+};
+
+&cw2015 {
+	cellwise,battery-profile = /bits/ 8 <
+		0x17 0x67 0x72 0x68 0x66 0x63 0x62 0x5A
+		0x64 0x61 0x4D 0x57 0x5A 0x51 0x43 0x38
+		0x31 0x2A 0x24 0x22 0x29 0x31 0x3E 0x4C
+		0x29 0x4D 0x0B 0x85 0x1C 0x38 0x47 0x57
+		0x5D 0x5E 0x5F 0x60 0x3F 0x1A 0x6F 0x41
+		0x0A 0x43 0x12 0x38 0x7B 0x95 0x9A 0x18
+		0x4B 0x6F 0x9E 0xD5 0x80 0x57 0x87 0xCB
+		0x2F 0x00 0x64 0xA5 0xB5 0x13 0x54 0xB9
+	>;
+};
+
+&lt8911 {
+	lontium,pclk = <136000000>;
+	lontium,hact = <2160>;
+	lontium,vact = <1440>;
+	lontium,hbp = <80>;
+	lontium,hfp = <48>;
+	lontium,vbp = <14>;
+	lontium,vfp = <3>;
+	lontium,hs = <32>;
+	lontium,vs = <10>;
+	lontium,mipi_lane = <2>;
+	lontium,lane_cnt = <2>;
+	lontium,color = <1>; //Color Depth 0:6bit 1:8bit
+	lontium,test = <0>;
+};
+
+&fan {
+        pwms = <&pwm 1 10000000 0>;
+        cooling-levels = <0 192 220 255>;
+};
+
+&lcd0_backlight {
+        default-brightness-level = <40>;
+};

arch/riscv/boot/dts/thead/th1520-lpi4a.dtsi

@@ -10,14 +10,6 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "th1520-vi-devices.dtsi"
 / {
-	model = "T-HEAD Light Lichee Pi 4A board";
-	compatible = "thead,light-val", "thead,light-lpi4a", "thead,light";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x0 0x200000 0x1 0xffe00000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
 		stdout-path = "serial0:115200n8";
@@ -49,8 +41,10 @@
 
 		/* config#1: multiple valid regions */
 		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
 			attr = <0xFFFFFFFF>;
-			is_default_region;
+			dummy_slave= <0x800000>;
 		};
 
 		/* config#2: iopmp bypass */
@@ -210,7 +204,6 @@
 			vdev-nums = <1>;
             reg = <0x0 0x1E000000 0 0x10000>;
 			compatible = "light,light-rpmsg";
-			log-memory-region = <&audio_log_mem>;
 			status = "okay";
 		};
 	};
@@ -230,22 +223,22 @@
 	};
 
 	reg_vref_1v8: regulator-adc-verf {
-		compatible = "regulator-fixed";
-		regulator-name = "vref-1v8";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		status = "okay";
+			compatible = "regulator-fixed";
+			regulator-name = "vref-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			status = "okay";
 	};
 
-	reg_tp_pwr_en: regulator-pwr-en {
-		compatible = "regulator-fixed";
-		regulator-name = "regulator-pwr-en";
-		regulator-min-microvolt = <2800000>;
-		regulator-max-microvolt = <2800000>;
-		gpio = <&pcal6408ahk_d 4 1>;
-		enable-active-high;
-		regulator-always-on;
-	};
+        reg_tp_pwr_en: regulator-pwr-en {
+                compatible = "regulator-fixed";
+                regulator-name = "regulator-pwr-en";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                gpio = <&pcal6408ahk_d 4 1>;
+                enable-active-high;
+                regulator-always-on;
+        };
 
 	reg_usb_hub_vdd1v2: regulator-hub-vdd12-en {
 		compatible = "regulator-fixed";
@@ -254,6 +247,7 @@
 		regulator-max-microvolt = <1200000>;
 		gpio = <&pcal6408ahk_d 2 1>;
 		enable-active-high;
+
 	};
 
 	reg_usb_hub_vcc5v: regulator-hub-vcc5v-en {
@@ -263,6 +257,7 @@
 		regulator-max-microvolt = <5000000>;
 		gpio = <&pcal6408ahk_d 3 1>;
 		enable-active-high;
+
 	};
 
 	wcn_wifi: wireless-wlan {
@@ -273,7 +268,7 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_wifi_wake>;
 		wifi_chip_type = "rtl8723ds";
-		WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
+		// WIFI,poweren_gpio = <&pcal6408ahk_c 4 0>;
 		status = "okay";
 	};
 
@@ -281,7 +276,7 @@
 		compatible = "bluetooth-platdata";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_bt_wake>;
-		BT,power_gpio    = <&pcal6408ahk_c 5 0>;
+		// BT,power_gpio    = <&pcal6408ahk_c 5 0>;
 		status = "okay";
 	};
 
@@ -301,10 +296,10 @@
 			debounce-interval = <1>;
 			gpios = <&gpio2_porta 25 0x1>;
 		};
-		key-sleep {
-			label = "Sleep Wake Key";
+		key-wake {
+			label = "Wake Key";
 			wakeup-source;
-			linux,code = <KEY_SLEEP>;
+			linux,code = <KEY_WAKEUP>;
 			debounce-interval = <1>;
 			gpios = <&ao_gpio_porta 2 0x1>;
 		};
@@ -314,7 +309,6 @@
 		compatible = "thead,light-aon";
 		mbox-names = "aon";
 		mboxes = <&mbox_910t 1 0>;
-		log-memory-region = <&aon_log_mem>;
 		status = "okay";
 
 		pd: light-aon-pd {
@@ -395,7 +389,7 @@
 			regulator-max-microvolt = <3300000>;
 			gpio = <&gpio1_porta 22 1>;
 			enable-active-high;
-			regulator-always-on;
+		
 		};
 
 
@@ -480,155 +474,123 @@
 			enable-active-high;
 		};
 
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic-ant";
+			status = "okay";
+
 			dvdd_cpu_reg: appcpu_dvdd {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvdd";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
-				regulator-type = "dvdd";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			dvddm_cpu_reg: appcpu_dvddm {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "appcpu_dvddm";
 				regulator-min-microvolt = <300000>;
 				regulator-max-microvolt = <1570000>;
-				regulator-type = "dvddm";
-				regulator-dual-rail;
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd18_aon_reg: soc_dvdd18_aon {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_aon";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd33_usb3";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_aon_reg: soc_dvdd08_aon {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_aon";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ddr";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v8";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_1v1";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_vdd_ddr_0v6";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd18_ap_reg: soc_dvdd18_ap {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd18_ap";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dvdd08_ap_reg: soc_dvdd08_ap {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd08_ap";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd08_mipi_hdmi";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd18_mipi_hdmi";
-				regulator-type = "common";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd33_emmc_reg: soc_vdd33_emmc {
-				compatible = "thead,light-dialog-pmic";
-				regulator-name = "soc_dvdd33_emmc";
-				regulator-type = "common";
+				regulator-name = "soc_vdd33_emmc";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_vdd18_emmc_reg: soc_vdd18_emmc {
-				compatible = "thead,light-dialog-pmic";
-				regulator-name = "soc_dvdd18_emmc";
-				regulator-type = "gpio";
+				regulator-name = "soc_vdd18_emmc";
 				regulator-boot-on;
 				regulator-always-on;
 			};
 
 			soc_dovdd18_scan_reg: soc_dovdd18_scan {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dovdd18_scan";
-				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};
 
 			soc_dvdd12_scan_reg: soc_dvdd12_scan {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_dvdd12_scan";
-				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};
 
 			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
-				compatible = "thead,light-dialog-pmic";
 				regulator-name = "soc_avdd28_scan_en";
-				regulator-type = "common";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <3600000>;
 			};
 
+		};
 
 		c910_cpufreq {
 			compatible = "thead,light-mpw-cpufreq";
@@ -690,16 +652,6 @@
 
 };
 
-&aon_suspend_ctrl {
-	audio-text-memory-region = <&audio_text_mem>;
-	status = "okay";
-};
-
-&cmamem {
-	size = <0 0x20000000>; // 512MB on lpi4a (SOM)
-	alloc-ranges = <0 0xd8000000 0 0x20000000>; // [0x0D800_0000 ~ 0x0F800_0000]
-};
-
 &resmem {
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -731,24 +683,9 @@
 	facelib_mem: memory@17000000 {
 		reg = <0x0 0x17000000 0 0x02000000>;
 	};
-    audio_text_mem: memory@32000000 {
-		reg = <0x0 0x32000000 0x0 0xE00000>;
-		//no-map;
+    audio_mem: memory@32000000 {
+		reg = <0x0 0x32000000 0x0 0x6400000>;
     };
-    audio_data_mem: memory@32E00000 {
-		reg = <0x0 0x32E00000 0x0 0x600000>;
-		//no-map;
-    };
-	audio_log_mem: memory@33400000 {
-        reg = <0x0 0x33400000 0x0 0x200000>;
-	};
-	aon_log_mem: memory@33600000 {
-        reg = <0x0 0x33600000 0x0 0x200000>;
-	};
-	regdump_mem: memory@38400000 {
-		reg = <0x0 0x38400000 0x0 0x1E00000>;
-		no-map;
-	};
 	rpmsgmem: memory@1E000000 {
 		reg = <0x0 0x1E000000 0x0 0x10000>;
 	};
@@ -843,9 +780,6 @@
 	num-cs = <1>;
 	cs-gpios = <&gpio2_porta 15 0>; // GPIO_ACTIVE_HIGH: 0
 	rx-sample-delay-ns = <10>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_spi0>;
-	status = "okay";
 
 	spi_norflash@0 {
 		status = "okay";
@@ -914,8 +848,6 @@
 	compatible = "snps,dw-apb-ssi";
 	num-cs = <1>;
 	cs-gpios = <&gpio0_porta 1 0>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_qspi1>;
 	status = "okay";
 
 	spidev@0 {
@@ -976,7 +908,7 @@
 };
 
 &sdhci0 {
-	max-frequency = <198000000>;
+	max-frequency = <100000000>;
 	bus-width = <4>;
 	pull_up;
 	wprtn_ignore;
@@ -1173,6 +1105,16 @@
 				>;
 			};
 
+
+			pinctrl_uart3_tx_is_gpio: uart3txisgpiogrp {
+				thead,pins = <
+					FM_UART3_TXD	0x3	0x202
+					FM_UART3_RXD	0x1	0x202
+				>;
+			};
+
+
+
 			pinctrl_wifi_wake: wifi_grp {
 				thead,pins = <
 					FM_GPIO0_27	0x0	0x202
@@ -1257,8 +1199,10 @@
 			pinctrl_audiopa30: audiopa30 {
 				thead,pins = < FM_AUDIO_PA30 LIGHT_PIN_FUNC_0 0x000 >;
 			};
-			pinctrl_sleep: sleep_grp {
-				thead,pins = <FM_CPU_JTG_TCLK 0x3   0x238 >;
+            pinctrl_sleep: sleep_grp {
+				thead,pins = <
+                    FM_CPU_JTG_TCLK 0x3   0x238
+				>;
 			};
 
 	};
@@ -1305,18 +1249,13 @@
 	};
 };
 
-&pwm {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm>;
-};
-
 &i2c0 {
     clock-frequency = <400000>;
 	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c0>;
 
-	pcal6408ahk_b: gpio@20 {
+	pcal6408ahk_b: gpio@18 {
 		compatible = "nxp,pca9557";
 		reg = <0x18>;
 		gpio-controller;
@@ -1330,7 +1269,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c1>;
 
-	pcal6408ahk_c: gpio@20 {
+	pcal6408ahk_c: gpio@18 {
 		compatible = "nxp,pca9557";
 		reg = <0x18>;
 		gpio-controller;
@@ -1351,25 +1290,12 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c3>;
 
-	pcal6408ahk_d: gpio@20 {
+	pcal6408ahk_d: gpio@18 {
 		compatible = "nxp,pca9557";
 		reg = <0x18>;
 		gpio-controller;
 		#gpio-cells = <2>;
 	};
-
-	touch@14 {
-		#gpio-cells = <2>;
-		compatible = "goodix,gt9271";
-		reg = <0x14>;
-		interrupt-parent = <&ao_gpio_porta>;
-		interrupts = <3 0>;
-		irq-gpios = <&ao_gpio_porta 3 0>;
-		reset-gpios = <&pcal6408ahk_d 0 0>;
-		AVDD28-supply = <&reg_tp_pwr_en>;
-		tp-size = <9271>;
-		status = "disable";
-	};
 };
 
 &i2c4 {
@@ -1716,18 +1642,13 @@
 	status = "okay";
 };
 
-&npu_opp_table {
-	opp-1000000000 {
-		opp-suspend;
-	};
-};
-
 &fce {
 	memory-region = <&facelib_mem>;
 	status = "okay";
 };
 
 &dpu_enc0 {
+	status = "okay";
 
 	ports {
 		/* output */
@@ -1772,20 +1693,6 @@
 			};
 		};
 	};
-
-	panel0@0 {
-		reg = <0>;
-		backlight = <&lcd0_backlight>;
-		reset-gpio = <&pcal6408ahk_d 7 0>; /* active low */
-		hsvcc-supply = <&soc_vdd18_lcd0_en_reg>;
-		vspn3v3-supply = <&soc_vdd33_lcd0_en_reg>;
-
-		port {
-				panel0_in: endpoint {
-						remote-endpoint = <&dsi0_out>;
-				};
-		};
-	};
 };
 
 &disp1_out {
@@ -1875,11 +1782,6 @@
 	hub5v-supply = <&reg_usb_hub_vcc5v>;
 };
 
-&light_regdump {
-	memory-region = <&regdump_mem>;
-	status = "okay";
-};
-
 &cpus {
 	c910_0: cpu@0 {
 		operating-points = <

arch/riscv/boot/dts/thead/th1520-milkv-meles-4g.dts

@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Alibaba Group Holding Limited.
+ */
+
+#include "th1520-milkv-meles.dts"
+
+/ {
+	model = "Milk-V Meles 4G";
+	compatible = "milkv,meles", "thead,light";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0xffe00000>;
+	};
+};

arch/riscv/boot/dts/thead/th1520-milkv-meles-dsi0.dts

@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "th1520-milkv-meles.dts"
+
+/ {
+	model = "Milk-V Meles";
+	compatible = "milkv,meles", "thead,light";
+
+	lcd0_backlight: pwm-backlight@0 {
+		status = "okay";
+		compatible = "pwm-backlight";
+		pwms = <&pwm 5 25000>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <7>;
+	};
+
+	vcc_lcd_mipi0: vcc-lcd-mipi0 {
+		status = "okay";
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_lcd_mipi0";
+		gpio = <&gpio1_porta 25 0>;
+		enable-active-high;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+};
+
+&i2c0 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	touch@14 {
+		#gpio-cells = <2>;
+		compatible = "goodix,gt9271";
+		reg = <0x14>;
+		interrupt-parent = <&gpio2_porta>;
+		interrupts = <20 0>;
+		irq-gpios = <&gpio2_porta 20 0>;
+		reset-gpios = <&gpio2_porta 18 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_touch_gpios>;
+	};
+};
+
+&padctrl0_apsys {
+	light-evb-padctrl0 {
+		pinctrl_dsi0_panel_gpio: dsi0-panel-gpio-group {
+			thead,pins = <
+				FM_GPIO2_21	0x0	0x238
+			>;
+		};
+
+		pinctrl_touch_gpios: touch-gpios-group {
+			thead,pins = <
+				FM_GPIO2_18	0x0	0x238
+				FM_GPIO2_20	0x0	0x208
+			>;
+		};
+	};
+};
+
+&pwm {
+	status = "okay";
+};
+
+&dpu_enc0 {
+	status = "okay";
+
+	ports {
+		/* output */
+		port@1 {
+			reg = <1>;
+
+			enc0_out: endpoint {
+				remote-endpoint = <&dsi0_in>;
+			};
+		};
+	};
+};
+
+/delete-node/ &disp1_out;
+
+/delete-node/ &hdmi_tx;
+
+&dsi0 {
+        status = "okay";
+};
+
+&dhost_0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi0_in: endpoint {
+				remote-endpoint = <&enc0_out>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+
+			dsi0_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+
+	panel@0 {
+		compatible = "radxa,display-10fhd-ad003";
+		reg = <0>;
+		backlight = <&lcd0_backlight>;
+		vdd-supply = <&vcc_lcd_mipi0>;
+		vccio-supply = <&vdd_1v8>;
+		reset-gpios = <&gpio2_porta 21 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_dsi0_panel_gpio>;
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&dsi0_out>;
+			};
+		};
+	};
+};

arch/riscv/boot/dts/thead/th1520-milkv-meles.dts

@@ -0,0 +1,906 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021-2022 Alibaba Group Holding Limited.
+ */
+
+/dts-v1/;
+
+#include "th1520.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	model = "Milk-V Meles";
+	compatible = "milkv,meles", "thead,light";
+
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdhci0;
+		mmc2 = &sdhci1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200 crashkernel=256M-:128M earlycon clk_ignore_unused sram=0xffe0000000,0x180000";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x1 0xffe00000>;
+	};
+
+	display_subsystem: display-subsystem {
+		status = "okay";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "SYS_STATUS";
+			gpios = <&gpio1_porta 15 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			default-state = "off";
+		};
+
+		led1 {
+			label = "USER_LED";
+			gpios = <&gpio1_porta 16 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+			linux,default-trigger = "heartbeat";
+			default-state = "on";
+		};
+	};
+
+	light_iopmp: iopmp {
+		compatible = "thead,light-iopmp";
+
+		/* config#1: multiple valid regions */
+		iopmp_emmc: IOPMP_EMMC {
+			regions = <0x000000 0x100000>,
+				  <0x100000 0x200000>;
+			attr = <0xFFFFFFFF>;
+			dummy_slave= <0x800000>;
+		};
+
+		/* config#2: iopmp bypass */
+		iopmp_sdio0: IOPMP_SDIO0 {
+			bypass_en;
+		};
+
+		/* config#3: iopmp default region set */
+		iopmp_sdio1: IOPMP_SDIO1 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_usb0: IOPMP_USB0 {
+			attr = <0xFFFFFFFF>;
+			is_default_region;
+		};
+
+		iopmp_ao: IOPMP_AO {
+			is_default_region;
+		};
+
+		iopmp_aud: IOPMP_AUD {
+			is_default_region;
+		};
+
+		iopmp_chip_dbg: IOPMP_CHIP_DBG {
+			is_default_region;
+		};
+
+		iopmp_eip120i: IOPMP_EIP120I {
+			is_default_region;
+		};
+
+		iopmp_eip120ii: IOPMP_EIP120II {
+			is_default_region;
+		};
+
+		iopmp_eip120iii: IOPMP_EIP120III {
+			is_default_region;
+		};
+
+		iopmp_isp0: IOPMP_ISP0 {
+			is_default_region;
+		};
+
+		iopmp_isp1: IOPMP_ISP1 {
+			is_default_region;
+		};
+
+		iopmp_dw200: IOPMP_DW200 {
+			is_default_region;
+		};
+
+		iopmp_vipre: IOPMP_VIPRE {
+			is_default_region;
+		};
+
+		iopmp_venc: IOPMP_VENC {
+			is_default_region;
+		};
+
+		iopmp_vdec: IOPMP_VDEC {
+			is_default_region;
+		};
+
+		iopmp_g2d: IOPMP_G2D {
+			is_default_region;
+		};
+
+		iopmp_fce: IOPMP_FCE {
+			is_default_region;
+		};
+
+		iopmp_npu: IOPMP_NPU {
+			is_default_region;
+		};
+
+		iopmp0_dpu: IOPMP0_DPU {
+			bypass_en;
+		};
+
+		iopmp1_dpu: IOPMP1_DPU {
+			bypass_en;
+		};
+
+		iopmp_gpu: IOPMP_GPU {
+			is_default_region;
+		};
+
+		iopmp_gmac1: IOPMP_GMAC1 {
+			is_default_region;
+		};
+
+		iopmp_gmac2: IOPMP_GMAC2 {
+			is_default_region;
+		};
+
+		iopmp_dmac: IOPMP_DMAC {
+			is_default_region;
+		};
+
+		iopmp_tee_dmac: IOPMP_TEE_DMAC {
+			is_default_region;
+		};
+
+		iopmp_dsp0: IOPMP_DSP0 {
+			is_default_region;
+		};
+
+		iopmp_dsp1: IOPMP_DSP1 {
+			is_default_region;
+		};
+	};
+
+	mbox_910t_client1: mbox_910t_client1 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "902";
+		mboxes = <&mbox_910t 1 0>;
+		status = "disabled";
+	};
+
+	mbox_910t_client2: mbox_910t_client2 {
+		compatible = "thead,light-mbox-client";
+		mbox-names = "906";
+		mboxes = <&mbox_910t 2 0>;
+		status = "disabled";
+	};
+
+	lightsound: lightsound@1 {
+		status = "okay";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "Light-Sound-Card";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/* I2S - AUDIO SYS CODEC 8156*/
+		simple-audio-card,dai-link@0 {
+			reg = <0>;
+			format = "i2s";
+			cpu {
+				sound-dai = <&i2s1 0>;
+			};
+			codec {
+				sound-dai = <&es8156_audio_codec>;
+			};
+		};
+
+		/* I2S - HDMI */
+		simple-audio-card,dai-link@1 {
+			reg = <1>;
+			format = "i2s";
+			cpu {
+				sound-dai = <&light_i2s 1>;
+			};
+			codec {
+				sound-dai = <&dummy_codec>;
+			};
+		};
+	};
+
+	wifi_pwrseq: wifi-pwrseq {
+		status = "okay";
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&gpio0_porta 20 1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_wireless_power>;
+	};
+
+	dummy_codec: dummy_codec {
+		#sound-dai-cells = <0>;
+		compatible = "thead,light-dummy-pcm";
+		status = "okay";
+		sound-name-prefix = "DUMMY";
+	};
+
+	vdd_5v: regulator-vdd-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+
+	vdd_1v8: regulator-vdd-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+		vin-supply = <&vdd_5v>;
+		status = "okay";
+	};
+
+	reg_vref_1v8: regulator-adc-verf {
+		compatible = "regulator-fixed";
+		regulator-name = "vref-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		status = "okay";
+	};
+
+	usb_vbus_en: regulator-usb-vbus-en {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_vbus_en";
+		gpio = <&gpio0_porta 27 0>;	/* GPIO_ACTIVE_HIGH: 0 */
+		enable-active-high;
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+
+	/* Select USB3.0 Type-A port */
+	usb_select: regulator-usb-select {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_select";
+		gpio = <&gpio2_porta 30 1>;	/* GPIO_ACTIVE_LOW: 1 */
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+
+	board_antenna: board-antenna {
+		status = "okay";
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1_porta 24 0>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-name = "board_antenna";
+	};
+
+	aon {
+		compatible = "thead,light-aon";
+		mbox-names = "aon";
+		mboxes = <&mbox_910t 1 0>;
+		status = "okay";
+
+		pd: light-aon-pd {
+			compatible = "thead,light-aon-pd";
+			#power-domain-cells = <1>;
+		};
+
+		aon_reg_dialog: light-dialog-reg {
+			compatible = "thead,light-dialog-pmic-ant";
+			status = "okay";
+
+			dvdd_cpu_reg: appcpu_dvdd {
+				regulator-name = "appcpu_dvdd";
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1570000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			dvddm_cpu_reg: appcpu_dvddm {
+				regulator-name = "appcpu_dvddm";
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1570000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_aon_reg: soc_dvdd18_aon {
+				regulator-name = "soc_dvdd18_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd33_usb3_reg: soc_avdd33_usb3 {
+				regulator-name = "soc_avdd33_usb3";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_aon_reg: soc_dvdd08_aon {
+				regulator-name = "soc_dvdd08_aon";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd08_ddr_reg: soc_dvdd08_ddr {
+				regulator-name = "soc_dvdd08_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v8_reg: soc_vdd_ddr_1v8 {
+				regulator-name = "soc_vdd_ddr_1v8";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_1v1_reg: soc_vdd_ddr_1v1 {
+				regulator-name = "soc_vdd_ddr_1v1";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd_ddr_0v6_reg: soc_vdd_ddr_0v6 {
+				regulator-name = "soc_vdd_ddr_0v6";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd18_ap_reg: soc_dvdd18_ap {
+				regulator-name = "soc_dvdd18_ap";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd08_mipi_hdmi_reg: soc_avdd08_mipi_hdmi {
+				regulator-name = "soc_avdd08_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_avdd18_mipi_hdmi_reg: soc_avdd18_mipi_hdmi {
+				regulator-name = "soc_avdd18_mipi_hdmi";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd33_emmc_reg: soc_vdd33_emmc {
+				regulator-name = "soc_vdd33_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_vdd18_emmc_reg: soc_vdd18_emmc {
+				regulator-name = "soc_vdd18_emmc";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dovdd18_scan_reg: soc_dovdd18_scan {
+				regulator-name = "soc_dovdd18_scan";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			soc_dvdd12_scan_reg: soc_dvdd12_scan {
+				regulator-name = "soc_dvdd12_scan";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+
+			soc_avdd28_scan_en_reg: soc_avdd28_scan_en {
+				regulator-name = "soc_avdd28_scan_en";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <3600000>;
+			};
+		};
+
+		c910_cpufreq {
+			compatible = "thead,light-mpw-cpufreq";
+			status = "okay";
+		};
+
+		test: light-aon-test {
+			compatible = "thead,light-aon-test";
+		};
+	};
+};
+
+&cmamem {
+	alloc-ranges = <0 0xe4000000 0 0x14000000>; // [0xE400_0000 ~ 0xF800_0000]
+};
+
+&resmem {
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	tee_mem: memory@1a000000 {
+		reg = <0x0 0x1a000000 0 0x4000000>;
+		no-map;
+	};
+	dsp0_mem: memory@20000000 {			/**0x2000_0000~0x2040_0000 4M**/
+		reg = <0x0 0x20000000 0x0 0x00280000	/* DSP FW code&data section 2.5M*/
+		       0x0 0x20280000 0x0 0x00001000	/* DSP communication area 4K*/
+		       0x0 0x20281000 0x0 0x00007000	/* Panic/log page 28K */
+		       0x0 0x20288000 0x0 0x00178000>;	/* DSP shared memory 1.5M-32K*/
+		no-map;
+	};
+	dsp1_mem: memory@20400000 {			/**0x2040_0000~0x2080_0000 4M**/
+		reg = <0x0 0x20400000 0x0 0x00280000	/* DSP FW code&data section */
+		       0x0 0x20680000 0x0 0x00001000	/* DSP communication area */
+		       0x0 0x20681000 0x0 0x00007000	/* Panic/log page*/
+		       0x0 0x20688000 0x0 0x00178000>;	/* DSP shared memory */
+		no-map;
+	};
+	vi_mem: framebuffer@0f800000 {
+		reg = <0x0 0x0F800000 0x0 0x05400000	/* vi_mem_pool_region[0]  84 MB (default) */
+		       0x0 0x14C00000 0x0 0x01D00000	/* vi_mem_pool_region[1]  29 MB */
+		       0x0 0x16900000 0x0 0x03200000>;	/* vi_mem_pool_region[2]  50 MB */
+		no-map;
+	};
+	facelib_mem: memory@22000000 {
+		reg = <0x0 0x22000000 0x0 0x10000000>;
+		no-map;
+	};
+};
+
+&adc {
+	vref-supply = <&reg_vref_1v8>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "disabled";
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	status = "disabled";
+};
+
+&audio_i2c0 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	es8156_audio_codec: es8156@9 {
+		#sound-dai-cells = <0>;
+		compatible = "everest,es8156";
+		reg = <0x09>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_audio_i2s1_mclk>;
+	};
+};
+
+&uart0 {
+	clock-frequency = <100000000>;
+};
+
+&gmac0 {
+	phy-mode = "rgmii-id";
+	rx-clk-delay = <0x00>; /* for RGMII */
+	tx-clk-delay = <0x00>; /* for RGMII */
+	phy-handle = <&phy_88E1111_0>;
+	status = "okay";
+
+	mdio0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy_88E1111_0: ethernet-phy@0 {
+			reg = <0x1>;
+		};
+	};
+};
+
+&gmac1 {
+	status = "disabled";
+};
+
+&emmc {
+	max-frequency = <198000000>;
+	non-removable;
+	mmc-hs400-1_8v;
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&sdhci0 {
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	wprtn_ignore;
+	status = "okay";
+};
+
+&sdhci1 {
+	status = "okay";
+	max-frequency = <198000000>;
+	bus-width = <4>;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <50>;
+	wprtn_ignore;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	brcmf: wifi@1 {
+		compatible = "brcm,bcm4329-fmac";
+		reg = <1>;
+	};
+};
+
+&padctrl0_apsys { /* right-pinctrl */
+	light-evb-padctrl0 {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+		pinctrl_uart0: uart0grp {
+			thead,pins = <
+				FM_UART0_TXD	0x0	0x72
+				FM_UART0_RXD	0x0	0x72
+			>;
+		};
+
+		pinctrl_spi0: spi0grp {
+			thead,pins = <
+				FM_SPI_CSN	0x3	0x20a
+				FM_SPI_SCLK	0x0	0x20a
+				FM_SPI_MISO	0x0	0x23a
+				FM_SPI_MOSI	0x0	0x23a
+			>;
+		};
+
+		pinctrl_qspi0: qspi0grp {
+			thead,pins = <
+				FM_QSPI0_SCLK	0x0	0x20f
+				FM_QSPI0_CSN0	0x3	0x20f
+				FM_QSPI0_D0_MOSI	0x0	0x23f
+				FM_QSPI0_D1_MISO	0x0	0x23f
+			>;
+		};
+
+		pinctrl_pwm: pwmgrp {
+			thead,pins = <
+				FM_QSPI0_D2_WP  0x1     0x208   /* pwm5 */
+				FM_QSPI0_CSN1   0x1     0x208   /* pwm2 */
+			>;
+		};
+	};
+};
+
+&padctrl1_apsys { /* left-pinctrl */
+	light-evb-padctrl1 {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+		pinctrl_uart3: uart3grp {
+			thead,pins = <
+				FM_UART3_TXD	0x0	0x72
+				FM_UART3_RXD	0x0	0x72
+			>;
+		};
+
+		pinctrl_uart4: uart4grp {
+			thead,pins = <
+				FM_UART4_TXD	0x0	0x72
+				FM_UART4_RXD	0x0	0x72
+				FM_UART4_CTSN	0x0	0x72
+				FM_UART4_RTSN	0x0	0x72
+			>;
+		};
+
+		pinctrl_qspi1: qspi1grp {
+			thead,pins = <
+				FM_QSPI1_SCLK	0x0	0x20a
+				FM_QSPI1_CSN0	0x3	0x20a
+				FM_QSPI1_D0_MOSI	0x0	0x23a
+				FM_QSPI1_D1_MISO	0x0	0x23a
+				FM_QSPI1_D2_WP	0x0	0x23a
+				FM_QSPI1_D3_HOLD	0x0	0x23a
+			>;
+		};
+
+		pinctrl_iso7816: iso7816grp {
+			thead,pins = <
+				FM_QSPI1_SCLK	0x1	0x208
+				FM_QSPI1_D0_MOSI	0x1	0x238
+				FM_QSPI1_D1_MISO	0x1	0x238
+				FM_QSPI1_D2_WP	0x1	0x238
+				FM_QSPI1_D3_HOLD	0x1	0x238
+			>;
+		};
+
+		pinctrl_wireless_power: wireless-power-group {
+			thead,pins = <
+				FM_GPIO0_20	0x0	0x23a
+			>;
+		};
+
+		pinctrl_wireless_host_wake: wireless-host-wake-group {
+			thead,pins = <
+				FM_GPIO0_21	0x0	0x21a
+			>;
+		};
+	};
+};
+
+&padctrl_aosys {
+	light-aon-padctrl {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+
+		pinctrl_audiopa1: audiopa1_grp {
+			thead,pins = <
+				FM_AUDIO_PA1	0x3	0x72
+			>;
+		};
+
+		pinctrl_audiopa2: audiopa2_grp {
+			thead,pins = <
+				FM_AUDIO_PA2	0x0	0x72
+			>;
+		};
+
+		pinctrl_volume: volume_grp {
+			thead,pins = <
+				FM_CPU_JTG_TDI	0x3	0x208
+				FM_CPU_JTG_TDO	0x3	0x208
+			>;
+		};
+	};
+};
+
+&padctrl_audiosys {
+	status = "okay";
+
+	light-audio-padctrl {
+		/*
+		 * Pin Configuration Node:
+		 * Format: <pin_id mux_node config>
+		 */
+
+		pinctrl_audio_i2s1_mclk: audio_i2s1_mclk_grp {
+			thead,pins = <
+				FM_AUDIO_IO_PA13	0x0	0x20a
+			>;
+		};
+	};
+};
+
+&xtensa_dsp {
+	status = "okay";
+};
+
+&xtensa_dsp0 {
+	status = "okay";
+	memory-region = <&dsp0_mem>;
+};
+
+&xtensa_dsp1{
+	status = "okay";
+	memory-region = <&dsp1_mem>;
+};
+
+&trng {
+	status = "disabled";
+};
+
+&eip_28 {
+	status = "okay";
+};
+
+&vdec {
+	status = "okay";
+};
+
+&venc {
+	status = "okay";
+};
+
+&isp_venc_shake {
+	status = "okay";
+};
+
+&vidmem {
+	status = "okay";
+	memory-region = <&vi_mem>;
+};
+
+&gpu {
+	status = "okay";
+};
+
+&npu {
+	vha_clk_rate = <1000000000>;
+	status = "okay";
+};
+
+&fce {
+	memory-region = <&facelib_mem>;
+	status = "okay";
+};
+
+&cpus {
+	c910_0: cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_1: cpu@1 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_2: cpu@2 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+
+	c910_3: cpu@3 {
+		operating-points = <
+			/* kHz    uV */
+			300000	650000
+			800000	700000
+			1500000	800000
+			1848000	1000000
+		>;
+		light,dvddm-operating-points = <
+			/* kHz   uV */
+			300000	800000
+			800000	800000
+			1500000	800000
+			1848000	1000000
+		>;
+	};
+};
+
+&dpu {
+	status = "okay";
+};
+
+/* DP1 --- HDMI0 */
+&dpu_enc1 {
+	status = "disabled";
+	ports {
+		/delete-node/ port@0;
+	};
+};
+
+&disp1_out {
+	remote-endpoint = <&hdmi_tx_in>;
+};
+
+&hdmi_tx {
+	status = "okay";
+
+	port@0 {
+		/* input */
+		hdmi_tx_in: endpoint {
+			remote-endpoint = <&disp1_out>;
+		};
+	};
+};
+
+&light_i2s {
+	status = "okay";
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+};
+
+&i2s0 {
+	status = "okay";
+};
+
+&i2s1 {
+	status = "okay";
+};
+
+&qspi0 {
+	status = "okay";
+	num-cs = <1>;
+	cs-gpios = <&gpio2_porta 3 0>; // GPIO_ACTIVE_HIGH: 0
+
+	spi_flash: spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-max-frequency = <50000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+		status = "okay";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			loader@0 {
+				label = "loader";
+				reg = <0x0 0x800000>;
+			};
+		};
+	};
+};
+
+&qspi1 {
+	status = "disabled";
+};

arch/riscv/boot/dts/thead/th1520.dtsi

@@ -8,6 +8,7 @@
 #include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-audio-pinctrl.h>
 #include <dt-bindings/pinctrl/light-fm-pinctrl-def.h>
+#include <dt-bindings/pinctrl/light.h>
 #include <dt-bindings/clock/light-fm-ap-clock.h>
 #include <dt-bindings/clock/light-vpsys.h>
 #include <dt-bindings/clock/light-vosys.h>
@@ -79,6 +80,11 @@
 		viv_video15 = &video15;
 	};
 
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x200000 0x0 0xffe00000>;
+	};
+
 	resmem: reserved-memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -156,7 +162,7 @@
 				};
 
 				dev_crit: trip2 {
-					temperature = <110000>;
+					temperature = <105000>;
 					hysteresis = <2000>;
 					type = "critical";
 				};
@@ -474,7 +480,7 @@
 		};
 	};
 
-	soc {
+	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -937,6 +943,8 @@
 			clocks = <&clk CLKGEN_PWM_PCLK>,
 			         <&clk CLKGEN_PWM_CCLK>;
 			clock-names = "pclk", "cclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_pwm>;
 		};
 
 		timer0: timer@ffefc32000 {
@@ -1131,6 +1139,8 @@
 		spi0: spi@ffe700c000 {
 			compatible = "snps,dw-apb-ssi";
 			reg = <0xff 0xe700c000 0x0 0x1000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_spi0>;
 			interrupt-parent = <&intc>;
 			interrupts = <54>;
             clocks = <&clk CLKGEN_SPI_SSI_CLK>,
@@ -1139,7 +1149,6 @@
 			num-cs = <2>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-			status = "disabled";
 		};
 
 		qspi0: spi@ffea000000 {
@@ -1154,12 +1163,13 @@
             clock-names = "sclk", "pclk";
 			#address-cells = <1>;
 			#size-cells = <0>;
-			status = "disabled";
 		};
 
 		qspi1: spi@fff8000000 {
 			compatible = "snps,dw-apb-ssi-quad";
 			reg = <0xff 0xf8000000 0x0 0x1000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_qspi1>;
 			interrupt-parent = <&intc>;
 			interrupts = <53>;
             clocks = <&clk CLKGEN_QSPI1_SSI_CLK>,
@@ -1167,7 +1177,6 @@
             clock-names = "sclk", "pclk";
 			#address-cells = <1>;
 			#size-cells = <0>;
-			status = "disabled";
 		};
 
 		g2d_opp_table:g2d-opp-table {
@@ -1186,7 +1195,7 @@
     		};
 		};
 
-		g2d: gc620@ffecc80000 {
+/*		g2d: gc620@ffecc80000 {
 			compatible = "thead,c910-gc620";
 			reg = <0xff 0xecc80000 0x0 0x40000>;
 			interrupt-parent = <&intc>;
@@ -1198,6 +1207,20 @@
 			clock-names = "pclk", "aclk", "cclk";
 			operating-points-v2 = <&g2d_opp_table>;
 			status = "okay";
+		};*/
+
+		g2d: gpu@13040000 {
+			compatible = "vivante,gc";
+			reg = <0xff 0xecc80000 0x0 0x40000>;
+
+			clocks = <&vpsys_clk_gate LIGHT_VPSYS_G2D_PCLK>,
+				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_ACLK>,
+				 <&vpsys_clk_gate LIGHT_VPSYS_G2D_CCLK>;
+			clock-names = "bus", "core", "shader";
+
+			interrupt-parent = <&intc>;
+			interrupts = <101>;
+			operating-points-v2 = <&g2d_opp_table>;
 		};
 
 		dsi0: dw-mipi-dsi0@ffef500000 {
@@ -2366,67 +2389,56 @@
 		};
 
 		bm_csi0: csi@ffe4000000{ //CSI2
-			compatible = "thead,light-bm-csi";
-			reg = < 0xff 0xe4000000 0x0 0x10000>;
-			interrupt-parent = <&intc>;
-			interrupts = <128>;
-			dphyglueiftester = <0x180>;
-			sysreg_mipi_csi_ctrl = <0x140>;
-			clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
-			clock-names = "pclk", "pixclk", "cfg_clk";
-			phy_name = "CSI_4LANE";
-			status = "disabled";
+		    compatible = "thead,light-bm-csi";
+		    reg = < 0xff 0xe4000000 0x0 0x10000>;
+		    interrupt-parent = <&intc>;
+		    interrupts = <128>;
+		    dphyglueiftester = <0x180>;
+		    sysreg_mipi_csi_ctrl = <0x140>;
+		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_PIXCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI0_CFG_CLK>;
+		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    phy_name = "CSI_4LANE";
+		    status = "disabled";
 		};
 
 		csia_reg: visys-reg@ffe4020000 {
-			compatible = "thead,light-visys-reg", "syscon";
-			reg = < 0xff 0xe4020000 0x0 0x10000>;
-			status = "okay";
-		};
-
-		csib_reg: visys-reg@ffe4010000{
-			compatible = "thead,light-visys-reg", "syscon";
-			reg = < 0xff 0xe4010000 0x0 0x10000>;
-			status = "okay";
+		    compatible = "thead,light-visys-reg", "syscon";
+		    reg = < 0xff 0xe4020000 0x0 0x10000>;
+		    status = "okay";
 		};
 
 		bm_csi1: csi@ffe4010000{ //CSI2X2_B
-			compatible = "thead,light-bm-csi";
-			reg = < 0xff 0xe4010000 0x0 0x10000>;
-			interrupt-parent = <&intc>;
-			interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
-			dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
-			sysreg_mipi_csi_ctrl = <0x148>;
-			visys-regmap = <&visys_reg>;
-			csia-regmap = <&csia_reg>;
-			clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
-			clock-names = "pclk", "pixclk", "cfg_clk";
-			phy_name = "CSI_B";
-			status = "disabled";
+		    compatible = "thead,light-bm-csi";
+		    reg = < 0xff 0xe4010000 0x0 0x10000>;
+		    interrupt-parent = <&intc>;
+		    interrupts = <126>; // 110 + 16 int_mipi_csi2x2_int0
+		    dphyglueiftester = <0x182>; // for FPGA PHY only. ASIC not needed.
+		    sysreg_mipi_csi_ctrl = <0x148>;
+		    visys-regmap = <&visys_reg>;
+		    csia-regmap = <&csia_reg>;
+		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
+		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    phy_name = "CSI_B";
+		    status = "disabled";
 		};
 
 		bm_csi2: csi@ffe4020000{ //CSI2X2_A
-			compatible = "thead,light-bm-csi";
-			reg = < 0xff 0xe4020000 0x0 0x10000>;
-			interrupt-parent = <&intc>;
-			interrupts = <127>;
-			dphyglueiftester = <0x184>;
-			sysreg_mipi_csi_ctrl = <0x144>;
-			sysreg_mipi_csi_fifo_ctrl = <0x14c>;
-			csib-regmap = <&csib_reg>;
-			clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_PIXCLK>,
-			         <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI1_CFG_CLK>;
-			clock-names = "pclk", "pixclk", "cfg_clk", "pclk1", "pixclk1", "cfg_clk1";
-			phy_name = "CSI_A";
-			status = "disabled";
+		    compatible = "thead,light-bm-csi";
+		    reg = < 0xff 0xe4020000 0x0 0x10000>;
+		    interrupt-parent = <&intc>;
+		    interrupts = <127>;
+		    dphyglueiftester = <0x184>;
+		    sysreg_mipi_csi_ctrl = <0x144>;
+		    clocks = <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_PIXCLK>,
+		             <&visys_clk_gate LIGHT_CLKGEN_MIPI_CSI2_CFG_CLK>;
+		    clock-names = "pclk", "pixclk", "cfg_clk";
+		    phy_name = "CSI_A";
+		    status = "disabled";
 		};
 
 		bm_isp0: bm_isp@ffe4100000 {
@@ -2609,7 +2621,6 @@
 			interrupts = <156>;
 			#cooling-cells = <2>;
 			firmware-name = "xrp0.elf";
-			power-domains = <&pd LIGHT_AON_DSP0_PD>;
 			clocks = <&dspsys_clk_gate CLKGEN_DSP0_PCLK>,
 			<&dspsys_clk_gate CLKGEN_DSP0_CCLK>;
 			clock-names = "pclk", "cclk";
@@ -2651,7 +2662,6 @@
 			interrupts = <157>;
 			firmware-name = "xrp1.elf";
 			#cooling-cells = <2>;
-			power-domains = <&pd LIGHT_AON_DSP1_PD>;
 			clocks = <&dspsys_clk_gate CLKGEN_DSP1_PCLK>,
 			<&dspsys_clk_gate CLKGEN_DSP1_CCLK>;
 			clock-names = "pclk", "cclk";
@@ -2823,10 +2833,7 @@
 			#clock-cells = <1>;
 			status = "okay";
 		};
-		light_regdump: light-regdump {
-			compatible = "thead,light-regdump";
-			status = "disabled";
-		};
+
 	};
 
 };

arch/riscv/configs/light-android_defconfig

@@ -282,7 +282,6 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
 CONFIG_PM_WAKELOCKS_LIMIT=0

arch/riscv/configs/light_defconfig

@@ -3,10 +3,6 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_XACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
@@ -35,7 +31,7 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_RISV_THEAD_LIGHT_CPUFREQ=y
 CONFIG_VIRTUALIZATION=y
@@ -341,7 +337,6 @@ CONFIG_OVERLAY_FS=y
 CONFIG_LOCKUP_DETECTOR=y
 CONFIG_SOFTLOCKUP_DETECTOR=y
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
-CONFIG_SCHED_INFO=y
 CONFIG_PM=y
 # CONFIG_SUSPEND is not set
 # CONFIG_PM_SLEEP is not set
@@ -356,5 +351,4 @@ CONFIG_ENERGY_MODEL=y
 # CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
 CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
 CONFIG_DEVFREQ_THERMAL=y
-CONFIG_THERMAL_STATISTICS=y
 

arch/riscv/include/asm/cmpxchg.h

@@ -396,4 +396,22 @@ static inline ulong __xchg16_relaxed(ulong new, void *ptr)
 	cmpxchg_relaxed((ptr), (o), (n));				\
 })
 
+#define cmpxchg64_relaxed(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_relaxed((ptr), (o), (n));				\
+})
+
+#define cmpxchg64_acquire(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_acquire((ptr), (o), (n));				\
+})
+
+#define cmpxchg64_release(ptr, o, n)				\
+({									\
+	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
+	cmpxchg_release((ptr), (o), (n));				\
+})
+
 #endif /* _ASM_RISCV_CMPXCHG_H */

arch/riscv/include/asm/csr.h

@@ -26,19 +26,11 @@
 
 #define SR_VS_OFF	_AC(0x00000000, UL)
 
-#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
-#define SR_VS		_AC(0x00000600, UL) /* Vector Status */
-#define SR_VS_INITIAL	_AC(0x00000200, UL)
-#define SR_VS_CLEAN	_AC(0x00000400, UL)
-#define SR_VS_DIRTY	_AC(0x00000600, UL)
-#else
 #define SR_VS		_AC(0x01800000, UL) /* Vector Status */
 #define SR_VS_INITIAL	_AC(0x00800000, UL)
 #define SR_VS_CLEAN	_AC(0x01000000, UL)
 #define SR_VS_DIRTY	_AC(0x01800000, UL)
 
-#endif
-
 #define SR_XS		_AC(0x00018000, UL) /* Extension Status */
 #define SR_XS_OFF	_AC(0x00000000, UL)
 #define SR_XS_INITIAL	_AC(0x00008000, UL)

arch/riscv/kernel/vector.S

@@ -20,14 +20,6 @@
 #include <asm/csr.h>
 #include <asm/asm-offsets.h>
 
-#if (defined(CONFIG_VECTOR_1_0) && defined(__THEAD_VERSION__))
-#define V_ST	vse8.v
-#define V_LD	vle8.v
-#else
-#define V_ST	vsb.v
-#define V_LD	vlb.v
-#endif
-
 ENTRY(__vstate_save)
 	li	a2,  TASK_THREAD_V0
 	add	a0,  a0, a2
@@ -46,81 +38,14 @@ ENTRY(__vstate_save)
 	csrr	t0,  CSR_VTYPE
 	sd	t0,  TASK_THREAD_VTYPE_V0(a0)
 
-#ifdef CONFIG_VLEN_256
-	vsetvli	t0, x0, e8,m1
-	V_ST	v0,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v1,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v2,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v3,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v4,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v5,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v6,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v7,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v8,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v9,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v10, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v11, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v12, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v13, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v14, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v15, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v16, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v17, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v18, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v19, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v20, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v21, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v22, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v23, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v24, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v25, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v26, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v27, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v28, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v29, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v30, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_ST	v31, (a0)
-#else
-	vsetvli	t0, x0, e8,m8
-	V_ST	v0,  (a0)
+	.word 0x003072d7 	/* vsetvli	t0, x0, e8,m8 	*/
+	.word 0x02050027 	/* vsb.v	v0,  (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v8,  (a0)
+	.word 0x02050427 	/* vsb.v	v8,  (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v16, (a0)
+	.word 0x02050827 	/* vsb.v	v16, (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_ST	v24, (a0)
-#endif
+	.word 0x02050c27 	/* vsb.v	v24, (a0) 	*/
 
 	csrc	sstatus, t1
 	ret
@@ -134,99 +59,23 @@ ENTRY(__vstate_restore)
 	li	t1, (SR_VS | SR_FS)
 	csrs	sstatus, t1
 
-#ifdef CONFIG_VLEN_256
-	vsetvli	t0, x0, e8,m1
-	V_LD	v0,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v1,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v2,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v3,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v4,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v5,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v6,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v7,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v8,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v9,  (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v10, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v11, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v12, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v13, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v14, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v15, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v16, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v17, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v18, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v19, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v20, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v21, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v22, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v23, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v24, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v25, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v26, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v27, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v28, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v29, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v30, (a0)
-	addi	a0, a0, RISCV_VECTOR_VLENB
-	V_LD	v31, (a0)
-#else
-	vsetvli	t0, x0, e8,m8
-	V_LD	v0,  (a0)
+	.word 0x003072d7	/* vsetvli	t0, x0, e8,m8 	*/
+	.word 0x12050007	/* vlb.v	v0,  (a0) 	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v8,  (a0)
+	.word 0x12050407	/* vlb.v	v8,  (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v16, (a0)
+	.word 0x12050807 	/* vlb.v	v16, (a0)	*/
 	addi	a0, a0, RISCV_VECTOR_VLENB*8
-	V_LD	v24, (a0)
-#endif
+	.word 0x12050c07	/* vlb.v	v24, (a0)	*/
 
 	mv	a0,  t2
-	ld	t0,  TASK_THREAD_VXSAT_V0(a0)
-	csrw	CSR_VXSAT, t0
 	ld	t0,  TASK_THREAD_VXRM_V0(a0)
 	csrw	CSR_VXRM, t0
 	ld	t0,  TASK_THREAD_VL_V0(a0)
 	ld	t2,  TASK_THREAD_VTYPE_V0(a0)
-#ifdef CONFIG_VECTOR_EMU
-	srli	t3, t2, 63
-	bne	t3,zero,1f
-#endif
-	vsetvl	t3, t0, t2
-#ifdef CONFIG_VECTOR_EMU
-	j	2f
-1:	vsetvli zero,zero,e64,m2,d1
-2:
-#endif
+
+	.word 0x8072fe57 	/* vsetvl	t3, t0, t2	*/
+
 	/* vsetvl & vsetvli would reset vstart to zero */
 	ld	t0,  TASK_THREAD_VSTART_V0(a0)
 	csrw	CSR_VSTART, t0

drivers/Kconfig

@@ -8,6 +8,7 @@ source "drivers/eisa/Kconfig"
 source "drivers/pci/Kconfig"
 source "drivers/pcmcia/Kconfig"
 source "drivers/rapidio/Kconfig"
+source "drivers/nna/Kconfig"
 
 
 source "drivers/base/Kconfig"

drivers/Makefile

@@ -45,6 +45,9 @@ obj-$(CONFIG_VIRTIO)		+= virtio/
 obj-$(CONFIG_VDPA)		+= vdpa/
 obj-$(CONFIG_XEN)		+= xen/
 
+# npu-ax3386-gpl driver
+obj-y				+= nna/
+
 # regulators early, since some subsystems rely on them to initialize
 obj-$(CONFIG_REGULATOR)		+= regulator/
 

drivers/bluetooth/Kconfig

@@ -115,14 +115,6 @@ config BT_HCIUART_H4
 
 	  Say Y here to compile support for HCI UART (H4) protocol.
 
-config BT_HCIUART_RTL3WIRE
-	bool "Realtek Three-wire UART (H5) protocol support"
-	depends on BT_HCIUART
-	help
-		Realtek Three-wire UART (H5) transport layer makes it possible
-		to use Realtek Bluetooth controller with Three-wire UART.
-		Say Y here to compile support for Realtek Three-wire UART.
-
 config BT_HCIUART_NOKIA
 	tristate "UART Nokia H4+ protocol support"
 	depends on BT_HCIUART
@@ -433,4 +425,6 @@ config BT_HCIRSI
 	  Say Y here to compile support for HCI over Redpine into the
 	  kernel or say M to compile as a module.
 
+source "drivers/bluetooth/rtkbt/Kconfig"
+
 endmenu

drivers/bluetooth/Makefile

@@ -45,6 +45,6 @@ hci_uart-$(CONFIG_BT_HCIUART_BCM)	+= hci_bcm.o
 hci_uart-$(CONFIG_BT_HCIUART_QCA)	+= hci_qca.o
 hci_uart-$(CONFIG_BT_HCIUART_AG6XX)	+= hci_ag6xx.o
 hci_uart-$(CONFIG_BT_HCIUART_MRVL)	+= hci_mrvl.o
-hci_uart-y += rtk_coex.o
-hci_uart-$(CONFIG_BT_HCIUART_RTL3WIRE) += hci_rtk_h5.o
 hci_uart-objs				:= $(hci_uart-y)
+
+obj-$(CONFIG_BT_RTKBT) += rtkbt/

drivers/bluetooth/hci_bcm.c

@@ -654,7 +654,6 @@ static const struct h4_recv_pkt bcm_recv_pkts[] = {
 	{ H4_RECV_ACL,      .recv = hci_recv_frame },
 	{ H4_RECV_SCO,      .recv = hci_recv_frame },
 	{ H4_RECV_EVENT,    .recv = hci_recv_frame },
-	{ H4_RECV_ISO,      .recv = hci_recv_frame },
 	{ BCM_RECV_LM_DIAG, .recv = hci_recv_diag  },
 	{ BCM_RECV_NULL,    .recv = hci_recv_diag  },
 	{ BCM_RECV_TYPE49,  .recv = hci_recv_diag  },

drivers/bluetooth/hci_h4.c

@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
 /*
  *
  *  Bluetooth HCI UART driver
@@ -5,25 +6,10 @@
  *  Copyright (C) 2000-2001  Qualcomm Incorporated
  *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
  *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
  */
 
 #include <linux/module.h>
+
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/types.h>
@@ -31,6 +17,7 @@
 #include <linux/interrupt.h>
 #include <linux/ptrace.h>
 #include <linux/poll.h>
+
 #include <linux/slab.h>
 #include <linux/tty.h>
 #include <linux/errno.h>
@@ -38,32 +25,18 @@
 #include <linux/signal.h>
 #include <linux/ioctl.h>
 #include <linux/skbuff.h>
+#include <asm/unaligned.h>
+
 #include <net/bluetooth/bluetooth.h>
 #include <net/bluetooth/hci_core.h>
-#include <linux/version.h>
 
 #include "hci_uart.h"
 
-#ifdef BTCOEX
-#include "rtk_coex.h"
-#endif
-
-//#define VERSION "1.2"
-
 struct h4_struct {
-	unsigned long rx_state;
-	unsigned long rx_count;
 	struct sk_buff *rx_skb;
 	struct sk_buff_head txq;
 };
 
-/* H4 receiver States */
-#define H4_W4_PACKET_TYPE	0
-#define H4_W4_EVENT_HDR		1
-#define H4_W4_ACL_HDR		2
-#define H4_W4_SCO_HDR		3
-#define H4_W4_DATA		4
-
 /* Initialize protocol */
 static int h4_open(struct hci_uart *hu)
 {
@@ -71,7 +44,7 @@ static int h4_open(struct hci_uart *hu)
 
 	BT_DBG("hu %p", hu);
 
-	h4 = kzalloc(sizeof(*h4), GFP_ATOMIC);
+	h4 = kzalloc(sizeof(*h4), GFP_KERNEL);
 	if (!h4)
 		return -ENOMEM;
 
@@ -98,8 +71,6 @@ static int h4_close(struct hci_uart *hu)
 {
 	struct h4_struct *h4 = hu->priv;
 
-	hu->priv = NULL;
-
 	BT_DBG("hu %p", hu);
 
 	skb_queue_purge(&h4->txq);
@@ -112,7 +83,7 @@ static int h4_close(struct hci_uart *hu)
 	return 0;
 }
 
-/* Enqueue frame for transmittion (padding, crc, etc) */
+/* Enqueue frame for transmission (padding, crc, etc) */
 static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 {
 	struct h4_struct *h4 = hu->priv;
@@ -120,174 +91,34 @@ static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 	BT_DBG("hu %p skb %p", hu, skb);
 
 	/* Prepend skb with frame type */
-	memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
+	memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
 	skb_queue_tail(&h4->txq, skb);
 
 	return 0;
 }
 
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-static inline int h4_check_data_len(struct h4_struct *h4, int len)
-#else
-static inline int h4_check_data_len(struct hci_dev *hdev, struct h4_struct *h4, int len)
-#endif
-{
-	register int room = skb_tailroom(h4->rx_skb);
-
-	BT_DBG("len %d room %d", len, room);
-
-	if (!len) {
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-		hci_recv_frame(h4->rx_skb);
-#else
-		hci_recv_frame(hdev, h4->rx_skb);
-#endif
-	} else if (len > room) {
-		BT_ERR("Data length is too large");
-		kfree_skb(h4->rx_skb);
-	} else {
-		h4->rx_state = H4_W4_DATA;
-		h4->rx_count = len;
-		return len;
-	}
-
-	h4->rx_state = H4_W4_PACKET_TYPE;
-	h4->rx_skb   = NULL;
-	h4->rx_count = 0;
-
-	return 0;
-}
+static const struct h4_recv_pkt h4_recv_pkts[] = {
+	{ H4_RECV_ACL,   .recv = hci_recv_frame },
+	{ H4_RECV_SCO,   .recv = hci_recv_frame },
+	{ H4_RECV_EVENT, .recv = hci_recv_frame },
+	{ H4_RECV_ISO,   .recv = hci_recv_frame },
+};
 
 /* Recv data */
-static int h4_recv(struct hci_uart *hu, void *data, int count)
+static int h4_recv(struct hci_uart *hu, const void *data, int count)
 {
 	struct h4_struct *h4 = hu->priv;
-	register char *ptr;
-	struct hci_event_hdr *eh;
-	struct hci_acl_hdr   *ah;
-	struct hci_sco_hdr   *sh;
-	register int len, type, dlen;
 
-	BT_DBG("hu %p count %d rx_state %ld rx_count %ld", 
-			hu, count, h4->rx_state, h4->rx_count);
+	if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
+		return -EUNATCH;
 
-	ptr = data;
-	while (count) {
-		if (h4->rx_count) {
-			len = min_t(unsigned int, h4->rx_count, count);
-			memcpy(skb_put(h4->rx_skb, len), ptr, len);
-			h4->rx_count -= len; count -= len; ptr += len;
-
-			if (h4->rx_count)
-				continue;
-
-			switch (h4->rx_state) {
-			case H4_W4_DATA:
-				BT_DBG("Complete data");
-#ifdef BTCOEX
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_EVENT_PKT)
-					rtk_btcoex_parse_event(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-
-				if(bt_cb(h4->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
-					rtk_btcoex_parse_l2cap_data_rx(
-							h4->rx_skb->data,
-							h4->rx_skb->len);
-#endif
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				hci_recv_frame(h4->rx_skb);
-#else
-				hci_recv_frame(hu->hdev, h4->rx_skb);
-#endif
-
-				h4->rx_state = H4_W4_PACKET_TYPE;
-				h4->rx_skb = NULL;
-				continue;
-
-			case H4_W4_EVENT_HDR:
-				eh = hci_event_hdr(h4->rx_skb);
-
-				BT_DBG("Event header: evt 0x%2.2x plen %d", eh->evt, eh->plen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, eh->plen);
-#else
-				h4_check_data_len(hu->hdev, h4, eh->plen);
-#endif
-				continue;
-
-			case H4_W4_ACL_HDR:
-				ah = hci_acl_hdr(h4->rx_skb);
-				dlen = __le16_to_cpu(ah->dlen);
-
-				BT_DBG("ACL header: dlen %d", dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, dlen);
-#endif
-				continue;
-
-			case H4_W4_SCO_HDR:
-				sh = hci_sco_hdr(h4->rx_skb);
-
-				BT_DBG("SCO header: dlen %d", sh->dlen);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-				h4_check_data_len(h4, sh->dlen);
-#else
-				h4_check_data_len(hu->hdev, h4, sh->dlen);
-#endif
-				continue;
-			}
-		}
-
-		/* H4_W4_PACKET_TYPE */
-		switch (*ptr) {
-		case HCI_EVENT_PKT:
-			BT_DBG("Event packet");
-			h4->rx_state = H4_W4_EVENT_HDR;
-			h4->rx_count = HCI_EVENT_HDR_SIZE;
-			type = HCI_EVENT_PKT;
-			break;
-
-		case HCI_ACLDATA_PKT:
-			BT_DBG("ACL packet");
-			h4->rx_state = H4_W4_ACL_HDR;
-			h4->rx_count = HCI_ACL_HDR_SIZE;
-			type = HCI_ACLDATA_PKT;
-			break;
-
-		case HCI_SCODATA_PKT:
-			BT_DBG("SCO packet");
-			h4->rx_state = H4_W4_SCO_HDR;
-			h4->rx_count = HCI_SCO_HDR_SIZE;
-			type = HCI_SCODATA_PKT;
-			break;
-
-		default:
-			BT_ERR("Unknown HCI packet type %2.2x", (__u8)*ptr);
-			hu->hdev->stat.err_rx++;
-			ptr++; count--;
-			continue;
-		};
-
-		ptr++; count--;
-
-		/* Allocate packet */
-		h4->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
-		if (!h4->rx_skb) {
-			BT_ERR("Can't allocate mem for new packet");
-			h4->rx_state = H4_W4_PACKET_TYPE;
-			h4->rx_count = 0;
-			return -ENOMEM;
-		}
-
-		h4->rx_skb->dev = (void *) hu->hdev;
-		bt_cb(h4->rx_skb)->pkt_type = type;
+	h4->rx_skb = h4_recv_buf(hu->hdev, h4->rx_skb, data, count,
+				 h4_recv_pkts, ARRAY_SIZE(h4_recv_pkts));
+	if (IS_ERR(h4->rx_skb)) {
+		int err = PTR_ERR(h4->rx_skb);
+		bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
+		h4->rx_skb = NULL;
+		return err;
 	}
 
 	return count;
@@ -299,8 +130,9 @@ static struct sk_buff *h4_dequeue(struct hci_uart *hu)
 	return skb_dequeue(&h4->txq);
 }
 
-static struct hci_uart_proto h4p = {
+static const struct hci_uart_proto h4p = {
 	.id		= HCI_UART_H4,
+	.name		= "H4",
 	.open		= h4_open,
 	.close		= h4_close,
 	.recv		= h4_recv,
@@ -311,17 +143,132 @@ static struct hci_uart_proto h4p = {
 
 int __init h4_init(void)
 {
-	int err = hci_uart_register_proto(&h4p);
-
-	if (!err)
-		BT_INFO("HCI H4 protocol initialized");
-	else
-		BT_ERR("HCI H4 protocol registration failed");
-
-	return err;
+	return hci_uart_register_proto(&h4p);
 }
 
 int __exit h4_deinit(void)
 {
 	return hci_uart_unregister_proto(&h4p);
 }
+
+struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
+			    const unsigned char *buffer, int count,
+			    const struct h4_recv_pkt *pkts, int pkts_count)
+{
+	struct hci_uart *hu = hci_get_drvdata(hdev);
+	u8 alignment = hu->alignment ? hu->alignment : 1;
+
+	/* Check for error from previous call */
+	if (IS_ERR(skb))
+		skb = NULL;
+
+	while (count) {
+		int i, len;
+
+		/* remove padding bytes from buffer */
+		for (; hu->padding && count > 0; hu->padding--) {
+			count--;
+			buffer++;
+		}
+		if (!count)
+			break;
+
+		if (!skb) {
+			for (i = 0; i < pkts_count; i++) {
+				if (buffer[0] != (&pkts[i])->type)
+					continue;
+
+				skb = bt_skb_alloc((&pkts[i])->maxlen,
+						   GFP_ATOMIC);
+				if (!skb)
+					return ERR_PTR(-ENOMEM);
+
+				hci_skb_pkt_type(skb) = (&pkts[i])->type;
+				hci_skb_expect(skb) = (&pkts[i])->hlen;
+				break;
+			}
+
+			/* Check for invalid packet type */
+			if (!skb)
+				return ERR_PTR(-EILSEQ);
+
+			count -= 1;
+			buffer += 1;
+		}
+
+		len = min_t(uint, hci_skb_expect(skb) - skb->len, count);
+		skb_put_data(skb, buffer, len);
+
+		count -= len;
+		buffer += len;
+
+		/* Check for partial packet */
+		if (skb->len < hci_skb_expect(skb))
+			continue;
+
+		for (i = 0; i < pkts_count; i++) {
+			if (hci_skb_pkt_type(skb) == (&pkts[i])->type)
+				break;
+		}
+
+		if (i >= pkts_count) {
+			kfree_skb(skb);
+			return ERR_PTR(-EILSEQ);
+		}
+
+		if (skb->len == (&pkts[i])->hlen) {
+			u16 dlen;
+
+			switch ((&pkts[i])->lsize) {
+			case 0:
+				/* No variable data length */
+				dlen = 0;
+				break;
+			case 1:
+				/* Single octet variable length */
+				dlen = skb->data[(&pkts[i])->loff];
+				hci_skb_expect(skb) += dlen;
+
+				if (skb_tailroom(skb) < dlen) {
+					kfree_skb(skb);
+					return ERR_PTR(-EMSGSIZE);
+				}
+				break;
+			case 2:
+				/* Double octet variable length */
+				dlen = get_unaligned_le16(skb->data +
+							  (&pkts[i])->loff);
+				hci_skb_expect(skb) += dlen;
+
+				if (skb_tailroom(skb) < dlen) {
+					kfree_skb(skb);
+					return ERR_PTR(-EMSGSIZE);
+				}
+				break;
+			default:
+				/* Unsupported variable length */
+				kfree_skb(skb);
+				return ERR_PTR(-EILSEQ);
+			}
+
+			if (!dlen) {
+				hu->padding = (skb->len - 1) % alignment;
+				hu->padding = (alignment - hu->padding) % alignment;
+
+				/* No more data, complete frame */
+				(&pkts[i])->recv(hdev, skb);
+				skb = NULL;
+			}
+		} else {
+			hu->padding = (skb->len - 1) % alignment;
+			hu->padding = (alignment - hu->padding) % alignment;
+
+			/* Complete frame */
+			(&pkts[i])->recv(hdev, skb);
+			skb = NULL;
+		}
+	}
+
+	return skb;
+}
+EXPORT_SYMBOL_GPL(h4_recv_buf);

drivers/bluetooth/hci_uart.h

@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
  *
  *  Bluetooth HCI UART driver
@@ -5,50 +6,12 @@
  *  Copyright (C) 2000-2001  Qualcomm Incorporated
  *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
  *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
- *
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
  */
-#include <linux/version.h>
-#include <net/bluetooth/bluetooth.h>
-#include <net/bluetooth/hci_core.h>
-
-/* #define HCI_VERSION_CODE KERNEL_VERSION(3, 14, 41) */
-#define HCI_VERSION_CODE LINUX_VERSION_CODE
 
 #ifndef N_HCI
 #define N_HCI	15
 #endif
 
-#ifndef CONFIG_BT_HCIUART_H4
-#define CONFIG_BT_HCIUART_H4
-#endif
-
-#define BTCOEX
-
-/* Send host sleep notification to Controller */
-#define WOBT_NOTIFY		0	/* 1  enable; 0  disable */
-
-/* Send LE whitelist only for Background scan parameters */
-#define WOBT_NOTIFY_BG_SCAN_LE_WHITELIST_ONLY	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
-/* RTKBT Power-on Whitelist for sideband wake-up by LE Advertising from Remote.
-* Note that it's necessary to apply TV FW Patch. */
-#define RTKBT_TV_POWERON_WHITELIST	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
-
 /* Ioctls */
 #define HCIUARTSETPROTO		_IOW('U', 200, int)
 #define HCIUARTGETPROTO		_IOR('U', 201, int)
@@ -57,7 +20,7 @@
 #define HCIUARTGETFLAGS		_IOR('U', 204, int)
 
 /* UART protocols */
-#define HCI_UART_MAX_PROTO	6
+#define HCI_UART_MAX_PROTO	12
 
 #define HCI_UART_H4	0
 #define HCI_UART_BCSP	1
@@ -65,6 +28,12 @@
 #define HCI_UART_H4DS	3
 #define HCI_UART_LL	4
 #define HCI_UART_ATH3K	5
+#define HCI_UART_INTEL	6
+#define HCI_UART_BCM	7
+#define HCI_UART_QCA	8
+#define HCI_UART_AG6XX	9
+#define HCI_UART_NOKIA	10
+#define HCI_UART_MRVL	11
 
 #define HCI_UART_RAW_DEVICE	0
 #define HCI_UART_RESET_ON_INIT	1
@@ -74,42 +43,46 @@
 #define HCI_UART_VND_DETECT	5
 
 struct hci_uart;
+struct serdev_device;
 
 struct hci_uart_proto {
 	unsigned int id;
+	const char *name;
+	unsigned int manufacturer;
+	unsigned int init_speed;
+	unsigned int oper_speed;
 	int (*open)(struct hci_uart *hu);
 	int (*close)(struct hci_uart *hu);
 	int (*flush)(struct hci_uart *hu);
-	int (*recv)(struct hci_uart *hu, void *data, int len);
+	int (*setup)(struct hci_uart *hu);
+	int (*set_baudrate)(struct hci_uart *hu, unsigned int speed);
+	int (*recv)(struct hci_uart *hu, const void *data, int len);
 	int (*enqueue)(struct hci_uart *hu, struct sk_buff *skb);
 	struct sk_buff *(*dequeue)(struct hci_uart *hu);
 };
 
 struct hci_uart {
 	struct tty_struct	*tty;
+	struct serdev_device	*serdev;
 	struct hci_dev		*hdev;
 	unsigned long		flags;
 	unsigned long		hdev_flags;
 
+	struct work_struct	init_ready;
 	struct work_struct	write_work;
-	struct workqueue_struct *hci_uart_wq;
 
-	struct hci_uart_proto	*proto;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)
-	struct percpu_rw_semaphore proto_lock; /* Stop work for proto close */
-#else
-	struct rw_semaphore proto_lock;
-#endif
+	const struct hci_uart_proto *proto;
+	struct percpu_rw_semaphore proto_lock;	/* Stop work for proto close */
 	void			*priv;
 
-	struct semaphore tx_sem;	/* semaphore for tx */
-
 	struct sk_buff		*tx_skb;
 	unsigned long		tx_state;
 
-#if WOBT_NOTIFY
-	struct notifier_block pm_notify_block;
-#endif
+	unsigned int init_speed;
+	unsigned int oper_speed;
+
+	u8			alignment;
+	u8			padding;
 };
 
 /* HCI_UART proto flag bits */
@@ -121,20 +94,108 @@ struct hci_uart {
 #define HCI_UART_SENDING	1
 #define HCI_UART_TX_WAKEUP	2
 
-extern int hci_uart_register_proto(struct hci_uart_proto *p);
-extern int hci_uart_unregister_proto(struct hci_uart_proto *p);
-extern int hci_uart_tx_wakeup(struct hci_uart *hu);
+int hci_uart_register_proto(const struct hci_uart_proto *p);
+int hci_uart_unregister_proto(const struct hci_uart_proto *p);
+int hci_uart_register_device(struct hci_uart *hu, const struct hci_uart_proto *p);
+void hci_uart_unregister_device(struct hci_uart *hu);
+
+int hci_uart_tx_wakeup(struct hci_uart *hu);
+int hci_uart_wait_until_sent(struct hci_uart *hu);
+int hci_uart_init_ready(struct hci_uart *hu);
+void hci_uart_init_work(struct work_struct *work);
+void hci_uart_set_baudrate(struct hci_uart *hu, unsigned int speed);
+bool hci_uart_has_flow_control(struct hci_uart *hu);
+void hci_uart_set_flow_control(struct hci_uart *hu, bool enable);
+void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed,
+			 unsigned int oper_speed);
 
 #ifdef CONFIG_BT_HCIUART_H4
-extern int h4_init(void);
-extern int h4_deinit(void);
+int h4_init(void);
+int h4_deinit(void);
+
+struct h4_recv_pkt {
+	u8  type;	/* Packet type */
+	u8  hlen;	/* Header length */
+	u8  loff;	/* Data length offset in header */
+	u8  lsize;	/* Data length field size */
+	u16 maxlen;	/* Max overall packet length */
+	int (*recv)(struct hci_dev *hdev, struct sk_buff *skb);
+};
+
+#define H4_RECV_ACL \
+	.type = HCI_ACLDATA_PKT, \
+	.hlen = HCI_ACL_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 2, \
+	.maxlen = HCI_MAX_FRAME_SIZE \
+
+#define H4_RECV_SCO \
+	.type = HCI_SCODATA_PKT, \
+	.hlen = HCI_SCO_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 1, \
+	.maxlen = HCI_MAX_SCO_SIZE
+
+#define H4_RECV_EVENT \
+	.type = HCI_EVENT_PKT, \
+	.hlen = HCI_EVENT_HDR_SIZE, \
+	.loff = 1, \
+	.lsize = 1, \
+	.maxlen = HCI_MAX_EVENT_SIZE
+
+#define H4_RECV_ISO \
+	.type = HCI_ISODATA_PKT, \
+	.hlen = HCI_ISO_HDR_SIZE, \
+	.loff = 2, \
+	.lsize = 2, \
+	.maxlen = HCI_MAX_FRAME_SIZE \
+
+struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
+			    const unsigned char *buffer, int count,
+			    const struct h4_recv_pkt *pkts, int pkts_count);
 #endif
 
-extern int h5_init(void);
-extern int h5_deinit(void);
-
-#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
-extern int hci_uart_send_frame(struct sk_buff *skb);
-#else
-extern int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb);
+#ifdef CONFIG_BT_HCIUART_BCSP
+int bcsp_init(void);
+int bcsp_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_LL
+int ll_init(void);
+int ll_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_ATH3K
+int ath_init(void);
+int ath_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_3WIRE
+int h5_init(void);
+int h5_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_INTEL
+int intel_init(void);
+int intel_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_BCM
+int bcm_init(void);
+int bcm_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_QCA
+int qca_init(void);
+int qca_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_AG6XX
+int ag6xx_init(void);
+int ag6xx_deinit(void);
+#endif
+
+#ifdef CONFIG_BT_HCIUART_MRVL
+int mrvl_init(void);
+int mrvl_deinit(void);
 #endif

drivers/bluetooth/rtkbt/Kconfig

@@ -0,0 +1,5 @@
+config BT_RTKBT
+	tristate "BT_RTKBT"
+	default n
+	help
+	  Help message of RTKBT

drivers/bluetooth/rtkbt/Makefile

@@ -0,0 +1,2 @@
+obj-$(CONFIG_BT_RTKBT)			:= rtkbt.o
+rtkbt-objs		:= hci_ldisc.o hci_h4.o hci_rtk_h5.o rtk_coex.o

drivers/bluetooth/rtkbt/hci_h4.c

@@ -0,0 +1,327 @@
+/*
+ *
+ *  Bluetooth HCI UART driver
+ *
+ *  Copyright (C) 2000-2001  Qualcomm Incorporated
+ *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
+ *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
+ *
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/fcntl.h>
+#include <linux/interrupt.h>
+#include <linux/ptrace.h>
+#include <linux/poll.h>
+#include <linux/slab.h>
+#include <linux/tty.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/signal.h>
+#include <linux/ioctl.h>
+#include <linux/skbuff.h>
+#include <net/bluetooth/bluetooth.h>
+#include <net/bluetooth/hci_core.h>
+#include <linux/version.h>
+
+#include "hci_uart.h"
+
+#ifdef BTCOEX
+#include "rtk_coex.h"
+#endif
+
+//#define VERSION "1.2"
+
+struct h4_struct {
+	unsigned long rx_state;
+	unsigned long rx_count;
+	struct sk_buff *rx_skb;
+	struct sk_buff_head txq;
+};
+
+/* H4 receiver States */
+#define H4_W4_PACKET_TYPE	0
+#define H4_W4_EVENT_HDR		1
+#define H4_W4_ACL_HDR		2
+#define H4_W4_SCO_HDR		3
+#define H4_W4_DATA		4
+
+/* Initialize protocol */
+static int h4_open(struct hci_uart *hu)
+{
+	struct h4_struct *h4;
+
+	BT_DBG("hu %p", hu);
+
+	h4 = kzalloc(sizeof(*h4), GFP_ATOMIC);
+	if (!h4)
+		return -ENOMEM;
+
+	skb_queue_head_init(&h4->txq);
+
+	hu->priv = h4;
+	return 0;
+}
+
+/* Flush protocol data */
+static int h4_flush(struct hci_uart *hu)
+{
+	struct h4_struct *h4 = hu->priv;
+
+	BT_DBG("hu %p", hu);
+
+	skb_queue_purge(&h4->txq);
+
+	return 0;
+}
+
+/* Close protocol */
+static int h4_close(struct hci_uart *hu)
+{
+	struct h4_struct *h4 = hu->priv;
+
+	hu->priv = NULL;
+
+	BT_DBG("hu %p", hu);
+
+	skb_queue_purge(&h4->txq);
+
+	kfree_skb(h4->rx_skb);
+
+	hu->priv = NULL;
+	kfree(h4);
+
+	return 0;
+}
+
+/* Enqueue frame for transmittion (padding, crc, etc) */
+static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
+{
+	struct h4_struct *h4 = hu->priv;
+
+	BT_DBG("hu %p skb %p", hu, skb);
+
+	/* Prepend skb with frame type */
+	memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
+	skb_queue_tail(&h4->txq, skb);
+
+	return 0;
+}
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+static inline int h4_check_data_len(struct h4_struct *h4, int len)
+#else
+static inline int h4_check_data_len(struct hci_dev *hdev, struct h4_struct *h4, int len)
+#endif
+{
+	register int room = skb_tailroom(h4->rx_skb);
+
+	BT_DBG("len %d room %d", len, room);
+
+	if (!len) {
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+		hci_recv_frame(h4->rx_skb);
+#else
+		hci_recv_frame(hdev, h4->rx_skb);
+#endif
+	} else if (len > room) {
+		BT_ERR("Data length is too large");
+		kfree_skb(h4->rx_skb);
+	} else {
+		h4->rx_state = H4_W4_DATA;
+		h4->rx_count = len;
+		return len;
+	}
+
+	h4->rx_state = H4_W4_PACKET_TYPE;
+	h4->rx_skb   = NULL;
+	h4->rx_count = 0;
+
+	return 0;
+}
+
+/* Recv data */
+static int h4_recv(struct hci_uart *hu, void *data, int count)
+{
+	struct h4_struct *h4 = hu->priv;
+	register char *ptr;
+	struct hci_event_hdr *eh;
+	struct hci_acl_hdr   *ah;
+	struct hci_sco_hdr   *sh;
+	register int len, type, dlen;
+
+	BT_DBG("hu %p count %d rx_state %ld rx_count %ld", 
+			hu, count, h4->rx_state, h4->rx_count);
+
+	ptr = data;
+	while (count) {
+		if (h4->rx_count) {
+			len = min_t(unsigned int, h4->rx_count, count);
+			memcpy(skb_put(h4->rx_skb, len), ptr, len);
+			h4->rx_count -= len; count -= len; ptr += len;
+
+			if (h4->rx_count)
+				continue;
+
+			switch (h4->rx_state) {
+			case H4_W4_DATA:
+				BT_DBG("Complete data");
+#ifdef BTCOEX
+				if(bt_cb(h4->rx_skb)->pkt_type == HCI_EVENT_PKT)
+					rtk_btcoex_parse_event(
+							h4->rx_skb->data,
+							h4->rx_skb->len);
+
+				if(bt_cb(h4->rx_skb)->pkt_type == HCI_ACLDATA_PKT)
+					rtk_btcoex_parse_l2cap_data_rx(
+							h4->rx_skb->data,
+							h4->rx_skb->len);
+#endif
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				hci_recv_frame(h4->rx_skb);
+#else
+				hci_recv_frame(hu->hdev, h4->rx_skb);
+#endif
+
+				h4->rx_state = H4_W4_PACKET_TYPE;
+				h4->rx_skb = NULL;
+				continue;
+
+			case H4_W4_EVENT_HDR:
+				eh = hci_event_hdr(h4->rx_skb);
+
+				BT_DBG("Event header: evt 0x%2.2x plen %d", eh->evt, eh->plen);
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				h4_check_data_len(h4, eh->plen);
+#else
+				h4_check_data_len(hu->hdev, h4, eh->plen);
+#endif
+				continue;
+
+			case H4_W4_ACL_HDR:
+				ah = hci_acl_hdr(h4->rx_skb);
+				dlen = __le16_to_cpu(ah->dlen);
+
+				BT_DBG("ACL header: dlen %d", dlen);
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				h4_check_data_len(h4, dlen);
+#else
+				h4_check_data_len(hu->hdev, h4, dlen);
+#endif
+				continue;
+
+			case H4_W4_SCO_HDR:
+				sh = hci_sco_hdr(h4->rx_skb);
+
+				BT_DBG("SCO header: dlen %d", sh->dlen);
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+				h4_check_data_len(h4, sh->dlen);
+#else
+				h4_check_data_len(hu->hdev, h4, sh->dlen);
+#endif
+				continue;
+			}
+		}
+
+		/* H4_W4_PACKET_TYPE */
+		switch (*ptr) {
+		case HCI_EVENT_PKT:
+			BT_DBG("Event packet");
+			h4->rx_state = H4_W4_EVENT_HDR;
+			h4->rx_count = HCI_EVENT_HDR_SIZE;
+			type = HCI_EVENT_PKT;
+			break;
+
+		case HCI_ACLDATA_PKT:
+			BT_DBG("ACL packet");
+			h4->rx_state = H4_W4_ACL_HDR;
+			h4->rx_count = HCI_ACL_HDR_SIZE;
+			type = HCI_ACLDATA_PKT;
+			break;
+
+		case HCI_SCODATA_PKT:
+			BT_DBG("SCO packet");
+			h4->rx_state = H4_W4_SCO_HDR;
+			h4->rx_count = HCI_SCO_HDR_SIZE;
+			type = HCI_SCODATA_PKT;
+			break;
+
+		default:
+			BT_ERR("Unknown HCI packet type %2.2x", (__u8)*ptr);
+			hu->hdev->stat.err_rx++;
+			ptr++; count--;
+			continue;
+		};
+
+		ptr++; count--;
+
+		/* Allocate packet */
+		h4->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
+		if (!h4->rx_skb) {
+			BT_ERR("Can't allocate mem for new packet");
+			h4->rx_state = H4_W4_PACKET_TYPE;
+			h4->rx_count = 0;
+			return -ENOMEM;
+		}
+
+		h4->rx_skb->dev = (void *) hu->hdev;
+		bt_cb(h4->rx_skb)->pkt_type = type;
+	}
+
+	return count;
+}
+
+static struct sk_buff *h4_dequeue(struct hci_uart *hu)
+{
+	struct h4_struct *h4 = hu->priv;
+	return skb_dequeue(&h4->txq);
+}
+
+static struct hci_uart_proto h4p = {
+	.id		= HCI_UART_H4,
+	.open		= h4_open,
+	.close		= h4_close,
+	.recv		= h4_recv,
+	.enqueue	= h4_enqueue,
+	.dequeue	= h4_dequeue,
+	.flush		= h4_flush,
+};
+
+int __init h4_init(void)
+{
+	int err = hci_uart_register_proto(&h4p);
+
+	if (!err)
+		BT_INFO("HCI H4 protocol initialized");
+	else
+		BT_ERR("HCI H4 protocol registration failed");
+
+	return err;
+}
+
+int __exit h4_deinit(void)
+{
+	return hci_uart_unregister_proto(&h4p);
+}

drivers/bluetooth/rtkbt/hci_uart.h

@@ -0,0 +1,145 @@
+/*
+ *
+ *  Bluetooth HCI UART driver
+ *
+ *  Copyright (C) 2000-2001  Qualcomm Incorporated
+ *  Copyright (C) 2002-2003  Maxim Krasnyansky <maxk@qualcomm.com>
+ *  Copyright (C) 2004-2005  Marcel Holtmann <marcel@holtmann.org>
+ *
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+#include <linux/version.h>
+#include <net/bluetooth/bluetooth.h>
+#include <net/bluetooth/hci_core.h>
+
+/* #define HCI_VERSION_CODE KERNEL_VERSION(3, 14, 41) */
+#define HCI_VERSION_CODE LINUX_VERSION_CODE
+
+#ifndef N_HCI
+#define N_HCI	15
+#endif
+
+#ifndef CONFIG_BT_HCIUART_H4
+#define CONFIG_BT_HCIUART_H4
+#endif
+
+#define BTCOEX
+
+/* Send host sleep notification to Controller */
+#define WOBT_NOTIFY		0	/* 1  enable; 0  disable */
+
+/* Send LE whitelist only for Background scan parameters */
+#define WOBT_NOTIFY_BG_SCAN_LE_WHITELIST_ONLY	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
+
+/* RTKBT Power-on Whitelist for sideband wake-up by LE Advertising from Remote.
+* Note that it's necessary to apply TV FW Patch. */
+#define RTKBT_TV_POWERON_WHITELIST	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
+
+/* RTKBT Power-on Data Filter for Manufacturer field */
+/* Note that please edit the datafilter in
+ *   rtkbt_set_le_device_poweron_data_filter() of hci_ldisc.c */
+#define RTKBT_TV_POWERON_DATA_FILTER	(0 * WOBT_NOTIFY)	/* 1  enable; 0  disable */
+
+/* Ioctls */
+#define HCIUARTSETPROTO		_IOW('U', 200, int)
+#define HCIUARTGETPROTO		_IOR('U', 201, int)
+#define HCIUARTGETDEVICE	_IOR('U', 202, int)
+#define HCIUARTSETFLAGS		_IOW('U', 203, int)
+#define HCIUARTGETFLAGS		_IOR('U', 204, int)
+
+/* UART protocols */
+#define HCI_UART_MAX_PROTO	6
+
+#define HCI_UART_H4	0
+#define HCI_UART_BCSP	1
+#define HCI_UART_3WIRE	2
+#define HCI_UART_H4DS	3
+#define HCI_UART_LL	4
+#define HCI_UART_ATH3K	5
+
+#define HCI_UART_RAW_DEVICE	0
+#define HCI_UART_RESET_ON_INIT	1
+#define HCI_UART_CREATE_AMP	2
+#define HCI_UART_INIT_PENDING	3
+#define HCI_UART_EXT_CONFIG	4
+#define HCI_UART_VND_DETECT	5
+
+struct hci_uart;
+
+struct hci_uart_proto {
+	unsigned int id;
+	int (*open)(struct hci_uart *hu);
+	int (*close)(struct hci_uart *hu);
+	int (*flush)(struct hci_uart *hu);
+	int (*recv)(struct hci_uart *hu, void *data, int len);
+	int (*enqueue)(struct hci_uart *hu, struct sk_buff *skb);
+	struct sk_buff *(*dequeue)(struct hci_uart *hu);
+};
+
+struct hci_uart {
+	struct tty_struct	*tty;
+	struct hci_dev		*hdev;
+	unsigned long		flags;
+	unsigned long		hdev_flags;
+
+	struct work_struct	write_work;
+	struct workqueue_struct *hci_uart_wq;
+
+	struct hci_uart_proto	*proto;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0)
+	struct percpu_rw_semaphore proto_lock; /* Stop work for proto close */
+#else
+	struct rw_semaphore proto_lock;
+#endif
+	void			*priv;
+
+	struct semaphore tx_sem;	/* semaphore for tx */
+
+	struct sk_buff		*tx_skb;
+	unsigned long		tx_state;
+
+#if WOBT_NOTIFY
+	struct notifier_block pm_notify_block;
+#endif
+};
+
+/* HCI_UART proto flag bits */
+#define HCI_UART_PROTO_SET	0
+#define HCI_UART_REGISTERED	1
+#define HCI_UART_PROTO_READY	2
+
+/* TX states  */
+#define HCI_UART_SENDING	1
+#define HCI_UART_TX_WAKEUP	2
+
+extern int hci_uart_register_proto(struct hci_uart_proto *p);
+extern int hci_uart_unregister_proto(struct hci_uart_proto *p);
+extern int hci_uart_tx_wakeup(struct hci_uart *hu);
+
+#ifdef CONFIG_BT_HCIUART_H4
+extern int h4_init(void);
+extern int h4_deinit(void);
+#endif
+
+extern int h5_init(void);
+extern int h5_deinit(void);
+
+#if HCI_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
+extern int hci_uart_send_frame(struct sk_buff *skb);
+#else
+extern int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb);
+#endif

drivers/clk/clk.c

@@ -3403,16 +3403,6 @@ static void clk_debug_unregister(struct clk_core *core)
 	core->dentry = NULL;
 	mutex_unlock(&clk_debug_lock);
 }
-static bool noclk_debug_init = false;
-
-/* noclkdebug bootargs: for option not init ftrace*/
-static int __init noclk_debug_setup(char *str)
-{
-	noclk_debug_init = true;
-	return 1;
-}
-
-__setup("noclkdebug", noclk_debug_setup);
 
 /**
  * clk_debug_init - lazily populate the debugfs clk directory
@@ -3427,8 +3417,6 @@ static int __init clk_debug_init(void)
 {
 	struct clk_core *core;
 
-	if(noclk_debug_init)
-		return 0;
 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
 	pr_warn("\n");
 	pr_warn("********************************************************************\n");

drivers/clk/thead/clk-light-fm.c

@@ -430,7 +430,7 @@ static int light_clocks_probe(struct platform_device *pdev)
 	clks[VISYS_AHB_HCLK] = thead_clk_light_divider("visys_ahb_hclk", "video_pll_foutvco", ap_base + 0x1d0, 0, 4, 4, MUX_TYPE_DIV, 6, 15);
 	clks[VPSYS_APB_PCLK] = thead_clk_light_divider("vpsys_apb_pclk", "gmac_pll_fout1ph0", ap_base + 0x1e0, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
 	clks[VPSYS_AXI_ACLK] = thead_clk_light_divider("vpsys_axi_aclk", "video_pll_foutvco", ap_base + 0x1e0, 8, 4, 12, MUX_TYPE_DIV, 3, 15);
-	clks[VENC_CCLK] = thead_clk_light_divider_closest("venc_cclk", "gmac_pll_foutpostdiv", ap_base + 0x1e4, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
+	clks[VENC_CCLK] = thead_clk_light_divider("venc_cclk", "gmac_pll_foutpostdiv", ap_base + 0x1e4, 0, 3, 4, MUX_TYPE_DIV, 2, 7);
 	clks[DPU0_PLL_DIV_CLK] = thead_clk_light_divider("dpu0_pll_div_clk", "dpu0_pll_foutpostdiv", ap_base + 0x1e8, 0, 8, 8, MUX_TYPE_DIV, 2, 214);
 	clks[DPU1_PLL_DIV_CLK] = thead_clk_light_divider("dpu1_pll_div_clk", "dpu1_pll_foutpostdiv", ap_base + 0x1ec, 0, 8, 8, MUX_TYPE_DIV, 2, 214);
 

drivers/clk/thead/clk.c

@@ -550,12 +550,7 @@ static int clk_lightdiv_set_rate(struct clk_hw *hw, unsigned long rate,
 	unsigned long flags = 0;
 	u32 val;
 
-	/** 
-	 * The clk-divider will calculate the node frequency by rounding up 
-	 * based on the parent frequency and the target divider.
-	 * This calculation is to restore accurate frequency divider. 
-	*/
-	divider = DIV64_U64_ROUND_CLOSEST(parent_rate, rate);
+	divider = parent_rate / rate;
 
 	/* DIV is zero based divider, but CDE is not */
 	if (light_div->div_type == MUX_TYPE_DIV)
@@ -597,10 +592,10 @@ static const struct clk_ops clk_lightdiv_ops = {
 	.set_rate = clk_lightdiv_set_rate,
 };
 
-static struct clk *thead_clk_light_divider_internal(const char *name, const char *parent,
+struct clk *thead_clk_light_divider(const char *name, const char *parent,
 				       void __iomem *reg, u8 shift, u8 width,
 				       u8 sync, enum light_div_type div_type,
-				       u16 min, u16 max, bool closest)
+				       u16 min, u16 max)
 {
 	struct clk_lightdiv *light_div;
 	struct clk_hw *hw;
@@ -627,10 +622,6 @@ static struct clk *thead_clk_light_divider_internal(const char *name, const char
 	light_div->div_type = div_type;
 	if (light_div->div_type == MUX_TYPE_DIV)
 		light_div->divider.flags = CLK_DIVIDER_ONE_BASED;
-
-	if (closest)
-		light_div->divider.flags |= CLK_DIVIDER_ROUND_CLOSEST;
-
 	light_div->min_div = min > ((1 << width) - 1) ?
 			     ((1 << width) - 1) : min;
 	light_div->max_div = max > ((1 << width) - 1) ?
@@ -647,24 +638,6 @@ static struct clk *thead_clk_light_divider_internal(const char *name, const char
 	return hw->clk;
 }
 
-struct clk *thead_clk_light_divider(const char *name, const char *parent,
-				       void __iomem *reg, u8 shift, u8 width,
-				       u8 sync, enum light_div_type div_type,
-				       u16 min, u16 max)
-{
-	return thead_clk_light_divider_internal(name, parent, reg, shift, width,
-											sync, div_type, min, max, false);
-}
-
-struct clk *thead_clk_light_divider_closest(const char *name, const char *parent,
-				       void __iomem *reg, u8 shift, u8 width,
-				       u8 sync, enum light_div_type div_type,
-				       u16 min, u16 max)
-{
-	return thead_clk_light_divider_internal(name, parent, reg, shift, width,
-											sync, div_type, min, max, true);
-}
-
 static inline struct clk_lightgate *to_clk_lightgate(struct clk_hw *hw)
 {
 	struct clk_gate *gate = to_clk_gate(hw);

drivers/clk/thead/clk.h

@@ -90,15 +90,6 @@ struct clk *thead_clk_light_divider(const char *name, const char *parent,
 				    u8 sync, enum light_div_type div_type,
 				    u16 min, u16 max);
 
-/**
-* By default, the clk framework calculates frequency by rounding downwards.
-* This function is to achieve closest frequency.
-*/
-struct clk *thead_clk_light_divider_closest(const char *name, const char *parent,
-				    void __iomem *reg, u8 shift, u8 width,
-				    u8 sync, enum light_div_type div_type,
-				    u16 min, u16 max);
-
 void thead_unregister_clocks(struct clk *clks[], unsigned int count);
 
 static inline struct clk *thead_clk_fixed(const char *name, unsigned long rate)

drivers/cpufreq/light-mpw-cpufreq.c

@@ -34,7 +34,7 @@ enum LIGHT_MPW_CPUFREQ_CLKS {
 };
 
 #define LIGHT_MPW_CPUFREQ_CLK_NUM	4
-#define LIGHT_CPUFREQ_THRE		1500000
+#define LIGHT_CPUFREQ_THRE		2000000
 #define LIGHT_C910_BUS_CLK_SYNC		BIT(11)
 #define LIGHT_C910_BUS_CLK_RATIO_MASK	0x700
 #define LIGHT_C910_BUS_CLK_DIV_RATIO_2	0x100

drivers/firmware/thead/Makefile

@@ -1,4 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_LIGHT_AON)	+= light_aon.o light_aon_misc.o light_aon_test.o
 obj-$(CONFIG_LIGHT_AON_PD) += light_aon_pd.o
-obj-y += light_proc_debug.o

drivers/firmware/thead/light_aon.c

@@ -12,12 +12,7 @@
 #include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/of_platform.h>
-#include <linux/of_address.h>
-#include <linux/of_device.h>
 #include <linux/platform_device.h>
-#include <linux/proc_fs.h>
-#include <linux/light_proc_debug.h>
-#include <linux/firmware/thead/ipc.h>
 
 /* wait for response for 3000ms instead of 300ms (fix me pls)*/
 #define MAX_RX_TIMEOUT		(msecs_to_jiffies(3000))
@@ -29,12 +24,6 @@ struct light_aon_chan {
 	struct mbox_client cl;
 	struct mbox_chan *ch;
 	struct completion tx_done;
-    /*for log proc*/
-	phys_addr_t log_phy;
-	size_t log_size;
-	void __iomem *log_mem;
-	void *log_ctrl;
-    struct proc_dir_entry *proc_dir;
 };
 
 struct light_aon_ipc {
@@ -112,11 +101,9 @@ static void light_aon_rx_callback(struct mbox_client *c, void *msg)
 {
 	struct light_aon_chan *aon_chan = container_of(c, struct light_aon_chan, cl);
 	struct light_aon_ipc *aon_ipc = aon_chan->aon_ipc;
-	struct light_aon_rpc_msg_hdr* hdr = (struct light_aon_rpc_msg_hdr*)msg;
-	uint8_t recv_size  = sizeof(struct light_aon_rpc_msg_hdr) + hdr->size;
 
-	memcpy(aon_ipc->msg, msg, recv_size);
-	dev_dbg(aon_ipc->dev, "msg head: 0x%x, size:%d\n", *((u32 *)msg), recv_size);
+	memcpy(aon_ipc->msg, msg, LIGHT_AON_RPC_MSG_NUM * sizeof(u32));
+	dev_dbg(aon_ipc->dev, "msg head: 0x%x\n", *((u32 *)msg));
 	complete(&aon_ipc->done);
 }
 
@@ -153,29 +140,19 @@ static int light_aon_ipc_write(struct light_aon_ipc *aon_ipc, void *msg)
 /*
  * RPC command/response
  */
-int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, void *ack_msg, bool have_resp)
+int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, bool have_resp)
 {
-	struct light_aon_rpc_msg_hdr *hdr = msg;
-	int ret = 0;
+	struct light_aon_rpc_msg_hdr *hdr;
+	int ret;
 
 	if (WARN_ON(!aon_ipc || !msg))
 		return -EINVAL;
-	if(have_resp && WARN_ON(!ack_msg))
-	    return -EINVAL;
+
 	mutex_lock(&aon_ipc->lock);
 	reinit_completion(&aon_ipc->done);
 
-	RPC_SET_VER(hdr, LIGHT_AON_RPC_VERSION);
-	/*svc id use 6bit for version 2*/
-    RPC_SET_SVC_ID(hdr, hdr->svc);
-	RPC_SET_SVC_FLAG_MSG_TYPE(hdr, RPC_SVC_MSG_TYPE_DATA);
-
-	if (have_resp){
-        aon_ipc->msg = ack_msg;
-		RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NEED_ACK);
-	} else {
-		RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NO_NEED_ACK);
-	}
+	if (have_resp)
+		aon_ipc->msg = msg;
 
 	ret = light_aon_ipc_write(aon_ipc, msg);
 	if (ret < 0) {
@@ -191,9 +168,9 @@ int light_aon_call_rpc(struct light_aon_ipc *aon_ipc, void *msg, void *ack_msg,
 			return -ETIMEDOUT;
 		}
 
-		/* response status is stored in msg data[0] field */
-		struct light_aon_rpc_ack_common* ack = ack_msg;
-		ret = ack->err_code;
+		/* response status is stored in hdr->func field */
+		hdr = msg;
+		ret = hdr->func;
 	}
 
 out:
@@ -205,41 +182,12 @@ out:
 }
 EXPORT_SYMBOL(light_aon_call_rpc);
 
-int  get_aon_log_mem(struct device *dev, phys_addr_t* mem, size_t* mem_size)
-{
-    struct resource r;
-	ssize_t fw_size;
-	void *mem_va;
-	struct device_node *node;
-	int ret;
-
-	*mem = 0;
-	*mem_size = 0;
-
-	node = of_parse_phandle(dev->of_node, "log-memory-region", 0);
-	if (!node) {
-		dev_err(dev, "no memory-region specified\n");
-		return -EINVAL;
-	}
-
-	ret = of_address_to_resource(node, 0, &r);
-	if (ret) {
-	    dev_err(dev, "memory-region get resource faild\n");
-		return -EINVAL;
-	}
-
-	*mem = r.start;
-	*mem_size = resource_size(&r);
-    return 0;
-}
-
 static int light_aon_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct light_aon_ipc *aon_ipc;
 	struct light_aon_chan *aon_chan;
 	struct mbox_client *cl;
-	char dir_name[32] = {0x0};
 	int ret;
 
 	aon_ipc = devm_kzalloc(dev, sizeof(*aon_ipc), GFP_KERNEL);
@@ -272,33 +220,7 @@ static int light_aon_probe(struct platform_device *pdev)
 	aon_ipc->dev = dev;
 	mutex_init(&aon_ipc->lock);
 	init_completion(&aon_ipc->done);
-    aon_chan->log_ctrl = NULL;
 
-    ret = get_aon_log_mem(dev, &aon_chan->log_phy, &aon_chan->log_size);
-	if(ret) {
-      return ret;
-	}
-    aon_chan->log_mem = ioremap(aon_chan->log_phy, aon_chan->log_size);
-	if (!IS_ERR(aon_chan->log_mem)) {
-		printk("%s:virtual_log_mem=0x%p, phy base=0x%llx,size:%d\n",
-			__func__, aon_chan->log_mem, aon_chan->log_phy,
-			aon_chan->log_size);
-	} else {
-		aon_chan->log_mem = NULL;
-		dev_err(dev, "%s:get aon log region fail\n",
-				__func__);
-		return -1;
-	}
-
-	sprintf(dir_name, "aon_proc");
-    aon_chan->proc_dir = proc_mkdir(dir_name, NULL);
-    if (NULL != aon_chan->proc_dir) {
-		aon_chan->log_ctrl = light_create_panic_log_proc(aon_chan->log_phy,
-			aon_chan->proc_dir, aon_chan->log_mem, aon_chan->log_size);
-	} else {
-		dev_err(dev, "create %s fail\n", dir_name);
-		return ret;
-	}
 	light_aon_ipc_handle = aon_ipc;
 
 	return devm_of_platform_populate(dev);

drivers/firmware/thead/light_aon_misc.c

@@ -11,37 +11,37 @@ struct light_aon_msg_req_misc_set_ctrl {
 	u32 val;
 	u16 resource;
 	u16 reserved[7];
-} __packed __aligned(1);
+} __packed __aligned(4);
 
 struct light_aon_msg_req_misc_get_ctrl {
 	struct light_aon_rpc_msg_hdr hdr;
 	u32 ctrl;
 	u16 resource;
 	u16 reserved[9];
-} __packed __aligned(1);
+} __packed __aligned(4);
 
 struct light_aon_msg_resp_misc_get_ctrl {
-	struct light_aon_rpc_ack_common ack_hdr;
+	struct light_aon_rpc_msg_hdr hdr;
 	u32 val;
 	u32 reserved[5];
-} __packed __aligned(1);
+} __packed __aligned(4);
 
 int light_aon_misc_set_control(struct light_aon_ipc *ipc, u16 resource,
 			    u32 ctrl, u32 val)
 {
 	struct light_aon_msg_req_misc_set_ctrl msg;
-	struct light_aon_rpc_ack_common ack_msg;
 	struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
 
+	hdr->ver = LIGHT_AON_RPC_VERSION;
 	hdr->svc = (uint8_t)LIGHT_AON_RPC_SVC_MISC;
 	hdr->func = (uint8_t)LIGHT_AON_MISC_FUNC_SET_CONTROL;
 	hdr->size = LIGHT_AON_RPC_MSG_NUM;
 
-	RPC_SET_BE32(&msg.ctrl, 0, ctrl);
-	RPC_SET_BE32(&msg.ctrl, 4, val);
-	RPC_SET_BE16(&msg.ctrl, 8, resource);
+	msg.ctrl = ctrl;
+	msg.val = val;
+	msg.resource = resource;
 
-	return light_aon_call_rpc(ipc, &msg, &ack_msg, true);
+	return light_aon_call_rpc(ipc, &msg, true);
 }
 EXPORT_SYMBOL(light_aon_misc_set_control);
 
@@ -49,23 +49,25 @@ int light_aon_misc_get_control(struct light_aon_ipc *ipc, u16 resource,
 			    u32 ctrl, u32 *val)
 {
 	struct light_aon_msg_req_misc_get_ctrl msg;
-	struct light_aon_msg_resp_misc_get_ctrl resp;
+	struct light_aon_msg_resp_misc_get_ctrl *resp;
 	struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
 	int ret;
 
+	hdr->ver = LIGHT_AON_RPC_VERSION;
 	hdr->svc = (uint8_t)LIGHT_AON_RPC_SVC_MISC;
 	hdr->func = (uint8_t)LIGHT_AON_MISC_FUNC_GET_CONTROL;
 	hdr->size = LIGHT_AON_RPC_MSG_NUM;
 
-	RPC_SET_BE32(&msg.ctrl, 0, ctrl);
-	RPC_SET_BE16(&msg.ctrl, 4, resource);
+	msg.ctrl = ctrl;
+	msg.resource = resource;
 
-	ret = light_aon_call_rpc(ipc, &msg, &resp, true);
+	ret = light_aon_call_rpc(ipc, &msg, true);
 	if (ret)
 		return ret;
 
+	resp = (struct light_aon_msg_resp_misc_get_ctrl *)&msg;
 	if (val != NULL)
-		RPC_GET_BE32(&resp.val, 0, val);
+		*val = resp->val;
 
 	return 0;
 }

drivers/firmware/thead/light_aon_pd.c

@@ -23,7 +23,7 @@ struct light_aon_msg_req_set_resource_power_mode {
 	u16 resource;
 	u16 mode;
 	u16 reserved[10];
-} __packed __aligned(1);
+} __packed __aligned(4);
 
 #define LIGHT_AONU_PD_NAME_SIZE 20
 #define LIGHT_AONU_PD_STATE_NAME_SIZE 10
@@ -79,21 +79,21 @@ static inline struct light_aon_pm_domain *to_light_aon_pd(struct generic_pm_doma
 static int light_aon_pd_power(struct generic_pm_domain *domain, bool power_on)
 {
 	struct light_aon_msg_req_set_resource_power_mode msg;
-	struct light_aon_rpc_ack_common  ack_msg;
 	struct light_aon_rpc_msg_hdr *hdr = &msg.hdr;
 	struct light_aon_pm_domain *pd;
 	int ret;
 
 	pd = to_light_aon_pd(domain);
 
+	hdr->ver = LIGHT_AON_RPC_VERSION;
 	hdr->svc = LIGHT_AON_RPC_SVC_PM;
 	hdr->func = LIGHT_AON_PM_FUNC_SET_RESOURCE_POWER_MODE;
 	hdr->size = LIGHT_AON_RPC_MSG_NUM;
 
-	RPC_SET_BE16(&msg.resource, 0, pd->rsrc);
-	RPC_SET_BE16(&msg.resource, 2, (power_on ? LIGHT_AON_PM_PW_MODE_ON : LIGHT_AON_PM_PW_MODE_OFF));
+	msg.resource = pd->rsrc;
+	msg.mode = power_on ? LIGHT_AON_PM_PW_MODE_ON : LIGHT_AON_PM_PW_MODE_OFF;
 
-	ret = light_aon_call_rpc(pm_ipc_handle, &msg, &ack_msg, true);
+	ret = light_aon_call_rpc(pm_ipc_handle, &msg, true);
 	if (ret)
 		dev_err(&domain->dev, "failed to power %s resource %d ret %d\n",
 			power_on ? "up" : "off", pd->rsrc, ret);

drivers/firmware/thead/light_aon_test.c

@@ -25,20 +25,20 @@ struct light_aon_msg_req_misc_set_ctrl {
 	u32 val;
 	u16 resource;
 	u16 reserved[7];
-} __packed __aligned(1);
+} __packed __aligned(4);
 
 struct light_aon_msg_req_misc_get_ctrl {
 	struct light_aon_rpc_msg_hdr hdr;
 	u32 ctrl;
 	u16 resource;
 	u16 reserved[9];
-} __packed __aligned(1);
+} __packed __aligned(4);
 
 struct light_aon_msg_resp_misc_get_ctrl {
 	struct light_aon_rpc_msg_hdr hdr;
 	u32 val;
 	u32 reserved[5];
-} __packed __aligned(1);
+} __packed __aligned(4);
 
 struct light_aon_device {
 	struct device		*dev;

drivers/firmware/thead/light_proc_debug.c

@@ -1,171 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * sys log sys for light c906 and e902
- * Copyright (C) 2021 Alibaba Group Holding Limited.
- */
-
-
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#include <linux/slab.h>
-#include <linux/io.h>
-#include <asm/cacheflush.h>
-
-#define GET_PAGE_NUM(size, offset)                                             \
-	((((size) + ((offset) & ~PAGE_MASK)) + PAGE_SIZE - 1) >> PAGE_SHIFT)
-
-struct light_log_ring_buffer {
-	__u32 read;
-	__u32 write;
-	__u32 size;
-	__u32 reserved[1];
-	__u8 data[0];
-};
-
-struct light_hw_log {
-	__u32 panic;
-	__u32 reserved[2];
-	struct light_log_ring_buffer rb;
-};
-
-struct light_proc_log_ctrl {
-	struct light_hw_log __iomem *log;
-	struct proc_dir_entry *log_proc_file;
-	phys_addr_t log_phy;
-};
-
-static void memset_hw(void __iomem *dst, int c, size_t sz)
-{
-	int i;
-	volatile u32 *d_ptr = dst;
-	for (i = 0; i < sz / 4; i++) {
-		__raw_writel(c, d_ptr++);
-	}
-}
-static void dump_regs(const char *fn, void *hw_arg)
-{
-	struct light_proc_log_ctrl *log_ctrl = hw_arg;
-
-	if (!log_ctrl->log)
-		return;
-
-	pr_debug("%s: panic = 0x%08x\n", fn,
-		 __raw_readl(&log_ctrl->log->panic));
-	pr_debug("%s: read = 0x%08x, write = 0x%08x, size = 0x%08x\n", fn,
-		 __raw_readl(&log_ctrl->log->rb.read),
-		 __raw_readl(&log_ctrl->log->rb.write),
-		 __raw_readl(&log_ctrl->log->rb.size));
-}
-
-static int log_proc_show(struct seq_file *file, void *v)
-{
-	struct light_proc_log_ctrl *log_ctrl = file->private;
-	char *buf;
-	size_t i;
-	/*dcache clean and invalid*/
-	dma_wbinv_range(log_ctrl->log_phy, ((char*)log_ctrl->log_phy + sizeof(struct light_hw_log)));
-
-	uint32_t write = __raw_readl(&log_ctrl->log->rb.write);
-	uint32_t read  = __raw_readl(&log_ctrl->log->rb.read);
-	uint32_t size =  __raw_readl(&log_ctrl->log->rb.size);
-	size_t log_size  = write >= read ? write - read : size +  write - read;
-
-    seq_printf(file,"****************** device log >>>>>>>>>>>>>>>>>\n");
-	dump_regs(__func__, log_ctrl);
-	if(!log_size) {
-		 seq_printf(file,"****************** end device log <<<<<<<<<<<<<<<<<\n");
-		 return 0;
-	}
-																	   
-	int page_num = GET_PAGE_NUM(log_size, 0);
-
-	int log_patch_1 = -1, log_patch_2 = -1;
-    
-	buf = kmalloc(PAGE_SIZE * page_num, GFP_KERNEL);
-	if (buf) {
-		if(read + log_size >= size) {
-			log_patch_2 = read + log_size - size + 1;
-			log_patch_1 = log_size - log_patch_2;
-			 
-		} else {
-			log_patch_1 = log_size;
-		}
-        
-		memcpy_fromio(buf, &log_ctrl->log->rb.data[read], log_patch_1);
-		if(log_patch_2 > 0) {
-            memcpy_fromio(buf, &log_ctrl->log->rb.data[0], log_patch_2);
-		}
-		
-		uint8_t last_fame_size  = log_size % 64;
-
-		for (i = 0; i < log_size - last_fame_size; i += 64) {
-			seq_printf(file, " %*pEp", 64, buf + i);
-	    }
-		if(last_fame_size) {
-            seq_printf(file, " %*pEp", last_fame_size, buf + log_size - last_fame_size);
-		}
-        
-		__raw_writel(write, &log_ctrl->log->rb.read);
-        kfree(buf);
-		/*dcahce clean*/
-		dma_wb_range(log_ctrl->log_phy, ((char*)log_ctrl->log_phy + sizeof(struct light_hw_log)));
-		//seq_printf(file,"\n%d %d %d %d %d\n",log_patch_1, log_patch_2, log_size ,last_fame_size, read);
-		seq_printf(file,"\n****************** end device log <<<<<<<<<<<<<<<<<\n");
-		return 0;
-	} else {
-		pr_debug("Fail to alloc buf\n");
-		return -1;
-	}
-	return 0;
-}
-
-static bool light_panic_init(struct light_hw_log *hw_log, size_t size)
-{
-	if (size < sizeof(struct light_hw_log)) {
-		return false;
-	}
-	hw_log->rb.read = 0;
-	hw_log->rb.size = size - sizeof(struct light_hw_log);
-	return true;
-}
-
-void *light_create_panic_log_proc(phys_addr_t log_phy, void *dir, void *log_info_addr, size_t size)
-{
-	struct light_proc_log_ctrl *log_ctrl =
-		kmalloc(sizeof(struct light_proc_log_ctrl), GFP_KERNEL);
-
-	if (log_ctrl == NULL)
-		return NULL;
-    
-    log_ctrl->log = log_info_addr;
-    
-	light_panic_init(log_ctrl->log, size);
-
-	log_ctrl->log_proc_file = proc_create_single_data(
-		"proc_log", 0644, dir, &log_proc_show, log_ctrl);
-	if (log_ctrl->log_proc_file == NULL) {
-		pr_debug("Error: Could not initialize %s\n", "dsp_log");
-		kfree(log_ctrl);
-		log_ctrl = NULL;
-	} else {
-		pr_debug("%s create Success!\n", "dsp_log");
-	}
-	log_ctrl->log_phy = log_phy;
-	return log_ctrl;
-}
-
-void light_remove_panic_log_proc(void *arg)
-{
-	struct light_proc_log_ctrl *log_ctrl = (struct light_proc_log_ctrl *)arg;
-
-	proc_remove(log_ctrl->log_proc_file);
-	kfree(log_ctrl);
-	pr_debug("light proc log removed\n");
-}

drivers/gpu-viv/config

@@ -58,7 +58,7 @@ SDK_DIR                           ?= $(AQROOT)/build/sdk
 VIVANTE_ENABLE_3D                 ?= 0
 VIVANTE_ENABLE_2D                 ?= 1
 VIVANTE_ENABLE_VG                 ?= 0
-VIVANTE_ENABLE_DRM                ?= 0
+VIVANTE_ENABLE_DRM                ?= 1
 NO_DMA_COHERENT                   ?= 0
 USE_PLATFORM_DRIVER               ?= 1
 ENABLE_GPU_CLOCK_BY_DRIVER        ?= 1

drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c

@@ -59,10 +59,6 @@
 
 #include "gc_feature_database.h"
 #include <gc_hal_kernel_debug.h>
-#include <linux/printk.h>
-
-#define CREATE_TRACE_POINTS
-#include <trace/events/g2d.h>
 
 #define _GC_OBJ_ZONE    gcvZONE_HARDWARE
 
@@ -302,7 +298,7 @@ _IdentifyHardwareByDatabase(
 
     if (database == gcvNULL)
     {
-        pr_err("[galcore]: Feature database is not found,"
+        gcmkPRINT("[galcore]: Feature database is not found,"
                   "chipModel=0x%0x, chipRevision=0x%x, productID=0x%x, ecoID=0x%x, customerID=0x%x",
                   Hardware->identity.chipModel,
                   Hardware->identity.chipRevision,
@@ -313,7 +309,7 @@ _IdentifyHardwareByDatabase(
     }
     else if (database->chipVersion != Hardware->identity.chipRevision)
     {
-        pr_warn("[galcore]: Warning: chipRevision mismatch, database chipRevision=0x%x register read chipRevision=0x%x\n",
+        gcmkPRINT("[galcore]: Warning: chipRevision mismatch, database chipRevision=0x%x register read chipRevision=0x%x\n",
                   database->chipVersion, Hardware->identity.chipRevision);
     }
 
@@ -1188,7 +1184,7 @@ _IsGPUPresent(
     ||  (Hardware->signature.chipMinorFeatures2 != signature.chipMinorFeatures2)
     )
     {
-        pr_err("[galcore]: GPU is not present.");
+        gcmkPRINT("[galcore]: GPU is not present.");
         gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
     }
 
@@ -1751,7 +1747,7 @@ _ConfigurePolicyID(
                 /* Check whether this bit changes. */
                 if (auxBit != ((policyID >> 4) & 0x1))
                 {
-                    pr_warn("[galcore]: AUX_BIT changes");
+                    gcmkPRINT("[galcore]: AUX_BIT changes");
                     return;
                 }
             }
@@ -1834,7 +1830,7 @@ _QueryNNClusters(
             /* We only support maximum 8 clusters by current. */
             if (enableNN > 0x7)
             {
-                pr_warn("[Galcore warning]: Invalid enableNN value is configured.");
+                gcmkPRINT("[Galcore warning]: Invalid enableNN value is configured.");
 
                 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
             }
@@ -1847,7 +1843,7 @@ _QueryNNClusters(
 
     if (value && Hardware->identity.customerID != 0x85)
     {
-        pr_warn("Galcore warning: Don't set enableNN as this chip not support NN cluster power control!\n");
+        gcmkPRINT("Galcore warning: Don't set enableNN as this chip not support NN cluster power control!\n");
     }
 
     Hardware->options.configNNPowerControl = value;
@@ -1905,7 +1901,7 @@ _SetHardwareOptions(
 
     if (options->enableMMU == gcvFALSE)
     {
-        pr_err("Galcore warning: MMU is disabled!\n");
+        gcmkPRINT("Galcore warning: MMU is disabled!\n");
     }
 
     /* Query enabled NN clusters. */
@@ -1939,7 +1935,7 @@ _SetHardwareOptions(
     }
     else if (options->userClusterMask & (~Hardware->identity.clusterAvailMask))
     {
-        pr_warn("%s(%d): user cluster mask(0x%x) must be a subset of available clusters(0x%x),ignored it!",
+        gcmkPRINT("%s(%d): user cluster mask(0x%x) must be a subset of available clusters(0x%x),ignored it!",
                   __FUNCTION__, __LINE__, options->userClusterMask, Hardware->identity.clusterAvailMask);
         options->userClusterMasks[Hardware->core] = options->userClusterMask = Hardware->identity.clusterAvailMask;
     }
@@ -1951,6 +1947,7 @@ _SetHardwareOptions(
         gcmkASSERT(gcvSTATUS_TRUE == gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_SECURITY_AHB));
 
         options->secureMode = gcvSECURE_IN_NORMAL;
+	pr_err("gcvSECURE_IN_NORMAL because of SECURITY\n");
 
         status = gckOS_QueryOption(Hardware->os, "TA", &data);
 
@@ -1962,6 +1959,7 @@ _SetHardwareOptions(
     else if (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_SECURITY_AHB))
     {
         options->secureMode = gcvSECURE_IN_NORMAL;
+	pr_err("gcvSECURE_IN_NORMAL because of SECURITY_AHB\n");
     }
 
     options->hasShader = database->NumShaderCores;
@@ -3066,7 +3064,7 @@ gckHARDWARE_InitializeHardware(
 
         gcmkSAFECASTPHYSADDRT(offset, Hardware->identity.registerAPB);
 
-        pr_warn("Initailize APB1 registers, APB offset is 0x%x.\n", offset);
+        gcmkPRINT("Initailize APB1 registers, APB offset is 0x%x.\n", offset);
 
         /* APB FE ctrl. */
         gcmkONERROR(gckOS_WriteRegisterEx(
@@ -4623,7 +4621,7 @@ OnError:
 }
 
 
-void
+static void
 _ResumeWaitLinkFE(
     gckHARDWARE Hardware
     )
@@ -4634,18 +4632,14 @@ _ResumeWaitLinkFE(
     gctUINT32 idle;
 
     /* Make sure FE is idle. */
-
-    gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
+    do
+    {
+        gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
                              Hardware->core,
                              0x00004,
                              &idle));
-
-    gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
-                             Hardware->core,
-                             0x00004,
-                             &idle));
-    if(idle != 0x7FFFFFFF) 
-        return;
+    }
+    while (idle != 0x7FFFFFFF);
 
     gcmkDUMP(Hardware->os, "@[register.wait 0x%05X 0x%08X 0x%08X]",
              0x00004,
@@ -4718,7 +4712,6 @@ gckHARDWARE_Interrupt(
                                   Hardware->core,
                                   0x00010,
                                   &data);
-    trace_g2d_irq_reg(0x00010,data);
 
     if (gcmIS_ERROR(status))
     {
@@ -4753,7 +4746,7 @@ gckHARDWARE_Interrupt(
         0x000D4,
         &dataEx
         );
-    trace_g2d_irq_reg(0x000D4,dataEx);
+
     if (gcmIS_ERROR(statusEx))
     {
         /*
@@ -4822,6 +4815,13 @@ gckHARDWARE_Notify(
 
     gckOS_AtomGet(Hardware->os, Hardware->kernel->eventObj->pending, (gctINT32_PTR)&pending);
 
+    if (pending & (1 << 29))
+    {
+        /* Event ID 29 is not a normal event, but for invalidating pipe. */
+        _ResumeWaitLinkFE(Hardware);
+        pending &= ~(1 << 29);
+    }
+
     gckOS_AtomSetMask(Hardware->kernel->eventObj->pending, pending);
 
     /* Handle events. */
@@ -7883,7 +7883,7 @@ gckHARDWARE_PowerControlClusters(
 #if gcdGPU_TIMEOUT
             if (timer >= Hardware->kernel->timeOut)
             {
-                pr_err("%s %d Galcore timeout...\n", __FUNCTION__, __LINE__);
+                gcmkPRINT("%s %d Galcore timeout...\n", __FUNCTION__, __LINE__);
 
                 gcmkONERROR(gcvSTATUS_DEVICE);
             }
@@ -9219,7 +9219,7 @@ gckHARDWARE_SetPowerState(
             status = gckOS_TryAcquireSemaphore(os, Hardware->globalSemaphore);
             if (status != gcvSTATUS_TIMEOUT && Hardware->isLastPowerGlobal)
             {
-                pr_err("%s: global state error", __FUNCTION__);
+                gcmkPRINT("%s: global state error", __FUNCTION__);
             }
 
             /* Switched to global ON, now release the global semaphore. */
@@ -12621,14 +12621,14 @@ gckHARDWARE_Reset(
         Hardware, state
         ));
 
-    pr_warn("[galcore]: recovery done");
+    gcmkPRINT("[galcore]: recovery done");
 
     /* Success. */
     gcmkFOOTER_NO();
     return gcvSTATUS_OK;
 
 OnError:
-    pr_err("[galcore]: Hardware not reset successfully, give up");
+    gcmkPRINT("[galcore]: Hardware not reset successfully, give up");
 
     if (globalAcquired)
     {

drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_func.c

@@ -2436,39 +2436,39 @@ _FuncExecute_FLOPRESET(IN gcsFUNCTION_EXECUTION_PTR Execution)
 #if gcdENABLE_FLOP_RESET_DEBUG
     for (i  = 0; i < Execution->funcCmdCount - minus_flag; i++)
     {
-        pr_warn("outSizeBytes is : %d", Execution->funcCmd[i].outSize);
-        pr_warn("outAddress is %x", Execution->funcCmd[i].data[2].address);
+        gcmkPRINT("outSizeBytes is : %d", Execution->funcCmd[i].outSize);
+        gcmkPRINT("outAddress is %x", Execution->funcCmd[i].data[2].address);
         for(j = 0; j < Execution->funcCmd[i].outSize; j++ )
         {
             if(((gctUINT8_PTR)(Execution->funcCmd[i].golden))[j] != ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[j])
             {
                 if(i == 0)
                 {
-                    pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-                    pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-                    pr_warn("NN workaround verify failed!");
+                    gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+                    gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+                    gcmkPRINT("NN workaround verify failed!");
                     return status;
                 }
                 else if(i == 1)
                 {
-                    pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-                    pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-                    pr_warn("TP workaround verify failed!");
+                    gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+                    gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+                    gcmkPRINT("TP workaround verify failed!");
                     return status;
                 }
             }
         }
         if(i == 0)
         {
-            pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-            pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-            pr_warn("NN workaround verify success!");
+            gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+            gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+            gcmkPRINT("NN workaround verify success!");
         }
         else
         {
-            pr_warn("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
-            pr_warn("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
-            pr_warn("TP workaround verify success!");
+            gcmkPRINT("top 2 outputBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].outlogical))[1]);
+            gcmkPRINT("top 2 goldenBytes: %x, %x",((gctUINT8_PTR)(Execution->funcCmd[i].golden))[0], ((gctUINT8_PTR)(Execution->funcCmd[i].golden))[1]);
+            gcmkPRINT("TP workaround verify success!");
         }
     }
 #endif
@@ -2576,7 +2576,7 @@ _ProgramMMUStates(
     case gcvSECURE_IN_TA:
     default:
         gcmkASSERT(gcvFALSE);
-        pr_err("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
+        gcmkPRINT("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
         break;
     }
 
@@ -3467,7 +3467,7 @@ _ProgramMMUStatesMCFE(
     case gcvSECURE_IN_TA:
     default:
         gcmkASSERT(gcvFALSE);
-        pr_err("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
+        gcmkPRINT("%s(%d): secureMode is wrong", __FUNCTION__, __LINE__);
         break;
     }
 
@@ -4792,10 +4792,10 @@ _FuncRelease_PPU(IN gcsFUNCTION_EXECUTION_PTR Execution)
             if (((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i] != 0x02020202)
             {
                 pass = gcvFALSE;
-                pr_warn("Incorrect Result:[%d] 0x%08x\n", i, ((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i]);
+                gcmkPRINT("Incorrect Result:[%d] 0x%08x\n", i, ((gctUINT32_PTR)(Execution->funcCmd[0].data[OUTPUT_PPU_IDX].logical))[i]);
             }
         }
-        pr_warn("PPU %s!\n", pass?"PASS":"FAIL");
+        gcmkPRINT("PPU %s!\n", pass?"PASS":"FAIL");
 
 #endif
 
@@ -9831,7 +9831,7 @@ _FuncRelease_USC(IN gcsFUNCTION_EXECUTION_PTR Execution)
                 || *((gctUINT32_PTR)(Execution->funcCmd[0].data[3].logical)) == 0x44004400 /*FP16*/
                 )
             {
-                pr_warn("USC PASS! ");
+                gcmkPRINT("USC PASS! ");
             }
         }
 #endif

drivers/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware_mc_fe.c

@@ -176,7 +176,7 @@ _AllocateDescRingBuf(
 
     if (Channel->physical > 0xffffffffull)
     {
-        pr_err("%s(%d): MCFE ring buffer physical over 4G: 0x%llx",
+        gcmkPRINT("%s(%d): MCFE ring buffer physical over 4G: 0x%llx",
             __FUNCTION__, __LINE__, (unsigned long long)Channel->physical);
     }
 
@@ -807,7 +807,7 @@ gckMCFE_Execute(
 
         if (_NextPtr(ringBuf->writePtr) == ringBuf->readPtr)
         {
-            pr_warn("%s: MCFE channel %s-%d ringBuf is full!",
+            gcmkPRINT("%s: MCFE channel %s-%d ringBuf is full!",
                       __FUNCTION__,
                       Priority ? "Pri" : "Std",
                       ChannelId);

drivers/gpu-viv/hal/kernel/gc_hal_kernel.c

@@ -54,8 +54,6 @@
 
 
 #include "gc_hal_kernel_precomp.h"
-#include <linux/module.h>
-#include <linux/ktime.h>
 
 #if gcdDEC_ENABLE_AHB
 #include "viv_dec300_main.h"
@@ -67,11 +65,9 @@
 
 #define _GC_OBJ_ZONE    gcvZONE_KERNEL
 
-
 /*******************************************************************************
 ***** Version Signature *******************************************************/
-#define MAX_THREADS 10
-#define MAX_TIMESTAMPS 10
+
 #define _gcmTXT2STR(t) #t
 #define gcmTXT2STR(t) _gcmTXT2STR(t)
 const char * _VERSION = "\n\0$VERSION$"
@@ -84,7 +80,6 @@ const char * _VERSION = "\n\0$VERSION$"
 ******************************* gckKERNEL API Code ******************************
 \******************************************************************************/
 
-
 #if gcmIS_DEBUG(gcdDEBUG_TRACE)
 #define gcmDEFINE2TEXT(d) #d
 gctCONST_STRING _DispatchText[] =
@@ -1256,7 +1251,7 @@ AllocateMemory:
 #if gcdCAPTURE_ONLY_MODE
                 else
                 {
-                    pr_err("Capture only mode: Out of Memory");
+                    gcmkPRINT("Capture only mode: Out of Memory");
                 }
 #endif
 
@@ -2342,7 +2337,7 @@ gckKERNEL_CacheOperation(
         if (!printed)
         {
             printed = gcvTRUE;
-            pr_warn("[galcore]: %s: Flush Video Memory", __FUNCTION__);
+            gcmkPRINT("[galcore]: %s: Flush Video Memory", __FUNCTION__);
         }
 
         gcmkFOOTER_NO();
@@ -2912,8 +2907,6 @@ gckKERNEL_Dispatch(
     gckCONTEXT context = gcvNULL;
     gckKERNEL kernel = Kernel;
     gctUINT32 processID;
-    gcsDATABASE_PTR database;
-    gctUINT i;
 #if !USE_NEW_LINUX_SIGNAL
     gctSIGNAL   signal;
 #endif
@@ -3239,35 +3232,9 @@ gckKERNEL_Dispatch(
 
         case gcvUSER_SIGNAL_WAIT:
             /* Wait on the signal. */
-            gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
-            for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
-            {
-                for (database = kernel->db->db[i];
-                    database != gcvNULL;
-                    database = database->next)
-                {
-                    database->st = database->st % 10;
-                    database->start_times[database->st] = ktime_get();
-                }
-            }
-            gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
-
             status = gckOS_WaitUserSignal(Kernel->os,
                                           Interface->u.UserSignal.id,
                                           Interface->u.UserSignal.wait);
-            gcmkVERIFY_OK(gckOS_AcquireMutex(kernel->os, kernel->db->dbMutex, gcvINFINITE));
-            for (i = 0; i < gcmCOUNTOF(kernel->db->db); ++i)
-            {
-                for (database = kernel->db->db[i];
-                    database != gcvNULL;
-                    database = database->next)
-                {
-                    database->st = database->st % 9;
-                    database->end_times[database->st++] = ktime_get();
-                }
-            }
-            gcmkVERIFY_OK(gckOS_ReleaseMutex(kernel->os, kernel->db->dbMutex));
-
             break;
 
         case gcvUSER_SIGNAL_MAP:
@@ -3505,7 +3472,7 @@ gckKERNEL_Dispatch(
                 Interface->u.ReadRegisterData.data = 0;
                 status = gcvSTATUS_CHIP_NOT_READY;
 
-                pr_err("[galcore]: Can't dump state if GPU isn't POWER ON.");
+                gcmkPRINT("[galcore]: Can't dump state if GPU isn't POWER ON.");
             }
         }
         break;
@@ -4232,7 +4199,7 @@ gckKERNEL_Recovery(
 
     if (Kernel->stuckDump == gcvSTUCK_DUMP_NONE)
     {
-        pr_err("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core);
+        gcmkPRINT("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core);
     }
     else if (Kernel->stuckDump == gcvSTUCK_DUMP_ALL_CORE)
     {
@@ -4266,7 +4233,7 @@ gckKERNEL_Recovery(
 
     if (Kernel->recovery == gcvFALSE)
     {
-        pr_err("[galcore]: Stop driver to keep scene.");
+        gcmkPRINT("[galcore]: Stop driver to keep scene.");
 
         /* Stop monitor timer. */
         Kernel->monitorTimerStop = gcvTRUE;
@@ -6046,7 +6013,7 @@ gckDEVICE_Profiler_Dispatch(
             }
             else
             {
-                pr_err("unknown profileMode argument");
+                gcmkPRINT("unknown profileMode argument");
                 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
             }
         }

drivers/gpu-viv/hal/kernel/gc_hal_kernel.h

@@ -62,7 +62,6 @@
 #include "gc_hal_driver.h"
 #include "gc_hal_kernel_mutex.h"
 #include "gc_hal_metadata.h"
-#include <linux/ktime.h>
 
 #if gcdENABLE_SW_PREEMPTION
 #include "gc_hal_kernel_preemption.h"
@@ -292,13 +291,6 @@ typedef struct _gcsDATABASE
     /* Process ID. */
     gctUINT32                           processID;
 
-    /* Process time. */
-    ktime_t                             start_times[10];
-    ktime_t                             end_times[10];
-    gctUINT32                           st;
-    ktime_t                             max_hw_time;
-
-
     /* Open-Close ref count */
     gctPOINTER                          refs;